{"shas":[["1e4f2c50a4e40967220c57fb8fde31e583df6499","dac0d4d2b0fcf621f57ae3ee5783a554d0ff2b3d@gmail.com","HW verification: add DUT RESET to driver and monitor\n\nThe RESET for DUT was now added at the interface of drivers and monitors. This\nwas because of (potentially) invalid behaviour of DST_RDY_N signal generator\nin FrameLink monitor.","Ondra Lengal"],["fde7e937e146a865f72059b99dcab5d3f7ea91be","dac0d4d2b0fcf621f57ae3ee5783a554d0ff2b3d@gmail.com","LFSR: add the EN input for enabling the generator","Ondra Lengal"],["29b2dae2e1b0e981ed60b7da0b9a2db581aebabf","dac0d4d2b0fcf621f57ae3ee5783a554d0ff2b3d@gmail.com","fl_hw_monitor: add enabling of LFSR","Ondra Lengal"],["71a8fefb439beaa8f96591ccb90fa4e3b815c97b","8cc19160508cc7381069801a029d6deb90bc538a@stud.fit.vutbr.cz","+ responder moved to monitor +","Marcela Simkova"],["2758f6ee14bd23c85f5d80c27f98ca2c41d07155","dac0d4d2b0fcf621f57ae3ee5783a554d0ff2b3d@gmail.com","FL_HW_MONITOR: improve waiting for SRC_RDY_N\n\nThe monitor now waits for SRC_RDY_N = '0' with DST_RDY_N = '1'. Just when it\ncomes (or rather in the following cycle) it starts the LFSR generator. This\nshould ensure cycle-accuracy of SW and HW runs.","Ondra Lengal"],["831a415c027d15640bfacb721e7552c305eca99a","dac0d4d2b0fcf621f57ae3ee5783a554d0ff2b3d@gmail.com","Erroneous FL_FIFO verification: remove responder","Ondra Lengal"],["27cd7a0d45a030fdcdfce97b5e5928f71ca90746","dac0d4d2b0fcf621f57ae3ee5783a554d0ff2b3d@gmail.com","Merge branch 'moved_responder'","Ondra Lengal"]],"ref":"refs/heads/master","size":7,"head":"27cd7a0d45a030fdcdfce97b5e5928f71ca90746","push_id":39020117}