{"shas":[["ac40fcbb4bb08466261623a64ee490bb649995f9","f921f743d3cd514575cdd7a3955ae96c5937f2bd@hacmini.(none)","1. AVRuCPackage.vhd\n   - added AVRIOMASK: these 4 bits are compared to highest 4 bits of AVR address\n2. AVR_uC_CompPack.vhd\n   - added Addr_Decoder, i2c_master_avrtop components\n3. Papilio_AVR8.vhd\n   - added Addr_Decoder, i2c_master_avrtop instances\n   - changed iore, iowe mapping of papilio_core_template (now uses Addr_Decoder outputs)\n   - cleanup of code using XEmacs \"beautify\"\n4. papilio_core_template.vhd\n   - changed AVR address input to 8 bits\n   - temporarily changed base address to 0xE0\n5. added new files\n   - AVR2Wishbone_Bridge.vhd\n   - Addr_Decoder.vhd\n   - I2C master files\n     - i2c_master_avrtop.vhd\n     - i2c_master_top.vhd\n     - i2c_master_byte_ctrl.vhd\n     - i2c_master_bit_ctrl.vhd","shielou"],["d4f9eb46024882ea1b322014c277216cd1aa8dce","f921f743d3cd514575cdd7a3955ae96c5937f2bd@hacmini.(none)","Simulated using Xilinx ISE 13.1","shielou"]],"repo":"shielou/Arduino-Soft-Core","actor":"shielou","ref":"refs/heads/master","size":2,"head":"d4f9eb46024882ea1b322014c277216cd1aa8dce","actor_gravatar":"00d9170e137519dc914cd3fbdd55e8a4","push_id":30998985}