{"head":"d2ed2d71c95462a6b14e7c7c8c82cb727ed342eb","size":2,"push_id":45146083,"shas":[["9bb272c900b46ebf78aa1b9daa7e3991bec8ff18","9e01571d0adae2c18b4ca0578f54335c0bc01b66@2pi.dk","Override TRI::getSubClassWithSubReg for X86.\n\nThere are fewer registers with sub_8bit sub-registers in 32-bit mode\nthan in 64-bit mode.  In 32-bit mode, sub_8bit behaves the same as\nsub_8bit_hi.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141206 91177308-0d34-0410-b5e6-96231b3b80d8","Jakob Stoklund Olesen"],["d2ed2d71c95462a6b14e7c7c8c82cb727ed342eb","9e01571d0adae2c18b4ca0578f54335c0bc01b66@2pi.dk","Simplify EXTRACT_SUBREG emission.\n\nEXTRACT_SUBREG is emitted as %dst = COPY %src:sub, so there is no need to\nconstrain the %dst register class.  RegisterCoalescer will apply the\nnecessary constraints if it decides to eliminate the COPY.\n\nThe %src register class does need to be constrained to something with\nthe right sub-registers, though.  This is currently done manually with\nCOPY_TO_REGCLASS nodes.  They can possibly be removed after this patch.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141207 91177308-0d34-0410-b5e6-96231b3b80d8","Jakob Stoklund Olesen"]],"ref":"refs/heads/master"}