def assemble(io)
      rn , operand , right , immediate = @rn ,  @operand ,  @from , 1

      case right
      when Numeric
        operand = numeric_operand(right)
      when Risc::RegisterValue
        operand = reg_code(right)
        immediate = 0                # ie not immediate is register
      else
        raise "invalid operand argument #{right.class} , #{self.class}"
      end
      op =  shift_handling
      val = shift(operand , 0)
      val |= shift(op , 0) # any barrel action, is already shifted
      val |= shift(reg_code(@to) ,            12)
      val |= shift(reg_code(rn) ,            12 + 4)
      val |= shift(@attributes[:update_status] , 12 + 4 + 4)#20
      val |= shift(op_bit_code ,        12 + 4 + 4  + 1)
      val |= shift(immediate ,          12 + 4 + 4  + 1 + 4)
      val |= instruction_code
      val |= condition_code
      io.write_unsigned_int_32 val
    end
def assemble(io)
      rn , operand , right , immediate = @rn ,  @operand ,  @from , 1

      case right
      when Numeric
        operand = numeric_operand(right)
      when Risc::RegisterValue
        operand = reg_code(right)
        immediate = 0                # ie not immediate is register
      else
        raise "invalid operand argument #{right.class} , #{self.class}"
      end
      op =  shift_handling
      val = shift(operand , 0)
      val |= shift(op , 0) # any barrel action, is already shifted
      val |= shift(reg_code(@to) ,            12)
      val |= shift(reg_code(rn) ,            12 + 4)
      val |= shift(@attributes[:update_status] , 12 + 4 + 4)#20
      val |= shift(op_bit_code ,        12 + 4 + 4  + 1)
      val |= shift(immediate ,          12 + 4 + 4  + 1 + 4)
      val |= instruction_code
      val |= condition_code
      io.write_unsigned_int_32 val
    end
don't overwrite instance variables, to make assembly repeatable