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Intel 4004
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Intel 4004
White ceramic Intel C4004 microprocessor with grey traces
Produced
From late 1971 to 1981
Common manufacturer(s)
Intel
Max. CPU clock rate
740 kHz
Min. feature size
10 µm
Instruction set
4-bit BCD-oriented
Transistors
2300[1]
Data width
4
Address width
12 (multiplexed)
Successor
Intel 4040
Application
Busicom calculator, arithmetic manipulation
Package(s)
16-pin DIP
The Intel 4004 is a 4-bit central processing unit (CPU) released by Intel Corporation in 1971. It was the first commercially available microprocessor by Intel.[2] The 4004 was the first in a long line of Intel CPUs.
The chip design started in April 1970, when Federico Faggin joined Intel, and it was completed under his leadership in January 1971. The first commercial sale of the fully operational 4004 occurred in March 1971 to Busicom Corp. of Japan for which it was originally designed and built as a custom chip.[3] In mid-November of the same year, with the prophetic ad "Announcing a new era in integrated electronics", the 4004 was made commercially available to the general market. The 4004 was the first commercially available monolithic CPU, fully integrated in one small chip.[citation needed] Such a feat of integration was made possible by the use of the then-new silicon gate technology for integrated circuits, originally developed by Faggin (with Tom Klein) at Fairchild Semiconductor in 1968, which allowed twice the number of random-logic transistors and an increase in speed by a factor of five compared to the incumbent MOS aluminum gate technology.[4] Faggin also invented the bootstrap load with silicon gate and the “buried contact”, improving speed and circuit density compared with aluminum gate.[5][6][7][8][9]
The 4004 microprocessor, the 4001 ROM, 4002 RAM, and 4003 Shift Register constituted the 4 chips in the Intel MCS-4 chip-set. With these components, small computers with varying amounts of memory and I/O facilities can be built.
Contents
[hide]
1 Contemporaneous CPU chips
2 History and production
2.1 Name and variants
3 Technical specifications
3.1 Logic levels
3.2 Support chips
3.3 Packaging
4 Use
5 Legacy and value
6 References
7 Patents
8 Historical documents
9 Further reading
10 External links
Contemporaneous CPU chips[edit]
Three other CPU chip designs were produced at about the same time: the Four-Phase Systems AL1, done in 1969; the MP944, completed in 1970 and used in the F-14 Tomcat fighter jet; and the Texas Instruments TMS-1000 chip, announced in September 17, 1971. Both the AL1 and the MP944 use several chips for the implementation of the CPU function. The TMS0100 chip was presented as a “calculator on a chip” with the original designation TMS1802NC.[10] This chip contains a very primitive CPU and can only be used to implement various simple 4-function calculators. It is the precursor of the TMS1000, introduced in 1974, which is considered the first microcontroller i.e., a computer on a chip containing not only the CPU, but also ROM, RAM, and I/O functions.[11] The MCS-4 family of 4 chips developed by Intel, of which the 4004 is the CPU or microprocessor, was far more versatile and powerful than the single chip TMS1000, allowing the creation of a variety of small computers for various applications.
Zilog, the first company entirely dedicated to microprocessors and microcontrollers, was started by F. Faggin and Ralph Ungermann, at the end of 1974. These devices formed the basis for later models of microcontrollers.
History and production[edit]
National Semiconductor was a second source manufacturer of the 4004, under their part number INS4004.[12]
The first public mention of 4004 was an advertisement in the November 15, 1971 edition of Electronic News,[13]. The first delivery was to Busicom for their engineering prototype calculator in March 1971, [14][9] followed by their 141-PF prototype calculator commercially available in the market in July 1971[15]. Packaged in a 16-pin ceramic dual in-line package, the 4004 was the first commercially available computer processor designed and manufactured by chip maker Intel, which had previously made semiconductor memory chips. The chief designers of the chip were Federico Faggin, the leader of the project after the architectural definition was finalized with Busicom, who created the design methodology and the silicon-based chip design; Ted Hoff who formulated the architecture [16][17], both of Intel, and Masatoshi Shima of Busicom who assisted in the development.
Faggin, the sole chip designer among the engineers on the MCS-4 project, was the only one with experience in metal-oxide semiconductor (MOS) random logic and circuit design. He also had the crucial knowledge of the new silicon gate process technology with self-aligned gates, which he had created at Fairchild in 1968. At Fairchild in 1968, Faggin also designed and manufactured the world's first commercial IC using SGT, the Fairchild 3708 [18] that was featured on the cover of Electronics (Sept. 29, 1969).[19] As soon as he joined the Intel MOS Department he created a new random logic design methodology based on silicon gate[15], and contributed many technology and circuit design inventions that enabled their single chip microprocessor to become a reality. His methodology set the design style for all the early Intel microprocessors and later for the Zilog Z80. He also led the MCS-4 project and was responsible for its successful outcome (1970–1971). Marcian "Ted" Hoff, head of the Application Research Department, contributed the architectural proposal for Busicom working with Stanley Mazor in 1969, then he moved on to other projects. When asked where he got the ideas for the architecture of the first microprocessor, Hoff related that Plessey, "a British tractor company",[20] had donated a minicomputer to Stanford, and he had "played with it some" while he was there. Shima designed the Busicom calculator firmware and assisted Faggin during the first six months of the implementation. The manager of Intel's MOS Design Department was Leslie L. Vadász.[21] At the time of the MCS-4 development, Vadasz's attention was completely focused on the mainstream business of semiconductor memories and he left the leadership and the management of the MCS-4 project to Faggin.
Busicom had designed their own special-purpose LSI chipset for use in their Busicom 141-PF calculator with integrated printer. They based their design on the architecture of the Olivetti Programma 101, the world’s first tabletop programmable calculator, which Olivetti introduced in 1965. Busicom commissioned Intel to develop their for production. Like the Olivetti Programma 101, the Busicom design used serial read-write memory. The Busicom memory was based on MOS shift registers rather than the costly Olivetti memory based on magnetostriction wire.
Intel determined the Busicom design was too complex, since serial memories required more components, and would use 40 pins, a packaging standard different from Intel’s own 16-pin standard. Intel proposed to develop a new design which could be produced with standard 16-pin DIP packaging, and would have a reduced instruction set.[22] The memory simplification would come from using Intel’s newly developed dynamic RAM memory. This new design was the 4004 chip, which is one of a set of 4 chips, along with ROM, DRAM, and serial-to-parallel shift register chips. The 4004 was subsequently designed by Federico Faggin [23] using silicon gate technology and built of approximately 2,300 transistors[1] and was followed the next year by the first ever 8-bit microprocessor, the 3,500 transistor 8008 (and the 4040, a revised and improved 4004). It was not until the development of the 40-pin 8080 in 1974, a project conceived and directed by Faggin [24] that the address and data buses would be separated, giving faster and simpler access to memory.
The 4004 employs a 10 µm process silicon-gate enhancement load pMOS technology on a 12 mm² die[25] and can execute approximately 92,000 instructions per second; a single instruction cycle is 10.8 microseconds.[26] The original clock rate design goal was 1 MHz, the same as the IBM 1620 Model I.[citation needed]
The Intel 4004 was designed by physically cutting sheets of Rubylith into thin strips to lay out the circuits to be printed, a process made obsolete by current computer graphic design capabilities.[27]
For the purpose of testing the produced chips, Faggin developed a tester for silicon wafers of MCS-4 family that was itself driven by 4004 chip. The tester also served as a proof for the management that Intel 4004 microprocessor could be used not only in calculator-like products, but also for control applications.[28]
Name and variants[edit]
The Unicom 141P is an OEM version of the Busicom 141-PF
When Faggin designed the MCS-4 family, he also christened the chips with distinct names: 4001, 4002, 4003, and 4004, breaking away from the numbering scheme used by Intel at that time which would have required the names 1302, 1105, 1507, and 1202 respectively. Had he followed Intel's number sequence, the idea that the chips were part of a family of components intended to work seamlessly together would have been lost.[29] Intel's early numbering scheme for integrated circuits used a four-digit number for each component. The first digit indicated the process technology used, the second digit indicated the generic function, and the last two digits of the number were used to indicate the sequential number in the development of the component. The 8008 microprocessor was originally called 1201, per Intel’s naming conventions. Before its market introduction, the 1201 was renamed 8008, following the new naming convention started with the 4001/2/3/4.
Tadashi Sasaki attributes the basic invention to break the calculator into four parts with ROM (4001), RAM (4002), shift registers (4003) and CPU (4004) to an unnamed woman from the Nara Women's College present at a brainstorming meeting that was held in Japan prior to his first meeting with Robert Noyce from Intel, leading up to the Busicom deal.[30]
The 4004 is part of the MCS-4 family of LSI chips that can be used to build digital computers with varying amounts of memory. The other members of the MCS-4 family are memories and input/output circuits, which are necessary to implement a complete computer. The 4001 is a ROM (read-only memory) with four lines of output; the 4002 is a RAM (random access memory) with four lines of input/output. The 4003 is a static shift register to be used for expanding the I/O lines; e.g., for keyboard scanning or controlling a printer.[citation needed]
The 4004 includes control functions for memory and I/O, which are not normally handled by the microprocessor.[citation needed]
Technical specifications[edit]
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Two C4004 DIPs with one opened to show the die.
Intel 4004 architectural block diagram
Intel 4004 DIP chip pinout
Intel 4004 registers
11 10 09 08 07 06 05 04 03 02 01 00 (bit position)
Accumulator
A Accumulator
Condition codes
C Carry flag
Index registers
R0 R1
R2 R3
R4 R5
R6 R7
R8 R9
R10 R11
R12 R13
R14 R15
Program counter
PC Program Counter
Push-down address call stack
PC1 Call level 1
PC2 Call level 2
PC3 Call level 3
Maximum clock rate is 740 kHz. The 4004 had this maximum clock rating upon its initial 1971 release.
Instruction cycle time: 10.8 µs[31] (8 clock cycles / instruction cycle)
Instruction execution time 1 or 2 instruction cycles (10.8 or 21.6 µs), 46300 to 92600 instructions per second.
Adding two 8-digit numbers (32 bits each, assuming 4-bit BCD digits) takes 850 µs - i.e. 79 instruction cycles, about 10 instruction cycles per decimal digit.
Separate program and data storage. Contrary to Harvard architecture designs, however, which use separate buses, the 4004, with its need to keep pin count down, uses a single multiplexed 4-bit bus for transferring:
12-bit addresses
8-bit instructions
4-bit data words
Able to directly address 5120 bits (equivalent to 640 bytes) of RAM, stored as 1280 4-bit "characters" and organised into groups representing 1024 "data" and 256 "status" characters (512 and 128 bytes).
Able to directly address 32768 bits of ROM, equivalent to and arranged as 4096 8-bit words (i.e. bytes).
Instruction set contained 46 instructions (of which 41 were 8 bits wide and 5 were 16 bits wide)
Register set contains 16 registers of 4 bits each
Internal subroutine stack, 3 levels deep.
Logic levels[edit]
Symbol
Min
Max
Unit
VSS-DD +15-5% +15+5% V
VIL VDD VSS−5.5 V
VIH VSS−1.5 VSS+0.3 V
VOL VSS−12 VSS−6.5 V
VOH VSS−0.5 VSS V
Support chips[edit]
4001: 256-byte ROM (256 8-bit program instructions), and one built-in 4-bit I/O port. A 4001 ROM+I/O chip cannot be used in a system along with a 4008/4009 pair.[32]
4002: 40-byte RAM (80 4-bit data words), and one built-in 4-bit output port; the RAM portion of the chip is organized into four "registers" of 20 4-bit words:
16 data words (used for mantissa digits in the original calculator design)
4 status words (used for exponent digits and signs in the original calculator design)
4003: 10-bit parallel output shift register for scanning keyboards, displays, printers, etc.
4008: 8-bit address latch for access to standard memory chips, and one built-in 4-bit chip select and I/O port
4009: program and I/O access converter to standard memory and I/O chips
4269: keyboard/display interface
4289: memory interface (combined functions of 4008 and 4009)
The minimum system specification described by Intel consists of a 4004 with a single 256-byte 4001 program ROM; there is no explicit need for separate RAM in minimal complexity applications thanks to the 4004's large number of onboard index registers, which represent the equivalent of 16 x 4-bit or 8 x 8-bit characters (or a mixture) of working RAM, nor for simple interface chips thanks to its built-in I/O lines. However, as project complexity increases, the various other support chips start to become useful.
Packaging[edit]
Numerous versions of the Intel MCS-4 line of processors were produced. The earliest versions, marked C (like C4004), were ceramic and used a zebra pattern of white and gray on the back of the chips, often called "grey traces". The next generation of the chips was plain white ceramic (also marked C), and then dark grey ceramic (D). Many of the more recent versions of MCS-4 family were also produced with plastic (P).
The ceramic C4004 variant without grey traces.
The ceramic D4004 variant.
The plastic P4004 variant.
Use[edit]
The first commercial product to use a microprocessor was the Busicom calculator 141-PF. The 4004 was also used in the first microprocessor-controlled pinball game, a prototype produced by Dave Nutting Associates for Bally in 1974.
According to Nick Tredennick, a microprocessor designer and expert witness to the Boone/Hyatt patent case[clarification needed]:
Here are my opinions from [the] study [I conducted for the patent case]. The first microprocessor in a commercial product was the Four Phase Systems AL1. The first commercially available (sold as a component) microprocessor was the 4004 from Intel.
—  [33]
A popular myth has it that Pioneer 10, the first spacecraft to leave the solar system, used an Intel 4004 microprocessor. According to Dr. Larry Lasher of Ames Research Center, the Pioneer team did evaluate the 4004, but decided it was too new at the time to include in any of the Pioneer projects.[citation needed] The myth was repeated by Federico Faggin himself in a lecture for the Computer History Museum in 2006.[34]
Legacy and value[edit]
In the lower-right corner of the CPU you can see the "F.F." sign
Federico Faggin signed the 4004 with his initials because he knew that his silicon gate design embodied “the essence of the microprocessor”. In a corner of the die you can read "F.F."[29]
On November 15, 2006, the 35th anniversary of the 4004, Intel celebrated by releasing the chip's schematics, mask works, and user manual.[35] A fully functional 41 x 58 cm,[36] 130x scale replica of the Intel 4004 was built using discrete transistors and put on display in 2006 at the Intel Museum in Santa Clara, California.[37]
On October 15, 2010, Faggin, Hoff, and Mazor were awarded the National Medal of Technology and Innovation by President Barack Obama for their pioneering work on the 4004.[38]
References[edit]
^ Jump up to: a b "Intel 4004 Fun Facts". Intel.com. Retrieved 2011-07-06.
Jump up ^ http://www.intel.co.uk/content/www/uk/en/history/museum-story-of-intel-4004.html
Jump up ^ Faggin, F. (1992). "The Birth of the Microprocessor". Byte, pp. 145–150, March 1992.
Jump up ^ F. Faggin, T. Klein: "Silicon-Gate Technology". "Solid State Electronics", 1970, Vol. 13, pp. 1125–1144
Jump up ^ Faggin, Federico. "The New Methodology for Random Logic Design". Retrieved June 3, 2017.
Jump up ^ Faggin, Federico. "The Bootstrap Load". Retrieved June 3, 2017.
Jump up ^ Faggin, Federico. "The Buried Contact". Retrieved June 3, 2017.
Jump up ^ ""Inductee Detail"". National Inventors Hall of Fame. 2016-07-25.
^ Jump up to: a b Faggin, Federico. "The MOS Silicon Gate Technology and the First Microprocessors" (PDF). La Rivista del Nuovo Cimento, Società Italiana di Fisica. 38 (12). Retrieved 2017-06-05.
Jump up ^ Woerner, Joerg (November 16, 2001). "The "Calculator-on-a-chip"". Datamath Calculator Museum. Retrieved 22 March 2016.
Jump up ^ Woerner, Joerg (February 26, 2001). "Texas Instruments: They invented the Microcontroller". Datamath Calculator Museum. Retrieved 22 March 2016.
Jump up ^ http://www.cpu-world.com/CPUs/4004/index.html Intel 4004 microprocessor family, retrieved 2011 Dec 14
Jump up ^ Gilder, George (1990). Microcosm: the quantum revolution in economics and technology. Simon and Schuster. p. 107. ISBN 978-0-671-70592-3. Intel's first advertisement for the 4004 appeared in the November 15, 1971 issue of Electronic News,
Jump up ^ Busicom Calculator Engineering Prototype (Gift of Federico Faggin to the Computer History Museum, Mountain View, California)
^ Jump up to: a b Faggin, Federico; Hoff, Marcian; Mazor, Stanley; Shima, Masatoshi (1996-12-01). "The history of the 4004". IEEE Micro. 16 (6): 10–20. doi:10.1109/40.546561.
Jump up ^ Inductee Detail National Inventors Hall of Fame
Jump up ^ Faggin, Federico. "Ted Hoff's Role in the Microprocessor". Retrieved June 3, 2017.
Jump up ^ Faggin, Federico. "A faster generation of MOS devices with low thresholds is riding the crest of the new wave, silicon-gate IC's". Retrieved June 3, 2017.
Jump up ^ Faggin, Federico. "Earliest Published Papers". Retrieved June 3, 2017.
Jump up ^ Possibly he had confused the Plessey name with that of Massey Ferguson, makers of agricultural machinery.
Jump up ^ "The Intel4004". Intel4004.com. Retrieved 2008-03-15.
Jump up ^ Nigel Tout. "The Busicom 141-PF calculator and the Intel 4004 microprocessor". Retrieved November 15, 2009.
Jump up ^ “Silicon Valley” by Moira Johnston, page 466, National Geographic, October 1982.
Jump up ^ Faggin, Federico. "Exempt performance and salary review'". Retrieved June 3, 2017.
Jump up ^ "History of Computing Industrial Era 1970 - 1971". 2010-10-19. Retrieved 2016-05-05. In February Intel releases the 4004 microprocessor to the market. It has 12 sq mm die size and 16 pins which fit into a motherboard.
Jump up ^ "Intel 4004 datasheet" (PDF) (published 2010-07-06). 1987. Retrieved 2011-07-06.
Jump up ^ "Intel's Accidental Revolution". CNet.com. Archived from the original on 2012-07-11. Retrieved 2009-07-30.
Jump up ^ Hendrie, Gardner (2006). "Oral History of Federico Faggin" (PDF). Computer History Museum. Retrieved 2017-01-24.
^ Jump up to: a b "Federico Faggin's Signature". Intel4004.com. Retrieved 2012-08-21.
Jump up ^ Aspray, William (1994-05-25). "Oral-History: Tadashi Sasaki". Interview #211 for the Center for the History of Electrical Engineering. The Institute of Electrical and Electronics Engineers, Inc. Retrieved 2013-01-02.
Jump up ^ Intel's museum archive i4004 datasheet
Jump up ^ IMPORTANT section at page 25: http://www.intel.com/Assets/PDF/Manual/msc4.pdf
Jump up ^ "Dissertation 2004" (PDF). Retrieved 2017-11-14.
Jump up ^ "Intel 4004 Microprocessor 35th Anniversary". YouTube. Retrieved 2011-07-06.
Jump up ^ Intel 4004 Microprocessor Historical Materials, Intel Museum, 2009-11-15, accessed 2009-11-18
Jump up ^ "4004 @ 44: SVG Mask Artwork; New Busicom 141-PF replica PCB; Printer emulator". 2015-11-20. Retrieved 2016-05-05.
Jump up ^ "Intel 4004 -- 45th Anniversary Project". 2015-11-15. Retrieved 2016-04-02. including fully functional 130x scale replicas of the 4004 built using discrete transistors, museum-durable keyboards and slide switches, and video display electronics.
Jump up ^ "President Obama Honors Nation's Top Scientists and Innovators" (Press release). October 15, 2010.
Patents[edit]
US 3753011 August 14, 1973. Faggin, Federico: Power supply settable bi-stable circuit.
US 3821715 June 28, 1974. Hoff, Marcian; Mazor, Stanley; Faggin, Federico: Memory system for multi-chip digital computer.
Historical documents[edit]
Faggin F., Capocaccia F. "A New Integrated MOS Shift Register”, Proceedings XV International Electronics Scientific Congress, Rome, April 1968, pp. 143–152. This paper describes a novel static MOS shift register, developed at SGS-Fairchild (now ST Micro) at the end of 1967, before Federico Faggin joined Fairchild's R&D in Palo Alto (Ca) in February 1968. Faggin later used this new shift register in the MCS-4 chips, including the 4004.
Cover and abstract of the IEDM (International Electron Devices Meeting) Program (October 1968). The Silicon Gate Technology (SGT) was first presented by its developer, Federico Faggin, at the IEDM on October 23, 1968 in Washington, D.C. It was the only commercial process technology for the fabrication of MOS integrated circuits with self-aligned gate that was later universally adopted by the semiconductor industry. The SGT was the first technology to produce commercial dynamic RAMs, CCD image sensors, non volatile memories and the microprocessor, providing for the first time all the fundamental elements of a general purpose computer with LSI integrated circuits.
Cover of Electronics Magazine (September 29, 1969). The Electronics article introduces the Fairchild 3708, designed by Federico Faggin in 1968. It was the world's first commercial integrated circuit using the Silicon Gate Technology, proving its viability.
Initials F.F. (Federico Faggin) on the 4004 design (1971). The 4004 bears the initials F.F. of its designer, Federico Faggin, etched on one corner of the chip. Signing the chip was a spontaneous gesture of proud authorship and was also an original idea imitated after him by many Intel designers.
Busicom 141-PF Printing Calculator Engineering Prototype (1971). (Gift of Federico Faggin to the Computer History Museum, Mountain View, CA). The CHM collection catalog shows pictures of the engineering prototype of the Busicom 141-PF desktop calculator. The engineering prototype used the world’s first microprocessor to have ever been produced. This one-of-a-kind prototype was a personal present by Busicom’s president Mr. Yoshio Kojima to Federico Faggin for his successful leadership of the design and development of the 4004 and three other memory and I/O chips (the MCS-4 chipset). After keeping it in his home for 25 years, Faggin donated it to the CHM in 1996.
F. Faggin and M.E. Hoff: "Standard parts and custom design merge in four-chip processor kit". Electronics/April 24, 1972, pp. 112–116. Reprinted on pp. 6–27 to 6–31 of The Intel Memory Design Handbook: August 1973.
F. Faggin, M. Shima, M.E. Hoff, Jr., H. Feeney, S. Mazor: "The MCS-4—An LSI micro computer system". IEEE '72 Region Six Conference. Reprinted on pp. 6–32 to 6–37 of The Intel Memory Design Handbook: August 1973.
Further reading[edit]
Federico Faggin, Marcian E. Hoff Jr., Stanley Mazor and Masatoshi Shima. The history of the 4004. IEEE Micro, 16(6):10-20, December 1996. "The 4004 design team tells its story."
Intel 4004 Microprocessor 35th Anniversary - Live recording of presentations by Ted Hoff and Federico Faggin at the Computer History Museum for the 35th anniversary of the first microprocessor. (youtube.com)
IEEE Solid State Circuits Magazine, Winter 2009 Vol.1 No.1. "The 4004 microprocessor of Faggin, Hoff, Mazor, and Shima".
The MOS Silicon Gate Technology and the First Microprocessors, by Federico Faggin published in La Rivista del Nuovo Cimento, Italian Physical Society, Vol. 38, No. 12, 2015.
“How we made the microprocessor” by Federico Faggin. Nature Electronics, Vol. 1, January 2018. Published online: 8 January 2018
External links[edit]
Intel's First Microprocessor—the Intel 4004: Intel Museum (Intel Corporate Archives) entry
The Intel 4004: A testimonial from Federico Faggin, designer of the 4004 and developer of its enabling technology
The New Methodology for Random Logic Design Used in the 4004 and in All the Early Intel Microprocessors
Interview with Masatoshi Shima
MCS-4 Micro Computer Set Data Sheet (12 pp)
Intel 4004 -- 45th Anniversary Project, Schematics at the unofficial 4004 website, and a simulator in Java. Fully functional 130x scale replicas of the 4004 built using discrete transistors.
The Crucial Role of Silicon Design in the Invention of the Microprocessor
High resolution light microscope pictures of an Intel 4004 die together with a basic explanation of CMOS logic
Intel 4004 Emulator, Assembler, and Disassembler: Simple programming tools for Intel 4004 in Javascript (Note this emulator currently has a bug: INC, which increments an index register, affects the carry flag, when in reality it should not.)
Datasheet Intel 4004
Datasheet Intel MCS-4
BuscomV2p1 schematic
MSC-4 Assembly Language Programming Manual
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Cannon Lake
Goldmont
14 nm
Goldmont
Goldmont Plus
Future
14 nm
Cascade Lake
Whiskey Lake
10 nm
Ice Lake
Tiger Lake
7 nm or 10 nm
Sapphire Rapids
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Hyper-V
From Wikipedia, the free encyclopedia
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This article needs to be updated. Please update this article to reflect recent events or newly available information. (October 2015)
Hyper-V
A component of Windows Server
Details
Type
Native hypervisor
Included with
Windows Server 2008 and later
Select editions of Windows 8 and later
Replaces
Windows Virtual PC
Related components
App-V, MED-V, Remote Desktop Connection
Microsoft Hyper-V, codenamed Viridian[1] and formerly known as Windows Server Virtualization, is a native hypervisor; it can create virtual machines on x86-64 systems running Windows.[2] Starting with Windows 8, Hyper-V superseded Windows Virtual PC as the hardware virtualization component of the client editions of Windows NT. A server computer running Hyper-V can be configured to expose individual virtual machines to one or more networks.
Hyper-V was first released alongside Windows Server 2008, and has been available without additional charge for all the Windows Server and Windows 8 and later. A standalone Windows Hyper-V Server is free, but with command line interface only.
Contents
[hide]
1 History
1.1 Hyper-V Server
2 Architecture
3 System requirements
3.1 Microsoft Hyper-V Server
4 Supported guests
4.1 Windows Server 2008 R2
4.2 Linux support
4.3 Windows Server 2012
5 Backward compatibility
6 Limitations
6.1 Audio/Sound
6.2 Optical drives pass-through
6.3 Graphics issues on the host
6.4 Live migration
6.5 Degraded performance for Windows XP VMs
6.6 NIC teaming
6.7 Administration tools
6.8 VT-x handling
7 Client operating systems
8 Features added per version
8.1 Windows Server 2012
8.2 Windows Server 2012 R2
8.3 Windows Server 2016
9 See also
10 References
11 Further reading
12 External links
History[edit]
A beta version of Hyper-V was shipped with certain x86-64 editions of Windows Server 2008. The finalized version was released on June 26, 2008 and was delivered through Windows Update.[3] Hyper-V has since been released with every version of Windows Server.[4][5][6]
Microsoft provides Hyper-V through two channels:
Part of Windows: Hyper-V is an optional component of Windows Server 2008 and later. It is also available in x64 SKUs of Pro and Enterprise editions of Windows 8, Windows 8.1 and Windows 10.
Hyper-V Server: It is a freeware edition of Windows Server with limited functionality and Hyper-V component.[7]
Hyper-V Server[edit]
Hyper-V Server 2008 was released on October 1, 2008. It consists of Windows Server 2008 Server Core and Hyper-V role; other Windows Server 2008 roles are disabled, and there are limited Windows services.[8] Hyper-V Server 2008 is limited to a command-line interface used to configure the host OS, physical hardware, and software. A menu driven CLI interface and some freely downloadable script files simplify configuration. In addition, Hyper-V Server supports remote access via Remote Desktop Connection. However, administration and configuration of the host OS and the guest virtual machines is generally done over the network, using either Microsoft Management Consoles on another Windows computer or System Center Virtual Machine Manager. This allows much easier "point and click" configuration, and monitoring of the Hyper-V Server.
Hyper-V Server 2008 R2 (an edition of Windows Server 2008 R2) was made available in September 2009 and includes Windows PowerShell v2 for greater CLI control. Remote access to Hyper-V Server requires CLI configuration of network interfaces and Windows Firewall. Also using a Windows Vista PC to administer Hyper-V Server 2008 R2 is not fully supported.
Architecture[edit]
Hyper-V architecture
Hyper-V implements isolation of virtual machines in terms of a partition. A partition is a logical unit of isolation, supported by the hypervisor, in which each guest operating system executes. There must be at least one parent partition in a hypervisor instance, running a supported version of Windows Server (2008 and later). The virtualization software runs in the parent partition and has direct access to the hardware devices. The parent partition creates child partitions which host the guest OSs. A parent partition creates child partitions using the hypercall API, which is the application programming interface exposed by Hyper-V.[9]
A child partition does not have access to the physical processor, nor does it handle its real interrupts. Instead, it has a virtual view of the processor and runs in Guest Virtual Address, which, depending on the configuration of the hypervisor, might not necessarily be the entire virtual address space. Depending on VM configuration, Hyper-V may expose only a subset of the processors to each partition. The hypervisor handles the interrupts to the processor, and redirects them to the respective partition using a logical Synthetic Interrupt Controller (SynIC). Hyper-V can hardware accelerate the address translation of Guest Virtual Address-spaces by using second level address translation provided by the CPU, referred to as EPT on Intel and RVI (formerly NPT) on AMD.
Child partitions do not have direct access to hardware resources, but instead have a virtual view of the resources, in terms of virtual devices. Any request to the virtual devices is redirected via the VMBus to the devices in the parent partition, which will manage the requests. The VMBus is a logical channel which enables inter-partition communication. The response is also redirected via the VMBus. If the devices in the parent partition are also virtual devices, it will be redirected further until it reaches the parent partition, where it will gain access to the physical devices. Parent partitions run a Virtualization Service Provider (VSP), which connects to the VMBus and handles device access requests from child partitions. Child partition virtual devices internally run a Virtualization Service Client (VSC), which redirect the request to VSPs in the parent partition via the VMBus. This entire process is transparent to the guest OS.
Virtual devices can also take advantage of a Windows Server Virtualization feature, named Enlightened I/O, for storage, networking and graphics subsystems, among others. Enlightened I/O is a specialized virtualization-aware implementation of high level communication protocols, like SCSI, that allows bypassing any device emulation layer and takes advantage of VMBus directly. This makes the communication more efficient, but requires the guest OS to support Enlightened I/O.
Currently only the following operating systems support Enlightened I/O, allowing them therefore to run faster as guest operating systems under Hyper-V than other operating systems that need to use slower emulated hardware:
Windows Server 2008 and later
Windows Vista and later
Linux with a 3.4 or later kernel[10]
FreeBSD[11]
System requirements[edit]
See also: Windows Server 2008 § System requirements
Host operating system:
The Hyper-V role is only available in the x64 variants of Windows Server 2008, Windows Server 2008 R2 Standard, Enterprise or Datacenter edition, Windows Server 2012 Standard or Datacenter edition, Windows 8 (or 8.1) Pro or Enterprise edition, or Windows 10 Pro, Education or Enterprise edition.
It can be installed regardless of whether the installation is a full or core installation.
Processor:
An x86-64 processor
Hardware-assisted virtualization support: This is available in processors that include a virtualization option; specifically, Intel VT or AMD Virtualization (AMD-V, formerly code-named "Pacifica").
An NX bit-compatible CPU must be available and Hardware Data Execution Prevention (DEP) must be enabled.
Although this is not an official requirement, Windows Server 2008 R2 and a CPU with second-level address translation support are recommended for workstations.[12]
Second-level address translation is a mandatory requirement for Hyper-V in Windows 8.[13]
Memory
Minimum 2 GB. (Each virtual machine requires its own memory, and so realistically much more.)
Minimum 4 GB if run on Windows 8
Windows Server 2008 Standard (x64) Hyper-V full GUI or Core supports up to 31 GB of memory for running VMs, plus 1 GB for the Hyper-V parent OS.[14]
Maximum total memory per system for Windows Server 2008 R2 hosts: 32 GB (Standard) or 2 TB (Enterprise, Datacenter).[15]
Maximum total memory per system for Windows Server 2012 hosts: 4 TB.
Guest operating systems:
Hyper-V in Windows Server 2008 and 2008 R2 supports virtual machines with up to 4 processors each (1, 2, or 4 processors depending on guest OS-see below)
Hyper-V in Windows Server 2012 supports virtual machines with up to 64 processors each.
Hyper-V in Windows Server 2008 and 2008 R2 supports up to 384 VMs per system[16]
Hyper-V in Windows Server 2012 supports up to 1024 active virtual machines per system.
Hyper-V in Windows Server 2016 supports up to 8000 active virtual machines per cluster and per node.[17]
Hyper-V supports both 32-bit (x86) and 64-bit (x64) guest VMs.
Microsoft Hyper-V Server[edit]
The stand-alone Hyper-V Server variant does not require an existing of Windows Server 2008 nor Windows Server 2008 R2. The standalone installation is called Microsoft Hyper-V Server for the non-R2 version and Microsoft Hyper-V Server 2008 R2. Microsoft Hyper-V Server is built with components of Windows and has a Windows Server Core user experience. None of the other roles of Windows Server are available in Microsoft Hyper-V Server. This version supports up to 64 VMs per system.[18] System requirements of Microsoft Hyper-V Server are the same for supported guest operating systems and processor, but differ in the following:[19]
RAM: Minimum: 1 GB RAM; Recommended: 2 GB RAM or greater; Maximum 1 TB.
Available disk space: Minimum: 8 GB; Recommended: 20 GB or greater.
Hyper-V Server 2012 R2 has the same capabilities as the standard Hyper-V role in Windows Server 2012 R2 and supports 1024 active VMs.[20]
Supported guests[edit]
Windows Server 2008 R2[edit]
The following table lists supported guest operating systems on Windows Server 2008 R2 SP1.[21]
Guest operating system
Virtual CPUs
OS
Editions
Number
Architecture
Windows Server 2012[a] Hyper-V, Standard, Datacenter 1–4 x86-64
Windows Home Server 2011 Standard 1–4 x86-64
Windows Server 2008 R2 SP1 Web, Standard, Enterprise, Datacenter 1–4 x86-64
Windows Server 2008 SP2 Web, Standard, Enterprise, Datacenter 1–4 IA-32, x86-64
Windows Server 2003 R2 SP2 Web,[b] Standard, Enterprise, Datacenter 1 or 2 IA-32, x86-64
Windows 2000 SP4 Professional, Server, Advanced Server 1 IA-32
Windows 7 Professional, Enterprise, Ultimate 1–4 IA-32, x86-64
Windows Vista Business, Enterprise, Ultimate 1–4 IA-32, x86-64
Windows XP SP3 Professional 1 or 2 IA-32, x86-64
SUSE Linux Enterprise Server 10 SP4 or 11 SP1–SP3 N/A 1–4 IA-32, x86-64
Red Hat Enterprise Linux 5.5–7.0 N/A 1–4 IA-32, x86-64
CentOS 5.5–7.5 N/A 1–4 IA-32, x86-64
Ubuntu 12.04–18.04 N/A 1–4 IA-32, x86-64
Debian 7.0 N/A 1–4 IA-32, x86-64
Oracle Linux 6.4 Red Hat Compatible Kernel 1–4 IA-32, x86-64
Jump up ^ Windows Server 2012 is supported and runs only on a host system Windows Server 2008 R2 RTM or SP1, with a hotfix applied.
Jump up ^ Web edition does not have an x64 version.
Fedora 8 or 9 are unsupported; however, they have been reported to run.[21][22][23][24]
Third-party support for FreeBSD 8.2 and later guests is provided by a partnership between NetApp and Citrix.[25] This includes both emulated and paravirtualized modes of operation, as well as several HyperV integration services.[26]
Windows 10 Home does not support Hyper-V.[27]
Desktop virtualization (VDI) products from third-party companies (such as Quest Software vWorkspace, Citrix XenDesktop, Systancia AppliDis Fusion[28] and Ericom PowerTerm WebConnect) provide the ability to host and centrally manage desktop virtual machines in the data center while giving end users a full PC desktop experience.
Guest operating systems with Enlightened I/O and a hypervisor-aware kernel such as Windows Server 2008 and later server versions, Windows Vista SP1 and later clients and offerings from Citrix XenServer and Novell will be able to use the host resources better since VSC drivers in these guests communicate with the VSPs directly over VMBus.[29] Non-"enlightened" operating systems will run with emulated I/O;[30] however, integration components (which include the VSC drivers) are available for Windows Server 2003 SP2, Windows Vista SP1 and Linux to achieve better performance. Xen-enabled Linux guest distributions can also be paravirtualized in Hyper-V. As of 2013[update] Microsoft officially supports only SUSE Linux Enterprise Server 10 SP1/SP2 x86 and x64 Editions in this way,[31] though any Xen-enabled Linux should be able to run. In February 2008, Red Hat and Microsoft signed a virtualization pact for hypervisor interoperability with their respective server operating systems, to enable Red Hat Enterprise Linux 5 to be officially supported on Hyper-V.[32]
Linux support[edit]
In July 2009, Microsoft submitted Hyper-V drivers to the kernel, which improve the performance of virtual Linux guest systems in a Windows hosted environment. Microsoft was forced to submit the code when it was discovered that Microsoft had incorporated a Hyper-V network driver with GPL-licensed components statically linked to closed-source binaries.[33] Hyper-V provides basic virtualization support for Linux guests out of the box. Paravirtualization support is, however, available by installing the Linux Integration Components or Satori InputVSC drivers. On July 20, 2009, Microsoft submitted these drivers for inclusion in the Linux kernel under the terms of the GPL,[34] so that kernels from 2.6.32 may include inbuilt Hyper-V paravirtualization support.
Windows Server 2012[edit]
Hyper-V in Windows Server 2012 and Windows Server 2012 R2 changes the support list above as follows:[35]
Hyper-V in Windows Server 2012 adds support for Windows 8.1 (up to 32 CPUs) and Windows Server 2012 R2 (64 CPUs); Hyper-V in Windows Server 2012 R2 adds support for Windows 10 (32 CPUs) and Windows Server 2016 (64 CPUs).
Minimum supported version of CentOS is 6.0.
Minimum supported version of Red Hat Enterprise Linux is 5.7.
Maximum number of supported CPUs for Windows Server and Linux operating systems is increased from four to 64.
Backward compatibility[edit]
Hyper-V, like Microsoft Virtual Server and Windows Virtual PC, saves each guest OS to a single virtual hard disk file. It supports the older .vhd format, as well as the newer .vhdx. Older .vhd files from Virtual Server 2005, Virtual PC 2004 and Virtual PC 2007 can be copied and used in Hyper-V, but any old virtual machine integration software (equivalents of Hyper-V Integration Services) must be removed from the virtual machine. After the migrated guest OS is configured and started using Hyper-V, the guest OS will detect changes to the (virtual) hardware. Installing "Hyper-V Integration Services" installs five services to improve performance, at the same time adding the new guest video and network card drivers.
Limitations[edit]
Audio/Sound[edit]
Hyper-V does not virtualize audio hardware. Before Windows 8.1 and Windows Server 2012 R2, it was possible to work around this issue by connecting to the virtual machine with Remote Desktop Connection over a network connection and use its audio redirection feature.[36][37] Windows 8.1 and Windows Server 2012 R2 add the enhanced session mode which provides redirection without a network connection.[38]
Optical drives pass-through[edit]
Optical drives virtualized in the guest VM are read-only.[39] Officially Hyper-V does not support the host/root operating system's optical drives to pass-through in guest VMs. As a result, burning to discs, audio CDs, video CD/DVD-Video playback are not supported; however, a workaround exists using the iSCSI protocol. Setting up an iSCSI target on the host machine with the optical drive can then be talked to by the standard Microsoft iSCSI initiator. Microsoft produces their own iSCSI Target software or alternative third party products can be used.[40]
Graphics issues on the host[edit]
On CPUs without Second Level Address Translation, installation of most WDDM accelerated graphics drivers on the primary OS will cause a dramatic drop in graphic performance. This occurs because the graphics drivers access memory in a pattern that causes the Translation lookaside buffer to be flushed frequently.[12]
In Windows Server 2008, Microsoft officially supported Hyper-V only with the default VGA drivers,[41] which do not support Windows Aero, higher resolutions, rotation, or multi-monitor display. However, unofficial workarounds were available in certain cases. Older non-WDDM graphics drivers sometimes did not cause performance issues, though these drivers did not always install smoothly on Windows Server. Intel integrated graphics cards did not cause TLB flushing even with WDDM drivers.[42] Some NVidia graphics drivers did not experience problems so long as Windows Aero was turned off and no 3D applications were running.[12]
In Windows Server 2008 R2, Microsoft added support for Second Level Address Translation to Hyper-V. Since SLAT is not required to run Hyper-V with Windows Server,[43] the problem will continue to occur if a non-SLAT CPU is used with accelerated graphics drivers. However, SLAT is required to run Hyper-V on client versions of Windows 8.[44]
Live migration[edit]
Hyper-V in Windows Server 2008 does not support "live migration" of guest VMs (where "live migration" is defined as maintaining network connections and uninterrupted services during VM migration between physical hosts). Instead, Hyper-V on Server 2008 Enterprise and Datacenter Editions supports "quick migration", where a guest VM is suspended on one host and resumed on another host. This operation happens in the time it takes to transfer the active memory of the guest VM over the network from the first host to the second host.[45]
However, with the release of Windows Server 2008 R2, live migration is supported with the use of Cluster Shared Volumes (CSVs). This allows for failover of an individual VM as opposed to the entire host having to failover (it seems that when a node (Hyper-V server, not a VM) fails then each "VM running on the failed node" may migrate to other live nodes independently of "other VMs on the same LUN running on other nodes that share the LUN with the failed node". In Hyper-V we are clustering the Hyper-V nodes not the VMs.). See also Cluster Shared Volumes.
Windows Server 2012's implementation of Hyper-V (Version 3.0) introduced many new features to increase VM mobility, including the ability to execute simultaneous live migrations (Windows Server 2008 R2 only supported live migrating a single VM at a time, significantly increasing the time required to carry administrative tasks, such as draining a node for scheduled maintenance). The only real limiting factor here is hardware and network bandwidth available. Windows Server 2012 also supports a new "shared nothing live migration" option, where no traditional shared storage is required in order to complete a migration. Also referred to as “Live System Migration”, a shared nothing live migration will move a running VM and its storage from one Hyper-V host to another without any perceived downtime. Live Migration between different host OS versions is not possible, although this is soon to be addressed in Windows Server 2012 R2.
Windows Server 2012 also introduced the ability to use simple SMB shares as a shared storage option (in conjunction with the new Scale out File Services role in Server 2012 for highly available environments), alleviating the need for expensive SANs. This is particularly useful for low budget environments, without the need to sacrifice performance due to the many new improvements to the SMB3 stack. Windows Server 2012 will fully support the live migration of VMs running on SMB shares, whether it be a live or live system migration.
Hyper-V under Windows Server 2012 also supports the ability to migrate a running VM's storage, whereby an active Virtual Machines storage can be moved from one infrastructure to another without the VM's workload being affected, further reducing the limitations associated with VM mobility.
With the introduction of Windows Server 2012 R2, SMB 3.0 was introduced as a transport option for Live Migration, either between clustered or non-clustered virtualization hosts. This enables Hyper-V Live Migration to leverage the additional benefits that SMB 3.0 brings, such as SMB Multichannel and SMB Direct (in conjunction with RDMA NICs) for increased Live Migration performance.
Degraded performance for Windows XP VMs[edit]
Windows XP frequently accesses CPU's APIC task-priority register (TPR) when interrupt request level changes, causing a performance degradation when running as guests on Hyper-V.[46] Microsoft has fixed this problem in Windows Server 2003 and later.[46]
Intel adds TPR virtualization (FlexPriority) to VT-x on Intel Core 2 stepping E onwards to alleviate this problem.[47] AMD has a similar feature on AMD-V but uses a new register for the purpose. This however means that the guest has to use different instructions to access this new register. AMD provides a driver called "AMD-V Optimization Driver" that has to be installed on the guest to do that.[48]
NIC teaming[edit]
Network card teaming or link aggregation isn't supported if the NIC manufacturer supplied drivers support NIC teaming.[49] However, Windows Server 2012 and thus the version of Hyper-V included with it supports software NIC teaming.[50]
Administration tools[edit]
Hyper-V management tools are not compatible with Windows Vista Home Basic or Home Premium[51][51] or Windows 7 Home Premium, Home Basic or Starter.
Hyper-V 2012 can only be managed by Windows 8, Windows Server 2012 or their successors.
VT-x handling[edit]
Hyper-V uses the VT-x x86 virtualization. Since Hyper-V is a native hypervisor, as long as it is installed, third-party software cannot use VT-x. For instance, the HAXM Android device emulator (used by Android Studio or Microsoft Visual Studio) cannot run while Hyper-V is installed.[52]
Client operating systems[edit]
64-bit SKUs of Windows 8 Pro or Enterprise, or later, come with a special version Hyper-V called Client Hyper-V.[53]
Features added per version[edit]
Windows Server 2012[edit]
Windows Server 2012 introduced many new features in Hyper-V.[6]
Hyper-V Extensible Virtual Switch[54][55]
Network virtualization[54]
Multi-tenancy
Storage Resource Pools
.vhdx disk format supporting virtual hard disks as large as 64 TB[56] with power failure resiliency
Virtual Fibre Channel
Offloaded data transfer
Hyper-V replica[57]
Cross-premises connectivity
Cloud backup
Windows Server 2012 R2[edit]
With Windows Server 2012 R2 Microsoft introduced another set of new features.[58]
Shared virtual hard disk[59]
Storage quality of service[60]
Virtual machine generation[61]
Enhanced session mode[62]
Automatic virtual machine activation[63]
Windows Server 2016[edit]
Hyper-V in Windows Server 2016 and Windows 10 adds[64]
Nested virtualization[65] (Intel processors only, both the host and guest instances of Hyper-V must be Windows Server 2016 or Windows 10 or later)
Windows containers (to achieve isolation at the app level rather than the OS level)
Shielded VMs using remote attestation servers
Monitoring of host CPU resource utilization by guests and protection (limiting CPU usage by guests)
See also[edit]
Comparison of platform virtualization software
Features new to Windows 8
Virtual disk image
Microsoft Open Specification Promise
Microsoft Remote Web Workplace
Virtual private server
References[edit]
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^ Jump up to: a b "Server Virtualization Features". Microsoft. Retrieved October 5, 2012.
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^ Jump up to: a b "About Virtual Machines and Guest Operating Systems". TechNet. Microsoft. Retrieved 2016-05-09.
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Jump up ^ Sheinberg, Brian (2008-02-08). "First Look: Fedora 9 Alpha, Running in Hyper-V Beta". Crn.com. Archived from the original on 2010-07-23. Retrieved 2012-10-07.
Jump up ^ "Install Ubuntu 7.10 on Hyper-V". Haiders.net. 2008-04-04. Retrieved 2012-10-07.
Jump up ^ "Available Today: FreeBSD Support for Windows Server Hyper-V". Openness@Microsoft. 2012-08-09. Retrieved 2014-05-25.
Jump up ^ "HyperV - FreeBSD Wiki". freebsd.org. Retrieved 2014-05-25.
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Jump up ^ "Microsoft Windows Server 2008 – Hyper-V solution overview - Gabe Knuth". BrianMadden.com. Retrieved 2012-10-07.
Jump up ^ Stevens, Alan (2008-02-27). "Microsoft's Hyper-V: why all the fuss?". ZDNet. CBS Interactive. Retrieved 2012-10-07.
Jump up ^ Babcock, Charles (2008-04-24). "Microsoft Hyper-V To Flaunt Advanced Virtualization Features". Informationweek.com. Retrieved 2012-10-07.
Jump up ^ Foley, Mary Jo (2009-02-16). "Microsoft and Red Hat sign virtualization pact". ZDNet. CBS Interactive. Retrieved 2012-10-07.
Jump up ^ Foley, Mary Jo (2009-07-22). "Pigs are flying low: Why Microsoft open-sourced its Linux drivers". ZDNet. CBS Interactive.
Jump up ^ Ramji, Sam; Hanrahan, Tom (2009-07-20). "Microsoft Contributes Linux Drivers to Linux Community". News Center. Microsoft. Retrieved 2010-03-02.
Jump up ^ "Hyper-V Overview". TechNet. Microsoft. Retrieved October 5, 2012.
Jump up ^ Otey, Michael (24 June 2008). "Guest VM Audio Support under Hyper-V". Windows IT Pro. Penton Media. Retrieved 21 September 2014.
Jump up ^ "Enable Audio in Windows 2008 guest machines running on HyperV". Akshat's Blog. Microsoft. 7 April 2011. Retrieved 21 September 2014.
Jump up ^ Gear, Gavin (5 December 2013). "Overview: Client Hyper-V Enhanced Session Mode in Windows 8.1". Blogging Windows. Microsoft. Retrieved 21 September 2014.
Jump up ^ Cook, John Paul. "DVD writer on Hyper-V server". TechNet Forums. Microsoft. Retrieved 2012-10-07.
Jump up ^ "Using Full DVD/CD Writing Capabilities in a Hyper-V VM | Mark Gilbert's Blog". Mark-gilbert.co.uk. 2012-09-05. Retrieved 2015-01-18.
Jump up ^ "Video performance may decrease when a Windows Server 2008 or Windows Server 2008 R2 based computer has the Hyper-V role enabled and an accelerated display adapter installed". Support.microsoft.com. 2010-11-22. Retrieved 2012-10-07.
Jump up ^ Armstrong, Ben. "Hyper-V versus Desktop Computing".
Jump up ^ Finn, Aidan. "Windows Server 2012 Hyper-V DOES NOT Require SLAT (EPT/NPT) Capable Processors".
Jump up ^ Brodkin, Jon (2011-09-07). "Hyper-V coming to Windows 8—with new hardware virtualization requirement". Ars Technica.
Jump up ^ "Hyper-V Live Migration vs. Quick Migration". Virtualization Team. 2008-09-29. Retrieved 2012-10-07.
^ Jump up to: a b "Degraded I/O Performance using a Windows XP Virtual Machine with Windows Server 2008 Hyper-V". Microsoft TechNet. Microsoft. 5 March 2010. Retrieved 28 August 2013.
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^ Jump up to: a b "Install and Configure Hyper-V Tools for Remote Administration". TechNet. Microsoft. Retrieved 2012-10-07.
Jump up ^ Syrewicze, Andy (October 2, 2013). "VMware vs. Hyper-V: Architectural Differences". http://syrewiczeit.com. Self-published. Archived from the original on 25 Feb 2018. External link in |website= (help)
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Jump up ^ Reseller, Mike. "Hyper-V Replica in depth". Veeam Software.
Jump up ^ "What's New in Hyper-V for Windows Server 2012 R2". technet.microsoft.com. Retrieved 2016-04-26.
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Jump up ^ "What's New in Hyper-V for Windows Server 2012 R2". technet.microsoft.com. Retrieved 2016-04-26.
Jump up ^ "What's New in Hyper-V for Windows Server 2012 R2". technet.microsoft.com. Retrieved 2016-04-26.
Jump up ^ "What's New in Hyper-V for Windows Server 2012 R2". technet.microsoft.com. Retrieved 2016-04-26.
Jump up ^ "What's New in Hyper-V for Windows Server 2012 R2". technet.microsoft.com. Retrieved 2016-04-26.
Jump up ^ "What's new in Hyper-V on Windows Server 2016". Retrieved 2017-10-27.
Jump up ^ "Run Hyper-V in a Virtual Machine with Nested Virtualization". Retrieved 2017-10-27.
Further reading[edit]
"Hypervisor Top Level Functional Specification". Microsoft. 2016. Retrieved 2017-04-04.
Koens, Dimitri (2013). "Hyper-V Quick Reference" (PDF). Dimension IT TV. Retrieved 2017-04-04.
Howard, John (2006). "WinHEC 2006 Presentation slides". Virtualization Blog. Microsoft. Retrieved 2017-04-04.
Radzikowski, Przemek (2009). "Benchmarking Hyper-V on Windows Server 2008 R2 x64". Retrieved 2017-04-04.
Posey, Brien; Zerger, Pete; Henley, Chris (2013). The Hands-on Guide: Understanding Hyper-V in Windows Server 2012. Veeam Software. Retrieved 2017-04-04.
External links[edit]
Wikiversity has learning resources about Hyper-V
Official website
Virtualization Fabric Design Considerations Guide
Hyper-V on Microsoft TechNet
Benchmarking Hyper-V on Windows Server 2008 R2 x64
Hyper-V Architecture
Hyper-V Architecture (German)
Hyper-V CPU Requirements (German)
Details about Cluster Shared Volume (German)
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external text
https://d-nb.info/gnd/7658475-6

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/wiki/Hyper-V
View the content page [ctrl-alt-c]
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Hyper-V – Czech
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https://de.wikipedia.org/wiki/Hyper-V
Hyper-V – German
de
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https://et.wikipedia.org/wiki/Hyper-V
Hyper-V – Estonian
et
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values:
https://es.wikipedia.org/wiki/Hyper-V
Hyper-V – Spanish
es
es
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values:
https://fr.wikipedia.org/wiki/Hyper-V
Hyper-V – French
fr
fr
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https://ja.wikipedia.org/wiki/Hyper-V
Hyper-V – Japanese
ja
ja
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https://pl.wikipedia.org/wiki/Hyper-V
Hyper-V – Polish
pl
pl
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https://pt.wikipedia.org/wiki/Hyper-V
Hyper-V – Portuguese
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https://ro.wikipedia.org/wiki/Hyper-V
Hyper-V – Romanian
ro
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https://ru.wikipedia.org/wiki/Hyper-V
Hyper-V – Russian
ru
ru
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values:
https://sk.wikipedia.org/wiki/Hyper-V
Hyper-V – Slovak
sk
sk
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values:
https://tr.wikipedia.org/wiki/Hyper-V
Hyper-V – Turkish
tr
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https://vi.wikipedia.org/wiki/Hyper-V
Hyper-V – Vietnamese
vi
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Hyper-V – Yiddish
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