#include "cstdio"
#include <iostream>
#include <chrono>

constexpr size_t SIZE = 16384 * 3; // 16384 * 3
constexpr size_t BLOCK_COUNT = 4096; //for shared alg 16384 * 3 for simple
constexpr size_t BLOCK_SIZE = SIZE / BLOCK_COUNT;
constexpr size_t THREAD_PER_BLOCK = 128;


/*
 * GPU Elapsed time 23.9948
 * CPU Elapsed time 6720
 */

template<typename T>
__global__ void sumMatrixRowSharedOpt(T* matrix, T* result)
{
  __shared__ float data[THREAD_PER_BLOCK];
  for(size_t row_num = BLOCK_SIZE * blockIdx.x;
      row_num < BLOCK_SIZE * (blockIdx.x + 1); row_num++) {
    size_t row_start = row_num * SIZE;
    size_t idx = threadIdx.x;
    data[idx] = matrix[row_start + idx];
    for (size_t i=1; i * THREAD_PER_BLOCK + idx < SIZE; i++)
    {
      data[idx] = data[idx] + matrix[row_start + i * THREAD_PER_BLOCK + idx];
    }
    __syncthreads();
    for (size_t s = blockDim.x / 2; s > 0; s/=2)
    {
      if (idx < s)
      {
        data [idx] += data [idx + s];
      }
      __syncthreads();
    }
    if (idx == 0)
      result[row_num] = data[0];
  }
}

template <typename T>
void sumMatrixRowCPU(const float* matrix, T* result)
{
  for(int idx = 0; idx < SIZE; idx++)
  {
    result[idx] = 0;
    for(size_t i=0; i < SIZE; i++)
    {
      result[idx] = result[idx] + matrix[idx * SIZE + i];
    }
  }
}

__host__ int main()
{
  //Выделяем память под вектора
  auto* matrix = new float[SIZE * SIZE];
  auto* result = new float[SIZE];
  auto* result_1 = new float[SIZE];
  //Инициализируем значения векторов
  for (int i = 0; i < SIZE * SIZE; i++)
  {
    matrix[i] = int(i/SIZE);
    result[i%SIZE] = 0;
    result_1[i%SIZE] = 0;
  }

  float* gpu_matrix;
  float* gpu_result;
  //Выделяем память для векторов на видеокарте
  cudaMalloc((void**)&gpu_matrix, sizeof(float) * SIZE * SIZE);
  cudaMalloc((void**)&gpu_result, sizeof(float) * SIZE);
  cudaMemcpy(gpu_matrix, matrix, sizeof(float) * SIZE * SIZE, cudaMemcpyHostToDevice);
  cudaMemcpy(gpu_result, result, sizeof(float) * SIZE, cudaMemcpyHostToDevice);

  dim3 gridSize = dim3(BLOCK_COUNT, 1, 1); //Размер используемой сетки
  dim3 blockSize = dim3(THREAD_PER_BLOCK, 1, 1); //Размер используемого блока
  //Выполняем вызов функции ядра

  cudaEvent_t kernel_start;
  cudaEventCreate(&kernel_start);
  cudaEventRecord(kernel_start, nullptr);

  sumMatrixRowSharedOpt<<<gridSize, blockSize>>>(gpu_matrix, gpu_result);

  cudaEvent_t syncEvent; //Дескриптор события
  cudaEventCreate(&syncEvent); //Создаем event
  cudaEventRecord(syncEvent, nullptr); //Записываем event
  cudaEventSynchronize(syncEvent); //Синхронизируем event
  float time;
  cudaEventElapsedTime(&time, kernel_start, syncEvent);

  cudaMemcpy(result, gpu_result, sizeof(float) * SIZE, cudaMemcpyDeviceToHost);

  std::cout << "GPU Elapsed time " << time << std::endl;

  auto t1 = std::chrono::high_resolution_clock::now();
  sumMatrixRowCPU(matrix, result_1);
  auto t2 = std::chrono::high_resolution_clock::now();

  std::cout << "CPU Elapsed time " << std::chrono::duration_cast<std::chrono::milliseconds>(t2 - t1).count() <<std::endl;

  for (int i = 0; i < 10; i++)
  {
    printf("Element #%i: %.1f %1.f\n", i , result[i], result_1[i]);
  }


  // Освобождаем ресурсы
  cudaEventDestroy(syncEvent);
  cudaFree(gpu_matrix);
  cudaFree(gpu_result);
  delete[] result;
  delete[] matrix;
}

	.file	"tmpxft_00289a9f_00000000-6_lab3_2.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3742:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3742:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text._Z21sumMatrixRowSharedOptIfEvPT_S1_,"axG",@progbits,_Z21sumMatrixRowSharedOptIfEvPT_S1_,comdat
	.weak	_Z21sumMatrixRowSharedOptIfEvPT_S1_
	.type	_Z21sumMatrixRowSharedOptIfEvPT_S1_, @function
_Z21sumMatrixRowSharedOptIfEvPT_S1_:
.LFB4094:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	leaq	24(%rsp), %rdx
	movq	%rsi, 16(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21sumMatrixRowSharedOptIfEvPT_S1_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4094:
	.size	_Z21sumMatrixRowSharedOptIfEvPT_S1_, .-_Z21sumMatrixRowSharedOptIfEvPT_S1_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3737:
	.cfi_startproc
	endbr64
.L8:
	jmp	.L8
	.cfi_endproc
.LFE3737:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z21sumMatrixRowSharedOptIfEvPT_S1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3767:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z21sumMatrixRowSharedOptIfEvPT_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3767:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "cstdio"
#include <iostream>
#include <chrono>

constexpr size_t SIZE = 16384 * 3; // 16384 * 3
constexpr size_t BLOCK_COUNT = 4096; //for shared alg 16384 * 3 for simple
constexpr size_t BLOCK_SIZE = SIZE / BLOCK_COUNT;
constexpr size_t THREAD_PER_BLOCK = 128;


/*
 * GPU Elapsed time 23.9948
 * CPU Elapsed time 6720
 */

template<typename T>
__global__ void sumMatrixRowSharedOpt(T* matrix, T* result)
{
  __shared__ float data[THREAD_PER_BLOCK];
  for(size_t row_num = BLOCK_SIZE * blockIdx.x;
      row_num < BLOCK_SIZE * (blockIdx.x + 1); row_num++) {
    size_t row_start = row_num * SIZE;
    size_t idx = threadIdx.x;
    data[idx] = matrix[row_start + idx];
    for (size_t i=1; i * THREAD_PER_BLOCK + idx < SIZE; i++)
    {
      data[idx] = data[idx] + matrix[row_start + i * THREAD_PER_BLOCK + idx];
    }
    __syncthreads();
    for (size_t s = blockDim.x / 2; s > 0; s/=2)
    {
      if (idx < s)
      {
        data [idx] += data [idx + s];
      }
      __syncthreads();
    }
    if (idx == 0)
      result[row_num] = data[0];
  }
}

template <typename T>
void sumMatrixRowCPU(const float* matrix, T* result)
{
  for(int idx = 0; idx < SIZE; idx++)
  {
    result[idx] = 0;
    for(size_t i=0; i < SIZE; i++)
    {
      result[idx] = result[idx] + matrix[idx * SIZE + i];
    }
  }
}

__host__ int main()
{
  //Выделяем память под вектора
  auto* matrix = new float[SIZE * SIZE];
  auto* result = new float[SIZE];
  auto* result_1 = new float[SIZE];
  //Инициализируем значения векторов
  for (int i = 0; i < SIZE * SIZE; i++)
  {
    matrix[i] = int(i/SIZE);
    result[i%SIZE] = 0;
    result_1[i%SIZE] = 0;
  }

  float* gpu_matrix;
  float* gpu_result;
  //Выделяем память для векторов на видеокарте
  hipMalloc((void**)&gpu_matrix, sizeof(float) * SIZE * SIZE);
  hipMalloc((void**)&gpu_result, sizeof(float) * SIZE);
  hipMemcpy(gpu_matrix, matrix, sizeof(float) * SIZE * SIZE, hipMemcpyHostToDevice);
  hipMemcpy(gpu_result, result, sizeof(float) * SIZE, hipMemcpyHostToDevice);

  dim3 gridSize = dim3(BLOCK_COUNT, 1, 1); //Размер используемой сетки
  dim3 blockSize = dim3(THREAD_PER_BLOCK, 1, 1); //Размер используемого блока
  //Выполняем вызов функции ядра

  hipEvent_t kernel_start;
  hipEventCreate(&kernel_start);
  hipEventRecord(kernel_start, nullptr);

  sumMatrixRowSharedOpt<<<gridSize, blockSize>>>(gpu_matrix, gpu_result);

  hipEvent_t syncEvent; //Дескриптор события
  hipEventCreate(&syncEvent); //Создаем event
  hipEventRecord(syncEvent, nullptr); //Записываем event
  hipEventSynchronize(syncEvent); //Синхронизируем event
  float time;
  hipEventElapsedTime(&time, kernel_start, syncEvent);

  hipMemcpy(result, gpu_result, sizeof(float) * SIZE, hipMemcpyDeviceToHost);

  std::cout << "GPU Elapsed time " << time << std::endl;

  auto t1 = std::chrono::high_resolution_clock::now();
  sumMatrixRowCPU(matrix, result_1);
  auto t2 = std::chrono::high_resolution_clock::now();

  std::cout << "CPU Elapsed time " << std::chrono::duration_cast<std::chrono::milliseconds>(t2 - t1).count() <<std::endl;

  for (int i = 0; i < 10; i++)
  {
    printf("Element #%i: %.1f %1.f\n", i , result[i], result_1[i]);
  }


  // Освобождаем ресурсы
  hipEventDestroy(syncEvent);
  hipFree(gpu_matrix);
  hipFree(gpu_result);
  delete[] result;
  delete[] matrix;
}

	.text
	.file	"lab3_2.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_,"axG",@progbits,_Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_,comdat
	.weak	_Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_ # -- Begin function _Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_
	.type	_Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_,@function
_Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_: # @_Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21sumMatrixRowSharedOptIfEvPT_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_, .Lfunc_end1-_Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21sumMatrixRowSharedOptIfEvPT_S1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21sumMatrixRowSharedOptIfEvPT_S1_,@object # @_Z21sumMatrixRowSharedOptIfEvPT_S1_
	.section	.rodata._Z21sumMatrixRowSharedOptIfEvPT_S1_,"aG",@progbits,_Z21sumMatrixRowSharedOptIfEvPT_S1_,comdat
	.weak	_Z21sumMatrixRowSharedOptIfEvPT_S1_
	.p2align	3, 0x0
_Z21sumMatrixRowSharedOptIfEvPT_S1_:
	.quad	_Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_
	.size	_Z21sumMatrixRowSharedOptIfEvPT_S1_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z21sumMatrixRowSharedOptIfEvPT_S1_"
	.size	.L__unnamed_1, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__sumMatrixRowSharedOptIfEvPT_S1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z21sumMatrixRowSharedOptIfEvPT_S1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z21sumMatrixRowSharedOptIfEvPT_S1_,"axG",@progbits,_Z21sumMatrixRowSharedOptIfEvPT_S1_,comdat
	.protected	_Z21sumMatrixRowSharedOptIfEvPT_S1_ ; -- Begin function _Z21sumMatrixRowSharedOptIfEvPT_S1_
	.globl	_Z21sumMatrixRowSharedOptIfEvPT_S1_
	.p2align	8
	.type	_Z21sumMatrixRowSharedOptIfEvPT_S1_,@function
_Z21sumMatrixRowSharedOptIfEvPT_S1_:    ; @_Z21sumMatrixRowSharedOptIfEvPT_S1_
; %bb.0:
	v_add_co_u32 v1, s2, s15, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_11
; %bb.1:                                ; %.lr.ph38
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mul_hi_u32 v3, v1, 12
	v_mul_lo_u32 v2, v1, 12
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v12, 2, v0
	s_mul_hi_u32 s1, s15, 0x240000
	v_cmp_eq_u32_e64 s0, 0, v0
	s_mul_hi_u32 s9, s15, 12
	s_mul_i32 s8, s15, 12
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_bfe_u32 s2, s2, 0xf0001
	s_cmp_gt_u32 s3, 1
	s_mul_i32 s3, s15, 0x240000
	s_cselect_b32 s12, -1, 0
	s_add_u32 s3, s4, s3
	s_addc_u32 s1, s5, s1
	v_add_co_u32 v6, s3, s3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, null, s1, 0, s3
	v_add_co_u32 v4, s1, 0x80, v0
	v_add_co_u32 v6, vcc_lo, 0x200, v6
	v_add_co_ci_u32_e64 v5, null, 0, 0, s1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_mov_b32 s3, 0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;     Child Loop BB0_5 Depth 2
	s_mul_i32 s1, s9, 0xc000
	s_mul_hi_u32 s10, s8, 0xc000
	s_mul_i32 s11, s8, 0xc000
	s_add_i32 s10, s10, s1
	v_or_b32_e32 v8, s11, v0
	v_or_b32_e64 v9, s10, 0
	v_dual_mov_b32 v11, v7 :: v_dual_mov_b32 v10, v6
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v13, v[8:9], off
	v_dual_mov_b32 v9, v5 :: v_dual_mov_b32 v8, v4
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v14, v[10:11], off
	v_add_co_u32 v8, vcc_lo, 0x80, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	v_add_co_u32 v10, s1, 0x200, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v11, s1, 0, v11, s1
	v_cmp_lt_u64_e32 vcc_lo, 0xbfff, v[8:9]
	s_or_b32 s10, vcc_lo, s10
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v13, v13, v14
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_mov_b64 s[10:11], s[2:3]
	ds_store_b32 v12, v13
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_8
.LBB0_5:                                ; %.lr.ph34
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u64_e64 s[10:11], v[0:1]
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=2
	v_lshl_add_u32 v8, s10, 2, v12
	ds_load_b32 v8, v8
	ds_load_b32 v9, v12
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v8, v8, v9
	ds_store_b32 v12, v8
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_lt_u64_e64 s1, s[10:11], 2
	s_lshr_b64 s[10:11], s[10:11], 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_5
.LBB0_8:                                ; %._crit_edge35
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	ds_load_b32 v8, v1
	s_lshl_b64 s[10:11], s[8:9], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s10, s6, s10
	s_addc_u32 s11, s7, s11
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v8, s[10:11]
.LBB0_10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	v_add_co_u32 v6, s1, 0x30000, v6
	v_cmp_ge_u64_e32 vcc_lo, s[8:9], v[2:3]
	v_add_co_ci_u32_e64 v7, s1, 0, v7, s1
	s_cbranch_vccz .LBB0_2
.LBB0_11:                               ; %._crit_edge39
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21sumMatrixRowSharedOptIfEvPT_S1_
		.amdhsa_group_segment_fixed_size 512
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21sumMatrixRowSharedOptIfEvPT_S1_,"axG",@progbits,_Z21sumMatrixRowSharedOptIfEvPT_S1_,comdat
.Lfunc_end0:
	.size	_Z21sumMatrixRowSharedOptIfEvPT_S1_, .Lfunc_end0-_Z21sumMatrixRowSharedOptIfEvPT_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 608
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 512 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 512
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21sumMatrixRowSharedOptIfEvPT_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21sumMatrixRowSharedOptIfEvPT_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
