#include <iostream>

using namespace std;

__global__ void changeValue(int *val) {
    *val = 50;
}

__global__ void changeValueArr(int *val) {
    val[blockIdx.x] = 40;
}

template <typename DEFTYPE>
class CudaMemoryManagement {
private:
    DEFTYPE* arr_store[100];
    int arr_store_ctr;
public:
    CudaMemoryManagement() {
        this->arr_store_ctr = 0;
    }
    ~CudaMemoryManagement() {
        // Free memory here?
        for (int i = 0; i < arr_store_ctr; i++) {
            cudaFree(arr_store[i]);
        }
    }

    // Create memory area on GPU - side
    DEFTYPE* createMemory(DEFTYPE originalValue) {
        DEFTYPE* device_value;
        cudaMalloc((void **)&device_value, sizeof(DEFTYPE));
        cudaMemcpy(device_value, &originalValue, sizeof(DEFTYPE), cudaMemcpyHostToDevice);
        // Register to arr_store
        this->arr_store[arr_store_ctr++] = device_value;
        return device_value;
    }

    // Overload function for previous createMemory (For 1d array implementation)
    DEFTYPE* createMemory(DEFTYPE* originalValue, int length) {
        DEFTYPE* device_value;
        cudaMalloc((void **)&device_value, sizeof(DEFTYPE) * length);
        cudaMemcpy(device_value, &originalValue, sizeof(DEFTYPE) * length, cudaMemcpyHostToDevice);
        // Register to arr_store
        this->arr_store[arr_store_ctr++] = device_value;
        return device_value;
    }

    // Get the result from device_ptr(GPU's memory)
    void getResult(DEFTYPE *device_ptr, DEFTYPE *host_ptr) {
        cudaMemcpy(host_ptr, device_ptr, sizeof(DEFTYPE), cudaMemcpyDeviceToHost);
    }

    // Overload function for previous getResult (For 1d array implementation)
    void getResult(DEFTYPE *device_ptr, DEFTYPE *host_ptr, int length) {
        cudaMemcpy(host_ptr, device_ptr, sizeof(DEFTYPE) * length, cudaMemcpyDeviceToHost);
    }
};

int main(void) {
    CudaMemoryManagement<int> cmm;
    int arr_host[10];
    for (int i = 0; i < 10; i++) {
        arr_host[i] = rand()%10;
    }
    int *dev_arr = cmm.createMemory(arr_host, 10);
    changeValueArr<<<10, 1>>>(dev_arr);
    cmm.getResult(dev_arr, arr_host, 10);
    for (int i = 0; i < 10; i++) {
        cout << arr_host[i] << endl;
    }
    return 0;
}
	.file	"tmpxft_00219dd7_00000000-6_CudaMemoryManagement.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3644:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3644:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z31__device_stub__Z11changeValuePiPi
	.type	_Z31__device_stub__Z11changeValuePiPi, @function
_Z31__device_stub__Z11changeValuePiPi:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z11changeValuePi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L2:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z31__device_stub__Z11changeValuePiPi, .-_Z31__device_stub__Z11changeValuePiPi
	.globl	_Z11changeValuePi
	.type	_Z11changeValuePi, @function
_Z11changeValuePi:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z11changeValuePiPi
	.cfi_endproc
.LFE3667:
	.size	_Z11changeValuePi, .-_Z11changeValuePi
	.globl	_Z34__device_stub__Z14changeValueArrPiPi
	.type	_Z34__device_stub__Z14changeValueArrPiPi, @function
_Z34__device_stub__Z14changeValueArrPiPi:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z14changeValueArrPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L8:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z34__device_stub__Z14changeValueArrPiPi, .-_Z34__device_stub__Z14changeValueArrPiPi
	.globl	_Z14changeValueArrPi
	.type	_Z14changeValueArrPi, @function
_Z14changeValueArrPi:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z14changeValueArrPiPi
	.cfi_endproc
.LFE3669:
	.size	_Z14changeValueArrPi, .-_Z14changeValueArrPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z14changeValueArrPi"
.LC1:
	.string	"_Z11changeValuePi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3671:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14changeValueArrPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11changeValuePi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3671:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZN20CudaMemoryManagementIiED2Ev,"axG",@progbits,_ZN20CudaMemoryManagementIiED5Ev,comdat
	.align 2
	.weak	_ZN20CudaMemoryManagementIiED2Ev
	.type	_ZN20CudaMemoryManagementIiED2Ev, @function
_ZN20CudaMemoryManagementIiED2Ev:
.LFB3975:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3975
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 32
.L16:
	cmpl	%ebx, 800(%rbp)
	jle	.L19
	movq	0(%rbp,%rbx,8), %rdi
	incq	%rbx
	call	cudaFree@PLT
	jmp	.L16
.L19:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3975:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZN20CudaMemoryManagementIiED2Ev,"aG",@progbits,_ZN20CudaMemoryManagementIiED5Ev,comdat
.LLSDA3975:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3975-.LLSDACSB3975
.LLSDACSB3975:
.LLSDACSE3975:
	.section	.text._ZN20CudaMemoryManagementIiED2Ev,"axG",@progbits,_ZN20CudaMemoryManagementIiED5Ev,comdat
	.size	_ZN20CudaMemoryManagementIiED2Ev, .-_ZN20CudaMemoryManagementIiED2Ev
	.weak	_ZN20CudaMemoryManagementIiED1Ev
	.set	_ZN20CudaMemoryManagementIiED1Ev,_ZN20CudaMemoryManagementIiED2Ev
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3641:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3641
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	subq	$896, %rsp
	.cfi_def_cfa_offset 928
	movq	%fs:40, %rax
	movq	%rax, 888(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	leaq	40(%rsp), %rbp
	movl	%eax, 880(%rsp)
.L21:
	call	rand@PLT
	movl	$10, %ecx
	cltd
	idivl	%ecx
	movl	%edx, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$10, %rbx
	jne	.L21
	leaq	24(%rsp), %rdi
	movl	$40, %esi
	movq	%rbp, 8(%rsp)
.LEHB0:
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	leaq	8(%rsp), %rsi
	movl	$1, %ecx
	movl	$40, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rbx
	movl	$2147483653, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdi, %rdi
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	$1, %esi
	movl	$1, 880(%rsp)
	movq	%rbx, 80(%rsp)
	movq	%rdx, 24(%rsp)
	movl	$1, 32(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L22
.L24:
	movl	$2, %ecx
	movl	$40, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	xorl	%ebx, %ebx
	leaq	_ZSt4cout(%rip), %r12
	jmp	.L23
.L22:
	movq	%rbx, %rdi
	call	_Z34__device_stub__Z14changeValueArrPiPi
	jmp	.L24
.L36:
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	incq	%rbx
	cmpq	$10, %rbx
	je	.L35
.L23:
	movl	0(%rbp,%rbx,4), %esi
	movq	%r12, %rdi
	call	_ZNSolsEi@PLT
.LEHE0:
	jmp	.L36
.L35:
	leaq	80(%rsp), %rdi
	call	_ZN20CudaMemoryManagementIiED1Ev
	movq	888(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	jmp	.L33
.L29:
	endbr64
	movq	%rax, %rbx
.L25:
	leaq	80(%rsp), %rdi
	call	_ZN20CudaMemoryManagementIiED1Ev
	movq	888(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L33
	movq	%rbx, %rdi
.LEHB1:
	call	_Unwind_Resume@PLT
.LEHE1:
.L33:
	call	__stack_chk_fail@PLT
.L27:
	addq	$896, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3641:
	.section	.gcc_except_table,"a",@progbits
.LLSDA3641:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3641-.LLSDACSB3641
.LLSDACSB3641:
	.uleb128 .LEHB0-.LFB3641
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L29-.LFB3641
	.uleb128 0
	.uleb128 .LEHB1-.LFB3641
	.uleb128 .LEHE1-.LEHB1
	.uleb128 0
	.uleb128 0
.LLSDACSE3641:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>

using namespace std;

__global__ void changeValue(int *val) {
    *val = 50;
}

__global__ void changeValueArr(int *val) {
    val[blockIdx.x] = 40;
}

template <typename DEFTYPE>
class CudaMemoryManagement {
private:
    DEFTYPE* arr_store[100];
    int arr_store_ctr;
public:
    CudaMemoryManagement() {
        this->arr_store_ctr = 0;
    }
    ~CudaMemoryManagement() {
        // Free memory here?
        for (int i = 0; i < arr_store_ctr; i++) {
            hipFree(arr_store[i]);
        }
    }

    // Create memory area on GPU - side
    DEFTYPE* createMemory(DEFTYPE originalValue) {
        DEFTYPE* device_value;
        hipMalloc((void **)&device_value, sizeof(DEFTYPE));
        hipMemcpy(device_value, &originalValue, sizeof(DEFTYPE), hipMemcpyHostToDevice);
        // Register to arr_store
        this->arr_store[arr_store_ctr++] = device_value;
        return device_value;
    }

    // Overload function for previous createMemory (For 1d array implementation)
    DEFTYPE* createMemory(DEFTYPE* originalValue, int length) {
        DEFTYPE* device_value;
        hipMalloc((void **)&device_value, sizeof(DEFTYPE) * length);
        hipMemcpy(device_value, &originalValue, sizeof(DEFTYPE) * length, hipMemcpyHostToDevice);
        // Register to arr_store
        this->arr_store[arr_store_ctr++] = device_value;
        return device_value;
    }

    // Get the result from device_ptr(GPU's memory)
    void getResult(DEFTYPE *device_ptr, DEFTYPE *host_ptr) {
        hipMemcpy(host_ptr, device_ptr, sizeof(DEFTYPE), hipMemcpyDeviceToHost);
    }

    // Overload function for previous getResult (For 1d array implementation)
    void getResult(DEFTYPE *device_ptr, DEFTYPE *host_ptr, int length) {
        hipMemcpy(host_ptr, device_ptr, sizeof(DEFTYPE) * length, hipMemcpyDeviceToHost);
    }
};

int main(void) {
    CudaMemoryManagement<int> cmm;
    int arr_host[10];
    for (int i = 0; i < 10; i++) {
        arr_host[i] = rand()%10;
    }
    int *dev_arr = cmm.createMemory(arr_host, 10);
    changeValueArr<<<10, 1>>>(dev_arr);
    cmm.getResult(dev_arr, arr_host, 10);
    for (int i = 0; i < 10; i++) {
        cout << arr_host[i] << endl;
    }
    return 0;
}
	.text
	.file	"CudaMemoryManagement.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__changeValuePi # -- Begin function _Z26__device_stub__changeValuePi
	.type	_Z26__device_stub__changeValuePi,@function
_Z26__device_stub__changeValuePi:       # @_Z26__device_stub__changeValuePi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11changeValuePi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__changeValuePi, .Lfunc_end0-_Z26__device_stub__changeValuePi
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__changeValueArrPi # -- Begin function _Z29__device_stub__changeValueArrPi
	.type	_Z29__device_stub__changeValueArrPi,@function
_Z29__device_stub__changeValueArrPi:    # @_Z29__device_stub__changeValueArrPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14changeValueArrPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__changeValueArrPi, .Lfunc_end1-_Z29__device_stub__changeValueArrPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$856, %rsp                      # imm = 0x358
	.cfi_def_cfa_offset 880
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$0, 848(%rsp)
	xorl	%ebx, %ebx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%rsp,%rbx,4)
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB2_1
# %bb.2:
.Ltmp0:
	leaq	48(%rsp), %rdi
	movq	%rsp, %rsi
	movl	$10, %edx
	callq	_ZN20CudaMemoryManagementIiE12createMemoryEPii
.Ltmp1:
# %bb.3:
.Ltmp2:
	movq	%rax, %rbx
	movabsq	$4294967306, %rdi               # imm = 0x10000000A
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp3:
# %bb.4:
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
.Ltmp4:
	movq	%rbx, %rdi
	callq	_Z29__device_stub__changeValueArrPi
.Ltmp5:
.LBB2_6:
.Ltmp6:
	movq	%rsp, %rdi
	movl	$40, %edx
	movq	%rbx, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp7:
# %bb.7:                                # %_ZN20CudaMemoryManagementIiE9getResultEPiS1_i.exit.preheader.preheader
	xorl	%r14d, %r14d
.LBB2_8:                                # %_ZN20CudaMemoryManagementIiE9getResultEPiS1_i.exit.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rsp,%r14,4), %esi
.Ltmp9:
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
.Ltmp10:
# %bb.9:                                #   in Loop: Header=BB2_8 Depth=1
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp11:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp12:
# %bb.10:                               # %.noexc
                                        #   in Loop: Header=BB2_8 Depth=1
.Ltmp13:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp14:
# %bb.11:                               # %.noexc16
                                        #   in Loop: Header=BB2_8 Depth=1
.Ltmp15:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp16:
# %bb.12:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB2_8 Depth=1
	incq	%r14
	cmpq	$10, %r14
	jne	.LBB2_8
# %bb.13:
	leaq	48(%rsp), %rdi
	callq	_ZN20CudaMemoryManagementIiED2Ev
	xorl	%eax, %eax
	addq	$856, %rsp                      # imm = 0x358
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_16:
	.cfi_def_cfa_offset 880
.Ltmp8:
	jmp	.LBB2_15
.LBB2_14:
.Ltmp17:
.LBB2_15:
	movq	%rax, %rbx
	leaq	48(%rsp), %rdi
	callq	_ZN20CudaMemoryManagementIiED2Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp7-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp16-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin0          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Lfunc_end2-.Ltmp16            #   Call between .Ltmp16 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN20CudaMemoryManagementIiE12createMemoryEPii,"axG",@progbits,_ZN20CudaMemoryManagementIiE12createMemoryEPii,comdat
	.weak	_ZN20CudaMemoryManagementIiE12createMemoryEPii # -- Begin function _ZN20CudaMemoryManagementIiE12createMemoryEPii
	.p2align	1, 0x90
	.type	_ZN20CudaMemoryManagementIiE12createMemoryEPii,@function
_ZN20CudaMemoryManagementIiE12createMemoryEPii: # @_ZN20CudaMemoryManagementIiE12createMemoryEPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	leaq	16(%rsp), %r14
	movq	%rsi, (%r14)
	movslq	%edx, %r15
	shlq	$2, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rax
	movslq	800(%rbx), %rcx
	leal	1(%rcx), %edx
	movl	%edx, 800(%rbx)
	movq	%rax, (%rbx,%rcx,8)
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_ZN20CudaMemoryManagementIiE12createMemoryEPii, .Lfunc_end3-_ZN20CudaMemoryManagementIiE12createMemoryEPii
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN20CudaMemoryManagementIiED2Ev,"axG",@progbits,_ZN20CudaMemoryManagementIiED2Ev,comdat
	.weak	_ZN20CudaMemoryManagementIiED2Ev # -- Begin function _ZN20CudaMemoryManagementIiED2Ev
	.p2align	1, 0x90
	.type	_ZN20CudaMemoryManagementIiED2Ev,@function
_ZN20CudaMemoryManagementIiED2Ev:       # @_ZN20CudaMemoryManagementIiED2Ev
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	cmpl	$0, 800(%rdi)
	jle	.LBB4_4
# %bb.1:                                # %.lr.ph.preheader
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r14,8), %rdi
.Ltmp18:
	callq	hipFree
.Ltmp19:
# %bb.3:                                #   in Loop: Header=BB4_2 Depth=1
	incq	%r14
	movslq	800(%rbx), %rax
	cmpq	%rax, %r14
	jl	.LBB4_2
.LBB4_4:                                # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB4_5:
	.cfi_def_cfa_offset 32
.Ltmp20:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end4:
	.size	_ZN20CudaMemoryManagementIiED2Ev, .Lfunc_end4-_ZN20CudaMemoryManagementIiED2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZN20CudaMemoryManagementIiED2Ev,"aG",@progbits,_ZN20CudaMemoryManagementIiED2Ev,comdat
	.p2align	2, 0x0
GCC_except_table4:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Ltmp18-.Lfunc_begin1          # >> Call Site 1 <<
	.uleb128 .Ltmp19-.Ltmp18                #   Call between .Ltmp18 and .Ltmp19
	.uleb128 .Ltmp20-.Lfunc_begin1          #     jumps to .Ltmp20
	.byte	1                               #   On action: 1
.Lcst_end1:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end5:
	.size	__clang_call_terminate, .Lfunc_end5-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11changeValuePi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14changeValueArrPi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11changeValuePi,@object       # @_Z11changeValuePi
	.section	.rodata,"a",@progbits
	.globl	_Z11changeValuePi
	.p2align	3, 0x0
_Z11changeValuePi:
	.quad	_Z26__device_stub__changeValuePi
	.size	_Z11changeValuePi, 8

	.type	_Z14changeValueArrPi,@object    # @_Z14changeValueArrPi
	.globl	_Z14changeValueArrPi
	.p2align	3, 0x0
_Z14changeValueArrPi:
	.quad	_Z29__device_stub__changeValueArrPi
	.size	_Z14changeValueArrPi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z11changeValuePi"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14changeValueArrPi"
	.size	.L__unnamed_2, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__changeValuePi
	.addrsig_sym _Z29__device_stub__changeValueArrPi
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z11changeValuePi
	.addrsig_sym _Z14changeValueArrPi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11changeValuePi       ; -- Begin function _Z11changeValuePi
	.globl	_Z11changeValuePi
	.p2align	8
	.type	_Z11changeValuePi,@function
_Z11changeValuePi:                      ; @_Z11changeValuePi
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 50
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11changeValuePi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 2
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11changeValuePi, .Lfunc_end0-_Z11changeValuePi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 40
; NumSgprs: 2
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 2
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14changeValueArrPi    ; -- Begin function _Z14changeValueArrPi
	.globl	_Z14changeValueArrPi
	.p2align	8
	.type	_Z14changeValueArrPi,@function
_Z14changeValueArrPi:                   ; @_Z14changeValueArrPi
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_mov_b32 s3, 0
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 40
	s_lshl_b64 s[2:3], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14changeValueArrPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14changeValueArrPi, .Lfunc_end1-_Z14changeValueArrPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 60
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11changeValuePi
    .private_segment_fixed_size: 0
    .sgpr_count:     2
    .sgpr_spill_count: 0
    .symbol:         _Z11changeValuePi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14changeValueArrPi
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z14changeValueArrPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
