#include <iostream>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#include <cuda_profiler_api.h>
#include <stdio.h>
#include <cuda.h>
#include <time.h>


#define MASK_WIDTH 3  //Kx and Ky
#define MASK_RADIUS MASK_WIDTH / 2
#define TILE_WIDTH 8
#define W (TILE_WIDTH + MASK_WIDTH - 1)

__global__ void Convolution3D(float *input, float* mask, float *result, int width, int height, int depth)
{
    //allocating shared memory for intermediate ops
    __shared__ float shared_mem[W][W][W];

    // First batch loading
    int out = (threadIdx.y * TILE_WIDTH) + threadIdx.x
                     + (threadIdx.z * TILE_WIDTH * TILE_WIDTH);
    int out_tmp = out;
    int outX = out_tmp % W;
    out_tmp = out_tmp / W;
    int outY = out_tmp % W;
    out_tmp = out_tmp / W;
    int outZ = out_tmp;

    // input's indices
    int srcZ = outZ + (blockIdx.z * TILE_WIDTH) - MASK_RADIUS;
    int srcY = outY + (blockIdx.y * TILE_WIDTH) - MASK_RADIUS;
    int srcX = outX + (blockIdx.x * TILE_WIDTH) - MASK_RADIUS;
    int src = srcX + (srcY * width) + (srcZ * width * height);

    // initializing shared memory
    if(srcZ >= 0 && srcZ < depth && srcY >= 0 && srcY < height && srcX >= 0 && srcX < width)
        shared_mem[outZ][outY][outX] = input[src];
    else
        shared_mem[outZ][outY][outX] = 0;

    // Second batch loading
    out = threadIdx.x + (threadIdx.y * TILE_WIDTH) + (threadIdx.z * TILE_WIDTH * TILE_WIDTH) + TILE_WIDTH * TILE_WIDTH * TILE_WIDTH;
    out_tmp = out;
    outX = out_tmp % W;
    out_tmp = out_tmp / W;
    outY = out_tmp % W;
    out_tmp = out_tmp / W;
    outZ = out_tmp;

    srcZ = outZ + (blockIdx.z * TILE_WIDTH) - MASK_RADIUS;
    srcY = outY + (blockIdx.y * TILE_WIDTH) - MASK_RADIUS;
    srcX = outX + (blockIdx.x * TILE_WIDTH) - MASK_RADIUS;
    src = srcX + (srcY * width) + (srcZ * width * height);

    // if within tiling area
    if(outZ < W)
    {
        //transfer data to shared memory
        if(srcZ >= 0 && srcZ < depth && srcY >= 0 && srcY < height && srcX >= 0 && srcX < width)
            shared_mem[outZ][outY][outX] = input[src];
        else
            shared_mem[outZ][outY][outX] = 0;
    }
    __syncthreads();

    //3d convolution
    int z;
    int y;
    int x;
    float sum = 0;
    for(z = 0; z < MASK_WIDTH; z++)
        for(y = 0; y < MASK_WIDTH; y++)
            for(x = 0; x < MASK_WIDTH; x++)
                sum += shared_mem[threadIdx.z + z][threadIdx.y + y][threadIdx.x + x] * mask[x + (y * MASK_WIDTH) + (z * MASK_WIDTH * MASK_WIDTH)];
    
    //check indices before loading into output
    z = threadIdx.z + (blockIdx.z * TILE_WIDTH);
    y = threadIdx.y + (blockIdx.y * TILE_WIDTH);
    x = threadIdx.x + (blockIdx.x * TILE_WIDTH);
    if(z < depth && y < height && x < width)
        result[x + (y * width) + (z * width * height)] = sum;

    __syncthreads();

}

void init_mat(float *a, const int Nx, const int Ny, const int Ni, const int val) {
    int i, j, k;
    for(i=0; i<Nx; i++)
        for(j=0; j<Ny; j++)
            for(k=0; k<Ni; k++)
                a[(i*Ny*Ni)+j*Ni+k] = val;
}

int main(int argc, char* argv[])
{
    int image_width  = 14;  //Nx
    int image_height = 14;  //Ny
    int image_depth  = 512;   //Ni

    /*
    int image_width  = 224;  //Nx
    int image_height = 224;  //Ny
    int image_depth  = 64;   //Ni
    */
    
    // initialize host mem
    float *d_in;
    float *d_out;
    float *d_mask;

    float *data = (float*)malloc(sizeof(float)*image_width*image_height*image_depth);
    init_mat(data, image_width, image_height, image_depth, 2.0f);

    float *mask = (float*)malloc(sizeof(float)*MASK_WIDTH*MASK_WIDTH*MASK_WIDTH);
    init_mat(mask, MASK_WIDTH, MASK_WIDTH, MASK_WIDTH, 1.0f);

    //allocate device mem
    int input_size = image_height * image_width * image_depth;
    int output_size = image_height * image_width * image_depth;
    cudaMalloc((void **)&d_in,  input_size * sizeof(float));
    cudaMalloc((void **)&d_out, output_size* sizeof(float));
    cudaMalloc((void **)&d_mask, MASK_WIDTH * MASK_WIDTH * MASK_WIDTH * sizeof(float));

    cudaMemcpy(d_in, data, image_width * image_height * image_depth * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_mask, mask, MASK_WIDTH * MASK_WIDTH * MASK_WIDTH * sizeof(float), cudaMemcpyHostToDevice);

    dim3 dim_block(TILE_WIDTH, TILE_WIDTH, TILE_WIDTH);
    dim3 dim_grid((image_width + TILE_WIDTH - 1) / TILE_WIDTH, (image_height + TILE_WIDTH - 1) / TILE_WIDTH, (image_depth + TILE_WIDTH - 1) / TILE_WIDTH);
    Convolution3D<<<dim_grid, dim_block>>>(d_in, d_mask, d_out, image_width, image_height, image_depth);
    cudaDeviceSynchronize();

    //get data from device to host
    cudaMemcpy(data, d_out, output_size * sizeof(float), cudaMemcpyDeviceToHost);

    cudaFree(d_in);
    cudaFree(d_out);
    cudaFree(d_mask);
    free(data);
    free(mask);

    cudaError_t err = cudaGetLastError();  // add
    if (err != cudaSuccess)
        printf("CUDA Error: %s;", cudaGetErrorString(err));
    cudaProfilerStop();
    return 0;
}
	.file	"tmpxft_0038a2da_00000000-6_3DConv.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8init_matPfiiii
	.type	_Z8init_matPfiiii, @function
_Z8init_matPfiiii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r10
	movl	%ecx, %eax
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%edx, %ebp
	xorl	%edi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	imull	%ecx, %ebp
.L3:
	cmpl	%esi, %edi
	jge	.L11
	movl	%r9d, %r11d
	xorl	%ebx, %ebx
.L7:
	cmpl	%edx, %ebx
	jge	.L5
	movslq	%r11d, %rcx
	leaq	(%r10,%rcx,4), %r12
	xorl	%ecx, %ecx
.L6:
	cmpl	%ecx, %eax
	jle	.L12
	cvtsi2ssl	%r8d, %xmm0
	movss	%xmm0, (%r12,%rcx,4)
	incq	%rcx
	jmp	.L6
.L12:
	incl	%ebx
	addl	%eax, %r11d
	jmp	.L7
.L5:
	incl	%edi
	addl	%ebp, %r9d
	jmp	.L3
.L11:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z8init_matPfiiii, .-_Z8init_matPfiiii
	.globl	_Z40__device_stub__Z13Convolution3DPfS_S_iiiPfS_S_iii
	.type	_Z40__device_stub__Z13Convolution3DPfS_S_iiiPfS_S_iii, @function
_Z40__device_stub__Z13Convolution3DPfS_S_iiiPfS_S_iii:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13Convolution3DPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L13:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z40__device_stub__Z13Convolution3DPfS_S_iiiPfS_S_iii, .-_Z40__device_stub__Z13Convolution3DPfS_S_iiiPfS_S_iii
	.globl	_Z13Convolution3DPfS_S_iii
	.type	_Z13Convolution3DPfS_S_iii, @function
_Z13Convolution3DPfS_S_iii:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z13Convolution3DPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE3662:
	.size	_Z13Convolution3DPfS_S_iii, .-_Z13Convolution3DPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA Error: %s;"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$401408, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$2, %r8d
	movl	$512, %ecx
	movl	$14, %edx
	movl	$14, %esi
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	_Z8init_matPfiiii
	movl	$108, %edi
	call	malloc@PLT
	movl	$1, %r8d
	movl	$3, %ecx
	movl	$3, %edx
	movq	%rax, %rdi
	movl	$3, %esi
	movq	%rax, %rbp
	call	_Z8init_matPfiiii
	leaq	8(%rsp), %rdi
	movl	$401408, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$401408, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$108, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$401408, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$108, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$8, %ecx
	movabsq	$34359738376, %rdx
	movl	$64, %esi
	movabsq	$8589934594, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	16(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$512, %r9d
	movl	$14, %r8d
	movq	8(%rsp), %rdi
	movl	$14, %ecx
	call	_Z40__device_stub__Z13Convolution3DPfS_S_iiiPfS_S_iii
.L19:
	call	cudaDeviceSynchronize@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$401408, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L20
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L20:
	call	cudaProfilerStop@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC1:
	.string	"_Z13Convolution3DPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13Convolution3DPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#include <hip/hip_runtime_api.h>
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>


#define MASK_WIDTH 3  //Kx and Ky
#define MASK_RADIUS MASK_WIDTH / 2
#define TILE_WIDTH 8
#define W (TILE_WIDTH + MASK_WIDTH - 1)

__global__ void Convolution3D(float *input, float* mask, float *result, int width, int height, int depth)
{
    //allocating shared memory for intermediate ops
    __shared__ float shared_mem[W][W][W];

    // First batch loading
    int out = (threadIdx.y * TILE_WIDTH) + threadIdx.x
                     + (threadIdx.z * TILE_WIDTH * TILE_WIDTH);
    int out_tmp = out;
    int outX = out_tmp % W;
    out_tmp = out_tmp / W;
    int outY = out_tmp % W;
    out_tmp = out_tmp / W;
    int outZ = out_tmp;

    // input's indices
    int srcZ = outZ + (blockIdx.z * TILE_WIDTH) - MASK_RADIUS;
    int srcY = outY + (blockIdx.y * TILE_WIDTH) - MASK_RADIUS;
    int srcX = outX + (blockIdx.x * TILE_WIDTH) - MASK_RADIUS;
    int src = srcX + (srcY * width) + (srcZ * width * height);

    // initializing shared memory
    if(srcZ >= 0 && srcZ < depth && srcY >= 0 && srcY < height && srcX >= 0 && srcX < width)
        shared_mem[outZ][outY][outX] = input[src];
    else
        shared_mem[outZ][outY][outX] = 0;

    // Second batch loading
    out = threadIdx.x + (threadIdx.y * TILE_WIDTH) + (threadIdx.z * TILE_WIDTH * TILE_WIDTH) + TILE_WIDTH * TILE_WIDTH * TILE_WIDTH;
    out_tmp = out;
    outX = out_tmp % W;
    out_tmp = out_tmp / W;
    outY = out_tmp % W;
    out_tmp = out_tmp / W;
    outZ = out_tmp;

    srcZ = outZ + (blockIdx.z * TILE_WIDTH) - MASK_RADIUS;
    srcY = outY + (blockIdx.y * TILE_WIDTH) - MASK_RADIUS;
    srcX = outX + (blockIdx.x * TILE_WIDTH) - MASK_RADIUS;
    src = srcX + (srcY * width) + (srcZ * width * height);

    // if within tiling area
    if(outZ < W)
    {
        //transfer data to shared memory
        if(srcZ >= 0 && srcZ < depth && srcY >= 0 && srcY < height && srcX >= 0 && srcX < width)
            shared_mem[outZ][outY][outX] = input[src];
        else
            shared_mem[outZ][outY][outX] = 0;
    }
    __syncthreads();

    //3d convolution
    int z;
    int y;
    int x;
    float sum = 0;
    for(z = 0; z < MASK_WIDTH; z++)
        for(y = 0; y < MASK_WIDTH; y++)
            for(x = 0; x < MASK_WIDTH; x++)
                sum += shared_mem[threadIdx.z + z][threadIdx.y + y][threadIdx.x + x] * mask[x + (y * MASK_WIDTH) + (z * MASK_WIDTH * MASK_WIDTH)];
    
    //check indices before loading into output
    z = threadIdx.z + (blockIdx.z * TILE_WIDTH);
    y = threadIdx.y + (blockIdx.y * TILE_WIDTH);
    x = threadIdx.x + (blockIdx.x * TILE_WIDTH);
    if(z < depth && y < height && x < width)
        result[x + (y * width) + (z * width * height)] = sum;

    __syncthreads();

}

void init_mat(float *a, const int Nx, const int Ny, const int Ni, const int val) {
    int i, j, k;
    for(i=0; i<Nx; i++)
        for(j=0; j<Ny; j++)
            for(k=0; k<Ni; k++)
                a[(i*Ny*Ni)+j*Ni+k] = val;
}

int main(int argc, char* argv[])
{
    int image_width  = 14;  //Nx
    int image_height = 14;  //Ny
    int image_depth  = 512;   //Ni

    /*
    int image_width  = 224;  //Nx
    int image_height = 224;  //Ny
    int image_depth  = 64;   //Ni
    */
    
    // initialize host mem
    float *d_in;
    float *d_out;
    float *d_mask;

    float *data = (float*)malloc(sizeof(float)*image_width*image_height*image_depth);
    init_mat(data, image_width, image_height, image_depth, 2.0f);

    float *mask = (float*)malloc(sizeof(float)*MASK_WIDTH*MASK_WIDTH*MASK_WIDTH);
    init_mat(mask, MASK_WIDTH, MASK_WIDTH, MASK_WIDTH, 1.0f);

    //allocate device mem
    int input_size = image_height * image_width * image_depth;
    int output_size = image_height * image_width * image_depth;
    hipMalloc((void **)&d_in,  input_size * sizeof(float));
    hipMalloc((void **)&d_out, output_size* sizeof(float));
    hipMalloc((void **)&d_mask, MASK_WIDTH * MASK_WIDTH * MASK_WIDTH * sizeof(float));

    hipMemcpy(d_in, data, image_width * image_height * image_depth * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_mask, mask, MASK_WIDTH * MASK_WIDTH * MASK_WIDTH * sizeof(float), hipMemcpyHostToDevice);

    dim3 dim_block(TILE_WIDTH, TILE_WIDTH, TILE_WIDTH);
    dim3 dim_grid((image_width + TILE_WIDTH - 1) / TILE_WIDTH, (image_height + TILE_WIDTH - 1) / TILE_WIDTH, (image_depth + TILE_WIDTH - 1) / TILE_WIDTH);
    Convolution3D<<<dim_grid, dim_block>>>(d_in, d_mask, d_out, image_width, image_height, image_depth);
    hipDeviceSynchronize();

    //get data from device to host
    hipMemcpy(data, d_out, output_size * sizeof(float), hipMemcpyDeviceToHost);

    hipFree(d_in);
    hipFree(d_out);
    hipFree(d_mask);
    free(data);
    free(mask);

    hipError_t err = hipGetLastError();  // add
    if (err != hipSuccess)
        printf("CUDA Error: %s;", hipGetErrorString(err));
    hipProfilerStop();
    return 0;
}
	.text
	.file	"3DConv.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__Convolution3DPfS_S_iii # -- Begin function _Z28__device_stub__Convolution3DPfS_S_iii
	.type	_Z28__device_stub__Convolution3DPfS_S_iii,@function
_Z28__device_stub__Convolution3DPfS_S_iii: # @_Z28__device_stub__Convolution3DPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13Convolution3DPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__Convolution3DPfS_S_iii, .Lfunc_end0-_Z28__device_stub__Convolution3DPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8init_matPfiiii               # -- Begin function _Z8init_matPfiiii
	.type	_Z8init_matPfiiii,@function
_Z8init_matPfiiii:                      # @_Z8init_matPfiiii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_10
# %bb.1:                                # %.preheader20.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	cvtsi2ss	%r8d, %xmm0
	movl	%esi, %eax
	movl	%edx, %esi
	movl	%ecx, %r8d
	movl	%ecx, %r9d
	imull	%edx, %r9d
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
.LBB1_2:                                # %.preheader20
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
                                        #       Child Loop BB1_6 Depth 3
	testl	%edx, %edx
	jle	.LBB1_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r10d, %ebx
	xorl	%r14d, %r14d
.LBB1_4:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_6 Depth 3
	testl	%ecx, %ecx
	jle	.LBB1_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB1_4 Depth=2
	movslq	%ebx, %r15
	leaq	(%rdi,%r15,4), %r15
	xorl	%r12d, %r12d
.LBB1_6:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	%r12, %r8
	jne	.LBB1_6
.LBB1_7:                                # %._crit_edge
                                        #   in Loop: Header=BB1_4 Depth=2
	incq	%r14
	addl	%ecx, %ebx
	cmpq	%rsi, %r14
	jne	.LBB1_4
.LBB1_8:                                # %._crit_edge23
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r11
	addl	%r9d, %r10d
	cmpq	%rax, %r11
	jne	.LBB1_2
# %bb.9:
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_10:                               # %._crit_edge25
	retq
.Lfunc_end1:
	.size	_Z8init_matPfiiii, .Lfunc_end1-_Z8init_matPfiiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$401408, %edi                   # imm = 0x62000
	callq	malloc
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rbx, %rcx
.LBB2_1:                                # %.preheader20.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
                                        #       Child Loop BB2_3 Depth 3
	movq	%rcx, %rdx
	xorl	%esi, %esi
.LBB2_2:                                # %.preheader.i
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_3 Depth 3
	xorl	%edi, %edi
.LBB2_3:                                #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	$1073741824, (%rdx,%rdi,4)      # imm = 0x40000000
	incq	%rdi
	cmpq	$512, %rdi                      # imm = 0x200
	jne	.LBB2_3
# %bb.4:                                # %._crit_edge.i
                                        #   in Loop: Header=BB2_2 Depth=2
	incq	%rsi
	addq	$2048, %rdx                     # imm = 0x800
	cmpq	$14, %rsi
	jne	.LBB2_2
# %bb.5:                                # %._crit_edge23.i
                                        #   in Loop: Header=BB2_1 Depth=1
	incq	%rax
	addq	$28672, %rcx                    # imm = 0x7000
	cmpq	$14, %rax
	jne	.LBB2_1
# %bb.6:                                # %_Z8init_matPfiiii.exit
	movl	$108, %edi
	callq	malloc
	movq	%rax, %r14
	xorl	%eax, %eax
	movq	%r14, %rcx
.LBB2_7:                                # %.preheader20.i39
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_8 Depth 2
                                        #       Child Loop BB2_9 Depth 3
	movq	%rcx, %rdx
	xorl	%esi, %esi
.LBB2_8:                                # %.preheader.i41
                                        #   Parent Loop BB2_7 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_9 Depth 3
	xorl	%edi, %edi
.LBB2_9:                                #   Parent Loop BB2_7 Depth=1
                                        #     Parent Loop BB2_8 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	$1065353216, (%rdx,%rdi,4)      # imm = 0x3F800000
	incq	%rdi
	cmpq	$3, %rdi
	jne	.LBB2_9
# %bb.10:                               # %._crit_edge.i48
                                        #   in Loop: Header=BB2_8 Depth=2
	incq	%rsi
	addq	$12, %rdx
	cmpq	$3, %rsi
	jne	.LBB2_8
# %bb.11:                               # %._crit_edge23.i51
                                        #   in Loop: Header=BB2_7 Depth=1
	incq	%rax
	addq	$36, %rcx
	cmpq	$3, %rax
	jne	.LBB2_7
# %bb.12:                               # %_Z8init_matPfiiii.exit54
	leaq	16(%rsp), %r15
	movl	$401408, %esi                   # imm = 0x62000
	movq	%r15, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$401408, %esi                   # imm = 0x62000
	callq	hipMalloc
	leaq	8(%rsp), %r12
	movl	$108, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$401408, %edx                   # imm = 0x62000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$108, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movabsq	$34359738376, %rdx              # imm = 0x800000008
	movl	$64, %esi
	movl	$8, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.13:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$14, %ecx
	movl	$14, %r8d
	movl	$512, %r9d                      # imm = 0x200
	callq	_Z28__device_stub__Convolution3DPfS_S_iii
.LBB2_14:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movl	$401408, %edx                   # imm = 0x62000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_16
# %bb.15:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_16:
	callq	hipProfilerStop
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13Convolution3DPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13Convolution3DPfS_S_iii,@object # @_Z13Convolution3DPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z13Convolution3DPfS_S_iii
	.p2align	3, 0x0
_Z13Convolution3DPfS_S_iii:
	.quad	_Z28__device_stub__Convolution3DPfS_S_iii
	.size	_Z13Convolution3DPfS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA Error: %s;"
	.size	.L.str, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13Convolution3DPfS_S_iii"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__Convolution3DPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13Convolution3DPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13Convolution3DPfS_S_iii ; -- Begin function _Z13Convolution3DPfS_S_iii
	.globl	_Z13Convolution3DPfS_S_iii
	.p2align	8
	.type	_Z13Convolution3DPfS_S_iii,@function
_Z13Convolution3DPfS_S_iii:             ; @_Z13Convolution3DPfS_S_iii
; %bb.0:
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	v_dual_mov_b32 v10, 0 :: v_dual_and_b32 v3, 0x3ff, v0
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_lshlrev_b32_e32 v0, 3, v2
	v_lshlrev_b32_e32 v1, 6, v4
	s_load_b128 s[4:7], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s7, s15, 3
	s_lshl_b32 s12, s14, 3
	s_add_i32 s15, s7, -1
	v_add3_u32 v5, v0, v3, v1
	s_lshl_b32 s13, s13, 3
	s_add_i32 s16, s12, -1
	s_add_i32 s14, s13, -1
	s_mov_b32 s17, exec_lo
	v_mul_hi_u32 v0, 0xcccccccd, v5
	v_mul_hi_u32 v6, 0x28f5c29, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_bfe_u32 v1, v0, 3, 16
	v_lshrrev_b32_e32 v0, 3, v0
	v_add_nc_u32_e32 v9, s15, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_u32_u24_e32 v1, 0xcccd, v1
	v_mul_u32_u24_e32 v7, 10, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v1, 19, v1
	v_sub_nc_u32_e32 v7, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u16 v1, v1, 10
	v_sub_nc_u16 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v8, 0xffff, v0
	v_cmpx_lt_i32_e32 -1, v9
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, s16, v8
	v_cmp_gt_i32_e32 vcc_lo, s6, v9
	v_mov_b32_e32 v10, 0
	v_cmp_lt_i32_e64 s0, -1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB0_5
; %bb.2:
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v1, s14, v7
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s4, v1
	v_cmp_lt_i32_e64 s1, -1, v1
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_mad_u64_u32 v[10:11], null, v9, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v10, s4, v[1:2]
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[11:12]
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v10, v[0:1], off
.LBB0_4:                                ; %Flow171
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_5:                                ; %Flow172
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s18
.LBB0_6:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s17
	v_lshlrev_b32_e32 v0, 2, v7
	v_mul_u32_u24_e32 v1, 40, v8
	v_mul_u32_u24_e32 v6, 0x190, v6
	s_mov_b32 s17, exec_lo
	v_add3_u32 v0, v6, v1, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v0, v10
	v_cmpx_gt_u32_e32 0x1e8, v5
	s_cbranch_execz .LBB0_14
; %bb.7:
	v_dual_mov_b32 v9, 0 :: v_dual_add_nc_u32 v0, 0x200, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v1, 0xcccccccd, v0
	v_bfe_u32 v5, v1, 3, 16
	v_lshrrev_b32_e32 v1, 3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_u32_u24_e32 v6, 0xcccd, v5
	v_mul_hi_u32 v5, 0x28f5c29, v0
	v_mul_lo_u32 v7, v1, 10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v6, 19, v6
	v_add_nc_u32_e32 v8, s15, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u16 v6, v6, 10
	s_mov_b32 s15, exec_lo
	v_sub_nc_u16 v1, v1, v6
	v_sub_nc_u32_e32 v6, v0, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_and_b32_e32 v7, 0xffff, v1
	v_cmpx_lt_i32_e32 -1, v8
	s_cbranch_execz .LBB0_13
; %bb.8:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v9, 0 :: v_dual_add_nc_u32 v0, s16, v7
	v_cmp_gt_i32_e32 vcc_lo, s6, v8
	v_cmp_lt_i32_e64 s0, -1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB0_12
; %bb.9:
	v_add_nc_u32_e32 v1, s14, v6
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s4, v1
	v_cmp_lt_i32_e64 s1, -1, v1
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_mad_u64_u32 v[9:10], null, v8, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v9, s4, v[1:2]
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[10:11]
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v9, v[0:1], off
.LBB0_11:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_12:                               ; %Flow169
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_13:                               ; %.sink.split
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s15
	v_lshlrev_b32_e32 v0, 2, v6
	v_mul_u32_u24_e32 v1, 40, v7
	v_mul_u32_u24_e32 v5, 0x190, v5
	v_add3_u32 v0, v5, v1, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v0, v9
.LBB0_14:                               ; %Flow170
	s_or_b32 exec_lo, exec_lo, s17
	v_mul_u32_u24_e32 v0, 0x190, v4
	v_mul_u32_u24_e32 v1, 40, v2
	v_lshlrev_b32_e32 v5, 2, v3
	s_mov_b32 s14, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add3_u32 v0, v0, v1, v5
	v_mov_b32_e32 v5, 0
.LBB0_15:                               ; %.preheader127
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_16 Depth 2
                                        ;       Child Loop BB0_17 Depth 3
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v1, v0
	s_mov_b64 s[0:1], s[10:11]
	s_mov_b32 s15, 0
.LBB0_16:                               ; %.preheader
                                        ;   Parent Loop BB0_15 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_17 Depth 3
	s_mov_b32 s16, 0
	s_mov_b64 s[8:9], s[0:1]
.LBB0_17:                               ;   Parent Loop BB0_15 Depth=1
                                        ;     Parent Loop BB0_16 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_nc_u32_e32 v6, s16, v1
	s_load_b32 s17, s[8:9], 0x0
	s_add_i32 s16, s16, 4
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	ds_load_b32 v6, v6
	s_cmp_lg_u32 s16, 12
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v5, s17, v6
	s_cbranch_scc1 .LBB0_17
; %bb.18:                               ;   in Loop: Header=BB0_16 Depth=2
	s_add_i32 s15, s15, 1
	v_add_nc_u32_e32 v1, 40, v1
	s_add_u32 s0, s0, 12
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s15, 3
	s_cbranch_scc1 .LBB0_16
; %bb.19:                               ;   in Loop: Header=BB0_15 Depth=1
	s_add_i32 s14, s14, 1
	v_add_nc_u32_e32 v0, 0x190, v0
	s_add_u32 s10, s10, 36
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s14, 3
	s_cbranch_scc1 .LBB0_15
; %bb.20:
	v_add_nc_u32_e32 v4, s7, v4
	v_add_nc_u32_e32 v1, s12, v2
	v_add_nc_u32_e32 v0, s13, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s6, v4
	v_cmp_gt_i32_e64 s0, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s1, s4, v0
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_22
; %bb.21:
	v_mad_u64_u32 v[2:3], null, v4, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s4, v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
.LBB0_22:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13Convolution3DPfS_S_iii
		.amdhsa_group_segment_fixed_size 4000
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13Convolution3DPfS_S_iii, .Lfunc_end0-_Z13Convolution3DPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1112
; NumSgprs: 21
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4000 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4000
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13Convolution3DPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z13Convolution3DPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
