#include <cuda.h>
#include <iostream>
#include <stdio.h>
#include <time.h>

using namespace std;

#define MRows 5
#define MCols 5
#define NRows 5
#define NCols 6
#define PRows 5
#define PCols 6
#define H 10
#define W 10
#define TILE_WIDTH 2

__global__ void MultTiled(float *M, float *N, float *P) {
  __shared__ int ds_M[TILE_WIDTH][TILE_WIDTH];
  __shared__ int ds_N[TILE_WIDTH][TILE_WIDTH];

  int bx = blockIdx.x;
  int by = blockIdx.y;
  int tx = threadIdx.x;
  int ty = threadIdx.y;

  int Row = by * blockDim.y + ty;
  int Col = bx * blockDim.x + tx;
  float PValue = 0.0;
  for (int p = 0; p < (TILE_WIDTH + MCols - 1) / TILE_WIDTH; p++) {

    if (p * TILE_WIDTH + tx < MCols && Row < MRows)
      ds_M[ty][tx] = M[Row * MCols + p * TILE_WIDTH + tx];
    else
      ds_M[ty][tx] = 0.0;

    if (p * TILE_WIDTH + ty < NRows && Col < NCols)
      ds_N[ty][tx] = N[(p * TILE_WIDTH + ty) * NCols + Col];
    else
      ds_N[ty][tx] = 0.0;

    __syncthreads();

    for (int n = 0; n < TILE_WIDTH; ++n)
      PValue += ds_M[ty][n] * ds_N[n][tx];

    __syncthreads();
  }

  if (Row < PRows && Col < PCols)
    P[(Row * PCols) + Col] = PValue;
}

void printMatrix(float *result, int R, int C) {
  for (int i = 0; i < R; i++) {
    for (int j = 0; j < C; j++) {
      cout << result[i * C + j] << " ";
    }
    cout << endl;
  }
}

int main() {
  clock_t start, end;
  double gpu_time_used, tiles_time_used;
  float blockSize = 2;
  float *h_a, *h_b, *h_c, *d_a, *d_b, *d_c, *h_result, *M, *N, *P, *t_result;

  // Asignar memoria en el host
  h_a = (float *)malloc(sizeof(float) * MRows * MCols);
  h_b = (float *)malloc(sizeof(float) * NRows * NCols);
  h_c = (float *)malloc(sizeof(float) * PRows * PCols);
  h_result = (float *)malloc(sizeof(float) * PRows * PCols);
  t_result = (float *)malloc(sizeof(float) * PRows * PCols);

  // Inicializar las matrices
  for (int i = 0; i < MRows; i++) {
    for (int j = 0; j < MCols; j++) {
      h_a[i * MCols + j] = 1.0;
    }
  }
  cout << "  M1  " << endl;
  printMatrix(h_a, MRows, MCols);

  for (int i = 0; i < NRows; i++) {
    for (int j = 0; j < NCols; j++) {
      h_b[i * NCols + j] = 1.0;
    }
  }

  cout << "  M2  " << endl;
  printMatrix(h_b, NRows, NCols);
  // Asignacion de memoria en el device
  // cudaMalloc(&d_a, sizeof(int) * H * W);
  // cudaMalloc(&d_b, sizeof(int) * H * W);
  // cudaMalloc(&d_c, sizeof(int) * H * W);
  cudaMalloc(&M, sizeof(float) * MRows * MCols);
  cudaMalloc(&N, sizeof(float) * NRows * NCols);
  cudaMalloc(&P, sizeof(float) * PRows * PCols);

  // Copiar los datos del host al device
  // cudaMemcpy(d_a, h_a, H * W * sizeof(int), cudaMemcpyHostToDevice);
  // cudaMemcpy(d_b, h_b, H * W * sizeof(int), cudaMemcpyHostToDevice);

  cudaMemcpy(M, h_a, MRows * MCols * sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(N, h_b, NRows * NCols * sizeof(float), cudaMemcpyHostToDevice);

  dim3 dimBlock(blockSize, blockSize, 1);
  dim3 dimGrid(ceil(NCols / blockSize), ceil(MRows / blockSize), 1);

  // start = clock();
  // multMatCUDA<<< dimBlock, dimGrid >>>(d_a, d_b, d_c);
  // cudaMemcpy(h_result, d_c, H*W*sizeof(int), cudaMemcpyDeviceToHost);
  // end = clock();
  // gpu_time_used = ((double) (end - start)) / CLOCKS_PER_SEC;
  // printf("Tiempo invertido GPU = %lf s\n", gpu_time_used);

  start = clock();
  MultTiled<<<dimBlock, dimGrid>>>(M, N, P);
  cudaDeviceSynchronize();
  cudaMemcpy(t_result, P, PRows * PCols * sizeof(float),
             cudaMemcpyDeviceToHost);
  end = clock();
  tiles_time_used = ((double)(end - start)) / CLOCKS_PER_SEC;
  printf("Tiempo invertido GPU = %lf s\n", tiles_time_used);

  printMatrix(t_result, PRows, PCols);
  // cout<<"tiles :"<<endl;
  // printMatrix(t_result);
  // if (compareTo(t_result, h_result)) {
  //   printf("Matrices Iguales");
  // } else {
  //   printf("Matrices Diferentes");
  // }
  cudaFree(d_a);
  cudaFree(d_b);
  cudaFree(d_c);
  cudaFree(M);
  cudaFree(N);
  cudaFree(P);
  free(h_a);
  free(h_b);
  free(h_c);
  free(h_result);
  free(t_result);
  return 0;
}

	.file	"tmpxft_00341367_00000000-6_matTile.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" "
	.text
	.globl	_Z11printMatrixPfii
	.type	_Z11printMatrixPfii, @function
_Z11printMatrixPfii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L3:
	cmpl	%r14d, %r13d
	jge	.L2
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %rcx
.L6:
	cmpl	%r15d, %ebx
	jle	.L9
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	(%rcx,%r15,4), %xmm0
	movq	%rcx, 8(%rsp)
	incq	%r15
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rcx
	jmp	.L6
.L9:
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r13d
	addl	%ebx, %r12d
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L3
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z11printMatrixPfii, .-_Z11printMatrixPfii
	.globl	_Z32__device_stub__Z9MultTiledPfS_S_PfS_S_
	.type	_Z32__device_stub__Z9MultTiledPfS_S_PfS_S_, @function
_Z32__device_stub__Z9MultTiledPfS_S_PfS_S_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9MultTiledPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z32__device_stub__Z9MultTiledPfS_S_PfS_S_, .-_Z32__device_stub__Z9MultTiledPfS_S_PfS_S_
	.globl	_Z9MultTiledPfS_S_
	.type	_Z9MultTiledPfS_S_, @function
_Z9MultTiledPfS_S_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9MultTiledPfS_S_PfS_S_
	.cfi_endproc
.LFE3662:
	.size	_Z9MultTiledPfS_S_, .-_Z9MultTiledPfS_S_
	.section	.rodata.str1.1
.LC2:
	.string	"  M1  "
.LC3:
	.string	"  M2  "
.LC5:
	.string	"Tiempo invertido GPU = %lf s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$100, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$120, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$120, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	%rbp, %rcx
	xorl	%edx, %edx
	movq	%rax, %r12
.L16:
	xorl	%eax, %eax
.L17:
	movl	$0x3f800000, (%rcx,%rax,4)
	incq	%rax
	cmpq	$5, %rax
	jne	.L17
	addl	$5, %edx
	addq	$20, %rcx
	cmpl	$25, %edx
	jne	.L16
	leaq	_ZSt4cout(%rip), %r13
	leaq	.LC2(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$5, %edx
	movl	$5, %esi
	movq	%rbp, %rdi
	call	_Z11printMatrixPfii
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
.L19:
	xorl	%eax, %eax
.L20:
	movl	$0x3f800000, (%rdx,%rax,4)
	incq	%rax
	cmpq	$6, %rax
	jne	.L20
	addl	$6, %ecx
	addq	$24, %rdx
	cmpl	$30, %ecx
	jne	.L19
	leaq	.LC3(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$6, %edx
	movl	$5, %esi
	movq	%rbx, %rdi
	call	_Z11printMatrixPfii
	leaq	8(%rsp), %rdi
	movl	$100, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$120, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$120, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$100, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$120, %edx
	call	cudaMemcpy@PLT
	movl	$1, 40(%rsp)
	movabsq	$8589934594, %rax
	movq	%rax, 32(%rsp)
	movabsq	$12884901891, %rax
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	clock@PLT
	movl	52(%rsp), %ecx
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %r13
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z32__device_stub__Z9MultTiledPfS_S_PfS_S_
.L22:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$120, %edx
	call	cudaMemcpy@PLT
	call	clock@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC4(%rip), %xmm0
	call	__printf_chk@PLT
	movl	$6, %edx
	movl	$5, %esi
	movq	%r12, %rdi
	call	_Z11printMatrixPfii
	xorl	%edi, %edi
	call	cudaFree@PLT
	xorl	%edi, %edi
	call	cudaFree@PLT
	xorl	%edi, %edi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z9MultTiledPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9MultTiledPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <time.h>

using namespace std;

#define MRows 5
#define MCols 5
#define NRows 5
#define NCols 6
#define PRows 5
#define PCols 6
#define H 10
#define W 10
#define TILE_WIDTH 2

__global__ void MultTiled(float *M, float *N, float *P) {
  __shared__ int ds_M[TILE_WIDTH][TILE_WIDTH];
  __shared__ int ds_N[TILE_WIDTH][TILE_WIDTH];

  int bx = blockIdx.x;
  int by = blockIdx.y;
  int tx = threadIdx.x;
  int ty = threadIdx.y;

  int Row = by * blockDim.y + ty;
  int Col = bx * blockDim.x + tx;
  float PValue = 0.0;
  for (int p = 0; p < (TILE_WIDTH + MCols - 1) / TILE_WIDTH; p++) {

    if (p * TILE_WIDTH + tx < MCols && Row < MRows)
      ds_M[ty][tx] = M[Row * MCols + p * TILE_WIDTH + tx];
    else
      ds_M[ty][tx] = 0.0;

    if (p * TILE_WIDTH + ty < NRows && Col < NCols)
      ds_N[ty][tx] = N[(p * TILE_WIDTH + ty) * NCols + Col];
    else
      ds_N[ty][tx] = 0.0;

    __syncthreads();

    for (int n = 0; n < TILE_WIDTH; ++n)
      PValue += ds_M[ty][n] * ds_N[n][tx];

    __syncthreads();
  }

  if (Row < PRows && Col < PCols)
    P[(Row * PCols) + Col] = PValue;
}

void printMatrix(float *result, int R, int C) {
  for (int i = 0; i < R; i++) {
    for (int j = 0; j < C; j++) {
      cout << result[i * C + j] << " ";
    }
    cout << endl;
  }
}

int main() {
  clock_t start, end;
  double gpu_time_used, tiles_time_used;
  float blockSize = 2;
  float *h_a, *h_b, *h_c, *d_a, *d_b, *d_c, *h_result, *M, *N, *P, *t_result;

  // Asignar memoria en el host
  h_a = (float *)malloc(sizeof(float) * MRows * MCols);
  h_b = (float *)malloc(sizeof(float) * NRows * NCols);
  h_c = (float *)malloc(sizeof(float) * PRows * PCols);
  h_result = (float *)malloc(sizeof(float) * PRows * PCols);
  t_result = (float *)malloc(sizeof(float) * PRows * PCols);

  // Inicializar las matrices
  for (int i = 0; i < MRows; i++) {
    for (int j = 0; j < MCols; j++) {
      h_a[i * MCols + j] = 1.0;
    }
  }
  cout << "  M1  " << endl;
  printMatrix(h_a, MRows, MCols);

  for (int i = 0; i < NRows; i++) {
    for (int j = 0; j < NCols; j++) {
      h_b[i * NCols + j] = 1.0;
    }
  }

  cout << "  M2  " << endl;
  printMatrix(h_b, NRows, NCols);
  // Asignacion de memoria en el device
  // cudaMalloc(&d_a, sizeof(int) * H * W);
  // cudaMalloc(&d_b, sizeof(int) * H * W);
  // cudaMalloc(&d_c, sizeof(int) * H * W);
  hipMalloc(&M, sizeof(float) * MRows * MCols);
  hipMalloc(&N, sizeof(float) * NRows * NCols);
  hipMalloc(&P, sizeof(float) * PRows * PCols);

  // Copiar los datos del host al device
  // cudaMemcpy(d_a, h_a, H * W * sizeof(int), cudaMemcpyHostToDevice);
  // cudaMemcpy(d_b, h_b, H * W * sizeof(int), cudaMemcpyHostToDevice);

  hipMemcpy(M, h_a, MRows * MCols * sizeof(float), hipMemcpyHostToDevice);
  hipMemcpy(N, h_b, NRows * NCols * sizeof(float), hipMemcpyHostToDevice);

  dim3 dimBlock(blockSize, blockSize, 1);
  dim3 dimGrid(ceil(NCols / blockSize), ceil(MRows / blockSize), 1);

  // start = clock();
  // multMatCUDA<<< dimBlock, dimGrid >>>(d_a, d_b, d_c);
  // cudaMemcpy(h_result, d_c, H*W*sizeof(int), cudaMemcpyDeviceToHost);
  // end = clock();
  // gpu_time_used = ((double) (end - start)) / CLOCKS_PER_SEC;
  // printf("Tiempo invertido GPU = %lf s\n", gpu_time_used);

  start = clock();
  MultTiled<<<dimBlock, dimGrid>>>(M, N, P);
  hipDeviceSynchronize();
  hipMemcpy(t_result, P, PRows * PCols * sizeof(float),
             hipMemcpyDeviceToHost);
  end = clock();
  tiles_time_used = ((double)(end - start)) / CLOCKS_PER_SEC;
  printf("Tiempo invertido GPU = %lf s\n", tiles_time_used);

  printMatrix(t_result, PRows, PCols);
  // cout<<"tiles :"<<endl;
  // printMatrix(t_result);
  // if (compareTo(t_result, h_result)) {
  //   printf("Matrices Iguales");
  // } else {
  //   printf("Matrices Diferentes");
  // }
  hipFree(d_a);
  hipFree(d_b);
  hipFree(d_c);
  hipFree(M);
  hipFree(N);
  hipFree(P);
  free(h_a);
  free(h_b);
  free(h_c);
  free(h_result);
  free(t_result);
  return 0;
}

	.text
	.file	"matTile.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__MultTiledPfS_S_ # -- Begin function _Z24__device_stub__MultTiledPfS_S_
	.type	_Z24__device_stub__MultTiledPfS_S_,@function
_Z24__device_stub__MultTiledPfS_S_:     # @_Z24__device_stub__MultTiledPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9MultTiledPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__MultTiledPfS_S_, .Lfunc_end0-_Z24__device_stub__MultTiledPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixPfii             # -- Begin function _Z11printMatrixPfii
	.type	_Z11printMatrixPfii,@function
_Z11printMatrixPfii:                    # @_Z11printMatrixPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB1_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_6:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11printMatrixPfii, .Lfunc_end1-_Z11printMatrixPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$100, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$120, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$120, %edi
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
	movq	%rbx, %rcx
.LBB2_1:                                # %.preheader46
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorl	%edx, %edx
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1065353216, (%rcx,%rdx,4)      # imm = 0x3F800000
	incq	%rdx
	cmpq	$5, %rdx
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rax
	addq	$20, %rcx
	cmpq	$5, %rax
	jne	.LBB2_1
# %bb.4:
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, %rdi
	movl	$5, %esi
	movl	$5, %edx
	callq	_Z11printMatrixPfii
	xorl	%eax, %eax
	movq	%r14, %rcx
.LBB2_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	xorl	%edx, %edx
.LBB2_6:                                #   Parent Loop BB2_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1065353216, (%rcx,%rdx,4)      # imm = 0x3F800000
	incq	%rdx
	cmpq	$6, %rdx
	jne	.LBB2_6
# %bb.7:                                #   in Loop: Header=BB2_5 Depth=1
	incq	%rax
	addq	$24, %rcx
	cmpq	$5, %rax
	jne	.LBB2_5
# %bb.8:
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r14, %rdi
	movl	$5, %esi
	movl	$6, %edx
	callq	_Z11printMatrixPfii
	leaq	24(%rsp), %r12
	movl	$100, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movl	$120, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$120, %esi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$100, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$120, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %r12
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movabsq	$12884901891, %rdx              # imm = 0x300000003
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z24__device_stub__MultTiledPfS_S_
.LBB2_10:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$120, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	subq	%r12, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	%r15, %rdi
	movl	$5, %esi
	movl	$6, %edx
	callq	_Z11printMatrixPfii
	callq	hipFree
	callq	hipFree
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9MultTiledPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9MultTiledPfS_S_,@object      # @_Z9MultTiledPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z9MultTiledPfS_S_
	.p2align	3, 0x0
_Z9MultTiledPfS_S_:
	.quad	_Z24__device_stub__MultTiledPfS_S_
	.size	_Z9MultTiledPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" "
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"  M1  "
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"  M2  "
	.size	.L.str.2, 7

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Tiempo invertido GPU = %lf s\n"
	.size	.L.str.3, 30

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9MultTiledPfS_S_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__MultTiledPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9MultTiledPfS_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9MultTiledPfS_S_      ; -- Begin function _Z9MultTiledPfS_S_
	.globl	_Z9MultTiledPfS_S_
	.p2align	8
	.type	_Z9MultTiledPfS_S_,@function
_Z9MultTiledPfS_S_:                     ; @_Z9MultTiledPfS_S_
; %bb.0:
	s_load_b32 s8, s[0:1], 0x24
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 3, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s8, 16
	s_and_b32 s1, s8, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[3:4], null, s14, s1, v[1:2]
	v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v5, 2, v1
	v_cmp_gt_i32_e64 s0, 5, v2
	v_lshl_add_u32 v8, v2, 2, v2
	v_lshl_add_u32 v6, v0, 3, v5
	v_cmp_gt_i32_e64 s1, 6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 16, v6
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	s_lshl_b32 s9, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v11, s9, v1
	v_cmp_gt_u32_e32 vcc_lo, 5, v11
	s_and_b32 s11, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s10, s11
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_add_nc_u32_e32 v10, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v10, v10
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v11, s9, v0
	ds_store_b32 v6, v10
	v_cmp_gt_u32_e32 vcc_lo, 5, v11
	s_and_b32 s10, s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s10
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mad_u64_u32 v[12:13], null, v11, 6, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[10:11], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v12, v10
.LBB0_5:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s10, 0
	s_mov_b32 s9, -1
	ds_store_b32 v7, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_6:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshl_add_u32 v10, s10, 2, v9
	v_lshl_add_u32 v11, s10, 3, v5
	s_mov_b32 s10, 1
	ds_load_b32 v10, v10
	ds_load_b32 v11, v11 offset:16
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v10, v11, v10
	v_cndmask_b32_e64 v11, 0, 1, s9
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ne_u32_e32 vcc_lo, 1, v11
	v_cvt_f32_i32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v10
	s_cbranch_vccz .LBB0_6
; %bb.7:                                ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, 3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_1
; %bb.8:
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_mad_u64_u32 v[0:1], null, v2, 6, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9MultTiledPfS_S_
		.amdhsa_group_segment_fixed_size 32
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9MultTiledPfS_S_, .Lfunc_end0-_Z9MultTiledPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 548
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 32
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9MultTiledPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9MultTiledPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
