#include "includes.h"

#define COUNTERS 66
#define C_SIZE 64
#define C_STOP 65 // == C_SIZE+1
#define N 4224 // == COUNTERS*C_SIZE
#define N2 17842176 // == N*N

#define CUDA_ERROR_CHECK

#define cudaSafeCall(error) __cudaSafeCall(error, __FILE__, __LINE__)
#define cudaCheckErrors() __cudaCheckErrors(__FILE__, __LINE__)

__device__ inline int uniq(const int* M, int i, int* counters) {
for (int j = 1; j <= i - 1; j++) {
int a = (j - 1) * C_SIZE + counters[j-1];
int b = (i - 1) * C_SIZE + counters[i-1];
if (M[(a - 1) + N * (b - 1)] == 0)
return 1;
}
return 0;
}
__global__ void searcher(const int* M, int* res, size_t* itersNum) {
int partNumber = threadIdx.x + blockIdx.x * blockDim.x;
// initialize counters vector
int counters[COUNTERS];
for (int i = 0; i < COUNTERS; i++)
counters[i] = 1;

// go to selected part
counters[0] = 25;
counters[1] = 5;
counters[2] = 1;
counters[3] = 3;
counters[4] = 4;
counters[5] = 7;
counters[6] = 9;
counters[7] = 2;
counters[8] = 10;
counters[9] = 8;
counters[10] = (partNumber - 1) / 64 + 1;
counters[11] = (partNumber - 1) % 64 + 1;

size_t iter = 0;
size_t current = 1;
while (1) {
iter++;

// stop if search in the selected part is finished
if (counters[10] != (partNumber - 1) / 64 + 1 || counters[11] != (partNumber - 1) % 64 + 1) {
for (int i = 0; i < COUNTERS; i++)
res[partNumber * COUNTERS + i] = -1;
itersNum[partNumber] = iter;
break;
}

// first subspace is always good
if (current == 1)
current = 2;

// print intermediate state
// if (current == 13 && iter > 1000) {
//     fprintf(f, "Current state of part number %d:", partNumber);
//     for (int i = 0; i < COUNTERS; i++)
//         fprintf(f, " %d", counters[i]);
//     fprintf(f, "\nNumber of iterations: %f\n\n", iter);
//     fflush(f);
// }

for (int i = current; i <= COUNTERS; i++) {
if (uniq(M, i, counters) == 1) {
counters[i-1]++;
current = i;
while (counters[current-1] == C_STOP) {
counters[current - 1] = 1;
counters[current - 2] = counters[current - 2] + 1;
current--;
}
break;
}
}

if (current == COUNTERS && uniq(M, current, counters) == 0) {
for (int i = 0; i < COUNTERS; i++)
res[partNumber * COUNTERS + i] = counters[i];
itersNum[partNumber] = iter;
break;
}
}
}
	.file	"tmpxft_0025cd64_00000000-6_searcher.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2011:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2011:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z8searcherPKiPiPmPKiPiPm
	.type	_Z32__device_stub__Z8searcherPKiPiPmPKiPiPm, @function
_Z32__device_stub__Z8searcherPKiPiPmPKiPiPm:
.LFB2033:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8searcherPKiPiPm(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z32__device_stub__Z8searcherPKiPiPmPKiPiPm, .-_Z32__device_stub__Z8searcherPKiPiPmPKiPiPm
	.globl	_Z8searcherPKiPiPm
	.type	_Z8searcherPKiPiPm, @function
_Z8searcherPKiPiPm:
.LFB2034:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z8searcherPKiPiPmPKiPiPm
	.cfi_endproc
.LFE2034:
	.size	_Z8searcherPKiPiPm, .-_Z8searcherPKiPiPm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z8searcherPKiPiPm"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8searcherPKiPiPm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"

#define COUNTERS 66
#define C_SIZE 64
#define C_STOP 65 // == C_SIZE+1
#define N 4224 // == COUNTERS*C_SIZE
#define N2 17842176 // == N*N

#define CUDA_ERROR_CHECK

#define cudaSafeCall(error) __cudaSafeCall(error, __FILE__, __LINE__)
#define cudaCheckErrors() __cudaCheckErrors(__FILE__, __LINE__)

__device__ inline int uniq(const int* M, int i, int* counters) {
for (int j = 1; j <= i - 1; j++) {
int a = (j - 1) * C_SIZE + counters[j-1];
int b = (i - 1) * C_SIZE + counters[i-1];
if (M[(a - 1) + N * (b - 1)] == 0)
return 1;
}
return 0;
}
__global__ void searcher(const int* M, int* res, size_t* itersNum) {
int partNumber = threadIdx.x + blockIdx.x * blockDim.x;
// initialize counters vector
int counters[COUNTERS];
for (int i = 0; i < COUNTERS; i++)
counters[i] = 1;

// go to selected part
counters[0] = 25;
counters[1] = 5;
counters[2] = 1;
counters[3] = 3;
counters[4] = 4;
counters[5] = 7;
counters[6] = 9;
counters[7] = 2;
counters[8] = 10;
counters[9] = 8;
counters[10] = (partNumber - 1) / 64 + 1;
counters[11] = (partNumber - 1) % 64 + 1;

size_t iter = 0;
size_t current = 1;
while (1) {
iter++;

// stop if search in the selected part is finished
if (counters[10] != (partNumber - 1) / 64 + 1 || counters[11] != (partNumber - 1) % 64 + 1) {
for (int i = 0; i < COUNTERS; i++)
res[partNumber * COUNTERS + i] = -1;
itersNum[partNumber] = iter;
break;
}

// first subspace is always good
if (current == 1)
current = 2;

// print intermediate state
// if (current == 13 && iter > 1000) {
//     fprintf(f, "Current state of part number %d:", partNumber);
//     for (int i = 0; i < COUNTERS; i++)
//         fprintf(f, " %d", counters[i]);
//     fprintf(f, "\nNumber of iterations: %f\n\n", iter);
//     fflush(f);
// }

for (int i = current; i <= COUNTERS; i++) {
if (uniq(M, i, counters) == 1) {
counters[i-1]++;
current = i;
while (counters[current-1] == C_STOP) {
counters[current - 1] = 1;
counters[current - 2] = counters[current - 2] + 1;
current--;
}
break;
}
}

if (current == COUNTERS && uniq(M, current, counters) == 0) {
for (int i = 0; i < COUNTERS; i++)
res[partNumber * COUNTERS + i] = counters[i];
itersNum[partNumber] = iter;
break;
}
}
}
	.text
	.file	"searcher.hip"
	.globl	_Z23__device_stub__searcherPKiPiPm # -- Begin function _Z23__device_stub__searcherPKiPiPm
	.type	_Z23__device_stub__searcherPKiPiPm,@function
_Z23__device_stub__searcherPKiPiPm:     # @_Z23__device_stub__searcherPKiPiPm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8searcherPKiPiPm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__searcherPKiPiPm, .Lfunc_end0-_Z23__device_stub__searcherPKiPiPm
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8searcherPKiPiPm, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8searcherPKiPiPm,@object      # @_Z8searcherPKiPiPm
	.section	.rodata,"a",@progbits
	.globl	_Z8searcherPKiPiPm
	.p2align	3, 0x0
_Z8searcherPKiPiPm:
	.quad	_Z23__device_stub__searcherPKiPiPm
	.size	_Z8searcherPKiPiPm, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z8searcherPKiPiPm"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__searcherPKiPiPm
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8searcherPKiPiPm
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8searcherPKiPiPm      ; -- Begin function _Z8searcherPKiPiPm
	.globl	_Z8searcherPKiPiPm
	.p2align	8
	.type	_Z8searcherPKiPiPm,@function
_Z8searcherPKiPiPm:                     ; @_Z8searcherPKiPiPm
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_mov_b32_e32 v1, 1
	s_mov_b32 s3, 0
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s4, s3, 16
	s_add_i32 s3, s3, 4
	scratch_store_b32 off, v1, s4
	s_cmpk_eq_i32 s3, 0x108
	s_cbranch_scc0 .LBB0_1
; %bb.2:                                ; %.lr.ph84
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, 0xffff, s2
	v_mov_b32_e32 v2, 1
	v_mad_u64_u32 v[8:9], null, s15, s2, v[0:1]
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_dual_mov_b32 v14, 4 :: v_dual_mov_b32 v15, 7
	v_dual_mov_b32 v17, 2 :: v_dual_mov_b32 v4, 10
	v_or_b32_e64 v12, 16, 4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v1, 5 :: v_dual_add_nc_u32 v6, -1, v8
	v_add_nc_u32_e64 v13, 16, -4
	s_mov_b64 s[8:9], 1
	s_mov_b32 s1, 0
	v_ashrrev_i32_e32 v0, 31, v6
	s_movk_i32 s11, 0x1080
                                        ; implicit-def: $sgpr10
                                        ; implicit-def: $sgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 26, v0
	v_dual_mov_b32 v0, 25 :: v_dual_add_nc_u32 v7, v6, v3
	v_dual_mov_b32 v16, 9 :: v_dual_mov_b32 v3, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_and_b32_e32 v9, 0xffffffc0, v7
	v_ashrrev_i32_e32 v7, 6, v7
	v_mov_b32_e32 v5, 8
	s_clause 0x1
	scratch_store_b128 off, v[0:3], off offset:16
	scratch_store_b128 off, v[14:17], off offset:32
	v_add_nc_u32_e64 v14, 16, -8
	v_sub_nc_u32_e32 v9, v6, v9
	v_add_nc_u32_e32 v6, 1, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 1, v9
	v_mov_b32_e32 v9, 1
	v_mov_b32_e32 v10, 0
	scratch_store_b128 off, v[4:7], off offset:48
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;       Child Loop BB0_8 Depth 3
                                        ;     Child Loop BB0_19 Depth 2
                                        ;     Child Loop BB0_26 Depth 2
	v_cmp_ne_u64_e32 vcc_lo, 1, v[9:10]
	s_mov_b32 s13, exec_lo
	v_cndmask_b32_e32 v0, 2, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x43, v0
	s_cbranch_execz .LBB0_23
; %bb.4:                                ; %.lr.ph70
                                        ;   in Loop: Header=BB0_3 Depth=1
	scratch_load_b32 v15, off, off offset:16
	v_dual_cndmask_b32 v1, 0, v10 :: v_dual_mov_b32 v10, v0
	v_lshl_add_u32 v16, v0, 6, 0xffffffc0
	v_lshl_add_u32 v17, v0, 2, v14
	v_ashrrev_i32_e32 v11, 31, v0
	v_mov_b32_e32 v18, v0
	s_mov_b32 s14, 0
                                        ; implicit-def: $sgpr15
                                        ; implicit-def: $sgpr16
.LBB0_5:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_8 Depth 3
	v_mov_b32_e32 v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v9, v18 :: v_dual_mov_b32 v4, v11
	v_dual_mov_b32 v5, v17 :: v_dual_mov_b32 v10, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 1, v9
	s_cbranch_execz .LBB0_13
; %bb.6:                                ; %.lr.ph.i
                                        ;   in Loop: Header=BB0_5 Depth=2
	v_lshl_add_u32 v10, v9, 2, v13
	s_mov_b32 s18, -1
	s_mov_b32 s17, exec_lo
	scratch_load_b32 v10, v10, off
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v11, v9, 6, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, 0x1080, v11
	v_add3_u32 v17, v11, v15, 0xfffbcf7f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v18, 31, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v17, vcc_lo, s4, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v18, vcc_lo
	global_load_b32 v11, v[17:18], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 0, v11
	s_cbranch_execz .LBB0_12
; %bb.7:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_5 Depth=2
	v_add_nc_u32_e32 v17, v10, v16
	s_mov_b32 s19, 2
	s_mov_b32 s18, 0
                                        ; implicit-def: $sgpr20
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v17, s11, 0xffffffffffffefbf
	v_mov_b32_e32 v11, v12
.LBB0_8:                                ; %.lr.ph
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_or_b32 s20, s20, exec_lo
	s_mov_b32 s21, exec_lo
                                        ; implicit-def: $sgpr22
	v_cmpx_ne_u32_e64 s19, v9
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=3
	scratch_load_b32 v17, v11, off
	v_add_nc_u32_e32 v11, 4, v11
	s_and_not1_b32 s20, s20, exec_lo
	s_add_i32 s22, s19, 1
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v17, v10, v17
	v_add_nc_u32_e32 v10, 64, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v18, 31, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v17, vcc_lo, s4, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v18, vcc_lo
	global_load_b32 v17, v[17:18], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v17
	s_and_b32 s23, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s20, s20, s23
.LBB0_10:                               ; %Flow191
                                        ;   in Loop: Header=BB0_8 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	v_mov_b32_e32 v17, s19
	s_and_b32 s21, exec_lo, s20
	s_mov_b32 s19, s22
	s_or_b32 s18, s21, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB0_8
; %bb.11:                               ; %._crit_edge.loopexit.i.loopexit
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	v_cmp_lt_i32_e32 vcc_lo, v17, v9
	s_or_not1_b32 s18, vcc_lo, exec_lo
.LBB0_12:                               ; %Flow192
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	v_cndmask_b32_e64 v10, 0, 1, s18
.LBB0_13:                               ; %Flow193
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	s_mov_b32 s0, -1
	s_or_b32 s16, s16, exec_lo
                                        ; implicit-def: $vgpr18
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr10_vgpr11
	s_and_saveexec_b32 s17, vcc_lo
; %bb.14:                               ;   in Loop: Header=BB0_5 Depth=2
	v_cmp_lt_i32_e32 vcc_lo, 0x41, v9
	v_add_co_u32 v10, s0, v3, 1
	v_add_nc_u32_e32 v18, 1, v9
	v_add_nc_u32_e32 v16, 64, v16
	v_add_nc_u32_e32 v17, 4, v5
	v_add_co_ci_u32_e64 v11, s0, 0, v4, s0
	s_and_not1_b32 s16, s16, exec_lo
	s_or_not1_b32 s0, vcc_lo, exec_lo
; %bb.15:                               ; %Flow194
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s14, s0, s14
	s_and_not1_b32 s0, s15, exec_lo
	s_and_b32 s15, s16, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s15, s0, s15
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_5
; %bb.16:                               ; %loop.exit.guard183
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_and_saveexec_b32 s0, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s14, exec_lo, s0
	s_cbranch_execz .LBB0_22
; %bb.17:                               ;   in Loop: Header=BB0_3 Depth=1
	v_lshl_add_u32 v0, v9, 2, v13
	v_ashrrev_i32_e32 v10, 31, v9
	s_mov_b32 s15, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 1, v1
	scratch_store_b32 v0, v1, off
	v_cmpx_eq_u32_e32 0x41, v1
	s_cbranch_execz .LBB0_21
; %bb.18:                               ; %.lr.ph72.preheader
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s16, 0
.LBB0_19:                               ; %.lr.ph72
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	scratch_load_b32 v0, v5, off
	v_add_co_u32 v3, vcc_lo, v3, -1
	v_add_co_ci_u32_e32 v4, vcc_lo, -1, v4, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e64 s0, 0x41, v1
	scratch_store_b64 v5, v[1:2], off
	v_add_nc_u32_e32 v5, -4, v5
	s_or_b32 s16, s0, s16
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_19
; %bb.20:                               ; %Flow188
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v9, v3
.LBB0_21:                               ; %Flow189
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v0, v9 :: v_dual_mov_b32 v1, v10
.LBB0_22:                               ; %Flow190
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0
.LBB0_23:                               ; %Flow195
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u64_e64 s0, 0x42, v[9:10]
	s_mov_b32 s13, exec_lo
                                        ; implicit-def: $sgpr15
	v_cmpx_eq_u64_e32 0x42, v[9:10]
	s_cbranch_execz .LBB0_32
; %bb.24:                               ;   in Loop: Header=BB0_3 Depth=1
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:276
	scratch_load_b32 v1, off, off offset:16
	s_mov_b32 s16, -1
	s_mov_b32 s14, exec_lo
                                        ; implicit-def: $sgpr15
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v0, 0x1080, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v0, v1, 0x10c0f7f
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 0, v1
	s_cbranch_execz .LBB0_31
; %bb.25:                               ; %.lr.ph76.preheader
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_dual_mov_b32 v1, v12 :: v_dual_add_nc_u32 v0, 0x10c0fbf, v0
	s_mov_b32 s17, 1
	s_mov_b32 s15, 0
                                        ; implicit-def: $sgpr16
.LBB0_26:                               ; %.lr.ph76
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_or_b32 s16, s16, exec_lo
	s_cmpk_eq_i32 s17, 0x41
	s_cbranch_scc1 .LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_26 Depth=2
	scratch_load_b32 v3, v1, off
	v_add_nc_u32_e32 v1, 4, v1
	s_and_not1_b32 s16, s16, exec_lo
	s_add_i32 s18, s17, 1
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v0, v3
	v_add_nc_u32_e32 v0, 64, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_and_b32 s19, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s16, s16, s19
	s_branch .LBB0_29
.LBB0_28:                               ;   in Loop: Header=BB0_26 Depth=2
                                        ; implicit-def: $sgpr18
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr1
.LBB0_29:                               ; %Flow187
                                        ;   in Loop: Header=BB0_26 Depth=2
	v_mov_b32_e32 v3, s17
	s_and_b32 s19, exec_lo, s16
	s_mov_b32 s17, s18
	s_or_b32 s15, s19, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_26
; %bb.30:                               ; %_Z4uniqPKiiPi.exit58
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	v_cmp_gt_u32_e32 vcc_lo, 0x41, v3
	s_mov_b32 s15, -1
	s_or_not1_b32 s16, vcc_lo, exec_lo
.LBB0_31:                               ; %Flow197
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s14, s16, exec_lo
	s_or_b32 s0, s0, s14
.LBB0_32:                               ; %Flow196
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
	s_and_not1_b32 s12, s12, exec_lo
	s_and_b32 s13, s15, exec_lo
	s_mov_b32 s14, -1
	s_or_b32 s12, s12, s13
                                        ; kill: def $vgpr3_vgpr4 killed $sgpr0_sgpr1 killed $exec
	s_and_saveexec_b32 s13, s0
	s_cbranch_execz .LBB0_34
; %bb.33:                               ; %.critedge
                                        ;   in Loop: Header=BB0_3 Depth=1
	scratch_load_b64 v[0:1], off, off offset:56
	s_add_u32 s16, s8, 1
	s_addc_u32 s17, s9, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v3, s16 :: v_dual_mov_b32 v4, s17
	s_and_not1_b32 s12, s12, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v0, v6
	v_cmp_ne_u32_e64 s0, v1, v7
	v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
	s_mov_b64 s[8:9], s[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_or_not1_b32 s14, s0, exec_lo
.LBB0_34:                               ; %Flow198
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s14
	s_or_b32 s1, s0, s1
	s_and_not1_b32 s0, s10, exec_lo
	s_and_b32 s10, s12, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s10, s0, s10
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_3
; %bb.35:                               ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s1
	v_mul_lo_u32 v5, 0x42, v8
	s_xor_b32 s0, s10, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_waitcnt lgkmcnt(0)
	s_xor_b32 s4, exec_lo, s1
	s_cbranch_execz .LBB0_39
; %bb.36:                               ; %.preheader60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_mov_b64 s[0:1], 0
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v6, vcc_lo
	v_mov_b32_e32 v6, -1
.LBB0_37:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v2, s0
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v5, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s0, 0x108
	global_store_b32 v[9:10], v6, off
	s_cbranch_scc0 .LBB0_37
; %bb.38:
                                        ; implicit-def: $vgpr5
.LBB0_39:                               ; %Flow185
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_43
; %bb.40:                               ; %.preheader
	v_ashrrev_i32_e32 v6, 31, v5
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB0_41:                               ; =>This Inner Loop Header: Depth=1
	s_add_i32 s4, s1, 16
	s_add_i32 s1, s1, 4
	scratch_load_b32 v4, off, s4
	s_cmpk_eq_i32 s1, 0x108
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v4, off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cbranch_scc0 .LBB0_41
; %bb.42:
	v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v3, v0
.LBB0_43:                               ; %Flow186
	s_or_b32 exec_lo, exec_lo, s0
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[8:9]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8searcherPKiPiPm
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 288
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8searcherPKiPiPm, .Lfunc_end0-_Z8searcherPKiPiPm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1748
; NumSgprs: 26
; NumVgprs: 19
; ScratchSize: 288
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8searcherPKiPiPm
    .private_segment_fixed_size: 288
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z8searcherPKiPiPm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
