#include <stdio.h>
#include <assert.h>

#define N 64

inline cudaError_t checkCuda(cudaError_t result) {
    if (result != cudaSuccess) {
        fprintf(stderr, "CUDA Runtime Error: %s\n", cudaGetErrorString(result));
        assert(result == cudaSuccess);
    }
    return result;
}

__global__ void matrixMulGPU(int *a, int *b, int *c) {
    dim3 stride(blockDim.x * gridDim.x, blockDim.y * gridDim.y);

    // perform stride avoiding out of bound access
    for (int row = blockIdx.x * blockDim.x + threadIdx.x; row < N; row += stride.x) {
        for(int col = blockIdx.y * blockDim.y + threadIdx.y; col < N; col += stride.y) {
            // perform matrix multiplication
            int val = 0;
            for (int k = 0; k < N; ++k) val += a[row * N + k] * b[k * N + col];
            c[row * N + col] = val;
        }
    }
}

/*
 * This CPU function already works, and will run to create a solution matrix
 * against which to verify your work building out the matrixMulGPU kernel.
 */

void matrixMulCPU(int *a, int *b, int *c) {
    int val = 0;

    for (int row = 0; row < N; ++row)
        for (int col = 0; col < N; ++col) {
            val = 0;
            for (int k = 0; k < N; ++k) val += a[row * N + k] * b[k * N + col];
            c[row * N + col] = val;
        }
}

int main() {
    int *a, *b, *c_cpu, *c_gpu;  // Allocate a solution matrix for both the CPU
                                 // and the GPU operations

    int size = N * N * sizeof(int);  // Number of bytes of an N x N matrix

    // Allocate memory
    checkCuda(cudaMallocManaged(&a, size));
    checkCuda(cudaMallocManaged(&b, size));
    checkCuda(cudaMallocManaged(&c_cpu, size));
    checkCuda(cudaMallocManaged(&c_gpu, size));

    // Initialize memory; create 2D matrices
    for (int row = 0; row < N; ++row)
        for (int col = 0; col < N; ++col) {
            a[row * N + col] = row;
            b[row * N + col] = col + 2;
            c_cpu[row * N + col] = 0;
            c_gpu[row * N + col] = 0;
        }

    /*
     * Assign `threads_per_block` and `number_of_blocks` 2D values
     * that can be used in matrixMulGPU above.
     */

    // 256 threads per block
    dim3 threads_per_block(16, 16);
    // enough blocks in each dimension to perform the whole calculation
    dim3 number_of_blocks(
        (N + threads_per_block.x - 1) / threads_per_block.x, 
        (N + threads_per_block.y - 1) / threads_per_block.y
    );
    matrixMulGPU<<<number_of_blocks, threads_per_block>>>(a, b, c_gpu);
    checkCuda(cudaGetLastError());

    checkCuda(cudaDeviceSynchronize());

    // Call the CPU version to check our work
    matrixMulCPU(a, b, c_cpu);

    // Compare the two answers to make sure they are equal
    bool error = false;
    for (int row = 0; row < N && !error; ++row)
        for (int col = 0; col < N && !error; ++col)
            if (c_cpu[row * N + col] != c_gpu[row * N + col]) {
                printf("FOUND ERROR at c[%d][%d]\n", row, col);
                error = true;
                break;
            }
    if (!error) printf("Success!\n");

    // Free all our allocated memory
    checkCuda(cudaFree(a));
    checkCuda(cudaFree(b));
    checkCuda(cudaFree(c_cpu));
    checkCuda(cudaFree(c_gpu));
}

	.file	"tmpxft_00337536_00000000-6_11.challenge.matrix-multiply-2d.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA Runtime Error: %s\n"
	.text
	.type	_Z9checkCuda9cudaError.isra.0, @function
_Z9checkCuda9cudaError.isra.0:
.LFB2175:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	popq	%r8
	.cfi_def_cfa_offset 8
	movq	%rax, %rcx
	leaq	.LC0(%rip), %rdx
	xorl	%eax, %eax
	jmp	__fprintf_chk@PLT
.L2:
	ret
	.cfi_endproc
.LFE2175:
	.size	_Z9checkCuda9cudaError.isra.0, .-_Z9checkCuda9cudaError.isra.0
	.globl	_Z12matrixMulCPUPiS_S_
	.type	_Z12matrixMulCPUPiS_S_, @function
_Z12matrixMulCPUPiS_S_:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %r8
	xorl	%eax, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
.L9:
	xorl	%ecx, %ecx
	leaq	(%r8,%rax), %rbp
	leaq	(%rdx,%rax), %rbx
.L13:
	leaq	(%rsi,%rcx,4), %r10
	xorl	%edi, %edi
	xorl	%r9d, %r9d
.L10:
	movl	0(%rbp,%rdi,4), %r11d
	imull	(%r10), %r11d
	incq	%rdi
	addq	$256, %r10
	addl	%r11d, %r9d
	cmpq	$64, %rdi
	jne	.L10
	movl	%r9d, (%rbx,%rcx,4)
	incq	%rcx
	cmpq	$64, %rcx
	jne	.L13
	addq	$256, %rax
	cmpq	$16384, %rax
	jne	.L9
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z12matrixMulCPUPiS_S_, .-_Z12matrixMulCPUPiS_S_
	.globl	_Z36__device_stub__Z12matrixMulGPUPiS_S_PiS_S_
	.type	_Z36__device_stub__Z12matrixMulGPUPiS_S_PiS_S_, @function
_Z36__device_stub__Z12matrixMulGPUPiS_S_PiS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12matrixMulGPUPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L16:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z36__device_stub__Z12matrixMulGPUPiS_S_PiS_S_, .-_Z36__device_stub__Z12matrixMulGPUPiS_S_PiS_S_
	.globl	_Z12matrixMulGPUPiS_S_
	.type	_Z12matrixMulGPUPiS_S_, @function
_Z12matrixMulGPUPiS_S_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z12matrixMulGPUPiS_S_PiS_S_
	.cfi_endproc
.LFE2055:
	.size	_Z12matrixMulGPUPiS_S_, .-_Z12matrixMulGPUPiS_S_
	.section	.rodata.str1.1
.LC1:
	.string	"FOUND ERROR at c[%d][%d]\n"
.LC2:
	.string	"Success!\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$1, %edx
	movl	$16384, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$1, %edx
	movl	$16384, %esi
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$1, %edx
	movl	$16384, %esi
	leaq	16(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$1, %edx
	leaq	24(%rsp), %rdi
	movl	$16384, %esi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	(%rsp), %rdi
	movq	8(%rsp), %r8
	xorl	%edx, %edx
	movq	16(%rsp), %r9
	movq	24(%rsp), %r10
.L22:
	movq	%rdx, %rax
	movl	%edx, %esi
	movl	$2, %ecx
	salq	$8, %rax
.L23:
	movl	%esi, (%rdi,%rax)
	xorl	%r11d, %r11d
	movl	%ecx, (%r8,%rax)
	incl	%ecx
	movl	%r11d, (%r9,%rax)
	movl	%r11d, (%r10,%rax)
	addq	$4, %rax
	cmpl	$66, %ecx
	jne	.L23
	incq	%rdx
	cmpq	$64, %rdx
	jne	.L22
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$17179869188, %rdi
	movl	$1, 52(%rsp)
	movabsq	$68719476752, %rdx
	movq	%rdi, 44(%rsp)
	movq	%rdx, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z36__device_stub__Z12matrixMulGPUPiS_S_PiS_S_
.L25:
	call	cudaGetLastError@PLT
	xorl	%ebp, %ebp
	xorl	%ebx, %ebx
	leaq	.LC1(%rip), %r12
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z12matrixMulCPUPiS_S_
.L26:
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	%rbp, %rax
	xorl	%ecx, %ecx
.L29:
	movl	(%rdx,%rax), %edi
	cmpl	%edi, (%rsi,%rax)
	je	.L27
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movb	$1, %al
	jmp	.L28
.L27:
	incl	%ecx
	addq	$4, %rax
	cmpl	$64, %ecx
	jne	.L29
	xorl	%eax, %eax
.L28:
	incl	%ebx
	addq	$256, %rbp
	cmpl	$63, %ebx
	jg	.L30
	testb	%al, %al
	je	.L26
	jmp	.L31
.L30:
	testb	%al, %al
	jne	.L31
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
.L31:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z12matrixMulGPUPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12matrixMulGPUPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>

#define N 64

inline hipError_t checkCuda(hipError_t result) {
    if (result != hipSuccess) {
        fprintf(stderr, "CUDA Runtime Error: %s\n", hipGetErrorString(result));
        assert(result == hipSuccess);
    }
    return result;
}

__global__ void matrixMulGPU(int *a, int *b, int *c) {
    dim3 stride(blockDim.x * gridDim.x, blockDim.y * gridDim.y);

    // perform stride avoiding out of bound access
    for (int row = blockIdx.x * blockDim.x + threadIdx.x; row < N; row += stride.x) {
        for(int col = blockIdx.y * blockDim.y + threadIdx.y; col < N; col += stride.y) {
            // perform matrix multiplication
            int val = 0;
            for (int k = 0; k < N; ++k) val += a[row * N + k] * b[k * N + col];
            c[row * N + col] = val;
        }
    }
}

/*
 * This CPU function already works, and will run to create a solution matrix
 * against which to verify your work building out the matrixMulGPU kernel.
 */

void matrixMulCPU(int *a, int *b, int *c) {
    int val = 0;

    for (int row = 0; row < N; ++row)
        for (int col = 0; col < N; ++col) {
            val = 0;
            for (int k = 0; k < N; ++k) val += a[row * N + k] * b[k * N + col];
            c[row * N + col] = val;
        }
}

int main() {
    int *a, *b, *c_cpu, *c_gpu;  // Allocate a solution matrix for both the CPU
                                 // and the GPU operations

    int size = N * N * sizeof(int);  // Number of bytes of an N x N matrix

    // Allocate memory
    checkCuda(hipMallocManaged(&a, size));
    checkCuda(hipMallocManaged(&b, size));
    checkCuda(hipMallocManaged(&c_cpu, size));
    checkCuda(hipMallocManaged(&c_gpu, size));

    // Initialize memory; create 2D matrices
    for (int row = 0; row < N; ++row)
        for (int col = 0; col < N; ++col) {
            a[row * N + col] = row;
            b[row * N + col] = col + 2;
            c_cpu[row * N + col] = 0;
            c_gpu[row * N + col] = 0;
        }

    /*
     * Assign `threads_per_block` and `number_of_blocks` 2D values
     * that can be used in matrixMulGPU above.
     */

    // 256 threads per block
    dim3 threads_per_block(16, 16);
    // enough blocks in each dimension to perform the whole calculation
    dim3 number_of_blocks(
        (N + threads_per_block.x - 1) / threads_per_block.x, 
        (N + threads_per_block.y - 1) / threads_per_block.y
    );
    matrixMulGPU<<<number_of_blocks, threads_per_block>>>(a, b, c_gpu);
    checkCuda(hipGetLastError());

    checkCuda(hipDeviceSynchronize());

    // Call the CPU version to check our work
    matrixMulCPU(a, b, c_cpu);

    // Compare the two answers to make sure they are equal
    bool error = false;
    for (int row = 0; row < N && !error; ++row)
        for (int col = 0; col < N && !error; ++col)
            if (c_cpu[row * N + col] != c_gpu[row * N + col]) {
                printf("FOUND ERROR at c[%d][%d]\n", row, col);
                error = true;
                break;
            }
    if (!error) printf("Success!\n");

    // Free all our allocated memory
    checkCuda(hipFree(a));
    checkCuda(hipFree(b));
    checkCuda(hipFree(c_cpu));
    checkCuda(hipFree(c_gpu));
}

	.text
	.file	"11.challenge.matrix-multiply-2d.hip"
	.globl	_Z27__device_stub__matrixMulGPUPiS_S_ # -- Begin function _Z27__device_stub__matrixMulGPUPiS_S_
	.type	_Z27__device_stub__matrixMulGPUPiS_S_,@function
_Z27__device_stub__matrixMulGPUPiS_S_:  # @_Z27__device_stub__matrixMulGPUPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12matrixMulGPUPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__matrixMulGPUPiS_S_, .Lfunc_end0-_Z27__device_stub__matrixMulGPUPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z12matrixMulCPUPiS_S_          # -- Begin function _Z12matrixMulCPUPiS_S_
	.type	_Z12matrixMulCPUPiS_S_,@function
_Z12matrixMulCPUPiS_S_:                 # @_Z12matrixMulCPUPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
.LBB1_1:                                # %.preheader19
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
                                        #       Child Loop BB1_3 Depth 3
	movq	%rax, %rcx
	shlq	$8, %rcx
	addq	%rdx, %rcx
	movq	%rsi, %r8
	xorl	%r9d, %r9d
.LBB1_2:                                # %.preheader
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_3 Depth 3
	xorl	%r10d, %r10d
	movq	%r8, %r11
	xorl	%ebx, %ebx
.LBB1_3:                                #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r11), %ebp
	imull	(%rdi,%r10,4), %ebp
	addl	%ebp, %ebx
	incq	%r10
	addq	$256, %r11                      # imm = 0x100
	cmpq	$64, %r10
	jne	.LBB1_3
# %bb.4:                                #   in Loop: Header=BB1_2 Depth=2
	movl	%ebx, (%rcx,%r9,4)
	incq	%r9
	addq	$4, %r8
	cmpq	$64, %r9
	jne	.LBB1_2
# %bb.5:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%rax
	addq	$256, %rdi                      # imm = 0x100
	cmpq	$64, %rax
	jne	.LBB1_1
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z12matrixMulCPUPiS_S_, .Lfunc_end1-_Z12matrixMulCPUPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	leaq	32(%rsp), %rdi
	movl	$16384, %esi                    # imm = 0x4000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB2_1
.LBB2_2:                                # %_Z9checkCuda10hipError_t.exit
	leaq	24(%rsp), %rdi
	movl	$16384, %esi                    # imm = 0x4000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB2_3
.LBB2_4:                                # %_Z9checkCuda10hipError_t.exit45
	leaq	16(%rsp), %rdi
	movl	$16384, %esi                    # imm = 0x4000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB2_5
.LBB2_6:                                # %_Z9checkCuda10hipError_t.exit47
	leaq	8(%rsp), %rdi
	movl	$16384, %esi                    # imm = 0x4000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB2_7
.LBB2_8:                                # %_Z9checkCuda10hipError_t.exit49
	movq	32(%rsp), %rax
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	xorl	%edi, %edi
	movl	$256, %r8d                      # imm = 0x100
	xorl	%r9d, %r9d
.LBB2_9:                                # %.preheader64
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_10 Depth 2
	xorl	%r10d, %r10d
.LBB2_10:                               #   Parent Loop BB2_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%r9d, (%rax,%r10,4)
	leal	2(%r10), %r11d
	movl	%r11d, (%rcx,%r10,4)
	movl	%edi, (%rdx,%r10,4)
	movl	%edi, (%rsi,%r10,4)
	incq	%r10
	cmpq	$64, %r10
	jne	.LBB2_10
# %bb.11:                               #   in Loop: Header=BB2_9 Depth=1
	incq	%r9
	addq	%r8, %rsi
	addq	%r8, %rdx
	addq	%r8, %rcx
	addq	%r8, %rax
	cmpq	$64, %r9
	jne	.LBB2_9
# %bb.12:
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.13:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z27__device_stub__matrixMulGPUPiS_S_
.LBB2_14:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_15
.LBB2_16:                               # %_Z9checkCuda10hipError_t.exit51
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_17
.LBB2_18:                               # %_Z9checkCuda10hipError_t.exit53
	movq	32(%rsp), %rax
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	xorl	%esi, %esi
.LBB2_19:                               # %.preheader19.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_20 Depth 2
                                        #       Child Loop BB2_21 Depth 3
	movq	%rsi, %rdi
	shlq	$8, %rdi
	addq	%rdx, %rdi
	movq	%rcx, %r8
	xorl	%r9d, %r9d
.LBB2_20:                               # %.preheader.i
                                        #   Parent Loop BB2_19 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_21 Depth 3
	xorl	%r10d, %r10d
	movq	%r8, %r11
	xorl	%ebx, %ebx
.LBB2_21:                               #   Parent Loop BB2_19 Depth=1
                                        #     Parent Loop BB2_20 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r11), %ebp
	imull	(%rax,%r10,4), %ebp
	addl	%ebp, %ebx
	incq	%r10
	addq	$256, %r11                      # imm = 0x100
	cmpq	$64, %r10
	jne	.LBB2_21
# %bb.22:                               #   in Loop: Header=BB2_20 Depth=2
	movl	%ebx, (%rdi,%r9,4)
	incq	%r9
	addq	$4, %r8
	cmpq	$64, %r9
	jne	.LBB2_20
# %bb.23:                               #   in Loop: Header=BB2_19 Depth=1
	incq	%rsi
	addq	$256, %rax                      # imm = 0x100
	cmpq	$64, %rsi
	jne	.LBB2_19
# %bb.24:                               # %.preheader.preheader
	movq	16(%rsp), %rax
	movq	8(%rsp), %rcx
	xorl	%esi, %esi
	movl	$256, %edi                      # imm = 0x100
.LBB2_25:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_26 Depth 2
	xorl	%edx, %edx
.LBB2_26:                               #   Parent Loop BB2_25 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rax,%rdx,4), %r8d
	cmpl	(%rcx,%rdx,4), %r8d
	jne	.LBB2_27
# %bb.28:                               #   in Loop: Header=BB2_26 Depth=2
	incq	%rdx
	cmpq	$64, %rdx
	jne	.LBB2_26
# %bb.29:                               # %_Z12matrixMulCPUPiS_S_.exit
                                        #   in Loop: Header=BB2_25 Depth=1
	leaq	1(%rsi), %rdx
	addq	%rdi, %rcx
	addq	%rdi, %rax
	cmpq	$63, %rsi
	movq	%rdx, %rsi
	jb	.LBB2_25
# %bb.30:
	movl	$.Lstr, %edi
	callq	puts@PLT
	jmp	.LBB2_31
.LBB2_27:                               # %.thread
	movl	$.L.str, %edi
                                        # kill: def $esi killed $esi killed $rsi
                                        # kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	printf
.LBB2_31:
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_32
.LBB2_33:                               # %_Z9checkCuda10hipError_t.exit55
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_34
.LBB2_35:                               # %_Z9checkCuda10hipError_t.exit57
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_36
.LBB2_37:                               # %_Z9checkCuda10hipError_t.exit59
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_38
.LBB2_39:                               # %_Z9checkCuda10hipError_t.exit61
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 64
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_2
.LBB2_3:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_4
.LBB2_5:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_6
.LBB2_7:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_8
.LBB2_15:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_16
.LBB2_17:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_18
.LBB2_32:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_33
.LBB2_34:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_35
.LBB2_36:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_37
.LBB2_38:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_39
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12matrixMulGPUPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12matrixMulGPUPiS_S_,@object  # @_Z12matrixMulGPUPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z12matrixMulGPUPiS_S_
	.p2align	3, 0x0
_Z12matrixMulGPUPiS_S_:
	.quad	_Z27__device_stub__matrixMulGPUPiS_S_
	.size	_Z12matrixMulGPUPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"FOUND ERROR at c[%d][%d]\n"
	.size	.L.str, 26

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CUDA Runtime Error: %s\n"
	.size	.L.str.2, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12matrixMulGPUPiS_S_"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Success!"
	.size	.Lstr, 9

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__matrixMulGPUPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12matrixMulGPUPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12matrixMulGPUPiS_S_  ; -- Begin function _Z12matrixMulGPUPiS_S_
	.globl	_Z12matrixMulGPUPiS_S_
	.p2align	8
	.type	_Z12matrixMulGPUPiS_S_,@function
_Z12matrixMulGPUPiS_S_:                 ; @_Z12matrixMulGPUPiS_S_
; %bb.0:
	s_load_b32 s9, s[0:1], 0x24
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s8, v[3:4]
	v_cmpx_gt_i32_e32 64, v1
	s_cbranch_execz .LBB0_8
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[10:11], s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s9, 16
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_lshlrev_b32_e32 v3, 6, v1
	v_cmp_gt_i32_e32 vcc_lo, 64, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s10, s8
	s_mul_i32 s11, s11, s0
	s_lshl_b32 s12, s10, 6
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
	s_and_saveexec_b32 s14, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.3:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b32_e32 v9, 6, v1
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_add_co_u32 v10, s0, s4, v4
	v_mov_b32_e32 v4, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e64 v11, s0, s5, v5, s0
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[8:9], 0
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s0, s6, v5
	v_add_co_ci_u32_e64 v6, s0, s7, v6, s0
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_co_u32 v7, s0, v10, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, s9, v11, s0
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	global_load_b32 v12, v[5:6], off
	global_load_b32 v13, v[7:8], off
	v_add_co_u32 v5, s0, 0x100, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
	s_cmpk_eq_i32 s8, 0x100
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v12, v13, v[0:1]
	v_mov_b32_e32 v0, v7
	s_cbranch_scc0 .LBB0_5
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v5, v4, v9
	v_add_nc_u32_e32 v4, s11, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_cmp_lt_i32_e64 s0, 63, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_or_b32 s15, s0, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s1, s2, v5
	v_add_co_ci_u32_e64 v6, s1, s3, v6, s1
	global_store_b32 v[5:6], v7, off
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_4
.LBB0_7:                                ; %Flow49
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v1, s10, v1
	v_add_nc_u32_e32 v3, s12, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e64 s0, 63, v1
	s_or_b32 s13, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_2
.LBB0_8:                                ; %Flow51
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12matrixMulGPUPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12matrixMulGPUPiS_S_, .Lfunc_end0-_Z12matrixMulGPUPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 460
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12matrixMulGPUPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12matrixMulGPUPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
