#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <float.h>
#include <math.h>
struct timeval startwtime, endwtime;
double seq_time;

// CPU variable
int N = 5000; // number of elements
int D = 2; // dimensions
int nT = 500; // number of threads per block
float sigma = 250.0;
float MS_error = 0.0001; // mean shift error
float error = 504820*0.001; // mean value of dataset * 10^(-3) 
int iter_limit = 30;
size_t cols;
size_t rows;

//GPU variables
int *gp_N;
int *gp_D;
float *gp_sigma;
size_t gp_pitch;

//CPU matrices
float *x; // initilal matrix
float *y; // final matrix
float **val_y; // validation final matrix
float *m; // mean shift vectrors
// GPU matrices
float *gp_x;
float *gp_y;
float *gp_y_new;
float *gp_m; // mean shift vectrors
float *gp_g; // gaussian
float *gp_numer; // numerator
float *gp_denom; // denominator




__global__ void cuda_mean_shift(void);

void init(void);
void mean_shift(void);
void test(void);
void free_arrays(void);


int main(int argc, char **argv) {

  MS_error = MS_error*sigma;  

  init();

  gettimeofday (&startwtime, NULL);
  
  mean_shift();

  gettimeofday (&endwtime, NULL);
  
  seq_time = (long double)((endwtime.tv_usec - startwtime.tv_usec)/1.0e6 + endwtime.tv_sec - startwtime.tv_sec);

  printf("KNN wall clock time = %f\n", seq_time);
  

  // Copy matrices to memory
  cudaMemcpy(y,gp_y, N*D*sizeof(float), cudaMemcpyDeviceToHost);
  test();

  free_arrays();
}




/** procedure init() : initialize array "a" with data **/
void init() {
  int i,j;
  int ret_code=0;
  
  FILE *f;

  // Allocate system memmory

  x = (float *) malloc(N*D * sizeof(float));
  y = (float *) malloc(N*D * sizeof(float));
  m = (float *) malloc(N*D * sizeof(float));


  val_y = (float **) malloc(N * sizeof(float*));
  for (i = 0; i < N; i++) {
    val_y[i] = (float *) malloc(D * sizeof(float));
  }
  // Allocate GPU variables

  cudaMalloc( (void**)&gp_N , sizeof(int));
  cudaMalloc( (void**)&gp_D , sizeof(int));
  cudaMalloc( (void**)&gp_sigma , sizeof(float));


  // Allocate GPU matrices

  cudaMallocPitch(&gp_x, &gp_pitch, N * sizeof(float), D);
  cudaMallocPitch(&gp_y, &gp_pitch, N * sizeof(float), D);
  cudaMallocPitch(&gp_y_new, &gp_pitch, N * sizeof(float), D);
  cudaMallocPitch(&gp_m, &gp_pitch, N * sizeof(float), D);
  cudaMallocPitch(&gp_g, &gp_pitch, N * sizeof(float), N);
  cudaMallocPitch(&gp_numer, &gp_pitch, N * sizeof(float), D);
  cudaMallocPitch(&gp_denom, &gp_pitch, N * sizeof(float), D);


  f = fopen("../../data/S_set/S_set_5000x2.txt","r");
  for (i = 0; i < N; ++i) {
    for (j = 0; j < D; ++j) {
      ret_code = fscanf(f, "%f\t", &x[i*D+j]);
    }
    ret_code = fscanf(f,"\n");   
  }
  fclose(f);

  for (i = 0; i < N; ++i) {
    for (j = 0; j < D; ++j) {
      y[i*D+j] = x[i*D+j];
    }
  }
  
  for (i = 0; i < N; ++i) {
    for (j = 0; j < D; ++j) {
      m[i*D+j] =FLT_MAX;
    }
  }

  // Copy variables to GPU
  cudaMemcpy(gp_N,&N,sizeof(int),cudaMemcpyHostToDevice);
  cudaMemcpy(gp_D,&D,sizeof(int),cudaMemcpyHostToDevice);
  cudaMemcpy(gp_sigma,&sigma,sizeof(int),cudaMemcpyHostToDevice);

  // Copy matrices to GPU
  cudaMemcpy(gp_x,x,N*D*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(gp_y,y,N*D*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(gp_m,m,N*D*sizeof(float), cudaMemcpyHostToDevice);

}





__global__ void cuda_mean_shift(int *N,int *D,float *sigma,float *x, float *y, float *y_new,float *m, float *g,float *numer,float *denom,size_t pitch){

 int tids = threadIdx.x;
 int tid = threadIdx.x + blockIdx.x * blockDim.x;
 int j,z;
 float r;
 float dist=0;
 __shared__ float s_y[500*2];
 __shared__ float s_m[500*2]; 
__shared__ float s_y_new[500*2];
__shared__ float s_numer[500*2];   
__shared__ float s_denom[500*2];

    for(z=0;z<*D;z++){
      s_y[tids*(*D)+z] = y[tid*(*D)+z];  
      s_m[tids*(*D)+z] = m[tid*(*D)+z];
      s_numer[tids*(*D)+z] = 0;
      s_denom[tids*(*D)+z] = 0;
    }
    __syncthreads(); 
    if(tid<*N){
      
      for(j=0;j<*N;j++){
        float *row_g = (float *)((char*)g + j * pitch);
        for(z=0;z<*D;z++){
          dist += powf((s_y[tids*(*D)+z]-x[j*(*D)+z]),2.0);

        }
        dist = sqrtf(dist);

        if (dist>powf(*sigma,2.0)) row_g[tid]=0;
        else row_g[tid] = expf(-dist/(2*powf(*sigma,2.0)));

        if (tid==j) row_g[tid] += 1;
        dist=0;
        for(z=0;z<*D;z++){
          s_numer[tids*(*D)+z] += row_g[tid]*x[j*(*D)+z]; 
          s_denom[tids*(*D)+z] +=row_g[tid];
        }
        __syncthreads();

      }

      for(z=0;z<*D;z++){
        s_y_new[tids*(*D)+z] = s_numer[tids*(*D)+z]/s_denom[tids*(*D)+z];
        s_m[tids*(*D)+z] = s_y_new[tids*(*D)+z] - s_y[tids*(*D)+z];
      }
    
      for(z=0;z<*D;z++){
        s_y[tids*(*D)+z] = s_y_new[tids*(*D)+z];
        s_numer[tids*(*D)+z] = 0;
        s_denom[tids*(*D)+z] = 0;
      }
__syncthreads();

    }
    
    for(z=0;z<*D;z++){
      y[tid*(*D)+z] = s_y[tids*(*D)+z];
      m[tid*(*D)+z] = s_m[tids*(*D)+z];
    }
    __syncthreads();


}





void mean_shift() {
  int iter = 0;
  int i,z;
  float er = FLT_MAX;
  float last_er = FLT_MAX;
  float temp = 0;


  

  while(er > MS_error && iter<iter_limit && last_er >= er) {
     
    last_er = er;
    iter++;
    er = 0;
    
    cuda_mean_shift<<<N/nT,nT>>>(gp_N,gp_D,gp_sigma,gp_x,gp_y,gp_y_new,gp_m,gp_g,gp_numer,gp_denom,gp_pitch); 
   cudaMemcpy(m,gp_m,N*D*sizeof(float), cudaMemcpyDeviceToHost); 
   for(i=0;i<N;i++){
     for(z=0;z<D;z++){
       temp += pow(m[i*D+z],2);
     }
     er += temp;
     temp = 0;
   }
   
   er = sqrt(er);


    printf("Iteration = %d, Error = %lf\n",iter,er);

  } 
  

}







void test() {
    int i,j;
    int pass = 1;
    int ret_code = 0;
    int count = 0;
    FILE *f;

    f = fopen("../../data/S_set/validation_S_set_5000x2.txt","r");
    for (i = 0; i < N; ++i) {
      for (j = 0; j < D; ++j) {
        ret_code = fscanf(f, "%f\t", &val_y[i][j]);
      }
        ret_code = fscanf(f,"\n");
    }
    fclose(f);
    
   f = fopen("yout.txt","w+");
   for (i = 0; i < N; i++) {
      for (j = 0; j < D; j++) {
        fprintf(f,"%f\t",y[i*D+j]);
      }
      fprintf(f,"\n");
    }
    fclose(f);



    for (i = 0; i < N; ++i) {
      for (j = 0; j < D; ++j) {

        
	if(fabs(val_y[i][j] - y[i*D+j]) > error){
	  count++;
          pass=0;
        }
      }
    }
    printf(" TEST %s\n",(pass) ? "PASSed" : "FAILed");
    printf(" Errors = %d\n",count);



}


void free_arrays(){

free(x);
free(y);
free(val_y);
free(m);

cudaFree(gp_N); 
cudaFree(gp_D);
cudaFree(gp_sigma);
cudaFree(gp_x);
cudaFree(gp_y);
cudaFree(gp_y_new);
cudaFree(gp_m);
cudaFree(gp_g);
cudaFree(gp_numer);
cudaFree(gp_denom);

}



	.file	"tmpxft_00216a67_00000000-6_meanshift_cuda_shared.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"../../data/S_set/S_set_5000x2.txt"
.LC2:
	.string	"%f\t"
.LC3:
	.string	"\n"
	.text
	.globl	_Z4initv
	.type	_Z4initv, @function
_Z4initv:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
	movl	N(%rip), %r12d
	movslq	D(%rip), %rbp
	movl	%r12d, %ebx
	imull	%ebp, %ebx
	salq	$2, %rbp
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, x(%rip)
	call	malloc@PLT
	movq	%rbx, %rdi
	xorl	%ebx, %ebx
	movq	%rax, y(%rip)
	call	malloc@PLT
	movslq	%r12d, %rdi
	salq	$3, %rdi
	movq	%rax, m(%rip)
	call	malloc@PLT
	movq	%rax, val_y(%rip)
	movq	%rax, %r13
.L3:
	cmpl	%ebx, %r12d
	jle	.L19
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rax, 0(%r13,%rbx,8)
	incq	%rbx
	jmp	.L3
.L19:
	movl	$4, %esi
	leaq	gp_N(%rip), %rdi
	xorl	%r12d, %r12d
	call	cudaMalloc@PLT
	movl	$4, %esi
	leaq	gp_D(%rip), %rdi
	leaq	gp_pitch(%rip), %rbx
	call	cudaMalloc@PLT
	movl	$4, %esi
	leaq	gp_sigma(%rip), %rdi
	leaq	.LC2(%rip), %rbp
	call	cudaMalloc@PLT
	movslq	N(%rip), %rdx
	movq	%rbx, %rsi
	movslq	D(%rip), %rcx
	leaq	gp_x(%rip), %rdi
	salq	$2, %rdx
	call	cudaMallocPitch@PLT
	movslq	N(%rip), %rdx
	movq	%rbx, %rsi
	movslq	D(%rip), %rcx
	leaq	gp_y(%rip), %rdi
	salq	$2, %rdx
	call	cudaMallocPitch@PLT
	movslq	N(%rip), %rdx
	movq	%rbx, %rsi
	movslq	D(%rip), %rcx
	leaq	gp_y_new(%rip), %rdi
	salq	$2, %rdx
	call	cudaMallocPitch@PLT
	movslq	N(%rip), %rdx
	movq	%rbx, %rsi
	movslq	D(%rip), %rcx
	leaq	gp_m(%rip), %rdi
	salq	$2, %rdx
	call	cudaMallocPitch@PLT
	movslq	N(%rip), %rcx
	movq	%rbx, %rsi
	leaq	gp_g(%rip), %rdi
	leaq	0(,%rcx,4), %rdx
	call	cudaMallocPitch@PLT
	movslq	N(%rip), %rdx
	movq	%rbx, %rsi
	movslq	D(%rip), %rcx
	leaq	gp_numer(%rip), %rdi
	salq	$2, %rdx
	call	cudaMallocPitch@PLT
	movslq	N(%rip), %rdx
	movq	%rbx, %rsi
	movslq	D(%rip), %rcx
	leaq	gp_denom(%rip), %rdi
	salq	$2, %rdx
	call	cudaMallocPitch@PLT
	leaq	.LC0(%rip), %rsi
	leaq	.LC1(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbx
.L5:
	cmpl	%r12d, N(%rip)
	jle	.L20
	xorl	%r13d, %r13d
.L7:
	movl	D(%rip), %eax
	cmpl	%r13d, %eax
	jle	.L21
	imull	%r12d, %eax
	movq	x(%rip), %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	addl	%r13d, %eax
	incl	%r13d
	cltq
	leaq	(%rdx,%rax,4), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L7
.L21:
	leaq	.LC3(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	incl	%r12d
	call	__isoc23_fscanf@PLT
	jmp	.L5
.L20:
	movq	%rbx, %rdi
	call	fclose@PLT
	movl	N(%rip), %r8d
	xorl	%esi, %esi
	xorl	%edi, %edi
	movl	D(%rip), %edx
	movq	x(%rip), %r9
	movq	y(%rip), %r10
.L8:
	cmpl	%edi, %r8d
	jle	.L10
	movslq	%esi, %rax
	xorl	%ecx, %ecx
	salq	$2, %rax
.L11:
	cmpl	%ecx, %edx
	jle	.L22
	movss	(%r9,%rax), %xmm0
	incl	%ecx
	movss	%xmm0, (%r10,%rax)
	addq	$4, %rax
	jmp	.L11
.L22:
	incl	%edi
	addl	%edx, %esi
	jmp	.L8
.L10:
	movq	m(%rip), %r9
	movss	.LC4(%rip), %xmm0
	xorl	%ecx, %ecx
	xorl	%esi, %esi
.L12:
	cmpl	%esi, %r8d
	jle	.L14
	movslq	%ecx, %rax
	leaq	(%r9,%rax,4), %rdi
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %edx
	jle	.L23
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L15
.L23:
	incl	%esi
	addl	%edx, %ecx
	jmp	.L12
.L14:
	movq	gp_N(%rip), %rdi
	movl	$1, %ecx
	movl	$4, %edx
	leaq	N(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movq	gp_D(%rip), %rdi
	movl	$4, %edx
	leaq	D(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movq	gp_sigma(%rip), %rdi
	movl	$4, %edx
	leaq	sigma(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	N(%rip), %edx
	movl	$1, %ecx
	imull	D(%rip), %edx
	movq	x(%rip), %rsi
	movq	gp_x(%rip), %rdi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	N(%rip), %edx
	movl	$1, %ecx
	imull	D(%rip), %edx
	movq	y(%rip), %rsi
	movq	gp_y(%rip), %rdi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	N(%rip), %edx
	movl	$1, %ecx
	imull	D(%rip), %edx
	movq	m(%rip), %rsi
	movq	gp_m(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	movslq	%edx, %rdx
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	salq	$2, %rdx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z4initv, .-_Z4initv
	.section	.rodata.str1.1
.LC5:
	.string	"PASSed"
.LC6:
	.string	"FAILed"
.LC7:
	.string	"../../data/S_set/validation_S_set_5000x2.txt"
.LC8:
	.string	"w+"
.LC9:
	.string	"yout.txt"
.LC11:
	.string	" TEST %s\n"
.LC12:
	.string	" Errors = %d\n"
	.text
	.globl	_Z4testv
	.type	_Z4testv, @function
_Z4testv:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC0(%rip), %rsi
	leaq	.LC7(%rip), %rdi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	.LC2(%rip), %r14
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	fopen@PLT
	movq	%rax, %rbx
.L25:
	cmpl	%r12d, N(%rip)
	jle	.L27
	leaq	0(,%r12,8), %r13
	xorl	%ebp, %ebp
.L28:
	cmpl	%ebp, D(%rip)
	jle	.L43
	movq	val_y(%rip), %rax
	movq	%r14, %rsi
	movq	%rbx, %rdi
	movq	(%rax,%r13), %rax
	leaq	(%rax,%rbp,4), %rdx
	xorl	%eax, %eax
	incq	%rbp
	call	__isoc23_fscanf@PLT
	jmp	.L28
.L43:
	leaq	.LC3(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	incq	%r12
	call	__isoc23_fscanf@PLT
	jmp	.L25
.L27:
	movq	%rbx, %rdi
	xorl	%r12d, %r12d
	leaq	.LC2(%rip), %rbp
	call	fclose@PLT
	leaq	.LC8(%rip), %rsi
	leaq	.LC9(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbx
.L29:
	cmpl	%r12d, N(%rip)
	jle	.L44
	xorl	%r13d, %r13d
.L31:
	movl	D(%rip), %eax
	cmpl	%r13d, %eax
	jle	.L45
	imull	%r12d, %eax
	movq	y(%rip), %rdx
	movl	$2, %esi
	movq	%rbx, %rdi
	addl	%r13d, %eax
	incl	%r13d
	cltq
	cvtss2sd	(%rdx,%rax,4), %xmm0
	movq	%rbp, %rdx
	movb	$1, %al
	call	__fprintf_chk@PLT
	jmp	.L31
.L45:
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%eax, %eax
	incl	%r12d
	movl	$2, %esi
	call	__fprintf_chk@PLT
	jmp	.L29
.L44:
	movq	%rbx, %rdi
	xorl	%ebx, %ebx
	call	fclose@PLT
	movl	N(%rip), %r11d
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movl	D(%rip), %edi
	movq	val_y(%rip), %r10
	movl	$1, %esi
	movss	.LC10(%rip), %xmm2
	movq	y(%rip), %r9
	movss	error(%rip), %xmm1
.L32:
	cmpl	%edx, %r11d
	jle	.L36
	movslq	%ecx, %rax
	leaq	(%r9,%rax,4), %r8
	xorl	%eax, %eax
.L37:
	cmpl	%eax, %edi
	jle	.L46
	movq	(%r10,%rdx,8), %rbp
	movss	0(%rbp,%rax,4), %xmm0
	subss	(%r8,%rax,4), %xmm0
	andps	%xmm2, %xmm0
	comiss	%xmm1, %xmm0
	jbe	.L33
	incl	%ebx
	xorl	%esi, %esi
.L33:
	incq	%rax
	jmp	.L37
.L46:
	incq	%rdx
	addl	%edi, %ecx
	jmp	.L32
.L36:
	testl	%esi, %esi
	leaq	.LC5(%rip), %rax
	leaq	.LC6(%rip), %rdx
	movl	$2, %edi
	cmovne	%rax, %rdx
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edx
	leaq	.LC12(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z4testv, .-_Z4testv
	.globl	_Z11free_arraysv
	.type	_Z11free_arraysv, @function
_Z11free_arraysv:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	x(%rip), %rdi
	call	free@PLT
	movq	y(%rip), %rdi
	call	free@PLT
	movq	val_y(%rip), %rdi
	call	free@PLT
	movq	m(%rip), %rdi
	call	free@PLT
	movq	gp_N(%rip), %rdi
	call	cudaFree@PLT
	movq	gp_D(%rip), %rdi
	call	cudaFree@PLT
	movq	gp_sigma(%rip), %rdi
	call	cudaFree@PLT
	movq	gp_x(%rip), %rdi
	call	cudaFree@PLT
	movq	gp_y(%rip), %rdi
	call	cudaFree@PLT
	movq	gp_y_new(%rip), %rdi
	call	cudaFree@PLT
	movq	gp_m(%rip), %rdi
	call	cudaFree@PLT
	movq	gp_g(%rip), %rdi
	call	cudaFree@PLT
	movq	gp_numer(%rip), %rdi
	call	cudaFree@PLT
	movq	gp_denom(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z11free_arraysv, .-_Z11free_arraysv
	.globl	_Z61__device_stub__Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_mPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.type	_Z61__device_stub__Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_mPiS_PfS0_S0_S0_S0_S0_S0_S0_m, @function
_Z61__device_stub__Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_mPiS_PfS0_S0_S0_S0_S0_S0_S0_m:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	256(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	264(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	272(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 8(%rsp)
	movq	280(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 208(%rsp)
	movq	%rsp, %rax
	movq	%rax, 216(%rsp)
	leaq	288(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	88(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 272
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L49:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z61__device_stub__Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_mPiS_PfS0_S0_S0_S0_S0_S0_S0_m, .-_Z61__device_stub__Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_mPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.globl	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.type	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m, @function
_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z61__device_stub__Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_mPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.cfi_endproc
.LFE2057:
	.size	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m, .-_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.section	.rodata.str1.1
.LC14:
	.string	"Iteration = %d, Error = %lf\n"
	.text
	.globl	_Z10mean_shiftv
	.type	_Z10mean_shiftv, @function
_Z10mean_shiftv:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movabsq	$4294967297, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	xorl	%ebx, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movss	.LC4(%rip), %xmm0
	movss	%xmm0, 8(%rsp)
.L55:
	movss	8(%rsp), %xmm3
	comiss	MS_error(%rip), %xmm3
	jbe	.L54
	cmpl	%ebx, iter_limit(%rip)
	jle	.L54
	comiss	%xmm3, %xmm0
	jb	.L54
	movl	N(%rip), %eax
	movq	%rbp, 40(%rsp)
	xorl	%r9d, %r9d
	incl	%ebx
	movl	nT(%rip), %ecx
	movq	%rbp, 28(%rsp)
	xorl	%r8d, %r8d
	cltd
	movl	32(%rsp), %esi
	idivl	%ecx
	movl	%ecx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	movl	%eax, 24(%rsp)
	movq	24(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	gp_y_new(%rip), %r9
	movq	gp_y(%rip), %r8
	pushq	%rax
	.cfi_def_cfa_offset 88
	pushq	gp_pitch(%rip)
	.cfi_def_cfa_offset 96
	movq	gp_x(%rip), %rcx
	movq	gp_sigma(%rip), %rdx
	pushq	gp_denom(%rip)
	.cfi_def_cfa_offset 104
	movq	gp_D(%rip), %rsi
	pushq	gp_numer(%rip)
	.cfi_def_cfa_offset 112
	movq	gp_N(%rip), %rdi
	pushq	gp_g(%rip)
	.cfi_def_cfa_offset 120
	pushq	gp_m(%rip)
	.cfi_def_cfa_offset 128
	call	_Z61__device_stub__Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_mPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	addq	$48, %rsp
	.cfi_def_cfa_offset 80
.L56:
	movl	N(%rip), %edx
	imull	D(%rip), %edx
	movl	$2, %ecx
	movq	gp_m(%rip), %rsi
	movq	m(%rip), %rdi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	N(%rip), %r9d
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	movl	D(%rip), %esi
	movq	m(%rip), %r8
	xorps	%xmm2, %xmm2
.L57:
	cmpl	%ecx, %r9d
	jle	.L59
	movslq	%edx, %rax
	xorps	%xmm1, %xmm1
	leaq	(%r8,%rax,4), %rdi
	xorl	%eax, %eax
.L60:
	cmpl	%eax, %esi
	jle	.L66
	cvtss2sd	(%rdi,%rax,4), %xmm0
	mulsd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	incq	%rax
	addsd	%xmm0, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	jmp	.L60
.L66:
	addss	%xmm1, %xmm2
	incl	%ecx
	addl	%esi, %edx
	jmp	.L57
.L59:
	movaps	%xmm2, %xmm0
	call	sqrtf@PLT
	movl	%ebx, %edx
	leaq	.LC14(%rip), %rsi
	movb	$1, %al
	movaps	%xmm0, %xmm1
	movl	$2, %edi
	cvtss2sd	%xmm0, %xmm0
	movss	%xmm1, 12(%rsp)
	call	__printf_chk@PLT
	movss	12(%rsp), %xmm1
	movss	8(%rsp), %xmm0
	movss	%xmm1, 8(%rsp)
	jmp	.L55
.L54:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10mean_shiftv, .-_Z10mean_shiftv
	.section	.rodata.str1.1
.LC16:
	.string	"KNN wall clock time = %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movss	MS_error(%rip), %xmm0
	mulss	sigma(%rip), %xmm0
	movss	%xmm0, MS_error(%rip)
	call	_Z4initv
	xorl	%esi, %esi
	leaq	startwtime(%rip), %rdi
	call	gettimeofday@PLT
	call	_Z10mean_shiftv
	xorl	%esi, %esi
	leaq	endwtime(%rip), %rdi
	call	gettimeofday@PLT
	movq	8+endwtime(%rip), %rax
	movl	$2, %edi
	cvtsi2sdq	endwtime(%rip), %xmm1
	subq	8+startwtime(%rip), %rax
	leaq	.LC16(%rip), %rsi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC15(%rip), %xmm0
	movb	$1, %al
	addsd	%xmm1, %xmm0
	cvtsi2sdq	startwtime(%rip), %xmm1
	subsd	%xmm1, %xmm0
	movsd	%xmm0, seq_time(%rip)
	call	__printf_chk@PLT
	movl	N(%rip), %edx
	movl	$2, %ecx
	imull	D(%rip), %edx
	movq	gp_y(%rip), %rsi
	movq	y(%rip), %rdi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	call	_Z4testv
	call	_Z11free_arraysv
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	gp_denom
	.bss
	.align 8
	.type	gp_denom, @object
	.size	gp_denom, 8
gp_denom:
	.zero	8
	.globl	gp_numer
	.align 8
	.type	gp_numer, @object
	.size	gp_numer, 8
gp_numer:
	.zero	8
	.globl	gp_g
	.align 8
	.type	gp_g, @object
	.size	gp_g, 8
gp_g:
	.zero	8
	.globl	gp_m
	.align 8
	.type	gp_m, @object
	.size	gp_m, 8
gp_m:
	.zero	8
	.globl	gp_y_new
	.align 8
	.type	gp_y_new, @object
	.size	gp_y_new, 8
gp_y_new:
	.zero	8
	.globl	gp_y
	.align 8
	.type	gp_y, @object
	.size	gp_y, 8
gp_y:
	.zero	8
	.globl	gp_x
	.align 8
	.type	gp_x, @object
	.size	gp_x, 8
gp_x:
	.zero	8
	.globl	m
	.align 8
	.type	m, @object
	.size	m, 8
m:
	.zero	8
	.globl	val_y
	.align 8
	.type	val_y, @object
	.size	val_y, 8
val_y:
	.zero	8
	.globl	y
	.align 8
	.type	y, @object
	.size	y, 8
y:
	.zero	8
	.globl	x
	.align 8
	.type	x, @object
	.size	x, 8
x:
	.zero	8
	.globl	gp_pitch
	.align 8
	.type	gp_pitch, @object
	.size	gp_pitch, 8
gp_pitch:
	.zero	8
	.globl	gp_sigma
	.align 8
	.type	gp_sigma, @object
	.size	gp_sigma, 8
gp_sigma:
	.zero	8
	.globl	gp_D
	.align 8
	.type	gp_D, @object
	.size	gp_D, 8
gp_D:
	.zero	8
	.globl	gp_N
	.align 8
	.type	gp_N, @object
	.size	gp_N, 8
gp_N:
	.zero	8
	.globl	rows
	.align 8
	.type	rows, @object
	.size	rows, 8
rows:
	.zero	8
	.globl	cols
	.align 8
	.type	cols, @object
	.size	cols, 8
cols:
	.zero	8
	.globl	iter_limit
	.data
	.align 4
	.type	iter_limit, @object
	.size	iter_limit, 4
iter_limit:
	.long	30
	.globl	error
	.align 4
	.type	error, @object
	.size	error, 4
error:
	.long	1140615414
	.globl	MS_error
	.align 4
	.type	MS_error, @object
	.size	MS_error, 4
MS_error:
	.long	953267991
	.globl	sigma
	.align 4
	.type	sigma, @object
	.size	sigma, 4
sigma:
	.long	1132068864
	.globl	nT
	.align 4
	.type	nT, @object
	.size	nT, 4
nT:
	.long	500
	.globl	D
	.align 4
	.type	D, @object
	.size	D, 4
D:
	.long	2
	.globl	N
	.align 4
	.type	N, @object
	.size	N, 4
N:
	.long	5000
	.globl	seq_time
	.bss
	.align 8
	.type	seq_time, @object
	.size	seq_time, 8
seq_time:
	.zero	8
	.globl	endwtime
	.align 16
	.type	endwtime, @object
	.size	endwtime, 16
endwtime:
	.zero	16
	.globl	startwtime
	.align 16
	.type	startwtime, @object
	.size	startwtime, 16
startwtime:
	.zero	16
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	2139095039
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC10:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC15:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <float.h>
#include <math.h>
struct timeval startwtime, endwtime;
double seq_time;

// CPU variable
int N = 5000; // number of elements
int D = 2; // dimensions
int nT = 500; // number of threads per block
float sigma = 250.0;
float MS_error = 0.0001; // mean shift error
float error = 504820*0.001; // mean value of dataset * 10^(-3) 
int iter_limit = 30;
size_t cols;
size_t rows;

//GPU variables
int *gp_N;
int *gp_D;
float *gp_sigma;
size_t gp_pitch;

//CPU matrices
float *x; // initilal matrix
float *y; // final matrix
float **val_y; // validation final matrix
float *m; // mean shift vectrors
// GPU matrices
float *gp_x;
float *gp_y;
float *gp_y_new;
float *gp_m; // mean shift vectrors
float *gp_g; // gaussian
float *gp_numer; // numerator
float *gp_denom; // denominator




__global__ void cuda_mean_shift(void);

void init(void);
void mean_shift(void);
void test(void);
void free_arrays(void);


int main(int argc, char **argv) {

  MS_error = MS_error*sigma;  

  init();

  gettimeofday (&startwtime, NULL);
  
  mean_shift();

  gettimeofday (&endwtime, NULL);
  
  seq_time = (long double)((endwtime.tv_usec - startwtime.tv_usec)/1.0e6 + endwtime.tv_sec - startwtime.tv_sec);

  printf("KNN wall clock time = %f\n", seq_time);
  

  // Copy matrices to memory
  hipMemcpy(y,gp_y, N*D*sizeof(float), hipMemcpyDeviceToHost);
  test();

  free_arrays();
}




/** procedure init() : initialize array "a" with data **/
void init() {
  int i,j;
  int ret_code=0;
  
  FILE *f;

  // Allocate system memmory

  x = (float *) malloc(N*D * sizeof(float));
  y = (float *) malloc(N*D * sizeof(float));
  m = (float *) malloc(N*D * sizeof(float));


  val_y = (float **) malloc(N * sizeof(float*));
  for (i = 0; i < N; i++) {
    val_y[i] = (float *) malloc(D * sizeof(float));
  }
  // Allocate GPU variables

  hipMalloc( (void**)&gp_N , sizeof(int));
  hipMalloc( (void**)&gp_D , sizeof(int));
  hipMalloc( (void**)&gp_sigma , sizeof(float));


  // Allocate GPU matrices

  hipMallocPitch(&gp_x, &gp_pitch, N * sizeof(float), D);
  hipMallocPitch(&gp_y, &gp_pitch, N * sizeof(float), D);
  hipMallocPitch(&gp_y_new, &gp_pitch, N * sizeof(float), D);
  hipMallocPitch(&gp_m, &gp_pitch, N * sizeof(float), D);
  hipMallocPitch(&gp_g, &gp_pitch, N * sizeof(float), N);
  hipMallocPitch(&gp_numer, &gp_pitch, N * sizeof(float), D);
  hipMallocPitch(&gp_denom, &gp_pitch, N * sizeof(float), D);


  f = fopen("../../data/S_set/S_set_5000x2.txt","r");
  for (i = 0; i < N; ++i) {
    for (j = 0; j < D; ++j) {
      ret_code = fscanf(f, "%f\t", &x[i*D+j]);
    }
    ret_code = fscanf(f,"\n");   
  }
  fclose(f);

  for (i = 0; i < N; ++i) {
    for (j = 0; j < D; ++j) {
      y[i*D+j] = x[i*D+j];
    }
  }
  
  for (i = 0; i < N; ++i) {
    for (j = 0; j < D; ++j) {
      m[i*D+j] =FLT_MAX;
    }
  }

  // Copy variables to GPU
  hipMemcpy(gp_N,&N,sizeof(int),hipMemcpyHostToDevice);
  hipMemcpy(gp_D,&D,sizeof(int),hipMemcpyHostToDevice);
  hipMemcpy(gp_sigma,&sigma,sizeof(int),hipMemcpyHostToDevice);

  // Copy matrices to GPU
  hipMemcpy(gp_x,x,N*D*sizeof(float), hipMemcpyHostToDevice);
  hipMemcpy(gp_y,y,N*D*sizeof(float), hipMemcpyHostToDevice);
  hipMemcpy(gp_m,m,N*D*sizeof(float), hipMemcpyHostToDevice);

}





__global__ void cuda_mean_shift(int *N,int *D,float *sigma,float *x, float *y, float *y_new,float *m, float *g,float *numer,float *denom,size_t pitch){

 int tids = threadIdx.x;
 int tid = threadIdx.x + blockIdx.x * blockDim.x;
 int j,z;
 float r;
 float dist=0;
 __shared__ float s_y[500*2];
 __shared__ float s_m[500*2]; 
__shared__ float s_y_new[500*2];
__shared__ float s_numer[500*2];   
__shared__ float s_denom[500*2];

    for(z=0;z<*D;z++){
      s_y[tids*(*D)+z] = y[tid*(*D)+z];  
      s_m[tids*(*D)+z] = m[tid*(*D)+z];
      s_numer[tids*(*D)+z] = 0;
      s_denom[tids*(*D)+z] = 0;
    }
    __syncthreads(); 
    if(tid<*N){
      
      for(j=0;j<*N;j++){
        float *row_g = (float *)((char*)g + j * pitch);
        for(z=0;z<*D;z++){
          dist += powf((s_y[tids*(*D)+z]-x[j*(*D)+z]),2.0);

        }
        dist = sqrtf(dist);

        if (dist>powf(*sigma,2.0)) row_g[tid]=0;
        else row_g[tid] = expf(-dist/(2*powf(*sigma,2.0)));

        if (tid==j) row_g[tid] += 1;
        dist=0;
        for(z=0;z<*D;z++){
          s_numer[tids*(*D)+z] += row_g[tid]*x[j*(*D)+z]; 
          s_denom[tids*(*D)+z] +=row_g[tid];
        }
        __syncthreads();

      }

      for(z=0;z<*D;z++){
        s_y_new[tids*(*D)+z] = s_numer[tids*(*D)+z]/s_denom[tids*(*D)+z];
        s_m[tids*(*D)+z] = s_y_new[tids*(*D)+z] - s_y[tids*(*D)+z];
      }
    
      for(z=0;z<*D;z++){
        s_y[tids*(*D)+z] = s_y_new[tids*(*D)+z];
        s_numer[tids*(*D)+z] = 0;
        s_denom[tids*(*D)+z] = 0;
      }
__syncthreads();

    }
    
    for(z=0;z<*D;z++){
      y[tid*(*D)+z] = s_y[tids*(*D)+z];
      m[tid*(*D)+z] = s_m[tids*(*D)+z];
    }
    __syncthreads();


}





void mean_shift() {
  int iter = 0;
  int i,z;
  float er = FLT_MAX;
  float last_er = FLT_MAX;
  float temp = 0;


  

  while(er > MS_error && iter<iter_limit && last_er >= er) {
     
    last_er = er;
    iter++;
    er = 0;
    
    cuda_mean_shift<<<N/nT,nT>>>(gp_N,gp_D,gp_sigma,gp_x,gp_y,gp_y_new,gp_m,gp_g,gp_numer,gp_denom,gp_pitch); 
   hipMemcpy(m,gp_m,N*D*sizeof(float), hipMemcpyDeviceToHost); 
   for(i=0;i<N;i++){
     for(z=0;z<D;z++){
       temp += pow(m[i*D+z],2);
     }
     er += temp;
     temp = 0;
   }
   
   er = sqrt(er);


    printf("Iteration = %d, Error = %lf\n",iter,er);

  } 
  

}







void test() {
    int i,j;
    int pass = 1;
    int ret_code = 0;
    int count = 0;
    FILE *f;

    f = fopen("../../data/S_set/validation_S_set_5000x2.txt","r");
    for (i = 0; i < N; ++i) {
      for (j = 0; j < D; ++j) {
        ret_code = fscanf(f, "%f\t", &val_y[i][j]);
      }
        ret_code = fscanf(f,"\n");
    }
    fclose(f);
    
   f = fopen("yout.txt","w+");
   for (i = 0; i < N; i++) {
      for (j = 0; j < D; j++) {
        fprintf(f,"%f\t",y[i*D+j]);
      }
      fprintf(f,"\n");
    }
    fclose(f);



    for (i = 0; i < N; ++i) {
      for (j = 0; j < D; ++j) {

        
	if(fabs(val_y[i][j] - y[i*D+j]) > error){
	  count++;
          pass=0;
        }
      }
    }
    printf(" TEST %s\n",(pass) ? "PASSed" : "FAILed");
    printf(" Errors = %d\n",count);



}


void free_arrays(){

free(x);
free(y);
free(val_y);
free(m);

hipFree(gp_N); 
hipFree(gp_D);
hipFree(gp_sigma);
hipFree(gp_x);
hipFree(gp_y);
hipFree(gp_y_new);
hipFree(gp_m);
hipFree(gp_g);
hipFree(gp_numer);
hipFree(gp_denom);

}



	.text
	.file	"meanshift_cuda_shared.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movss	MS_error(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	mulss	sigma(%rip), %xmm0
	movss	%xmm0, MS_error(%rip)
	callq	_Z4initv
	movl	$startwtime, %edi
	xorl	%esi, %esi
	callq	gettimeofday
	callq	_Z10mean_shiftv
	movl	$endwtime, %edi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	endwtime+8(%rip), %rax
	subq	startwtime+8(%rip), %rax
	cvtsi2sd	%rax, %xmm1
	divsd	.LCPI0_0(%rip), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	endwtime(%rip), %xmm0
	addsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	startwtime(%rip), %xmm1
	subsd	%xmm1, %xmm0
	movsd	%xmm0, seq_time(%rip)
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	y(%rip), %rdi
	movq	gp_y(%rip), %rsi
	movslq	N(%rip), %rax
	movslq	D(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	callq	_Z4testv
	callq	_Z11free_arraysv
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z4initv                        # -- Begin function _Z4initv
	.type	_Z4initv,@function
_Z4initv:                               # @_Z4initv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movslq	N(%rip), %r15
	movslq	D(%rip), %rbx
	movq	%rbx, %r14
	imulq	%r15, %r14
	shlq	$2, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, x(%rip)
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, y(%rip)
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, m(%rip)
	leaq	(,%r15,8), %rdi
	callq	malloc
	movq	%rax, val_y(%rip)
	testq	%r15, %r15
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph
	movl	%r15d, %r14d
	shlq	$2, %rbx
	xorl	%r15d, %r15d
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	malloc
	movq	val_y(%rip), %rcx
	movq	%rax, (%rcx,%r15,8)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movl	$gp_N, %edi
	movl	$4, %esi
	callq	hipMalloc
	movl	$gp_D, %edi
	movl	$4, %esi
	callq	hipMalloc
	movl	$gp_sigma, %edi
	movl	$4, %esi
	callq	hipMalloc
	movslq	N(%rip), %rdx
	shlq	$2, %rdx
	movslq	D(%rip), %rcx
	movl	$gp_x, %edi
	movl	$gp_pitch, %esi
	callq	hipMallocPitch
	movslq	N(%rip), %rdx
	shlq	$2, %rdx
	movslq	D(%rip), %rcx
	movl	$gp_y, %edi
	movl	$gp_pitch, %esi
	callq	hipMallocPitch
	movslq	N(%rip), %rdx
	shlq	$2, %rdx
	movslq	D(%rip), %rcx
	movl	$gp_y_new, %edi
	movl	$gp_pitch, %esi
	callq	hipMallocPitch
	movslq	N(%rip), %rdx
	shlq	$2, %rdx
	movslq	D(%rip), %rcx
	movl	$gp_m, %edi
	movl	$gp_pitch, %esi
	callq	hipMallocPitch
	movslq	N(%rip), %rcx
	leaq	(,%rcx,4), %rdx
	movl	$gp_g, %edi
	movl	$gp_pitch, %esi
	callq	hipMallocPitch
	movslq	N(%rip), %rdx
	shlq	$2, %rdx
	movslq	D(%rip), %rcx
	movl	$gp_numer, %edi
	movl	$gp_pitch, %esi
	callq	hipMallocPitch
	movslq	N(%rip), %rdx
	shlq	$2, %rdx
	movslq	D(%rip), %rcx
	movl	$gp_denom, %edi
	movl	$gp_pitch, %esi
	callq	hipMallocPitch
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	cmpl	$0, N(%rip)
	jle	.LBB1_9
# %bb.4:                                # %.preheader33.preheader
	xorl	%ebp, %ebp
.LBB1_5:                                # %.preheader33
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_7 Depth 2
	movl	D(%rip), %eax
	testl	%eax, %eax
	jle	.LBB1_8
# %bb.6:                                # %.lr.ph36.preheader
                                        #   in Loop: Header=BB1_5 Depth=1
	xorl	%r14d, %r14d
.LBB1_7:                                # %.lr.ph36
                                        #   Parent Loop BB1_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebp, %eax
	movslq	%eax, %rdx
	addq	%r14, %rdx
	shlq	$2, %rdx
	addq	x(%rip), %rdx
	movl	$.L.str.3, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	D(%rip), %eax
	incq	%r14
	cmpl	%eax, %r14d
	jl	.LBB1_7
.LBB1_8:                                # %._crit_edge37
                                        #   in Loop: Header=BB1_5 Depth=1
	movl	$.L.str.4, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incl	%ebp
	cmpl	N(%rip), %ebp
	jl	.LBB1_5
.LBB1_9:                                # %._crit_edge39
	movq	%rbx, %rdi
	callq	fclose
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB1_21
# %bb.10:                               # %.preheader32.lr.ph
	movl	D(%rip), %ecx
	movq	x(%rip), %rdx
	movq	y(%rip), %rsi
	xorl	%edi, %edi
	xorl	%r8d, %r8d
.LBB1_11:                               # %.preheader32
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_13 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_14
# %bb.12:                               # %.lr.ph41
                                        #   in Loop: Header=BB1_11 Depth=1
	movl	%edi, %r10d
	leaq	(%rsi,%r10,4), %r9
	leaq	(%rdx,%r10,4), %r10
	xorl	%r11d, %r11d
.LBB1_13:                               #   Parent Loop BB1_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r10,%r11,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r9,%r11,4)
	incq	%r11
	cmpq	%r11, %rcx
	jne	.LBB1_13
.LBB1_14:                               # %._crit_edge42
                                        #   in Loop: Header=BB1_11 Depth=1
	incq	%r8
	addl	%ecx, %edi
	cmpq	%rax, %r8
	jne	.LBB1_11
# %bb.15:                               # %.preheader31
	testl	%eax, %eax
	jle	.LBB1_21
# %bb.16:                               # %.preheader.lr.ph
	movl	D(%rip), %ecx
	movq	m(%rip), %rdx
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB1_17:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_19 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_20
# %bb.18:                               # %.lr.ph45
                                        #   in Loop: Header=BB1_17 Depth=1
	movl	%esi, %r8d
	leaq	(%rdx,%r8,4), %r8
	xorl	%r9d, %r9d
.LBB1_19:                               #   Parent Loop BB1_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$2139095039, (%r8,%r9,4)        # imm = 0x7F7FFFFF
	incq	%r9
	cmpq	%r9, %rcx
	jne	.LBB1_19
.LBB1_20:                               # %._crit_edge46
                                        #   in Loop: Header=BB1_17 Depth=1
	incq	%rdi
	addl	%ecx, %esi
	cmpq	%rax, %rdi
	jne	.LBB1_17
.LBB1_21:                               # %._crit_edge48
	movq	gp_N(%rip), %rdi
	movl	$N, %esi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	gp_D(%rip), %rdi
	movl	$D, %esi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	gp_sigma(%rip), %rdi
	movl	$sigma, %esi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	gp_x(%rip), %rdi
	movq	x(%rip), %rsi
	movslq	N(%rip), %rax
	movslq	D(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	gp_y(%rip), %rdi
	movq	y(%rip), %rsi
	movslq	N(%rip), %rax
	movslq	D(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	gp_m(%rip), %rdi
	movq	m(%rip), %rsi
	movslq	N(%rip), %rax
	movslq	D(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movl	$1, %ecx
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end1:
	.size	_Z4initv, .Lfunc_end1-_Z4initv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10mean_shiftv
.LCPI2_0:
	.long	0x7f7fffff                      # float 3.40282347E+38
.LCPI2_1:
	.long	0x00000000                      # float 0
	.text
	.globl	_Z10mean_shiftv
	.type	_Z10mean_shiftv,@function
_Z10mean_shiftv:                        # @_Z10mean_shiftv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	ucomiss	MS_error(%rip), %xmm0
	jbe	.LBB2_18
# %bb.1:
	cmpl	$0, iter_limit(%rip)
	jle	.LBB2_18
# %bb.2:                                # %.lr.ph44.preheader
	xorl	%ebx, %ebx
	movabsq	$4294967296, %r14               # imm = 0x100000000
.LBB2_3:                                # %.lr.ph44
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_8 Depth 2
                                        #       Child Loop BB2_10 Depth 3
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	N(%rip), %eax
	movl	nT(%rip), %ecx
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
	orq	%r14, %rax
	orq	%r14, %rcx
	movq	%rax, %rdi
	movl	$1, %esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=1
	movq	gp_N(%rip), %rdi
	movq	gp_D(%rip), %rsi
	movq	gp_sigma(%rip), %rdx
	movq	gp_x(%rip), %rcx
	movq	gp_y(%rip), %r8
	movq	gp_y_new(%rip), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	gp_pitch(%rip)
	.cfi_adjust_cfa_offset 8
	pushq	gp_denom(%rip)
	.cfi_adjust_cfa_offset 8
	pushq	gp_numer(%rip)
	.cfi_adjust_cfa_offset 8
	pushq	gp_g(%rip)
	.cfi_adjust_cfa_offset 8
	pushq	gp_m(%rip)
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB2_5:                                #   in Loop: Header=BB2_3 Depth=1
	movq	m(%rip), %rdi
	movq	gp_m(%rip), %rsi
	movslq	N(%rip), %rax
	movslq	D(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB2_6
# %bb.7:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_3 Depth=1
	movl	D(%rip), %ecx
	movq	m(%rip), %rdx
	xorps	%xmm0, %xmm0
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB2_8:                                # %.preheader
                                        #   Parent Loop BB2_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_10 Depth 3
	xorps	%xmm1, %xmm1
	testl	%ecx, %ecx
	jle	.LBB2_11
# %bb.9:                                # %.lr.ph
                                        #   in Loop: Header=BB2_8 Depth=2
	movl	%esi, %r8d
	leaq	(%rdx,%r8,4), %r8
	xorl	%r9d, %r9d
.LBB2_10:                               #   Parent Loop BB2_3 Depth=1
                                        #     Parent Loop BB2_8 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm2, %xmm2
	cvtss2sd	(%r8,%r9,4), %xmm2
	mulsd	%xmm2, %xmm2
	cvtss2sd	%xmm1, %xmm1
	addsd	%xmm2, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	incq	%r9
	cmpq	%r9, %rcx
	jne	.LBB2_10
.LBB2_11:                               # %._crit_edge
                                        #   in Loop: Header=BB2_8 Depth=2
	addss	%xmm1, %xmm0
	incq	%rdi
	addl	%ecx, %esi
	cmpq	%rax, %rdi
	jne	.LBB2_8
	jmp	.LBB2_12
.LBB2_6:                                #   in Loop: Header=BB2_3 Depth=1
	xorps	%xmm0, %xmm0
.LBB2_12:                               # %._crit_edge38
                                        #   in Loop: Header=BB2_3 Depth=1
	ucomiss	.LCPI2_1(%rip), %xmm0
	jb	.LBB2_14
# %bb.13:                               #   in Loop: Header=BB2_3 Depth=1
	sqrtss	%xmm0, %xmm0
	jmp	.LBB2_15
.LBB2_14:                               # %call.sqrt
                                        #   in Loop: Header=BB2_3 Depth=1
	callq	sqrtf
.LBB2_15:                               # %._crit_edge38.split
                                        #   in Loop: Header=BB2_3 Depth=1
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	incl	%ebx
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movl	$.L.str.5, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%rsp), %xmm0                   # 4-byte Folded Reload
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	jb	.LBB2_18
# %bb.16:                               # %._crit_edge38.split
                                        #   in Loop: Header=BB2_3 Depth=1
	ucomiss	MS_error(%rip), %xmm0
	jbe	.LBB2_18
# %bb.17:                               # %._crit_edge38.split
                                        #   in Loop: Header=BB2_3 Depth=1
	cmpl	iter_limit(%rip), %ebx
	jl	.LBB2_3
.LBB2_18:                               # %.critedge
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10mean_shiftv, .Lfunc_end2-_Z10mean_shiftv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z4testv
.LCPI3_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	_Z4testv
	.type	_Z4testv,@function
_Z4testv:                               # @_Z4testv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str.6, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	cmpl	$0, N(%rip)
	jle	.LBB3_6
# %bb.1:                                # %.preheader40.preheader
	xorl	%r14d, %r14d
.LBB3_2:                                # %.preheader40
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	cmpl	$0, D(%rip)
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	xorl	%r15d, %r15d
	xorl	%r12d, %r12d
.LBB3_4:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	val_y(%rip), %rax
	movq	(%rax,%r14,8), %rdx
	addq	%r15, %rdx
	movl	$.L.str.3, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r12
	movslq	D(%rip), %rax
	addq	$4, %r15
	cmpq	%rax, %r12
	jl	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	$.L.str.4, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r14
	movslq	N(%rip), %rax
	cmpq	%rax, %r14
	jl	.LBB3_2
.LBB3_6:                                # %._crit_edge43
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.7, %edi
	movl	$.L.str.8, %esi
	callq	fopen
	movq	%rax, %rbx
	cmpl	$0, N(%rip)
	jle	.LBB3_12
# %bb.7:                                # %.preheader39.preheader
	xorl	%r14d, %r14d
.LBB3_8:                                # %.preheader39
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_10 Depth 2
	movl	D(%rip), %eax
	testl	%eax, %eax
	jle	.LBB3_11
# %bb.9:                                # %.lr.ph45.preheader
                                        #   in Loop: Header=BB3_8 Depth=1
	xorl	%r15d, %r15d
.LBB3_10:                               # %.lr.ph45
                                        #   Parent Loop BB3_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	y(%rip), %rcx
	imull	%r14d, %eax
	cltq
	addq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rcx,%rax,4), %xmm0
	movl	$.L.str.3, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	movl	D(%rip), %eax
	incq	%r15
	cmpl	%eax, %r15d
	jl	.LBB3_10
.LBB3_11:                               # %._crit_edge46
                                        #   in Loop: Header=BB3_8 Depth=1
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	incl	%r14d
	cmpl	N(%rip), %r14d
	jl	.LBB3_8
.LBB3_12:                               # %._crit_edge48
	movq	%rbx, %rdi
	callq	fclose
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB3_13
# %bb.14:                               # %.preheader.lr.ph
	movl	D(%rip), %ecx
	movq	val_y(%rip), %rdx
	movq	y(%rip), %rsi
	movss	error(%rip), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movl	$1, %edi
	xorl	%r8d, %r8d
	movaps	.LCPI3_0(%rip), %xmm1           # xmm1 = [NaN,NaN,NaN,NaN]
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
	xorl	%ebx, %ebx
.LBB3_15:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_17 Depth 2
	testl	%ecx, %ecx
	jle	.LBB3_18
# %bb.16:                               # %.lr.ph52
                                        #   in Loop: Header=BB3_15 Depth=1
	movl	%r9d, %r11d
	leaq	(%rsi,%r11,4), %r11
	movq	(%rdx,%r10,8), %r14
	xorl	%r15d, %r15d
.LBB3_17:                               #   Parent Loop BB3_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r14,%r15,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	subss	(%r11,%r15,4), %xmm2
	andps	%xmm1, %xmm2
	xorl	%ebp, %ebp
	ucomiss	%xmm0, %xmm2
	seta	%bpl
	cmoval	%r8d, %edi
	addl	%ebp, %ebx
	incq	%r15
	cmpq	%r15, %rcx
	jne	.LBB3_17
.LBB3_18:                               # %._crit_edge53
                                        #   in Loop: Header=BB3_15 Depth=1
	incq	%r10
	addl	%ecx, %r9d
	cmpq	%rax, %r10
	jne	.LBB3_15
# %bb.19:                               # %._crit_edge58.loopexit
	testl	%edi, %edi
	movl	$.L.str.11, %eax
	movl	$.L.str.10, %esi
	cmoveq	%rax, %rsi
	jmp	.LBB3_20
.LBB3_13:
	xorl	%ebx, %ebx
	movl	$.L.str.10, %esi
.LBB3_20:                               # %._crit_edge58
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.12, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end3:
	.size	_Z4testv, .Lfunc_end3-_Z4testv
	.cfi_endproc
                                        # -- End function
	.globl	_Z11free_arraysv                # -- Begin function _Z11free_arraysv
	.type	_Z11free_arraysv,@function
_Z11free_arraysv:                       # @_Z11free_arraysv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	x(%rip), %rdi
	callq	free
	movq	y(%rip), %rdi
	callq	free
	movq	val_y(%rip), %rdi
	callq	free
	movq	m(%rip), %rdi
	callq	free
	movq	gp_N(%rip), %rdi
	callq	hipFree
	movq	gp_D(%rip), %rdi
	callq	hipFree
	movq	gp_sigma(%rip), %rdi
	callq	hipFree
	movq	gp_x(%rip), %rdi
	callq	hipFree
	movq	gp_y(%rip), %rdi
	callq	hipFree
	movq	gp_y_new(%rip), %rdi
	callq	hipFree
	movq	gp_m(%rip), %rdi
	callq	hipFree
	movq	gp_g(%rip), %rdi
	callq	hipFree
	movq	gp_numer(%rip), %rdi
	callq	hipFree
	movq	gp_denom(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end4:
	.size	_Z11free_arraysv, .Lfunc_end4-_Z11free_arraysv
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m # -- Begin function _Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.type	_Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m,@function
_Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m: # @_Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m, .Lfunc_end5-_Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	startwtime,@object              # @startwtime
	.bss
	.globl	startwtime
	.p2align	3, 0x0
startwtime:
	.zero	16
	.size	startwtime, 16

	.type	endwtime,@object                # @endwtime
	.globl	endwtime
	.p2align	3, 0x0
endwtime:
	.zero	16
	.size	endwtime, 16

	.type	seq_time,@object                # @seq_time
	.globl	seq_time
	.p2align	3, 0x0
seq_time:
	.quad	0x0000000000000000              # double 0
	.size	seq_time, 8

	.type	N,@object                       # @N
	.data
	.globl	N
	.p2align	2, 0x0
N:
	.long	5000                            # 0x1388
	.size	N, 4

	.type	D,@object                       # @D
	.globl	D
	.p2align	2, 0x0
D:
	.long	2                               # 0x2
	.size	D, 4

	.type	nT,@object                      # @nT
	.globl	nT
	.p2align	2, 0x0
nT:
	.long	500                             # 0x1f4
	.size	nT, 4

	.type	sigma,@object                   # @sigma
	.globl	sigma
	.p2align	2, 0x0
sigma:
	.long	0x437a0000                      # float 250
	.size	sigma, 4

	.type	MS_error,@object                # @MS_error
	.globl	MS_error
	.p2align	2, 0x0
MS_error:
	.long	0x38d1b717                      # float 9.99999974E-5
	.size	MS_error, 4

	.type	error,@object                   # @error
	.globl	error
	.p2align	2, 0x0
error:
	.long	0x43fc68f6                      # float 504.820007
	.size	error, 4

	.type	iter_limit,@object              # @iter_limit
	.globl	iter_limit
	.p2align	2, 0x0
iter_limit:
	.long	30                              # 0x1e
	.size	iter_limit, 4

	.type	cols,@object                    # @cols
	.bss
	.globl	cols
	.p2align	3, 0x0
cols:
	.quad	0                               # 0x0
	.size	cols, 8

	.type	rows,@object                    # @rows
	.globl	rows
	.p2align	3, 0x0
rows:
	.quad	0                               # 0x0
	.size	rows, 8

	.type	gp_N,@object                    # @gp_N
	.globl	gp_N
	.p2align	3, 0x0
gp_N:
	.quad	0
	.size	gp_N, 8

	.type	gp_D,@object                    # @gp_D
	.globl	gp_D
	.p2align	3, 0x0
gp_D:
	.quad	0
	.size	gp_D, 8

	.type	gp_sigma,@object                # @gp_sigma
	.globl	gp_sigma
	.p2align	3, 0x0
gp_sigma:
	.quad	0
	.size	gp_sigma, 8

	.type	gp_pitch,@object                # @gp_pitch
	.globl	gp_pitch
	.p2align	3, 0x0
gp_pitch:
	.quad	0                               # 0x0
	.size	gp_pitch, 8

	.type	x,@object                       # @x
	.globl	x
	.p2align	3, 0x0
x:
	.quad	0
	.size	x, 8

	.type	y,@object                       # @y
	.globl	y
	.p2align	3, 0x0
y:
	.quad	0
	.size	y, 8

	.type	val_y,@object                   # @val_y
	.globl	val_y
	.p2align	3, 0x0
val_y:
	.quad	0
	.size	val_y, 8

	.type	m,@object                       # @m
	.globl	m
	.p2align	3, 0x0
m:
	.quad	0
	.size	m, 8

	.type	gp_x,@object                    # @gp_x
	.globl	gp_x
	.p2align	3, 0x0
gp_x:
	.quad	0
	.size	gp_x, 8

	.type	gp_y,@object                    # @gp_y
	.globl	gp_y
	.p2align	3, 0x0
gp_y:
	.quad	0
	.size	gp_y, 8

	.type	gp_y_new,@object                # @gp_y_new
	.globl	gp_y_new
	.p2align	3, 0x0
gp_y_new:
	.quad	0
	.size	gp_y_new, 8

	.type	gp_m,@object                    # @gp_m
	.globl	gp_m
	.p2align	3, 0x0
gp_m:
	.quad	0
	.size	gp_m, 8

	.type	gp_g,@object                    # @gp_g
	.globl	gp_g
	.p2align	3, 0x0
gp_g:
	.quad	0
	.size	gp_g, 8

	.type	gp_numer,@object                # @gp_numer
	.globl	gp_numer
	.p2align	3, 0x0
gp_numer:
	.quad	0
	.size	gp_numer, 8

	.type	gp_denom,@object                # @gp_denom
	.globl	gp_denom
	.p2align	3, 0x0
gp_denom:
	.quad	0
	.size	gp_denom, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"KNN wall clock time = %f\n"
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"../../data/S_set/S_set_5000x2.txt"
	.size	.L.str.1, 34

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%f\t"
	.size	.L.str.3, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n"
	.size	.L.str.4, 2

	.type	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m,@object # @_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.section	.rodata,"a",@progbits
	.globl	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.p2align	3, 0x0
_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m:
	.quad	_Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.size	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"Iteration = %d, Error = %lf\n"
	.size	.L.str.5, 29

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"../../data/S_set/validation_S_set_5000x2.txt"
	.size	.L.str.6, 45

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"yout.txt"
	.size	.L.str.7, 9

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"w+"
	.size	.L.str.8, 3

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	" TEST %s\n"
	.size	.L.str.9, 10

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"PASSed"
	.size	.L.str.10, 7

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"FAILed"
	.size	.L.str.11, 7

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	" Errors = %d\n"
	.size	.L.str.12, 14

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m"
	.size	.L__unnamed_1, 48

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym startwtime
	.addrsig_sym endwtime
	.addrsig_sym N
	.addrsig_sym D
	.addrsig_sym sigma
	.addrsig_sym gp_N
	.addrsig_sym gp_D
	.addrsig_sym gp_sigma
	.addrsig_sym gp_pitch
	.addrsig_sym gp_x
	.addrsig_sym gp_y
	.addrsig_sym gp_y_new
	.addrsig_sym gp_m
	.addrsig_sym gp_g
	.addrsig_sym gp_numer
	.addrsig_sym gp_denom
	.addrsig_sym _Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m ; -- Begin function _Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.globl	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
	.p2align	8
	.type	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m,@function
_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m: ; @_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x64
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[6:7], 0x0
	s_clause 0x1
	s_load_b64 s[12:13], s[0:1], 0x20
	s_load_b128 s[16:19], s[0:1], 0x30
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v2, s2, v1
	v_mul_lo_u32 v6, v0, s2
	v_mov_b32_e32 v7, 0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 2, v6
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s16, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s12, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v9, v[2:3], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_add_i32 s2, s2, -1
	s_waitcnt vmcnt(1)
	ds_store_b32 v6, v8 offset:4000
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v9
	ds_store_b32 v6, v7 offset:12000
	ds_store_b32 v6, v7 offset:8000
	v_add_nc_u32_e32 v6, 4, v6
	s_cmp_lg_u32 s2, 0
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_load_b32 s2, s[4:5], 0x0
	s_mov_b32 s20, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_23
; %bb.4:                                ; %.preheader146
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_17
; %bb.5:                                ; %.lr.ph160
	s_load_b64 s[14:15], s[0:1], 0x50
	v_ashrrev_i32_e32 v2, 31, v1
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v6, 2, v0
	s_mov_b32 s21, 0x3e76c4e1
	s_mov_b32 s22, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s18, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s19, v3, vcc_lo
	s_mov_b32 s19, 0
.LBB0_6:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_8 Depth 2
                                        ;     Child Loop BB0_15 Depth 2
	s_load_b32 s23, s[6:7], 0x0
	v_mov_b32_e32 v5, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s23, 0
	s_mul_i32 s18, s23, s22
	s_cselect_b32 s24, -1, 0
	s_cmp_lt_i32 s23, 1
	s_cbranch_scc1 .LBB0_9
; %bb.7:                                ; %.lr.ph152
                                        ;   in Loop: Header=BB0_6 Depth=1
	v_mad_u64_u32 v[4:5], null, v6, s23, 0xfa0
	s_lshl_b64 s[0:1], s[18:19], 2
	v_mov_b32_e32 v5, 0
	s_add_u32 s2, s10, s0
	s_addc_u32 s3, s11, s1
	s_mov_b32 s25, s23
.LBB0_8:                                ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v7, s[2:3]
	ds_load_b32 v9, v4
	s_add_i32 s25, s25, -1
	v_add_nc_u32_e32 v4, 4, v4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_f32_e32 v8, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v9, |v8|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v9
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v9, v9, v11
	v_add_f32_e32 v11, 1.0, v9
	v_frexp_exp_i32_f32_e32 v10, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v13, v11
	v_subrev_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v10, v10
	v_dual_add_f32 v12, -1.0, v9 :: v_dual_mul_f32 v15, 0x3f317218, v10
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, v12, v13
	v_add_f32_e32 v14, -1.0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v14
	v_fma_f32 v14, 0x3f317218, v10, -v15
	v_fmac_f32_e32 v14, 0xb102e308, v10
	v_mul_f32_e32 v10, v11, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, v16, v11, -v10
	v_fmac_f32_e32 v11, v16, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v10, v11
	v_sub_f32_e32 v17, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v12, v17
	v_dual_sub_f32 v10, v9, v10 :: v_dual_sub_f32 v9, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v10, v11
	v_add_f32_e32 v9, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v17, v9
	v_mul_f32_e32 v9, v13, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v16, v9
	v_sub_f32_e32 v11, v10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v12, v10, v10 :: v_dual_sub_f32 v9, v9, v11
	v_fma_f32 v11, v10, v10, -v12
	v_ldexp_f32 v13, v10, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v16, v9, v9
	v_ldexp_f32 v17, v9, 1
	v_fmac_f32_e32 v11, v10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v16, v12, v11
	v_fmaak_f32 v18, s21, v16, 0x3e91f4c4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmaak_f32 v18, v16, v18, 0x3ecccdef
	v_sub_f32_e32 v12, v16, v12
	v_dual_mul_f32 v19, v10, v16 :: v_dual_mul_f32 v20, v16, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v11, v11, v12
	v_fma_f32 v12, v16, v10, -v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v12, v16, v9
	v_fma_f32 v9, v16, v18, -v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v11, v10
	v_fmac_f32_e32 v9, v11, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v20, v9
	v_sub_f32_e32 v18, v11, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v18
	v_dual_add_f32 v9, 0x31739010, v9 :: v_dual_add_f32 v10, v19, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v16, v10, v19
	v_dual_add_f32 v19, 0x3f2aaaaa, v11 :: v_dual_sub_f32 v12, v12, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v16, 0xbf2aaaaa, v19
	v_sub_f32_e32 v11, v11, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v9, v11
	v_add_f32_e32 v11, v19, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v16, v19, v11
	v_dual_mul_f32 v18, v10, v11 :: v_dual_add_f32 v9, v9, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, v10, v11, -v18
	v_fmac_f32_e32 v16, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v12, v11
	v_add_f32_e32 v9, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v13, v9
	v_sub_f32_e32 v11, v9, v18
	v_dual_sub_f32 v11, v16, v11 :: v_dual_sub_f32 v12, v10, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v11, v17, v11
	v_dual_sub_f32 v9, v9, v12 :: v_dual_add_f32 v12, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v9, v11, v9
	v_sub_f32_e32 v11, v12, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v13, v10, v9
	v_dual_sub_f32 v11, v14, v11 :: v_dual_add_f32 v14, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v13, v10 :: v_dual_sub_f32 v15, v14, v12
	v_dual_sub_f32 v9, v9, v10 :: v_dual_sub_f32 v10, v14, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v12, v10 :: v_dual_sub_f32 v13, v13, v15
	v_dual_add_f32 v15, v11, v9 :: v_dual_add_f32 v10, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v12, v15, v11
	v_add_f32_e32 v10, v15, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v13, v15, v12
	v_dual_sub_f32 v9, v9, v12 :: v_dual_add_f32 v12, v14, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v11, v11, v13
	v_sub_f32_e32 v13, v12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v10, v13 :: v_dual_add_f32 v9, v9, v11
	v_add_f32_e32 v9, v9, v10
	v_cndmask_b32_e64 v10, 2.0, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v12, v9
	v_dual_sub_f32 v12, v11, v12 :: v_dual_mul_f32 v13, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v9, v12
	v_fma_f32 v11, v10, v11, -v13
	v_cmp_class_f32_e64 vcc_lo, v13, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v10, v9
	v_add_f32_e32 v9, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v12, v9, v13, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v12
	v_cndmask_b32_e64 v14, 0, 0x37000000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v15, v12, v14
	v_mul_f32_e32 v16, 0x3fb8aa3b, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v17, 0x3fb8aa3b, v15, -v16
	v_rndne_f32_e32 v18, v16
	v_dual_fmac_f32 v17, 0x32a5705f, v15 :: v_dual_sub_f32 v16, v16, v18
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v12|
	v_trunc_f32_e32 v12, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v16, v16, v17
	v_sub_f32_e32 v9, v9, v13
	v_cvt_i32_f32_e32 v13, v18
	v_exp_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v11, v9
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v15
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v11, v16, v13
	v_mul_f32_e32 v13, 0.5, v10
	v_add_f32_e32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v11, 0, v11, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v15
	v_trunc_f32_e32 v16, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v11, 0x7f800000, v11, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v12, v10
	v_cmp_neq_f32_e64 s0, v16, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v9, v11, v9, v11
	v_cmp_eq_f32_e64 s1, 0x7f800000, v11
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, 1.0, v8, s0
	v_cndmask_b32_e64 v9, v9, v11, s1
	v_cmp_eq_f32_e64 s1, 0, v8
	v_cndmask_b32_e64 v11, 0, v8, s0
	v_cmp_class_f32_e64 s0, v8, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v9, 0x7fffffff, v9, v10
	v_cndmask_b32_e64 v10, 0x7f800000, 0, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v12, 0x7fc00000, v9, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v8
	v_bfi_b32 v10, 0x7fffffff, v10, v11
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v9, v12, vcc_lo
	s_or_b32 vcc_lo, s1, s0
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s25, 0
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v8, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, 0x7fc00000, v9, vcc_lo
	v_add_f32_e32 v5, v5, v8
	s_cbranch_scc1 .LBB0_8
.LBB0_9:                                ; %._crit_edge153
                                        ;   in Loop: Header=BB0_6 Depth=1
	global_load_b32 v8, v7, s[8:9]
	v_mul_f32_e32 v18, 0x4f800000, v5
	s_waitcnt vmcnt(0)
	v_frexp_mant_f32_e64 v4, |v8|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v4
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_ldexp_f32 v4, v4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, -1.0, v4
	v_add_f32_e32 v9, 1.0, v4
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v12, v11, v10 :: v_dual_add_f32 v13, -1.0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v14, v9, v12
	v_sub_f32_e32 v4, v4, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, v12, v9, -v14
	v_fmac_f32_e32 v9, v12, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v14, v9
	v_dual_sub_f32 v13, v11, v4 :: v_dual_sub_f32 v14, v4, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v14, v9
	v_sub_f32_e32 v11, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v11, v4
	v_add_f32_e32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v13, v4
	v_mul_f32_e32 v4, v10, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v12, v4
	v_mul_f32_e32 v11, v9, v9
	v_sub_f32_e32 v10, v9, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v4, v4, v10
	v_fma_f32 v10, v9, v9, -v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v4, v4
	v_fmac_f32_e32 v10, v9, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v11, v10
	v_fmaak_f32 v13, s21, v12, 0x3e91f4c4
	v_sub_f32_e32 v11, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v13, v12, v13, 0x3ecccdef :: v_dual_sub_f32 v10, v10, v11
	v_mul_f32_e32 v14, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, v12, v13, -v14
	v_dual_fmac_f32 v11, v10, v13 :: v_dual_mul_f32 v16, v9, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v13, v14, v11
	v_fma_f32 v17, v12, v9, -v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v14, v13, v14 :: v_dual_fmac_f32 v17, v12, v4
	v_add_f32_e32 v15, 0x3f2aaaaa, v13
	v_ldexp_f32 v4, v4, 1
	v_sub_f32_e32 v11, v11, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v17, v10, v9
	v_ldexp_f32 v9, v9, 1
	v_add_f32_e32 v11, 0x31739010, v11
	v_add_f32_e32 v14, 0xbf2aaaaa, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v13, v13, v14
	v_add_f32_e32 v11, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v15, v11
	v_dual_add_f32 v12, v16, v17 :: v_dual_sub_f32 v13, v15, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v14, v12, v10
	v_sub_f32_e32 v15, v12, v16
	v_add_f32_e32 v11, v11, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v13, v12, v10, -v14
	v_sub_f32_e32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v13, v12, v11
	v_frexp_exp_i32_f32_e32 v11, v8
	v_fmac_f32_e32 v13, v15, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v10, vcc_lo, 0, v11, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v8
	v_add_f32_e32 v11, v14, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v10, v10
	v_sub_f32_e32 v14, v11, v14
	v_add_f32_e32 v12, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v13, v13, v14
	v_dual_mul_f32 v15, 0x3f317218, v10 :: v_dual_add_f32 v4, v4, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v14, 0x3f317218, v10, -v15
	v_dual_fmac_f32 v14, 0xb102e308, v10 :: v_dual_sub_f32 v9, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v11, v9
	v_add_f32_e32 v4, v4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v10, v12, v4 :: v_dual_add_f32 v9, v15, v14
	v_dual_sub_f32 v12, v10, v12 :: v_dual_add_f32 v11, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v4, v4, v12 :: v_dual_sub_f32 v13, v11, v9
	v_dual_sub_f32 v10, v10, v13 :: v_dual_sub_f32 v15, v9, v15
	v_sub_f32_e32 v16, v11, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v14, v14, v15
	v_add_f32_e32 v12, v14, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v16
	v_dual_add_f32 v9, v10, v9 :: v_dual_sub_f32 v10, v12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v4, v10
	v_add_f32_e32 v9, v12, v9
	v_sub_f32_e32 v12, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v14, v12 :: v_dual_add_f32 v13, v11, v9
	v_dual_add_f32 v4, v4, v10 :: v_dual_sub_f32 v11, v13, v11
	v_cndmask_b32_e64 v10, 2.0, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v11
	v_add_f32_e32 v4, v4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v13, v4
	v_sub_f32_e32 v11, v9, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v4, v11
	v_mul_f32_e32 v12, v10, v9
	v_fma_f32 v9, v10, v9, -v12
	v_cmp_class_f32_e64 vcc_lo, v12, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v4
	v_add_f32_e32 v4, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v11, v4, v12, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v11
	v_cmp_neq_f32_e64 s0, 0x7f800000, |v11|
	v_cndmask_b32_e64 v13, 0, 0x37000000, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v14, v11, v13 :: v_dual_cndmask_b32 v5, v5, v18
	v_dual_mul_f32 v15, 0x3fb8aa3b, v14 :: v_dual_sub_f32 v4, v4, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v16, 0x3fb8aa3b, v14, -v15
	v_rndne_f32_e32 v17, v15
	v_sub_f32_e32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v16, 0x32a5705f, v14 :: v_dual_sub_f32 v15, v15, v17
	v_cvt_i32_f32_e32 v12, v17
	v_cndmask_b32_e64 v4, 0, v4, s0
	v_cmp_ngt_f32_e64 s0, 0xc2ce8ed0, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v15, v15, v16
	v_sqrt_f32_e32 v16, v5
	v_add_f32_e32 v4, v13, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_exp_f32_e32 v15, v15
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v17, -1, v16
	v_add_nc_u32_e32 v9, 1, v16
	v_ldexp_f32 v12, v15, v12
	v_mul_f32_e32 v15, 0.5, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v11, 0, v12, s0
	v_cmp_nlt_f32_e64 s0, 0x42b17218, v14
	v_trunc_f32_e32 v12, v10
	v_trunc_f32_e32 v18, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0x7f800000, v11, s0
	v_cmp_eq_f32_e64 s0, v12, v10
	v_fma_f32 v10, -v17, v16, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cmp_neq_f32_e64 s1, v18, v15
	v_fma_f32 v12, -v9, v16, v5
	v_fma_f32 v4, v11, v4, v11
	v_cmp_eq_f32_e64 s2, 0x7f800000, v11
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v13, 1.0, v8, s1
	v_cndmask_b32_e64 v4, v4, v11, s2
	v_cmp_ge_f32_e64 s2, 0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v4, 0x7fffffff, v4, v13
	v_cndmask_b32_e64 v10, v16, v17, s2
	v_cmp_lt_f32_e64 s2, 0, v12
	v_cndmask_b32_e64 v12, 0, v8, s1
	v_cmp_class_f32_e64 s1, v8, 0x204
	v_cndmask_b32_e64 v11, 0x7fc00000, v4, s0
	v_cmp_gt_f32_e64 s0, 0, v8
	v_cndmask_b32_e64 v9, v10, v9, s2
	v_cmp_eq_f32_e64 s2, 0, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v4, v4, v11, s0
	v_mul_f32_e32 v13, 0x37800000, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, 0x7f800000, 0, s2
	s_mov_b32 s0, exec_lo
	v_cndmask_b32_e32 v9, v9, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_bfi_b32 v10, 0x7fffffff, v10, v12
	s_or_b32 vcc_lo, s2, s1
	v_cndmask_b32_e32 v10, v4, v10, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v5, 0x260
	v_cndmask_b32_e32 v4, v9, v5, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v8, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v8, 0 :: v_dual_cndmask_b32 v5, 0x7fc00000, v10
	v_cmpx_ngt_f32_e32 v4, v5
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_6 Depth=1
	v_add_f32_e32 v5, v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v8, null, v5, v5, -v4
	v_div_scale_f32 v11, vcc_lo, -v4, v5, -v4
	v_rcp_f32_e32 v9, v8
	s_waitcnt_depctr 0xfff
	v_fma_f32 v10, -v8, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v9
	v_mul_f32_e32 v10, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v8, v10, v11
	v_fmac_f32_e32 v10, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v8, v10, v11
	v_div_fmas_f32 v8, v8, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v4, v8, v5, -v4
	v_mul_f32_e32 v5, 0x3fb8aa3b, v4
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v8, 0x3fb8aa3b, v4, -v5
	v_rndne_f32_e32 v9, v5
	v_dual_fmac_f32 v8, 0x32a5705f, v4 :: v_dual_sub_f32 v5, v5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v5, v5, v8
	v_cvt_i32_f32_e32 v8, v9
	v_exp_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v5, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v4
	v_cndmask_b32_e32 v8, 0x7f800000, v5, vcc_lo
.LBB0_11:                               ;   in Loop: Header=BB0_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u64_u32 v[4:5], null, s22, s14, v[2:3]
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, s22, s15, v[5:6]
	v_mov_b32_e32 v5, v9
	global_store_b32 v[4:5], v8, off
	v_cmpx_eq_u32_e64 s22, v1
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_6 Depth=1
	v_add_f32_e32 v8, 1.0, v8
	global_store_b32 v[4:5], v8, off
.LBB0_13:                               ;   in Loop: Header=BB0_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s24
	s_cbranch_vccnz .LBB0_16
; %bb.14:                               ; %.lr.ph157
                                        ;   in Loop: Header=BB0_6 Depth=1
	v_mad_u64_u32 v[4:5], null, v6, s23, 0x1f40
	s_lshl_b64 s[0:1], s[18:19], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
.LBB0_15:                               ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v5, v7, s[0:1]
	ds_load_b32 v9, v4
	ds_load_b32 v10, v4 offset:4000
	s_add_i32 s23, s23, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s23, 0
	s_waitcnt lgkmcnt(1)
	v_add_f32_e32 v9, v8, v9
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v10, v8, v5
	ds_store_b32 v4, v10 offset:4000
	ds_store_b32 v4, v9
	v_add_nc_u32_e32 v4, 4, v4
	s_cbranch_scc1 .LBB0_15
.LBB0_16:                               ; %._crit_edge158
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_load_b32 s0, s[4:5], 0x0
	s_add_i32 s22, s22, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s22, s0
	s_cbranch_scc0 .LBB0_6
.LBB0_17:                               ; %.preheader145
	s_load_b32 s0, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s0, 1
	s_cbranch_scc1 .LBB0_22
; %bb.18:                               ; %.lr.ph162
	v_mul_lo_u32 v2, v0, s0
	s_mov_b32 s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v2
	v_mov_b32_e32 v3, v2
.LBB0_19:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v4, v3 offset:12000
	ds_load_b32 v5, v3 offset:8000
	ds_load_b32 v6, v3 offset:4000
	s_add_i32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s1, 0
	s_waitcnt lgkmcnt(1)
	v_div_scale_f32 v7, null, v5, v5, v4
	v_div_scale_f32 v10, vcc_lo, v4, v5, v4
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v8
	v_mul_f32_e32 v9, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v7, v9, v10
	v_fmac_f32_e32 v9, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v7, v9, v10
	v_div_fmas_f32 v7, v7, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v4, v7, v5, v4
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v5, v4, v6
	ds_store_b32 v3, v4 offset:16000
	ds_store_b32 v3, v5
	v_add_nc_u32_e32 v3, 4, v3
	s_cbranch_scc0 .LBB0_19
; %bb.20:                               ; %.preheader
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, 0xfa0, v2
.LBB0_21:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v4, v2 offset:12000
	s_add_i32 s0, s0, -1
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v2, v4
	ds_store_b32 v2, v3 offset:8000
	ds_store_b32 v2, v3 offset:4000
	v_add_nc_u32_e32 v2, 4, v2
	s_cmp_lg_u32 s0, 0
	s_cbranch_scc1 .LBB0_21
.LBB0_22:                               ; %._crit_edge166
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_23:                               ; %Flow265
	s_or_b32 exec_lo, exec_lo, s20
	s_load_b32 s0, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s0, 1
	s_cbranch_scc1 .LBB0_26
; %bb.24:                               ; %.lr.ph169
	v_mul_lo_u32 v1, s0, v1
	v_mul_lo_u32 v4, v0, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b32_e32 v4, 2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s16, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s12, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
.LBB0_25:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v5, v4 offset:4000
	ds_load_b32 v6, v4
	v_add_nc_u32_e32 v4, 4, v4
	s_add_i32 s0, s0, -1
	s_waitcnt lgkmcnt(1)
	global_store_b32 v[2:3], v5, off
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v6, off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cmp_lg_u32 s0, 0
	s_cbranch_scc1 .LBB0_25
.LBB0_26:                               ; %._crit_edge170
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
		.amdhsa_group_segment_fixed_size 20000
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m, .Lfunc_end0-_Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3668
; NumSgprs: 28
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 20000 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
        .size:           8
        .value_kind:     by_value
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         92
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         100
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         102
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         104
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         106
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         108
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         110
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         152
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 20000
    .kernarg_segment_align: 8
    .kernarg_segment_size: 344
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m
    .private_segment_fixed_size: 0
    .sgpr_count:     28
    .sgpr_spill_count: 0
    .symbol:         _Z15cuda_mean_shiftPiS_PfS0_S0_S0_S0_S0_S0_S0_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     21
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
