#include <cstdio>

__global__ void update_device_data_kernel( unsigned long size, unsigned long order, unsigned long* A, unsigned long* B, unsigned long* C, double* residual, double* x )
{
    unsigned long const index = blockDim.x * blockIdx.x + threadIdx.x;
    if ( index >= size ) return;

    unsigned long* a = A + index * 4;
    unsigned long* b = B + index * 4;
    unsigned long* c = C + index * 4;
    double* alpha = x;
    double* beta = x + 4 * order;
    double* gamma = beta + 4 * order;

    double const weigh = c[0] + c[1] + c[2] + c[3] + 1.0;

#if 0
    printf( "size = %ld\n", size );
    printf( "order = %ld\n", order );
    printf( "index = %ld\n", index );
    printf( "weigh = %lf\n", weigh );

    printf( "a[0] = %ld\n", a[0] );
    printf( "a[1] = %ld\n", a[1] );
    printf( "a[2] = %ld\n", a[2] );
    printf( "a[3] = %ld\n", a[3] );

    printf( "b[0] = %ld\n", b[0] );
    printf( "b[1] = %ld\n", b[1] );
    printf( "b[2] = %ld\n", b[2] );
    printf( "b[3] = %ld\n", b[3] );

    printf( "c[0] = %ld\n", c[0] );
    printf( "c[1] = %ld\n", c[1] );
    printf( "c[2] = %ld\n", c[2] );
    printf( "c[3] = %ld\n", c[3] );
#endif
    double ss[6];
    double cc[4];

    for ( unsigned long jndex = 0; jndex < order; ++jndex )
    {
        unsigned long const offset = jndex * 4;
        double* alpha_ = alpha + offset;
        double* beta_ = beta + offset;
        ss[jndex] = 1.0*a[0]*alpha_[0] + a[1]*alpha_[1] + a[2]*alpha_[2] + a[3]*alpha_[3];
        ss[jndex] *= 1.0*b[0]*beta_[0] + b[1]*beta_[1] + b[2]*beta_[2] + b[3]*beta_[3];
#if 0
        printf( "ss[%ld/%ld] = %lf\n", jndex, order, ss[jndex] );
#endif
    }


    cc[0] = -1.0 * c[0]; cc[1] = -1.0 * c[1]; cc[2] = -1.0 * c[2]; cc[3] = -1.0 * c[3];

#if 0
    printf( "cc[0] = %lf\n", cc[0] );
    printf( "cc[1] = %lf\n", cc[1] );
    printf( "cc[2] = %lf\n", cc[2] );
    printf( "cc[3] = %lf\n", cc[3] );
    printf( "\n" );
#endif

    for ( unsigned long kndex = 0; kndex != order; ++kndex )
    {
#if 0
        double cc0 = gamma[kndex] * ss[kndex];
        double cc1 = gamma[kndex+order] * ss[kndex];
        double cc2 = gamma[kndex+order+order] * ss[kndex];
        double cc3 = gamma[kndex+order+order+order] * ss[kndex];
        printf( "kndex %ld\n", kndex );
        printf( "cc0 = %lf\n", cc0 );
        printf( "cc1 = %lf\n", cc1 );
        printf( "cc2 = %lf\n", cc2 );
        printf( "cc3 = %lf\n", cc3 );
        printf( "\n" );
#endif
        cc[0] += gamma[kndex] * ss[kndex];
        cc[1] += gamma[kndex+order] * ss[kndex];
        cc[2] += gamma[kndex+order+order] * ss[kndex];
        cc[3] += gamma[kndex+order+order+order] * ss[kndex];
    }
#if 0
    printf( "cc[0] = %lf\n", cc[0] );
    printf( "cc[1] = %lf\n", cc[1] );
    printf( "cc[2] = %lf\n", cc[2] );
    printf( "cc[3] = %lf\n", cc[3] );
#endif

    residual[index] = ( cc[0] + cc[1] + cc[2] + cc[3] ) / weigh;

}

void update_device_data( unsigned long size, unsigned long order, unsigned long* A, unsigned long* B, unsigned long* C, double* residual, double* x )
{
    update_device_data_kernel<<<1, size>>>( size, order, A, B, C, residual, x );
    cudaDeviceSynchronize();
}

	.file	"tmpxft_00374ec3_00000000-6_mm_fit.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z56__device_stub__Z25update_device_data_kernelmmPmS_S_PdS0_mmPmS_S_PdS0_
	.type	_Z56__device_stub__Z25update_device_data_kernelmmPmS_S_PdS0_mmPmS_S_PdS0_, @function
_Z56__device_stub__Z25update_device_data_kernelmmPmS_S_PdS0_mmPmS_S_PdS0_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z25update_device_data_kernelmmPmS_S_PdS0_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z56__device_stub__Z25update_device_data_kernelmmPmS_S_PdS0_mmPmS_S_PdS0_, .-_Z56__device_stub__Z25update_device_data_kernelmmPmS_S_PdS0_mmPmS_S_PdS0_
	.globl	_Z25update_device_data_kernelmmPmS_S_PdS0_
	.type	_Z25update_device_data_kernelmmPmS_S_PdS0_, @function
_Z25update_device_data_kernelmmPmS_S_PdS0_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z25update_device_data_kernelmmPmS_S_PdS0_mmPmS_S_PdS0_
	.cfi_endproc
.LFE2053:
	.size	_Z25update_device_data_kernelmmPmS_S_PdS0_, .-_Z25update_device_data_kernelmmPmS_S_PdS0_
	.globl	_Z18update_device_datammPmS_S_PdS0_
	.type	_Z18update_device_datammPmS_S_PdS0_, @function
_Z18update_device_datammPmS_S_PdS0_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	xorl	%r9d, %r9d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	%edi, 36(%rsp)
	movq	112(%rsp), %rbp
	movabsq	$4294967297, %rdi
	movq	%rdi, 40(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	movq	%rsi, 8(%rsp)
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%r15, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r14, %r8
	movq	%rbx, %rdi
	call	_Z56__device_stub__Z25update_device_data_kernelmmPmS_S_PdS0_mmPmS_S_PdS0_
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L9:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z18update_device_datammPmS_S_PdS0_, .-_Z18update_device_datammPmS_S_PdS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z25update_device_data_kernelmmPmS_S_PdS0_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z25update_device_data_kernelmmPmS_S_PdS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdio>

__global__ void update_device_data_kernel( unsigned long size, unsigned long order, unsigned long* A, unsigned long* B, unsigned long* C, double* residual, double* x )
{
    unsigned long const index = blockDim.x * blockIdx.x + threadIdx.x;
    if ( index >= size ) return;

    unsigned long* a = A + index * 4;
    unsigned long* b = B + index * 4;
    unsigned long* c = C + index * 4;
    double* alpha = x;
    double* beta = x + 4 * order;
    double* gamma = beta + 4 * order;

    double const weigh = c[0] + c[1] + c[2] + c[3] + 1.0;

#if 0
    printf( "size = %ld\n", size );
    printf( "order = %ld\n", order );
    printf( "index = %ld\n", index );
    printf( "weigh = %lf\n", weigh );

    printf( "a[0] = %ld\n", a[0] );
    printf( "a[1] = %ld\n", a[1] );
    printf( "a[2] = %ld\n", a[2] );
    printf( "a[3] = %ld\n", a[3] );

    printf( "b[0] = %ld\n", b[0] );
    printf( "b[1] = %ld\n", b[1] );
    printf( "b[2] = %ld\n", b[2] );
    printf( "b[3] = %ld\n", b[3] );

    printf( "c[0] = %ld\n", c[0] );
    printf( "c[1] = %ld\n", c[1] );
    printf( "c[2] = %ld\n", c[2] );
    printf( "c[3] = %ld\n", c[3] );
#endif
    double ss[6];
    double cc[4];

    for ( unsigned long jndex = 0; jndex < order; ++jndex )
    {
        unsigned long const offset = jndex * 4;
        double* alpha_ = alpha + offset;
        double* beta_ = beta + offset;
        ss[jndex] = 1.0*a[0]*alpha_[0] + a[1]*alpha_[1] + a[2]*alpha_[2] + a[3]*alpha_[3];
        ss[jndex] *= 1.0*b[0]*beta_[0] + b[1]*beta_[1] + b[2]*beta_[2] + b[3]*beta_[3];
#if 0
        printf( "ss[%ld/%ld] = %lf\n", jndex, order, ss[jndex] );
#endif
    }


    cc[0] = -1.0 * c[0]; cc[1] = -1.0 * c[1]; cc[2] = -1.0 * c[2]; cc[3] = -1.0 * c[3];

#if 0
    printf( "cc[0] = %lf\n", cc[0] );
    printf( "cc[1] = %lf\n", cc[1] );
    printf( "cc[2] = %lf\n", cc[2] );
    printf( "cc[3] = %lf\n", cc[3] );
    printf( "\n" );
#endif

    for ( unsigned long kndex = 0; kndex != order; ++kndex )
    {
#if 0
        double cc0 = gamma[kndex] * ss[kndex];
        double cc1 = gamma[kndex+order] * ss[kndex];
        double cc2 = gamma[kndex+order+order] * ss[kndex];
        double cc3 = gamma[kndex+order+order+order] * ss[kndex];
        printf( "kndex %ld\n", kndex );
        printf( "cc0 = %lf\n", cc0 );
        printf( "cc1 = %lf\n", cc1 );
        printf( "cc2 = %lf\n", cc2 );
        printf( "cc3 = %lf\n", cc3 );
        printf( "\n" );
#endif
        cc[0] += gamma[kndex] * ss[kndex];
        cc[1] += gamma[kndex+order] * ss[kndex];
        cc[2] += gamma[kndex+order+order] * ss[kndex];
        cc[3] += gamma[kndex+order+order+order] * ss[kndex];
    }
#if 0
    printf( "cc[0] = %lf\n", cc[0] );
    printf( "cc[1] = %lf\n", cc[1] );
    printf( "cc[2] = %lf\n", cc[2] );
    printf( "cc[3] = %lf\n", cc[3] );
#endif

    residual[index] = ( cc[0] + cc[1] + cc[2] + cc[3] ) / weigh;

}

void update_device_data( unsigned long size, unsigned long order, unsigned long* A, unsigned long* B, unsigned long* C, double* residual, double* x )
{
    update_device_data_kernel<<<1, size>>>( size, order, A, B, C, residual, x );
    hipDeviceSynchronize();
}

	.text
	.file	"mm_fit.hip"
	.globl	_Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_ # -- Begin function _Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_
	.type	_Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_,@function
_Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_: # @_Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25update_device_data_kernelmmPmS_S_PdS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_, .Lfunc_end0-_Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z18update_device_datammPmS_S_PdS0_ # -- Begin function _Z18update_device_datammPmS_S_PdS0_
	.type	_Z18update_device_datammPmS_S_PdS0_,@function
_Z18update_device_datammPmS_S_PdS0_:    # @_Z18update_device_datammPmS_S_PdS0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	movq	80(%rsp), %rbx
	movl	%ebp, %edx
	btsq	$32, %rdx
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	$1, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	%rbx, (%rsp)
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movq	%r14, %r8
	movq	16(%rsp), %r9                   # 8-byte Reload
	callq	_Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_
.LBB1_2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end1:
	.size	_Z18update_device_datammPmS_S_PdS0_, .Lfunc_end1-_Z18update_device_datammPmS_S_PdS0_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25update_device_data_kernelmmPmS_S_PdS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z25update_device_data_kernelmmPmS_S_PdS0_,@object # @_Z25update_device_data_kernelmmPmS_S_PdS0_
	.section	.rodata,"a",@progbits
	.globl	_Z25update_device_data_kernelmmPmS_S_PdS0_
	.p2align	3, 0x0
_Z25update_device_data_kernelmmPmS_S_PdS0_:
	.quad	_Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_
	.size	_Z25update_device_data_kernelmmPmS_S_PdS0_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z25update_device_data_kernelmmPmS_S_PdS0_"
	.size	.L__unnamed_1, 43

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z40__device_stub__update_device_data_kernelmmPmS_S_PdS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z25update_device_data_kernelmmPmS_S_PdS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z25update_device_data_kernelmmPmS_S_PdS0_ ; -- Begin function _Z25update_device_data_kernelmmPmS_S_PdS0_
	.globl	_Z25update_device_data_kernelmmPmS_S_PdS0_
	.p2align	8
	.type	_Z25update_device_data_kernelmmPmS_S_PdS0_,@function
_Z25update_device_data_kernelmmPmS_S_PdS0_: ; @_Z25update_device_data_kernelmmPmS_S_PdS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b256 s[16:23], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[24:25], null, s15, s2, v[0:1]
	v_mov_b32_e32 v25, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u64_e64 s[16:17], v[24:25]
	s_cbranch_execz .LBB0_9
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x20
	v_lshlrev_b64 v[0:1], 5, v[24:25]
	s_cmp_lg_u64 s[18:19], 0
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[6:7], 0
	s_cselect_b32 s10, -1, 0
	s_cmp_eq_u64 s[18:19], 0
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b128 v[16:19], v[0:1], off offset:16
	global_load_b128 v[20:23], v[0:1], off
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b64 v[0:1], 2, v[24:25]
	s_mov_b32 s0, s4
	s_mov_b32 s1, s5
	s_lshl_b64 s[8:9], s[18:19], 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v4, vcc_lo, s20, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s21, v1, vcc_lo
	v_add_co_u32 v12, vcc_lo, s22, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, s23, v1, vcc_lo
	s_clause 0x1
	global_load_b128 v[0:3], v[4:5], off
	global_load_b128 v[4:7], v[4:5], off offset:16
	s_clause 0x1
	global_load_b128 v[8:11], v[12:13], off
	global_load_b128 v[12:15], v[12:13], off offset:16
	s_waitcnt vmcnt(3)
	v_cvt_f64_u32_e32 v[26:27], v1
	v_cvt_f64_u32_e32 v[28:29], v3
	s_waitcnt vmcnt(2)
	v_cvt_f64_u32_e32 v[30:31], v5
	v_cvt_f64_u32_e32 v[32:33], v7
	s_waitcnt vmcnt(1)
	v_cvt_f64_u32_e32 v[34:35], v9
	v_cvt_f64_u32_e32 v[36:37], v11
	s_waitcnt vmcnt(0)
	v_cvt_f64_u32_e32 v[38:39], v13
	v_cvt_f64_u32_e32 v[40:41], v15
	v_cvt_f64_u32_e32 v[0:1], v0
	v_cvt_f64_u32_e32 v[2:3], v2
	v_cvt_f64_u32_e32 v[4:5], v4
	v_cvt_f64_u32_e32 v[6:7], v6
	v_cvt_f64_u32_e32 v[8:9], v8
	v_cvt_f64_u32_e32 v[10:11], v10
	v_cvt_f64_u32_e32 v[12:13], v12
	v_cvt_f64_u32_e32 v[14:15], v14
	v_ldexp_f64 v[26:27], v[26:27], 32
	v_ldexp_f64 v[28:29], v[28:29], 32
	v_ldexp_f64 v[30:31], v[30:31], 32
	v_ldexp_f64 v[32:33], v[32:33], 32
	v_ldexp_f64 v[34:35], v[34:35], 32
	v_ldexp_f64 v[36:37], v[36:37], 32
	v_ldexp_f64 v[38:39], v[38:39], 32
	v_ldexp_f64 v[40:41], v[40:41], 32
	v_add_f64 v[26:27], v[26:27], v[0:1]
	v_add_f64 v[28:29], v[28:29], v[2:3]
	v_add_f64 v[30:31], v[30:31], v[4:5]
	v_add_f64 v[32:33], v[32:33], v[6:7]
	v_add_f64 v[34:35], v[34:35], v[8:9]
	v_add_f64 v[36:37], v[36:37], v[10:11]
	v_add_f64 v[38:39], v[38:39], v[12:13]
	v_add_f64 v[40:41], v[40:41], v[14:15]
                                        ; implicit-def: $vgpr0_vgpr1
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_load_b256 s[20:27], s[0:1], 0x0
	s_add_u32 s12, s0, s8
	s_addc_u32 s13, s1, s9
	s_lshl_b32 s11, s6, 1
	s_add_u32 s6, s6, 1
	s_mov_b32 m0, s11
	s_addc_u32 s7, s7, 0
	s_add_u32 s0, s0, 32
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u64 s[18:19], s[6:7]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[12:13], s[22:23], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], s[20:21], v[26:27], v[12:13]
	v_fma_f64 v[12:13], s[24:25], v[30:31], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], s[26:27], v[32:33], v[12:13]
	s_load_b256 s[20:27], s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[44:45], s[22:23], v[36:37]
	v_movreld_b32_e32 v0, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_movreld_b32_e32 v1, v43
	v_fma_f64 v[44:45], s[20:21], v[34:35], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], s[24:25], v[38:39], v[44:45]
	v_fma_f64 v[44:45], s[26:27], v[40:41], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[42:43], v[42:43], v[44:45]
	v_movreld_b32_e32 v0, v42
	s_delay_alu instid0(VALU_DEP_2)
	v_movreld_b32_e32 v1, v43
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
                                        ; implicit-def: $vgpr10_vgpr11
.LBB0_5:                                ; %._crit_edge
	s_waitcnt vmcnt(0)
	v_cvt_f64_u32_e32 v[12:13], v21
	v_cvt_f64_u32_e32 v[14:15], v23
	v_cvt_f64_u32_e32 v[26:27], v17
	v_cvt_f64_u32_e32 v[28:29], v19
	v_cvt_f64_u32_e32 v[30:31], v20
	v_cvt_f64_u32_e32 v[32:33], v22
	v_cvt_f64_u32_e32 v[34:35], v16
	v_cvt_f64_u32_e32 v[36:37], v18
	s_and_not1_b32 vcc_lo, exec_lo, s10
	v_ldexp_f64 v[12:13], v[12:13], 32
	v_ldexp_f64 v[14:15], v[14:15], 32
	v_ldexp_f64 v[38:39], v[26:27], 32
	v_ldexp_f64 v[40:41], v[28:29], 32
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[12:13], v[30:31]
	v_add_f64 v[28:29], v[14:15], v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[38:39], v[34:35]
	v_add_f64 v[12:13], v[40:41], v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v27, 0x80000000, v27
	v_xor_b32_e32 v29, 0x80000000, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v15, 0x80000000, v15
	v_xor_b32_e32 v13, 0x80000000, v13
	s_cbranch_vccnz .LBB0_8
; %bb.6:                                ; %.lr.ph92.preheader
	s_lshl_b64 s[0:1], s[18:19], 5
	s_mul_i32 s6, s19, 0x50
	s_add_u32 s7, s4, s0
	s_addc_u32 s8, s5, s1
	s_add_u32 s0, s7, s0
	s_mul_hi_u32 s7, s18, 0x50
	s_addc_u32 s1, s8, s1
	s_mul_i32 s8, s18, 0x50
	s_add_i32 s7, s7, s6
	s_add_u32 s6, s4, s8
	s_mul_i32 s8, s19, 0x58
	s_mul_hi_u32 s9, s18, 0x58
	s_mul_i32 s10, s18, 0x58
	s_addc_u32 s7, s5, s7
	s_add_i32 s9, s9, s8
	s_add_u32 s8, s4, s10
	s_mul_i32 s10, s19, 0x48
	s_mul_hi_u32 s11, s18, 0x48
	s_mul_i32 s12, s18, 0x48
	s_addc_u32 s9, s5, s9
	s_add_i32 s11, s11, s10
	s_add_u32 s4, s4, s12
	s_addc_u32 s5, s5, s11
	s_mov_b64 s[10:11], 0
.LBB0_7:                                ; %.lr.ph92
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b64 s[12:13], s[0:1], 0x0
	s_load_b64 s[14:15], s[4:5], 0x0
	s_load_b64 s[16:17], s[6:7], 0x0
	s_load_b64 s[20:21], s[8:9], 0x0
	s_lshl_b32 s22, s10, 1
	s_add_u32 s10, s10, 1
	s_mov_b32 m0, s22
	s_addc_u32 s11, s11, 0
	v_movrels_b32_e32 v31, v1
	v_movrels_b32_e32 v30, v0
	s_add_u32 s6, s6, 8
	s_addc_u32 s7, s7, 0
	s_add_u32 s8, s8, 8
	s_addc_u32 s9, s9, 0
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u64 s[18:19], s[10:11]
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[26:27], v[30:31], s[12:13], v[26:27]
	v_fma_f64 v[28:29], v[30:31], s[14:15], v[28:29]
	v_fma_f64 v[14:15], v[30:31], s[16:17], v[14:15]
	v_fma_f64 v[12:13], v[30:31], s[20:21], v[12:13]
	s_cbranch_scc0 .LBB0_7
.LBB0_8:                                ; %Flow180
	v_add_co_u32 v0, vcc_lo, v22, v20
	v_add_co_ci_u32_e32 v1, vcc_lo, v23, v21, vcc_lo
	v_add_f64 v[2:3], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v0, v16
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v0, v18
	v_add_co_ci_u32_e32 v0, vcc_lo, v1, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[4:5], v4
	v_cvt_f64_u32_e32 v[0:1], v0
	v_add_f64 v[2:3], v[2:3], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[2:3], v[2:3], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[4:5]
	v_add_f64 v[0:1], v[0:1], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[4:5], null, v[0:1], v[0:1], v[2:3]
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_div_scale_f64 v[8:9], vcc_lo, v[2:3], v[0:1], v[2:3]
	v_mul_f64 v[10:11], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[4:5], v[0:1], v[2:3]
	v_lshlrev_b64 v[2:3], 3, v[24:25]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25update_device_data_kernelmmPmS_S_PdS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 46
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z25update_device_data_kernelmmPmS_S_PdS0_, .Lfunc_end0-_Z25update_device_data_kernelmmPmS_S_PdS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1308
; NumSgprs: 30
; NumVgprs: 46
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 46
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z25update_device_data_kernelmmPmS_S_PdS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     30
    .sgpr_spill_count: 0
    .symbol:         _Z25update_device_data_kernelmmPmS_S_PdS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     46
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
