#include <algorithm>
#include <cassert>
#include <iostream>
#include <vector>

// __global__ means that its called from CPU to run on the GPU
__global__ void vectorAdd(const int *__restrict a, const int *__restrict b, int *__restrict c, int N)
{   
    // calculate the global thread id
    int tid = (blockIdx.x * blockDim.x) + threadIdx.x;

    if ( tid < N) // a quick boundary check
    {
        c[tid]  = a[tid] + b[tid]; // do the actual addition
    }
}

// check if the vector addition was performed correctly
void verify_result(std::vector<int> &a, std::vector<int> &b, 
                   std::vector<int>&c){

    for(int i =0; i<a.size(); i++){
        assert(c[i] == a[i] + b[i]);
    }
}

int main()
{
    constexpr int N = 1 << 16;
    constexpr size_t bytes = sizeof(int) * N;

    // declare the vectors to hold the data on the CPU 
    std::vector<int> a;
    a.reserve(N);

    std::vector<int> b;
    b.reserve(N);

    std::vector<int> c;
    c.reserve(N);

    // fill up the vectors
    for(int i=0; i < N; i++)
    {
        a.push_back(rand() % 100);
        b.push_back(rand() % 100);
    }

    // allocate space on the GPU
    int *d_a, *d_b, *d_c;
    cudaMalloc(&d_a, bytes);
    cudaMalloc(&d_b, bytes);
    cudaMalloc(&d_c, bytes);

    // transfer data from Host (CPU) to Device (GPU)
    cudaMemcpy(d_a, a.data(), bytes, cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, b.data(), bytes, cudaMemcpyHostToDevice);

    // Threads per CTA
    int NUM_THREADS = 1<<10;

    // CTAs per Grid
    // We need to launch at LEAST as many threads as we have elements
    // This equation pads an extra CTA to the grid if N cannot evenly be divided
    // by NUM_THREADS (e.g. N = 1025, NUM_THREADS = 1024)
    int NUM_BLOCKS = (N + NUM_THREADS - 1)/ NUM_THREADS;

    // Launch the kernel on the GPU
    // Kernel calls are asynchronous ( the CPU program continues execution after 
    // call, but not necessarily before the kernel finishes)
    vectorAdd<<< NUM_BLOCKS, NUM_THREADS >>>(d_a, d_b, d_c, N);
    
    // get the result back from the GPU
    cudaMemcpy(c.data(), d_c, bytes, cudaMemcpyDeviceToHost);

    verify_result(a, b, c);

    // Free memory on device
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);

    std::cout << "COMPLETED SUCCESSFULLY\n";

    return 0;



}


	.file	"tmpxft_003b38ea_00000000-6_vector_addition_pinned.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4266:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4266:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, @function
_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0:
.LFB4992:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L3
	movabsq	$2305843009213693951, %rax
	cmpq	%rdi, %rax
	jnb	.L4
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$4611686018427387903, %rax
	cmpq	%rdi, %rax
	jnb	.L5
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L5:
	call	_ZSt17__throw_bad_allocv@PLT
.L4:
	.cfi_def_cfa_offset 8
	salq	$2, %rdi
	jmp	_Znwm@PLT
.L3:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE4992:
	.size	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, .-_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"vector::_M_realloc_insert"
	.text
	.align 2
	.type	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0, @function
_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0:
.LFB4995:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 64
	movq	8(%rdi), %rdx
	cmpq	16(%rdi), %rdx
	je	.L11
	movl	(%rsi), %eax
	addq	$4, %rdx
	movl	%eax, -4(%rdx)
	movq	%rdx, 8(%rdi)
	jmp	.L10
.L11:
	movabsq	$2305843009213693951, %rbp
	movq	(%rdi), %r13
	movq	%rdx, %r14
	subq	%r13, %r14
	movq	%r14, %rax
	sarq	$2, %rax
	cmpq	%rbp, %rax
	jne	.L13
	leaq	.LC0(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L13:
	cmpq	%r13, %rdx
	movl	$1, %edx
	cmovne	%rax, %rdx
	addq	%rdx, %rax
	jc	.L17
	movabsq	$2305843009213693951, %rbp
	cmpq	%rbp, %rax
	cmovbe	%rax, %rbp
.L17:
	movq	%rbp, %rdi
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movq	%rax, %r12
	movl	(%r15), %eax
	movl	%eax, (%r12,%r14)
	testq	%r14, %r14
	jle	.L18
	movq	%r14, %rdx
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	memmove@PLT
.L18:
	leaq	4(%r12,%r14), %r14
	testq	%r13, %r13
	je	.L19
	movq	16(%rbx), %rsi
	movq	%r13, %rdi
	subq	%r13, %rsi
	call	_ZdlPvm@PLT
.L19:
	leaq	(%r12,%rbp,4), %rax
	movq	%r12, (%rbx)
	movq	%r14, 8(%rbx)
	movq	%rax, 16(%rbx)
.L10:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4995:
	.size	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0, .-_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	.globl	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.type	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_, @function
_Z13verify_resultRSt6vectorIiSaIiEES2_S2_:
.LFB4252:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE4252:
	.size	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_, .-_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.globl	_Z35__device_stub__Z9vectorAddPKiS0_PiiPKiS0_Pii
	.type	_Z35__device_stub__Z9vectorAddPKiS0_PiiPKiS0_Pii, @function
_Z35__device_stub__Z9vectorAddPKiS0_PiiPKiS0_Pii:
.LFB4288:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9vectorAddPKiS0_Pii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L27:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4288:
	.size	_Z35__device_stub__Z9vectorAddPKiS0_PiiPKiS0_Pii, .-_Z35__device_stub__Z9vectorAddPKiS0_PiiPKiS0_Pii
	.globl	_Z9vectorAddPKiS0_Pii
	.type	_Z9vectorAddPKiS0_Pii, @function
_Z9vectorAddPKiS0_Pii:
.LFB4289:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z9vectorAddPKiS0_PiiPKiS0_Pii
	.cfi_endproc
.LFE4289:
	.size	_Z9vectorAddPKiS0_Pii, .-_Z9vectorAddPKiS0_Pii
	.section	.rodata.str1.1
.LC1:
	.string	"_Z9vectorAddPKiS0_Pii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4291:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9vectorAddPKiS0_Pii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4291:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB4602:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L34
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L34:
	ret
	.cfi_endproc
.LFE4602:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.rodata._ZNSt6vectorIiSaIiEE7reserveEm.str1.1,"aMS",@progbits,1
.LC2:
	.string	"vector::reserve"
	.section	.text._ZNSt6vectorIiSaIiEE7reserveEm,"axG",@progbits,_ZNSt6vectorIiSaIiEE7reserveEm,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEE7reserveEm
	.type	_ZNSt6vectorIiSaIiEE7reserveEm, @function
_ZNSt6vectorIiSaIiEE7reserveEm:
.LFB4604:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	cmpq	%rsi, %rax
	jnb	.L37
	leaq	.LC2(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L37:
	movq	(%rdi), %rdx
	movq	16(%rdi), %rax
	movq	%rdi, %rbx
	movq	%rsi, %r12
	subq	%rdx, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jnb	.L36
	movq	8(%rdi), %r13
	movq	%rsi, %rdi
	subq	%rdx, %r13
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movq	(%rbx), %r14
	movq	8(%rbx), %rdx
	movq	%rax, %rbp
	subq	%r14, %rdx
	testq	%rdx, %rdx
	jle	.L39
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	memmove@PLT
	jmp	.L40
.L39:
	testq	%r14, %r14
	je	.L41
.L40:
	movq	16(%rbx), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L41:
	addq	%rbp, %r13
	leaq	0(%rbp,%r12,4), %rax
	movq	%rbp, (%rbx)
	movq	%r13, 8(%rbx)
	movq	%rax, 16(%rbx)
.L36:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4604:
	.size	_ZNSt6vectorIiSaIiEE7reserveEm, .-_ZNSt6vectorIiSaIiEE7reserveEm
	.section	.rodata.str1.1
.LC3:
	.string	"COMPLETED SUCCESSFULLY\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4253:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4253
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%ecx, %ecx
	movl	$65536, %esi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	addq	$-128, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rbp
	movq	%rcx, 48(%rsp)
	movq	%rbp, %rdi
	movq	%rcx, 56(%rsp)
	movq	%rcx, 64(%rsp)
.LEHB0:
	call	_ZNSt6vectorIiSaIiEE7reserveEm
.LEHE0:
	leaq	72(%rsp), %r12
	xorl	%edx, %edx
	movl	$65536, %esi
	movq	%r12, %rdi
	movq	%rdx, 72(%rsp)
	movq	%rdx, 80(%rsp)
	movq	%rdx, 88(%rsp)
.LEHB1:
	call	_ZNSt6vectorIiSaIiEE7reserveEm
.LEHE1:
	leaq	96(%rsp), %r13
	xorl	%eax, %eax
	movl	$65536, %esi
	movq	%r13, %rdi
	movq	%rax, 96(%rsp)
	movq	%rax, 104(%rsp)
	movq	%rax, 112(%rsp)
.LEHB2:
	call	_ZNSt6vectorIiSaIiEE7reserveEm
	movl	$65536, %ebx
	leaq	36(%rsp), %r14
.L47:
	call	rand@PLT
	movl	$100, %ecx
	movq	%r14, %rsi
	movq	%rbp, %rdi
	cltd
	idivl	%ecx
	movl	%edx, 36(%rsp)
	call	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	call	rand@PLT
	movl	$100, %ecx
	movq	%r14, %rsi
	movq	%r12, %rdi
	cltd
	idivl	%ecx
	movl	%edx, 36(%rsp)
	call	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	decl	%ebx
	jne	.L47
	movq	%rsp, %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movl	$4194305, %edx
	movl	$67108865, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$10, %rdx
	movl	$1, %ecx
	salq	$6, %rdi
	movl	$1, %esi
	movq	%rdx, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movq	16(%rsp), %rdx
	testl	%eax, %eax
	jne	.L48
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$65536, %ecx
	call	_Z35__device_stub__Z9vectorAddPKiS0_PiiPKiS0_Pii
.L48:
	movq	16(%rsp), %rsi
	movq	96(%rsp), %rdi
	movl	$2, %ecx
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	$23, %edx
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.LEHE2:
	movq	%r13, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	%r12, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	%rbp, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L53
	jmp	.L58
.L56:
	endbr64
	movq	%rax, %rbx
.L49:
	movq	%r13, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L50
.L55:
	endbr64
	movq	%rax, %rbx
.L50:
	movq	%r12, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L51
.L54:
	endbr64
	movq	%rax, %rbx
.L51:
	movq	%rbp, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L58
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L58:
	call	__stack_chk_fail@PLT
.L53:
	subq	$-128, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4253:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4253:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4253-.LLSDACSB4253
.LLSDACSB4253:
	.uleb128 .LEHB0-.LFB4253
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L54-.LFB4253
	.uleb128 0
	.uleb128 .LEHB1-.LFB4253
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L55-.LFB4253
	.uleb128 0
	.uleb128 .LEHB2-.LFB4253
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L56-.LFB4253
	.uleb128 0
	.uleb128 .LEHB3-.LFB4253
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE4253:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <algorithm>
#include <cassert>
#include <iostream>
#include <vector>

// __global__ means that its called from CPU to run on the GPU
__global__ void vectorAdd(const int *__restrict a, const int *__restrict b, int *__restrict c, int N)
{   
    // calculate the global thread id
    int tid = (blockIdx.x * blockDim.x) + threadIdx.x;

    if ( tid < N) // a quick boundary check
    {
        c[tid]  = a[tid] + b[tid]; // do the actual addition
    }
}

// check if the vector addition was performed correctly
void verify_result(std::vector<int> &a, std::vector<int> &b, 
                   std::vector<int>&c){

    for(int i =0; i<a.size(); i++){
        assert(c[i] == a[i] + b[i]);
    }
}

int main()
{
    constexpr int N = 1 << 16;
    constexpr size_t bytes = sizeof(int) * N;

    // declare the vectors to hold the data on the CPU 
    std::vector<int> a;
    a.reserve(N);

    std::vector<int> b;
    b.reserve(N);

    std::vector<int> c;
    c.reserve(N);

    // fill up the vectors
    for(int i=0; i < N; i++)
    {
        a.push_back(rand() % 100);
        b.push_back(rand() % 100);
    }

    // allocate space on the GPU
    int *d_a, *d_b, *d_c;
    hipMalloc(&d_a, bytes);
    hipMalloc(&d_b, bytes);
    hipMalloc(&d_c, bytes);

    // transfer data from Host (CPU) to Device (GPU)
    hipMemcpy(d_a, a.data(), bytes, hipMemcpyHostToDevice);
    hipMemcpy(d_b, b.data(), bytes, hipMemcpyHostToDevice);

    // Threads per CTA
    int NUM_THREADS = 1<<10;

    // CTAs per Grid
    // We need to launch at LEAST as many threads as we have elements
    // This equation pads an extra CTA to the grid if N cannot evenly be divided
    // by NUM_THREADS (e.g. N = 1025, NUM_THREADS = 1024)
    int NUM_BLOCKS = (N + NUM_THREADS - 1)/ NUM_THREADS;

    // Launch the kernel on the GPU
    // Kernel calls are asynchronous ( the CPU program continues execution after 
    // call, but not necessarily before the kernel finishes)
    vectorAdd<<< NUM_BLOCKS, NUM_THREADS >>>(d_a, d_b, d_c, N);
    
    // get the result back from the GPU
    hipMemcpy(c.data(), d_c, bytes, hipMemcpyDeviceToHost);

    verify_result(a, b, c);

    // Free memory on device
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);

    std::cout << "COMPLETED SUCCESSFULLY\n";

    return 0;



}


	.text
	.file	"vector_addition_pinned.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__vectorAddPKiS0_Pii # -- Begin function _Z24__device_stub__vectorAddPKiS0_Pii
	.type	_Z24__device_stub__vectorAddPKiS0_Pii,@function
_Z24__device_stub__vectorAddPKiS0_Pii:  # @_Z24__device_stub__vectorAddPKiS0_Pii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9vectorAddPKiS0_Pii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__vectorAddPKiS0_Pii, .Lfunc_end0-_Z24__device_stub__vectorAddPKiS0_Pii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_ # -- Begin function _Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.type	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_,@function
_Z13verify_resultRSt6vectorIiSaIiEES2_S2_: # @_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end1:
	.size	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_, .Lfunc_end1-_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI2_0:
	.zero	16
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$120, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorps	%xmm0, %xmm0
	leaq	64(%rsp), %rdi
	movaps	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
.Ltmp0:
	movl	$65536, %esi                    # imm = 0x10000
	callq	_ZNSt6vectorIiSaIiEE7reserveEm
.Ltmp1:
# %bb.1:
	leaq	32(%rsp), %rdi
	xorps	%xmm0, %xmm0
	movaps	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
.Ltmp3:
	movl	$65536, %esi                    # imm = 0x10000
	callq	_ZNSt6vectorIiSaIiEE7reserveEm
.Ltmp4:
# %bb.2:
	xorps	%xmm0, %xmm0
	leaq	96(%rsp), %rdi
	movaps	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
.Ltmp6:
	movl	$65536, %esi                    # imm = 0x10000
	callq	_ZNSt6vectorIiSaIiEE7reserveEm
.Ltmp7:
# %bb.3:                                # %.preheader
	movl	$65536, %ebp                    # imm = 0x10000
	leaq	64(%rsp), %rbx
	leaq	8(%rsp), %r14
	leaq	32(%rsp), %r15
.LBB2_4:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, 8(%rsp)
	movq	72(%rsp), %rsi
	cmpq	80(%rsp), %rsi
	je	.LBB2_9
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=1
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 72(%rsp)
	jmp	.LBB2_10
.LBB2_9:                                #   in Loop: Header=BB2_4 Depth=1
.Ltmp9:
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp10:
.LBB2_10:                               # %_ZNSt6vectorIiSaIiEE9push_backEOi.exit
                                        #   in Loop: Header=BB2_4 Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, 8(%rsp)
	movq	40(%rsp), %rsi
	cmpq	48(%rsp), %rsi
	je	.LBB2_12
# %bb.11:                               #   in Loop: Header=BB2_4 Depth=1
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB2_13
.LBB2_12:                               #   in Loop: Header=BB2_4 Depth=1
.Ltmp12:
	movq	%r15, %rdi
	movq	%r14, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp13:
.LBB2_13:                               # %_ZNSt6vectorIiSaIiEE9push_backEOi.exit24
                                        #   in Loop: Header=BB2_4 Depth=1
	decl	%ebp
	jne	.LBB2_4
# %bb.14:
.Ltmp15:
	leaq	8(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
.Ltmp16:
# %bb.15:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp17:
	leaq	24(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
.Ltmp18:
# %bb.16:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit26
.Ltmp19:
	leaq	16(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
.Ltmp20:
# %bb.17:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit28
	movq	8(%rsp), %rdi
	movq	64(%rsp), %rsi
.Ltmp21:
	movl	$262144, %edx                   # imm = 0x40000
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp22:
# %bb.18:
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
.Ltmp23:
	movl	$262144, %edx                   # imm = 0x40000
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp24:
# %bb.19:
.Ltmp26:
	movabsq	$4294967360, %rdi               # imm = 0x100000040
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp27:
# %bb.20:
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.21:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
.Ltmp28:
	movl	$65536, %ecx                    # imm = 0x10000
	callq	_Z24__device_stub__vectorAddPKiS0_Pii
.Ltmp29:
.LBB2_22:
	movq	96(%rsp), %rdi
	movq	16(%rsp), %rsi
.Ltmp30:
	movl	$262144, %edx                   # imm = 0x40000
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp31:
# %bb.23:
	movq	8(%rsp), %rdi
.Ltmp32:
	callq	hipFree
.Ltmp33:
# %bb.24:
	movq	24(%rsp), %rdi
.Ltmp34:
	callq	hipFree
.Ltmp35:
# %bb.25:
	movq	16(%rsp), %rdi
.Ltmp36:
	callq	hipFree
.Ltmp37:
# %bb.26:
.Ltmp38:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp39:
# %bb.27:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	96(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB2_29
# %bb.28:
	callq	_ZdlPv
.LBB2_29:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB2_31
# %bb.30:
	callq	_ZdlPv
.LBB2_31:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit31
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB2_33
# %bb.32:
	callq	_ZdlPv
.LBB2_33:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit33
	xorl	%eax, %eax
	addq	$120, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_8:
	.cfi_def_cfa_offset 160
.Ltmp8:
	jmp	.LBB2_38
.LBB2_7:
.Ltmp5:
	movq	%rax, %rbx
	jmp	.LBB2_40
.LBB2_6:
.Ltmp2:
	movq	%rax, %rbx
	jmp	.LBB2_42
.LBB2_37:
.Ltmp25:
	jmp	.LBB2_38
.LBB2_36:
.Ltmp40:
	jmp	.LBB2_38
.LBB2_34:
.Ltmp11:
	jmp	.LBB2_38
.LBB2_35:
.Ltmp14:
.LBB2_38:
	movq	%rax, %rbx
	movq	96(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB2_40
# %bb.39:
	callq	_ZdlPv
.LBB2_40:
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB2_42
# %bb.41:
	callq	_ZdlPv
.LBB2_42:
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB2_44
# %bb.43:
	callq	_ZdlPv
.LBB2_44:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit39
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp24-.Ltmp15                #   Call between .Ltmp15 and .Ltmp24
	.uleb128 .Ltmp25-.Lfunc_begin0          #     jumps to .Ltmp25
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp26-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp39-.Ltmp26                #   Call between .Ltmp26 and .Ltmp39
	.uleb128 .Ltmp40-.Lfunc_begin0          #     jumps to .Ltmp40
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp39-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Lfunc_end2-.Ltmp39            #   Call between .Ltmp39 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE7reserveEm,"axG",@progbits,_ZNSt6vectorIiSaIiEE7reserveEm,comdat
	.weak	_ZNSt6vectorIiSaIiEE7reserveEm  # -- Begin function _ZNSt6vectorIiSaIiEE7reserveEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE7reserveEm,@function
_ZNSt6vectorIiSaIiEE7reserveEm:         # @_ZNSt6vectorIiSaIiEE7reserveEm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB3_8
# %bb.1:
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rdi), %r13
	movq	16(%rdi), %rax
	subq	%r13, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jae	.LBB3_7
# %bb.2:                                # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	8(%rbx), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %r15
	movq	(%rbx), %rsi
	movq	8(%rbx), %rdx
	subq	%rsi, %rdx
	testq	%rdx, %rdx
	jle	.LBB3_4
# %bb.3:
	movq	%r15, %rdi
	callq	memmove@PLT
	movq	(%rbx), %rsi
.LBB3_4:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	subq	%r13, %r12
	testq	%rsi, %rsi
	je	.LBB3_6
# %bb.5:
	movq	%rsi, %rdi
	callq	_ZdlPv
.LBB3_6:                                # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	movq	%r15, (%rbx)
	addq	%r15, %r12
	movq	%r12, 8(%rbx)
	leaq	(%r15,%r14,4), %rax
	movq	%rax, 16(%rbx)
.LBB3_7:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB3_8:
	.cfi_def_cfa_offset 48
	movl	$.L.str.1, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end3:
	.size	_ZNSt6vectorIiSaIiEE7reserveEm, .Lfunc_end3-_ZNSt6vectorIiSaIiEE7reserveEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIiE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIiE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIiE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIiE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIiE8allocateEmPKv,@function
_ZNSt15__new_allocatorIiE8allocateEmPKv: # @_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB4_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB4_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB4_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB4_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end4:
	.size	_ZNSt15__new_allocatorIiE8allocateEmPKv, .Lfunc_end4-_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_ # -- Begin function _ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,@function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_: # @_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.2, %edx
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB5_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB5_3
.LBB5_1:
	xorl	%ebp, %ebp
.LBB5_3:                                # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB5_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB5_5:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB5_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB5_7:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB5_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB5_9:                                # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .Lfunc_end5-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$2305843009213693951, %rcx      # imm = 0x1FFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$2, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB6_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB6_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end6:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .Lfunc_end6-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9vectorAddPKiS0_Pii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9vectorAddPKiS0_Pii,@object   # @_Z9vectorAddPKiS0_Pii
	.section	.rodata,"a",@progbits
	.globl	_Z9vectorAddPKiS0_Pii
	.p2align	3, 0x0
_Z9vectorAddPKiS0_Pii:
	.quad	_Z24__device_stub__vectorAddPKiS0_Pii
	.size	_Z9vectorAddPKiS0_Pii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"COMPLETED SUCCESSFULLY\n"
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"vector::reserve"
	.size	.L.str.1, 16

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.2, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9vectorAddPKiS0_Pii"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__vectorAddPKiS0_Pii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z9vectorAddPKiS0_Pii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9vectorAddPKiS0_Pii   ; -- Begin function _Z9vectorAddPKiS0_Pii
	.globl	_Z9vectorAddPKiS0_Pii
	.p2align	8
	.type	_Z9vectorAddPKiS0_Pii,@function
_Z9vectorAddPKiS0_Pii:                  ; @_Z9vectorAddPKiS0_Pii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9vectorAddPKiS0_Pii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9vectorAddPKiS0_Pii, .Lfunc_end0-_Z9vectorAddPKiS0_Pii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .actual_access:  read_only
        .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  write_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9vectorAddPKiS0_Pii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9vectorAddPKiS0_Pii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
