extern "C" {
typedef struct {
    int e0;
    char* e1;
} struct_Buffer_4844;
typedef struct {
    struct_Buffer_4844 e0;
    struct_Buffer_4844 e1;
    int e2;
    int e3;
} struct_image_4847;

__device__ inline int threadIdx_x() { return threadIdx.x; }
__device__ inline int threadIdx_y() { return threadIdx.y; }
__device__ inline int threadIdx_z() { return threadIdx.z; }
__device__ inline int blockIdx_x() { return blockIdx.x; }
__device__ inline int blockIdx_y() { return blockIdx.y; }
__device__ inline int blockIdx_z() { return blockIdx.z; }
__device__ inline int blockDim_x() { return blockDim.x; }
__device__ inline int blockDim_y() { return blockDim.y; }
__device__ inline int blockDim_z() { return blockDim.z; }
__device__ inline int gridDim_x() { return gridDim.x; }
__device__ inline int gridDim_y() { return gridDim.y; }
__device__ inline int gridDim_z() { return gridDim.z; }
__global__ void lambda_17870(double*, struct_Buffer_4844, struct_image_4847, double*);

__global__ __launch_bounds__ (128 * 1 * 1) void lambda_17870(double* _17873_19351, struct_Buffer_4844 _17874_19352, struct_image_4847 _17875_19353, double* _17876_19354) {
    int  _19360;
    int p_19360;
    int  _19366;
    int p_19366;
    int  _19372;
    int p_19372;
    int  _19378;
    int p_19378;
    int  _19384;
    int p_19384;
    int  _19390;
    int p_19390;
    int  _19415;
    int p_19415;
    double  sum_19417;
    double psum_19417;
    int  _19422;
    int p_19422;
    double  sum_19424;
    double psum_19424;
    #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
    _19360 = blockIdx_x();
    p_19360 = _19360;
    l19358: ;
        _19360 = p_19360;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19366 = blockDim_x();
        p_19366 = _19366;
    l19364: ;
        _19366 = p_19366;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19372 = threadIdx_x();
        p_19372 = _19372;
    l19370: ;
        _19372 = p_19372;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19378 = blockIdx_y();
        p_19378 = _19378;
    l19376: ;
        _19378 = p_19378;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19384 = blockDim_y();
        p_19384 = _19384;
    l19382: ;
        _19384 = p_19384;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19390 = threadIdx_y();
        p_19390 = _19390;
    l19388: ;
        _19390 = p_19390;
        #line 11 "main.impala"
        int _19394;
        _19394 = _17875_19353.e2;
        #line 119 "gpu_device.impala"
        int _19391;
        _19391 = _19360 * _19366;
        #line 119 "gpu_device.impala"
        int gid_x_19392;
        gid_x_19392 = _19391 + _19372;
        #line 124 "gpu_device.impala"
        bool _19395;
        _19395 = gid_x_19392 < _19394;
        #line 124 "gpu_device.impala"
        if (_19395) goto l19396; else goto l19476;
    l19476: ;
        #line 127 "gpu_device.impala"
        goto l19475;
    l19396: ;
        #line 121 "gpu_device.impala"
        int _19397;
        _19397 = _19378 * _19384;
        #line 121 "gpu_device.impala"
        int gid_y_19398;
        gid_y_19398 = _19397 + _19390;
        #line 11 "main.impala"
        int _19400;
        _19400 = _17875_19353.e3;
        #line 124 "gpu_device.impala"
        bool _19401;
        _19401 = gid_y_19398 < _19400;
        #line 124 "gpu_device.impala"
        if (_19401) goto l19402; else goto l19474;
    l19474: ;
        #line 127 "gpu_device.impala"
        goto l19475;
    l19475: ;
        return ;
    l19402: ;
        #line 68 "gaussian.impala"
        bool _19404;
        _19404 = 3 <= gid_x_19392;
        #line 49 "gpu_device.impala"
        int _19459;
        _19459 = gid_y_19398 * _19394;
        #line 49 "gpu_device.impala"
        int _19460;
        _19460 = _19459 + gid_x_19392;
        #line 44 "gpu_device.impala"
        char* _19457;
        _19457 = _17874_19352.e1;
        #line 49 "gpu_device.impala"
        struct_Buffer_4844 _19439;
        _19439 = _17875_19353.e1;
        #line 44 "gpu_device.impala"
        double* _19458;
        union { double* dst; char* src; } u_19458;
        u_19458.src = _19457;
        _19458 = u_19458.dst;
        #line 44 "gpu_device.impala"
        double* _19461;
        _19461 = _19458 + _19460;
        #line 49 "gpu_device.impala"
        char* _19440;
        _19440 = _19439.e1;
        #line 49 "gpu_device.impala"
        double* _19441;
        union { double* dst; char* src; } u_19441;
        u_19441.src = _19440;
        _19441 = u_19441.dst;
        #line 68 "gaussian.impala"
        if (_19404) goto l19405; else goto l19473;
    l19473: ;
        #line 80 "gaussian.impala"
        goto l19465;
    l19405: ;
        #line 68 "gaussian.impala"
        int _19406;
        _19406 = _19394 - 3;
        #line 68 "gaussian.impala"
        bool _19407;
        _19407 = gid_x_19392 < _19406;
        #line 68 "gaussian.impala"
        if (_19407) goto l19408; else goto l19472;
    l19472: ;
        #line 80 "gaussian.impala"
        goto l19465;
    l19408: ;
        #line 68 "gaussian.impala"
        bool _19409;
        _19409 = 3 <= gid_y_19398;
        #line 68 "gaussian.impala"
        if (_19409) goto l19410; else goto l19471;
    l19471: ;
        #line 80 "gaussian.impala"
        goto l19465;
    l19410: ;
        #line 68 "gaussian.impala"
        int _19411;
        _19411 = _19400 - 3;
        #line 68 "gaussian.impala"
        bool _19412;
        _19412 = gid_y_19398 < _19411;
        #line 68 "gaussian.impala"
        if (_19412) goto l19413; else goto l19464;
    l19464: ;
        #line 80 "gaussian.impala"
        goto l19465;
    l19465: ;
        #line 49 "gpu_device.impala"
        double* _19466;
        _19466 = _19441 + _19460;
        #line 49 "gpu_device.impala"
        double _19467;
        _19467 = *_19466;
        #line 49 "gpu_device.impala"
        double _19469;
        _19469 = _19467;
        #line 44 "gpu_device.impala"
        *_19461 = _19469;
        return ;
    l19413: ;
        #line 18 "gpu_device.impala"
        p_19415 = -3;
        psum_19417 = 0.000000e+00;
        goto l19414;
    l19414: ;
        _19415 = p_19415;
        sum_19417 = psum_19417;
        #line 18 "gpu_device.impala"
        bool _19419;
        _19419 = _19415 < 4;
        #line 18 "gpu_device.impala"
        if (_19419) goto l19420; else goto l19456;
    l19456: ;
        #line 44 "gpu_device.impala"
        *_19461 = sum_19417;
        return ;
    l19420: ;
        #line 73 "gaussian.impala"
        int _19444;
        _19444 = gid_x_19392 + _19415;
        #line 18 "gpu_device.impala"
        p_19422 = -3;
        psum_19424 = sum_19417;
        goto l19421;
    l19421: ;
        _19422 = p_19422;
        sum_19424 = psum_19424;
        #line 18 "gpu_device.impala"
        bool _19425;
        _19425 = _19422 < 4;
        #line 18 "gpu_device.impala"
        if (_19425) goto l19426; else goto l19453;
    l19453: ;
        #line 22 "gpu_device.impala"
        int _19454;
        _19454 = 1 + _19415;
        #line 18 "gpu_device.impala"
        p_19415 = _19454;
        psum_19417 = sum_19424;
        goto l19414;
    l19426: ;
        #line 73 "gaussian.impala"
        int _19442;
        _19442 = gid_y_19398 + _19422;
        #line 73 "gaussian.impala"
        int _19430;
        _19430 = 3 + _19422;
        #line 22 "gpu_device.impala"
        int _19428;
        _19428 = 1 + _19422;
        #line 59 "gpu_device.impala"
        int _19431;
        _19431 = 7 * _19430;
        #line 49 "gpu_device.impala"
        int _19443;
        _19443 = _19442 * _19394;
        #line 59 "gpu_device.impala"
        int _19432;
        _19432 = _19431 + _19415;
        #line 49 "gpu_device.impala"
        int _19445;
        _19445 = _19443 + _19444;
        #line 59 "gpu_device.impala"
        int _19433;
        _19433 = 3 + _19432;
        #line 49 "gpu_device.impala"
        double* _19446;
        _19446 = _19441 + _19445;
        #line 59 "gpu_device.impala"
        double* _19434;
        _19434 = _17876_19354 + _19433;
        #line 59 "gpu_device.impala"
        double _19435;
        _19435 = *_19434;
        #line 59 "gpu_device.impala"
        double _19449;
        _19449 = _19435;
        #line 49 "gpu_device.impala"
        double _19447;
        _19447 = *_19446;
        #line 49 "gpu_device.impala"
        double _19450;
        _19450 = _19447;
        #line 73 "gaussian.impala"
        double _19451;
        _19451 = _19449 * _19450;
        #line 73 "gaussian.impala"
        double _19452;
        _19452 = sum_19424 + _19451;
        #line 18 "gpu_device.impala"
        p_19422 = _19428;
        psum_19424 = _19452;
        goto l19421;
}

}
	.file	"tmpxft_00387924_00000000-6_main_block.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2022:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2022:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z73__device_stub__Z12lambda_17870Pd18struct_Buffer_484417struct_image_4847S_PdR18struct_Buffer_4844R17struct_image_4847S_
	.type	_Z73__device_stub__Z12lambda_17870Pd18struct_Buffer_484417struct_image_4847S_PdR18struct_Buffer_4844R17struct_image_4847S_, @function
_Z73__device_stub__Z12lambda_17870Pd18struct_Buffer_484417struct_image_4847S_PdR18struct_Buffer_4844R17struct_image_4847S_:
.LFB2044:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rcx, (%rsp)
	leaq	32(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rsi, 96(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rdx, 104(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	lambda_17870(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z73__device_stub__Z12lambda_17870Pd18struct_Buffer_484417struct_image_4847S_PdR18struct_Buffer_4844R17struct_image_4847S_, .-_Z73__device_stub__Z12lambda_17870Pd18struct_Buffer_484417struct_image_4847S_PdR18struct_Buffer_4844R17struct_image_4847S_
	.globl	lambda_17870
	.type	lambda_17870, @function
lambda_17870:
.LFB2045:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rsi, (%rsp)
	movq	%rsp, %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	call	_Z73__device_stub__Z12lambda_17870Pd18struct_Buffer_484417struct_image_4847S_PdR18struct_Buffer_4844R17struct_image_4847S_
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2045:
	.size	lambda_17870, .-lambda_17870
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"lambda_17870"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2047:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	lambda_17870(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2047:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
extern "C" {
typedef struct {
    int e0;
    char* e1;
} struct_Buffer_4844;
typedef struct {
    struct_Buffer_4844 e0;
    struct_Buffer_4844 e1;
    int e2;
    int e3;
} struct_image_4847;

__device__ inline int threadIdx_x() { return threadIdx.x; }
__device__ inline int threadIdx_y() { return threadIdx.y; }
__device__ inline int threadIdx_z() { return threadIdx.z; }
__device__ inline int blockIdx_x() { return blockIdx.x; }
__device__ inline int blockIdx_y() { return blockIdx.y; }
__device__ inline int blockIdx_z() { return blockIdx.z; }
__device__ inline int blockDim_x() { return blockDim.x; }
__device__ inline int blockDim_y() { return blockDim.y; }
__device__ inline int blockDim_z() { return blockDim.z; }
__device__ inline int gridDim_x() { return gridDim.x; }
__device__ inline int gridDim_y() { return gridDim.y; }
__device__ inline int gridDim_z() { return gridDim.z; }
__global__ void lambda_17870(double*, struct_Buffer_4844, struct_image_4847, double*);

__global__ __launch_bounds__ (128 * 1 * 1) void lambda_17870(double* _17873_19351, struct_Buffer_4844 _17874_19352, struct_image_4847 _17875_19353, double* _17876_19354) {
    int  _19360;
    int p_19360;
    int  _19366;
    int p_19366;
    int  _19372;
    int p_19372;
    int  _19378;
    int p_19378;
    int  _19384;
    int p_19384;
    int  _19390;
    int p_19390;
    int  _19415;
    int p_19415;
    double  sum_19417;
    double psum_19417;
    int  _19422;
    int p_19422;
    double  sum_19424;
    double psum_19424;
    #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
    _19360 = blockIdx_x();
    p_19360 = _19360;
    l19358: ;
        _19360 = p_19360;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19366 = blockDim_x();
        p_19366 = _19366;
    l19364: ;
        _19366 = p_19366;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19372 = threadIdx_x();
        p_19372 = _19372;
    l19370: ;
        _19372 = p_19372;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19378 = blockIdx_y();
        p_19378 = _19378;
    l19376: ;
        _19378 = p_19378;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19384 = blockDim_y();
        p_19384 = _19384;
    l19382: ;
        _19384 = p_19384;
        #line 1 "/home/rafael/repositories/anydsl/runtime/platforms/intrinsics_cuda.impala"
        _19390 = threadIdx_y();
        p_19390 = _19390;
    l19388: ;
        _19390 = p_19390;
        #line 11 "main.impala"
        int _19394;
        _19394 = _17875_19353.e2;
        #line 119 "gpu_device.impala"
        int _19391;
        _19391 = _19360 * _19366;
        #line 119 "gpu_device.impala"
        int gid_x_19392;
        gid_x_19392 = _19391 + _19372;
        #line 124 "gpu_device.impala"
        bool _19395;
        _19395 = gid_x_19392 < _19394;
        #line 124 "gpu_device.impala"
        if (_19395) goto l19396; else goto l19476;
    l19476: ;
        #line 127 "gpu_device.impala"
        goto l19475;
    l19396: ;
        #line 121 "gpu_device.impala"
        int _19397;
        _19397 = _19378 * _19384;
        #line 121 "gpu_device.impala"
        int gid_y_19398;
        gid_y_19398 = _19397 + _19390;
        #line 11 "main.impala"
        int _19400;
        _19400 = _17875_19353.e3;
        #line 124 "gpu_device.impala"
        bool _19401;
        _19401 = gid_y_19398 < _19400;
        #line 124 "gpu_device.impala"
        if (_19401) goto l19402; else goto l19474;
    l19474: ;
        #line 127 "gpu_device.impala"
        goto l19475;
    l19475: ;
        return ;
    l19402: ;
        #line 68 "gaussian.impala"
        bool _19404;
        _19404 = 3 <= gid_x_19392;
        #line 49 "gpu_device.impala"
        int _19459;
        _19459 = gid_y_19398 * _19394;
        #line 49 "gpu_device.impala"
        int _19460;
        _19460 = _19459 + gid_x_19392;
        #line 44 "gpu_device.impala"
        char* _19457;
        _19457 = _17874_19352.e1;
        #line 49 "gpu_device.impala"
        struct_Buffer_4844 _19439;
        _19439 = _17875_19353.e1;
        #line 44 "gpu_device.impala"
        double* _19458;
        union { double* dst; char* src; } u_19458;
        u_19458.src = _19457;
        _19458 = u_19458.dst;
        #line 44 "gpu_device.impala"
        double* _19461;
        _19461 = _19458 + _19460;
        #line 49 "gpu_device.impala"
        char* _19440;
        _19440 = _19439.e1;
        #line 49 "gpu_device.impala"
        double* _19441;
        union { double* dst; char* src; } u_19441;
        u_19441.src = _19440;
        _19441 = u_19441.dst;
        #line 68 "gaussian.impala"
        if (_19404) goto l19405; else goto l19473;
    l19473: ;
        #line 80 "gaussian.impala"
        goto l19465;
    l19405: ;
        #line 68 "gaussian.impala"
        int _19406;
        _19406 = _19394 - 3;
        #line 68 "gaussian.impala"
        bool _19407;
        _19407 = gid_x_19392 < _19406;
        #line 68 "gaussian.impala"
        if (_19407) goto l19408; else goto l19472;
    l19472: ;
        #line 80 "gaussian.impala"
        goto l19465;
    l19408: ;
        #line 68 "gaussian.impala"
        bool _19409;
        _19409 = 3 <= gid_y_19398;
        #line 68 "gaussian.impala"
        if (_19409) goto l19410; else goto l19471;
    l19471: ;
        #line 80 "gaussian.impala"
        goto l19465;
    l19410: ;
        #line 68 "gaussian.impala"
        int _19411;
        _19411 = _19400 - 3;
        #line 68 "gaussian.impala"
        bool _19412;
        _19412 = gid_y_19398 < _19411;
        #line 68 "gaussian.impala"
        if (_19412) goto l19413; else goto l19464;
    l19464: ;
        #line 80 "gaussian.impala"
        goto l19465;
    l19465: ;
        #line 49 "gpu_device.impala"
        double* _19466;
        _19466 = _19441 + _19460;
        #line 49 "gpu_device.impala"
        double _19467;
        _19467 = *_19466;
        #line 49 "gpu_device.impala"
        double _19469;
        _19469 = _19467;
        #line 44 "gpu_device.impala"
        *_19461 = _19469;
        return ;
    l19413: ;
        #line 18 "gpu_device.impala"
        p_19415 = -3;
        psum_19417 = 0.000000e+00;
        goto l19414;
    l19414: ;
        _19415 = p_19415;
        sum_19417 = psum_19417;
        #line 18 "gpu_device.impala"
        bool _19419;
        _19419 = _19415 < 4;
        #line 18 "gpu_device.impala"
        if (_19419) goto l19420; else goto l19456;
    l19456: ;
        #line 44 "gpu_device.impala"
        *_19461 = sum_19417;
        return ;
    l19420: ;
        #line 73 "gaussian.impala"
        int _19444;
        _19444 = gid_x_19392 + _19415;
        #line 18 "gpu_device.impala"
        p_19422 = -3;
        psum_19424 = sum_19417;
        goto l19421;
    l19421: ;
        _19422 = p_19422;
        sum_19424 = psum_19424;
        #line 18 "gpu_device.impala"
        bool _19425;
        _19425 = _19422 < 4;
        #line 18 "gpu_device.impala"
        if (_19425) goto l19426; else goto l19453;
    l19453: ;
        #line 22 "gpu_device.impala"
        int _19454;
        _19454 = 1 + _19415;
        #line 18 "gpu_device.impala"
        p_19415 = _19454;
        psum_19417 = sum_19424;
        goto l19414;
    l19426: ;
        #line 73 "gaussian.impala"
        int _19442;
        _19442 = gid_y_19398 + _19422;
        #line 73 "gaussian.impala"
        int _19430;
        _19430 = 3 + _19422;
        #line 22 "gpu_device.impala"
        int _19428;
        _19428 = 1 + _19422;
        #line 59 "gpu_device.impala"
        int _19431;
        _19431 = 7 * _19430;
        #line 49 "gpu_device.impala"
        int _19443;
        _19443 = _19442 * _19394;
        #line 59 "gpu_device.impala"
        int _19432;
        _19432 = _19431 + _19415;
        #line 49 "gpu_device.impala"
        int _19445;
        _19445 = _19443 + _19444;
        #line 59 "gpu_device.impala"
        int _19433;
        _19433 = 3 + _19432;
        #line 49 "gpu_device.impala"
        double* _19446;
        _19446 = _19441 + _19445;
        #line 59 "gpu_device.impala"
        double* _19434;
        _19434 = _17876_19354 + _19433;
        #line 59 "gpu_device.impala"
        double _19435;
        _19435 = *_19434;
        #line 59 "gpu_device.impala"
        double _19449;
        _19449 = _19435;
        #line 49 "gpu_device.impala"
        double _19447;
        _19447 = *_19446;
        #line 49 "gpu_device.impala"
        double _19450;
        _19450 = _19447;
        #line 73 "gaussian.impala"
        double _19451;
        _19451 = _19449 * _19450;
        #line 73 "gaussian.impala"
        double _19452;
        _19452 = sum_19424 + _19451;
        #line 18 "gpu_device.impala"
        p_19422 = _19428;
        psum_19424 = _19452;
        goto l19421;
}

}
	.text
	.file	"main_block.hip"
	.globl	__device_stub__lambda_17870     # -- Begin function __device_stub__lambda_17870
	.type	__device_stub__lambda_17870,@function
__device_stub__lambda_17870:            # @__device_stub__lambda_17870
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	64(%rsp), %rax
	movl	%esi, (%rax)
	movq	%rdx, 8(%rax)
	leaq	24(%rsp), %rdx
	movq	%rdi, (%rdx)
	leaq	16(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rax, 8(%rbx)
	leaq	160(%rsp), %rax
	movq	%rax, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$lambda_17870, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__lambda_17870, .Lfunc_end0-__device_stub__lambda_17870
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$lambda_17870, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	lambda_17870,@object            # @lambda_17870
	.section	.rodata,"a",@progbits
	.globl	lambda_17870
	.p2align	3, 0x0
lambda_17870:
	.quad	__device_stub__lambda_17870
	.size	lambda_17870, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"lambda_17870"
	.size	.L__unnamed_1, 13

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__lambda_17870
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym lambda_17870
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	lambda_17870            ; -- Begin function lambda_17870
	.globl	lambda_17870
	.p2align	8
	.type	lambda_17870,@function
lambda_17870:                           ; @lambda_17870
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x54
	s_load_b64 s[6:7], s[0:1], 0x38
	s_add_u32 s2, s0, 24
	v_and_b32_e32 v3, 0x3ff, v0
	s_addc_u32 s3, s1, 0
	s_add_u32 s4, s0, 0x48
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s8, v[3:4]
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_i32_e64 s6, v1
	s_cbranch_execz .LBB0_16
; %bb.1:
	s_load_b32 s4, s[4:5], 0xc
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s4, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s7, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_16
; %bb.2:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b64 s[8:9], s[2:3], 0x18
	v_mad_u64_u32 v[4:5], null, v3, s6, v[1:2]
	v_min_i32_e32 v0, v1, v3
	s_add_i32 s2, s6, -3
	s_add_i32 s3, s7, -3
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	v_cmp_le_i32_e64 s2, s3, v3
	v_cmp_gt_i32_e64 s3, 3, v0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s2, vcc_lo, s2
	v_lshlrev_b64 v[7:8], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 s2, s2, s3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, s4, s4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v6, s4, s5, v8, s4
	s_and_saveexec_b32 s3, s2
	s_xor_b32 s2, exec_lo, s3
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_add_co_u32 v0, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v8, vcc_lo
                                        ; implicit-def: $vgpr3_vgpr4
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[5:6], v[0:1], off
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr1_vgpr2
.LBB0_4:                                ; %Flow129
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_16
; %bb.5:                                ; %.preheader
	s_load_b64 s[0:1], s[0:1], 0x40
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v2, 0
	v_mov_b32_e32 v8, 0
	s_mov_b32 s2, -3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, 24
	s_addc_u32 s1, s1, 0
.LBB0_6:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_11 Depth 2
	s_cmp_lt_i32 s2, 4
	s_cbranch_scc1 .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	s_mov_b32 s3, 0
	s_mov_b32 s5, 1
	global_store_b64 v[5:6], v[7:8], off
	s_branch .LBB0_9
.LBB0_8:                                ;   in Loop: Header=BB0_6 Depth=1
	s_mov_b32 s3, -1
                                        ; implicit-def: $sgpr5
.LBB0_9:                                ; %Flow126
                                        ;   in Loop: Header=BB0_6 Depth=1
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_15
; %bb.10:                               ;   in Loop: Header=BB0_6 Depth=1
	v_mov_b32_e32 v10, v8
	v_dual_mov_b32 v9, v7 :: v_dual_add_nc_u32 v0, s2, v1
	s_add_i32 s3, s2, 1
	s_add_i32 s4, s2, 21
	s_mov_b32 s7, -3
.LBB0_11:                               ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_gt_i32 s7, 3
	s_mov_b32 s5, 22
	s_cselect_b32 s10, -1, 0
	s_and_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=2
	v_add_nc_u32_e32 v4, s7, v3
	s_mul_i32 s5, s7, 7
	s_add_i32 s7, s7, 1
	s_add_i32 s12, s4, s5
	s_mov_b32 s5, 25
	v_mad_u64_u32 v[11:12], null, v4, s6, v[0:1]
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[12:13], 3
	s_add_u32 s12, s0, s12
	s_addc_u32 s13, s1, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s8, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo
	global_load_b64 v[13:14], v2, s[12:13]
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[7:8], v[13:14], v[11:12], v[7:8]
	s_branch .LBB0_14
.LBB0_13:                               ;   in Loop: Header=BB0_11 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_mov_b32 s2, s3
.LBB0_14:                               ;   in Loop: Header=BB0_11 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB0_11
.LBB0_15:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v7, v9 :: v_dual_mov_b32 v8, v10
	s_cmp_eq_u32 s5, 22
	s_cbranch_scc1 .LBB0_6
.LBB0_16:                               ; %.loopexit121
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel lambda_17870
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	lambda_17870, .Lfunc_end0-lambda_17870
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 604
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           16
        .value_kind:     by_value
      - .offset:         24
        .size:           40
        .value_kind:     by_value
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         136
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 128
    .name:           lambda_17870
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         lambda_17870.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
