#include <iostream>
#include <cstdlib>
#include <ctime>

#define BLOCK_SIZE 32

using namespace std;

int N;

__global__ void gpu(const int *a, const int *b, int n, int * c) {
	int   bx = blockIdx.x;     
	int   by = blockIdx.y;
	int   tx = threadIdx.x;        
	int   ty = threadIdx.y;
	float sum = 0;           
	int   ia = n * BLOCK_SIZE * by + n * ty;  
	int   ib = BLOCK_SIZE * bx + tx;
	
	for (int k = 0; k < n; k++) {
		sum += a[ia + k] * b[ib + k * n];
	}
	
	int ic = n * BLOCK_SIZE * by + BLOCK_SIZE * bx;

	c[ic + n * ty + tx] = sum;
}

int** cpu(int** a, int** b, int** c, int n) {
	for (int i = 0; i < n; i++) {
		for (int j = 0; j < n; j++) {
			c[i][j] = 0;
			for (int k = 0; k < n; k++) {
				c[i][j] += a[i][k] * b[k][j];
			}
		}
	}
	return c;
}

bool checkResult(int** a, int* b, int n) {
	for (int i = 0; i < n; i++) {
		for (int j = 0; j < n; j++) {
			if (a[i][j] != b[N * i + j])
				return false;
		}
	}
	return true;
}


int main(int argc, char *argv[]) {

	printf("Please type in N: ");
	scanf("%d", &N);

	// allocate host memory
	int** acpu;
	int** bcpu;
	int** ccpu;
	acpu = new int*[N];
	for (int i = 0; i < N; i++)
		acpu[i] = new int[N];

	bcpu = new int*[N];
	for (int i = 0; i < N; i++)
		bcpu[i] = new int[N];

	ccpu = new int*[N];
	for (int i = 0; i < N; i++)
		ccpu[i] = new int[N];

	int * a = new int[N*N];
	int * b = new int[N*N];
	int * c = new int[N*N];

	// filling matriсes
	for (int i = 0; i < N; i++) {
		for (int j = 0; j < N; j++) {
			int	k = N * i + j;
			a[k]= (rand()) % 10 + 1;
			b[k] = (rand()) % 10 + 1;
			acpu[i][j] = a[k];
			bcpu[i][j] = b[k];
			ccpu[i][j] = 0;
		}

	}
	
	clock_t time;
	time = clock();
	ccpu = cpu(acpu, bcpu, ccpu, N);
	time = clock() - time;

	int *dev_a = 0;
	int *dev_b = 0;
	int *dev_c = 0;
	int numBytes = N * N * sizeof(int);
    cudaError_t cudaStatus;
	float gpuTime = 0.0f;
	dim3 threads(BLOCK_SIZE, BLOCK_SIZE);
	dim3 blocks(N / threads.x, N / threads.y);

    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = cudaSetDevice(0);
    if (cudaStatus != cudaSuccess) {
        cout << "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?";
    }
	
    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = cudaMalloc((void**)&dev_c, numBytes);
    cudaStatus = cudaMalloc((void**)&dev_a, numBytes);
    cudaStatus = cudaMalloc((void**)&dev_b, numBytes);

	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	// asynchronously issue work to the GPU (all to stream 0)
	cudaEventRecord(start, 0);

    // Copy input vectors from host memory to GPU buffers.
    cudaStatus = cudaMemcpy(dev_a, a, numBytes, cudaMemcpyHostToDevice);
    cudaStatus = cudaMemcpy(dev_b, b, numBytes, cudaMemcpyHostToDevice);

    // Launch a kernel on the GPU with one thread for each element.
    gpu<<<blocks, threads>>>(dev_a, dev_b, N, dev_c);

    // Check for any errors launching the kernel
    cudaStatus = cudaGetLastError();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "gpu() launch failed: %s\n", cudaGetErrorString(cudaStatus));
    }

    cudaStatus = cudaDeviceSynchronize();

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = cudaMemcpy(c, dev_c, numBytes, cudaMemcpyDeviceToHost);

	cudaEventRecord(stop, 0);

	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&gpuTime, start, stop);
	
	if (checkResult(ccpu, c, N)) {
		printf("CPU time: %.2f ms\n", time * 1000.0 / CLOCKS_PER_SEC);
		printf("GPU time: %.2f ms\n", gpuTime);
	}
    
    cudaStatus = cudaDeviceReset();
	
    return 0;
}
	.file	"tmpxft_00338cd8_00000000-6_MatMul.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z3cpuPPiS0_S0_i
	.type	_Z3cpuPPiS0_S0_i, @function
_Z3cpuPPiS0_S0_i:
.LFB3635:
	.cfi_startproc
	endbr64
	movq	%rdi, %r9
	xorl	%edi, %edi
	movq	%rsi, %r10
	movq	%rdx, %rax
	cmpl	%edi, %ecx
	jg	.L12
	ret
.L12:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
.L6:
	movq	(%rax,%rdi,8), %rdx
	movq	(%r9,%rdi,8), %rbx
	xorl	%esi, %esi
.L5:
	xorl	%r8d, %r8d
	leaq	0(,%rsi,4), %rbp
	movl	%r8d, (%rdx,%rsi,4)
	xorl	%r8d, %r8d
.L4:
	movq	(%r10,%r8,8), %r11
	movl	(%r11,%rbp), %r11d
	imull	(%rbx,%r8,4), %r11d
	incq	%r8
	addl	%r11d, (%rdx,%rsi,4)
	cmpl	%r8d, %ecx
	jg	.L4
	incq	%rsi
	cmpl	%esi, %ecx
	jg	.L5
	incq	%rdi
	cmpl	%edi, %ecx
	jg	.L6
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z3cpuPPiS0_S0_i, .-_Z3cpuPPiS0_S0_i
	.globl	_Z11checkResultPPiS_i
	.type	_Z11checkResultPPiS_i, @function
_Z11checkResultPPiS_i:
.LFB3636:
	.cfi_startproc
	endbr64
	movslq	N(%rip), %r8
	xorl	%ecx, %ecx
	salq	$2, %r8
.L15:
	cmpl	%ecx, %edx
	jle	.L21
	movq	(%rdi,%rcx,8), %r9
	xorl	%eax, %eax
.L17:
	movl	(%rsi,%rax,4), %r10d
	cmpl	%r10d, (%r9,%rax,4)
	jne	.L19
	incq	%rax
	cmpl	%eax, %edx
	jg	.L17
	incq	%rcx
	addq	%r8, %rsi
	jmp	.L15
.L21:
	movb	$1, %al
	ret
.L19:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z11checkResultPPiS_i, .-_Z11checkResultPPiS_i
	.globl	_Z29__device_stub__Z3gpuPKiS0_iPiPKiS0_iPi
	.type	_Z29__device_stub__Z3gpuPKiS0_iPiPKiS0_iPi, @function
_Z29__device_stub__Z3gpuPKiS0_iPiPKiS0_iPi:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3gpuPKiS0_iPi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L22:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z29__device_stub__Z3gpuPKiS0_iPiPKiS0_iPi, .-_Z29__device_stub__Z3gpuPKiS0_iPiPKiS0_iPi
	.globl	_Z3gpuPKiS0_iPi
	.type	_Z3gpuPKiS0_iPi, @function
_Z3gpuPKiS0_iPi:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z3gpuPKiS0_iPiPKiS0_iPi
	.cfi_endproc
.LFE3663:
	.size	_Z3gpuPKiS0_iPi, .-_Z3gpuPKiS0_iPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Please type in N: "
.LC1:
	.string	"%d"
.LC3:
	.string	"cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?"
.LC4:
	.string	"gpu() launch failed: %s\n"
.LC7:
	.string	"CPU time: %.2f ms\n"
.LC8:
	.string	"GPU time: %.2f ms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC1(%rip), %rdi
	leaq	N(%rip), %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movslq	N(%rip), %rdi
	movabsq	$1152921504606846975, %rax
	cmpq	%rdi, %rax
	jb	.L28
	salq	$3, %rdi
	xorl	%ebp, %ebp
	call	_Znam@PLT
	movq	%rax, %rbx
	jmp	.L29
.L28:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L55
	call	__cxa_throw_bad_array_new_length@PLT
.L29:
	movslq	N(%rip), %rdi
	cmpl	%ebp, %edi
	jle	.L56
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rax, (%rbx,%rbp,8)
	incq	%rbp
	jmp	.L29
.L56:
	movabsq	$1152921504606846975, %rax
	cmpq	%rdi, %rax
	jb	.L28
	salq	$3, %rdi
	xorl	%r12d, %r12d
	call	_Znam@PLT
	movq	%rax, %rbp
.L32:
	movslq	N(%rip), %rdi
	cmpl	%r12d, %edi
	jle	.L57
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rax, 0(%rbp,%r12,8)
	incq	%r12
	jmp	.L32
.L57:
	movabsq	$1152921504606846975, %rax
	cmpq	%rdi, %rax
	jb	.L28
	salq	$3, %rdi
	xorl	%r13d, %r13d
	call	_Znam@PLT
	movq	%rax, %r12
.L34:
	movslq	N(%rip), %rdi
	cmpl	%r13d, %edi
	jle	.L58
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rax, (%r12,%r13,8)
	incq	%r13
	jmp	.L34
.L58:
	imull	%edi, %edi
	movl	$10, %r15d
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	_Znam@PLT
	movl	N(%rip), %edi
	movq	%rax, %r14
	imull	%edi, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	_Znam@PLT
	movl	N(%rip), %edi
	movq	%rax, %r13
	imull	%edi, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	_Znam@PLT
	xorl	%ecx, %ecx
	movq	%rax, (%rsp)
.L36:
	cmpl	%ecx, N(%rip)
	movl	%ecx, %edi
	jle	.L59
	xorl	%esi, %esi
.L38:
	movl	N(%rip), %eax
	cmpl	%esi, %eax
	jle	.L60
	imull	%edi, %eax
	movq	%rcx, 40(%rsp)
	movl	%edi, 36(%rsp)
	movq	%rsi, 24(%rsp)
	addl	%esi, %eax
	movl	%eax, 8(%rsp)
	call	rand@PLT
	movslq	8(%rsp), %r9
	cltd
	idivl	%r15d
	movq	%r9, 16(%rsp)
	leaq	(%r14,%r9,4), %r8
	movq	%r8, 8(%rsp)
	incl	%edx
	movl	%edx, (%r8)
	call	rand@PLT
	movq	40(%rsp), %rcx
	movq	8(%rsp), %r8
	cltd
	movq	24(%rsp), %rsi
	movq	16(%rsp), %r9
	idivl	%r15d
	movl	(%r8), %r8d
	movq	(%rbx,%rcx,8), %rax
	movl	36(%rsp), %edi
	movl	%r8d, (%rax,%rsi,4)
	movq	0(%rbp,%rcx,8), %rax
	incl	%edx
	movl	%edx, (%rax,%rsi,4)
	movq	(%r12,%rcx,8), %rax
	movl	%edx, 0(%r13,%r9,4)
	xorl	%edx, %edx
	movl	%edx, (%rax,%rsi,4)
	incq	%rsi
	jmp	.L38
.L60:
	incq	%rcx
	jmp	.L36
.L59:
	call	clock@PLT
	movq	%rbx, %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	N(%rip), %ecx
	movq	%rax, %r15
	call	_Z3cpuPPiS0_S0_i
	movq	%rax, %r12
	call	clock@PLT
	xorl	%edi, %edi
	movl	$0x00000000, 52(%rsp)
	movq	%rax, %rbp
	xorl	%eax, %eax
	movl	$1, 104(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rax, 64(%rsp)
	movq	%rax, 72(%rsp)
	movl	N(%rip), %eax
	movl	$1, 116(%rsp)
	movl	%eax, %ebx
	imull	%eax, %ebx
	shrl	$5, %eax
	movl	%eax, 108(%rsp)
	movl	%eax, 112(%rsp)
	sall	$2, %ebx
	call	cudaSetDevice@PLT
	testl	%eax, %eax
	je	.L39
	movl	$64, %edx
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L39:
	movslq	%ebx, %rbx
	leaq	72(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	104(%rsp), %ecx
	movl	116(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdi
	xorl	%r8d, %r8d
	movabsq	$137438953504, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	72(%rsp), %rcx
	movl	N(%rip), %edx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z29__device_stub__Z3gpuPKiS0_iPiPKiS0_iPi
.L40:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L41
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L41:
	call	cudaDeviceSynchronize@PLT
	movq	72(%rsp), %rsi
	movq	(%rsp), %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	leaq	52(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	N(%rip), %edx
	movq	(%rsp), %rsi
	movq	%r12, %rdi
	call	_Z11checkResultPPiS_i
	testb	%al, %al
	je	.L42
	subq	%r15, %rbp
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtsi2sdq	%rbp, %xmm0
	mulsd	.LC5(%rip), %xmm0
	divsd	.LC6(%rip), %xmm0
	call	__printf_chk@PLT
	movb	$1, %al
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	52(%rsp), %xmm0
	call	__printf_chk@PLT
.L42:
	call	cudaDeviceReset@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
.L55:
	call	__stack_chk_fail@PLT
.L43:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z3gpuPKiS0_iPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3gpuPKiS0_iPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	N
	.bss
	.align 4
	.type	N, @object
	.size	N, 4
N:
	.zero	4
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1083129856
	.align 8
.LC6:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
#include <ctime>

#define BLOCK_SIZE 32

using namespace std;

int N;

__global__ void gpu(const int *a, const int *b, int n, int * c) {
	int   bx = blockIdx.x;     
	int   by = blockIdx.y;
	int   tx = threadIdx.x;        
	int   ty = threadIdx.y;
	float sum = 0;           
	int   ia = n * BLOCK_SIZE * by + n * ty;  
	int   ib = BLOCK_SIZE * bx + tx;
	
	for (int k = 0; k < n; k++) {
		sum += a[ia + k] * b[ib + k * n];
	}
	
	int ic = n * BLOCK_SIZE * by + BLOCK_SIZE * bx;

	c[ic + n * ty + tx] = sum;
}

int** cpu(int** a, int** b, int** c, int n) {
	for (int i = 0; i < n; i++) {
		for (int j = 0; j < n; j++) {
			c[i][j] = 0;
			for (int k = 0; k < n; k++) {
				c[i][j] += a[i][k] * b[k][j];
			}
		}
	}
	return c;
}

bool checkResult(int** a, int* b, int n) {
	for (int i = 0; i < n; i++) {
		for (int j = 0; j < n; j++) {
			if (a[i][j] != b[N * i + j])
				return false;
		}
	}
	return true;
}


int main(int argc, char *argv[]) {

	printf("Please type in N: ");
	scanf("%d", &N);

	// allocate host memory
	int** acpu;
	int** bcpu;
	int** ccpu;
	acpu = new int*[N];
	for (int i = 0; i < N; i++)
		acpu[i] = new int[N];

	bcpu = new int*[N];
	for (int i = 0; i < N; i++)
		bcpu[i] = new int[N];

	ccpu = new int*[N];
	for (int i = 0; i < N; i++)
		ccpu[i] = new int[N];

	int * a = new int[N*N];
	int * b = new int[N*N];
	int * c = new int[N*N];

	// filling matriсes
	for (int i = 0; i < N; i++) {
		for (int j = 0; j < N; j++) {
			int	k = N * i + j;
			a[k]= (rand()) % 10 + 1;
			b[k] = (rand()) % 10 + 1;
			acpu[i][j] = a[k];
			bcpu[i][j] = b[k];
			ccpu[i][j] = 0;
		}

	}
	
	clock_t time;
	time = clock();
	ccpu = cpu(acpu, bcpu, ccpu, N);
	time = clock() - time;

	int *dev_a = 0;
	int *dev_b = 0;
	int *dev_c = 0;
	int numBytes = N * N * sizeof(int);
    hipError_t cudaStatus;
	float gpuTime = 0.0f;
	dim3 threads(BLOCK_SIZE, BLOCK_SIZE);
	dim3 blocks(N / threads.x, N / threads.y);

    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = hipSetDevice(0);
    if (cudaStatus != hipSuccess) {
        cout << "hipSetDevice failed!  Do you have a CUDA-capable GPU installed?";
    }
	
    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = hipMalloc((void**)&dev_c, numBytes);
    cudaStatus = hipMalloc((void**)&dev_a, numBytes);
    cudaStatus = hipMalloc((void**)&dev_b, numBytes);

	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);

	// asynchronously issue work to the GPU (all to stream 0)
	hipEventRecord(start, 0);

    // Copy input vectors from host memory to GPU buffers.
    cudaStatus = hipMemcpy(dev_a, a, numBytes, hipMemcpyHostToDevice);
    cudaStatus = hipMemcpy(dev_b, b, numBytes, hipMemcpyHostToDevice);

    // Launch a kernel on the GPU with one thread for each element.
    gpu<<<blocks, threads>>>(dev_a, dev_b, N, dev_c);

    // Check for any errors launching the kernel
    cudaStatus = hipGetLastError();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "gpu() launch failed: %s\n", hipGetErrorString(cudaStatus));
    }

    cudaStatus = hipDeviceSynchronize();

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = hipMemcpy(c, dev_c, numBytes, hipMemcpyDeviceToHost);

	hipEventRecord(stop, 0);

	hipEventSynchronize(stop);
	hipEventElapsedTime(&gpuTime, start, stop);
	
	if (checkResult(ccpu, c, N)) {
		printf("CPU time: %.2f ms\n", time * 1000.0 / CLOCKS_PER_SEC);
		printf("GPU time: %.2f ms\n", gpuTime);
	}
    
    cudaStatus = hipDeviceReset();
	
    return 0;
}
	.text
	.file	"MatMul.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z18__device_stub__gpuPKiS0_iPi # -- Begin function _Z18__device_stub__gpuPKiS0_iPi
	.type	_Z18__device_stub__gpuPKiS0_iPi,@function
_Z18__device_stub__gpuPKiS0_iPi:        # @_Z18__device_stub__gpuPKiS0_iPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3gpuPKiS0_iPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__gpuPKiS0_iPi, .Lfunc_end0-_Z18__device_stub__gpuPKiS0_iPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z3cpuPPiS0_S0_i                # -- Begin function _Z3cpuPPiS0_S0_i
	.type	_Z3cpuPPiS0_S0_i,@function
_Z3cpuPPiS0_S0_i:                       # @_Z3cpuPPiS0_S0_i
	.cfi_startproc
# %bb.0:
	movq	%rdx, %rax
	testl	%ecx, %ecx
	jle	.LBB1_8
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ecx
	xorl	%edx, %edx
.LBB1_2:                                # %.lr.ph26
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
	movq	(%rax,%rdx,8), %r8
	movq	(%rdi,%rdx,8), %r9
	xorl	%r10d, %r10d
.LBB1_3:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
	movl	$0, (%r8,%r10,4)
	xorl	%r11d, %r11d
	xorl	%ebx, %ebx
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	(%rsi,%r11,8), %r14
	movl	(%r14,%r10,4), %ebp
	imull	(%r9,%r11,4), %ebp
	addl	%ebp, %ebx
	movl	%ebx, (%r8,%r10,4)
	incq	%r11
	cmpq	%r11, %rcx
	jne	.LBB1_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=2
	incq	%r10
	cmpq	%rcx, %r10
	jne	.LBB1_3
# %bb.6:                                # %._crit_edge27
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%rdx
	cmpq	%rcx, %rdx
	jne	.LBB1_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB1_8:                                # %._crit_edge29
	retq
.Lfunc_end1:
	.size	_Z3cpuPPiS0_S0_i, .Lfunc_end1-_Z3cpuPPiS0_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11checkResultPPiS_i           # -- Begin function _Z11checkResultPPiS_i
	.type	_Z11checkResultPPiS_i,@function
_Z11checkResultPPiS_i:                  # @_Z11checkResultPPiS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB2_1
# %bb.3:                                # %.preheader.lr.ph
	movslq	N(%rip), %rcx
	movl	%edx, %edx
	shlq	$2, %rcx
	xorl	%r8d, %r8d
	xorl	%eax, %eax
.LBB2_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	movq	(%rdi,%r8,8), %r9
	xorl	%r10d, %r10d
.LBB2_6:                                #   Parent Loop BB2_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r9,%r10,4), %r11d
	cmpl	(%rsi,%r10,4), %r11d
	jne	.LBB2_2
# %bb.5:                                #   in Loop: Header=BB2_6 Depth=2
	incq	%r10
	cmpq	%r10, %rdx
	jne	.LBB2_6
# %bb.7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=1
	incq	%r8
	cmpq	%rdx, %r8
	setae	%al
	addq	%rcx, %rsi
	cmpq	%rdx, %r8
	jne	.LBB2_4
	jmp	.LBB2_2
.LBB2_1:
	movb	$1, %al
.LBB2_2:                                # %.thread
	andb	$1, %al
                                        # kill: def $al killed $al killed $rax
	retq
.Lfunc_end2:
	.size	_Z11checkResultPPiS_i, .Lfunc_end2-_Z11checkResultPPiS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x408f400000000000              # double 1000
.LCPI3_1:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$N, %esi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	N(%rip), %r14
	leaq	(,%r14,8), %rax
	testq	%r14, %r14
	movq	$-1, %rbx
	cmovnsq	%rax, %rbx
	movq	%rbx, %rdi
	callq	_Znam
	testq	%r14, %r14
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	jle	.LBB3_1
# %bb.23:                               # %.lr.ph
	movq	%rax, %rbp
	movl	%r14d, %r15d
	movq	%r14, %r12
	shlq	$2, %r12
	xorl	%r13d, %r13d
.LBB3_24:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, (%rbp,%r13,8)
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB3_24
# %bb.17:                               # %._crit_edge
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %rbp
	testl	%r14d, %r14d
	jle	.LBB3_2
# %bb.18:                               # %.lr.ph81
	xorl	%r13d, %r13d
.LBB3_19:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, (%rbp,%r13,8)
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB3_19
# %bb.20:                               # %._crit_edge82
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r13
	testl	%r14d, %r14d
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	jle	.LBB3_3
# %bb.21:                               # %.lr.ph85
	xorl	%ebx, %ebx
.LBB3_22:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, (%r13,%rbx,8)
	incq	%rbx
	cmpq	%rbx, %r15
	jne	.LBB3_22
	jmp	.LBB3_3
.LBB3_1:                                # %._crit_edge.thread
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %rbp
.LBB3_2:                                # %._crit_edge82.thread
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r13
.LBB3_3:                                # %._crit_edge86
	movl	%r14d, %ebx
	imull	%ebx, %ebx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	testl	%r14d, %r14d
	jle	.LBB3_8
# %bb.4:                                # %.preheader.preheader
	xorl	%ebx, %ebx
	movq	48(%rsp), %rbp                  # 8-byte Reload
.LBB3_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_26 Depth 2
	testl	%r14d, %r14d
	jle	.LBB3_6
# %bb.25:                               # %.lr.ph88
                                        #   in Loop: Header=BB3_5 Depth=1
	xorl	%r15d, %r15d
.LBB3_26:                               #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebx, %r14d
	addl	%r15d, %r14d
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	movq	%r13, %r12
	leal	(%rax,%rcx), %r13d
	incl	%r13d
	movslq	%r14d, %r14
	movl	%r13d, (%rbp,%r14,4)
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movl	%eax, (%rcx,%r14,4)
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	(%rcx,%rbx,8), %rcx
	movl	%r13d, (%rcx,%r15,4)
	movq	%r12, %r13
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	(%rcx,%rbx,8), %rcx
	movl	%eax, (%rcx,%r15,4)
	movq	(%r12,%rbx,8), %rax
	movl	$0, (%rax,%r15,4)
	incq	%r15
	movl	N(%rip), %r14d
	movslq	%r14d, %rax
	cmpq	%rax, %r15
	jl	.LBB3_26
	jmp	.LBB3_7
.LBB3_6:                                # %.preheader.._crit_edge89_crit_edge
                                        #   in Loop: Header=BB3_5 Depth=1
	movslq	%r14d, %rax
.LBB3_7:                                # %._crit_edge89
                                        #   in Loop: Header=BB3_5 Depth=1
	incq	%rbx
	cmpq	%rax, %rbx
	jl	.LBB3_5
.LBB3_8:                                # %._crit_edge91
	callq	clock
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movl	N(%rip), %ecx
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	callq	_Z3cpuPPiS0_S0_i
	callq	clock
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, 72(%rsp)
	movq	%rax, 64(%rsp)
	movq	%rax, 40(%rsp)
	movl	N(%rip), %eax
	movl	%eax, %ebx
	imull	%eax, %ebx
	shll	$2, %ebx
	movl	$0, 12(%rsp)
	shrl	$5, %eax
	movq	%rax, %r15
	shlq	$32, %r15
	orq	%rax, %r15
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	je	.LBB3_10
# %bb.9:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$63, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB3_10:
	movslq	%ebx, %rbp
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %r14
	movq	%r14, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	96(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r14), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_12
# %bb.11:
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movl	N(%rip), %edx
	movq	40(%rsp), %rcx
	callq	_Z18__device_stub__gpuPKiS0_iPi
.LBB3_12:
	callq	hipGetLastError
	testl	%eax, %eax
	movq	88(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB3_13
.LBB3_14:
	callq	hipDeviceSynchronize
	movq	40(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	callq	hipEventSynchronize
	movq	96(%rsp), %rsi
	movq	32(%rsp), %rdx
	leaq	12(%rsp), %rdi
	callq	hipEventElapsedTime
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB3_31
# %bb.15:                               # %.preheader.lr.ph.i
	leaq	(,%rax,4), %rcx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB3_16:                               # %.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_28 Depth 2
	movq	(%r13,%rdx,8), %rdi
	xorl	%r8d, %r8d
.LBB3_28:                               #   Parent Loop BB3_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rdi,%r8,4), %r9d
	cmpl	(%rbx,%r8,4), %r9d
	jne	.LBB3_30
# %bb.27:                               #   in Loop: Header=BB3_28 Depth=2
	incq	%r8
	cmpq	%r8, %rax
	jne	.LBB3_28
# %bb.29:                               # %._crit_edge.i
                                        #   in Loop: Header=BB3_16 Depth=1
	incq	%rdx
	addq	%rcx, %rbx
	cmpq	%rax, %rdx
	setae	%sil
	jne	.LBB3_16
.LBB3_30:                               # %_Z11checkResultPPiS_i.exit
	testb	$1, %sil
	je	.LBB3_32
.LBB3_31:                               # %_Z11checkResultPPiS_i.exit.thread
	movq	16(%rsp), %rax                  # 8-byte Reload
	subq	80(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI3_0(%rip), %xmm0
	divsd	.LCPI3_1(%rip), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
.LBB3_32:
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_13:
	.cfi_def_cfa_offset 160
	movq	stderr(%rip), %r15
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movq	%r15, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_14
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3gpuPKiS0_iPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	N,@object                       # @N
	.bss
	.globl	N
	.p2align	2, 0x0
N:
	.long	0                               # 0x0
	.size	N, 4

	.type	_Z3gpuPKiS0_iPi,@object         # @_Z3gpuPKiS0_iPi
	.section	.rodata,"a",@progbits
	.globl	_Z3gpuPKiS0_iPi
	.p2align	3, 0x0
_Z3gpuPKiS0_iPi:
	.quad	_Z18__device_stub__gpuPKiS0_iPi
	.size	_Z3gpuPKiS0_iPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Please type in N: "
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"hipSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.size	.L.str.2, 64

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"gpu() launch failed: %s\n"
	.size	.L.str.3, 25

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CPU time: %.2f ms\n"
	.size	.L.str.4, 19

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"GPU time: %.2f ms\n"
	.size	.L.str.5, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3gpuPKiS0_iPi"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__gpuPKiS0_iPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym N
	.addrsig_sym _Z3gpuPKiS0_iPi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3gpuPKiS0_iPi         ; -- Begin function _Z3gpuPKiS0_iPi
	.globl	_Z3gpuPKiS0_iPi
	.p2align	8
	.type	_Z3gpuPKiS0_iPi,@function
_Z3gpuPKiS0_iPi:                        ; @_Z3gpuPKiS0_iPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v5, s14, 5, v2
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, v1, s2
	s_mul_i32 s3, s2, s15
	s_cmp_lt_i32 s2, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v0, s3, 5, v1
	s_cbranch_scc1 .LBB0_4
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[4:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v3, v5
	s_mov_b32 s3, s2
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v4, v[1:2], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v4, v4
	v_dual_add_f32 v6, v6, v4 :: v_dual_add_nc_u32 v3, s2, v3
	s_cbranch_scc0 .LBB0_2
; %bb.3:                                ; %._crit_edge.loopexit
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v1, v6
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v1, 0
.LBB0_5:                                ; %Flow
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v0, v5
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3gpuPKiS0_iPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3gpuPKiS0_iPi, .Lfunc_end0-_Z3gpuPKiS0_iPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 320
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3gpuPKiS0_iPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3gpuPKiS0_iPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
