//并行版本输入多维
#include <stdio.h>
#include <math.h>
#include <stdlib.h>
#include <time.h>

#define DIMENSION 2
#define INPUT_NEURAL_NUM DIMENSION+1
#define HIDDEN_NEURAL_NUM 5
#define OUTPUT_NEURAL_NUM DIMENSION
#define NEURAL_NUM HIDDEN_NEURAL_NUM + INPUT_NEURAL_NUM + OUTPUT_NEURAL_NUM
#define EPOCH 200
#define THREAD_EPOCH 200
#define STEPS 10

#define MUTATION_P  0.03
#define CROSS_P 0.7
#define PER_BENCHMARK_TIMES 3 
#define BENCHMARK_NUM 10
#define NEURAL_NETWORK_NUM (DIMENSION*PER_BENCHMARK_TIMES*BENCHMARK_NUM)  //每一个染色体上进行的神经网络
#define PI 3.1415926535897932384626433832795029
#define E 2.7182818284590452353602874713526625
#define SINGLE_WEIGHT (NEURAL_NUM)*(NEURAL_NUM - 1)
#define MAX 100
#define MIN -100
#define DEVICE_NUM 1
#define BLOCK 8*4
#define THREAD 192*4
#define NUM_CHROMO  (BLOCK*THREAD/(BENCHMARK_NUM*PER_BENCHMARK_TIMES))
#define G 0.002
#define W_MAX 0.01
#define W_MIN -0.01
#define DELTA_X_MAX 0.1
#define DELTA_X_MIN -0.1


struct NN
{
	float w[SINGLE_WEIGHT];
	float input_w[INPUT_NEURAL_NUM]; ////
	float old_neural[NEURAL_NUM];
	float new_neural[NEURAL_NUM];
};

struct CHROMO
{
	NN nn_initial;
	NN nn[PER_BENCHMARK_TIMES*BENCHMARK_NUM];
	float a[BENCHMARK_NUM*PER_BENCHMARK_TIMES], b[BENCHMARK_NUM*PER_BENCHMARK_TIMES], c[BENCHMARK_NUM*PER_BENCHMARK_TIMES], d[BENCHMARK_NUM*PER_BENCHMARK_TIMES];
	float A, B, C, D;
	float initial_position[BENCHMARK_NUM*PER_BENCHMARK_TIMES][DIMENSION];
	float position[BENCHMARK_NUM*PER_BENCHMARK_TIMES][DIMENSION];
};

struct IN_FITNESS
{
	float f[THREAD_EPOCH];
};

struct IN_POSITION
{
	float p[THREAD_EPOCH][DIMENSION];
};

void Sort(float *arr, int length, int *index)
{
	int i, j, tin;
	tin = 0;
	float temp = 0.0;
	for (i = 0; i < length - 1; i++)
	{
		for (j = 0; j < length - i - 1; j++)
		{
			if (arr[j] > arr[j + 1])
			{
				temp = arr[j];
				arr[j] = arr[j + 1];
				arr[j + 1] = temp;
				tin = index[j];
				index[j] = index[j + 1];
				index[j + 1] = tin;
			}
		}
	}
}
//锦标赛选择
void selection_tournment(struct CHROMO ch[NUM_CHROMO], float GA_Fitness[NUM_CHROMO], int g)
{
	int m, i, j, l, n, k, maxindex;
	m = NUM_CHROMO;
	int sel_num, sel_init, sel_final;
	sel_init = floor(NUM_CHROMO*0.15);
	sel_final = floor(NUM_CHROMO*0.666);
	sel_num = (int)(floor)(sel_final - sel_init) / (float)EPOCH*(g + 1) + sel_init;

	int *select;
	select = (int(*))malloc(sel_num * sizeof(int));
	int mark2[NUM_CHROMO] = { 0 };//标记个体有没有被选中
	int index[NUM_CHROMO] = { 0 };//
	float min;

	for (i = 0; i < m; i++)			// m = CHROMOSOME_NUM
	{
		for (j = 0; j < sel_num; j++)
		{
			int r2 = rand() % m + 1;   //1-m之间哪个个体（整数）
			while (mark2[r2 - 1] == 1)
			{
				r2 = rand() % m + 1;
			}
			mark2[r2 - 1] = 1;
			select[j] = r2 - 1;
		}
		min = GA_Fitness[select[0]];
		maxindex = select[0];
		for (k = 1; k < sel_num; k++)
		{
			if (GA_Fitness[select[k]] < min)
			{
				min = GA_Fitness[select[k]];
				maxindex = select[k];
			}
		}
		index[i] = maxindex;
		for (n = 0; n < NUM_CHROMO; n++)
		{
			mark2[n] = 0;
		}

		for (n = 0; n < sel_num; n++)
		{
			select[n] = 0;
		}
		for (l = 0; l < SINGLE_WEIGHT; l++)
		{
			ch[i].nn_initial.w[l] = ch[index[i]].nn_initial.w[l];
		}
		for (l = 0; l < INPUT_NEURAL_NUM; l++)
		{
			ch[i].nn_initial.input_w[l] = ch[index[i]].nn_initial.input_w[l];
		}
		ch[i].A = ch[index[i]].A;
		ch[i].B = ch[index[i]].B;
		ch[i].C = ch[index[i]].C;
		ch[i].D = ch[index[i]].D;
	}
	free(select);
}
//交叉
void crossover(struct CHROMO ch[NUM_CHROMO])
{
	//const double a = 0.0;
	//const double b = 1.0;
	time_t tttt;
	srand((unsigned int)time(&tttt));
	int two;
	int one;
	int first = 0;
	float r, r2;
	//int point;
	float t;
	int i;
	for (two = 0; two < NUM_CHROMO; two++)
	{
		r = (float)rand() / RAND_MAX;
		if (r < CROSS_P)
		{
			++first;
			if (first % 2 == 0)//交叉
			{
				//point = rand() % TOTAL_WEIGHT + 1;  //随机选择交叉点
				for (i = 0; i < SINGLE_WEIGHT; i++)
				{
					r2 = (float)rand() / (RAND_MAX + 1.0);
					if (r2 < 0.5)
					{
						t = ch[one].nn_initial.w[i];
						ch[one].nn_initial.w[i] = ch[two].nn_initial.w[i];
						ch[two].nn_initial.w[i] = t;
					}
				}
				for (i = 0; i < INPUT_NEURAL_NUM; i++)
				{
					r2 = (float)rand() / (RAND_MAX + 1.0);
					if (r2 < 0.5)
					{
						t = ch[one].nn_initial.input_w[i];
						ch[one].nn_initial.input_w[i] = ch[two].nn_initial.input_w[i];
						ch[two].nn_initial.input_w[i] = t;
					}
				}
				r2 = (float)rand() / (RAND_MAX + 1.0);
				if (r2 < 0.5)
				{
					t = ch[one].A;
					ch[one].A = ch[two].A;
					ch[two].A = t;
				}
				r2 = (float)rand() / (RAND_MAX + 1.0);
				if (r2 < 0.5)
				{
					t = ch[one].B;
					ch[one].B = ch[two].B;
					ch[two].B = t;
				}
				r2 = (float)rand() / (RAND_MAX + 1.0);
				if (r2 < 0.5)
				{
					t = ch[one].C;
					ch[one].C = ch[two].C;
					ch[two].C = t;
				}
				r2 = (float)rand() / (RAND_MAX + 1.0);
				if (r2 < 0.5)
				{
					t = ch[one].D;
					ch[one].D = ch[two].D;
					ch[two].D = t;
				}
			}
			else
			{
				one = two;
			}
		}
	}
}
//变异
void mutation(struct CHROMO ch[NUM_CHROMO])
{
	float r;
	time_t tttt;
	srand((unsigned int)time(&tttt));
	int i, j;
	for (i = 0; i < NUM_CHROMO; i++)
	{
		for (j = 0; j < INPUT_NEURAL_NUM; j++)
		{
			r = (float)rand() / (RAND_MAX + 1.0);
			if (r < MUTATION_P)
			{
				ch[i].nn_initial.input_w[j] = (float)rand() / (RAND_MAX + 1.0) * (W_MAX - W_MIN) - W_MAX;
			}
		}
		for (j = 0; j < SINGLE_WEIGHT; j++)
		{
			r = (float)rand() / (RAND_MAX + 1.0);
			if (r < MUTATION_P)
			{
				ch[i].nn_initial.w[j] = (float)rand() / (RAND_MAX + 1.0) * (W_MAX - W_MIN) - W_MAX;
			}
		}
		r = (float)rand() / (RAND_MAX + 1.0);
/*
		if (r < MUTATION_P)
		{
			ch[i].A = (float)rand() / RAND_MAX * 2.0 - 1.0;
		}
		r = (float)rand() / (RAND_MAX + 1.0);
		if (r < MUTATION_P)
		{
			ch[i].B = (float)rand() / RAND_MAX * 2.0 - 1.0;
		}
		r = (float)rand() / (RAND_MAX + 1.0);
		if (r < MUTATION_P)
		{
			ch[i].C = (float)rand() / RAND_MAX * 2.0 - 1.0;
		}
		r = (float)rand() / (RAND_MAX + 1.0);
		if (r < MUTATION_P)
		{
			ch[i].D = (float)rand() / RAND_MAX * 2.0 - 1.0;
		}
*/
		if (r < MUTATION_P)
		{
			ch[i].A = (float)rand() / RAND_MAX *  (W_MAX - W_MIN) - W_MAX;
			ch[i].B = (float)rand() / RAND_MAX *  (W_MAX - W_MIN) - W_MAX;
			ch[i].C = (float)rand() / RAND_MAX *  (W_MAX - W_MIN) - W_MAX;
			ch[i].D = (float)rand() / RAND_MAX *  (W_MAX - W_MIN) - W_MAX;
		}

	}
}

void initial_chromo(struct CHROMO chromo[NUM_CHROMO])
{
	time_t ti;
	srand((unsigned int)time(&ti));

	for (int i = 0; i < NUM_CHROMO; i++)
	{
		for (int j = 0; j < INPUT_NEURAL_NUM; j++)
		{
			chromo[i].nn_initial.input_w[j] = (float)rand() / RAND_MAX *(W_MAX - W_MIN) - W_MAX;
		}
		for (int j = 0; j < SINGLE_WEIGHT; j++)
		{
			chromo[i].nn_initial.w[j] = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		}
		chromo[i].A = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		chromo[i].B = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		chromo[i].C = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		chromo[i].D = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		for (int num_fun = 0; num_fun < BENCHMARK_NUM*PER_BENCHMARK_TIMES; num_fun++)
		{
			for (int j = 0; j < SINGLE_WEIGHT; j++)
			{
				chromo[i].nn[num_fun].w[j] = chromo[i].nn_initial.w[j];
			}
			for (int j = 0; j < INPUT_NEURAL_NUM; j++)
			{
				chromo[i].nn[num_fun].input_w[j] = chromo[i].nn_initial.input_w[j];
			}
			for (int j = 0; j < NEURAL_NUM; j++)
			{
				chromo[i].nn[num_fun].old_neural[j] = 0.5;
				chromo[i].nn[num_fun].new_neural[j] = 0.0;
			}
			for (int d = 0; d < DIMENSION; d++)
			{
				chromo[i].initial_position[num_fun][d] = (float)rand() / RAND_MAX * (MAX - MIN) - MAX;
				chromo[i].position[num_fun][d] = chromo[i].initial_position[num_fun][d];
			}
			chromo[i].a[num_fun] = chromo[i].A;
			chromo[i].b[num_fun] = chromo[i].B;
			chromo[i].c[num_fun] = chromo[i].C;
			chromo[i].d[num_fun] = chromo[i].D;
		}
	}
}
void initial_chromo(struct CHROMO &chromo)
{
	time_t tttt;
	srand((unsigned int)time(&tttt));
	int i = 0;
	for (i = 0; i<INPUT_NEURAL_NUM; i++)
	{
		chromo.nn_initial.input_w[i] = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	}
	for (i = 0; i<SINGLE_WEIGHT; i++)
	{
		chromo.nn_initial.w[i] = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	}
	chromo.A = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	chromo.B = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	chromo.C = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	chromo.D = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	for (int num_fun = 0; num_fun < BENCHMARK_NUM*PER_BENCHMARK_TIMES; num_fun++)
	{
		for (i = 0; i < SINGLE_WEIGHT; i++)
		{
			chromo.nn[num_fun].w[i] = chromo.nn_initial.w[i];
		}
		for (i = 0; i < INPUT_NEURAL_NUM; i++)
		{
			chromo.nn[num_fun].input_w[i] = chromo.nn_initial.input_w[i];
		}
		for (i = 0; i < NEURAL_NUM; i++)
		{
			chromo.nn[num_fun].old_neural[i] = 0.5;
			chromo.nn[num_fun].new_neural[i] = 0.0;
		}
		for (i = 0; i < DIMENSION; i++)
		{
			chromo.initial_position[num_fun][i] = (float)rand() / RAND_MAX * (MAX - MIN) - MAX;
			chromo.position[num_fun][i] = chromo.initial_position[num_fun][i];
		}
		chromo.a[num_fun] = chromo.A;
		chromo.b[num_fun] = chromo.B;
		chromo.c[num_fun] = chromo.C;
		chromo.d[num_fun] = chromo.D;
	}
}

float my_function(struct CHROMO ch[NUM_CHROMO], float fitness[NUM_CHROMO*PER_BENCHMARK_TIMES*BENCHMARK_NUM], struct CHROMO &GA_best_ch, int g)
{
	int temp_nn_index[NUM_CHROMO*PER_BENCHMARK_TIMES];//下标
	float nn_fitness[BENCHMARK_NUM*PER_BENCHMARK_TIMES][NUM_CHROMO];  //实际通过cec计算得出的适应值
	float nn_fitness_one_f[NUM_CHROMO];//所有染色体在同一个函数上的排序
	int record_sort_index[NUM_CHROMO];   //1个函数下的NUM_CHROMO*PER_BENCHMARK_TIMES个排名名次
	float record_nn_fitness_sort_index[BENCHMARK_NUM*PER_BENCHMARK_TIMES][NUM_CHROMO];  //10个函数下的CHROMOSOME_NUM个NN 名次
	float fitness_ranking[BENCHMARK_NUM + 1][NUM_CHROMO];
	float GA_fitness[NUM_CHROMO];
	float min_fit;
	FILE* f_temp_ch;
	FILE* f_temp_result = fopen("temp_result.txt", "a");
	//FILE* all_f_g = fopen("all_f_g.txt", "a");
	FILE* one_g_chromo[NUM_CHROMO + 1];
	char fileName[256];
	for (int i = 0; i < NUM_CHROMO; i++)
	{
		sprintf(fileName, "NN/g%d/ch_%d.txt", g + 1, i);
		one_g_chromo[i] = fopen(fileName, "w");
		if (one_g_chromo[i] == NULL)
		{
			printf("\n Error: Cannot open ch_%d filoe \n",i);
		}
		for (int j = 0; j < INPUT_NEURAL_NUM; j++)
		{
			fprintf(one_g_chromo[i], "%f\n", ch[i].nn_initial.input_w[j]);
		}
		for (int j = 0; j < SINGLE_WEIGHT; j++)
		{
			fprintf(one_g_chromo[i], "%f\n", ch[i].nn_initial.w[j]);
		}
		fprintf(one_g_chromo[i], "A:%f\n B:%f\n C:%f\n D:%f\n", ch[i].A, ch[i].B, ch[i].C, ch[i].D);
		fclose(one_g_chromo[i]);

	}
	for (int i = 0; i < BENCHMARK_NUM + 1; i++)
	{
		for (int j = 0; j < NUM_CHROMO; j++)
		{
			fitness_ranking[i][j] = 0.0;
		}
	}
	for (int fun_num = 0; fun_num < BENCHMARK_NUM*PER_BENCHMARK_TIMES; fun_num++)
	{
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			nn_fitness[fun_num][i] = 0.0;
		}
	}
	//排100个，分别排3次的话
	for (int fun_num = 0; fun_num < BENCHMARK_NUM*PER_BENCHMARK_TIMES; fun_num++)
	{
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			nn_fitness[fun_num][i] = fitness[fun_num + i *BENCHMARK_NUM*PER_BENCHMARK_TIMES];
			//printf("nn_fitness[%d][%d]=%f   \t  ",fun_num,i,nn_fitness[fun_num][i]);
		}
	}
	//10个函数分别排3次
	for (int fun_num = 0; fun_num < BENCHMARK_NUM*PER_BENCHMARK_TIMES; fun_num++)
	{
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			nn_fitness_one_f[i] = nn_fitness[fun_num][i]; //NUM_CHROMO个染色体在一个函数上
			temp_nn_index[i] = i;
		}
		Sort(nn_fitness_one_f, NUM_CHROMO, temp_nn_index);
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			record_sort_index[temp_nn_index[i]] = i + 1;
		}
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			record_nn_fitness_sort_index[fun_num][i] = (float)record_sort_index[i];			//NUM_CHROMO * BENCHMARK_NUM*PER_BENCHMARK_TIMES个名次																							//printf("sort_index[%d][%d]=%f   \t ",fun_num,i,record_nn_fitness_sort_index[fun_num][i]);
		}
	}
	for (int i = 0; i < NUM_CHROMO; i++)
	{
		for (int fun_num = 0; fun_num < BENCHMARK_NUM; fun_num++)
		{
			for (int k = 0; k < PER_BENCHMARK_TIMES; k++)
			{
				fitness_ranking[fun_num][i] += record_nn_fitness_sort_index[fun_num + BENCHMARK_NUM * k][i];
			}
			fitness_ranking[fun_num][i] /= PER_BENCHMARK_TIMES;
		}
	}
	//平均排名
	for (int i = 0; i < NUM_CHROMO; i++)
	{
		float sum = 0;
		for (int j = 0; j < BENCHMARK_NUM; j++)
		{
			sum += fitness_ranking[j][i];
		}
		fitness_ranking[BENCHMARK_NUM][i] = sum / BENCHMARK_NUM;
		GA_fitness[i] = sum / BENCHMARK_NUM;
		printf("the %dth chromosome in all function's avg ranking is :%f \n", i + 1, GA_fitness[i]);
		//fprintf(all_f_g, "g=%d,f[%d]=%f:\n", g + 1, i + 1, GA_fitness[i]);
	}
	sprintf(fileName, "NN/g%d/GA_fitness.txt", g + 1);
	one_g_chromo[NUM_CHROMO] = fopen(fileName, "a");
	if (one_g_chromo[NUM_CHROMO] == NULL)
	{
		printf("\n Error: Cannot open GA_fitness file  \n");
	}
	for (int i = 0; i < NUM_CHROMO; i++)
	{
		fprintf(one_g_chromo[NUM_CHROMO], "%f\n", GA_fitness[i]);
	}
	fclose(one_g_chromo[NUM_CHROMO]);
	min_fit = GA_fitness[0];     //当代  找最小排名及对应的网络
	for (int j = 0; j < INPUT_NEURAL_NUM; j++)
	{
		GA_best_ch.nn_initial.input_w[j] = ch[0].nn_initial.input_w[j];
	}
	for (int j = 0; j < SINGLE_WEIGHT; j++)
	{
		GA_best_ch.nn_initial.w[j] = ch[0].nn_initial.w[j];
	}
	GA_best_ch.A = ch[0].A;
	GA_best_ch.B = ch[0].B;
	GA_best_ch.C = ch[0].C;
	GA_best_ch.D = ch[0].D;
	for (int i = 1; i < NUM_CHROMO; i++)
	{
		if (GA_fitness[i] < min_fit)
		{
			min_fit = GA_fitness[i];
			for (int j = 0; j < INPUT_NEURAL_NUM; j++)
			{
				GA_best_ch.nn_initial.input_w[j] = ch[i].nn_initial.input_w[j];
			}
			for (int j = 0; j < SINGLE_WEIGHT; j++)
			{
				GA_best_ch.nn_initial.w[j] = ch[i].nn_initial.w[j];
			}
			GA_best_ch.A = ch[i].A;
			GA_best_ch.B = ch[i].B;
			GA_best_ch.C = ch[i].C;
			GA_best_ch.D = ch[i].D;
		}
	}
	sprintf(fileName, "NN/g%d/temp_bestch.txt", g + 1);
	f_temp_ch = fopen(fileName, "w");
	fprintf(f_temp_ch, "g=%d,the best chromosome:\n", g + 1);

	for (int j = 0; j < INPUT_NEURAL_NUM; j++)
	{
		fprintf(f_temp_ch, "%f\n", GA_best_ch.nn_initial.input_w[j]);
	}
	for (int j = 0; j < SINGLE_WEIGHT; j++)
	{
		fprintf(f_temp_ch, "%f\n", GA_best_ch.nn_initial.w[j]);
	}
	fprintf(f_temp_ch, "A:%f\n B:%f\n C:%f\n D:%f\n", GA_best_ch.A, GA_best_ch.B, GA_best_ch.C, GA_best_ch.D);//当代最佳chromosome
	printf("the generation %d min ranking is:%f \n", g + 1, min_fit);
	fprintf(f_temp_result, "g=%d,the best:%f\n", g + 1, min_fit);//当代最佳适应值

	selection_tournment(ch, GA_fitness, g);
	crossover(ch);
	mutation(ch);

	for (int i = 0; i < NUM_CHROMO; i++)
	{
		for (int j = 0; j < (PER_BENCHMARK_TIMES*BENCHMARK_NUM); j++)
		{
			for (int d = 0; d < SINGLE_WEIGHT; d++)
			{
				ch[i].nn[j].w[d] = ch[i].nn_initial.w[d];
			}
			for (int k = 0; k < DIMENSION; k++)
			{
				ch[i].position[j][k] = ch[i].initial_position[j][k];
			}
			for (int tt = 0; tt < INPUT_NEURAL_NUM; tt++)
			{
				ch[i].nn[j].input_w[tt] = ch[i].nn_initial.input_w[tt];
			}
			for (int d = 0; d < NEURAL_NUM; d++)
			{
				ch[i].nn[j].old_neural[d] = 0.5;
			}

			ch[i].a[j] = ch[i].A;
			ch[i].b[j] = ch[i].B;
			ch[i].c[j] = ch[i].C;
			ch[i].d[j] = ch[i].D;

		}
	}
	fclose(f_temp_ch);
	fclose(f_temp_result);
	//fclose(all_f_g);
/*
	for (int i = 0; i < NUM_CHROMO + 1; i++)
	{
		fclose(one_g_chromo[i]);
	}
*/
	return min_fit;
}

__device__ float hebb(float a, float b, float c, float d, float x, float y)
{
	return G*(a*x + b * y + c * x*y + d);
}

__device__ float sigmoid(float x)
{
	if (x < -80)
		return 0;
	else if (x > 80)
		return 1;
	else
		return 1.0F / (1.0F + exp(-1 * x));
}

__device__ void  nn_forward_and_update_paramenter(struct CHROMO ch[], int num, float f, int num_fun3, int num_epoch)  ////
{
	float inputs[INPUT_NEURAL_NUM];
	float delta_w[SINGLE_WEIGHT];
	int t = 0;
	//输入
	inputs[0] = f / num_epoch;
	inputs[1] = ch[num].position[num_fun3][0] / MAX;
	inputs[2] = ch[num].position[num_fun3][1] / MAX;

	for (int i = 0; i < SINGLE_WEIGHT; i++)
	{
		delta_w[i] = 0;
	}
	//前向传递
	for (int i = 0; i < NEURAL_NUM; i++)
	{
		for (int j = 0; j < NEURAL_NUM; j++)
		{
			if (i != j)
			{
				ch[num].nn[num_fun3].new_neural[i] += (ch[num].nn[num_fun3].w[t] * ch[num].nn[num_fun3].old_neural[j]);
				t++;
			}
		}
		//printf("dimension %d,neural %d:%f\n",k, i, ch[num].nn[num_fun3][k].new_neural[i]);
		if (i < INPUT_NEURAL_NUM)
		{
			ch[num].nn[num_fun3].new_neural[i] = sigmoid(ch[num].nn[num_fun3].new_neural[i] + ch[num].nn[num_fun3].input_w[i] * inputs[i]);
		}
		else
		{
			ch[num].nn[num_fun3].new_neural[i] = sigmoid(ch[num].nn[num_fun3].new_neural[i]);
		}
	}
	//printf("\n");		
	//计算delta_w
	t = 0;
	for (int i = 0; i < NEURAL_NUM; i++)
	{
		for (int j = 0; j < NEURAL_NUM; j++)
		{
			if (i != j)
			{
				delta_w[t] = hebb(ch[num].a[num_fun3], ch[num].b[num_fun3], ch[num].c[num_fun3], ch[num].d[num_fun3], ch[num].nn[num_fun3].old_neural[j], ch[num].nn[num_fun3].old_neural[i]);
				t++;
			}
		}
	}
	//更新神经元
	for (int i = 0; i < NEURAL_NUM; i++)
	{
		ch[num].nn[num_fun3].old_neural[i] = ch[num].nn[num_fun3].new_neural[i];
		ch[num].nn[num_fun3].new_neural[i] = 0;
	}
	//更新权重
	t = 0;
	for (int i = 0; i < NEURAL_NUM; i++)
	{
		for (int j = 0; j < NEURAL_NUM; j++)
		{
			if (i != j)
			{
				ch[num].nn[num_fun3].w[t] = (ch[num].nn[num_fun3].w[t] + delta_w[t])*0.99;
				t++;
			}
		}
	}
}

__device__ float benchmark(int funnum, float x[][DIMENSION], int num)    //some simple functions
{
	int a = funnum;
	float f, sum1, sum2;
	int i;
	f = 0.0;
	i = 0;
	sum1 = 0.0;
	sum2 = 0.0;

	switch (a)
	{
		case 0:                     //sphere function
		{
			f = 0.0;
			for (i = 0; i < DIMENSION; i++)
			{
				f += x[num][i] * x[num][i];
			}
			return(f);
		}
		case 1:						//elliptic function
		{	f = 0.0;
			for (i = 0; i < DIMENSION; i++)
			{
				f += pow(pow(10.0, 6.0), i / (DIMENSION - 1))*x[num][i] * x[num][i];
			}
			return(f);
		}
		case 2:						//rastrigin's function
		{	f = 0.0;
			for (i = 0; i < DIMENSION; i++)
			{
				f += (x[num][i] * x[num][i] - 10.0*cos(2.0*PI*x[num][i]) + 10.0);
			}
			return(f);
		}
		case 3:						//ackley function
		{
			for (i = 0; i < DIMENSION; i++)
			{
				sum1 += x[num][i] * x[num][i];
				sum2 += cos(2.0*PI*x[num][i]);
			}
			sum1 = -0.2*sqrt(sum1 / DIMENSION);
			sum2 = sum2 / DIMENSION;
			f = E - 20.0*exp(sum1) - exp(sum2) + 20.0;
			return(f);
		}
		case 4:					//rosenbrock function
		{
			for (i = 0; i < DIMENSION - 1; i++)
			{
				sum1 = x[num][i] * x[num][i] - x[num][i + 1];
				sum2 = x[num][i] - 1;
				f += 100.0*sum1*sum1 + sum2 * sum2;
			}
			return(f);
		}
		case 5:					//bent cigar function
		{
			for (i = 1; i < DIMENSION; i++)
			{
				f += pow(10.0, 6.0)*x[num][i] * x[num][i];
			}
			f += x[num][0] * x[num][0];
			return f;
		}
		case 6:					//zakharov function
		{
			for (i = 0; i < DIMENSION; i++)
			{
				float z = x[num][i];
				sum1 += pow(z, 2);
				sum2 += 0.5*z;
			}
			f = sum1 + pow(sum2, 2) + pow(sum2, 4);

			return(f);
		}
		case 7:					//schwefel function 
		{
			for (i = 0; i < DIMENSION; i++)
			{
				for (int j = 0; j < i; j++)
				{
					sum1 += x[num][i] * x[num][i];
				}
				sum1 = sum1 * sum1;
				f += sum1;
			}
			return(f);
		}
		case 8:					//griewank's function
		{
			for (i = 0; i < DIMENSION; i++)
			{
				sum1 += x[num][i] * x[num][i];
				sum2 *= cos(x[num][i] / sqrt(1.0 + i));
			}
			f = sum1 / 4000.0 - sum2 + 1.0;
			return(f);
		}
		default:					//discus function
			f = pow(10.0, 6.0)*x[num][0] * x[num][0];
			for (i = 1; i < DIMENSION; i++)
			{
				f += x[num][i] * x[num][i];
			}
			return(f);
	}

}

__device__ float thread_sort(int sort_num, struct IN_FITNESS in_f[], int num, float p)
{
	float a = 0, count = 0;
	for (int i = 0; i < sort_num - 1; i++)
	{
		for (int j = 0; j < sort_num - i - 1; j++)
		{
			if (in_f[num].f[j] > in_f[num].f[j + 1])
			{
				a = in_f[num].f[j];
				in_f[num].f[j] = in_f[num].f[j + 1];
				in_f[num].f[j + 1] = a;
			}
		}
	}
	for (int i = 0; i < sort_num; i++)
	{
		if (p == in_f[num].f[i])
		{
			return count + 1;
		}
		else
		{
			count++;
		}
	}
	return 0;
}

__global__ void kernel(struct CHROMO ch[NUM_CHROMO], float fitness[BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO], struct IN_FITNESS in_f[BENCHMARK_NUM*NUM_CHROMO*PER_BENCHMARK_TIMES], struct IN_POSITION in_p[BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO])
{
	int idx = blockIdx.x*blockDim.x + threadIdx.x;
	int i,d;
	if (idx <BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO)
	{
		float value_position;
		int num_epoch = 0;
		float ff = 0;
		int num = (idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES)) % BENCHMARK_NUM;
		for (num_epoch = 0; num_epoch<THREAD_EPOCH; num_epoch++)
		{
			for (d = 0; d < DIMENSION; d++)
			{
				in_p[idx].p[num_epoch][d] = ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].position[idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES)][d];
			}
			in_f[idx].f[num_epoch] = benchmark(num, ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].position, idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES));
			//printf("ff:%f   \n", in_f[idx].f[num_epoch]);
			ff = thread_sort((num_epoch + 1), in_f, idx, in_f[idx].f[num_epoch]);
			//printf("epoch %d ff: %f\n ", num_epoch, ff);
			for (i = 0; i < STEPS; i++)
			{
				nn_forward_and_update_paramenter(ch, idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES), ff, idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES), (num_epoch + 1));
			}
			for (d = 0; d < DIMENSION; d++)
			{
				ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].position[idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES)][d] += (ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].nn[idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].old_neural[NEURAL_NUM - (d + 1)] * (DELTA_X_MAX - DELTA_X_MIN) - DELTA_X_MAX)* MAX;
			}
		}
		fitness[idx] = benchmark(num, ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].position, idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES));
		printf("in fitness[%d]: %f\n", idx, fitness[idx]);
	}
}

int main()
{
	struct CHROMO *h_ch = (struct CHROMO *)malloc(sizeof(CHROMO)*NUM_CHROMO);		//主机端的染色体数组
	struct CHROMO *d_ch;					//设备端的
	struct IN_FITNESS *h_in_fitness = (struct IN_FITNESS *)malloc(sizeof(IN_FITNESS)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
	struct IN_FITNESS *d_in_fitness;
	struct IN_POSITION *h_in_position = (struct IN_POSITION *)malloc(sizeof(IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
	struct IN_POSITION *d_in_position = (struct IN_POSITION *)malloc(sizeof(IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
	float *d_fitness;					//设备端的一维适应值数组
	float *h_fitness = (float *)malloc(sizeof(float)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);//主机端的
	int i, g, j, d;
	struct CHROMO GA_best_ch;			//每代最佳的染色体
	struct CHROMO history_best_ch;			//历史最佳的染色体
	float min_fit;					//每代最佳的适应值
	float the_min_fit_inallG;			//历史最佳的适应值
	int record_g = 0;
	int device_id = DEVICE_NUM;
	FILE* f_results = fopen("GA200results.txt", "a");
	FILE* f_history_ch = fopen("history_bestch.txt", "a");
	//FILE *f_position = fopen("f_position.txt", "a");
	if (f_results == NULL || f_history_ch == NULL)
	{
		printf("failed to open f file\n");
		system("pause");
	}
	srand((unsigned)time(NULL));

	for (i = 0; i < BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
	{
		h_fitness[i] = 0;
	}
	for (i = 0; i < BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
	{
		for (j = 0; j < THREAD_EPOCH; j++)
		{
			h_in_fitness[i].f[j] = 0.0;
		}
	}
	for (i = 0; i<BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
	{
		for (j = 0; j<THREAD_EPOCH; j++)
		{
			for (d = 0; d<DIMENSION; d++)
			{
				h_in_position[i].p[j][d] = 0.0;
			}
		}
	}
	initial_chromo(h_ch);
	initial_chromo(GA_best_ch);
	initial_chromo(history_best_ch);
	//dim3  grid(BLOCK);
	//dim3  threads(THREAD);
	cudaSetDevice(device_id);
	for (g = 0; g < EPOCH; g++)
	{
		cudaMalloc((void **)&d_fitness, sizeof(float)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
		cudaMalloc((struct CHROMO **)&d_ch, sizeof(struct CHROMO) * NUM_CHROMO);
		cudaMalloc((struct IN_FITNESS **)&d_in_fitness, sizeof(struct IN_FITNESS)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
		cudaMalloc((struct IN_POSITION **)&d_in_position, sizeof(struct IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);

		cudaMemcpy(d_ch, h_ch, sizeof(struct CHROMO) * NUM_CHROMO, cudaMemcpyHostToDevice);
		cudaMemcpy(d_fitness, h_fitness, sizeof(float)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, cudaMemcpyHostToDevice);
		cudaMemcpy(d_in_fitness, h_in_fitness, sizeof(struct IN_FITNESS)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, cudaMemcpyHostToDevice);
		cudaMemcpy(d_in_position, h_in_position, sizeof(struct IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, cudaMemcpyHostToDevice);

		kernel <<<BLOCK, THREAD >>> (d_ch, d_fitness, d_in_fitness, d_in_position);
		cudaDeviceSynchronize();

		cudaMemcpy(h_fitness, d_fitness, sizeof(float)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, cudaMemcpyDeviceToHost);
		cudaMemcpy(h_in_position, d_in_position, sizeof(struct IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, cudaMemcpyDeviceToHost);
		//cudaMemcpy(h_ch, d_ch, sizeof(struct CHROMO)*NUM_CHROMO, cudaMemcpyDeviceToHost);
		/*
		fprintf(f_position, "第%d代:\n", g + 1);
		for (i = 0; i < BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
		{
			fprintf(f_position, "第%d个染色体\n", i + 1);
			for (j = 0; j < THREAD_EPOCH; j++)
			{
				fprintf(f_position, "第%d次移动\t\t\t", j + 1);
				for (d = 0; d < DIMENSION; d++)
				{
					fprintf(f_position, "%f\t\t", h_in_position[i].p[j][d]);
				}
			}
		}
		*/
		/*
		for (i = 0; i < BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
		{
			printf("out fitness[%d] = %f\n", i, h_fitness[i]);
		}
		*/
		min_fit = my_function(h_ch, h_fitness, GA_best_ch, g);
		if (g == 0)
		{
			the_min_fit_inallG = min_fit;
			for (i = 0; i < INPUT_NEURAL_NUM; i++)
			{
				history_best_ch.nn_initial.input_w[i] = GA_best_ch.nn_initial.input_w[i];
				fprintf(f_history_ch, "%f\n", history_best_ch.nn_initial.input_w[i]);
			}	
			for (j = 0; j < SINGLE_WEIGHT; j++)
			{
				history_best_ch.nn_initial.w[j] = GA_best_ch.nn_initial.w[j];
				fprintf(f_history_ch, "%f\n", history_best_ch.nn_initial.w[j]);
			}
			history_best_ch.A = GA_best_ch.A;
			history_best_ch.B = GA_best_ch.B;
			history_best_ch.C = GA_best_ch.C;
			history_best_ch.D = GA_best_ch.D;
			fprintf(f_history_ch, "A:%f\n B:%f\n C:%f\n D:%f\n", history_best_ch.A, history_best_ch.B, history_best_ch.C, history_best_ch.D);
			record_g = g;
		}

		if (min_fit < the_min_fit_inallG)
		{
			the_min_fit_inallG = min_fit;
			for (i = 0; i < INPUT_NEURAL_NUM; i++)
			{
				history_best_ch.nn_initial.input_w[i] = GA_best_ch.nn_initial.input_w[i];
				fprintf(f_history_ch, "%f\n", history_best_ch.nn_initial.input_w[i]);
			}
			for (j = 0; j < SINGLE_WEIGHT; j++)
			{
				history_best_ch.nn_initial.w[j] = GA_best_ch.nn_initial.w[j];
				fprintf(f_history_ch, "%f\n", history_best_ch.nn_initial.w[j]);
			}
			history_best_ch.A = GA_best_ch.A;
			history_best_ch.B = GA_best_ch.B;
			history_best_ch.C = GA_best_ch.C;
			history_best_ch.D = GA_best_ch.D;
			fprintf(f_history_ch, "A:%f\n B:%f\n C:%f\n D:%f\n", history_best_ch.A, history_best_ch.B, history_best_ch.C, history_best_ch.D);
			record_g = g;
		}
		printf("the history min ranking is:%f \n", the_min_fit_inallG);
		fprintf(f_results, "history best is in g=%d:%f\n", record_g + 1, the_min_fit_inallG);
		cudaFree(d_fitness);
		cudaFree(d_ch);
		cudaFree(d_in_fitness);
		cudaFree(d_in_position);

	}//GA代
	fclose(f_history_ch);
	//fclose(f_position);
	fclose(f_results);
	free(h_ch);
	free(h_fitness);
	free(h_in_fitness);
	free(h_in_position);
	return 0;
}
	.file	"tmpxft_0023596e_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2042:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2042:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4SortPfiPi
	.type	_Z4SortPfiPi, @function
_Z4SortPfiPi:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%ecx, %ecx
	decl	%esi
.L3:
	cmpl	%ecx, %esi
	jle	.L11
	movl	%esi, %r8d
	xorl	%eax, %eax
	subl	%ecx, %r8d
.L7:
	cmpl	%eax, %r8d
	jle	.L12
	movss	(%rdi,%rax,4), %xmm0
	movss	4(%rdi,%rax,4), %xmm1
	comiss	%xmm1, %xmm0
	jbe	.L4
	movl	(%rdx,%rax,4), %r9d
	movl	4(%rdx,%rax,4), %r10d
	movss	%xmm1, (%rdi,%rax,4)
	movss	%xmm0, 4(%rdi,%rax,4)
	movl	%r10d, (%rdx,%rax,4)
	movl	%r9d, 4(%rdx,%rax,4)
.L4:
	incq	%rax
	jmp	.L7
.L12:
	incl	%ecx
	jmp	.L3
.L11:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z4SortPfiPi, .-_Z4SortPfiPi
	.globl	_Z19selection_tournmentP6CHROMOPfi
	.type	_Z19selection_tournmentP6CHROMOPfi, @function
_Z19selection_tournmentP6CHROMOPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	incl	%edx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	cvtsi2ssl	%edx, %xmm0
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r12, %rbx
	subq	$3320, %rsp
	.cfi_def_cfa_offset 3376
	movq	%fs:40, %rax
	movq	%rax, 3304(%rsp)
	xorl	%eax, %eax
	mulss	.LC0(%rip), %xmm0
	addss	.LC1(%rip), %xmm0
	cvttss2sil	%xmm0, %r13d
	movslq	%r13d, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	leaq	28(%rsp), %rdi
	movl	$819, %ecx
	movq	%rax, %rbp
	xorl	%eax, %eax
	rep stosl
	leaq	12275172(%r12), %rax
	movq	%rax, (%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 8(%rsp)
.L14:
	xorl	%r15d, %r15d
.L24:
	cmpl	%r15d, %r13d
	jle	.L28
.L16:
	call	rand@PLT
	movl	$819, %esi
	cltd
	idivl	%esi
	incl	%edx
	decl	%edx
	movslq	%edx, %rax
	cmpl	$1, 28(%rsp,%rax,4)
	je	.L16
	movl	%edx, 0(%rbp,%r15,4)
	incq	%r15
	movl	$1, 28(%rsp,%rax,4)
	jmp	.L24
.L28:
	movslq	0(%rbp), %rax
	movss	(%r14,%rax,4), %xmm0
	movq	%rax, %rdx
	movl	$1, %eax
.L18:
	cmpl	%eax, %r13d
	jle	.L29
	movslq	0(%rbp,%rax,4), %rsi
	movss	(%r14,%rsi,4), %xmm1
	movq	%rsi, %rcx
	comiss	%xmm1, %xmm0
	minss	%xmm0, %xmm1
	cmovbe	%edx, %ecx
	movaps	%xmm1, %xmm0
	incq	%rax
	movl	%ecx, %edx
	jmp	.L18
.L29:
	movq	8(%rsp), %rdi
	xorl	%eax, %eax
	movl	$819, %ecx
	rep stosl
	xorl	%eax, %eax
.L21:
	cmpl	%eax, %r13d
	jle	.L30
	xorl	%ecx, %ecx
	movl	%ecx, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L21
.L30:
	movslq	%edx, %rcx
	movq	%rbx, %rdi
	movl	$360, %edx
	imulq	$14988, %rcx, %rcx
	leaq	(%r12,%rcx), %r15
	movq	%r15, %rsi
	call	memmove@PLT
	leaq	360(%rbx), %rdi
	movl	$12, %edx
	leaq	360(%r15), %rsi
	call	memmove@PLT
	movq	(%rsp), %rax
	addq	$14988, %rbx
	movss	14492(%r15), %xmm0
	movss	%xmm0, -496(%rbx)
	movss	14496(%r15), %xmm0
	movss	%xmm0, -492(%rbx)
	movss	14500(%r15), %xmm0
	movss	%xmm0, -488(%rbx)
	movss	14504(%r15), %xmm0
	movss	%xmm0, -484(%rbx)
	cmpq	%rax, %rbx
	jne	.L14
	movq	3304(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$3320, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z19selection_tournmentP6CHROMOPfi, .-_Z19selection_tournmentP6CHROMOPfi
	.globl	_Z9crossoverP6CHROMO
	.type	_Z9crossoverP6CHROMO, @function
_Z9crossoverP6CHROMO:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rbp, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L48:
	call	rand@PLT
	movsd	.LC3(%rip), %xmm1
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm0, %xmm1
	jbe	.L32
	incl	%r14d
	testl	$1, %r14d
	jne	.L50
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	movq	%rax, 8(%rsp)
.L36:
	call	rand@PLT
	movss	.LC4(%rip), %xmm2
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	comiss	%xmm0, %xmm2
	jbe	.L34
	imulq	$14988, 8(%rsp), %rax
	movss	(%rbx,%r15), %xmm1
	addq	%rbp, %rax
	movss	(%rax,%r15), %xmm0
	movss	%xmm1, (%rax,%r15)
	movss	%xmm0, (%rbx,%r15)
.L34:
	addq	$4, %r15
	cmpq	$360, %r15
	jne	.L36
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	movq	%rax, 8(%rsp)
.L39:
	call	rand@PLT
	movss	.LC4(%rip), %xmm3
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	comiss	%xmm0, %xmm3
	jbe	.L37
	imulq	$14988, 8(%rsp), %rax
	movss	360(%rbx,%r15), %xmm1
	addq	%rbp, %rax
	movss	360(%rax,%r15), %xmm0
	movss	%xmm1, 360(%rax,%r15)
	movss	%xmm0, 360(%rbx,%r15)
.L37:
	addq	$4, %r15
	cmpq	$12, %r15
	jne	.L39
	call	rand@PLT
	movss	.LC4(%rip), %xmm4
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	comiss	%xmm0, %xmm4
	jbe	.L40
	movslq	%r12d, %rax
	movss	14492(%rbx), %xmm1
	imulq	$14988, %rax, %rax
	addq	%rbp, %rax
	movss	14492(%rax), %xmm0
	movss	%xmm1, 14492(%rax)
	movss	%xmm0, 14492(%rbx)
.L40:
	call	rand@PLT
	movss	.LC4(%rip), %xmm5
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	comiss	%xmm0, %xmm5
	jbe	.L42
	movslq	%r12d, %rax
	movss	14496(%rbx), %xmm1
	imulq	$14988, %rax, %rax
	addq	%rbp, %rax
	movss	14496(%rax), %xmm0
	movss	%xmm1, 14496(%rax)
	movss	%xmm0, 14496(%rbx)
.L42:
	call	rand@PLT
	movss	.LC4(%rip), %xmm6
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	comiss	%xmm0, %xmm6
	jbe	.L44
	movslq	%r12d, %rax
	movss	14500(%rbx), %xmm1
	imulq	$14988, %rax, %rax
	addq	%rbp, %rax
	movss	14500(%rax), %xmm0
	movss	%xmm1, 14500(%rax)
	movss	%xmm0, 14500(%rbx)
.L44:
	call	rand@PLT
	movss	.LC4(%rip), %xmm7
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	comiss	%xmm0, %xmm7
	jbe	.L32
	movslq	%r12d, %rax
	movss	14504(%rbx), %xmm1
	imulq	$14988, %rax, %rax
	addq	%rbp, %rax
	movss	14504(%rax), %xmm0
	movss	%xmm1, 14504(%rax)
	movss	%xmm0, 14504(%rbx)
	jmp	.L32
.L50:
	movl	%r13d, %r12d
.L32:
	incl	%r13d
	addq	$14988, %rbx
	cmpl	$819, %r13d
	jne	.L48
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z9crossoverP6CHROMO, .-_Z9crossoverP6CHROMO
	.globl	_Z8mutationP6CHROMO
	.type	_Z8mutationP6CHROMO, @function
_Z8mutationP6CHROMO:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	leaq	12275172(%rbx), %rbp
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L62:
	xorl	%r12d, %r12d
.L65:
	call	rand@PLT
	movsd	.LC5(%rip), %xmm1
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm0, %xmm1
	jbe	.L63
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC6(%rip), %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 360(%rbx,%r12,4)
.L63:
	incq	%r12
	cmpq	$3, %r12
	jne	.L65
	xorl	%r12d, %r12d
.L68:
	call	rand@PLT
	movsd	.LC5(%rip), %xmm2
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm0, %xmm2
	jbe	.L66
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC6(%rip), %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
.L66:
	incq	%r12
	cmpq	$90, %r12
	jne	.L68
	call	rand@PLT
	movsd	.LC5(%rip), %xmm3
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm0, %xmm3
	jbe	.L69
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14492(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14496(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14500(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14504(%rbx)
.L69:
	addq	$14988, %rbx
	cmpq	%rbp, %rbx
	jne	.L62
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z8mutationP6CHROMO, .-_Z8mutationP6CHROMO
	.globl	_Z14initial_chromoP6CHROMO
	.type	_Z14initial_chromoP6CHROMO, @function
_Z14initial_chromoP6CHROMO:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	leaq	12275172(%rbx), %r12
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L80:
	xorl	%ebp, %ebp
.L81:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 360(%rbx,%rbp)
	addq	$4, %rbp
	cmpq	$12, %rbp
	jne	.L81
	xorl	%ebp, %ebp
.L82:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$90, %rbp
	jne	.L82
	call	rand@PLT
	leaq	452(%rbx), %r13
	xorl	%ebp, %ebp
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14492(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14496(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14500(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14504(%rbx)
.L83:
	movl	$360, %edx
	movq	%rbx, %rsi
	movq	%r13, %rdi
	call	memmove@PLT
	movss	360(%rbx), %xmm0
	xorl	%ecx, %ecx
	movss	%xmm0, 360(%r13)
	movss	364(%rbx), %xmm0
	movss	%xmm0, 364(%r13)
	movss	368(%rbx), %xmm0
	movss	%xmm0, 368(%r13)
.L84:
	movl	$0x3f000000, 372(%r13,%rcx,4)
	incq	%rcx
	cmpq	$10, %rcx
	jne	.L84
	leaq	412(%r13), %rdx
	xorl	%eax, %eax
	addq	$452, %r13
	movq	%rdx, %rdi
	rep stosl
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	mulss	.LC9(%rip), %xmm0
	subss	.LC10(%rip), %xmm0
	movss	%xmm0, 14508(%rbx,%rbp,2)
	movss	%xmm0, 14748(%rbx,%rbp,2)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	mulss	.LC9(%rip), %xmm0
	subss	.LC10(%rip), %xmm0
	movss	%xmm0, 14512(%rbx,%rbp,2)
	movss	%xmm0, 14752(%rbx,%rbp,2)
	movss	14492(%rbx), %xmm0
	movss	%xmm0, 14012(%rbx,%rbp)
	movss	14496(%rbx), %xmm0
	movss	%xmm0, 14132(%rbx,%rbp)
	movss	14500(%rbx), %xmm0
	movss	%xmm0, 14252(%rbx,%rbp)
	movss	14504(%rbx), %xmm0
	movss	%xmm0, 14372(%rbx,%rbp)
	addq	$4, %rbp
	cmpq	$120, %rbp
	jne	.L83
	addq	$14988, %rbx
	cmpq	%r12, %rbx
	jne	.L80
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L87
	call	__stack_chk_fail@PLT
.L87:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z14initial_chromoP6CHROMO, .-_Z14initial_chromoP6CHROMO
	.globl	_Z14initial_chromoR6CHROMO
	.type	_Z14initial_chromoR6CHROMO, @function
_Z14initial_chromoR6CHROMO:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L93:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 360(%rbx,%rbp)
	addq	$4, %rbp
	cmpq	$12, %rbp
	jne	.L93
	xorl	%ebp, %ebp
.L94:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$90, %rbp
	jne	.L94
	call	rand@PLT
	leaq	452(%rbx), %r12
	xorl	%ebp, %ebp
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14492(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14496(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14500(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	subsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14504(%rbx)
.L95:
	movl	$360, %edx
	movq	%rbx, %rsi
	movq	%r12, %rdi
	call	memmove@PLT
	movss	360(%rbx), %xmm0
	xorl	%ecx, %ecx
	movss	%xmm0, 360(%r12)
	movss	364(%rbx), %xmm0
	movss	%xmm0, 364(%r12)
	movss	368(%rbx), %xmm0
	movss	%xmm0, 368(%r12)
.L96:
	movl	$0x3f000000, 372(%r12,%rcx,4)
	incq	%rcx
	cmpq	$10, %rcx
	jne	.L96
	leaq	412(%r12), %rdx
	xorl	%eax, %eax
	addq	$452, %r12
	movq	%rdx, %rdi
	rep stosl
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	mulss	.LC9(%rip), %xmm0
	subss	.LC10(%rip), %xmm0
	movss	%xmm0, 14508(%rbx,%rbp,2)
	movss	%xmm0, 14748(%rbx,%rbp,2)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	mulss	.LC9(%rip), %xmm0
	subss	.LC10(%rip), %xmm0
	movss	%xmm0, 14512(%rbx,%rbp,2)
	movss	%xmm0, 14752(%rbx,%rbp,2)
	movss	14492(%rbx), %xmm0
	movss	%xmm0, 14012(%rbx,%rbp)
	movss	14496(%rbx), %xmm0
	movss	%xmm0, 14132(%rbx,%rbp)
	movss	14500(%rbx), %xmm0
	movss	%xmm0, 14252(%rbx,%rbp)
	movss	14504(%rbx), %xmm0
	movss	%xmm0, 14372(%rbx,%rbp)
	addq	$4, %rbp
	cmpq	$120, %rbp
	jne	.L95
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L98
	call	__stack_chk_fail@PLT
.L98:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z14initial_chromoR6CHROMO, .-_Z14initial_chromoR6CHROMO
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC12:
	.string	"a"
.LC13:
	.string	"temp_result.txt"
.LC14:
	.string	"NN/g%d/ch_%d.txt"
.LC15:
	.string	"w"
.LC16:
	.string	"\n Error: Cannot open ch_%d filoe \n"
.LC17:
	.string	"%f\n"
.LC18:
	.string	"A:%f\n B:%f\n C:%f\n D:%f\n"
.LC21:
	.string	"the %dth chromosome in all function's avg ranking is :%f \n"
.LC22:
	.string	"NN/g%d/GA_fitness.txt"
.LC23:
	.string	"\n Error: Cannot open GA_fitness file  \n"
.LC24:
	.string	"NN/g%d/temp_bestch.txt"
.LC25:
	.string	"g=%d,the best chromosome:\n"
.LC26:
	.string	"the generation %d min ranking is:%f \n"
.LC27:
	.string	"g=%d,the best:%f\n"
	.text
	.globl	_Z11my_functionP6CHROMOPfRS_i
	.type	_Z11my_functionP6CHROMOPfRS_i, @function
_Z11my_functionP6CHROMOPfRS_i:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-249856(%rsp), %r11
	.cfi_def_cfa 11, 249912
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$2728, %rsp
	.cfi_def_cfa_offset 252640
	xorl	%r15d, %r15d
	movq	%rsi, 8(%rsp)
	movq	%rdi, %r12
	leaq	.LC12(%rip), %rsi
	movq	%rdx, %rbx
	movl	%ecx, 40(%rsp)
	leaq	.LC13(%rip), %rdi
	movq	%r12, %rbp
	movq	%r12, %r13
	movq	%fs:40, %rax
	movq	%rax, 252568(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	movq	%rax, 24(%rsp)
.L107:
	movl	40(%rsp), %eax
	movl	%r15d, %r9d
	leaq	252312(%rsp), %r14
	leaq	.LC14(%rip), %rcx
	movq	%r14, %rdi
	movl	$256, %edx
	movl	$2, %esi
	incl	%eax
	movl	%eax, %r8d
	movl	%eax, 4(%rsp)
	xorl	%eax, %eax
	call	__sprintf_chk@PLT
	movq	%r14, %rdi
	leaq	.LC15(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %r14
	testq	%rax, %rax
	jne	.L104
	movl	%r15d, %edx
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L104:
	xorl	%ecx, %ecx
.L105:
	movl	$2, %esi
	movq	%r14, %rdi
	movb	$1, %al
	movq	%rcx, 16(%rsp)
	leaq	.LC17(%rip), %rdx
	cvtss2sd	360(%r13,%rcx), %xmm0
	call	__fprintf_chk@PLT
	movq	16(%rsp), %rcx
	addq	$4, %rcx
	cmpq	$12, %rcx
	jne	.L105
	xorl	%ecx, %ecx
.L106:
	movl	$2, %esi
	movq	%r14, %rdi
	movb	$1, %al
	movq	%rcx, 16(%rsp)
	leaq	.LC17(%rip), %rdx
	cvtss2sd	0(%r13,%rcx,4), %xmm0
	call	__fprintf_chk@PLT
	movq	16(%rsp), %rcx
	incq	%rcx
	cmpq	$90, %rcx
	jne	.L106
	leaq	.LC18(%rip), %rdx
	movq	%r14, %rdi
	movb	$4, %al
	incl	%r15d
	movl	$2, %esi
	addq	$14988, %r13
	cvtss2sd	-496(%r13), %xmm0
	cvtss2sd	-484(%r13), %xmm3
	cvtss2sd	-488(%r13), %xmm2
	cvtss2sd	-492(%r13), %xmm1
	call	__fprintf_chk@PLT
	movq	%r14, %rdi
	call	fclose@PLT
	cmpl	$819, %r15d
	jne	.L107
	leaq	19716(%rsp), %r13
	xorl	%eax, %eax
	movl	$9009, %ecx
	xorl	%edx, %edx
	leaq	55752(%rsp), %r14
	movq	%r13, %rdi
	rep stosl
	movl	$24570, %ecx
	movq	%r14, %rdi
	movq	%r14, %rsi
	rep stosl
.L108:
	movq	8(%rsp), %rax
	leaq	(%rax,%rdx,4), %rcx
	xorl	%eax, %eax
.L109:
	movss	(%rcx), %xmm0
	addq	$120, %rcx
	movss	%xmm0, (%rsi,%rax,4)
	incq	%rax
	cmpq	$819, %rax
	jne	.L109
	incq	%rdx
	addq	$3276, %rsi
	cmpq	$30, %rdx
	jne	.L108
	xorl	%r15d, %r15d
	leaq	60(%rsp), %r11
.L110:
	leaq	60(%rsp), %rdi
	leaq	(%r14,%r15), %rsi
	movl	$819, %ecx
	xorl	%eax, %eax
	rep movsl
	leaq	9888(%rsp), %rdx
.L111:
	movl	%eax, (%rdx,%rax,4)
	incq	%rax
	cmpq	$819, %rax
	jne	.L111
	movl	$819, %esi
	movq	%r11, %rdi
	call	_Z4SortPfiPi
	movl	$1, %eax
.L112:
	movslq	-4(%rdx,%rax,4), %rcx
	movl	%eax, 3336(%rsp,%rcx,4)
	incq	%rax
	cmpq	$820, %rax
	jne	.L112
	leaq	154032(%rsp), %rsi
	xorl	%eax, %eax
	leaq	3336(%rsp), %rcx
	leaq	(%rsi,%r15), %rdx
.L113:
	cvtsi2ssl	(%rax,%rcx), %xmm0
	movss	%xmm0, (%rdx,%rax)
	addq	$4, %rax
	cmpq	$3276, %rax
	jne	.L113
	addq	$3276, %r15
	cmpq	$98280, %r15
	jne	.L110
	movss	.LC19(%rip), %xmm1
	xorl	%edx, %edx
	leaq	186792(%rsp), %rdi
	leaq	219552(%rsp), %r8
.L114:
	movq	%rdx, %rax
	movl	$10, %ecx
.L115:
	movss	(%rsi,%rax), %xmm0
	addss	0(%r13,%rax), %xmm0
	addss	(%rdi,%rax), %xmm0
	addss	(%r8,%rax), %xmm0
	divss	%xmm1, %xmm0
	movss	%xmm0, 0(%r13,%rax)
	addq	$3276, %rax
	decl	%ecx
	jne	.L115
	addq	$4, %rdx
	cmpq	$3276, %rdx
	jne	.L114
	movl	$1, %r14d
.L116:
	movq	%r13, %rdx
	movl	$10, %eax
	xorps	%xmm0, %xmm0
.L117:
	addss	(%rdx), %xmm0
	addq	$3276, %rdx
	decl	%eax
	jne	.L117
	movl	%r14d, %edx
	leaq	.LC21(%rip), %rsi
	movb	$1, %al
	addq	$4, %r13
	divss	.LC20(%rip), %xmm0
	movl	$2, %edi
	movss	%xmm0, 6608(%rsp,%r14,4)
	incq	%r14
	cvtss2sd	%xmm0, %xmm0
	leaq	6612(%rsp), %r15
	call	__printf_chk@PLT
	cmpq	$820, %r14
	jne	.L116
	movl	4(%rsp), %r8d
	movl	$256, %edx
	movl	$2, %esi
	leaq	252312(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	leaq	.LC22(%rip), %rcx
	xorl	%eax, %eax
	call	__sprintf_chk@PLT
	movq	16(%rsp), %rdi
	leaq	.LC12(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %r13
	testq	%rax, %rax
	jne	.L119
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L119:
	xorl	%r14d, %r14d
.L120:
	cvtss2sd	(%r15,%r14,4), %xmm0
	movl	$2, %esi
	movq	%r13, %rdi
	movb	$1, %al
	leaq	.LC17(%rip), %rdx
	incq	%r14
	call	__fprintf_chk@PLT
	cmpq	$819, %r14
	jne	.L120
	movq	%r13, %rdi
	leaq	15348(%r12), %r14
	movl	$1, %r13d
	call	fclose@PLT
	movl	$360, %edx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	movss	360(%r12), %xmm0
	movss	6612(%rsp), %xmm6
	movss	%xmm0, 360(%rbx)
	movss	364(%r12), %xmm0
	movss	%xmm6, 8(%rsp)
	movss	%xmm0, 364(%rbx)
	movss	368(%r12), %xmm0
	movss	%xmm0, 368(%rbx)
	call	memmove@PLT
	leaq	360(%rbx), %rax
	movss	14492(%r12), %xmm0
	movq	%rax, 32(%rsp)
	movss	%xmm0, 14492(%rbx)
	movss	14496(%r12), %xmm0
	movss	%xmm0, 14496(%rbx)
	movss	14500(%r12), %xmm0
	movss	%xmm0, 14500(%rbx)
	movss	14504(%r12), %xmm0
	movss	%xmm0, 14504(%rbx)
.L123:
	movss	(%r15,%r13,4), %xmm0
	movss	8(%rsp), %xmm7
	comiss	%xmm0, %xmm7
	jbe	.L121
	movq	32(%rsp), %rdi
	movl	$12, %edx
	movq	%r14, %rsi
	movss	%xmm0, 8(%rsp)
	call	memmove@PLT
	leaq	-360(%r14), %rsi
	movl	$360, %edx
	movq	%rbx, %rdi
	call	memmove@PLT
	movss	14132(%r14), %xmm1
	movss	%xmm1, 14492(%rbx)
	movss	14136(%r14), %xmm1
	movss	%xmm1, 14496(%rbx)
	movss	14140(%r14), %xmm1
	movss	%xmm1, 14500(%rbx)
	movss	14144(%r14), %xmm1
	movss	%xmm1, 14504(%rbx)
.L121:
	incq	%r13
	addq	$14988, %r14
	cmpq	$819, %r13
	jne	.L123
	movl	4(%rsp), %r8d
	movq	16(%rsp), %rdi
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	leaq	.LC24(%rip), %rcx
	movl	$256, %edx
	movl	$2, %esi
	call	__sprintf_chk@PLT
	movq	16(%rsp), %rdi
	leaq	.LC15(%rip), %rsi
	call	fopen@PLT
	movl	4(%rsp), %ecx
	movl	$2, %esi
	leaq	.LC25(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %r13
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L124:
	cvtss2sd	360(%rbx,%r14), %xmm0
	leaq	.LC17(%rip), %rdx
	movl	$2, %esi
	movq	%r13, %rdi
	movb	$1, %al
	addq	$4, %r14
	call	__fprintf_chk@PLT
	cmpq	$12, %r14
	jne	.L124
	xorl	%r15d, %r15d
	leaq	.LC17(%rip), %r14
.L125:
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movq	%r14, %rdx
	movl	$2, %esi
	movq	%r13, %rdi
	movb	$1, %al
	incq	%r15
	call	__fprintf_chk@PLT
	cmpq	$90, %r15
	jne	.L125
	leaq	.LC18(%rip), %rdx
	movl	$2, %esi
	movq	%r13, %rdi
	movb	$4, %al
	cvtss2sd	14504(%rbx), %xmm3
	cvtss2sd	14500(%rbx), %xmm2
	cvtss2sd	14496(%rbx), %xmm1
	cvtss2sd	14492(%rbx), %xmm0
	call	__fprintf_chk@PLT
	movl	4(%rsp), %edx
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC26(%rip), %rsi
	cvtss2sd	8(%rsp), %xmm0
	movsd	%xmm0, 16(%rsp)
	call	__printf_chk@PLT
	movl	4(%rsp), %ecx
	movq	24(%rsp), %rdi
	movb	$1, %al
	movsd	16(%rsp), %xmm0
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	40(%rsp), %edx
	leaq	6612(%rsp), %rsi
	movq	%r12, %rdi
	call	_Z19selection_tournmentP6CHROMOPfi
	movq	%r12, %rdi
	call	_Z9crossoverP6CHROMO
	movq	%r12, %rdi
	addq	$12275172, %r12
	call	_Z8mutationP6CHROMO
.L126:
	movss	360(%rbp), %xmm4
	movss	364(%rbp), %xmm3
	leaq	452(%rbp), %rcx
	xorl	%ebx, %ebx
	movss	368(%rbp), %xmm2
	movss	14492(%rbp), %xmm1
	movss	14496(%rbp), %xmm0
	movl	14500(%rbp), %r15d
	movl	14504(%rbp), %r14d
.L130:
	movq	%rcx, %rdi
	movl	$360, %edx
	movq	%rbp, %rsi
	movss	%xmm2, 44(%rsp)
	movss	%xmm3, 32(%rsp)
	movss	%xmm4, 40(%rsp)
	movss	%xmm0, 16(%rsp)
	movss	%xmm1, 4(%rsp)
	call	memmove@PLT
	movss	40(%rsp), %xmm4
	movss	14508(%rbp,%rbx,2), %xmm5
	movss	32(%rsp), %xmm3
	movss	44(%rsp), %xmm2
	movq	%rax, %rcx
	movss	%xmm5, 14748(%rbp,%rbx,2)
	movss	4(%rsp), %xmm1
	movss	14512(%rbp,%rbx,2), %xmm5
	movss	16(%rsp), %xmm0
	movss	%xmm5, 14752(%rbp,%rbx,2)
	movss	%xmm4, 360(%rax)
	movss	%xmm3, 364(%rax)
	movss	%xmm2, 368(%rax)
	xorl	%eax, %eax
.L127:
	movl	$0x3f000000, 372(%rcx,%rax,4)
	incq	%rax
	cmpq	$10, %rax
	jne	.L127
	movl	%r15d, 14252(%rbp,%rbx)
	addq	$452, %rcx
	movl	%r14d, 14372(%rbp,%rbx)
	movss	%xmm1, 14012(%rbp,%rbx)
	movss	%xmm0, 14132(%rbp,%rbx)
	addq	$4, %rbx
	cmpq	$120, %rbx
	jne	.L130
	addq	$14988, %rbp
	cmpq	%rbp, %r12
	jne	.L126
	movq	%r13, %rdi
	call	fclose@PLT
	movq	24(%rsp), %rdi
	call	fclose@PLT
	movq	252568(%rsp), %rax
	subq	%fs:40, %rax
	je	.L131
	call	__stack_chk_fail@PLT
.L131:
	movss	8(%rsp), %xmm0
	addq	$252584, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z11my_functionP6CHROMOPfRS_i, .-_Z11my_functionP6CHROMOPfRS_i
	.globl	_Z4hebbffffff
	.type	_Z4hebbffffff, @function
_Z4hebbffffff:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2034:
	.size	_Z4hebbffffff, .-_Z4hebbffffff
	.globl	_Z7sigmoidf
	.type	_Z7sigmoidf, @function
_Z7sigmoidf:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2035:
	.size	_Z7sigmoidf, .-_Z7sigmoidf
	.globl	_Z32nn_forward_and_update_paramenterP6CHROMOifii
	.type	_Z32nn_forward_and_update_paramenterP6CHROMOifii, @function
_Z32nn_forward_and_update_paramenterP6CHROMOifii:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2036:
	.size	_Z32nn_forward_and_update_paramenterP6CHROMOifii, .-_Z32nn_forward_and_update_paramenterP6CHROMOifii
	.globl	_Z9benchmarkiPA2_fi
	.type	_Z9benchmarkiPA2_fi, @function
_Z9benchmarkiPA2_fi:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2037:
	.size	_Z9benchmarkiPA2_fi, .-_Z9benchmarkiPA2_fi
	.globl	_Z11thread_sortiP10IN_FITNESSif
	.type	_Z11thread_sortiP10IN_FITNESSif, @function
_Z11thread_sortiP10IN_FITNESSif:
.LFB2038:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2038:
	.size	_Z11thread_sortiP10IN_FITNESSif, .-_Z11thread_sortiP10IN_FITNESSif
	.globl	_Z60__device_stub__Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITIONP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.type	_Z60__device_stub__Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITIONP6CHROMOPfP10IN_FITNESSP11IN_POSITION, @function
_Z60__device_stub__Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITIONP6CHROMOPfP10IN_FITNESSP11IN_POSITION:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L161
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L161:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L163
	call	__stack_chk_fail@PLT
.L163:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z60__device_stub__Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITIONP6CHROMOPfP10IN_FITNESSP11IN_POSITION, .-_Z60__device_stub__Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITIONP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.globl	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.type	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION, @function
_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION:
.LFB2065:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITIONP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.cfi_endproc
.LFE2065:
	.size	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION, .-_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.section	.rodata.str1.1
.LC28:
	.string	"GA200results.txt"
.LC29:
	.string	"history_bestch.txt"
.LC30:
	.string	"failed to open f file\n"
.LC31:
	.string	"pause"
.LC32:
	.string	"the history min ranking is:%f \n"
.LC33:
	.string	"history best is in g=%d:%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-28672(%rsp), %r11
	.cfi_def_cfa 11, 28728
.LPSRL1:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL1
	.cfi_def_cfa_register 7
	subq	$1432, %rsp
	.cfi_def_cfa_offset 30160
	movl	$12275172, %edi
	leaq	.LC12(%rip), %rbp
	movq	%fs:40, %rax
	movq	%rax, 30088(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$19656000, %edi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movl	$39312000, %edi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movl	$39312000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$98280, %edi
	movq	%rax, 72(%rsp)
	call	malloc@PLT
	movq	%rbp, %rsi
	leaq	.LC28(%rip), %rdi
	movq	%rax, 8(%rsp)
	call	fopen@PLT
	movq	%rbp, %rsi
	leaq	.LC29(%rip), %rdi
	movq	%rax, 32(%rsp)
	call	fopen@PLT
	cmpq	$0, 32(%rsp)
	movq	%rax, (%rsp)
	je	.L182
	testq	%rax, %rax
	jne	.L167
.L182:
	movl	$2, %edi
	leaq	.LC30(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC31(%rip), %rdi
	call	system@PLT
.L167:
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movq	8(%rsp), %rdi
	xorl	%eax, %eax
	movq	%rbx, %rdx
	movl	$24570, %ecx
	rep stosl
	movq	24(%rsp), %rdi
	movl	$4914000, %ecx
	rep stosl
	leaq	39312000(%rbx), %rcx
.L169:
	xorl	%eax, %eax
.L170:
	movl	$0x00000000, (%rdx,%rax)
	movl	$0x00000000, 4(%rdx,%rax)
	addq	$8, %rax
	cmpq	$1600, %rax
	jne	.L170
	addq	$1600, %rdx
	cmpq	%rcx, %rdx
	jne	.L169
	movq	16(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%ebp, %ebp
	movabsq	$4294968064, %r13
	call	_Z14initial_chromoP6CHROMO
	leaq	112(%rsp), %rdi
	call	_Z14initial_chromoR6CHROMO
	leaq	15100(%rsp), %rdi
	call	_Z14initial_chromoR6CHROMO
	movl	$1, %edi
	call	cudaSetDevice@PLT
.L180:
	leaq	80(%rsp), %rdi
	movl	$98280, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$12275172, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$19656000, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$39312000, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movl	$12275172, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movl	$98280, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movl	$19656000, %edx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$39312000, %edx
	call	cudaMemcpy@PLT
	movl	$134217729, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdi
	movq	%r13, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r13, 100(%rsp)
	movl	$1, 108(%rsp)
	movq	%rdi, 88(%rsp)
	movl	$1, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L172
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z60__device_stub__Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITIONP6CHROMOPfP10IN_FITNESSP11IN_POSITION
.L172:
	call	cudaDeviceSynchronize@PLT
	movq	80(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$98280, %edx
	leaq	112(%rsp), %r12
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$39312000, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	%ebp, %ecx
	movq	%r12, %rdx
	movq	16(%rsp), %rdi
	call	_Z11my_functionP6CHROMOPfRS_i
	movss	%xmm0, 40(%rsp)
	testl	%ebp, %ebp
	jne	.L173
	movl	$360, %r14d
.L174:
	movss	(%r12,%r14), %xmm0
	movq	(%rsp), %rdi
	movl	$2, %esi
	movb	$1, %al
	leaq	.LC17(%rip), %rdx
	leaq	15100(%rsp), %r15
	movss	%xmm0, 15100(%rsp,%r14)
	addq	$4, %r14
	cvtss2sd	%xmm0, %xmm0
	call	__fprintf_chk@PLT
	cmpq	$372, %r14
	jne	.L174
	xorl	%r14d, %r14d
.L175:
	movss	(%r12,%r14), %xmm0
	movq	(%rsp), %rdi
	movl	$2, %esi
	movb	$1, %al
	leaq	.LC17(%rip), %rdx
	movss	%xmm0, (%r15,%r14)
	addq	$4, %r14
	cvtss2sd	%xmm0, %xmm0
	call	__fprintf_chk@PLT
	cmpq	$360, %r14
	jne	.L175
	movss	14604(%rsp), %xmm0
	movq	(%rsp), %rdi
	movb	$4, %al
	xorl	%r14d, %r14d
	movss	14608(%rsp), %xmm1
	leaq	.LC18(%rip), %rdx
	movss	14612(%rsp), %xmm2
	movl	$2, %esi
	movss	14616(%rsp), %xmm3
	movss	%xmm0, 29592(%rsp)
	cvtss2sd	%xmm0, %xmm0
	movss	%xmm1, 29596(%rsp)
	cvtss2sd	%xmm1, %xmm1
	movss	%xmm2, 29600(%rsp)
	cvtss2sd	%xmm2, %xmm2
	movss	%xmm3, 29604(%rsp)
	cvtss2sd	%xmm3, %xmm3
	call	__fprintf_chk@PLT
	jmp	.L194
.L173:
	movd	%r15d, %xmm4
	comiss	40(%rsp), %xmm4
	jbe	.L176
	movl	$360, %r14d
.L178:
	movss	(%r12,%r14), %xmm0
	movq	(%rsp), %rdi
	movl	$2, %esi
	movb	$1, %al
	leaq	.LC17(%rip), %rdx
	leaq	15100(%rsp), %r15
	movss	%xmm0, 15100(%rsp,%r14)
	addq	$4, %r14
	cvtss2sd	%xmm0, %xmm0
	call	__fprintf_chk@PLT
	cmpq	$372, %r14
	jne	.L178
	xorl	%r14d, %r14d
.L179:
	movss	(%r12,%r14), %xmm0
	movq	(%rsp), %rdi
	movl	$2, %esi
	movb	$1, %al
	leaq	.LC17(%rip), %rdx
	movss	%xmm0, (%r15,%r14)
	addq	$4, %r14
	cvtss2sd	%xmm0, %xmm0
	call	__fprintf_chk@PLT
	cmpq	$360, %r14
	jne	.L179
	movss	14604(%rsp), %xmm0
	movq	(%rsp), %rdi
	movb	$4, %al
	movl	%ebp, %r14d
	movss	14608(%rsp), %xmm1
	leaq	.LC18(%rip), %rdx
	movss	14612(%rsp), %xmm2
	movl	$2, %esi
	movss	14616(%rsp), %xmm3
	movss	%xmm0, 29592(%rsp)
	cvtss2sd	%xmm0, %xmm0
	movss	%xmm1, 29596(%rsp)
	cvtss2sd	%xmm1, %xmm1
	movss	%xmm2, 29600(%rsp)
	cvtss2sd	%xmm2, %xmm2
	movss	%xmm3, 29604(%rsp)
	cvtss2sd	%xmm3, %xmm3
	call	__fprintf_chk@PLT
.L194:
	movl	40(%rsp), %r15d
.L176:
	movd	%r15d, %xmm6
	leaq	.LC32(%rip), %rsi
	movb	$1, %al
	incl	%ebp
	movl	$2, %edi
	cvtss2sd	%xmm6, %xmm0
	movsd	%xmm0, 40(%rsp)
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	leal	1(%r14), %ecx
	movb	$1, %al
	movsd	40(%rsp), %xmm0
	leaq	.LC33(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	cmpl	$200, %ebp
	jne	.L180
	movq	(%rsp), %rdi
	call	fclose@PLT
	movq	32(%rsp), %rdi
	call	fclose@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	30088(%rsp), %rax
	subq	%fs:40, %rax
	je	.L181
	call	__stack_chk_fail@PLT
.L181:
	addq	$30104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	main, .-main
	.section	.rodata.str1.1
.LC34:
	.string	"_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2067:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC34(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2067:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1074224169
	.align 4
.LC1:
	.long	1123287040
	.align 4
.LC2:
	.long	805306368
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	1717986918
	.long	1072064102
	.section	.rodata.cst4
	.align 4
.LC4:
	.long	1056964608
	.section	.rodata.cst8
	.align 8
.LC5:
	.long	-343597384
	.long	1067366481
	.align 8
.LC6:
	.long	0
	.long	1040187392
	.align 8
.LC7:
	.long	1202590843
	.long	1066695393
	.align 8
.LC8:
	.long	1202590843
	.long	1065646817
	.section	.rodata.cst4
	.align 4
.LC9:
	.long	1128792064
	.align 4
.LC10:
	.long	1120403456
	.align 4
.LC19:
	.long	1077936128
	.align 4
.LC20:
	.long	1092616192
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//并行版本输入多维

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#include <stdlib.h>
#include <time.h>

#define DIMENSION 2
#define INPUT_NEURAL_NUM DIMENSION+1
#define HIDDEN_NEURAL_NUM 5
#define OUTPUT_NEURAL_NUM DIMENSION
#define NEURAL_NUM HIDDEN_NEURAL_NUM + INPUT_NEURAL_NUM + OUTPUT_NEURAL_NUM
#define EPOCH 200
#define THREAD_EPOCH 200
#define STEPS 10

#define MUTATION_P  0.03
#define CROSS_P 0.7
#define PER_BENCHMARK_TIMES 3 
#define BENCHMARK_NUM 10
#define NEURAL_NETWORK_NUM (DIMENSION*PER_BENCHMARK_TIMES*BENCHMARK_NUM)  //每一个染色体上进行的神经网络
#define PI 3.1415926535897932384626433832795029
#define E 2.7182818284590452353602874713526625
#define SINGLE_WEIGHT (NEURAL_NUM)*(NEURAL_NUM - 1)
#define MAX 100
#define MIN -100
#define DEVICE_NUM 1
#define BLOCK 8*4
#define THREAD 192*4
#define NUM_CHROMO  (BLOCK*THREAD/(BENCHMARK_NUM*PER_BENCHMARK_TIMES))
#define G 0.002
#define W_MAX 0.01
#define W_MIN -0.01
#define DELTA_X_MAX 0.1
#define DELTA_X_MIN -0.1


struct NN
{
	float w[SINGLE_WEIGHT];
	float input_w[INPUT_NEURAL_NUM]; ////
	float old_neural[NEURAL_NUM];
	float new_neural[NEURAL_NUM];
};

struct CHROMO
{
	NN nn_initial;
	NN nn[PER_BENCHMARK_TIMES*BENCHMARK_NUM];
	float a[BENCHMARK_NUM*PER_BENCHMARK_TIMES], b[BENCHMARK_NUM*PER_BENCHMARK_TIMES], c[BENCHMARK_NUM*PER_BENCHMARK_TIMES], d[BENCHMARK_NUM*PER_BENCHMARK_TIMES];
	float A, B, C, D;
	float initial_position[BENCHMARK_NUM*PER_BENCHMARK_TIMES][DIMENSION];
	float position[BENCHMARK_NUM*PER_BENCHMARK_TIMES][DIMENSION];
};

struct IN_FITNESS
{
	float f[THREAD_EPOCH];
};

struct IN_POSITION
{
	float p[THREAD_EPOCH][DIMENSION];
};

void Sort(float *arr, int length, int *index)
{
	int i, j, tin;
	tin = 0;
	float temp = 0.0;
	for (i = 0; i < length - 1; i++)
	{
		for (j = 0; j < length - i - 1; j++)
		{
			if (arr[j] > arr[j + 1])
			{
				temp = arr[j];
				arr[j] = arr[j + 1];
				arr[j + 1] = temp;
				tin = index[j];
				index[j] = index[j + 1];
				index[j + 1] = tin;
			}
		}
	}
}
//锦标赛选择
void selection_tournment(struct CHROMO ch[NUM_CHROMO], float GA_Fitness[NUM_CHROMO], int g)
{
	int m, i, j, l, n, k, maxindex;
	m = NUM_CHROMO;
	int sel_num, sel_init, sel_final;
	sel_init = floor(NUM_CHROMO*0.15);
	sel_final = floor(NUM_CHROMO*0.666);
	sel_num = (int)(floor)(sel_final - sel_init) / (float)EPOCH*(g + 1) + sel_init;

	int *select;
	select = (int(*))malloc(sel_num * sizeof(int));
	int mark2[NUM_CHROMO] = { 0 };//标记个体有没有被选中
	int index[NUM_CHROMO] = { 0 };//
	float min;

	for (i = 0; i < m; i++)			// m = CHROMOSOME_NUM
	{
		for (j = 0; j < sel_num; j++)
		{
			int r2 = rand() % m + 1;   //1-m之间哪个个体（整数）
			while (mark2[r2 - 1] == 1)
			{
				r2 = rand() % m + 1;
			}
			mark2[r2 - 1] = 1;
			select[j] = r2 - 1;
		}
		min = GA_Fitness[select[0]];
		maxindex = select[0];
		for (k = 1; k < sel_num; k++)
		{
			if (GA_Fitness[select[k]] < min)
			{
				min = GA_Fitness[select[k]];
				maxindex = select[k];
			}
		}
		index[i] = maxindex;
		for (n = 0; n < NUM_CHROMO; n++)
		{
			mark2[n] = 0;
		}

		for (n = 0; n < sel_num; n++)
		{
			select[n] = 0;
		}
		for (l = 0; l < SINGLE_WEIGHT; l++)
		{
			ch[i].nn_initial.w[l] = ch[index[i]].nn_initial.w[l];
		}
		for (l = 0; l < INPUT_NEURAL_NUM; l++)
		{
			ch[i].nn_initial.input_w[l] = ch[index[i]].nn_initial.input_w[l];
		}
		ch[i].A = ch[index[i]].A;
		ch[i].B = ch[index[i]].B;
		ch[i].C = ch[index[i]].C;
		ch[i].D = ch[index[i]].D;
	}
	free(select);
}
//交叉
void crossover(struct CHROMO ch[NUM_CHROMO])
{
	//const double a = 0.0;
	//const double b = 1.0;
	time_t tttt;
	srand((unsigned int)time(&tttt));
	int two;
	int one;
	int first = 0;
	float r, r2;
	//int point;
	float t;
	int i;
	for (two = 0; two < NUM_CHROMO; two++)
	{
		r = (float)rand() / RAND_MAX;
		if (r < CROSS_P)
		{
			++first;
			if (first % 2 == 0)//交叉
			{
				//point = rand() % TOTAL_WEIGHT + 1;  //随机选择交叉点
				for (i = 0; i < SINGLE_WEIGHT; i++)
				{
					r2 = (float)rand() / (RAND_MAX + 1.0);
					if (r2 < 0.5)
					{
						t = ch[one].nn_initial.w[i];
						ch[one].nn_initial.w[i] = ch[two].nn_initial.w[i];
						ch[two].nn_initial.w[i] = t;
					}
				}
				for (i = 0; i < INPUT_NEURAL_NUM; i++)
				{
					r2 = (float)rand() / (RAND_MAX + 1.0);
					if (r2 < 0.5)
					{
						t = ch[one].nn_initial.input_w[i];
						ch[one].nn_initial.input_w[i] = ch[two].nn_initial.input_w[i];
						ch[two].nn_initial.input_w[i] = t;
					}
				}
				r2 = (float)rand() / (RAND_MAX + 1.0);
				if (r2 < 0.5)
				{
					t = ch[one].A;
					ch[one].A = ch[two].A;
					ch[two].A = t;
				}
				r2 = (float)rand() / (RAND_MAX + 1.0);
				if (r2 < 0.5)
				{
					t = ch[one].B;
					ch[one].B = ch[two].B;
					ch[two].B = t;
				}
				r2 = (float)rand() / (RAND_MAX + 1.0);
				if (r2 < 0.5)
				{
					t = ch[one].C;
					ch[one].C = ch[two].C;
					ch[two].C = t;
				}
				r2 = (float)rand() / (RAND_MAX + 1.0);
				if (r2 < 0.5)
				{
					t = ch[one].D;
					ch[one].D = ch[two].D;
					ch[two].D = t;
				}
			}
			else
			{
				one = two;
			}
		}
	}
}
//变异
void mutation(struct CHROMO ch[NUM_CHROMO])
{
	float r;
	time_t tttt;
	srand((unsigned int)time(&tttt));
	int i, j;
	for (i = 0; i < NUM_CHROMO; i++)
	{
		for (j = 0; j < INPUT_NEURAL_NUM; j++)
		{
			r = (float)rand() / (RAND_MAX + 1.0);
			if (r < MUTATION_P)
			{
				ch[i].nn_initial.input_w[j] = (float)rand() / (RAND_MAX + 1.0) * (W_MAX - W_MIN) - W_MAX;
			}
		}
		for (j = 0; j < SINGLE_WEIGHT; j++)
		{
			r = (float)rand() / (RAND_MAX + 1.0);
			if (r < MUTATION_P)
			{
				ch[i].nn_initial.w[j] = (float)rand() / (RAND_MAX + 1.0) * (W_MAX - W_MIN) - W_MAX;
			}
		}
		r = (float)rand() / (RAND_MAX + 1.0);
/*
		if (r < MUTATION_P)
		{
			ch[i].A = (float)rand() / RAND_MAX * 2.0 - 1.0;
		}
		r = (float)rand() / (RAND_MAX + 1.0);
		if (r < MUTATION_P)
		{
			ch[i].B = (float)rand() / RAND_MAX * 2.0 - 1.0;
		}
		r = (float)rand() / (RAND_MAX + 1.0);
		if (r < MUTATION_P)
		{
			ch[i].C = (float)rand() / RAND_MAX * 2.0 - 1.0;
		}
		r = (float)rand() / (RAND_MAX + 1.0);
		if (r < MUTATION_P)
		{
			ch[i].D = (float)rand() / RAND_MAX * 2.0 - 1.0;
		}
*/
		if (r < MUTATION_P)
		{
			ch[i].A = (float)rand() / RAND_MAX *  (W_MAX - W_MIN) - W_MAX;
			ch[i].B = (float)rand() / RAND_MAX *  (W_MAX - W_MIN) - W_MAX;
			ch[i].C = (float)rand() / RAND_MAX *  (W_MAX - W_MIN) - W_MAX;
			ch[i].D = (float)rand() / RAND_MAX *  (W_MAX - W_MIN) - W_MAX;
		}

	}
}

void initial_chromo(struct CHROMO chromo[NUM_CHROMO])
{
	time_t ti;
	srand((unsigned int)time(&ti));

	for (int i = 0; i < NUM_CHROMO; i++)
	{
		for (int j = 0; j < INPUT_NEURAL_NUM; j++)
		{
			chromo[i].nn_initial.input_w[j] = (float)rand() / RAND_MAX *(W_MAX - W_MIN) - W_MAX;
		}
		for (int j = 0; j < SINGLE_WEIGHT; j++)
		{
			chromo[i].nn_initial.w[j] = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		}
		chromo[i].A = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		chromo[i].B = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		chromo[i].C = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		chromo[i].D = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
		for (int num_fun = 0; num_fun < BENCHMARK_NUM*PER_BENCHMARK_TIMES; num_fun++)
		{
			for (int j = 0; j < SINGLE_WEIGHT; j++)
			{
				chromo[i].nn[num_fun].w[j] = chromo[i].nn_initial.w[j];
			}
			for (int j = 0; j < INPUT_NEURAL_NUM; j++)
			{
				chromo[i].nn[num_fun].input_w[j] = chromo[i].nn_initial.input_w[j];
			}
			for (int j = 0; j < NEURAL_NUM; j++)
			{
				chromo[i].nn[num_fun].old_neural[j] = 0.5;
				chromo[i].nn[num_fun].new_neural[j] = 0.0;
			}
			for (int d = 0; d < DIMENSION; d++)
			{
				chromo[i].initial_position[num_fun][d] = (float)rand() / RAND_MAX * (MAX - MIN) - MAX;
				chromo[i].position[num_fun][d] = chromo[i].initial_position[num_fun][d];
			}
			chromo[i].a[num_fun] = chromo[i].A;
			chromo[i].b[num_fun] = chromo[i].B;
			chromo[i].c[num_fun] = chromo[i].C;
			chromo[i].d[num_fun] = chromo[i].D;
		}
	}
}
void initial_chromo(struct CHROMO &chromo)
{
	time_t tttt;
	srand((unsigned int)time(&tttt));
	int i = 0;
	for (i = 0; i<INPUT_NEURAL_NUM; i++)
	{
		chromo.nn_initial.input_w[i] = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	}
	for (i = 0; i<SINGLE_WEIGHT; i++)
	{
		chromo.nn_initial.w[i] = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	}
	chromo.A = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	chromo.B = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	chromo.C = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	chromo.D = (float)rand() / RAND_MAX * (W_MAX - W_MIN) - W_MAX;
	for (int num_fun = 0; num_fun < BENCHMARK_NUM*PER_BENCHMARK_TIMES; num_fun++)
	{
		for (i = 0; i < SINGLE_WEIGHT; i++)
		{
			chromo.nn[num_fun].w[i] = chromo.nn_initial.w[i];
		}
		for (i = 0; i < INPUT_NEURAL_NUM; i++)
		{
			chromo.nn[num_fun].input_w[i] = chromo.nn_initial.input_w[i];
		}
		for (i = 0; i < NEURAL_NUM; i++)
		{
			chromo.nn[num_fun].old_neural[i] = 0.5;
			chromo.nn[num_fun].new_neural[i] = 0.0;
		}
		for (i = 0; i < DIMENSION; i++)
		{
			chromo.initial_position[num_fun][i] = (float)rand() / RAND_MAX * (MAX - MIN) - MAX;
			chromo.position[num_fun][i] = chromo.initial_position[num_fun][i];
		}
		chromo.a[num_fun] = chromo.A;
		chromo.b[num_fun] = chromo.B;
		chromo.c[num_fun] = chromo.C;
		chromo.d[num_fun] = chromo.D;
	}
}

float my_function(struct CHROMO ch[NUM_CHROMO], float fitness[NUM_CHROMO*PER_BENCHMARK_TIMES*BENCHMARK_NUM], struct CHROMO &GA_best_ch, int g)
{
	int temp_nn_index[NUM_CHROMO*PER_BENCHMARK_TIMES];//下标
	float nn_fitness[BENCHMARK_NUM*PER_BENCHMARK_TIMES][NUM_CHROMO];  //实际通过cec计算得出的适应值
	float nn_fitness_one_f[NUM_CHROMO];//所有染色体在同一个函数上的排序
	int record_sort_index[NUM_CHROMO];   //1个函数下的NUM_CHROMO*PER_BENCHMARK_TIMES个排名名次
	float record_nn_fitness_sort_index[BENCHMARK_NUM*PER_BENCHMARK_TIMES][NUM_CHROMO];  //10个函数下的CHROMOSOME_NUM个NN 名次
	float fitness_ranking[BENCHMARK_NUM + 1][NUM_CHROMO];
	float GA_fitness[NUM_CHROMO];
	float min_fit;
	FILE* f_temp_ch;
	FILE* f_temp_result = fopen("temp_result.txt", "a");
	//FILE* all_f_g = fopen("all_f_g.txt", "a");
	FILE* one_g_chromo[NUM_CHROMO + 1];
	char fileName[256];
	for (int i = 0; i < NUM_CHROMO; i++)
	{
		sprintf(fileName, "NN/g%d/ch_%d.txt", g + 1, i);
		one_g_chromo[i] = fopen(fileName, "w");
		if (one_g_chromo[i] == NULL)
		{
			printf("\n Error: Cannot open ch_%d filoe \n",i);
		}
		for (int j = 0; j < INPUT_NEURAL_NUM; j++)
		{
			fprintf(one_g_chromo[i], "%f\n", ch[i].nn_initial.input_w[j]);
		}
		for (int j = 0; j < SINGLE_WEIGHT; j++)
		{
			fprintf(one_g_chromo[i], "%f\n", ch[i].nn_initial.w[j]);
		}
		fprintf(one_g_chromo[i], "A:%f\n B:%f\n C:%f\n D:%f\n", ch[i].A, ch[i].B, ch[i].C, ch[i].D);
		fclose(one_g_chromo[i]);

	}
	for (int i = 0; i < BENCHMARK_NUM + 1; i++)
	{
		for (int j = 0; j < NUM_CHROMO; j++)
		{
			fitness_ranking[i][j] = 0.0;
		}
	}
	for (int fun_num = 0; fun_num < BENCHMARK_NUM*PER_BENCHMARK_TIMES; fun_num++)
	{
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			nn_fitness[fun_num][i] = 0.0;
		}
	}
	//排100个，分别排3次的话
	for (int fun_num = 0; fun_num < BENCHMARK_NUM*PER_BENCHMARK_TIMES; fun_num++)
	{
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			nn_fitness[fun_num][i] = fitness[fun_num + i *BENCHMARK_NUM*PER_BENCHMARK_TIMES];
			//printf("nn_fitness[%d][%d]=%f   \t  ",fun_num,i,nn_fitness[fun_num][i]);
		}
	}
	//10个函数分别排3次
	for (int fun_num = 0; fun_num < BENCHMARK_NUM*PER_BENCHMARK_TIMES; fun_num++)
	{
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			nn_fitness_one_f[i] = nn_fitness[fun_num][i]; //NUM_CHROMO个染色体在一个函数上
			temp_nn_index[i] = i;
		}
		Sort(nn_fitness_one_f, NUM_CHROMO, temp_nn_index);
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			record_sort_index[temp_nn_index[i]] = i + 1;
		}
		for (int i = 0; i < NUM_CHROMO; i++)
		{
			record_nn_fitness_sort_index[fun_num][i] = (float)record_sort_index[i];			//NUM_CHROMO * BENCHMARK_NUM*PER_BENCHMARK_TIMES个名次																							//printf("sort_index[%d][%d]=%f   \t ",fun_num,i,record_nn_fitness_sort_index[fun_num][i]);
		}
	}
	for (int i = 0; i < NUM_CHROMO; i++)
	{
		for (int fun_num = 0; fun_num < BENCHMARK_NUM; fun_num++)
		{
			for (int k = 0; k < PER_BENCHMARK_TIMES; k++)
			{
				fitness_ranking[fun_num][i] += record_nn_fitness_sort_index[fun_num + BENCHMARK_NUM * k][i];
			}
			fitness_ranking[fun_num][i] /= PER_BENCHMARK_TIMES;
		}
	}
	//平均排名
	for (int i = 0; i < NUM_CHROMO; i++)
	{
		float sum = 0;
		for (int j = 0; j < BENCHMARK_NUM; j++)
		{
			sum += fitness_ranking[j][i];
		}
		fitness_ranking[BENCHMARK_NUM][i] = sum / BENCHMARK_NUM;
		GA_fitness[i] = sum / BENCHMARK_NUM;
		printf("the %dth chromosome in all function's avg ranking is :%f \n", i + 1, GA_fitness[i]);
		//fprintf(all_f_g, "g=%d,f[%d]=%f:\n", g + 1, i + 1, GA_fitness[i]);
	}
	sprintf(fileName, "NN/g%d/GA_fitness.txt", g + 1);
	one_g_chromo[NUM_CHROMO] = fopen(fileName, "a");
	if (one_g_chromo[NUM_CHROMO] == NULL)
	{
		printf("\n Error: Cannot open GA_fitness file  \n");
	}
	for (int i = 0; i < NUM_CHROMO; i++)
	{
		fprintf(one_g_chromo[NUM_CHROMO], "%f\n", GA_fitness[i]);
	}
	fclose(one_g_chromo[NUM_CHROMO]);
	min_fit = GA_fitness[0];     //当代  找最小排名及对应的网络
	for (int j = 0; j < INPUT_NEURAL_NUM; j++)
	{
		GA_best_ch.nn_initial.input_w[j] = ch[0].nn_initial.input_w[j];
	}
	for (int j = 0; j < SINGLE_WEIGHT; j++)
	{
		GA_best_ch.nn_initial.w[j] = ch[0].nn_initial.w[j];
	}
	GA_best_ch.A = ch[0].A;
	GA_best_ch.B = ch[0].B;
	GA_best_ch.C = ch[0].C;
	GA_best_ch.D = ch[0].D;
	for (int i = 1; i < NUM_CHROMO; i++)
	{
		if (GA_fitness[i] < min_fit)
		{
			min_fit = GA_fitness[i];
			for (int j = 0; j < INPUT_NEURAL_NUM; j++)
			{
				GA_best_ch.nn_initial.input_w[j] = ch[i].nn_initial.input_w[j];
			}
			for (int j = 0; j < SINGLE_WEIGHT; j++)
			{
				GA_best_ch.nn_initial.w[j] = ch[i].nn_initial.w[j];
			}
			GA_best_ch.A = ch[i].A;
			GA_best_ch.B = ch[i].B;
			GA_best_ch.C = ch[i].C;
			GA_best_ch.D = ch[i].D;
		}
	}
	sprintf(fileName, "NN/g%d/temp_bestch.txt", g + 1);
	f_temp_ch = fopen(fileName, "w");
	fprintf(f_temp_ch, "g=%d,the best chromosome:\n", g + 1);

	for (int j = 0; j < INPUT_NEURAL_NUM; j++)
	{
		fprintf(f_temp_ch, "%f\n", GA_best_ch.nn_initial.input_w[j]);
	}
	for (int j = 0; j < SINGLE_WEIGHT; j++)
	{
		fprintf(f_temp_ch, "%f\n", GA_best_ch.nn_initial.w[j]);
	}
	fprintf(f_temp_ch, "A:%f\n B:%f\n C:%f\n D:%f\n", GA_best_ch.A, GA_best_ch.B, GA_best_ch.C, GA_best_ch.D);//当代最佳chromosome
	printf("the generation %d min ranking is:%f \n", g + 1, min_fit);
	fprintf(f_temp_result, "g=%d,the best:%f\n", g + 1, min_fit);//当代最佳适应值

	selection_tournment(ch, GA_fitness, g);
	crossover(ch);
	mutation(ch);

	for (int i = 0; i < NUM_CHROMO; i++)
	{
		for (int j = 0; j < (PER_BENCHMARK_TIMES*BENCHMARK_NUM); j++)
		{
			for (int d = 0; d < SINGLE_WEIGHT; d++)
			{
				ch[i].nn[j].w[d] = ch[i].nn_initial.w[d];
			}
			for (int k = 0; k < DIMENSION; k++)
			{
				ch[i].position[j][k] = ch[i].initial_position[j][k];
			}
			for (int tt = 0; tt < INPUT_NEURAL_NUM; tt++)
			{
				ch[i].nn[j].input_w[tt] = ch[i].nn_initial.input_w[tt];
			}
			for (int d = 0; d < NEURAL_NUM; d++)
			{
				ch[i].nn[j].old_neural[d] = 0.5;
			}

			ch[i].a[j] = ch[i].A;
			ch[i].b[j] = ch[i].B;
			ch[i].c[j] = ch[i].C;
			ch[i].d[j] = ch[i].D;

		}
	}
	fclose(f_temp_ch);
	fclose(f_temp_result);
	//fclose(all_f_g);
/*
	for (int i = 0; i < NUM_CHROMO + 1; i++)
	{
		fclose(one_g_chromo[i]);
	}
*/
	return min_fit;
}

__device__ float hebb(float a, float b, float c, float d, float x, float y)
{
	return G*(a*x + b * y + c * x*y + d);
}

__device__ float sigmoid(float x)
{
	if (x < -80)
		return 0;
	else if (x > 80)
		return 1;
	else
		return 1.0F / (1.0F + exp(-1 * x));
}

__device__ void  nn_forward_and_update_paramenter(struct CHROMO ch[], int num, float f, int num_fun3, int num_epoch)  ////
{
	float inputs[INPUT_NEURAL_NUM];
	float delta_w[SINGLE_WEIGHT];
	int t = 0;
	//输入
	inputs[0] = f / num_epoch;
	inputs[1] = ch[num].position[num_fun3][0] / MAX;
	inputs[2] = ch[num].position[num_fun3][1] / MAX;

	for (int i = 0; i < SINGLE_WEIGHT; i++)
	{
		delta_w[i] = 0;
	}
	//前向传递
	for (int i = 0; i < NEURAL_NUM; i++)
	{
		for (int j = 0; j < NEURAL_NUM; j++)
		{
			if (i != j)
			{
				ch[num].nn[num_fun3].new_neural[i] += (ch[num].nn[num_fun3].w[t] * ch[num].nn[num_fun3].old_neural[j]);
				t++;
			}
		}
		//printf("dimension %d,neural %d:%f\n",k, i, ch[num].nn[num_fun3][k].new_neural[i]);
		if (i < INPUT_NEURAL_NUM)
		{
			ch[num].nn[num_fun3].new_neural[i] = sigmoid(ch[num].nn[num_fun3].new_neural[i] + ch[num].nn[num_fun3].input_w[i] * inputs[i]);
		}
		else
		{
			ch[num].nn[num_fun3].new_neural[i] = sigmoid(ch[num].nn[num_fun3].new_neural[i]);
		}
	}
	//printf("\n");		
	//计算delta_w
	t = 0;
	for (int i = 0; i < NEURAL_NUM; i++)
	{
		for (int j = 0; j < NEURAL_NUM; j++)
		{
			if (i != j)
			{
				delta_w[t] = hebb(ch[num].a[num_fun3], ch[num].b[num_fun3], ch[num].c[num_fun3], ch[num].d[num_fun3], ch[num].nn[num_fun3].old_neural[j], ch[num].nn[num_fun3].old_neural[i]);
				t++;
			}
		}
	}
	//更新神经元
	for (int i = 0; i < NEURAL_NUM; i++)
	{
		ch[num].nn[num_fun3].old_neural[i] = ch[num].nn[num_fun3].new_neural[i];
		ch[num].nn[num_fun3].new_neural[i] = 0;
	}
	//更新权重
	t = 0;
	for (int i = 0; i < NEURAL_NUM; i++)
	{
		for (int j = 0; j < NEURAL_NUM; j++)
		{
			if (i != j)
			{
				ch[num].nn[num_fun3].w[t] = (ch[num].nn[num_fun3].w[t] + delta_w[t])*0.99;
				t++;
			}
		}
	}
}

__device__ float benchmark(int funnum, float x[][DIMENSION], int num)    //some simple functions
{
	int a = funnum;
	float f, sum1, sum2;
	int i;
	f = 0.0;
	i = 0;
	sum1 = 0.0;
	sum2 = 0.0;

	switch (a)
	{
		case 0:                     //sphere function
		{
			f = 0.0;
			for (i = 0; i < DIMENSION; i++)
			{
				f += x[num][i] * x[num][i];
			}
			return(f);
		}
		case 1:						//elliptic function
		{	f = 0.0;
			for (i = 0; i < DIMENSION; i++)
			{
				f += pow(pow(10.0, 6.0), i / (DIMENSION - 1))*x[num][i] * x[num][i];
			}
			return(f);
		}
		case 2:						//rastrigin's function
		{	f = 0.0;
			for (i = 0; i < DIMENSION; i++)
			{
				f += (x[num][i] * x[num][i] - 10.0*cos(2.0*PI*x[num][i]) + 10.0);
			}
			return(f);
		}
		case 3:						//ackley function
		{
			for (i = 0; i < DIMENSION; i++)
			{
				sum1 += x[num][i] * x[num][i];
				sum2 += cos(2.0*PI*x[num][i]);
			}
			sum1 = -0.2*sqrt(sum1 / DIMENSION);
			sum2 = sum2 / DIMENSION;
			f = E - 20.0*exp(sum1) - exp(sum2) + 20.0;
			return(f);
		}
		case 4:					//rosenbrock function
		{
			for (i = 0; i < DIMENSION - 1; i++)
			{
				sum1 = x[num][i] * x[num][i] - x[num][i + 1];
				sum2 = x[num][i] - 1;
				f += 100.0*sum1*sum1 + sum2 * sum2;
			}
			return(f);
		}
		case 5:					//bent cigar function
		{
			for (i = 1; i < DIMENSION; i++)
			{
				f += pow(10.0, 6.0)*x[num][i] * x[num][i];
			}
			f += x[num][0] * x[num][0];
			return f;
		}
		case 6:					//zakharov function
		{
			for (i = 0; i < DIMENSION; i++)
			{
				float z = x[num][i];
				sum1 += pow(z, 2);
				sum2 += 0.5*z;
			}
			f = sum1 + pow(sum2, 2) + pow(sum2, 4);

			return(f);
		}
		case 7:					//schwefel function 
		{
			for (i = 0; i < DIMENSION; i++)
			{
				for (int j = 0; j < i; j++)
				{
					sum1 += x[num][i] * x[num][i];
				}
				sum1 = sum1 * sum1;
				f += sum1;
			}
			return(f);
		}
		case 8:					//griewank's function
		{
			for (i = 0; i < DIMENSION; i++)
			{
				sum1 += x[num][i] * x[num][i];
				sum2 *= cos(x[num][i] / sqrt(1.0 + i));
			}
			f = sum1 / 4000.0 - sum2 + 1.0;
			return(f);
		}
		default:					//discus function
			f = pow(10.0, 6.0)*x[num][0] * x[num][0];
			for (i = 1; i < DIMENSION; i++)
			{
				f += x[num][i] * x[num][i];
			}
			return(f);
	}

}

__device__ float thread_sort(int sort_num, struct IN_FITNESS in_f[], int num, float p)
{
	float a = 0, count = 0;
	for (int i = 0; i < sort_num - 1; i++)
	{
		for (int j = 0; j < sort_num - i - 1; j++)
		{
			if (in_f[num].f[j] > in_f[num].f[j + 1])
			{
				a = in_f[num].f[j];
				in_f[num].f[j] = in_f[num].f[j + 1];
				in_f[num].f[j + 1] = a;
			}
		}
	}
	for (int i = 0; i < sort_num; i++)
	{
		if (p == in_f[num].f[i])
		{
			return count + 1;
		}
		else
		{
			count++;
		}
	}
	return 0;
}

__global__ void kernel(struct CHROMO ch[NUM_CHROMO], float fitness[BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO], struct IN_FITNESS in_f[BENCHMARK_NUM*NUM_CHROMO*PER_BENCHMARK_TIMES], struct IN_POSITION in_p[BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO])
{
	int idx = blockIdx.x*blockDim.x + threadIdx.x;
	int i,d;
	if (idx <BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO)
	{
		float value_position;
		int num_epoch = 0;
		float ff = 0;
		int num = (idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES)) % BENCHMARK_NUM;
		for (num_epoch = 0; num_epoch<THREAD_EPOCH; num_epoch++)
		{
			for (d = 0; d < DIMENSION; d++)
			{
				in_p[idx].p[num_epoch][d] = ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].position[idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES)][d];
			}
			in_f[idx].f[num_epoch] = benchmark(num, ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].position, idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES));
			//printf("ff:%f   \n", in_f[idx].f[num_epoch]);
			ff = thread_sort((num_epoch + 1), in_f, idx, in_f[idx].f[num_epoch]);
			//printf("epoch %d ff: %f\n ", num_epoch, ff);
			for (i = 0; i < STEPS; i++)
			{
				nn_forward_and_update_paramenter(ch, idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES), ff, idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES), (num_epoch + 1));
			}
			for (d = 0; d < DIMENSION; d++)
			{
				ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].position[idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES)][d] += (ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].nn[idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].old_neural[NEURAL_NUM - (d + 1)] * (DELTA_X_MAX - DELTA_X_MIN) - DELTA_X_MAX)* MAX;
			}
		}
		fitness[idx] = benchmark(num, ch[idx / (BENCHMARK_NUM*PER_BENCHMARK_TIMES)].position, idx % (BENCHMARK_NUM*PER_BENCHMARK_TIMES));
		printf("in fitness[%d]: %f\n", idx, fitness[idx]);
	}
}

int main()
{
	struct CHROMO *h_ch = (struct CHROMO *)malloc(sizeof(CHROMO)*NUM_CHROMO);		//主机端的染色体数组
	struct CHROMO *d_ch;					//设备端的
	struct IN_FITNESS *h_in_fitness = (struct IN_FITNESS *)malloc(sizeof(IN_FITNESS)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
	struct IN_FITNESS *d_in_fitness;
	struct IN_POSITION *h_in_position = (struct IN_POSITION *)malloc(sizeof(IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
	struct IN_POSITION *d_in_position = (struct IN_POSITION *)malloc(sizeof(IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
	float *d_fitness;					//设备端的一维适应值数组
	float *h_fitness = (float *)malloc(sizeof(float)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);//主机端的
	int i, g, j, d;
	struct CHROMO GA_best_ch;			//每代最佳的染色体
	struct CHROMO history_best_ch;			//历史最佳的染色体
	float min_fit;					//每代最佳的适应值
	float the_min_fit_inallG;			//历史最佳的适应值
	int record_g = 0;
	int device_id = DEVICE_NUM;
	FILE* f_results = fopen("GA200results.txt", "a");
	FILE* f_history_ch = fopen("history_bestch.txt", "a");
	//FILE *f_position = fopen("f_position.txt", "a");
	if (f_results == NULL || f_history_ch == NULL)
	{
		printf("failed to open f file\n");
		system("pause");
	}
	srand((unsigned)time(NULL));

	for (i = 0; i < BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
	{
		h_fitness[i] = 0;
	}
	for (i = 0; i < BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
	{
		for (j = 0; j < THREAD_EPOCH; j++)
		{
			h_in_fitness[i].f[j] = 0.0;
		}
	}
	for (i = 0; i<BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
	{
		for (j = 0; j<THREAD_EPOCH; j++)
		{
			for (d = 0; d<DIMENSION; d++)
			{
				h_in_position[i].p[j][d] = 0.0;
			}
		}
	}
	initial_chromo(h_ch);
	initial_chromo(GA_best_ch);
	initial_chromo(history_best_ch);
	//dim3  grid(BLOCK);
	//dim3  threads(THREAD);
	hipSetDevice(device_id);
	for (g = 0; g < EPOCH; g++)
	{
		hipMalloc((void **)&d_fitness, sizeof(float)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
		hipMalloc((struct CHROMO **)&d_ch, sizeof(struct CHROMO) * NUM_CHROMO);
		hipMalloc((struct IN_FITNESS **)&d_in_fitness, sizeof(struct IN_FITNESS)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);
		hipMalloc((struct IN_POSITION **)&d_in_position, sizeof(struct IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO);

		hipMemcpy(d_ch, h_ch, sizeof(struct CHROMO) * NUM_CHROMO, hipMemcpyHostToDevice);
		hipMemcpy(d_fitness, h_fitness, sizeof(float)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, hipMemcpyHostToDevice);
		hipMemcpy(d_in_fitness, h_in_fitness, sizeof(struct IN_FITNESS)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, hipMemcpyHostToDevice);
		hipMemcpy(d_in_position, h_in_position, sizeof(struct IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, hipMemcpyHostToDevice);

		kernel <<<BLOCK, THREAD >>> (d_ch, d_fitness, d_in_fitness, d_in_position);
		hipDeviceSynchronize();

		hipMemcpy(h_fitness, d_fitness, sizeof(float)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, hipMemcpyDeviceToHost);
		hipMemcpy(h_in_position, d_in_position, sizeof(struct IN_POSITION)*BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO, hipMemcpyDeviceToHost);
		//cudaMemcpy(h_ch, d_ch, sizeof(struct CHROMO)*NUM_CHROMO, cudaMemcpyDeviceToHost);
		/*
		fprintf(f_position, "第%d代:\n", g + 1);
		for (i = 0; i < BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
		{
			fprintf(f_position, "第%d个染色体\n", i + 1);
			for (j = 0; j < THREAD_EPOCH; j++)
			{
				fprintf(f_position, "第%d次移动\t\t\t", j + 1);
				for (d = 0; d < DIMENSION; d++)
				{
					fprintf(f_position, "%f\t\t", h_in_position[i].p[j][d]);
				}
			}
		}
		*/
		/*
		for (i = 0; i < BENCHMARK_NUM*PER_BENCHMARK_TIMES*NUM_CHROMO; i++)
		{
			printf("out fitness[%d] = %f\n", i, h_fitness[i]);
		}
		*/
		min_fit = my_function(h_ch, h_fitness, GA_best_ch, g);
		if (g == 0)
		{
			the_min_fit_inallG = min_fit;
			for (i = 0; i < INPUT_NEURAL_NUM; i++)
			{
				history_best_ch.nn_initial.input_w[i] = GA_best_ch.nn_initial.input_w[i];
				fprintf(f_history_ch, "%f\n", history_best_ch.nn_initial.input_w[i]);
			}	
			for (j = 0; j < SINGLE_WEIGHT; j++)
			{
				history_best_ch.nn_initial.w[j] = GA_best_ch.nn_initial.w[j];
				fprintf(f_history_ch, "%f\n", history_best_ch.nn_initial.w[j]);
			}
			history_best_ch.A = GA_best_ch.A;
			history_best_ch.B = GA_best_ch.B;
			history_best_ch.C = GA_best_ch.C;
			history_best_ch.D = GA_best_ch.D;
			fprintf(f_history_ch, "A:%f\n B:%f\n C:%f\n D:%f\n", history_best_ch.A, history_best_ch.B, history_best_ch.C, history_best_ch.D);
			record_g = g;
		}

		if (min_fit < the_min_fit_inallG)
		{
			the_min_fit_inallG = min_fit;
			for (i = 0; i < INPUT_NEURAL_NUM; i++)
			{
				history_best_ch.nn_initial.input_w[i] = GA_best_ch.nn_initial.input_w[i];
				fprintf(f_history_ch, "%f\n", history_best_ch.nn_initial.input_w[i]);
			}
			for (j = 0; j < SINGLE_WEIGHT; j++)
			{
				history_best_ch.nn_initial.w[j] = GA_best_ch.nn_initial.w[j];
				fprintf(f_history_ch, "%f\n", history_best_ch.nn_initial.w[j]);
			}
			history_best_ch.A = GA_best_ch.A;
			history_best_ch.B = GA_best_ch.B;
			history_best_ch.C = GA_best_ch.C;
			history_best_ch.D = GA_best_ch.D;
			fprintf(f_history_ch, "A:%f\n B:%f\n C:%f\n D:%f\n", history_best_ch.A, history_best_ch.B, history_best_ch.C, history_best_ch.D);
			record_g = g;
		}
		printf("the history min ranking is:%f \n", the_min_fit_inallG);
		fprintf(f_results, "history best is in g=%d:%f\n", record_g + 1, the_min_fit_inallG);
		hipFree(d_fitness);
		hipFree(d_ch);
		hipFree(d_in_fitness);
		hipFree(d_in_position);

	}//GA代
	fclose(f_history_ch);
	//fclose(f_position);
	fclose(f_results);
	free(h_ch);
	free(h_fitness);
	free(h_in_fitness);
	free(h_in_position);
	return 0;
}
	.text
	.file	"main.hip"
	.globl	_Z4SortPfiPi                    # -- Begin function _Z4SortPfiPi
	.type	_Z4SortPfiPi,@function
_Z4SortPfiPi:                           # @_Z4SortPfiPi
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
	cmpl	$2, %esi
	jl	.LBB0_9
# %bb.1:                                # %.preheader.preheader
	leal	-1(%rsi), %eax
	xorl	%ecx, %ecx
	movl	%eax, %r8d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	movl	%r8d, %r8d
	movl	%ecx, %r9d
	subl	%esi, %r9d
	cmpl	$-2, %r9d
	jg	.LBB0_8
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_2 Depth=1
	movss	(%rdi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	xorl	%r9d, %r9d
.LBB0_4:                                # %.lr.ph
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	4(%rdi,%r9,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jbe	.LBB0_5
# %bb.6:                                #   in Loop: Header=BB0_4 Depth=2
	movss	%xmm1, (%rdi,%r9,4)
	movss	%xmm0, 4(%rdi,%r9,4)
	rolq	$32, (%rdx,%r9,4)
	jmp	.LBB0_7
.LBB0_5:                                #   in Loop: Header=BB0_4 Depth=2
	movaps	%xmm1, %xmm0
.LBB0_7:                                #   in Loop: Header=BB0_4 Depth=2
	incq	%r9
	cmpq	%r9, %r8
	jne	.LBB0_4
.LBB0_8:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incl	%ecx
	decl	%r8d
	cmpl	%eax, %ecx
	jne	.LBB0_2
.LBB0_9:                                # %._crit_edge33
	retq
.Lfunc_end0:
	.size	_Z4SortPfiPi, .Lfunc_end0-_Z4SortPfiPi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z19selection_tournmentP6CHROMOPfi
.LCPI1_0:
	.long	0x40075c29                      # float 2.11500001
.LCPI1_1:
	.long	0x42f40000                      # float 122
	.text
	.globl	_Z19selection_tournmentP6CHROMOPfi
	.type	_Z19selection_tournmentP6CHROMOPfi,@function
_Z19selection_tournmentP6CHROMOPfi:     # @_Z19selection_tournmentP6CHROMOPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$3304, %rsp                     # imm = 0xCE8
	.cfi_def_cfa_offset 3360
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r12
	incl	%edx
	cvtsi2ss	%edx, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	addss	.LCPI1_1(%rip), %xmm0
	cvttss2si	%xmm0, %ebp
	movslq	%ebp, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r15
	leaq	16(%rsp), %rdi
	xorl	%r13d, %r13d
	movl	$3276, %edx                     # imm = 0xCCC
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	(,%rbp,4), %rax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movq	%r12, %r14
.LBB1_1:                                # %.preheader89
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #     Child Loop BB1_7 Depth 2
                                        #     Child Loop BB1_12 Depth 2
                                        #     Child Loop BB1_14 Depth 2
	movq	%r13, 8(%rsp)                   # 8-byte Spill
	testl	%ebp, %ebp
	jle	.LBB1_17
# %bb.2:                                # %.lr.ph94.preheader
                                        #   in Loop: Header=BB1_1 Depth=1
	xorl	%r13d, %r13d
.LBB1_3:                                # %.lr.ph
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$-1609957215, %rax, %rcx        # imm = 0xA00A00A1
	shrq	$32, %rcx
	addl	%eax, %ecx
	movl	%ecx, %edx
	shrl	$31, %edx
	sarl	$9, %ecx
	addl	%edx, %ecx
	imull	$819, %ecx, %ecx                # imm = 0x333
	subl	%ecx, %eax
	movslq	%eax, %rcx
	cmpl	$1, 16(%rsp,%rcx,4)
	je	.LBB1_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=2
	movl	$1, 16(%rsp,%rcx,4)
	movl	%eax, (%r15,%r13,4)
	incq	%r13
	cmpq	%rbp, %r13
	jne	.LBB1_3
# %bb.5:                                # %._crit_edge95
                                        #   in Loop: Header=BB1_1 Depth=1
	movl	(%r15), %r13d
	cmpl	$2, %ebp
	jl	.LBB1_8
# %bb.6:                                # %.lr.ph100.preheader
                                        #   in Loop: Header=BB1_1 Depth=1
	movslq	%r13d, %rax
	movss	(%rbx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movl	$1, %eax
.LBB1_7:                                # %.lr.ph100
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%r15,%rax,4), %rcx
	movss	(%rbx,%rcx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	cmoval	%ecx, %r13d
	minss	%xmm0, %xmm1
	incq	%rax
	movaps	%xmm1, %xmm0
	cmpq	%rax, %rbp
	jne	.LBB1_7
.LBB1_8:                                # %._crit_edge101
                                        #   in Loop: Header=BB1_1 Depth=1
	movl	$3276, %edx                     # imm = 0xCCC
	leaq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	testl	%ebp, %ebp
	jle	.LBB1_11
# %bb.9:                                # %.lr.ph105.preheader
                                        #   in Loop: Header=BB1_1 Depth=1
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	(%rsp), %rdx                    # 8-byte Reload
	jmp	.LBB1_10
.LBB1_17:                               # %._crit_edge101.thread
                                        #   in Loop: Header=BB1_1 Depth=1
	movl	(%r15), %r13d
	movl	$3276, %edx                     # imm = 0xCCC
	leaq	16(%rsp), %rdi
	xorl	%esi, %esi
.LBB1_10:                               # %.preheader87
                                        #   in Loop: Header=BB1_1 Depth=1
	callq	memset@PLT
.LBB1_11:                               # %.preheader87
                                        #   in Loop: Header=BB1_1 Depth=1
	movslq	%r13d, %rax
	imulq	$14988, %rax, %rax              # imm = 0x3A8C
	leaq	(%r12,%rax), %rcx
	xorl	%edx, %edx
.LBB1_12:                               #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r14,%rdx,4)
	incq	%rdx
	cmpq	$90, %rdx
	jne	.LBB1_12
# %bb.13:                               # %.preheader.preheader
                                        #   in Loop: Header=BB1_1 Depth=1
	movl	$90, %edx
	movq	8(%rsp), %r13                   # 8-byte Reload
.LBB1_14:                               # %.preheader
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r14,%rdx,4)
	incq	%rdx
	cmpq	$93, %rdx
	jne	.LBB1_14
# %bb.15:                               #   in Loop: Header=BB1_1 Depth=1
	movss	14492(%r12,%rax), %xmm0         # xmm0 = mem[0],zero,zero,zero
	imulq	$14988, %r13, %rcx              # imm = 0x3A8C
	movss	%xmm0, 14492(%r12,%rcx)
	movss	14496(%r12,%rax), %xmm0         # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14496(%r12,%rcx)
	movss	14500(%r12,%rax), %xmm0         # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14500(%r12,%rcx)
	movss	14504(%r12,%rax), %xmm0         # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14504(%r12,%rcx)
	incq	%r13
	movl	$14988, %eax                    # imm = 0x3A8C
	addq	%rax, %r14
	cmpq	$819, %r13                      # imm = 0x333
	jne	.LBB1_1
# %bb.16:
	movq	%r15, %rdi
	addq	$3304, %rsp                     # imm = 0xCE8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.Lfunc_end1:
	.size	_Z19selection_tournmentP6CHROMOPfi, .Lfunc_end1-_Z19selection_tournmentP6CHROMOPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z9crossoverP6CHROMO
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI2_2:
	.long	0x3f000000                      # float 0.5
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x3fe6666666666666              # double 0.69999999999999996
	.text
	.globl	_Z9crossoverP6CHROMO
	.type	_Z9crossoverP6CHROMO,@function
_Z9crossoverP6CHROMO:                   # @_Z9crossoverP6CHROMO
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	leaq	16(%rsp), %rdi
	callq	time
	movl	%eax, %edi
	callq	srand
	xorl	%r14d, %r14d
	movq	%rbx, %r15
	xorl	%r13d, %r13d
                                        # implicit-def: $eax
                                        # kill: killed $eax
.LBB2_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
                                        #     Child Loop BB2_10 Depth 2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	jbe	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	leal	1(%r13), %r12d
	testb	$1, %r13b
	jne	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_1 Depth=1
	movl	%r14d, %eax
	movl	%r14d, 4(%rsp)                  # 4-byte Spill
	jmp	.LBB2_21
.LBB2_2:                                #   in Loop: Header=BB2_1 Depth=1
	movl	%r13d, %r12d
.LBB2_21:                               #   in Loop: Header=BB2_1 Depth=1
	incq	%r14
	addq	$14988, %r15                    # imm = 0x3A8C
	movl	%r12d, %r13d
	cmpq	$819, %r14                      # imm = 0x333
	jne	.LBB2_1
	jmp	.LBB2_22
.LBB2_5:                                # %.preheader82
                                        #   in Loop: Header=BB2_1 Depth=1
	movslq	4(%rsp), %rax                   # 4-byte Folded Reload
	imulq	$14988, %rax, %rax              # imm = 0x3A8C
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	leaq	(%rbx,%rax), %rbp
	xorl	%r13d, %r13d
.LBB2_6:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB2_8
# %bb.7:                                #   in Loop: Header=BB2_6 Depth=2
	movss	(%rbp,%r13,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%r15,%r13,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, (%rbp,%r13,4)
	movss	%xmm0, (%r15,%r13,4)
.LBB2_8:                                #   in Loop: Header=BB2_6 Depth=2
	incq	%r13
	cmpq	$90, %r13
	jne	.LBB2_6
# %bb.9:                                # %.preheader.preheader
                                        #   in Loop: Header=BB2_1 Depth=1
	movl	$90, %r13d
.LBB2_10:                               # %.preheader
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB2_12
# %bb.11:                               #   in Loop: Header=BB2_10 Depth=2
	movss	(%rbp,%r13,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%r15,%r13,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, (%rbp,%r13,4)
	movss	%xmm0, (%r15,%r13,4)
.LBB2_12:                               #   in Loop: Header=BB2_10 Depth=2
	incq	%r13
	cmpq	$93, %r13
	jne	.LBB2_10
# %bb.13:                               #   in Loop: Header=BB2_1 Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	movq	8(%rsp), %r13                   # 8-byte Reload
	jbe	.LBB2_15
# %bb.14:                               #   in Loop: Header=BB2_1 Depth=1
	movss	14492(%rbx,%r13), %xmm0         # xmm0 = mem[0],zero,zero,zero
	imulq	$14988, %r14, %rax              # imm = 0x3A8C
	movss	14492(%rbx,%rax), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 14492(%rbx,%r13)
	movss	%xmm0, 14492(%rbx,%rax)
.LBB2_15:                               #   in Loop: Header=BB2_1 Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB2_17
# %bb.16:                               #   in Loop: Header=BB2_1 Depth=1
	movss	14496(%rbx,%r13), %xmm0         # xmm0 = mem[0],zero,zero,zero
	imulq	$14988, %r14, %rax              # imm = 0x3A8C
	movss	14496(%rbx,%rax), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 14496(%rbx,%r13)
	movss	%xmm0, 14496(%rbx,%rax)
.LBB2_17:                               #   in Loop: Header=BB2_1 Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB2_19
# %bb.18:                               #   in Loop: Header=BB2_1 Depth=1
	movss	14500(%rbx,%r13), %xmm0         # xmm0 = mem[0],zero,zero,zero
	imulq	$14988, %r14, %rax              # imm = 0x3A8C
	movss	14500(%rbx,%rax), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 14500(%rbx,%r13)
	movss	%xmm0, 14500(%rbx,%rax)
.LBB2_19:                               #   in Loop: Header=BB2_1 Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB2_21
# %bb.20:                               #   in Loop: Header=BB2_1 Depth=1
	movss	14504(%rbx,%r13), %xmm0         # xmm0 = mem[0],zero,zero,zero
	imulq	$14988, %r14, %rax              # imm = 0x3A8C
	movss	14504(%rbx,%rax), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 14504(%rbx,%r13)
	movss	%xmm0, 14504(%rbx,%rax)
	jmp	.LBB2_21
.LBB2_22:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z9crossoverP6CHROMO, .Lfunc_end2-_Z9crossoverP6CHROMO
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z8mutationP6CHROMO
.LCPI3_0:
	.long	0x30000000                      # float 4.65661287E-10
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_1:
	.quad	0x3f9eb851eb851eb8              # double 0.029999999999999999
.LCPI3_2:
	.quad	0x3e00000000000000              # double 4.6566128730773926E-10
.LCPI3_3:
	.quad	0x3f947ae147ae147b              # double 0.02
.LCPI3_4:
	.quad	0xbf847ae147ae147b              # double -0.01
	.text
	.globl	_Z8mutationP6CHROMO
	.type	_Z8mutationP6CHROMO,@function
_Z8mutationP6CHROMO:                    # @_Z8mutationP6CHROMO
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movq	%rsp, %rdi
	callq	time
	movl	%eax, %edi
	callq	srand
	leaq	360(%rbx), %r14
	xorl	%r15d, %r15d
	movl	$14988, %r12d                   # imm = 0x3A8C
	movq	%rbx, %r13
.LBB3_1:                                # %.preheader23
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
                                        #     Child Loop BB3_6 Depth 2
	xorl	%ebp, %ebp
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	jbe	.LBB3_4
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI3_2(%rip), %xmm0
	mulsd	.LCPI3_3(%rip), %xmm0
	addsd	.LCPI3_4(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r14,%rbp,4)
.LBB3_4:                                #   in Loop: Header=BB3_2 Depth=2
	incq	%rbp
	cmpq	$3, %rbp
	jne	.LBB3_2
# %bb.5:                                # %.preheader
                                        #   in Loop: Header=BB3_1 Depth=1
	xorl	%ebp, %ebp
.LBB3_6:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	jbe	.LBB3_8
# %bb.7:                                #   in Loop: Header=BB3_6 Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI3_2(%rip), %xmm0
	mulsd	.LCPI3_3(%rip), %xmm0
	addsd	.LCPI3_4(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r13,%rbp,4)
.LBB3_8:                                #   in Loop: Header=BB3_6 Depth=2
	incq	%rbp
	cmpq	$90, %rbp
	jne	.LBB3_6
# %bb.9:                                #   in Loop: Header=BB3_1 Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	jbe	.LBB3_11
# %bb.10:                               #   in Loop: Header=BB3_1 Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI3_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI3_3(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	movsd	.LCPI3_4(%rip), %xmm1           # xmm1 = mem[0],zero
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	imulq	$14988, %r15, %rbp              # imm = 0x3A8C
	movss	%xmm0, 14492(%rbx,%rbp)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI3_3(%rip), %xmm0
	addsd	.LCPI3_4(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14496(%rbx,%rbp)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI3_3(%rip), %xmm0
	addsd	.LCPI3_4(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14500(%rbx,%rbp)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI3_3(%rip), %xmm0
	addsd	.LCPI3_4(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14504(%rbx,%rbp)
.LBB3_11:                               #   in Loop: Header=BB3_1 Depth=1
	incq	%r15
	addq	%r12, %r14
	addq	%r12, %r13
	cmpq	$819, %r15                      # imm = 0x333
	jne	.LBB3_1
# %bb.12:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z8mutationP6CHROMO, .Lfunc_end3-_Z8mutationP6CHROMO
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z14initial_chromoP6CHROMO
.LCPI4_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI4_3:
	.long	0x43480000                      # float 200
.LCPI4_4:
	.long	0xc2c80000                      # float -100
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI4_1:
	.quad	0x3f947ae147ae147b              # double 0.02
.LCPI4_2:
	.quad	0xbf847ae147ae147b              # double -0.01
	.text
	.globl	_Z14initial_chromoP6CHROMO
	.type	_Z14initial_chromoP6CHROMO,@function
_Z14initial_chromoP6CHROMO:             # @_Z14initial_chromoP6CHROMO
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	leaq	64(%rsp), %rdi
	callq	time
	movl	%eax, %edi
	callq	srand
	leaq	360(%rbx), %r14
	leaq	452(%rbx), %r13
	leaq	812(%rbx), %rbp
	leaq	864(%rbx), %r12
	xorl	%eax, %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
.LBB4_1:                                # %.preheader94
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
                                        #     Child Loop BB4_4 Depth 2
                                        #     Child Loop BB4_6 Depth 2
                                        #       Child Loop BB4_7 Depth 3
                                        #       Child Loop BB4_9 Depth 3
                                        #       Child Loop BB4_11 Depth 3
	xorl	%r15d, %r15d
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movsd	.LCPI4_1(%rip), %xmm3           # xmm3 = mem[0],zero
	movsd	.LCPI4_2(%rip), %xmm2           # xmm2 = mem[0],zero
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	%xmm3, %xmm0
	addsd	%xmm2, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	$3, %r15
	jne	.LBB4_2
# %bb.3:                                # %.preheader93
                                        #   in Loop: Header=BB4_1 Depth=1
	xorl	%r15d, %r15d
.LBB4_4:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI4_1(%rip), %xmm0
	addsd	.LCPI4_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$90, %r15
	jne	.LBB4_4
# %bb.5:                                #   in Loop: Header=BB4_1 Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI4_1(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	movsd	.LCPI4_2(%rip), %xmm1           # xmm1 = mem[0],zero
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	imulq	$14988, (%rsp), %rcx            # 8-byte Folded Reload
                                        # imm = 0x3A8C
	movq	8(%rsp), %rax                   # 8-byte Reload
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	leaq	(%rax,%rcx), %r15
	addq	$14492, %r15                    # imm = 0x389C
	movss	%xmm0, (%r15)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI4_1(%rip), %xmm0
	addsd	.LCPI4_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 4(%r15)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI4_1(%rip), %xmm0
	addsd	.LCPI4_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 8(%r15)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI4_1(%rip), %xmm0
	addsd	.LCPI4_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	movss	%xmm0, 12(%r15)
	movq	%r12, 16(%rsp)                  # 8-byte Spill
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	movq	%rbp, %r15
	movq	%r13, 32(%rsp)                  # 8-byte Spill
	xorl	%ebp, %ebp
	movq	%r14, 56(%rsp)                  # 8-byte Spill
.LBB4_6:                                # %.preheader92
                                        #   Parent Loop BB4_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_7 Depth 3
                                        #       Child Loop BB4_9 Depth 3
                                        #       Child Loop BB4_11 Depth 3
	xorl	%eax, %eax
.LBB4_7:                                #   Parent Loop BB4_1 Depth=1
                                        #     Parent Loop BB4_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rbx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r13,%rax,4)
	incq	%rax
	cmpq	$90, %rax
	jne	.LBB4_7
# %bb.8:                                # %.preheader91.preheader
                                        #   in Loop: Header=BB4_6 Depth=2
	xorl	%eax, %eax
.LBB4_9:                                # %.preheader91
                                        #   Parent Loop BB4_1 Depth=1
                                        #     Parent Loop BB4_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r14,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	cmpq	$3, %rax
	jne	.LBB4_9
# %bb.10:                               # %.preheader90.preheader
                                        #   in Loop: Header=BB4_6 Depth=2
	movq	$-10, %rax
.LBB4_11:                               # %.preheader90
                                        #   Parent Loop BB4_1 Depth=1
                                        #     Parent Loop BB4_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	$1056964608, (%r12,%rax,4)      # imm = 0x3F000000
	movl	$0, 40(%r12,%rax,4)
	incq	%rax
	jne	.LBB4_11
# %bb.12:                               # %.preheader
                                        #   in Loop: Header=BB4_6 Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	.LCPI4_3(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	.LCPI4_4(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	movq	8(%rsp), %rax                   # 8-byte Reload
	movq	48(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rax,%rcx), %r14
	movss	%xmm0, 14508(%r14,%rbp,8)
	movss	%xmm0, 14748(%r14,%rbp,8)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	mulss	.LCPI4_3(%rip), %xmm0
	addss	.LCPI4_4(%rip), %xmm0
	movss	%xmm0, 14512(%r14,%rbp,8)
	movss	%xmm0, 14752(%r14,%rbp,8)
	movq	40(%rsp), %rax                  # 8-byte Reload
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14012(%r14,%rbp,4)
	movss	4(%rax), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14132(%r14,%rbp,4)
	movss	8(%rax), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14252(%r14,%rbp,4)
	movss	12(%rax), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14372(%r14,%rbp,4)
	incq	%rbp
	movl	$452, %eax                      # imm = 0x1C4
	addq	%rax, %r13
	addq	%rax, %r15
	addq	%rax, %r12
	cmpq	$30, %rbp
	movq	56(%rsp), %r14                  # 8-byte Reload
	jne	.LBB4_6
# %bb.13:                               #   in Loop: Header=BB4_1 Depth=1
	movq	(%rsp), %rcx                    # 8-byte Reload
	incq	%rcx
	movl	$14988, %eax                    # imm = 0x3A8C
	addq	%rax, %r14
	addq	%rax, %rbx
	movq	32(%rsp), %r13                  # 8-byte Reload
	addq	%rax, %r13
	movq	24(%rsp), %rbp                  # 8-byte Reload
	addq	%rax, %rbp
	movq	16(%rsp), %r12                  # 8-byte Reload
	addq	%rax, %r12
	movq	%rcx, %rax
	movq	%rcx, (%rsp)                    # 8-byte Spill
	cmpq	$819, %rcx                      # imm = 0x333
	jne	.LBB4_1
# %bb.14:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z14initial_chromoP6CHROMO, .Lfunc_end4-_Z14initial_chromoP6CHROMO
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z14initial_chromoR6CHROMO
.LCPI5_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI5_3:
	.long	0x43480000                      # float 200
.LCPI5_4:
	.long	0xc2c80000                      # float -100
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI5_1:
	.quad	0x3f947ae147ae147b              # double 0.02
.LCPI5_2:
	.quad	0xbf847ae147ae147b              # double -0.01
	.text
	.globl	_Z14initial_chromoR6CHROMO
	.type	_Z14initial_chromoR6CHROMO,@function
_Z14initial_chromoR6CHROMO:             # @_Z14initial_chromoR6CHROMO
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movq	%rsp, %rdi
	callq	time
	movl	%eax, %edi
	callq	srand
	xorl	%r14d, %r14d
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movsd	.LCPI5_1(%rip), %xmm3           # xmm3 = mem[0],zero
	movsd	.LCPI5_2(%rip), %xmm2           # xmm2 = mem[0],zero
	movss	.LCPI5_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	%xmm3, %xmm0
	addsd	%xmm2, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 360(%rbx,%r14,4)
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB5_1
# %bb.2:                                # %.preheader62.preheader
	xorl	%r14d, %r14d
.LBB5_3:                                # %.preheader62
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	addsd	.LCPI5_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$90, %r14
	jne	.LBB5_3
# %bb.4:
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI5_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI5_1(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	movsd	.LCPI5_2(%rip), %xmm1           # xmm1 = mem[0],zero
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14492(%rbx)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	addsd	.LCPI5_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14496(%rbx)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	addsd	.LCPI5_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14500(%rbx)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	addsd	.LCPI5_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 14504(%rbx)
	leaq	452(%rbx), %r14
	leaq	812(%rbx), %r15
	leaq	864(%rbx), %r12
	xorl	%r13d, %r13d
	movl	$452, %ebp                      # imm = 0x1C4
.LBB5_5:                                # %.preheader61
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_6 Depth 2
                                        #     Child Loop BB5_8 Depth 2
                                        #     Child Loop BB5_10 Depth 2
	xorl	%eax, %eax
.LBB5_6:                                #   Parent Loop BB5_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rbx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r14,%rax,4)
	incq	%rax
	cmpq	$90, %rax
	jne	.LBB5_6
# %bb.7:                                # %.preheader60.preheader
                                        #   in Loop: Header=BB5_5 Depth=1
	xorl	%eax, %eax
.LBB5_8:                                # %.preheader60
                                        #   Parent Loop BB5_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	360(%rbx,%rax,4), %xmm0         # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	cmpq	$3, %rax
	jne	.LBB5_8
# %bb.9:                                # %.preheader59.preheader
                                        #   in Loop: Header=BB5_5 Depth=1
	movq	$-10, %rax
.LBB5_10:                               # %.preheader59
                                        #   Parent Loop BB5_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1056964608, (%r12,%rax,4)      # imm = 0x3F000000
	movl	$0, 40(%r12,%rax,4)
	incq	%rax
	jne	.LBB5_10
# %bb.11:                               # %.preheader
                                        #   in Loop: Header=BB5_5 Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI5_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	.LCPI5_3(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	.LCPI5_4(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	movss	%xmm0, 14508(%rbx,%r13,8)
	movss	%xmm0, 14748(%rbx,%r13,8)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	mulss	.LCPI5_3(%rip), %xmm0
	addss	.LCPI5_4(%rip), %xmm0
	movss	%xmm0, 14512(%rbx,%r13,8)
	movss	%xmm0, 14752(%rbx,%r13,8)
	movss	14492(%rbx), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14012(%rbx,%r13,4)
	movss	14496(%rbx), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14132(%rbx,%r13,4)
	movss	14500(%rbx), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14252(%rbx,%r13,4)
	movss	14504(%rbx), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14372(%rbx,%r13,4)
	incq	%r13
	addq	%rbp, %r14
	addq	%rbp, %r15
	addq	%rbp, %r12
	cmpq	$30, %r13
	jne	.LBB5_5
# %bb.12:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z14initial_chromoR6CHROMO, .Lfunc_end5-_Z14initial_chromoR6CHROMO
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11my_functionP6CHROMOPfRS_i
.LCPI6_0:
	.long	0x40400000                      # float 3
.LCPI6_1:
	.long	0x41200000                      # float 10
	.text
	.globl	_Z11my_functionP6CHROMOPfRS_i
	.type	_Z11my_functionP6CHROMOPfRS_i,@function
_Z11my_functionP6CHROMOPfRS_i:          # @_Z11my_functionP6CHROMOPfRS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$252616, %rsp                   # imm = 0x3DAC8
	.cfi_def_cfa_offset 252672
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r14d
	movq	%rdx, %r12
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	leal	1(%r14), %eax
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	leaq	360(%rbx), %r13
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	xorl	%r15d, %r15d
.LBB6_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_3 Depth 2
                                        #     Child Loop BB6_5 Depth 2
	movl	$.L.str.2, %esi
	leaq	64(%rsp), %r14
	movq	%r14, %rdi
	movl	12(%rsp), %edx                  # 4-byte Reload
	movl	%r15d, %ecx
	xorl	%eax, %eax
	callq	sprintf
	movl	$.L.str.3, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %rbp
	testq	%rax, %rax
	jne	.LBB6_2
# %bb.59:                               #   in Loop: Header=BB6_1 Depth=1
	movl	$.L.str.4, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB6_2:                                # %.preheader473
                                        #   in Loop: Header=BB6_1 Depth=1
	xorl	%r14d, %r14d
.LBB6_3:                                #   Parent Loop BB6_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%r14,4), %xmm0
	movl	$.L.str.5, %esi
	movq	%rbp, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB6_3
# %bb.4:                                # %.preheader292
                                        #   in Loop: Header=BB6_1 Depth=1
	xorl	%r14d, %r14d
.LBB6_5:                                #   Parent Loop BB6_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r14,4), %xmm0
	movl	$.L.str.5, %esi
	movq	%rbp, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r14
	cmpq	$90, %r14
	jne	.LBB6_5
# %bb.6:                                #   in Loop: Header=BB6_1 Depth=1
	imulq	$14988, %r15, %rax              # imm = 0x3A8C
	movq	24(%rsp), %rcx                  # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	14492(%rcx,%rax), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	14496(%rcx,%rax), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	14500(%rcx,%rax), %xmm2
	xorps	%xmm3, %xmm3
	cvtss2sd	14504(%rcx,%rax), %xmm3
	movl	$.L.str.6, %esi
	movq	%rbp, %rdi
	movb	$4, %al
	callq	fprintf
	movq	%rbp, %rdi
	callq	fclose
	incq	%r15
	movl	$14988, %eax                    # imm = 0x3A8C
	addq	%rax, %r13
	addq	%rax, %rbx
	cmpq	$819, %r15                      # imm = 0x333
	jne	.LBB6_1
# %bb.7:                                # %.preheader290.preheader
	leaq	20000(%rsp), %r13
	xorl	%ebx, %ebx
	movl	$36036, %edx                    # imm = 0x8CC4
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	154336(%rsp), %r15
	movl	$98280, %edx                    # imm = 0x17FE8
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	16(%rsp), %rdx                  # 8-byte Reload
.LBB6_8:                                # %.preheader286
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_9 Depth 2
	movq	%rdx, %rax
	xorl	%ecx, %ecx
.LBB6_9:                                #   Parent Loop BB6_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%rcx,4)
	incq	%rcx
	addq	$120, %rax
	cmpq	$819, %rcx                      # imm = 0x333
	jne	.LBB6_9
# %bb.10:                               #   in Loop: Header=BB6_8 Depth=1
	incq	%rbx
	addq	$4, %rdx
	addq	$3276, %r15                     # imm = 0xCCC
	cmpq	$30, %rbx
	jne	.LBB6_8
# %bb.11:                               # %.preheader284.preheader
	leaq	56048(%rsp), %rbx
	xorl	%ebp, %ebp
	leaq	6880(%rsp), %r14
	leaq	10160(%rsp), %r15
.LBB6_12:                               # %.preheader284
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_13 Depth 2
                                        #     Child Loop BB6_15 Depth 2
                                        #     Child Loop BB6_17 Depth 2
	imulq	$3276, %rbp, %rax               # imm = 0xCCC
	leaq	(%rsp,%rax), %rsi
	addq	$154336, %rsi                   # imm = 0x25AE0
	movl	$3276, %edx                     # imm = 0xCCC
	movq	%r14, %rdi
	callq	memcpy@PLT
	xorl	%eax, %eax
.LBB6_13:                               #   Parent Loop BB6_12 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%eax, 10160(%rsp,%rax,4)
	incq	%rax
	cmpq	$819, %rax                      # imm = 0x333
	jne	.LBB6_13
# %bb.14:                               #   in Loop: Header=BB6_12 Depth=1
	movq	%r14, %rdi
	movl	$819, %esi                      # imm = 0x333
	movq	%r15, %rdx
	callq	_Z4SortPfiPi
	xorl	%eax, %eax
.LBB6_15:                               #   Parent Loop BB6_12 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	10160(%rsp,%rax,4), %rcx
	incq	%rax
	movl	%eax, 3600(%rsp,%rcx,4)
	cmpq	$819, %rax                      # imm = 0x333
	jne	.LBB6_15
# %bb.16:                               # %.preheader283.preheader
                                        #   in Loop: Header=BB6_12 Depth=1
	xorl	%eax, %eax
.LBB6_17:                               # %.preheader283
                                        #   Parent Loop BB6_12 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ssl	3600(%rsp,%rax,4), %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$819, %rax                      # imm = 0x333
	jne	.LBB6_17
# %bb.18:                               #   in Loop: Header=BB6_12 Depth=1
	incq	%rbp
	addq	$3276, %rbx                     # imm = 0xCCC
	cmpq	$30, %rbp
	jne	.LBB6_12
# %bb.19:                               # %.preheader281.preheader
	leaq	56048(%rsp), %rax
	xorl	%ecx, %ecx
	movss	.LCPI6_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB6_20:                               # %.preheader281
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_21 Depth 2
                                        #       Child Loop BB6_22 Depth 3
	movq	%rax, %rdx
	xorl	%esi, %esi
.LBB6_21:                               # %.preheader280
                                        #   Parent Loop BB6_20 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB6_22 Depth 3
	imulq	$3276, %rsi, %rdi               # imm = 0xCCC
	addq	%rsp, %rdi
	addq	$20000, %rdi                    # imm = 0x4E20
	leaq	(%rdi,%rcx,4), %rdi
	movss	(%rdi), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movq	$-98280, %r8                    # imm = 0xFFFE8018
.LBB6_22:                               #   Parent Loop BB6_20 Depth=1
                                        #     Parent Loop BB6_21 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	addss	98280(%rdx,%r8), %xmm1
	addq	$32760, %r8                     # imm = 0x7FF8
	jne	.LBB6_22
# %bb.23:                               #   in Loop: Header=BB6_21 Depth=2
	divss	%xmm0, %xmm1
	movss	%xmm1, (%rdi)
	incq	%rsi
	addq	$3276, %rdx                     # imm = 0xCCC
	cmpq	$10, %rsi
	jne	.LBB6_21
# %bb.24:                               #   in Loop: Header=BB6_20 Depth=1
	incq	%rcx
	addq	$4, %rax
	cmpq	$819, %rcx                      # imm = 0x333
	jne	.LBB6_20
# %bb.25:                               # %.preheader278.preheader
	xorl	%r14d, %r14d
.LBB6_26:                               # %.preheader278
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_27 Depth 2
	xorps	%xmm0, %xmm0
	movq	$-32760, %rax                   # imm = 0x8008
.LBB6_27:                               #   Parent Loop BB6_26 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addss	32760(%r13,%rax), %xmm0
	addq	$3276, %rax                     # imm = 0xCCC
	jne	.LBB6_27
# %bb.28:                               #   in Loop: Header=BB6_26 Depth=1
	divss	.LCPI6_1(%rip), %xmm0
	movss	%xmm0, 52760(%rsp,%r14,4)
	movss	%xmm0, 320(%rsp,%r14,4)
	incq	%r14
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.7, %edi
	movl	%r14d, %esi
	movb	$1, %al
	callq	printf
	addq	$4, %r13
	cmpq	$819, %r14                      # imm = 0x333
	jne	.LBB6_26
# %bb.29:
	leaq	64(%rsp), %r14
	movl	$.L.str.8, %esi
	movq	%r14, %rdi
	movl	12(%rsp), %edx                  # 4-byte Reload
	xorl	%eax, %eax
	callq	sprintf
	movl	$.L.str.1, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %r14
	testq	%rax, %rax
	jne	.LBB6_30
# %bb.60:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB6_30:                               # %.preheader471
	xorl	%ebx, %ebx
	movq	24(%rsp), %r13                  # 8-byte Reload
.LBB6_31:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	320(%rsp,%rbx,4), %xmm0
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%rbx
	cmpq	$819, %rbx                      # imm = 0x333
	jne	.LBB6_31
# %bb.32:
	movq	%r14, %rdi
	callq	fclose
	movl	$90, %eax
	movss	320(%rsp), %xmm1                # xmm1 = mem[0],zero,zero,zero
.LBB6_33:                               # =>This Inner Loop Header: Depth=1
	movss	(%r13,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$93, %rax
	jne	.LBB6_33
# %bb.34:                               # %.preheader277.preheader
	xorl	%eax, %eax
.LBB6_35:                               # %.preheader277
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r13,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$90, %rax
	jne	.LBB6_35
# %bb.36:
	movss	14492(%r13), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14492(%r12)
	movss	14496(%r13), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14496(%r12)
	movss	14500(%r13), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14500(%r12)
	movss	14504(%r13), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14504(%r12)
	leaq	15348(%r13), %rax
	leaq	14988(%r13), %rcx
	movl	$1, %edx
	movl	$14988, %esi                    # imm = 0x3A8C
.LBB6_37:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_39 Depth 2
                                        #     Child Loop BB6_41 Depth 2
	movss	320(%rsp,%rdx,4), %xmm0         # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB6_43
# %bb.38:                               # %.preheader276.preheader
                                        #   in Loop: Header=BB6_37 Depth=1
	xorl	%edi, %edi
.LBB6_39:                               # %.preheader276
                                        #   Parent Loop BB6_37 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rax,%rdi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 360(%r12,%rdi,4)
	incq	%rdi
	cmpq	$3, %rdi
	jne	.LBB6_39
# %bb.40:                               # %.preheader275
                                        #   in Loop: Header=BB6_37 Depth=1
	xorl	%edi, %edi
.LBB6_41:                               #   Parent Loop BB6_37 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rdi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, (%r12,%rdi,4)
	incq	%rdi
	cmpq	$90, %rdi
	jne	.LBB6_41
# %bb.42:                               #   in Loop: Header=BB6_37 Depth=1
	imulq	$14988, %rdx, %rdi              # imm = 0x3A8C
	movss	14492(%r13,%rdi), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 14492(%r12)
	movss	14496(%r13,%rdi), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 14496(%r12)
	movss	14500(%r13,%rdi), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 14500(%r12)
	movss	14504(%r13,%rdi), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 14504(%r12)
	movaps	%xmm0, %xmm1
.LBB6_43:                               #   in Loop: Header=BB6_37 Depth=1
	incq	%rdx
	addq	%rsi, %rax
	addq	%rsi, %rcx
	cmpq	$819, %rdx                      # imm = 0x333
	jne	.LBB6_37
# %bb.44:
	movss	%xmm1, 16(%rsp)                 # 4-byte Spill
	xorl	%ebx, %ebx
	leaq	64(%rsp), %r14
	movl	$.L.str.10, %esi
	movq	%r14, %rdi
	movl	12(%rsp), %ebp                  # 4-byte Reload
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	sprintf
	movl	$.L.str.3, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %r14
	movl	$.L.str.11, %esi
	movq	%rax, %rdi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	fprintf
.LBB6_45:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	360(%r12,%rbx,4), %xmm0
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%rbx
	cmpq	$3, %rbx
	jne	.LBB6_45
# %bb.46:                               # %.preheader274.preheader
	xorl	%ebx, %ebx
.LBB6_47:                               # %.preheader274
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%rbx,4), %xmm0
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%rbx
	cmpq	$90, %rbx
	jne	.LBB6_47
# %bb.48:
	xorps	%xmm0, %xmm0
	cvtss2sd	14492(%r12), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	14496(%r12), %xmm1
	cvtss2sd	14500(%r12), %xmm2
	cvtss2sd	14504(%r12), %xmm3
	movl	$.L.str.6, %esi
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	movb	$4, %al
	callq	fprintf
	xorps	%xmm0, %xmm0
	cvtss2sd	16(%rsp), %xmm0                 # 4-byte Folded Reload
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movl	$.L.str.12, %edi
	movl	12(%rsp), %ebx                  # 4-byte Reload
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	movl	$.L.str.13, %esi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	%ebx, %edx
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	fprintf
	leaq	320(%rsp), %rsi
	movq	%r13, %rdi
	movq	56(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z19selection_tournmentP6CHROMOPfi
	movq	%r13, %rdi
	callq	_Z9crossoverP6CHROMO
	movq	%r13, %rdi
	callq	_Z8mutationP6CHROMO
	leaq	452(%r13), %rax
	leaq	812(%r13), %rcx
	leaq	824(%r13), %rdx
	xorl	%esi, %esi
	movl	$452, %edi                      # imm = 0x1C4
	movl	$14988, %r8d                    # imm = 0x3A8C
	movq	%r13, %r9
.LBB6_49:                               # %.preheader273
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_50 Depth 2
                                        #       Child Loop BB6_51 Depth 3
                                        #       Child Loop BB6_53 Depth 3
                                        #       Child Loop BB6_55 Depth 3
	imulq	$14988, %rsi, %r10              # imm = 0x3A8C
	leaq	(%r10,%r13), %r11
	addq	$14492, %r11                    # imm = 0x389C
	movq	%rdx, %rbx
	movq	%rcx, %r14
	movq	%rax, %r15
	xorl	%r12d, %r12d
.LBB6_50:                               # %.preheader272
                                        #   Parent Loop BB6_49 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB6_51 Depth 3
                                        #       Child Loop BB6_53 Depth 3
                                        #       Child Loop BB6_55 Depth 3
	xorl	%ebp, %ebp
.LBB6_51:                               #   Parent Loop BB6_49 Depth=1
                                        #     Parent Loop BB6_50 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r9,%rbp,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%rbp,4)
	incq	%rbp
	cmpq	$90, %rbp
	jne	.LBB6_51
# %bb.52:                               # %.preheader271
                                        #   in Loop: Header=BB6_50 Depth=2
	leaq	(%r10,%r13), %rbp
	movq	14508(%rbp,%r12,8), %r13
	movq	%r13, 14748(%rbp,%r12,8)
	xorl	%r13d, %r13d
.LBB6_53:                               # %.preheader270
                                        #   Parent Loop BB6_49 Depth=1
                                        #     Parent Loop BB6_50 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	360(%r9,%r13,4), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r14,%r13,4)
	incq	%r13
	cmpq	$3, %r13
	jne	.LBB6_53
# %bb.54:                               # %.preheader.preheader
                                        #   in Loop: Header=BB6_50 Depth=2
	xorl	%r13d, %r13d
.LBB6_55:                               # %.preheader
                                        #   Parent Loop BB6_49 Depth=1
                                        #     Parent Loop BB6_50 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	$1056964608, (%rbx,%r13,4)      # imm = 0x3F000000
	incq	%r13
	cmpq	$10, %r13
	jne	.LBB6_55
# %bb.56:                               #   in Loop: Header=BB6_50 Depth=2
	movss	(%r11), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14012(%rbp,%r12,4)
	movss	4(%r11), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14132(%rbp,%r12,4)
	movss	8(%r11), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14252(%rbp,%r12,4)
	movss	12(%r11), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 14372(%rbp,%r12,4)
	incq	%r12
	addq	%rdi, %r15
	addq	%rdi, %r14
	addq	%rdi, %rbx
	cmpq	$30, %r12
	movq	24(%rsp), %r13                  # 8-byte Reload
	jne	.LBB6_50
# %bb.57:                               #   in Loop: Header=BB6_49 Depth=1
	incq	%rsi
	addq	%r8, %rax
	addq	%r8, %r9
	addq	%r8, %rcx
	addq	%r8, %rdx
	cmpq	$819, %rsi                      # imm = 0x333
	jne	.LBB6_49
# %bb.58:
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	fclose
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	fclose
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addq	$252616, %rsp                   # imm = 0x3DAC8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z11my_functionP6CHROMOPfRS_i, .Lfunc_end6-_Z11my_functionP6CHROMOPfRS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION # -- Begin function _Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.type	_Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION,@function
_Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION: # @_Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION, .Lfunc_end7-_Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$30056, %rsp                    # imm = 0x7568
	.cfi_def_cfa_offset 30112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$12275172, %edi                 # imm = 0xBB4DE4
	callq	malloc
	movq	%rax, %r14
	movl	$19656000, %edi                 # imm = 0x12BED40
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$39312000, %edi                 # imm = 0x257DA80
	callq	malloc
	movq	%rax, %r15
	movl	$39312000, %edi                 # imm = 0x257DA80
	callq	malloc
	movq	%rax, 8(%rsp)
	movl	$98280, %edi                    # imm = 0x17FE8
	callq	malloc
	movq	%rax, %r12
	movl	$.L.str.14, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$.L.str.15, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbp
	movq	%rbx, 64(%rsp)                  # 8-byte Spill
	testq	%rbx, %rbx
	je	.LBB8_2
# %bb.1:
	testq	%rbp, %rbp
	jne	.LBB8_3
.LBB8_2:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.L.str.17, %edi
	callq	system
.LBB8_3:                                # %.preheader105.preheader
	movabsq	$4294967328, %r13               # imm = 0x100000020
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	$98280, %edx                    # imm = 0x17FE8
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$19656000, %edx                 # imm = 0x12BED40
	movq	32(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$39312000, %edx                 # imm = 0x257DA80
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r14, %rdi
	callq	_Z14initial_chromoP6CHROMO
	leaq	80(%rsp), %rdi
	callq	_Z14initial_chromoR6CHROMO
	leaq	15068(%rsp), %rdi
	callq	_Z14initial_chromoR6CHROMO
	movl	$1, %edi
	callq	hipSetDevice
	leaq	736(%r13), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
	xorl	%r13d, %r13d
.LBB8_4:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_14 Depth 2
                                        #     Child Loop BB8_16 Depth 2
                                        #     Child Loop BB8_8 Depth 2
                                        #     Child Loop BB8_10 Depth 2
	movl	$98280, %esi                    # imm = 0x17FE8
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	movl	$12275172, %esi                 # imm = 0xBB4DE4
	leaq	48(%rsp), %rdi
	callq	hipMalloc
	movl	$19656000, %esi                 # imm = 0x12BED40
	leaq	40(%rsp), %rdi
	callq	hipMalloc
	movl	$39312000, %esi                 # imm = 0x257DA80
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	movq	48(%rsp), %rdi
	movl	$12275172, %edx                 # imm = 0xBB4DE4
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movl	$98280, %edx                    # imm = 0x17FE8
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	movl	$19656000, %edx                 # imm = 0x12BED40
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$39312000, %edx                 # imm = 0x257DA80
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967328, %rdi               # imm = 0x100000020
	movl	$1, %esi
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_6
# %bb.5:                                #   in Loop: Header=BB8_4 Depth=1
	movq	48(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
.LBB8_6:                                #   in Loop: Header=BB8_4 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rsi
	movl	$98280, %edx                    # imm = 0x17FE8
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$39312000, %edx                 # imm = 0x257DA80
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	movq	%r12, %rsi
	leaq	80(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z11my_functionP6CHROMOPfRS_i
	testl	%ebx, %ebx
	je	.LBB8_7
# %bb.12:                               #   in Loop: Header=BB8_4 Depth=1
	movss	60(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB8_19
# %bb.13:                               # %.preheader101.preheader
                                        #   in Loop: Header=BB8_4 Depth=1
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	xorl	%r13d, %r13d
.LBB8_14:                               # %.preheader101
                                        #   Parent Loop BB8_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	440(%rsp,%r13,4), %xmm0         # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 15428(%rsp,%r13,4)
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.5, %esi
	movq	%rbp, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r13
	cmpq	$3, %r13
	jne	.LBB8_14
# %bb.15:                               # %.preheader100.preheader
                                        #   in Loop: Header=BB8_4 Depth=1
	xorl	%r13d, %r13d
.LBB8_16:                               # %.preheader100
                                        #   Parent Loop BB8_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	80(%rsp,%r13,4), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 15068(%rsp,%r13,4)
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.5, %esi
	movq	%rbp, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r13
	cmpq	$90, %r13
	jne	.LBB8_16
# %bb.17:                               #   in Loop: Header=BB8_4 Depth=1
	movl	%ebx, %r13d
	jmp	.LBB8_18
.LBB8_7:                                # %.preheader99.preheader
                                        #   in Loop: Header=BB8_4 Depth=1
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	xorl	%r13d, %r13d
.LBB8_8:                                # %.preheader99
                                        #   Parent Loop BB8_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	440(%rsp,%r13,4), %xmm0         # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 15428(%rsp,%r13,4)
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.5, %esi
	movq	%rbp, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r13
	cmpq	$3, %r13
	jne	.LBB8_8
# %bb.9:                                # %.preheader.preheader
                                        #   in Loop: Header=BB8_4 Depth=1
	xorl	%r13d, %r13d
.LBB8_10:                               # %.preheader
                                        #   Parent Loop BB8_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	80(%rsp,%r13,4), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 15068(%rsp,%r13,4)
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.5, %esi
	movq	%rbp, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r13
	cmpq	$90, %r13
	jne	.LBB8_10
# %bb.11:                               #   in Loop: Header=BB8_4 Depth=1
	xorl	%r13d, %r13d
.LBB8_18:                               # %.sink.split
                                        #   in Loop: Header=BB8_4 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	14572(%rsp), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	14576(%rsp), %xmm1
	cvtss2sd	14580(%rsp), %xmm2
	cvtss2sd	14584(%rsp), %xmm3
	movl	$.L.str.6, %esi
	movq	%rbp, %rdi
	movb	$4, %al
	callq	fprintf
	movss	16(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
.LBB8_19:                               #   in Loop: Header=BB8_4 Depth=1
	movss	%xmm1, 60(%rsp)                 # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$.L.str.18, %edi
	movb	$1, %al
	callq	printf
	leal	1(%r13), %edx
	movl	$.L.str.19, %esi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	fprintf
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	incl	%ebx
	cmpl	$200, %ebx
	jne	.LBB8_4
# %bb.20:
	movq	%rbp, %rdi
	callq	fclose
	movq	64(%rsp), %rdi                  # 8-byte Reload
	callq	fclose
	movq	%r14, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$30056, %rsp                    # imm = 0x7568
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"temp_result.txt"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"a"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"NN/g%d/ch_%d.txt"
	.size	.L.str.2, 17

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"w"
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n Error: Cannot open ch_%d filoe \n"
	.size	.L.str.4, 35

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%f\n"
	.size	.L.str.5, 4

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"A:%f\n B:%f\n C:%f\n D:%f\n"
	.size	.L.str.6, 24

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"the %dth chromosome in all function's avg ranking is :%f \n"
	.size	.L.str.7, 59

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"NN/g%d/GA_fitness.txt"
	.size	.L.str.8, 22

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"NN/g%d/temp_bestch.txt"
	.size	.L.str.10, 23

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"g=%d,the best chromosome:\n"
	.size	.L.str.11, 27

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"the generation %d min ranking is:%f \n"
	.size	.L.str.12, 38

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"g=%d,the best:%f\n"
	.size	.L.str.13, 18

	.type	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION,@object # @_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.p2align	3, 0x0
_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION:
	.quad	_Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.size	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION, 8

	.type	.L.str.14,@object               # @.str.14
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.14:
	.asciz	"GA200results.txt"
	.size	.L.str.14, 17

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"history_bestch.txt"
	.size	.L.str.15, 19

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"pause"
	.size	.L.str.17, 6

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"the history min ranking is:%f \n"
	.size	.L.str.18, 32

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"history best is in g=%d:%f\n"
	.size	.L.str.19, 28

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION"
	.size	.L__unnamed_1, 47

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n Error: Cannot open GA_fitness file  "
	.size	.Lstr, 39

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"failed to open f file"
	.size	.Lstr.1, 22

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function _Z9benchmarkiPA2_fi
	.type	_Z9benchmarkiPA2_fi,@function
_Z9benchmarkiPA2_fi:                    ; @_Z9benchmarkiPA2_fi
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_or_saveexec_b32 s0, -1
	s_clause 0x1
	scratch_store_b32 off, v40, s32
	; meta instruction
	scratch_store_b32 off, v41, s32 offset:4
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v40, s34, 0
	v_writelane_b32 v40, s35, 1
	v_writelane_b32 v40, s36, 2
	v_writelane_b32 v40, s37, 3
	v_writelane_b32 v40, s38, 4
	v_writelane_b32 v40, s39, 5
	v_writelane_b32 v40, s40, 6
	v_writelane_b32 v40, s41, 7
	v_writelane_b32 v40, s42, 8
	v_writelane_b32 v40, s43, 9
	v_writelane_b32 v40, s44, 10
	v_writelane_b32 v40, s45, 11
	v_writelane_b32 v40, s46, 12
	v_writelane_b32 v40, s47, 13
	v_writelane_b32 v40, s48, 14
	v_writelane_b32 v40, s49, 15
	v_writelane_b32 v40, s50, 16
	v_writelane_b32 v40, s51, 17
	v_writelane_b32 v40, s52, 18
	v_writelane_b32 v40, s53, 19
	v_writelane_b32 v40, s54, 20
	v_writelane_b32 v40, s55, 21
	v_writelane_b32 v40, s56, 22
	v_writelane_b32 v40, s57, 23
	v_writelane_b32 v40, s58, 24
	v_writelane_b32 v40, s59, 25
	v_writelane_b32 v40, s60, 26
	v_writelane_b32 v40, s61, 27
	v_writelane_b32 v40, s62, 28
	v_writelane_b32 v40, s63, 29
	v_writelane_b32 v40, s64, 30
	v_writelane_b32 v40, s65, 31
	v_writelane_b32 v41, s66, 0
	v_writelane_b32 v41, s30, 1
	v_writelane_b32 v41, s31, 2
	v_mov_b32_e32 v5, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_mov_b32 s42, 0
	s_mov_b32 s60, 0
                                        ; implicit-def: $vgpr0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 3, v5
	s_xor_b32 s43, exec_lo, s0
	s_cbranch_execz .LBB0_28
; %bb.1:                                ; %NodeBlock283
	s_mov_b32 s0, 0
                                        ; implicit-def: $vgpr0
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e32 5, v5
	s_xor_b32 s44, exec_lo, s1
	s_cbranch_execz .LBB0_21
; %bb.2:                                ; %NodeBlock281
	s_mov_b32 s2, 0
                                        ; implicit-def: $vgpr0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 6, v5
	s_xor_b32 s45, exec_lo, s0
	s_cbranch_execz .LBB0_16
; %bb.3:                                ; %NodeBlock279
	s_mov_b32 s0, 0
                                        ; implicit-def: $vgpr0
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e32 7, v5
	s_xor_b32 s46, exec_lo, s1
	s_cbranch_execz .LBB0_13
; %bb.4:                                ; %LeafBlock277
	s_mov_b32 s0, -1
	s_mov_b32 s47, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_eq_u32_e32 8, v5
	s_cbranch_execz .LBB0_12
; %bb.5:                                ; %.preheader190.preheader
	v_lshlrev_b64 v[6:7], 3, v[3:4]
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v14, 0
	v_mov_b32_e32 v15, 0
	s_mov_b32 s1, 0
	s_mov_b32 s4, 0x54442d18
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v1, v6
	v_add_co_ci_u32_e32 v13, vcc_lo, v2, v7, vcc_lo
	s_mov_b32 s8, 0x6dc9c883
	s_mov_b32 s10, 0x33145c00
	s_mov_b32 s12, 0x252049c0
	s_mov_b32 s14, 0x9037ab78
	s_mov_b32 s16, 0x46cc5e42
	s_mov_b32 s18, 0xa17f65f6
	s_mov_b32 s20, 0x19f4ec90
	s_mov_b32 s22, 0x16c16967
	s_mov_b32 s24, 0x55555555
	s_mov_b32 s26, 0xb42fdfa7
	s_mov_b32 s28, 0xf9a43bb8
	s_mov_b32 s30, 0x796cde01
	s_mov_b32 s34, 0x19e83e5c
	s_mov_b32 s36, 0x11110bb3
	s_mov_b32 s48, -1
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s7, 0x3c91a626
	s_mov_b32 s9, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	s_mov_b32 s13, 0xb97b839a
	s_mov_b32 s15, 0x3e21eeb6
	s_mov_b32 s17, 0xbda907db
	s_mov_b32 s19, 0xbe927e4f
	s_mov_b32 s21, 0x3efa01a0
	s_mov_b32 s23, 0xbf56c16c
	s_mov_b32 s25, 0x3fa55555
	s_mov_b32 s27, 0xbe5ae600
	s_mov_b32 s29, 0x3de5e0b2
	s_mov_b32 s31, 0x3ec71de3
	s_mov_b32 s35, 0xbf2a01a0
	s_mov_b32 s37, 0x3f811111
	s_mov_b32 s38, 0x33145c07
	s_mov_b32 s41, 0xbfc55555
	s_mov_b32 s0, s1
.LBB0_6:                                ; %.preheader190
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_add_i32 s2, s0, 1
	s_lshl_b64 s[50:51], s[0:1], 2
	v_cvt_f64_i32_e32 v[6:7], s2
	s_mov_b32 s2, exec_lo
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[6:7]
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v8, 8, v8
	v_ldexp_f64 v[6:7], v[6:7], v8
	v_add_co_u32 v8, s0, v0, s50
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s51, v13, s0
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s0, 0xffffff80, 0
	flat_load_b32 v16, v[8:9]
	v_rsq_f64_e32 v[8:9], v[6:7]
	v_cmp_class_f64_e64 vcc_lo, v[6:7], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[10:11], v[6:7], v[8:9]
	v_mul_f64 v[8:9], v[8:9], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[8:9], v[10:11], 0.5
	v_fma_f64 v[10:11], v[10:11], v[17:18], v[10:11]
	v_fma_f64 v[8:9], v[8:9], v[17:18], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[10:11], v[10:11], v[6:7]
	v_fma_f64 v[10:11], v[17:18], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[10:11], v[10:11], v[6:7]
	v_fma_f64 v[8:9], v[17:18], v[8:9], v[10:11]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cvt_f64_f32_e32 v[10:11], v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[8:9], v[8:9], s0
	v_dual_cndmask_b32 v7, v9, v7 :: v_dual_cndmask_b32 v6, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[8:9], null, v[6:7], v[6:7], v[10:11]
	v_rcp_f64_e32 v[17:18], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[19:20], -v[8:9], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	v_fma_f64 v[19:20], -v[8:9], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	v_div_scale_f64 v[19:20], vcc_lo, v[10:11], v[6:7], v[10:11]
	v_mul_f64 v[21:22], v[19:20], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[8:9], v[21:22], v[19:20]
	v_div_fmas_f64 v[8:9], v[8:9], v[17:18], v[21:22]
                                        ; implicit-def: $vgpr17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[7:8], v[8:9], v[6:7], v[10:11]
                                        ; implicit-def: $vgpr9_vgpr10
                                        ; implicit-def: $vgpr11_vgpr12
	v_cmpx_ngt_f64_e64 0x41d00000, |v[7:8]|
	s_xor_b32 s6, exec_lo, s2
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	v_ldexp_f64 v[9:10], |v[7:8]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[7:8]|
	v_trig_preop_f64 v[11:12], |v[7:8]|, 0
	v_and_b32_e32 v6, 0x7fffffff, v8
	v_trig_preop_f64 v[17:18], |v[7:8]|, 1
	v_trig_preop_f64 v[27:28], |v[7:8]|, 2
	s_mov_b32 s2, s4
	s_mov_b32 s39, s7
	v_dual_cndmask_b32 v9, v7, v9 :: v_dual_cndmask_b32 v10, v6, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[19:20], v[11:12], v[9:10]
	v_mul_f64 v[21:22], v[17:18], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[11:12], v[9:10], -v[19:20]
	v_fma_f64 v[17:18], v[17:18], v[9:10], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[21:22], v[11:12]
	v_add_f64 v[25:26], v[23:24], -v[21:22]
	v_add_f64 v[31:32], v[19:20], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[23:24], -v[25:26]
	v_add_f64 v[11:12], v[11:12], -v[25:26]
	v_ldexp_f64 v[25:26], v[31:32], -2
	v_add_f64 v[19:20], v[31:32], -v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[21:22], -v[29:30]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[25:26]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[23:24], -v[19:20]
	v_add_f64 v[11:12], v[11:12], v[21:22]
	v_fract_f64_e32 v[21:22], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v21, 0, v21, vcc_lo
	v_mul_f64 v[33:34], v[27:28], v[9:10]
	v_cndmask_b32_e32 v22, 0, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[21:22], v[21:22], 2
	v_add_f64 v[29:30], v[33:34], v[17:18]
	v_fma_f64 v[9:10], v[27:28], v[9:10], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[29:30], v[11:12]
	v_add_f64 v[25:26], v[19:20], v[23:24]
	v_add_f64 v[35:36], v[23:24], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[25:26], v[21:22]
	v_add_f64 v[50:51], v[23:24], -v[35:36]
	v_add_f64 v[11:12], v[11:12], -v[35:36]
	v_add_f64 v[19:20], v[25:26], -v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[31:32]
	v_add_f64 v[31:32], v[29:30], -v[33:34]
	v_cndmask_b32_e64 v6, 0, 0x40100000, vcc_lo
	v_add_f64 v[48:49], v[29:30], -v[31:32]
	v_add_f64 v[17:18], v[17:18], -v[31:32]
	v_add_f64 v[29:30], v[29:30], -v[50:51]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[21:22], v[5:6]
	v_add_f64 v[31:32], v[33:34], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], v[29:30]
	v_add_f64 v[37:38], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[31:32]
	v_cvt_i32_f64_e32 v6, v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[17:18], v[11:12]
	v_add_f64 v[17:18], v[23:24], -v[19:20]
	v_cvt_f64_i32_e32 v[35:36], v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[21:22], v[21:22], -v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[17:18], v[9:10]
	v_add_f64 v[27:28], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[27:28], -v[21:22]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[27:28]
	v_add_f64 v[11:12], v[25:26], -v[11:12]
	v_add_co_ci_u32_e64 v17, s0, 0, v6, vcc_lo
	v_cndmask_b32_e64 v6, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[11:12], v[27:28], -v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[11:12], v[9:10]
	v_mul_f64 v[20:21], v[18:19], s[2:3]
	v_add_f64 v[11:12], v[18:19], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], s[2:3], -v[20:21]
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[18:19], s[38:39], v[22:23]
	v_fma_f64 v[11:12], v[9:10], s[2:3], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[20:21], v[11:12]
	v_add_f64 v[18:19], v[9:10], -v[20:21]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[18:19]
.LBB0_8:                                ; %Flow
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_and_not1_saveexec_b32 s0, s6
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_6 Depth=1
	v_mul_f64 v[9:10], |v[7:8]|, s[8:9]
	s_mov_b32 s6, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[17:18], v[9:10]
	v_fma_f64 v[9:10], v[17:18], s[4:5], |v[7:8]|
	v_mul_f64 v[11:12], v[17:18], s[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[17:18], s[10:11], v[9:10]
	v_add_f64 v[19:20], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], -v[19:20]
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_fma_f64 v[11:12], v[17:18], s[6:7], v[11:12]
	v_add_f64 v[9:10], v[19:20], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_fma_f64 v[11:12], v[17:18], s[12:13], v[9:10]
	v_cvt_i32_f64_e32 v17, v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[21:22], v[11:12]
	v_add_f64 v[19:20], v[9:10], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[19:20]
.LBB0_10:                               ; %_ZL3cosd.exit176
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[18:19], v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[28:29], v[11:12], 0.5
	s_mov_b32 s40, s24
	v_cmp_class_f64_e64 s0, v[7:8], 0x1f8
	s_xor_b32 s2, s48, -1
	s_mov_b32 s48, 0
	v_fmac_f32_e32 v15, v16, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[20:21], v[18:19], s[28:29], s[26:27]
	v_mul_f64 v[24:25], v[18:19], 0.5
	v_fma_f64 v[22:23], v[18:19], s[16:17], s[14:15]
	v_mul_f64 v[30:31], v[9:10], -v[18:19]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], -v[24:25], 1.0
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[34:35]
	v_add_f64 v[32:33], -v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[20:21]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[32:33], -v[24:25]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[30:31], v[20:21], v[28:29]
	v_fma_f64 v[24:25], v[9:10], -v[11:12], v[24:25]
	v_mul_f64 v[28:29], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[24:25]
	v_fma_f64 v[11:12], v[18:19], v[20:21], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[28:29], v[22:23], v[24:25]
	v_fma_f64 v[11:12], v[30:31], s[40:41], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[26:27], v[18:19]
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_and_b32_e32 v6, 1, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	v_cvt_f64_f32_e32 v[6:7], v14
	v_cndmask_b32_e32 v9, v9, v18, vcc_lo
	v_xor_b32_e32 v8, 0x80000000, v10
	v_lshlrev_b32_e32 v10, 30, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v8, v8, v19, vcc_lo
	v_and_b32_e32 v10, 0x80000000, v10
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v10, v8, v10
	v_cndmask_b32_e64 v8, 0, v9, s0
	v_cndmask_b32_e64 v9, 0x7ff80000, v10, s0
	s_mov_b32 s0, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[6:7], v[8:9]
	v_cvt_f32_f64_e32 v14, v[6:7]
	s_cbranch_vccnz .LBB0_6
; %bb.11:
	v_cvt_f64_f32_e32 v[5:6], v15
	s_xor_b32 s0, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[7:8], null, 0x40af4000, 0x40af4000, v[5:6]
	v_div_scale_f64 v[15:16], vcc_lo, v[5:6], 0x40af4000, v[5:6]
	v_rcp_f64_e32 v[9:10], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_mul_f64 v[11:12], v[15:16], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], -v[7:8], v[11:12], v[15:16]
	v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[5:6], v[7:8], 0x40af4000, v[5:6]
	v_cvt_f64_f32_e32 v[7:8], v14
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], 1.0
	v_cvt_f32_f64_e32 v0, v[5:6]
.LBB0_12:                               ; %Flow305
	s_or_b32 exec_lo, exec_lo, s47
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB0_13:                               ; %Flow304
	s_and_not1_saveexec_b32 s1, s46
	s_cbranch_execz .LBB0_15
; %bb.14:                               ; %.preheader188
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v1, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, v2, v6, vcc_lo
	flat_load_b32 v0, v[5:6] offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v0, v0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v0, v0, v0
.LBB0_15:                               ; %Flow306
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s0, exec_lo
.LBB0_16:                               ; %Flow303
	s_and_not1_saveexec_b32 s3, s45
	s_cbranch_execz .LBB0_20
; %bb.17:                               ; %.preheader186.preheader
	v_lshlrev_b64 v[6:7], 3, v[3:4]
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v0, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s5, -1
	s_mov_b32 s4, 0x3e76c4e1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v1, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v2, v7, vcc_lo
.LBB0_18:                               ; %.preheader186
                                        ; =>This Inner Loop Header: Depth=1
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v8, vcc_lo, v6, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v7, vcc_lo
	flat_load_b32 v12, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_frexp_mant_f32_e64 v8, |v12|
	v_frexp_exp_i32_f32_e32 v9, v12
	v_cmp_neq_f32_e64 s0, 0x7f800000, |v12|
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v8
	v_cndmask_b32_e64 v10, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f32 v8, v8, v10
	v_cvt_f32_i32_e32 v9, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v10, 1.0, v8 :: v_dual_mul_f32 v15, 0x3f317218, v9
	v_dual_add_f32 v11, -1.0, v8 :: v_dual_add_f32 v14, -1.0, v10
	v_rcp_f32_e32 v13, v10
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, v11, v13
	v_sub_f32_e32 v8, v8, v14
	v_fma_f32 v14, 0x3f317218, v9, -v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v14, 0xb102e308, v9 :: v_dual_mul_f32 v9, v10, v16
	v_fma_f32 v10, v16, v10, -v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v16, v8
	v_add_f32_e32 v8, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v18, v11, v8 :: v_dual_sub_f32 v9, v8, v9
	v_sub_f32_e32 v11, v11, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v9, v10 :: v_dual_sub_f32 v8, v11, v8
	v_dual_add_f32 v17, v15, v14 :: v_dual_add_f32 v8, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v18, v8
	v_mul_f32_e32 v8, v13, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v16, v8
	v_sub_f32_e32 v10, v9, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v11, v9, v9 :: v_dual_sub_f32 v8, v8, v10
	v_fma_f32 v10, v9, v9, -v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v16, v8, v8
	v_fmac_f32_e32 v10, v9, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v16, v11, v10
	v_ldexp_f32 v13, v9, 1
	v_dual_sub_f32 v11, v16, v11 :: v_dual_mul_f32 v20, v9, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v19, s4, v16, 0x3e91f4c4 :: v_dual_sub_f32 v10, v10, v11
	v_fma_f32 v11, v16, v9, -v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v19, v16, v19, 0x3ecccdef
	v_fmac_f32_e32 v11, v16, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v21, v16, v19
	v_fmac_f32_e32 v11, v10, v9
	v_ldexp_f32 v18, v8, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v8, v16, v19, -v21
	v_add_f32_e32 v9, v20, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v16, v9, v20
	v_dual_fmac_f32 v8, v10, v19 :: v_dual_sub_f32 v11, v11, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v21, v8
	v_dual_sub_f32 v19, v10, v21 :: v_dual_add_f32 v20, 0x3f2aaaaa, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v8, v8, v19
	v_add_f32_e32 v16, 0xbf2aaaaa, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v8, 0x31739010, v8
	v_sub_f32_e32 v10, v10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v8, v10
	v_add_f32_e32 v10, v20, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v16, v20, v10
	v_dual_mul_f32 v19, v9, v10 :: v_dual_add_f32 v8, v8, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, v9, v10, -v19
	v_fmac_f32_e32 v16, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v11, v10
	v_add_f32_e32 v8, v19, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v9, v13, v8 :: v_dual_sub_f32 v10, v8, v19
	v_dual_sub_f32 v11, v9, v13 :: v_dual_sub_f32 v10, v16, v10
	v_sub_f32_e32 v13, v17, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v8, v8, v11
	v_add_f32_e32 v10, v18, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v13, v14, v13
	v_add_f32_e32 v8, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v9, v8
	v_add_f32_e32 v11, v17, v10
	v_sub_f32_e32 v9, v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v14, v11, v17
	v_dual_sub_f32 v8, v8, v9 :: v_dual_sub_f32 v15, v11, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v9, v10, v14 :: v_dual_add_f32 v14, v13, v8
	v_sub_f32_e32 v10, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v9, v9, v10 :: v_dual_sub_f32 v10, v14, v13
	v_add_f32_e32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v14, v14, v10
	v_dual_sub_f32 v8, v8, v10 :: v_dual_add_f32 v15, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v13, v14 :: v_dual_sub_f32 v11, v15, v11
	v_dual_add_f32 v8, v8, v10 :: v_dual_sub_f32 v9, v9, v11
	v_cvt_f64_f32_e32 v[10:11], v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v13, v8, v9
	v_cvt_f64_f32_e32 v[8:9], v5
	v_add_f32_e32 v5, v15, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v14, v5, v15
	v_add_f32_e32 v15, v5, v5
	v_dual_mul_f32 v16, 0, v5 :: v_dual_sub_f32 v13, v13, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v5, v5, 2.0, -v15
	v_cmp_class_f32_e64 vcc_lo, v15, 0x204
	v_fmac_f32_e32 v16, 2.0, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v5, v16
	v_add_f32_e32 v13, v15, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v14, v13, v15, vcc_lo
	v_sub_f32_e32 v13, v13, v15
	v_fma_f64 v[8:9], v[10:11], 0.5, v[8:9]
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v13, v5, v13
	v_cndmask_b32_e64 v16, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v14|
	v_sub_f32_e32 v10, v14, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, 0x3fb8aa3b, v10
	v_fma_f32 v17, 0x3fb8aa3b, v10, -v11
	v_rndne_f32_e32 v18, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v17, 0x32a5705f, v10
	v_sub_f32_e32 v11, v11, v18
	v_cvt_i32_f32_e32 v15, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v11, v17
	v_exp_f32_e32 v11, v11
	v_cvt_f32_f64_e32 v5, v[8:9]
	v_cndmask_b32_e32 v8, 0, v13, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v16, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v11, v11, v15
	v_cndmask_b32_e32 v9, 0, v11, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v9, 0x7f800000, v9, vcc_lo
	v_fma_f32 v8, v9, v8, v9
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v8, v8, v9, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v12
	v_cndmask_b32_e64 v8, 0x7f800000, |v8|, s0
	s_mov_b64 s[0:1], 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	s_and_b32 vcc_lo, exec_lo, s5
	s_mov_b32 s5, 0
	v_add_f32_e32 v0, v0, v8
	s_cbranch_vccnz .LBB0_18
; %bb.19:
	v_frexp_mant_f32_e64 v6, |v5|
	s_mov_b32 s0, 0x3e76c4e1
	v_cmp_class_f32_e64 s1, v5, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v6
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_ldexp_f32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, -1.0, v6
	v_add_f32_e32 v7, 1.0, v6
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v10, v9, v8 :: v_dual_add_f32 v11, -1.0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v12, v7, v10
	v_sub_f32_e32 v6, v6, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, v10, v7, -v12
	v_fmac_f32_e32 v7, v10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v12, v7
	v_dual_sub_f32 v11, v9, v6 :: v_dual_sub_f32 v12, v6, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v7, v12, v7
	v_sub_f32_e32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v9, v6
	v_add_f32_e32 v6, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v11, v6
	v_mul_f32_e32 v6, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v10, v6
	v_mul_f32_e32 v9, v7, v7
	v_sub_f32_e32 v8, v7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v6, v6, v8
	v_fma_f32 v8, v7, v7, -v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v6, v6
	v_fmac_f32_e32 v8, v7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v9, v8
	v_fmaak_f32 v11, s0, v10, 0x3e91f4c4
	v_sub_f32_e32 v9, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v11, v10, v11, 0x3ecccdef :: v_dual_sub_f32 v8, v8, v9
	v_mul_f32_e32 v12, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, v10, v11, -v12
	v_dual_fmac_f32 v9, v8, v11 :: v_dual_mul_f32 v14, v7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v11, v12, v9
	v_fma_f32 v15, v10, v7, -v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v12, v11, v12 :: v_dual_fmac_f32 v15, v10, v6
	v_add_f32_e32 v13, 0x3f2aaaaa, v11
	v_ldexp_f32 v6, v6, 1
	v_sub_f32_e32 v9, v9, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v15, v8, v7
	v_ldexp_f32 v7, v7, 1
	v_add_f32_e32 v9, 0x31739010, v9
	v_add_f32_e32 v12, 0xbf2aaaaa, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v11, v12
	v_add_f32_e32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v13, v9
	v_dual_add_f32 v10, v14, v15 :: v_dual_sub_f32 v11, v13, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v12, v10, v8
	v_sub_f32_e32 v13, v10, v14
	v_add_f32_e32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v11, v10, v8, -v12
	v_sub_f32_e32 v13, v15, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, v10, v9
	v_frexp_exp_i32_f32_e32 v9, v5
	v_fmac_f32_e32 v11, v13, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e32 v8, vcc_lo, 0, v9, vcc_lo
	v_add_f32_e32 v9, v12, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v8, v8
	v_sub_f32_e32 v12, v9, v12
	v_add_f32_e32 v10, v7, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v11, v12
	v_dual_mul_f32 v13, 0x3f317218, v8 :: v_dual_add_f32 v6, v6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, 0x3f317218, v8, -v13
	v_dual_fmamk_f32 v8, v8, 0xb102e308, v12 :: v_dual_sub_f32 v7, v10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v9, v7
	v_dual_add_f32 v6, v6, v7 :: v_dual_add_f32 v7, v13, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v9, v10, v6
	v_sub_f32_e32 v13, v7, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v8, v8, v13
	v_add_f32_e32 v11, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v12, v11, v7
	v_sub_f32_e32 v10, v9, v10
	v_sub_f32_e32 v14, v11, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v6, v6, v10 :: v_dual_sub_f32 v9, v9, v12
	v_sub_f32_e32 v7, v7, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v10, v8, v6 :: v_dual_add_f32 v7, v9, v7
	v_sub_f32_e32 v9, v10, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v10, v7
	v_sub_f32_e32 v10, v10, v9
	v_sub_f32_e32 v6, v6, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v8, v8, v10
	v_add_f32_e32 v12, v11, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v6, v6, v8 :: v_dual_sub_f32 v9, v12, v11
	v_sub_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v6, v7
	v_add_f32_e32 v7, v12, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v8, v7, v12
	v_add_f32_e32 v9, v7, v7
	v_mul_f32_e32 v10, 0, v7
	v_sub_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v8, v7, 2.0, -v9
	v_cmp_class_f32_e64 vcc_lo, v9, 0x204
	v_fma_f32 v11, 2.0, v6, v10
	v_fmac_f32_e32 v10, 4.0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v8, v11
	v_add_f32_e32 v6, v9, v8
	v_mul_f32_e32 v12, 4.0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, v7, 4.0, -v12
	v_dual_add_f32 v7, v7, v10 :: v_dual_cndmask_b32 v10, v6, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v10
	v_cndmask_b32_e64 v13, 0, 0x37000000, vcc_lo
	v_sub_f32_e32 v15, v10, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v11, v12, v7
	v_cmp_class_f32_e64 vcc_lo, v12, 0x204
	v_dual_mul_f32 v17, 0x3fb8aa3b, v15 :: v_dual_cndmask_b32 v14, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v19, 0x3fb8aa3b, v15, -v17
	v_rndne_f32_e32 v20, v17
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v14
	v_cndmask_b32_e64 v16, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v10|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v18, v14, v16
	v_dual_sub_f32 v6, v6, v9 :: v_dual_sub_f32 v17, v17, v20
	v_mul_f32_e32 v21, 0x3fb8aa3b, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v6, v8, v6
	v_fma_f32 v22, 0x3fb8aa3b, v18, -v21
	v_fmac_f32_e32 v19, 0x32a5705f, v15
	v_rndne_f32_e32 v23, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v6, 0, v6 :: v_dual_sub_f32 v11, v11, v12
	v_dual_fmac_f32 v22, 0x32a5705f, v18 :: v_dual_add_f32 v17, v17, v19
	s_delay_alu instid0(VALU_DEP_3)
	v_sub_f32_e32 v19, v21, v23
	v_cvt_i32_f32_e32 v12, v20
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v15
	v_add_f32_e32 v6, v13, v6
	v_exp_f32_e32 v17, v17
	v_add_f32_e32 v9, v19, v22
	v_sub_f32_e32 v7, v7, v11
	v_cvt_i32_f32_e32 v10, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v8, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v17, v12
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v14|
	v_ldexp_f32 v8, v8, v10
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v16, v7
	v_cndmask_b32_e32 v9, 0x7f800000, v9, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v18
	v_fma_f32 v6, v9, v6, v9
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v18
	v_cmp_eq_f32_e64 s0, 0x7f800000, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v8, 0x7f800000, v8, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e64 v6, v6, v9, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f32 v7, v8, v7, v8
	v_cndmask_b32_e64 v5, 0x7f800000, 0, vcc_lo
	s_or_b32 s0, vcc_lo, s1
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v8
	v_cndmask_b32_e64 v6, |v6|, v5, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v7, v8 :: v_dual_add_f32 v0, v0, v6
	v_cndmask_b32_e64 v5, |v7|, v5, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v5, v0
.LBB0_20:                               ; %Flow307
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s2, exec_lo
                                        ; implicit-def: $vgpr5
.LBB0_21:                               ; %Flow302
	s_and_not1_saveexec_b32 s1, s44
	s_cbranch_execz .LBB0_27
; %bb.22:                               ; %NodeBlock275
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_lt_i32_e32 4, v5
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_24
; %bb.23:                               ; %.preheader185
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v1, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, v2, v6, vcc_lo
	flat_load_b64 v[5:6], v[5:6]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cvt_f64_f32_e32 v[6:7], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], 0x412e8480, v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[6:7], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[6:7]
	v_fmac_f32_e32 v0, v5, v5
.LBB0_24:                               ; %Flow288
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_26
; %bb.25:                               ; %.preheader183
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v1, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, v2, v6, vcc_lo
	flat_load_b64 v[5:6], v[5:6]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f32 v0, v5, v5, -v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[6:7], v0
	v_add_f32_e32 v0, -1.0, v5
	v_mul_f32_e32 v0, v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_f64_f32_e32 v[10:11], v0
	v_mul_f64 v[8:9], 0x40590000, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[8:9], v[6:7], v[10:11]
	v_cvt_f32_f64_e32 v0, v[5:6]
.LBB0_26:                               ; %Flow289
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_27:                               ; %Flow308
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_and_b32 s60, s0, exec_lo
                                        ; implicit-def: $vgpr5
.LBB0_28:                               ; %Flow301
	s_and_not1_saveexec_b32 s61, s43
	s_cbranch_execz .LBB0_55
; %bb.29:                               ; %NodeBlock273
                                        ; implicit-def: $vgpr0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 1, v5
	s_xor_b32 s44, exec_lo, s0
	s_cbranch_execz .LBB0_46
; %bb.30:                               ; %NodeBlock271
                                        ; implicit-def: $vgpr0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 2, v5
	s_xor_b32 s45, exec_lo, s0
	s_cbranch_execz .LBB0_38
; %bb.31:                               ; %.preheader182.preheader
	v_lshlrev_b64 v[6:7], 3, v[3:4]
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v14, 0
	v_mov_b32_e32 v15, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s6, 0x6dc9c883
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v1, v6
	v_add_co_ci_u32_e32 v13, vcc_lo, v2, v7, vcc_lo
	s_mov_b32 s8, 0x33145c00
	s_mov_b32 s10, 0x252049c0
	s_mov_b32 s12, 0x9037ab78
	s_mov_b32 s14, 0x46cc5e42
	s_mov_b32 s16, 0xa17f65f6
	s_mov_b32 s18, 0x19f4ec90
	s_mov_b32 s20, 0x16c16967
	s_mov_b32 s22, 0x55555555
	s_mov_b32 s24, 0xb42fdfa7
	s_mov_b32 s26, 0xf9a43bb8
	s_mov_b32 s28, 0x796cde01
	s_mov_b32 s30, 0x19e83e5c
	s_mov_b32 s34, 0x11110bb3
	s_mov_b64 s[42:43], 0
	s_mov_b32 s46, -1
	s_mov_b32 s3, 0x401921fb
	s_mov_b32 s1, 0x3ff921fb
	s_mov_b32 s5, 0x3c91a626
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	s_mov_b32 s11, 0xb97b839a
	s_mov_b32 s13, 0x3e21eeb6
	s_mov_b32 s15, 0xbda907db
	s_mov_b32 s17, 0xbe927e4f
	s_mov_b32 s19, 0x3efa01a0
	s_mov_b32 s21, 0xbf56c16c
	s_mov_b32 s23, 0x3fa55555
	s_mov_b32 s25, 0xbe5ae600
	s_mov_b32 s27, 0x3de5e0b2
	s_mov_b32 s29, 0x3ec71de3
	s_mov_b32 s31, 0xbf2a01a0
	s_mov_b32 s35, 0x3f811111
	s_mov_b32 s36, 0x33145c07
	s_mov_b32 s39, 0xbff921fb
	s_mov_b32 s41, 0xbfc55555
.LBB0_32:                               ; %.preheader182
                                        ; =>This Inner Loop Header: Depth=1
	s_lshl_b64 s[42:43], s[42:43], 2
	s_mov_b32 s4, exec_lo
	v_add_co_u32 v6, vcc_lo, v0, s42
	v_add_co_ci_u32_e32 v7, vcc_lo, s43, v13, vcc_lo
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr9_vgpr10
                                        ; implicit-def: $vgpr11_vgpr12
	flat_load_b32 v16, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cvt_f64_f32_e32 v[6:7], v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[7:8], v[6:7], s[2:3]
	v_cmpx_ngt_f64_e64 0x41d00000, |v[7:8]|
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_32 Depth=1
	v_ldexp_f64 v[9:10], |v[7:8]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[7:8]|
	v_trig_preop_f64 v[11:12], |v[7:8]|, 0
	v_and_b32_e32 v6, 0x7fffffff, v8
	v_trig_preop_f64 v[17:18], |v[7:8]|, 1
	v_trig_preop_f64 v[27:28], |v[7:8]|, 2
	s_mov_b32 s37, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v7, v9 :: v_dual_cndmask_b32 v10, v6, v10
	v_mul_f64 v[19:20], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[21:22], v[17:18], v[9:10]
	v_fma_f64 v[11:12], v[11:12], v[9:10], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[17:18], v[9:10], -v[21:22]
	v_add_f64 v[23:24], v[21:22], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[23:24], -v[21:22]
	v_add_f64 v[31:32], v[19:20], v[23:24]
	v_add_f64 v[29:30], v[23:24], -v[25:26]
	v_add_f64 v[11:12], v[11:12], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[25:26], v[31:32], -2
	v_add_f64 v[19:20], v[31:32], -v[19:20]
	v_add_f64 v[21:22], v[21:22], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[25:26]|
	v_add_f64 v[19:20], v[23:24], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], v[21:22]
	v_fract_f64_e32 v[21:22], v[25:26]
	v_cndmask_b32_e32 v21, 0, v21, vcc_lo
	v_mul_f64 v[33:34], v[27:28], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v22, 0, v22, vcc_lo
	v_ldexp_f64 v[21:22], v[21:22], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[33:34], v[17:18]
	v_fma_f64 v[9:10], v[27:28], v[9:10], -v[33:34]
	v_add_f64 v[23:24], v[29:30], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[19:20], v[23:24]
	v_add_f64 v[35:36], v[23:24], -v[29:30]
	v_add_f64 v[31:32], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[50:51], v[23:24], -v[35:36]
	v_add_f64 v[11:12], v[11:12], -v[35:36]
	v_add_f64 v[19:20], v[25:26], -v[19:20]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[31:32]
	v_add_f64 v[31:32], v[29:30], -v[33:34]
	v_cndmask_b32_e64 v6, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[48:49], v[29:30], -v[31:32]
	v_add_f64 v[17:18], v[17:18], -v[31:32]
	v_add_f64 v[29:30], v[29:30], -v[50:51]
	v_add_f64 v[21:22], v[21:22], v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[33:34], -v[48:49]
	v_add_f64 v[11:12], v[11:12], v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[25:26], v[21:22]
	v_add_f64 v[17:18], v[17:18], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v6, v[37:38]
	v_add_f64 v[11:12], v[17:18], v[11:12]
	v_add_f64 v[17:18], v[23:24], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[35:36], v6
	v_add_f64 v[9:10], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], -v[35:36]
	v_add_f64 v[9:10], v[17:18], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[25:26], v[21:22]
	v_add_f64 v[11:12], v[27:28], -v[21:22]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[25:26], -v[11:12]
	v_add_co_ci_u32_e64 v17, s0, 0, v6, vcc_lo
	v_cndmask_b32_e64 v6, 0, 0x3ff00000, vcc_lo
	s_mov_b32 s0, s2
	v_add_f64 v[9:10], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[27:28], -v[5:6]
	v_add_f64 v[18:19], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[18:19], s[0:1]
	v_add_f64 v[11:12], v[18:19], -v[11:12]
	v_fma_f64 v[22:23], v[18:19], s[0:1], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_fma_f64 v[11:12], v[18:19], s[36:37], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[9:10], s[0:1], v[11:12]
	v_add_f64 v[9:10], v[20:21], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[9:10], -v[20:21]
	v_add_f64 v[11:12], v[11:12], -v[18:19]
.LBB0_34:                               ; %Flow291
                                        ;   in Loop: Header=BB0_32 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_36
; %bb.35:                               ;   in Loop: Header=BB0_32 Depth=1
	v_mul_f64 v[9:10], |v[7:8]|, s[6:7]
	s_mov_b32 s38, s2
	s_mov_b32 s4, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[17:18], v[9:10]
	v_fma_f64 v[9:10], v[17:18], s[38:39], |v[7:8]|
	v_mul_f64 v[11:12], v[17:18], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[17:18], s[8:9], v[9:10]
	v_add_f64 v[19:20], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], -v[19:20]
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_fma_f64 v[11:12], v[17:18], s[4:5], v[11:12]
	v_add_f64 v[9:10], v[19:20], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_fma_f64 v[11:12], v[17:18], s[10:11], v[9:10]
	v_cvt_i32_f64_e32 v17, v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[21:22], v[11:12]
	v_add_f64 v[19:20], v[9:10], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[19:20]
.LBB0_36:                               ; %_ZL3cosd.exit171
                                        ;   in Loop: Header=BB0_32 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[18:19], v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_mul_f64 v[28:29], v[11:12], 0.5
	s_mov_b32 s40, s22
	v_cmp_class_f64_e64 s0, v[7:8], 0x1f8
	s_mov_b64 s[42:43], 1
	v_fmac_f32_e32 v15, v16, v16
	v_fma_f64 v[20:21], v[18:19], s[26:27], s[24:25]
	v_mul_f64 v[24:25], v[18:19], 0.5
	v_fma_f64 v[22:23], v[18:19], s[14:15], s[12:13]
	v_mul_f64 v[30:31], v[9:10], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[28:29]
	v_add_f64 v[26:27], -v[24:25], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[16:17]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[32:33], -v[26:27], 1.0
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[34:35]
	v_add_f64 v[24:25], v[32:33], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[20:21]
	v_fma_f64 v[20:21], v[30:31], v[20:21], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[9:10], -v[11:12], v[24:25]
	v_mul_f64 v[28:29], v[18:19], v[18:19]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[18:19], v[20:21], -v[11:12]
	v_fma_f64 v[18:19], v[28:29], v[22:23], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[30:31], s[40:41], v[11:12]
	v_add_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_and_b32_e32 v6, 1, v17
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	v_cvt_f64_f32_e32 v[6:7], v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v18, vcc_lo
	v_xor_b32_e32 v8, 0x80000000, v10
	v_lshlrev_b32_e32 v10, 30, v17
	v_cndmask_b32_e32 v8, v8, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v10, 0x80000000, v10
	v_xor_b32_e32 v10, v8, v10
	v_cndmask_b32_e64 v8, 0, v9, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, 0x7ff80000, v10, s0
	s_xor_b32 s0, s46, -1
	s_mov_b32 s46, 0
	s_and_not1_b32 vcc_lo, exec_lo, s0
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v14, v[6:7]
	s_cbranch_vccnz .LBB0_32
; %bb.37:
	v_mul_f32_e32 v0, 0.5, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v5, 0x4f800000, v0
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v5, v0
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v6, -1, v5
	v_add_nc_u32_e32 v7, 1, v5
	v_fma_f32 v8, -v6, v5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v9, -v7, v5, v0
	v_cmp_ge_f32_e64 s0, 0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v6, s0
	v_cmp_lt_f32_e64 s0, 0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v7, s0
	s_mov_b32 s0, 0x9999999a
	s_mov_b32 s1, 0xbfc99999
	v_mul_f32_e32 v6, 0x37800000, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	v_cndmask_b32_e32 v0, v5, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[5:6], v0
	v_mul_f64 v[5:6], v[5:6], s[0:1]
	s_mov_b32 s0, 0x8b145769
	s_mov_b32 s1, 0x4005bf0a
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[5:6]
	v_mul_f32_e32 v5, 0x3fb8aa3b, v0
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v6, 0x3fb8aa3b, v0, -v5
	v_rndne_f32_e32 v7, v5
	v_dual_fmac_f32 v6, 0x32a5705f, v0 :: v_dual_sub_f32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v5, v6
	v_cvt_i32_f32_e32 v6, v7
	v_mul_f32_e32 v7, 0.5, v14
	v_mul_f32_e32 v8, 0x3fb8aa3b, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v5, v5
	v_fma_f32 v9, 0x3fb8aa3b, v7, -v8
	v_rndne_f32_e32 v10, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v0
	v_cndmask_b32_e32 v0, 0x7f800000, v5, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v7
	v_fmac_f32_e32 v9, 0x32a5705f, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[5:6], v0
	v_sub_f32_e32 v0, v8, v10
	v_cvt_i32_f32_e32 v8, v10
	v_add_f32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v0, v0, v8
	v_cndmask_b32_e32 v0, 0, v0, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, 0x7f800000, v0, vcc_lo
	v_cvt_f64_f32_e32 v[7:8], v0
	v_fma_f64 v[5:6], 0xc0340000, v[5:6], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_add_f64 v[5:6], 0x40340000, v[5:6]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[5:6]
.LBB0_38:                               ; %Flow297
	s_and_not1_saveexec_b32 s45, s45
	s_cbranch_execz .LBB0_45
; %bb.39:                               ; %.preheader180.preheader
	v_lshlrev_b64 v[6:7], 3, v[3:4]
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v0, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v1, v6
	v_add_co_ci_u32_e32 v14, vcc_lo, v2, v7, vcc_lo
	s_mov_b32 s10, 0x252049c0
	s_mov_b32 s12, 0x9037ab78
	s_mov_b32 s14, 0x46cc5e42
	s_mov_b32 s16, 0xa17f65f6
	s_mov_b32 s18, 0x19f4ec90
	s_mov_b32 s20, 0x16c16967
	s_mov_b32 s22, 0x55555555
	s_mov_b32 s24, 0xb42fdfa7
	s_mov_b32 s26, 0xf9a43bb8
	s_mov_b32 s28, 0x796cde01
	s_mov_b32 s30, 0x19e83e5c
	s_mov_b32 s34, 0x11110bb3
	s_mov_b64 s[42:43], 0
	s_mov_b32 s46, -1
	s_mov_b32 s3, 0x401921fb
	s_mov_b32 s1, 0x3ff921fb
	s_mov_b32 s5, 0x3c91a626
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	s_mov_b32 s11, 0xb97b839a
	s_mov_b32 s13, 0x3e21eeb6
	s_mov_b32 s15, 0xbda907db
	s_mov_b32 s17, 0xbe927e4f
	s_mov_b32 s19, 0x3efa01a0
	s_mov_b32 s21, 0xbf56c16c
	s_mov_b32 s23, 0x3fa55555
	s_mov_b32 s25, 0xbe5ae600
	s_mov_b32 s27, 0x3de5e0b2
	s_mov_b32 s29, 0x3ec71de3
	s_mov_b32 s31, 0xbf2a01a0
	s_mov_b32 s35, 0x3f811111
	s_mov_b32 s36, 0x33145c07
	s_mov_b32 s39, 0xbff921fb
	s_mov_b32 s41, 0xbfc55555
.LBB0_40:                               ; %.preheader180
                                        ; =>This Inner Loop Header: Depth=1
	s_lshl_b64 s[42:43], s[42:43], 2
	s_mov_b32 s4, exec_lo
	v_add_co_u32 v6, vcc_lo, v13, s42
	v_add_co_ci_u32_e32 v7, vcc_lo, s43, v14, vcc_lo
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr9_vgpr10
                                        ; implicit-def: $vgpr11_vgpr12
	flat_load_b32 v15, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cvt_f64_f32_e32 v[6:7], v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[7:8], v[6:7], s[2:3]
	v_cmpx_ngt_f64_e64 0x41d00000, |v[7:8]|
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_40 Depth=1
	v_ldexp_f64 v[9:10], |v[7:8]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[7:8]|
	v_trig_preop_f64 v[11:12], |v[7:8]|, 0
	v_and_b32_e32 v6, 0x7fffffff, v8
	v_trig_preop_f64 v[16:17], |v[7:8]|, 1
	v_trig_preop_f64 v[26:27], |v[7:8]|, 2
	s_mov_b32 s37, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v7, v9 :: v_dual_cndmask_b32 v10, v6, v10
	v_mul_f64 v[18:19], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[16:17], v[9:10]
	v_fma_f64 v[11:12], v[11:12], v[9:10], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[16:17], v[9:10], -v[20:21]
	v_add_f64 v[22:23], v[20:21], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[22:23], -v[20:21]
	v_add_f64 v[30:31], v[18:19], v[22:23]
	v_add_f64 v[28:29], v[22:23], -v[24:25]
	v_add_f64 v[11:12], v[11:12], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[24:25], v[30:31], -2
	v_add_f64 v[18:19], v[30:31], -v[18:19]
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[24:25]|
	v_add_f64 v[18:19], v[22:23], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], v[20:21]
	v_fract_f64_e32 v[20:21], v[24:25]
	v_cndmask_b32_e32 v21, 0, v21, vcc_lo
	v_mul_f64 v[32:33], v[26:27], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v20, 0, v20, vcc_lo
	v_ldexp_f64 v[20:21], v[20:21], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[32:33], v[16:17]
	v_fma_f64 v[9:10], v[26:27], v[9:10], -v[32:33]
	v_add_f64 v[22:23], v[28:29], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[18:19], v[22:23]
	v_add_f64 v[34:35], v[22:23], -v[28:29]
	v_add_f64 v[30:31], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[48:49], v[22:23], -v[34:35]
	v_add_f64 v[11:12], v[11:12], -v[34:35]
	v_add_f64 v[18:19], v[24:25], -v[18:19]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[30:31]
	v_add_f64 v[30:31], v[28:29], -v[32:33]
	v_cndmask_b32_e64 v6, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[28:29], -v[30:31]
	v_add_f64 v[16:17], v[16:17], -v[30:31]
	v_add_f64 v[28:29], v[28:29], -v[48:49]
	v_add_f64 v[20:21], v[20:21], v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[32:33], -v[38:39]
	v_add_f64 v[11:12], v[11:12], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[24:25], v[20:21]
	v_add_f64 v[16:17], v[16:17], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v6, v[36:37]
	v_add_f64 v[11:12], v[16:17], v[11:12]
	v_add_f64 v[16:17], v[22:23], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[34:35], v6
	v_add_f64 v[9:10], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], -v[34:35]
	v_add_f64 v[9:10], v[16:17], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[24:25], v[20:21]
	v_add_f64 v[11:12], v[26:27], -v[20:21]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[24:25], -v[11:12]
	v_add_co_ci_u32_e64 v16, s0, 0, v6, vcc_lo
	v_cndmask_b32_e64 v6, 0, 0x3ff00000, vcc_lo
	s_mov_b32 s0, s2
	v_add_f64 v[9:10], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[26:27], -v[5:6]
	v_add_f64 v[17:18], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[19:20], v[17:18], s[0:1]
	v_add_f64 v[11:12], v[17:18], -v[11:12]
	v_fma_f64 v[21:22], v[17:18], s[0:1], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_fma_f64 v[11:12], v[17:18], s[36:37], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[9:10], s[0:1], v[11:12]
	v_add_f64 v[9:10], v[19:20], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[9:10], -v[19:20]
	v_add_f64 v[11:12], v[11:12], -v[17:18]
.LBB0_42:                               ; %Flow294
                                        ;   in Loop: Header=BB0_40 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_44
; %bb.43:                               ;   in Loop: Header=BB0_40 Depth=1
	v_mul_f64 v[9:10], |v[7:8]|, s[6:7]
	s_mov_b32 s38, s2
	s_mov_b32 s4, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[16:17], v[9:10]
	v_fma_f64 v[9:10], v[16:17], s[38:39], |v[7:8]|
	v_mul_f64 v[11:12], v[16:17], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[16:17], s[8:9], v[9:10]
	v_add_f64 v[18:19], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], -v[18:19]
	v_add_f64 v[18:19], v[18:19], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_fma_f64 v[11:12], v[16:17], s[4:5], v[11:12]
	v_add_f64 v[9:10], v[18:19], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_fma_f64 v[11:12], v[16:17], s[10:11], v[9:10]
	v_cvt_i32_f64_e32 v16, v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[20:21], v[11:12]
	v_add_f64 v[18:19], v[9:10], -v[20:21]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[18:19]
.LBB0_44:                               ; %_ZL3cosd.exit
                                        ;   in Loop: Header=BB0_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[17:18], v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[27:28], v[11:12], 0.5
	s_mov_b32 s40, s22
	v_and_b32_e32 v6, 1, v16
	v_cmp_class_f64_e64 s0, v[7:8], 0x1f8
	s_mov_b64 s[42:43], 1
	v_lshlrev_b32_e32 v8, 30, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_and_b32_e32 v8, 0x80000000, v8
	v_fma_f64 v[19:20], v[17:18], s[26:27], s[24:25]
	v_fma_f64 v[21:22], v[17:18], s[14:15], s[12:13]
	v_mul_f64 v[23:24], v[17:18], 0.5
	v_mul_f64 v[29:30], v[9:10], -v[17:18]
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[16:17]
	v_add_f64 v[25:26], -v[23:24], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[30:31]
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], -v[25:26], 1.0
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[20:21]
	v_add_f64 v[23:24], v[31:32], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[19:20], v[29:30], v[19:20], v[27:28]
	v_mul_f64 v[27:28], v[17:18], v[17:18]
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[23:24], v[9:10], -v[11:12], v[23:24]
	v_fma_f64 v[11:12], v[17:18], v[19:20], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[27:28], v[21:22], v[23:24]
	v_fma_f64 v[11:12], v[29:30], s[40:41], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[25:26], v[17:18]
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_mul_f32_e32 v11, v15, v15
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_f64_f32_e32 v[6:7], v11
	v_cndmask_b32_e32 v9, v9, v17, vcc_lo
	v_xor_b32_e32 v10, 0x80000000, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v18, vcc_lo
	v_xor_b32_e32 v10, v10, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, 0, v9, s0
	v_cndmask_b32_e64 v9, 0x7ff80000, v10, s0
	s_xor_b32 s0, s46, -1
	s_mov_b32 s46, 0
	s_and_b32 vcc_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], 0xc0240000, v[8:9], v[6:7]
	v_cvt_f64_f32_e32 v[8:9], v0
	v_add_f64 v[6:7], 0x40240000, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_cvt_f32_f64_e32 v0, v[6:7]
	s_cbranch_vccz .LBB0_40
.LBB0_45:                               ; %Flow298
	s_or_b32 exec_lo, exec_lo, s45
                                        ; implicit-def: $vgpr5
.LBB0_46:                               ; %Flow310
	s_or_saveexec_b32 s62, s44
	s_mov_b32 s0, 0
	s_mov_b32 s1, s60
	s_xor_b32 exec_lo, exec_lo, s62
	s_cbranch_execz .LBB0_54
; %bb.47:                               ; %NodeBlock
	s_mov_b32 s63, 0
                                        ; implicit-def: $vgpr0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 0, v5
	s_xor_b32 s64, exec_lo, s0
	s_cbranch_execz .LBB0_51
; %bb.48:                               ; %.preheader178.preheader
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, 0x55555555
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s8, 0x4222de17
	s_mov_b32 s10, 0x3abe935a
	v_add_co_u32 v5, vcc_lo, v1, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, v2, v6, vcc_lo
	s_mov_b32 s12, 0x47e6c9c2
	s_mov_b32 s14, 0xcfa74449
	s_mov_b32 s16, 0x71bf3c30
	s_mov_b32 s18, 0x1c7792ce
	s_mov_b32 s20, 0x924920da
	s_mov_b32 s22, 0x9999999c
	s_mov_b32 s24, 0xfefa39ef
	s_mov_b32 s26, 0x3b39803f
	s_mov_b32 s30, 0xd5df274d
	s_mov_b32 s34, 0x652b82fe
	s_mov_b32 s36, 0xfca7ab0c
	s_mov_b32 s38, 0x6a5dcb37
	s_mov_b32 s40, 0x623fde64
	s_mov_b32 s42, 0x7c89e6b0
	s_mov_b32 s44, 0x14761f6e
	s_mov_b32 s46, 0x1852b7b0
	s_mov_b32 s48, 0x11122322
	s_mov_b32 s50, 0x555502a1
	s_mov_b32 s52, 0x55555511
	s_mov_b32 s54, 11
	s_mov_b32 s2, 0
	s_mov_b32 s66, -1
	s_mov_b32 s65, 0x3ff00000
	s_mov_b32 s5, 0x3fe55555
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s9, 0x3fbdee67
	s_mov_b32 s11, 0x3fbe25e4
	s_mov_b32 s13, 0x3fc110ef
	s_mov_b32 s15, 0x3fc3b13b
	s_mov_b32 s17, 0x3fc745d1
	s_mov_b32 s19, 0x3fcc71c7
	s_mov_b32 s21, 0x3fd24924
	s_mov_b32 s23, 0x3fd99999
	s_mov_b32 s25, 0x3fe62e42
	s_mov_b32 s27, 0x3c7abc9e
	s_mov_b32 s29, 0xbfe55555
	s_mov_b32 s31, 0x3c8543b0
	s_mov_b32 s35, 0x3ff71547
	s_mov_b32 s37, 0x3e928af3
	s_mov_b32 s39, 0x3e5ade15
	s_mov_b32 s41, 0x3ec71dee
	s_mov_b32 s43, 0x3efa0199
	s_mov_b32 s45, 0x3f2a01a0
	s_mov_b32 s47, 0x3f56c16c
	s_mov_b32 s49, 0x3f811111
	s_mov_b32 s51, 0x3fa55555
	s_mov_b32 s53, 0x3fc55555
	s_mov_b32 s55, 0x3fe00000
	s_mov_b32 s57, 0xbfe62e42
	s_mov_b32 s59, 0xbc7abc9e
	s_mov_b32 s0, 0
.LBB0_49:                               ; %.preheader178
                                        ; =>This Inner Loop Header: Depth=1
	s_and_b32 s1, s66, exec_lo
	s_cselect_b32 s3, s65, 0x412e8480
	s_mov_b32 s28, s4
	v_frexp_mant_f64_e32 v[7:8], s[2:3]
	s_mov_b32 s56, s24
	s_mov_b32 s58, s26
	s_mov_b32 s1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[4:5], v[7:8]
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_ldexp_f64 v[7:8], v[7:8], v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[7:8], 1.0
	v_add_f64 v[15:16], v[7:8], -1.0
	v_rcp_f64_e32 v[11:12], v[9:10]
	v_add_f64 v[17:18], v[9:10], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[17:18]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[9:10], v[11:12], 1.0
	v_fma_f64 v[11:12], v[13:14], v[11:12], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], -v[9:10], v[11:12], 1.0
	v_fma_f64 v[11:12], v[13:14], v[11:12], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[15:16], v[11:12]
	v_mul_f64 v[19:20], v[9:10], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[13:14], v[9:10], -v[19:20]
	v_fma_f64 v[7:8], v[13:14], v[7:8], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[19:20], v[7:8]
	v_add_f64 v[17:18], v[15:16], -v[9:10]
	v_add_f64 v[19:20], v[9:10], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	v_add_f64 v[7:8], v[19:20], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[15:16], -v[9:10]
	v_add_f64 v[7:8], v[7:8], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[17:18], v[7:8]
	v_mul_f64 v[7:8], v[11:12], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[13:14], v[7:8]
	v_add_f64 v[11:12], v[9:10], -v[13:14]
	v_mul_f64 v[13:14], v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], -v[11:12]
	v_fma_f64 v[11:12], v[9:10], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[7:8], v[7:8]
	v_fma_f64 v[11:12], v[9:10], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[13:14], v[11:12]
	v_fma_f64 v[17:18], v[15:16], s[8:9], s[6:7]
	v_add_f64 v[13:14], v[15:16], -v[13:14]
	v_mul_f64 v[21:22], v[9:10], v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[10:11]
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[15:16], v[9:10], -v[21:22]
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[14:15]
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[18:19]
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[22:23]
	v_mul_f64 v[19:20], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[15:16], v[17:18], -v[19:20]
	v_fma_f64 v[15:16], v[15:16], v[7:8], v[25:26]
	v_ldexp_f64 v[7:8], v[7:8], 1
	v_fma_f64 v[13:14], v[11:12], v[17:18], v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[11:12], v[9:10], v[15:16]
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_add_f64 v[17:18], v[19:20], v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[21:22], v[11:12]
	v_add_f64 v[23:24], v[17:18], s[4:5]
	v_add_f64 v[19:20], v[17:18], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[15:16], -v[21:22]
	v_add_f64 v[27:28], v[23:24], s[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[13:14], -v[19:20]
	v_add_f64 v[11:12], v[11:12], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[17:18], -v[27:28]
	v_add_f64 v[13:14], v[13:14], s[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], v[17:18]
	v_add_f64 v[17:18], v[23:24], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[23:24], -v[17:18]
	v_mul_f64 v[23:24], v[15:16], v[17:18]
	v_add_f64 v[13:14], v[13:14], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[15:16], v[17:18], -v[23:24]
	v_fma_f64 v[13:14], v[15:16], v[13:14], v[19:20]
	v_frexp_exp_i32_f64_e32 v15, s[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[11:12], v[17:18], v[13:14]
	v_subrev_co_ci_u32_e32 v15, vcc_lo, 0, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[15:16], v15
	v_add_f64 v[13:14], v[23:24], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[21:22], v[15:16], s[24:25]
	v_add_f64 v[17:18], v[9:10], v[13:14]
	v_add_f64 v[19:20], v[13:14], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[17:18], -v[9:10]
	v_add_f64 v[11:12], v[11:12], -v[19:20]
	v_fma_f64 v[19:20], v[15:16], s[24:25], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[13:14], -v[9:10]
	v_add_f64 v[7:8], v[7:8], v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[15:16], s[26:27], v[19:20]
	v_add_f64 v[7:8], v[7:8], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[21:22], v[11:12]
	v_add_f64 v[13:14], v[17:18], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[9:10], -v[21:22]
	v_add_f64 v[15:16], v[9:10], v[13:14]
	v_add_f64 v[17:18], v[13:14], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[21:22]
	v_add_f64 v[19:20], v[15:16], -v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], -v[17:18]
	v_add_f64 v[23:24], v[15:16], -v[19:20]
	v_add_f64 v[13:14], v[13:14], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[11:12], v[7:8]
	v_add_f64 v[9:10], v[9:10], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[13:14], v[9:10]
	v_add_f64 v[13:14], v[17:18], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[17:18], v[9:10]
	v_add_f64 v[17:18], v[17:18], -v[13:14]
	v_add_f64 v[7:8], v[7:8], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[15:16], v[9:10]
	v_add_f64 v[11:12], v[11:12], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[19:20], -v[15:16]
	v_add_f64 v[7:8], v[7:8], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	v_add_f64 v[7:8], v[7:8], v[9:10]
	v_cvt_f64_i32_e32 v[9:10], s0
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[19:20], v[7:8]
	v_add_f64 v[13:14], v[11:12], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[15:16], v[11:12], v[9:10]
	v_add_f64 v[7:8], v[7:8], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[9:10], v[11:12], -v[15:16]
	v_cmp_class_f64_e64 vcc_lo, v[15:16], 0x204
	v_fma_f64 v[7:8], v[9:10], v[7:8], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[15:16], v[7:8]
	v_dual_cndmask_b32 v12, v10, v16 :: v_dual_cndmask_b32 v11, v9, v15
	v_add_co_u32 v21, vcc_lo, v5, s0
	v_add_co_ci_u32_e32 v22, vcc_lo, s1, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[13:14], v[11:12], s[34:35]
	v_add_f64 v[9:10], v[9:10], -v[15:16]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[11:12]
	flat_load_b32 v21, v[21:22]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[11:12]|
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[11:12]
	v_rndne_f64_e32 v[13:14], v[13:14]
	v_add_f64 v[7:8], v[7:8], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[13:14], s[56:57], v[11:12]
	v_cvt_i32_f64_e32 v22, v[13:14]
	v_dual_cndmask_b32 v8, 0, v8 :: v_dual_cndmask_b32 v7, 0, v7
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[13:14], s[58:59], v[17:18]
	v_fma_f64 v[19:20], v[17:18], s[38:39], s[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[40:41]
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[44:45]
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[46:47]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cvt_f64_f32_e32 v[11:12], v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[48:49]
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[52:53]
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], 1.0
	v_fma_f64 v[13:14], v[17:18], v[19:20], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[13:14], v[13:14], v22
	v_cndmask_b32_e64 v9, 0x7ff00000, v14, s0
	s_mov_b32 s0, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v10, 0, v9, s1
	v_cndmask_b32_e32 v9, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[7:8], v[9:10], v[7:8], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x204
	v_dual_cndmask_b32 v8, v8, v10 :: v_dual_cndmask_b32 v7, v7, v9
	v_cvt_f64_f32_e32 v[9:10], v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[7:8], |v[7:8]|, v[11:12]
	v_fma_f64 v[7:8], v[7:8], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[7:8]
	v_cndmask_b32_e64 v7, 0, 1, s66
	s_mov_b32 s66, 0
	v_cmp_ne_u32_e32 vcc_lo, 1, v7
	s_cbranch_vccz .LBB0_49
; %bb.50:                               ; %Flow300
                                        ; implicit-def: $vgpr5
.LBB0_51:                               ; %Flow312
	s_or_saveexec_b32 s0, s64
	s_mov_b32 s1, s60
	s_xor_b32 exec_lo, exec_lo, s0
; %bb.52:                               ; %LeafBlock
	v_cmp_ne_u32_e32 vcc_lo, 0, v5
	s_and_not1_b32 s1, s60, exec_lo
	s_mov_b32 s63, exec_lo
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
; %bb.53:                               ; %Flow313
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s2, s60, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s0, s63, exec_lo
	s_or_b32 s1, s2, s1
.LBB0_54:                               ; %Flow311
	s_or_b32 exec_lo, exec_lo, s62
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s2, s60, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s42, s0, exec_lo
	s_or_b32 s60, s2, s1
.LBB0_55:                               ; %Flow309
	s_or_b32 exec_lo, exec_lo, s61
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_and_saveexec_b32 s0, s60
	s_cbranch_execz .LBB0_57
; %bb.56:                               ; %.loopexit
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v1, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, v2, v4, vcc_lo
	s_and_not1_b32 s42, s42, exec_lo
	flat_load_b64 v[5:6], v[5:6]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cvt_f64_f32_e32 v[7:8], v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], 0x412e8480, v[7:8]
	v_mul_f64 v[7:8], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[7:8]
	v_fmac_f32_e32 v0, v6, v6
.LBB0_57:                               ; %Flow314
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s42
	s_cbranch_execz .LBB0_59
; %bb.58:                               ; %.preheader
	v_add_co_u32 v0, vcc_lo, v1, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, v2, v4, vcc_lo
	flat_load_b64 v[1:2], v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v0, v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, v1, v1
.LBB0_59:                               ; %.loopexit177
	s_or_b32 exec_lo, exec_lo, s0
	v_readlane_b32 s30, v41, 1
	v_readlane_b32 s31, v41, 2
	v_readlane_b32 s66, v41, 0
	v_readlane_b32 s65, v40, 31
	v_readlane_b32 s64, v40, 30
	v_readlane_b32 s63, v40, 29
	v_readlane_b32 s62, v40, 28
	v_readlane_b32 s61, v40, 27
	v_readlane_b32 s60, v40, 26
	v_readlane_b32 s59, v40, 25
	v_readlane_b32 s58, v40, 24
	v_readlane_b32 s57, v40, 23
	v_readlane_b32 s56, v40, 22
	v_readlane_b32 s55, v40, 21
	v_readlane_b32 s54, v40, 20
	v_readlane_b32 s53, v40, 19
	v_readlane_b32 s52, v40, 18
	v_readlane_b32 s51, v40, 17
	v_readlane_b32 s50, v40, 16
	v_readlane_b32 s49, v40, 15
	v_readlane_b32 s48, v40, 14
	v_readlane_b32 s47, v40, 13
	v_readlane_b32 s46, v40, 12
	v_readlane_b32 s45, v40, 11
	v_readlane_b32 s44, v40, 10
	v_readlane_b32 s43, v40, 9
	v_readlane_b32 s42, v40, 8
	v_readlane_b32 s41, v40, 7
	v_readlane_b32 s40, v40, 6
	v_readlane_b32 s39, v40, 5
	v_readlane_b32 s38, v40, 4
	v_readlane_b32 s37, v40, 3
	v_readlane_b32 s36, v40, 2
	v_readlane_b32 s35, v40, 1
	v_readlane_b32 s34, v40, 0
	s_or_saveexec_b32 s0, -1
	s_clause 0x1
	scratch_load_b32 v40, off, s32
	scratch_load_b32 v41, off, s32 offset:4
	s_mov_b32 exec_lo, s0
	s_waitcnt vmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	_Z9benchmarkiPA2_fi, .Lfunc_end0-_Z9benchmarkiPA2_fi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 11280
; NumSgprs: 69
; NumVgprs: 52
; ScratchSize: 12
; MemoryBound: 0
	.text
	.protected	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION ; -- Begin function _Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.globl	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
	.p2align	8
	.type	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION,@function
_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION: ; @_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	s_add_u32 s76, s0, 32
	s_addc_u32 s77, s1, 0
	s_movk_i32 s32, 0x180
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[46:47], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x5ffa, v46
	s_cbranch_execz .LBB1_251
; %bb.1:
	v_mul_hi_i32 v0, 0x88888889, v46
	s_load_b256 s[68:75], s[0:1], 0x0
	v_ashrrev_i32_e32 v47, 31, v46
	s_mov_b32 s79, 0
	s_mov_b32 s80, 0xd2f1a9fc
	s_mov_b32 s81, 0x3f60624d
	s_mov_b32 s33, 1
	s_mov_b32 s83, 0x3fc99999
	v_dual_mov_b32 v71, 0 :: v_dual_add_nc_u32 v0, v0, v46
	s_mov_b32 s84, s79
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v0, 4, v0
	v_add_nc_u32_e32 v64, v0, v1
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[52:53], null, 0x320, v46, s[72:73]
	v_mad_i64_i32 v[54:55], null, 0x640, v46, s[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v2, v64, 30
	v_mad_i64_i32 v[0:1], null, 0x3a8c, v64, s[68:69]
	s_mov_b32 s72, 0x7ae147ae
	v_add_co_u32 v56, vcc_lo, v52, 4
	v_add_co_ci_u32_e32 v57, vcc_lo, 0, v53, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v42, v46, v2
	v_add_co_u32 v44, vcc_lo, 0x399c, v0
	v_add_co_ci_u32_e32 v45, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_bfe_i32 v4, v42, 0, 8
	v_mad_i64_i32 v[2:3], null, 0x1c4, v42, 0
	v_ashrrev_i32_e32 v43, 31, v42
	s_mov_b32 s74, 0x9999999a
	v_mul_lo_u16 v8, 0x67, v4
	s_mov_b32 s73, 0x3fefae14
	s_mov_b32 s75, 0xbfb99999
	v_lshlrev_b64 v[58:59], 3, v[42:43]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, v0, v2
	v_lshlrev_b64 v[4:5], 2, v[42:43]
	v_add_co_ci_u32_e32 v10, vcc_lo, v1, v3, vcc_lo
	v_mad_i64_i32 v[6:7], null, 0x3a8c, v64, v[2:3]
	v_lshrrev_b16 v2, 15, v8
	v_ashrrev_i16 v3, 10, v8
	v_add_co_u32 v60, vcc_lo, v44, v58
	v_add_co_ci_u32_e32 v61, vcc_lo, v45, v59, vcc_lo
	v_add_co_u32 v65, vcc_lo, v0, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u16 v0, v3, v2
	v_add_co_ci_u32_e32 v66, vcc_lo, v1, v5, vcc_lo
	v_add_co_u32 v67, vcc_lo, 0x1c4, v9
	v_mul_lo_u16 v0, v0, 10
	v_add_co_ci_u32_e32 v68, vcc_lo, 0, v10, vcc_lo
	v_add_co_u32 v69, vcc_lo, s68, v6
	v_add_co_ci_u32_e32 v70, vcc_lo, s69, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u16 v0, v42, v0
	v_add_co_u32 v62, vcc_lo, 0x338, v69
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v63, vcc_lo, 0, v70, vcc_lo
	v_bfe_i32 v43, v0, 0, 8
.LBB1_2:                                ; %.preheader84
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
                                        ;       Child Loop BB1_6 Depth 3
                                        ;     Child Loop BB1_11 Depth 2
                                        ;     Child Loop BB1_15 Depth 2
                                        ;       Child Loop BB1_16 Depth 3
                                        ;       Child Loop BB1_18 Depth 3
                                        ;         Child Loop BB1_19 Depth 4
                                        ;       Child Loop BB1_37 Depth 3
                                        ;         Child Loop BB1_38 Depth 4
                                        ;       Child Loop BB1_43 Depth 3
                                        ;       Child Loop BB1_45 Depth 3
                                        ;         Child Loop BB1_46 Depth 4
                                        ;     Child Loop BB1_52 Depth 2
	global_load_b32 v2, v[60:61], off
	s_mov_b32 s85, s79
	v_mov_b32_e32 v3, v42
	s_lshl_b64 s[0:1], s[84:85], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v0, vcc_lo, v54, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v55, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z9benchmarkiPA2_fi@rel32@lo+4
	s_addc_u32 s1, s1, _Z9benchmarkiPA2_fi@rel32@hi+12
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
	global_load_b32 v2, v[60:61], off offset:4
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off offset:4
	v_dual_mov_b32 v0, v43 :: v_dual_mov_b32 v1, v44
	v_mov_b32_e32 v2, v45
	s_swappc_b64 s[30:31], s[0:1]
	s_lshl_b64 s[0:1], s[84:85], 2
	s_cmp_lg_u32 s84, 0
	v_add_co_u32 v1, vcc_lo, v52, s0
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v53, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_cbranch_scc0 .LBB1_10
; %bb.3:                                ; %.preheader43.lr.ph.i
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s0, s84, -1
	s_mov_b32 s1, 0
.LBB1_4:                                ; %.preheader43.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_6 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s2, s84, s1
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB1_9
; %bb.5:                                ; %.lr.ph.preheader.i
                                        ;   in Loop: Header=BB1_4 Depth=2
	global_load_b32 v2, v[52:53], off
	v_dual_mov_b32 v3, v56 :: v_dual_mov_b32 v4, v57
	s_mov_b32 s3, 0
.LBB1_6:                                ; %.lr.ph.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v1, v[3:4], off
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v2, v1
	s_cbranch_execz .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_6 Depth=3
	global_store_b64 v[3:4], v[1:2], off offset:-4
	v_mov_b32_e32 v1, v2
.LBB1_8:                                ;   in Loop: Header=BB1_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s4
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v2, v1
	s_add_i32 s3, s3, 1
	s_cmp_ge_i32 s3, s2
	s_cbranch_scc0 .LBB1_6
.LBB1_9:                                ; %._crit_edge.i
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_add_i32 s2, s1, 1
	s_cmp_eq_u32 s1, s0
	s_mov_b32 s1, s2
	s_cbranch_scc0 .LBB1_4
.LBB1_10:                               ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v1, v52
	v_mov_b32_e32 v2, v53
	s_mov_b32 s0, 0
	s_mov_b32 s1, s33
                                        ; implicit-def: $sgpr2
.LBB1_11:                               ; %.preheader.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v3, v[1:2], off
	s_or_b32 s2, s2, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, v3, v0
	v_add_f32_e32 v3, 1.0, v4
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s3, vcc_lo
; %bb.12:                               ;   in Loop: Header=BB1_11 Depth=2
	s_add_i32 s1, s1, -1
	v_add_co_u32 v1, vcc_lo, v1, 4
	s_cmp_eq_u32 s1, 0
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_cselect_b32 s4, -1, 0
	v_dual_mov_b32 v4, v3 :: v_dual_mov_b32 v3, 0
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s4
; %bb.13:                               ; %Flow491
                                        ;   in Loop: Header=BB1_11 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s2
	s_or_b32 s0, s3, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_11
; %bb.14:                               ; %_Z11thread_sortiP10IN_FITNESSif.exit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s84, s84, 1
	s_mov_b32 s2, 0
	v_cvt_f32_i32_e32 v0, s84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v1, null, v0, v0, v3
	v_rcp_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v1, v2, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v4, v2
	v_div_scale_f32 v4, vcc_lo, v3, v0, v3
	v_mul_f32_e32 v5, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v1, v5, v4
	v_fmac_f32_e32 v5, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v1, -v1, v5, v4
	v_div_fmas_f32 v1, v1, v2, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v10, v1, v0, v3
.LBB1_15:                               ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_16 Depth 3
                                        ;       Child Loop BB1_18 Depth 3
                                        ;         Child Loop BB1_19 Depth 4
                                        ;       Child Loop BB1_37 Depth 3
                                        ;         Child Loop BB1_38 Depth 4
                                        ;       Child Loop BB1_43 Depth 3
                                        ;       Child Loop BB1_45 Depth 3
                                        ;         Child Loop BB1_46 Depth 4
	global_load_b64 v[0:1], v[60:61], off
	s_mov_b32 s0, 0
.LBB1_16:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_15 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s1, s0, 16
	s_add_i32 s0, s0, 4
	scratch_store_b32 off, v71, s1
	s_cmpk_eq_i32 s0, 0x168
	s_cbranch_scc0 .LBB1_16
; %bb.17:                               ; %.preheader126.i
                                        ;   in Loop: Header=BB1_15 Depth=2
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v2, null, 0x42c80000, 0x42c80000, v0
	v_div_scale_f32 v3, null, 0x42c80000, 0x42c80000, v1
	v_div_scale_f32 v8, vcc_lo, v0, 0x42c80000, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v4, v2
	v_rcp_f32_e32 v5, v3
	s_mov_b32 s78, 0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v2, v4, 1.0
	v_fma_f32 v7, -v3, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v4, v6, v4 :: v_dual_fmac_f32 v5, v7, v5
	v_div_scale_f32 v6, s0, v1, 0x42c80000, v1
	v_mul_f32_e32 v7, v8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, v6, v5
	v_fma_f32 v11, -v2, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v3, v9, v6
	v_fmac_f32_e32 v7, v11, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, v12, v5
	v_fma_f32 v2, -v2, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v3, -v3, v9, v6
	v_div_fmas_f32 v2, v2, v4, v7
	s_mov_b32 vcc_lo, s0
	s_mov_b32 s0, s78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v3, v3, v5, v9
	v_div_fixup_f32 v11, v2, 0x42c80000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f32 v12, v3, 0x42c80000, v1
.LBB1_18:                               ; %.preheader125.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_15 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_19 Depth 4
	v_mad_i64_i32 v[0:1], null, 0x3a8c, v64, s[68:69]
	s_lshl_b64 s[4:5], s[78:79], 2
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v8, v62 :: v_dual_mov_b32 v9, v63
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_i64_i32 v[2:3], null, 0x1c4, v42, v[0:1]
	v_add_co_u32 v6, vcc_lo, v2, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x360, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v7, vcc_lo
.LBB1_19:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_15 Depth=2
                                        ;       Parent Loop BB1_18 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_cmp_eq_u32 s78, s3
	s_cbranch_scc1 .LBB1_21
; %bb.20:                               ;   in Loop: Header=BB1_19 Depth=4
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[4:5], s[0:1], 2
	s_add_i32 s0, s0, 1
	v_add_co_u32 v13, vcc_lo, v67, s4
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v68, vcc_lo
	global_load_b32 v15, v[8:9], off
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v14, v[4:5], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v14, v13, v15
	global_store_b32 v[4:5], v14, off
.LBB1_21:                               ;   in Loop: Header=BB1_19 Depth=4
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 10
	s_cbranch_scc0 .LBB1_19
; %bb.22:                               ;   in Loop: Header=BB1_18 Depth=3
	global_load_b32 v8, v[4:5], off
	s_cmp_gt_u32 s78, 2
	s_cbranch_scc0 .LBB1_28
; %bb.23:                               ;   in Loop: Header=BB1_18 Depth=3
	v_mov_b32_e32 v9, 0
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ngt_f32_e32 0xc2a00000, v8
	s_cbranch_execz .LBB1_27
; %bb.24:                               ;   in Loop: Header=BB1_18 Depth=3
	v_mov_b32_e32 v9, 1.0
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f32_e32 0x42a00000, v8
	s_cbranch_execz .LBB1_26
; %bb.25:                               ;   in Loop: Header=BB1_18 Depth=3
	v_mul_f32_e32 v9, 0xbfb8aa3b, v8
	v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v13, v9
	v_fma_f32 v14, 0xbfb8aa3b, v8, -v9
	v_dual_sub_f32 v9, v9, v13 :: v_dual_fmac_f32 v14, 0xb2a5705f, v8
	v_cvt_i32_f32_e32 v13, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v9, v14
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v9, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v8
	v_cndmask_b32_e32 v9, 0x7f800000, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, 1.0, v9
	v_div_scale_f32 v13, null, v9, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v14, v13
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v13, v14, 1.0
	v_fmac_f32_e32 v14, v15, v14
	v_div_scale_f32 v15, vcc_lo, 1.0, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v15, v14
	v_fma_f32 v17, -v13, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v17, v14
	v_fma_f32 v13, -v13, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v13, v13, v14, v16
	v_div_fixup_f32 v9, v13, v9, 1.0
.LBB1_26:                               ; %Flow481
                                        ;   in Loop: Header=BB1_18 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_27:                               ; %Flow483
                                        ;   in Loop: Header=BB1_18 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
	s_branch .LBB1_29
.LBB1_28:                               ;   in Loop: Header=BB1_18 Depth=3
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr9
.LBB1_29:                               ; %Flow489
                                        ;   in Loop: Header=BB1_18 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_35
; %bb.30:                               ;   in Loop: Header=BB1_18 Depth=3
	global_load_b32 v6, v[6:7], off offset:812
	s_cmp_eq_u32 s78, 1
	s_mov_b32 s1, exec_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s78, 2
	v_cndmask_b32_e32 v7, v10, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v12, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f32_e32 0xc2a00000, v8
	s_cbranch_execz .LBB1_34
; %bb.31:                               ;   in Loop: Header=BB1_18 Depth=3
	v_mov_b32_e32 v9, 1.0
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f32_e32 0x42a00000, v8
	s_cbranch_execz .LBB1_33
; %bb.32:                               ;   in Loop: Header=BB1_18 Depth=3
	v_mul_f32_e32 v6, 0xbfb8aa3b, v8
	v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v7, v6
	v_fma_f32 v9, 0xbfb8aa3b, v8, -v6
	v_dual_sub_f32 v6, v6, v7 :: v_dual_fmac_f32 v9, 0xb2a5705f, v8
	v_cvt_i32_f32_e32 v7, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v6, v9
	v_exp_f32_e32 v6, v6
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v8
	v_cndmask_b32_e32 v6, 0x7f800000, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, 1.0, v6
	v_div_scale_f32 v7, null, v6, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, 1.0, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, v9, v8
	v_fma_f32 v14, -v7, v13, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v14, v8
	v_fma_f32 v7, -v7, v13, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v7, v7, v8, v13
	v_div_fixup_f32 v9, v7, v6, 1.0
.LBB1_33:                               ; %Flow485
                                        ;   in Loop: Header=BB1_18 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_34:                               ; %Flow487
                                        ;   in Loop: Header=BB1_18 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_35:                               ; %_Z7sigmoidf.exit.i
                                        ;   in Loop: Header=BB1_18 Depth=3
	s_add_i32 s78, s78, 1
	global_store_b32 v[4:5], v9, off
	s_cmp_lg_u32 s78, 10
	s_cbranch_scc1 .LBB1_18
; %bb.36:                               ; %.preheader123.i.preheader
                                        ;   in Loop: Header=BB1_15 Depth=2
	s_mov_b32 s78, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, s78
.LBB1_37:                               ; %.preheader123.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_15 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_38 Depth 4
	s_lshl_b64 s[4:5], s[78:79], 2
	v_dual_mov_b32 v6, v62 :: v_dual_mov_b32 v7, v63
	v_add_co_u32 v4, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, 0x338, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
.LBB1_38:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_15 Depth=2
                                        ;       Parent Loop BB1_37 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_cmp_eq_u32 s78, s1
	s_cbranch_scc1 .LBB1_40
; %bb.39:                               ;   in Loop: Header=BB1_38 Depth=4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v65, 0x3824
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v66, vcc_lo
	s_lshl_b32 s3, s0, 2
	s_add_i32 s0, s0, 1
	s_add_i32 s3, s3, 16
	s_clause 0x4
	global_load_b32 v11, v[8:9], off offset:-240
	global_load_b32 v12, v[8:9], off offset:-120
	global_load_b32 v13, v[8:9], off
	global_load_b32 v14, v[4:5], off
	global_load_b32 v8, v[8:9], off offset:-360
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v11, v11, v14
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v8, v9
	v_mul_f32_e32 v8, v12, v9
	v_fmac_f32_e32 v11, v8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v13, v11
	v_cvt_f64_f32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[8:9], s[80:81]
	v_cvt_f32_f64_e32 v8, v[8:9]
	scratch_store_b32 off, v8, s3
.LBB1_40:                               ;   in Loop: Header=BB1_38 Depth=4
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_add_i32 s1, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s1, 10
	s_cbranch_scc0 .LBB1_38
; %bb.41:                               ;   in Loop: Header=BB1_37 Depth=3
	s_add_i32 s78, s78, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s78, 10
	s_cbranch_scc1 .LBB1_37
; %bb.42:                               ; %.preheader122.i.preheader
                                        ;   in Loop: Header=BB1_15 Depth=2
	s_mov_b64 s[0:1], 0
.LBB1_43:                               ; %.preheader122.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_15 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v4, vcc_lo, v69, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v70, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 40
	global_load_b32 v6, v[4:5], off offset:864
	s_waitcnt vmcnt(0)
	s_clause 0x1
	global_store_b32 v[4:5], v6, off offset:824
	global_store_b32 v[4:5], v71, off offset:864
	s_cbranch_scc1 .LBB1_43
; %bb.44:                               ; %.preheader.i60.preheader
                                        ;   in Loop: Header=BB1_15 Depth=2
	s_mov_b32 s3, 0
	s_mov_b32 s0, 0
.LBB1_45:                               ; %.preheader.i60
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_15 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_46 Depth 4
	s_mov_b32 s4, 0
.LBB1_46:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_15 Depth=2
                                        ;       Parent Loop BB1_45 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, s4
	s_cbranch_scc1 .LBB1_48
; %bb.47:                               ;   in Loop: Header=BB1_46 Depth=4
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[0:1], 2
	s_lshl_b32 s1, s0, 2
	v_add_co_u32 v4, vcc_lo, v67, s6
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v68, vcc_lo
	s_add_i32 s1, s1, 16
	s_add_i32 s0, s0, 1
	global_load_b32 v6, v[4:5], off
	scratch_load_b32 v7, off, s1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[6:7], v6
	v_mul_f64 v[6:7], v[6:7], s[72:73]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v6, v[6:7]
	global_store_b32 v[4:5], v6, off
.LBB1_48:                               ;   in Loop: Header=BB1_46 Depth=4
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 10
	s_cbranch_scc0 .LBB1_46
; %bb.49:                               ;   in Loop: Header=BB1_45 Depth=3
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 10
	s_cbranch_scc0 .LBB1_45
; %bb.50:                               ; %_Z32nn_forward_and_update_paramenterP6CHROMOifii.exit
                                        ;   in Loop: Header=BB1_15 Depth=2
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 10
	s_cbranch_scc1 .LBB1_15
; %bb.51:                               ; %.preheader83.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s1, 0
	s_mov_b32 s4, -1
	s_mov_b32 s2, s1
.LBB1_52:                               ; %.preheader83
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s0, 9, s2
	s_mov_b32 s3, s1
	s_lshl_b64 s[6:7], s[0:1], 2
	s_lshl_b64 s[2:3], s[2:3], 2
	v_add_co_u32 v4, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s82, s74
	global_load_b32 v6, v[4:5], off offset:824
	v_add_co_u32 v4, vcc_lo, v0, v58
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v59, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v4, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	s_mov_b32 s2, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, 0x3000, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	global_load_b32 v8, v[4:5], off offset:2460
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[6:7], v6
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], s[82:83], s[74:75]
	v_fma_f64 v[6:7], 0x40590000, v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v6, v[6:7]
	v_cndmask_b32_e64 v7, 0, 1, s4
	s_mov_b32 s4, 0
	v_cmp_ne_u32_e32 vcc_lo, 1, v7
	global_store_b32 v[4:5], v6, off offset:2460
	s_cbranch_vccz .LBB1_52
; %bb.53:                               ; %.loopexit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s33, s33, 1
	s_cmpk_eq_i32 s84, 0xc8
	s_cbranch_scc0 .LBB1_2
; %bb.54:
	v_dual_mov_b32 v0, v43 :: v_dual_mov_b32 v1, v44
	v_dual_mov_b32 v2, v45 :: v_dual_mov_b32 v3, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z9benchmarkiPA2_fi@rel32@lo+4
	s_addc_u32 s1, s1, _Z9benchmarkiPA2_fi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_swappc_b64 s[30:31], s[0:1]
	v_lshlrev_b64 v[1:2], 2, v[46:47]
	v_mbcnt_lo_u32_b32 v29, -1, 0
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v5, v29
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s70, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s71, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_load_b64 s[2:3], s[76:77], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_60
; %bb.55:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[9:10], v1, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[2:3] offset:40
	global_load_b64 v[6:7], v1, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB1_59
; %bb.56:                               ; %.preheader3.i.i.i.preheader
	s_mov_b32 s5, 0
.LBB1_57:                               ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[2:3] offset:40
	global_load_b64 v[11:12], v1, s[2:3]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_57
; %bb.58:                               ; %Flow476
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_59:                               ; %Flow478
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_60:                               ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_mov_b32 s10, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[2:3] offset:40
	global_load_b128 v[1:4], v6, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v9
	v_readfirstlane_b32 s7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB1_62
; %bb.61:
	v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, v6
	s_add_i32 s10, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s9
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB1_62:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v3, v7
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v10, vcc_lo, v4, v8, vcc_lo
	v_dual_mov_b32 v5, 33 :: v_dual_mov_b32 v8, v6
	v_mov_b32_e32 v7, v6
	v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v14, s15
	v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s14
	s_clause 0x3
	global_store_b128 v[9:10], v[5:8], off
	global_store_b128 v[9:10], v[11:14], off offset:16
	global_store_b128 v[9:10], v[11:14], off offset:32
	global_store_b128 v[9:10], v[11:14], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_70
; %bb.63:
	v_mov_b32_e32 v11, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[14:15], v11, s[2:3] offset:32 glc
	global_load_b64 v[3:4], v11, s[2:3] offset:40
	v_dual_mov_b32 v12, s4 :: v_dual_mov_b32 v13, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s5, v4
	v_and_b32_e32 v3, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v5, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v5, v4
	v_add_co_u32 v7, vcc_lo, v1, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v2, v4, vcc_lo
	global_store_b64 v[7:8], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[14:15]
	s_cbranch_execz .LBB1_66
; %bb.64:                               ; %.preheader1.i.i.i.preheader
	s_mov_b32 s10, 0
.LBB1_65:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s5
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_65
.LBB1_66:                               ; %Flow474
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v6, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v5, s10, 0
	global_load_b64 v[3:4], v6, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB1_68
; %bb.67:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB1_68:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB1_70
; %bb.69:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_70:                               ; %Flow475
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v1, vcc_lo, v1, s9
	v_add_co_ci_u32_e32 v2, vcc_lo, s8, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, 20
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
.LBB1_71:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_73
; %bb.72:                               ;   in Loop: Header=BB1_71 Depth=1
	global_load_b32 v3, v[1:2], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v3, 1, v3
.LBB1_73:                               ;   in Loop: Header=BB1_71 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v3
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_75
; %bb.74:                               ;   in Loop: Header=BB1_71 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_76
.LBB1_75:                               ;   in Loop: Header=BB1_71 Depth=1
	s_mov_b32 s1, -1
.LBB1_76:                               ; %Flow469
                                        ;   in Loop: Header=BB1_71 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_71
; %bb.77:
	global_load_b64 v[1:2], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_81
; %bb.78:
	v_mov_b32_e32 v9, 0
	s_clause 0x2
	global_load_b64 v[5:6], v9, s[2:3] offset:40
	global_load_b64 v[10:11], v9, s[2:3] offset:24 glc
	global_load_b64 v[7:8], v9, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v12, vcc_lo, v5, 1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v12, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12
	v_and_b32_e32 v6, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v5, v3, v5
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v5, 24
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, v7, v5
	v_mov_b32_e32 v5, v10
	v_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo
	v_mov_b32_e32 v6, v11
	global_store_b64 v[7:8], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_81
; %bb.79:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_80:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6]
	v_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_80
.LBB1_81:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, .str@rel32@lo+4
	s_addc_u32 s5, s5, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[4:5], 0
	s_cbranch_scc0 .LBB1_167
; %bb.82:
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v31, 0 :: v_dual_and_b32 v32, 2, v1
	v_dual_mov_b32 v4, v2 :: v_dual_and_b32 v3, -3, v1
	v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v8, 1
	s_mov_b64 s[6:7], 20
.LBB1_83:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_86 Depth 2
                                        ;     Child Loop BB1_93 Depth 2
                                        ;     Child Loop BB1_101 Depth 2
                                        ;     Child Loop BB1_109 Depth 2
                                        ;     Child Loop BB1_117 Depth 2
                                        ;     Child Loop BB1_125 Depth 2
                                        ;     Child Loop BB1_133 Depth 2
                                        ;     Child Loop BB1_141 Depth 2
                                        ;     Child Loop BB1_149 Depth 2
                                        ;     Child Loop BB1_155 Depth 2
                                        ;     Child Loop BB1_164 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u64_e64 s0, s[6:7], 56
                                        ; implicit-def: $vgpr11_vgpr12
                                        ; implicit-def: $sgpr15
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s8, s6, 56
	s_cselect_b32 s9, s7, 0
	s_cmp_gt_u32 s8, 7
	s_mov_b32 s0, -1
	s_cbranch_scc1 .LBB1_88
; %bb.84:                               ;   in Loop: Header=BB1_83 Depth=1
	v_mov_b32_e32 v11, 0
	v_mov_b32_e32 v12, 0
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc1 .LBB1_87
; %bb.85:                               ; %.preheader31.i.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_lshl_b64 s[0:1], s[8:9], 3
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], s[4:5]
.LBB1_86:                               ; %.preheader31.i
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_u8 v5, v31, s[12:13]
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v30, 0xffff, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], s10, v[30:31]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	s_cmp_lg_u32 s0, s10
	v_or_b32_e32 v11, v5, v11
	v_or_b32_e32 v12, v6, v12
	s_cbranch_scc1 .LBB1_86
.LBB1_87:                               ; %Flow445
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s0, 0
	s_mov_b32 s15, 0
.LBB1_88:                               ; %Flow447
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_mov_b64 s[0:1], s[4:5]
	s_cbranch_vccnz .LBB1_90
; %bb.89:                               ;   in Loop: Header=BB1_83 Depth=1
	global_load_b64 v[11:12], v31, s[4:5]
	s_add_i32 s15, s8, -8
	s_add_u32 s0, s4, 8
	s_addc_u32 s1, s5, 0
.LBB1_90:                               ; %.loopexit32.i
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_cmp_gt_u32 s15, 7
	s_cbranch_scc1 .LBB1_95
; %bb.91:                               ;   in Loop: Header=BB1_83 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_cmp_eq_u32 s15, 0
	s_cbranch_scc1 .LBB1_94
; %bb.92:                               ; %.preheader29.i.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_93:                               ; %.preheader29.i
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v5, v31, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v30, 0xffff, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], s10, v[30:31]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s15, s12
	v_or_b32_e32 v13, v5, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v14, v6, v14
	s_cbranch_scc1 .LBB1_93
.LBB1_94:                               ; %Flow440
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s14, 0
	s_branch .LBB1_96
.LBB1_95:                               ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $vgpr13_vgpr14
                                        ; implicit-def: $sgpr14
.LBB1_96:                               ; %Flow442
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_98
; %bb.97:                               ;   in Loop: Header=BB1_83 Depth=1
	global_load_b64 v[13:14], v31, s[0:1]
	s_add_i32 s14, s15, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_98:                               ; %.loopexit30.i
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_cmp_gt_u32 s14, 7
	s_cbranch_scc1 .LBB1_103
; %bb.99:                               ;   in Loop: Header=BB1_83 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_cmp_eq_u32 s14, 0
	s_cbranch_scc1 .LBB1_102
; %bb.100:                              ; %.preheader27.i.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_101:                              ; %.preheader27.i
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v5, v31, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v30, 0xffff, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], s10, v[30:31]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s14, s12
	v_or_b32_e32 v15, v5, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v16, v6, v16
	s_cbranch_scc1 .LBB1_101
.LBB1_102:                              ; %Flow435
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s15, 0
	s_branch .LBB1_104
.LBB1_103:                              ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $sgpr15
.LBB1_104:                              ; %Flow437
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_106
; %bb.105:                              ;   in Loop: Header=BB1_83 Depth=1
	global_load_b64 v[15:16], v31, s[0:1]
	s_add_i32 s15, s14, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_106:                              ; %.loopexit28.i
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_cmp_gt_u32 s15, 7
	s_cbranch_scc1 .LBB1_111
; %bb.107:                              ;   in Loop: Header=BB1_83 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_cmp_eq_u32 s15, 0
	s_cbranch_scc1 .LBB1_110
; %bb.108:                              ; %.preheader25.i.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_109:                              ; %.preheader25.i
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v5, v31, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v30, 0xffff, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], s10, v[30:31]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s15, s12
	v_or_b32_e32 v17, v5, v17
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v18, v6, v18
	s_cbranch_scc1 .LBB1_109
.LBB1_110:                              ; %Flow430
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s14, 0
	s_branch .LBB1_112
.LBB1_111:                              ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $sgpr14
.LBB1_112:                              ; %Flow432
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_114
; %bb.113:                              ;   in Loop: Header=BB1_83 Depth=1
	global_load_b64 v[17:18], v31, s[0:1]
	s_add_i32 s14, s15, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_114:                              ; %.loopexit26.i
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_cmp_gt_u32 s14, 7
	s_cbranch_scc1 .LBB1_119
; %bb.115:                              ;   in Loop: Header=BB1_83 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_cmp_eq_u32 s14, 0
	s_cbranch_scc1 .LBB1_118
; %bb.116:                              ; %.preheader23.i.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_117:                              ; %.preheader23.i
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v5, v31, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v30, 0xffff, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], s10, v[30:31]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s14, s12
	v_or_b32_e32 v19, v5, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v20, v6, v20
	s_cbranch_scc1 .LBB1_117
.LBB1_118:                              ; %Flow425
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s15, 0
	s_branch .LBB1_120
.LBB1_119:                              ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $sgpr15
.LBB1_120:                              ; %Flow427
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_122
; %bb.121:                              ;   in Loop: Header=BB1_83 Depth=1
	global_load_b64 v[19:20], v31, s[0:1]
	s_add_i32 s15, s14, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_122:                              ; %.loopexit24.i
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_cmp_gt_u32 s15, 7
	s_cbranch_scc1 .LBB1_127
; %bb.123:                              ;   in Loop: Header=BB1_83 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_cmp_eq_u32 s15, 0
	s_cbranch_scc1 .LBB1_126
; %bb.124:                              ; %.preheader21.i.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], 0
.LBB1_125:                              ; %.preheader21.i
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s0, s12
	s_addc_u32 s17, s1, s13
	s_add_u32 s12, s12, 1
	global_load_u8 v5, v31, s[16:17]
	s_addc_u32 s13, s13, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v30, 0xffff, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], s10, v[30:31]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s15, s12
	v_or_b32_e32 v21, v5, v21
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v22, v6, v22
	s_cbranch_scc1 .LBB1_125
.LBB1_126:                              ; %Flow420
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, 0
	s_mov_b32 s14, 0
	s_branch .LBB1_128
.LBB1_127:                              ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $vgpr21_vgpr22
                                        ; implicit-def: $sgpr14
.LBB1_128:                              ; %Flow422
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_130
; %bb.129:                              ;   in Loop: Header=BB1_83 Depth=1
	global_load_b64 v[21:22], v31, s[0:1]
	s_add_i32 s14, s15, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_130:                              ; %.loopexit22.i
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_cmp_gt_u32 s14, 7
	s_cbranch_scc1 .LBB1_135
; %bb.131:                              ;   in Loop: Header=BB1_83 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_cmp_eq_u32 s14, 0
	s_cbranch_scc1 .LBB1_134
; %bb.132:                              ; %.preheader.i61.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b64 s[12:13], s[0:1]
.LBB1_133:                              ; %.preheader.i61
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_u8 v5, v31, s[12:13]
	s_add_i32 s14, s14, -1
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v30, 0xffff, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], s10, v[30:31]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	s_cmp_lg_u32 s14, 0
	v_or_b32_e32 v23, v5, v23
	v_or_b32_e32 v24, v6, v24
	s_cbranch_scc1 .LBB1_133
.LBB1_134:                              ; %Flow415
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, 0
	s_branch .LBB1_136
.LBB1_135:                              ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s10, -1
.LBB1_136:                              ; %Flow417
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB1_138
; %bb.137:                              ;   in Loop: Header=BB1_83 Depth=1
	global_load_b64 v[23:24], v31, s[0:1]
.LBB1_138:                              ; %.loopexit.i
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v30, v29 :: v_dual_mov_b32 v5, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v30
	v_mov_b32_e32 v6, 0
	v_cmp_eq_u32_e64 s0, s0, v30
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_144
; %bb.139:                              ;   in Loop: Header=BB1_83 Depth=1
	global_load_b64 v[27:28], v31, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[5:6], v31, s[2:3] offset:40
	global_load_b64 v[9:10], v31, s[2:3]
	s_mov_b32 s10, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v6, v6, v28
	v_and_b32_e32 v5, v5, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v6, v6, 24
	v_mul_hi_u32 v25, v5, 24
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v25, v6
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v9, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, v10, v6, vcc_lo
	global_load_b64 v[25:26], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v31, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[27:28]
	s_cbranch_execz .LBB1_143
; %bb.140:                              ; %.preheader3.i.i19.i.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s11, 0
.LBB1_141:                              ; %.preheader3.i.i19.i
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[9:10], v31, s[2:3] offset:40
	global_load_b64 v[25:26], v31, s[2:3]
	v_dual_mov_b32 v28, v6 :: v_dual_mov_b32 v27, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v9, v9, v27
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[5:6], null, v9, 24, v[25:26]
	v_and_b32_e32 v25, v10, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v25, 24, v[6:7]
	v_mov_b32_e32 v6, v9
	global_load_b64 v[25:26], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v31, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[27:28]
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB1_141
; %bb.142:                              ; %Flow410
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB1_143:                              ; %Flow412
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s10
.LBB1_144:                              ; %.loopexit4.i.i14.i
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v31, s[2:3] offset:40
	global_load_b128 v[25:28], v31, s[2:3]
	v_readfirstlane_b32 s10, v5
	v_readfirstlane_b32 s11, v6
	s_mov_b32 s16, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s12, v9
	v_readfirstlane_b32 s13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[12:13], s[10:11], s[12:13]
	s_mul_i32 s1, s13, 24
	s_mul_hi_u32 s14, s12, 24
	s_mul_i32 s15, s12, 24
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB1_146
; %bb.145:                              ;   in Loop: Header=BB1_83 Depth=1
	v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v6, v31
	s_add_i32 s16, s14, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v25, s15
	v_add_co_ci_u32_e32 v10, vcc_lo, s16, v26, vcc_lo
	global_store_b128 v[9:10], v[5:8], off offset:8
.LBB1_146:                              ;   in Loop: Header=BB1_83 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56
	v_or_b32_e32 v5, 0, v4
	v_or_b32_e32 v6, v3, v32
	s_lshl_b64 s[12:13], s[12:13], 12
	s_lshl_b32 s16, s8, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s16, s16, 28
	v_dual_cndmask_b32 v10, v5, v4 :: v_dual_cndmask_b32 v5, v6, v3
	v_lshlrev_b64 v[3:4], 6, v[30:31]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v27, s12
	v_add_co_ci_u32_e32 v28, vcc_lo, s13, v28, vcc_lo
	s_and_b32 s16, s16, 0x1e0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v27, vcc_lo, v6, v3
	v_and_or_b32 v9, 0xffffff1f, v5, s16
	v_add_co_ci_u32_e32 v28, vcc_lo, v28, v4, vcc_lo
	s_clause 0x3
	global_store_b128 v[27:28], v[9:12], off
	global_store_b128 v[27:28], v[13:16], off offset:16
	global_store_b128 v[27:28], v[17:20], off offset:32
	global_store_b128 v[27:28], v[21:24], off offset:48
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB1_154
; %bb.147:                              ;   in Loop: Header=BB1_83 Depth=1
	s_clause 0x1
	global_load_b64 v[13:14], v31, s[2:3] offset:32 glc
	global_load_b64 v[3:4], v31, s[2:3] offset:40
	v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v12, s11
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v3
	v_readfirstlane_b32 s17, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[10:11]
	s_mul_i32 s13, s17, 24
	s_mul_hi_u32 s17, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s17, s17, s13
	v_add_co_u32 v9, vcc_lo, v25, s16
	v_add_co_ci_u32_e32 v10, vcc_lo, s17, v26, vcc_lo
	s_mov_b32 s13, exec_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v31, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[13:14]
	s_cbranch_execz .LBB1_150
; %bb.148:                              ; %.preheader1.i.i17.i.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s16, 0
.LBB1_149:                              ; %.preheader1.i.i17.i
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v4, s11
	s_sleep 1
	global_store_b64 v[9:10], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v31, v[3:6], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB1_149
.LBB1_150:                              ; %Flow408
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	global_load_b64 v[3:4], v31, s[2:3] offset:16
	s_mov_b32 s16, exec_lo
	s_mov_b32 s13, exec_lo
	v_mbcnt_lo_u32_b32 v5, s16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB1_152
; %bb.151:                              ;   in Loop: Header=BB1_83 Depth=1
	s_bcnt1_i32_b32 s16, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v30, s16
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[30:31], off offset:8
.LBB1_152:                              ;   in Loop: Header=BB1_83 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB1_154
; %bb.153:                              ;   in Loop: Header=BB1_83 Depth=1
	global_load_b32 v30, v[3:4], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s13, v30
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[30:31], off
	s_and_b32 m0, s13, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_154:                              ; %Flow409
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s14, s14, s1
	v_add_co_u32 v3, vcc_lo, v25, s15
	v_add_co_ci_u32_e32 v4, vcc_lo, s14, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_155:                              ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v5, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_157
; %bb.156:                              ;   in Loop: Header=BB1_155 Depth=2
	global_load_b32 v5, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v5, 1, v5
.LBB1_157:                              ;   in Loop: Header=BB1_155 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v5
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_159
; %bb.158:                              ;   in Loop: Header=BB1_155 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_160
.LBB1_159:                              ;   in Loop: Header=BB1_155 Depth=2
	s_mov_b32 s1, -1
.LBB1_160:                              ; %Flow403
                                        ;   in Loop: Header=BB1_155 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_155
; %bb.161:                              ;   in Loop: Header=BB1_83 Depth=1
	global_load_b128 v[3:6], v[27:28], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_165
; %bb.162:                              ;   in Loop: Header=BB1_83 Depth=1
	s_clause 0x2
	global_load_b64 v[5:6], v31, s[2:3] offset:40
	global_load_b64 v[13:14], v31, s[2:3] offset:24 glc
	global_load_b64 v[11:12], v31, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v15, vcc_lo, v5, 1
	v_add_co_ci_u32_e32 v16, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v15, s10
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[9:10]
	v_dual_cndmask_b32 v10, v10, v16 :: v_dual_cndmask_b32 v9, v9, v15
	v_and_b32_e32 v6, v10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v5, v9, v5
	v_mul_hi_u32 v15, v5, 24
	v_mul_lo_u32 v5, v5, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, vcc_lo, v11, v5
	v_mov_b32_e32 v11, v13
	v_mul_lo_u32 v6, v6, 24
	v_add_nc_u32_e32 v6, v15, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, v12, v6, vcc_lo
	v_mov_b32_e32 v12, v14
	global_store_b64 v[5:6], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v31, v[9:12], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[11:12], v[13:14]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_165
; %bb.163:                              ; %.preheader.i.i16.i.preheader
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_mov_b32 s0, 0
.LBB1_164:                              ; %.preheader.i.i16.i
                                        ;   Parent Loop BB1_83 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[5:6], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[13:14], v31, v[9:12], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[11:12]
	v_dual_mov_b32 v11, v13 :: v_dual_mov_b32 v12, v14
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_164
.LBB1_165:                              ; %__ockl_hostcall_preview.exit20.i
                                        ;   in Loop: Header=BB1_83 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_sub_u32 s6, s6, s8
	s_subb_u32 s7, s7, s9
	s_add_u32 s4, s4, s8
	s_addc_u32 s5, s5, s9
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc1 .LBB1_83
; %bb.166:                              ; %Flow448
	s_mov_b32 s0, 0
	s_branch .LBB1_168
.LBB1_167:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB1_168:                              ; %Flow463
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB1_197
; %bb.169:
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v3, v29
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v3
	v_cmp_eq_u32_e64 s0, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_175
; %bb.170:
	v_mov_b32_e32 v4, 0
	s_mov_b32 s4, exec_lo
	global_load_b64 v[7:8], v4, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[5:6], v4, s[2:3] offset:40
	global_load_b64 v[9:10], v4, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v5, v5, v7
	v_and_b32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v5, 24
	v_mul_lo_u32 v6, v6, 24
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v11, v6
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v9, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, v10, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v4, v[5:8], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[7:8]
	s_cbranch_execz .LBB1_174
; %bb.171:                              ; %.preheader3.i.i.i67.preheader
	s_mov_b32 s5, 0
.LBB1_172:                              ; %.preheader3.i.i.i67
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[5:6], v4, s[2:3] offset:40
	global_load_b64 v[11:12], v4, s[2:3]
	v_dual_mov_b32 v7, v9 :: v_dual_mov_b32 v8, v10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v5, v5, v7
	v_and_b32_e32 v6, v6, v8
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[11:12]
	v_mov_b32_e32 v5, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v6, 24, v[5:6]
	global_load_b64 v[5:6], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v4, v[5:8], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[7:8]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_172
; %bb.173:                              ; %Flow460
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_174:                              ; %Flow462
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_175:                              ; %.loopexit4.i.i.i62
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, 0
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_mov_b32 s10, exec_lo
	s_clause 0x1
	global_load_b64 v[11:12], v4, s[2:3] offset:40
	global_load_b128 v[5:8], v4, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB1_177
; %bb.176:
	v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, v4
	s_add_i32 s10, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, vcc_lo, v5, s9
	v_add_co_ci_u32_e32 v14, vcc_lo, s10, v6, vcc_lo
	v_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1
	global_store_b128 v[13:14], v[9:12], off offset:8
.LBB1_177:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[9:10], 6, v[3:4]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, s6
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v9
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v1, 0xffffff1f, v1, 32
	v_add_co_ci_u32_e32 v8, vcc_lo, v8, v10, vcc_lo
	v_mov_b32_e32 v3, v4
	v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v12, s15
	v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, s14
	s_clause 0x3
	global_store_b128 v[7:8], v[1:4], off
	global_store_b128 v[7:8], v[9:12], off offset:16
	global_store_b128 v[7:8], v[9:12], off offset:32
	global_store_b128 v[7:8], v[9:12], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_185
; %bb.178:
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s4
	v_mov_b32_e32 v13, s5
	s_clause 0x1
	global_load_b64 v[14:15], v11, s[2:3] offset:32 glc
	global_load_b64 v[1:2], v11, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v1
	v_readfirstlane_b32 s11, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[10:11], s[4:5]
	s_mul_i32 s7, s11, 24
	s_mul_hi_u32 s11, s10, 24
	s_mul_i32 s10, s10, 24
	s_add_i32 s11, s11, s7
	v_add_co_u32 v9, vcc_lo, v5, s10
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v6, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[9:10], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v11, v[12:15], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[3:4], v[14:15]
	s_cbranch_execz .LBB1_181
; %bb.179:                              ; %.preheader1.i.i.i65.preheader
	s_mov_b32 s10, 0
.LBB1_180:                              ; %.preheader1.i.i.i65
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
	s_sleep 1
	global_store_b64 v[9:10], v[3:4], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[1:2], v11, v[1:4], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[3:4]
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_180
.LBB1_181:                              ; %Flow458
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v4, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v3, s10, 0
	global_load_b64 v[1:2], v4, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_183
; %bb.182:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v3, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[1:2], v[3:4], off offset:8
.LBB1_183:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[3:4], v[1:2], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	s_cbranch_vccnz .LBB1_185
; %bb.184:
	global_load_b32 v1, v[1:2], off offset:24
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v1
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[3:4], v[1:2], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_185:                              ; %Flow459
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v1, vcc_lo, v5, s9
	v_add_co_ci_u32_e32 v2, vcc_lo, s8, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, 20
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
.LBB1_186:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_188
; %bb.187:                              ;   in Loop: Header=BB1_186 Depth=1
	global_load_b32 v3, v[1:2], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v3, 1, v3
.LBB1_188:                              ;   in Loop: Header=BB1_186 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v3
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_190
; %bb.189:                              ;   in Loop: Header=BB1_186 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_191
.LBB1_190:                              ;   in Loop: Header=BB1_186 Depth=1
	s_mov_b32 s1, -1
.LBB1_191:                              ; %Flow453
                                        ;   in Loop: Header=BB1_186 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_186
; %bb.192:
	global_load_b128 v[3:6], v[7:8], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_196
; %bb.193:
	v_mov_b32_e32 v9, 0
	s_clause 0x2
	global_load_b64 v[1:2], v9, s[2:3] offset:40
	global_load_b64 v[10:11], v9, s[2:3] offset:24 glc
	global_load_b64 v[7:8], v9, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v12, vcc_lo, v1, 1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v12, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12
	v_and_b32_e32 v2, v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v5, v1
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v1, 24
	v_mul_lo_u32 v1, v1, 24
	v_add_nc_u32_e32 v2, v12, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, v7, v1
	v_mov_b32_e32 v7, v10
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	v_mov_b32_e32 v8, v11
	global_store_b64 v[1:2], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_196
; %bb.194:                              ; %.preheader.i.i.i64.preheader
	s_mov_b32 s0, 0
.LBB1_195:                              ; %.preheader.i.i.i64
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[1:2], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8]
	v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_195
.LBB1_196:                              ; %__ockl_hostcall_preview.exit.i
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_197:                              ; %__ockl_printf_append_string_n.exit
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v5, v29
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v5
	v_cmp_eq_u32_e64 s0, s0, v5
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_203
; %bb.198:
	v_mov_b32_e32 v6, 0
	s_mov_b32 s4, exec_lo
	global_load_b64 v[9:10], v6, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v9
	v_and_b32_e32 v2, v2, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v11, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	global_load_b64 v[7:8], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v6, v[7:10], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[9:10]
	s_cbranch_execz .LBB1_202
; %bb.199:                              ; %.preheader3.i.i.i74.preheader
	s_mov_b32 s5, 0
.LBB1_200:                              ; %.preheader3.i.i.i74
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[7:8], v6, s[2:3] offset:40
	global_load_b64 v[11:12], v6, s[2:3]
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v7, v7, v9
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v7, 24, v[11:12]
	v_and_b32_e32 v11, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v11, 24, v[2:3]
	v_mov_b32_e32 v2, v7
	global_load_b64 v[7:8], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v6, v[7:10], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[9:10]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_200
; %bb.201:                              ; %Flow396
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_202:                              ; %Flow398
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_203:                              ; %.loopexit4.i.i.i68
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s4, v1
	v_readfirstlane_b32 s5, v2
	s_mov_b32 s10, exec_lo
	s_clause 0x1
	global_load_b64 v[11:12], v6, s[2:3] offset:40
	global_load_b128 v[7:10], v6, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB1_205
; %bb.204:
	v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v12, v6
	s_add_i32 s10, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, s9
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v8, vcc_lo
	v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1
	global_store_b128 v[1:2], v[11:14], off offset:8
.LBB1_205:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[1:2], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v9, s6
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v5, v1
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v3, 0xffffff1f, v3, 32
	v_add_co_ci_u32_e32 v10, vcc_lo, v10, v2, vcc_lo
	v_mov_b32_e32 v5, v46
	v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v14, s15
	v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s14
	s_clause 0x3
	global_store_b128 v[9:10], v[3:6], off
	global_store_b128 v[9:10], v[11:14], off offset:16
	global_store_b128 v[9:10], v[11:14], off offset:32
	global_store_b128 v[9:10], v[11:14], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_213
; %bb.206:
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s4
	v_mov_b32_e32 v13, s5
	s_clause 0x1
	global_load_b64 v[14:15], v11, s[2:3] offset:32 glc
	global_load_b64 v[1:2], v11, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v1
	v_readfirstlane_b32 s11, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[10:11], s[4:5]
	s_mul_i32 s7, s11, 24
	s_mul_hi_u32 s11, s10, 24
	s_mul_i32 s10, s10, 24
	s_add_i32 s11, s11, s7
	v_add_co_u32 v5, vcc_lo, v7, s10
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v8, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[5:6], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v11, v[12:15], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[3:4], v[14:15]
	s_cbranch_execz .LBB1_209
; %bb.207:                              ; %.preheader1.i.i.i72.preheader
	s_mov_b32 s10, 0
.LBB1_208:                              ; %.preheader1.i.i.i72
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
	s_sleep 1
	global_store_b64 v[5:6], v[3:4], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[1:2], v11, v[1:4], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[3:4]
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_208
.LBB1_209:                              ; %Flow394
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v4, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v3, s10, 0
	global_load_b64 v[1:2], v4, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_211
; %bb.210:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v3, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[1:2], v[3:4], off offset:8
.LBB1_211:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[3:4], v[1:2], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	s_cbranch_vccnz .LBB1_213
; %bb.212:
	global_load_b32 v1, v[1:2], off offset:24
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v1
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[3:4], v[1:2], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_213:                              ; %Flow395
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v1, vcc_lo, v7, s9
	v_add_co_ci_u32_e32 v2, vcc_lo, s8, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, 20
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
.LBB1_214:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_216
; %bb.215:                              ;   in Loop: Header=BB1_214 Depth=1
	global_load_b32 v3, v[1:2], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v3, 1, v3
.LBB1_216:                              ;   in Loop: Header=BB1_214 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v3
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_218
; %bb.217:                              ;   in Loop: Header=BB1_214 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_219
.LBB1_218:                              ;   in Loop: Header=BB1_214 Depth=1
	s_mov_b32 s1, -1
.LBB1_219:                              ; %Flow389
                                        ;   in Loop: Header=BB1_214 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_214
; %bb.220:
	global_load_b64 v[1:2], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_224
; %bb.221:
	v_mov_b32_e32 v9, 0
	s_clause 0x2
	global_load_b64 v[5:6], v9, s[2:3] offset:40
	global_load_b64 v[10:11], v9, s[2:3] offset:24 glc
	global_load_b64 v[7:8], v9, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v12, vcc_lo, v5, 1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v12, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12
	v_and_b32_e32 v6, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v5, v3, v5
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v5, 24
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, v7, v5
	v_mov_b32_e32 v5, v10
	v_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo
	v_mov_b32_e32 v6, v11
	global_store_b64 v[7:8], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_224
; %bb.222:                              ; %.preheader.i.i.i71.preheader
	s_mov_b32 s0, 0
.LBB1_223:                              ; %.preheader.i.i.i71
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6]
	v_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_223
.LBB1_224:                              ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v29
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v29
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_230
; %bb.225:
	v_mov_b32_e32 v5, 0
	s_mov_b32 s4, exec_lo
	global_load_b64 v[8:9], v5, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[2:3] offset:40
	global_load_b64 v[6:7], v5, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v9
	v_and_b32_e32 v3, v3, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v10, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v10, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo
	global_load_b64 v[6:7], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v5, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[3:4], v[8:9]
	s_cbranch_execz .LBB1_229
; %bb.226:                              ; %.preheader3.i.i.i81.preheader
	s_mov_b32 s5, 0
.LBB1_227:                              ; %.preheader3.i.i.i81
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v5, s[2:3] offset:40
	global_load_b64 v[10:11], v5, s[2:3]
	v_dual_mov_b32 v9, v4 :: v_dual_mov_b32 v8, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v6, 24, v[10:11]
	v_and_b32_e32 v10, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v10, 24, v[4:5]
	v_mov_b32_e32 v4, v6
	global_load_b64 v[6:7], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v5, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_227
; %bb.228:                              ; %Flow382
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_229:                              ; %Flow384
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_230:                              ; %.loopexit4.i.i.i75
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v30, 0
	v_readfirstlane_b32 s4, v3
	v_readfirstlane_b32 s5, v4
	s_mov_b32 s10, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v30, s[2:3] offset:40
	global_load_b128 v[5:8], v30, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v9
	v_readfirstlane_b32 s7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB1_232
; %bb.231:
	v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, v30
	s_add_i32 s10, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v5, s9
	v_add_co_ci_u32_e32 v4, vcc_lo, s10, v6, vcc_lo
	v_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1
	global_store_b128 v[3:4], v[9:12], off offset:8
.LBB1_232:
	s_or_b32 exec_lo, exec_lo, s11
	v_cvt_f64_f32_e32 v[3:4], v0
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[9:10], 6, v[29:30]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v7, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v8, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v0, v9
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v1, 0xffffff1d, v1, 34
	v_add_co_ci_u32_e32 v12, vcc_lo, v7, v10, vcc_lo
	v_dual_mov_b32 v7, s12 :: v_dual_mov_b32 v8, s13
	v_dual_mov_b32 v9, s14 :: v_dual_mov_b32 v10, s15
	s_clause 0x3
	global_store_b128 v[11:12], v[1:4], off
	global_store_b128 v[11:12], v[7:10], off offset:16
	global_store_b128 v[11:12], v[7:10], off offset:32
	global_store_b128 v[11:12], v[7:10], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_240
; %bb.233:
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v9, s4
	v_mov_b32_e32 v10, s5
	s_clause 0x1
	global_load_b64 v[11:12], v4, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v4, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v0
	v_readfirstlane_b32 s11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[10:11], s[4:5]
	s_mul_i32 s7, s11, 24
	s_mul_hi_u32 s11, s10, 24
	s_mul_i32 s10, s10, 24
	s_add_i32 s11, s11, s7
	v_add_co_u32 v7, vcc_lo, v5, s10
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v4, v[9:12], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB1_236
; %bb.234:                              ; %.preheader1.i.i.i79.preheader
	s_mov_b32 s10, 0
.LBB1_235:                              ; %.preheader1.i.i.i79
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[7:8], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v4, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_235
.LBB1_236:                              ; %Flow380
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s10, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_238
; %bb.237:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_238:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_240
; %bb.239:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_240:                              ; %Flow381
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v5, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_241:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_243
; %bb.242:                              ;   in Loop: Header=BB1_241 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_243:                              ;   in Loop: Header=BB1_241 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_245
; %bb.244:                              ;   in Loop: Header=BB1_241 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_246
.LBB1_245:                              ;   in Loop: Header=BB1_241 Depth=1
	s_mov_b32 s1, -1
.LBB1_246:                              ; %Flow375
                                        ;   in Loop: Header=BB1_241 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_241
; %bb.247:
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_251
; %bb.248:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3] offset:24 glc
	global_load_b64 v[4:5], v6, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_251
; %bb.249:                              ; %.preheader.i.i.i78.preheader
	s_mov_b32 s0, 0
.LBB1_250:                              ; %.preheader.i.i.i78
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_250
.LBB1_251:                              ; %__ockl_printf_append_args.exit82
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 396
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 72
		.amdhsa_next_free_sgpr 86
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION, .Lfunc_end1-_Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 10832
; NumSgprs: 88
; NumVgprs: 72
; ScratchSize: 396
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 10
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 88
; NumVGPRsForWavesPerEU: 72
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"in fitness[%d]: %f\n"
	.size	.str, 20

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         112
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION
    .private_segment_fixed_size: 396
    .sgpr_count:     88
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelP6CHROMOPfP10IN_FITNESSP11IN_POSITION.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     72
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
