#include<cuda.h>
#include<time.h>
__global__ void _AFFINE_KERNEL_1(int* ,int ,int* ,int ,int ,int, int, int, int );

__global__ void _AFFINE_KERNEL(int* ,int ,int* ,int ,int ,int ,int ,int ,int ,int );

#include<stdio.h>
#include<stdlib.h>
int main(int argc, char** argv)
{
    int N = 1000;
	int N_NODES = 100;
	int data = 1;
	int _NTHREAD = 1, _NBLOCK = 1;
	char* readfile, *outfile;
	if(argc>1) _NTHREAD = atoi(argv[1]);
	if(argc>2) _NBLOCK = atoi(argv[2]);
	if(argc>3) data = atoi(argv[3]) + 1;
	if(argc>4) readfile = argv[4];
	int i,j;
	FILE* f;
	f = fopen(readfile, "r");
	j=0;
	char c;
	while(1){
		c = fgetc(f);
		if(c=='\n') { 
			j++;
			c = fgetc(f);
			if(c!='%') break;
		}
	}
	fscanf(f, "%d", &N_NODES);
	fscanf(f, "%d", &N_NODES);
	fscanf(f, "%d", &N);
	if(2*N<_NTHREAD*_NBLOCK) {
		printf("%d\n",_NTHREAD*_NBLOCK);
		fclose(f);
		return 0;
	}
	struct timespec start, end, mid_start, mid_end;
	double runTime, pre_time, post_time, computeTime;
    outfile = (char*)malloc(sizeof(char)*(strlen(readfile)+50));
	strcpy(outfile, readfile);
	strcat(outfile, ".data_Higbie1_TD");
	FILE* fp;
	fp = fopen(outfile, "a");
    int M,I; 
    M=sqrt(2.0*N); 
    int XP1[M][M],XS3[N];  
    i=0;
    j=0;
    for (I = 0; I < N; I++) 
    {
        if((j<=M-1)&&(i<=M-1))
        {
            fscanf(f, "%d", &XP1[i][j++]);
            XS3[I]=XP1[i][j-1];
            if(j<M)    fscanf(f, "%d", &XP1[i][j++]);
            else if(i<M-1)
            {
                j=0;
                fscanf(f, "%d", &XP1[++i][j++]);
            }
        }
        else if((j==M)&&(i<M-1))
        {
            j=0;
            fscanf(f, "%d", &XP1[++i][j++]);
            XS3[I]=XP1[i][j-1];
            fscanf(f, "%d", &XP1[i][j++]);
        }
        else if(i==M-1)
		    fscanf(f, "%d", &XS3[I]);
	}
    clock_gettime(CLOCK_MONOTONIC, &start);
    
	int _SZ_XS3_1 = N;
	int _SZ_XP1_2 = M;
	int _SZ_XP1_1 = M;
	int *_DEV_XS3;
	cudaMalloc((void**) &_DEV_XS3, sizeof(int)*_SZ_XS3_1);
	cudaMemcpy(_DEV_XS3, XS3, sizeof(int)*_SZ_XS3_1, cudaMemcpyHostToDevice);
	int *_DEV_XP1;
	cudaMalloc((void**) &_DEV_XP1, sizeof(int)*_SZ_XP1_2*_SZ_XP1_1);
	cudaMemcpy(_DEV_XP1, XP1, sizeof(int)*_SZ_XP1_2*_SZ_XP1_1, cudaMemcpyHostToDevice);
	float _NUM_THREADS = M*M,_NUM_BLOCKS=1;
	int _NUM_TILE=1;
	dim3 _THREADS(512);
	dim3 _BLOCKS(1);
	if(_NUM_THREADS < _NTHREAD)
	{
		_THREADS.x=M;
		_THREADS.y=M;
	}
	else {
		_NUM_BLOCKS=_NUM_THREADS/256;
		_BLOCKS.x=_BLOCKS.y=ceil(sqrt(_NUM_BLOCKS));
		_THREADS.x=_THREADS.y=ceil(sqrt((M*M*1.0)/(_BLOCKS.x*_BLOCKS.y)));
		int temp=_NUM_BLOCKS;
		if(_NUM_BLOCKS>_NBLOCK)
			_NUM_TILE=(temp % _NBLOCK == 0)?(_NUM_BLOCKS/_NBLOCK):((_NUM_BLOCKS/_NBLOCK)+1);
	}
	int _CUDA_TILE;
	int lambda=3*M+4;
	int id_1,id_2,id_3,id_4,id_5;
	int UB_1=M-0;
	int UB_2=M-0;
	clock_gettime(CLOCK_MONOTONIC, &mid_start);
	for(id_1=1;id_1<=(UB_1*UB_2);id_1+=lambda) {
		id_2=(id_1/UB_2);
		id_3=((id_1+lambda)/UB_2);
		id_4=(id_1%UB_2)-1;
		id_5=UB_2-((id_1+lambda)%UB_2);

		for(_CUDA_TILE=0;_CUDA_TILE<_NUM_TILE;_CUDA_TILE++)
		{
			_AFFINE_KERNEL_1<<<_BLOCKS,_THREADS>>>(_DEV_XS3, _SZ_XS3_1, _DEV_XP1, _SZ_XP1_2, _SZ_XP1_1, id_2, id_4, UB_2, _CUDA_TILE);
		    cudaDeviceSynchronize();
        }
		for(_CUDA_TILE=0;_CUDA_TILE<_NUM_TILE;_CUDA_TILE++)
		{
			_AFFINE_KERNEL<<<_BLOCKS,_THREADS>>>(_DEV_XS3, _SZ_XS3_1, _DEV_XP1, _SZ_XP1_2, _SZ_XP1_1, id_2, id_3, 0, M, _CUDA_TILE);
		    cudaDeviceSynchronize();
        }
		for(_CUDA_TILE=0;_CUDA_TILE<_NUM_TILE;_CUDA_TILE++)
		{
			_AFFINE_KERNEL_1<<<_BLOCKS,_THREADS>>>(_DEV_XS3, _SZ_XS3_1, _DEV_XP1, _SZ_XP1_2, _SZ_XP1_1, id_3, 0, id_5, _CUDA_TILE);
		    cudaDeviceSynchronize();
		}
	}
	clock_gettime(CLOCK_MONOTONIC, &mid_end);
	cudaMemcpy(XP1, _DEV_XP1, sizeof(int)*_SZ_XP1_2*_SZ_XP1_1, cudaMemcpyDeviceToHost);
	cudaFree(_DEV_XP1);
    clock_gettime(CLOCK_MONOTONIC, &end);
	pre_time = (double) ((((&mid_start)->tv_sec * 1000000000) + (&mid_start)->tv_nsec) - (((&start)->tv_sec * 1000000000) + (&start)->tv_nsec)) / 1000000000;
	post_time = (double) ((((&end)->tv_sec * 1000000000) + (&end)->tv_nsec) - (((&mid_end)->tv_sec * 1000000000) + (&mid_end)->tv_nsec)) / 1000000000;
	computeTime = (double) ((((&mid_end)->tv_sec * 1000000000) + (&mid_end)->tv_nsec) - (((&mid_start)->tv_sec * 1000000000) + (&mid_start)->tv_nsec)) / 1000000000;
	
	runTime = (double) ((((&end)->tv_sec * 1000000000) + (&end)->tv_nsec) - (((&start)->tv_sec * 1000000000) + (&start)->tv_nsec)) / 1000000000;
	printf("********************************\n");
	fprintf(fp,"%d,%d,%d,%d,%d,%.14f,%.14f,%.14f,%.14f,%d\n",N,_NTHREAD*_NBLOCK,_THREADS.x,_BLOCKS.x,data,pre_time,computeTime,post_time,runTime,_CUDA_TILE);
	printf("RUN TIME: %.14f\n", runTime);

	fclose(fp);
	fclose(f);
    return 0;
}



__global__ void _AFFINE_KERNEL_1(int* XS3,int _SZ_XS3_1,int* XP1,int _SZ_XP1_2,int _SZ_XP1_1,int i, int id_1, int UB_1, int _CUDA_TILE)
{
	int j = gridDim.y*blockDim.y*_CUDA_TILE + blockDim.y*blockIdx.y + threadIdx.y;
	if((id_1<=j)&&(j<=UB_1)){
		XP1[i*_SZ_XP1_1+j]=XP1[(i+3)*_SZ_XP1_1+j+4]+XS3[i];
	}
}



__global__ void _AFFINE_KERNEL(int* XS3,int _SZ_XS3_1,int* XP1,int _SZ_XP1_2,int _SZ_XP1_1,int CUDA_L_i,int CUDA_U_i, int CUDA_L_j,int CUDA_U_j, int _CUDA_TILE)
{
	int i = gridDim.x*blockDim.x*_CUDA_TILE + blockDim.x*blockIdx.x + threadIdx.x;
	int j = gridDim.y*blockDim.y*_CUDA_TILE + blockDim.y*blockIdx.y + threadIdx.y;
	if((CUDA_L_i<=i)&&(i<=CUDA_U_i)){
	if((CUDA_L_j<=j)&&(j<=CUDA_U_j)){
		XP1[i*_SZ_XP1_1+j]=XP1[(i+3)*_SZ_XP1_1+j+4]+XS3[i];
}}}


	.file	"tmpxft_0035f2f5_00000000-6_higbie1_TD.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z45__device_stub__Z16_AFFINE_KERNEL_1PiiS_iiiiiiPiiS_iiiiii
	.type	_Z45__device_stub__Z16_AFFINE_KERNEL_1PiiS_iiiiiiPiiS_iiiiii, @function
_Z45__device_stub__Z16_AFFINE_KERNEL_1PiiS_iiiiiiPiiS_iiiiii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16_AFFINE_KERNEL_1PiiS_iiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 208
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z45__device_stub__Z16_AFFINE_KERNEL_1PiiS_iiiiiiPiiS_iiiiii, .-_Z45__device_stub__Z16_AFFINE_KERNEL_1PiiS_iiiiiiPiiS_iiiiii
	.globl	_Z16_AFFINE_KERNEL_1PiiS_iiiiii
	.type	_Z16_AFFINE_KERNEL_1PiiS_iiiiii, @function
_Z16_AFFINE_KERNEL_1PiiS_iiiiii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z16_AFFINE_KERNEL_1PiiS_iiiiiiPiiS_iiiiii
	.cfi_endproc
.LFE2053:
	.size	_Z16_AFFINE_KERNEL_1PiiS_iiiiii, .-_Z16_AFFINE_KERNEL_1PiiS_iiiiii
	.globl	_Z44__device_stub__Z14_AFFINE_KERNELPiiS_iiiiiiiPiiS_iiiiiii
	.type	_Z44__device_stub__Z14_AFFINE_KERNELPiiS_iiiiiiiPiiS_iiiiiii, @function
_Z44__device_stub__Z14_AFFINE_KERNELPiiS_iiiiiiiPiiS_iiiiiii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z14_AFFINE_KERNELPiiS_iiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 224
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L8:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z44__device_stub__Z14_AFFINE_KERNELPiiS_iiiiiiiPiiS_iiiiiii, .-_Z44__device_stub__Z14_AFFINE_KERNELPiiS_iiiiiiiPiiS_iiiiiii
	.globl	_Z14_AFFINE_KERNELPiiS_iiiiiii
	.type	_Z14_AFFINE_KERNELPiiS_iiiiiii, @function
_Z14_AFFINE_KERNELPiiS_iiiiiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z14_AFFINE_KERNELPiiS_iiiiiiiPiiS_iiiiiii
	.cfi_endproc
.LFE2055:
	.size	_Z14_AFFINE_KERNELPiiS_iiiiiii, .-_Z14_AFFINE_KERNELPiiS_iiiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"%d"
.LC2:
	.string	"%d\n"
.LC3:
	.string	".data_Higbie1_TD"
.LC4:
	.string	"a"
.LC8:
	.string	"********************************\n"
.LC9:
	.string	"%d,%d,%d,%d,%d,%.14f,%.14f,%.14f,%.14f,%d\n"
.LC10:
	.string	"RUN TIME: %.14f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$248, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movl	$1000, -168(%rbp)
	movl	$100, -164(%rbp)
	cmpl	$1, %edi
	jle	.L50
	movl	%edi, %ebx
	movq	8(%rsi), %rdi
	movq	%rsi, %r15
	call	atoi@PLT
	movl	%eax, -208(%rbp)
	cmpl	$2, %ebx
	je	.L51
	movq	16(%r15), %rdi
	call	atoi@PLT
	movl	$1, -212(%rbp)
	movl	%eax, %r14d
	cmpl	$3, %ebx
	je	.L14
	movq	24(%r15), %rdi
	call	atoi@PLT
	incl	%eax
	movl	%eax, -212(%rbp)
	cmpl	$4, %ebx
	je	.L14
	movq	32(%r15), %r12
	jmp	.L14
.L50:
	movl	$1, -208(%rbp)
	movl	$1, %r14d
	jmp	.L71
.L51:
	movl	$1, %r14d
.L71:
	movl	$1, -212(%rbp)
.L14:
	leaq	.LC0(%rip), %rsi
	movq	%r12, %rdi
	call	fopen@PLT
	movq	%rax, -184(%rbp)
.L15:
	movq	-184(%rbp), %rdi
	call	fgetc@PLT
	cmpb	$10, %al
	jne	.L15
	movq	-184(%rbp), %rdi
	call	fgetc@PLT
	cmpb	$37, %al
	je	.L15
	leaq	.LC1(%rip), %rbx
	movq	-184(%rbp), %rdi
	leaq	-164(%rbp), %r15
	xorl	%eax, %eax
	movq	%rbx, %rsi
	movq	%r15, %rdx
	call	__isoc23_fscanf@PLT
	movq	%rbx, %rsi
	movq	%r15, %rdx
	xorl	%eax, %eax
	movq	-184(%rbp), %rdi
	call	__isoc23_fscanf@PLT
	movq	-184(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	leaq	-168(%rbp), %rdx
	call	__isoc23_fscanf@PLT
	movl	-208(%rbp), %eax
	imull	%r14d, %eax
	movl	%eax, -216(%rbp)
	movl	-168(%rbp), %eax
	movl	-216(%rbp), %ebx
	addl	%eax, %eax
	cmpl	%ebx, %eax
	jge	.L17
	movl	%ebx, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L74
.L17:
	movq	%r12, %rdi
	call	strlen@PLT
	leaq	50(%rax), %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	__strcpy_chk@PLT
	movq	%rbx, %rdx
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	__strcat_chk@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	fopen@PLT
	movslq	-168(%rbp), %r12
	movq	%rax, -248(%rbp)
	cvtsi2sdl	%r12d, %xmm0
	addsd	%xmm0, %xmm0
	call	sqrt@PLT
	cvttsd2sil	%xmm0, %ebx
	movslq	%ebx, %rax
	leaq	0(,%rax,4), %rcx
	imulq	%rax, %rax
	movq	%rcx, -224(%rbp)
	movq	%rsp, %rcx
	salq	$2, %rax
	leaq	15(%rax), %rdx
	movq	%rax, -200(%rbp)
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L19:
	cmpq	%rcx, %rsp
	je	.L20
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L19
.L20:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L21
	orq	$0, -8(%rsp,%rax)
.L21:
	leaq	15(,%r12,4), %rdx
	movq	%rsp, -192(%rbp)
	movq	%rsp, %rcx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L22:
	cmpq	%rcx, %rsp
	je	.L23
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L22
.L23:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L24
	orq	$0, -8(%rsp,%rax)
.L24:
	movq	-224(%rbp), %rax
	xorl	%esi, %esi
	movq	%rsp, %r15
	xorl	%r13d, %r13d
	movq	%rsp, -256(%rbp)
	xorl	%r12d, %r12d
	shrq	$2, %rax
	movl	%esi, -236(%rbp)
	movq	%rax, -232(%rbp)
.L25:
	movl	-236(%rbp), %eax
	cmpl	%eax, -168(%rbp)
	jle	.L75
	cmpl	%r13d, %r12d
	movl	%r13d, %eax
	cmovge	%r12d, %eax
	cmpl	%ebx, %eax
	jge	.L26
	movq	-232(%rbp), %rax
	movslq	%r12d, %r10
	movslq	%r13d, %r9
	movq	-184(%rbp), %rdi
	leal	1(%r13), %r8d
	leaq	.LC1(%rip), %rsi
	imulq	%rax, %r10
	movq	-192(%rbp), %rax
	movl	%r8d, -276(%rbp)
	addq	%r10, %r9
	movq	%r10, -272(%rbp)
	leaq	(%rax,%r9,4), %rdx
	xorl	%eax, %eax
	movq	%r9, -264(%rbp)
	call	__isoc23_fscanf@PLT
	movq	-192(%rbp), %rax
	movq	-264(%rbp), %r9
	movslq	-276(%rbp), %r8
	movq	-272(%rbp), %r10
	movl	(%rax,%r9,4), %eax
	cmpl	%r8d, %ebx
	movl	%eax, (%r15)
	jle	.L27
	movq	-192(%rbp), %rax
	addq	%r10, %r8
	addl	$2, %r13d
	leaq	(%rax,%r8,4), %rdx
	jmp	.L72
.L27:
	leal	-1(%rbx), %eax
	movl	%r8d, %r13d
	cmpl	%r12d, %eax
	jle	.L28
	movq	-224(%rbp), %rax
	incl	%r12d
	movq	-184(%rbp), %rdi
	leaq	.LC1(%rip), %rsi
	movslq	%r12d, %rdx
	movl	$1, %r13d
	imulq	%rax, %rdx
	movq	-192(%rbp), %rax
	addq	%rax, %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L28
.L26:
	leal	-1(%rbx), %eax
	cmpl	%ebx, %r13d
	jne	.L29
	cmpl	%eax, %r12d
	jge	.L29
	movq	-232(%rbp), %rax
	incl	%r12d
	movq	-184(%rbp), %rdi
	leaq	.LC1(%rip), %rsi
	movslq	%r12d, %rcx
	imulq	%rax, %rcx
	movq	-192(%rbp), %rax
	leaq	0(,%rcx,4), %r13
	movq	%rcx, -264(%rbp)
	leaq	(%rax,%r13), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movq	-192(%rbp), %rax
	movq	-264(%rbp), %rcx
	leaq	.LC1(%rip), %rsi
	movq	-184(%rbp), %rdi
	movl	(%rax,%rcx,4), %eax
	movl	%eax, (%r15)
	movq	-192(%rbp), %rax
	leaq	4(%rax,%r13), %rdx
	xorl	%eax, %eax
	movl	$2, %r13d
	call	__isoc23_fscanf@PLT
	jmp	.L28
.L29:
	cmpl	%eax, %r12d
	jne	.L28
	movq	%r15, %rdx
.L72:
	movq	-184(%rbp), %rdi
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
.L28:
	incl	-236(%rbp)
	addq	$4, %r15
	jmp	.L25
.L75:
	leaq	-120(%rbp), %rsi
	movl	$1, %edi
	call	clock_gettime@PLT
	movslq	-168(%rbp), %r12
	leaq	-160(%rbp), %rdi
	movl	%r12d, -224(%rbp)
	salq	$2, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	-256(%rbp), %rsi
	movl	$1, %ecx
	movq	%r12, %rdx
	movq	-160(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-200(%rbp), %rsi
	leaq	-152(%rbp), %rdi
	call	cudaMalloc@PLT
	movq	-200(%rbp), %rdx
	movl	$1, %ecx
	movq	-192(%rbp), %rsi
	movq	-152(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	%ebx, %eax
	cvtsi2ssl	-208(%rbp), %xmm0
	movl	$1, -136(%rbp)
	imull	%ebx, %eax
	movl	$1, -124(%rbp)
	cvtsi2ssl	%eax, %xmm1
	movl	%eax, -232(%rbp)
	comiss	%xmm1, %xmm0
	jbe	.L68
	movl	%ebx, %r12d
	movl	$1, %r13d
	jmp	.L69
.L68:
	mulss	.LC5(%rip), %xmm1
	movaps	%xmm1, %xmm0
	movss	%xmm1, -208(%rbp)
	call	sqrtf@PLT
	call	ceilf@PLT
	cvttss2siq	%xmm0, %rax
	cvtsi2sdl	-232(%rbp), %xmm0
	movl	%eax, %r13d
	imull	%eax, %eax
	cvtsi2sdq	%rax, %xmm2
	divsd	%xmm2, %xmm0
	call	sqrt@PLT
	call	ceil@PLT
	cvtsi2ssl	%r14d, %xmm2
	movss	-208(%rbp), %xmm1
	cvttsd2siq	%xmm0, %r12
	comiss	%xmm2, %xmm1
	jbe	.L69
	cvttss2sil	%xmm1, %eax
	movaps	%xmm1, %xmm0
	divss	%xmm2, %xmm0
	cltd
	idivl	%r14d
	testl	%edx, %edx
	je	.L73
	addss	.LC6(%rip), %xmm0
.L73:
	cvttss2sil	%xmm0, %r14d
	jmp	.L33
.L69:
	movl	$1, %r14d
.L33:
	leal	(%rbx,%rbx,2), %eax
	leaq	-88(%rbp), %rsi
	movl	$1, %edi
	addl	$4, %eax
	movl	%eax, -264(%rbp)
	call	clock_gettime@PLT
	xorl	%eax, %eax
	testl	%r14d, %r14d
	movl	$1, -208(%rbp)
	cmovns	%r14d, %eax
	movl	%eax, -276(%rbp)
.L38:
	movl	-208(%rbp), %ecx
	cmpl	%ecx, -232(%rbp)
	jl	.L76
	movl	-208(%rbp), %eax
	xorl	%r15d, %r15d
	cltd
	idivl	%ebx
	movl	%edx, %ecx
	movl	%eax, -236(%rbp)
	movl	-264(%rbp), %edx
	addl	%edx, -208(%rbp)
	movl	-208(%rbp), %eax
	cltd
	idivl	%ebx
	movl	%eax, -256(%rbp)
	leal	-1(%rcx), %eax
	movl	%eax, -240(%rbp)
	movl	%ebx, %eax
	subl	%edx, %eax
	movl	%eax, -272(%rbp)
.L39:
	cmpl	%r15d, %r14d
	jle	.L77
	movl	%r13d, -132(%rbp)
	movl	-124(%rbp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r13d, -128(%rbp)
	movl	-136(%rbp), %ecx
	movl	%r12d, -144(%rbp)
	movq	-132(%rbp), %rdi
	movl	%r12d, -140(%rbp)
	movq	-144(%rbp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	%rcx
	movl	-240(%rbp), %eax
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movl	-236(%rbp), %r9d
	movq	-152(%rbp), %rdx
	pushq	%r15
	movl	-224(%rbp), %esi
	movq	-160(%rbp), %rdi
	pushq	%rbx
	pushq	%rax
	call	_Z45__device_stub__Z16_AFFINE_KERNEL_1PiiS_iiiiiiPiiS_iiiiii
	addq	$32, %rsp
.L40:
	call	cudaDeviceSynchronize@PLT
	incl	%r15d
	jmp	.L39
.L77:
	xorl	%r15d, %r15d
.L42:
	cmpl	%r15d, %r14d
	jle	.L78
	movl	%r13d, -132(%rbp)
	movl	-124(%rbp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r13d, -128(%rbp)
	movl	-136(%rbp), %ecx
	movl	%r12d, -144(%rbp)
	movq	-132(%rbp), %rdi
	movl	%r12d, -140(%rbp)
	movq	-144(%rbp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movl	-256(%rbp), %eax
	pushq	%r15
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movl	-236(%rbp), %r9d
	movq	-152(%rbp), %rdx
	pushq	%rbx
	movl	-224(%rbp), %esi
	movq	-160(%rbp), %rdi
	pushq	$0
	pushq	%rax
	call	_Z44__device_stub__Z14_AFFINE_KERNELPiiS_iiiiiiiPiiS_iiiiiii
	addq	$32, %rsp
.L43:
	call	cudaDeviceSynchronize@PLT
	incl	%r15d
	jmp	.L42
.L78:
	xorl	%r15d, %r15d
.L45:
	cmpl	%r15d, %r14d
	jle	.L79
	movl	%r13d, -132(%rbp)
	movl	-124(%rbp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r13d, -128(%rbp)
	movl	-136(%rbp), %ecx
	movl	%r12d, -144(%rbp)
	movq	-132(%rbp), %rdi
	movl	%r12d, -140(%rbp)
	movq	-144(%rbp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	%rdx
	movl	-272(%rbp), %eax
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movl	-256(%rbp), %r9d
	movq	-152(%rbp), %rdx
	pushq	%r15
	movl	-224(%rbp), %esi
	movq	-160(%rbp), %rdi
	pushq	%rax
	pushq	$0
	call	_Z45__device_stub__Z16_AFFINE_KERNEL_1PiiS_iiiiiiPiiS_iiiiii
	addq	$32, %rsp
.L46:
	call	cudaDeviceSynchronize@PLT
	incl	%r15d
	jmp	.L45
.L79:
	movl	-276(%rbp), %eax
	movl	%eax, -240(%rbp)
	jmp	.L38
.L76:
	leaq	-72(%rbp), %rsi
	movl	$1, %edi
	call	clock_gettime@PLT
	movq	-200(%rbp), %rdx
	movl	$2, %ecx
	movq	-152(%rbp), %rsi
	movq	-192(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-152(%rbp), %rdi
	call	cudaFree@PLT
	leaq	-104(%rbp), %rsi
	movl	$1, %edi
	call	clock_gettime@PLT
	imulq	$1000000000, -88(%rbp), %rsi
	addq	-80(%rbp), %rsi
	imulq	$1000000000, -120(%rbp), %rcx
	movq	%rsi, %rax
	addq	-112(%rbp), %rcx
	subq	%rcx, %rax
	movsd	.LC7(%rip), %xmm3
	cvtsi2sdq	%rax, %xmm0
	imulq	$1000000000, -104(%rbp), %rax
	addq	-96(%rbp), %rax
	movq	%rax, %rdx
	imulq	$1000000000, -72(%rbp), %rax
	addq	-64(%rbp), %rax
	movq	%rdx, %rdi
	divsd	%xmm3, %xmm0
	subq	%rax, %rdi
	subq	%rsi, %rax
	cvtsi2sdq	%rax, %xmm1
	movq	%rdx, %rax
	leaq	.LC8(%rip), %rsi
	subq	%rcx, %rax
	cvtsi2sdq	%rdi, %xmm2
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm4
	xorl	%eax, %eax
	divsd	%xmm3, %xmm4
	movsd	%xmm0, -208(%rbp)
	divsd	%xmm3, %xmm2
	movq	%xmm4, %rbx
	divsd	%xmm3, %xmm1
	movsd	%xmm2, -200(%rbp)
	movsd	%xmm1, -192(%rbp)
	call	__printf_chk@PLT
	movq	%rbx, %xmm3
	movl	%r12d, %r9d
	leaq	.LC9(%rip), %rdx
	pushq	%rax
	movl	-240(%rbp), %eax
	movl	$2, %esi
	movsd	-200(%rbp), %xmm2
	movsd	-192(%rbp), %xmm1
	movsd	-208(%rbp), %xmm0
	movl	-216(%rbp), %r8d
	pushq	%rax
	movl	-212(%rbp), %eax
	movq	-248(%rbp), %rdi
	pushq	%rax
	movb	$4, %al
	pushq	%r13
	movl	-168(%rbp), %ecx
	call	__fprintf_chk@PLT
	movl	$2, %edi
	addq	$32, %rsp
	movb	$1, %al
	movq	%rbx, %xmm0
	leaq	.LC10(%rip), %rsi
	call	__printf_chk@PLT
	movq	-248(%rbp), %rdi
	call	fclose@PLT
.L74:
	movq	-184(%rbp), %rdi
	call	fclose@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z14_AFFINE_KERNELPiiS_iiiiiii"
.LC12:
	.string	"_Z16_AFFINE_KERNEL_1PiiS_iiiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14_AFFINE_KERNELPiiS_iiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16_AFFINE_KERNEL_1PiiS_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	998244352
	.align 4
.LC6:
	.long	1065353216
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1104006501
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<hip/hip_runtime.h>
#include<time.h>
__global__ void _AFFINE_KERNEL_1(int* ,int ,int* ,int ,int ,int, int, int, int );

__global__ void _AFFINE_KERNEL(int* ,int ,int* ,int ,int ,int ,int ,int ,int ,int );

#include<stdio.h>
#include<stdlib.h>
int main(int argc, char** argv)
{
    int N = 1000;
	int N_NODES = 100;
	int data = 1;
	int _NTHREAD = 1, _NBLOCK = 1;
	char* readfile, *outfile;
	if(argc>1) _NTHREAD = atoi(argv[1]);
	if(argc>2) _NBLOCK = atoi(argv[2]);
	if(argc>3) data = atoi(argv[3]) + 1;
	if(argc>4) readfile = argv[4];
	int i,j;
	FILE* f;
	f = fopen(readfile, "r");
	j=0;
	char c;
	while(1){
		c = fgetc(f);
		if(c=='\n') { 
			j++;
			c = fgetc(f);
			if(c!='%') break;
		}
	}
	fscanf(f, "%d", &N_NODES);
	fscanf(f, "%d", &N_NODES);
	fscanf(f, "%d", &N);
	if(2*N<_NTHREAD*_NBLOCK) {
		printf("%d\n",_NTHREAD*_NBLOCK);
		fclose(f);
		return 0;
	}
	struct timespec start, end, mid_start, mid_end;
	double runTime, pre_time, post_time, computeTime;
    outfile = (char*)malloc(sizeof(char)*(strlen(readfile)+50));
	strcpy(outfile, readfile);
	strcat(outfile, ".data_Higbie1_TD");
	FILE* fp;
	fp = fopen(outfile, "a");
    int M,I; 
    M=sqrt(2.0*N); 
    int XP1[M][M],XS3[N];  
    i=0;
    j=0;
    for (I = 0; I < N; I++) 
    {
        if((j<=M-1)&&(i<=M-1))
        {
            fscanf(f, "%d", &XP1[i][j++]);
            XS3[I]=XP1[i][j-1];
            if(j<M)    fscanf(f, "%d", &XP1[i][j++]);
            else if(i<M-1)
            {
                j=0;
                fscanf(f, "%d", &XP1[++i][j++]);
            }
        }
        else if((j==M)&&(i<M-1))
        {
            j=0;
            fscanf(f, "%d", &XP1[++i][j++]);
            XS3[I]=XP1[i][j-1];
            fscanf(f, "%d", &XP1[i][j++]);
        }
        else if(i==M-1)
		    fscanf(f, "%d", &XS3[I]);
	}
    clock_gettime(CLOCK_MONOTONIC, &start);
    
	int _SZ_XS3_1 = N;
	int _SZ_XP1_2 = M;
	int _SZ_XP1_1 = M;
	int *_DEV_XS3;
	hipMalloc((void**) &_DEV_XS3, sizeof(int)*_SZ_XS3_1);
	hipMemcpy(_DEV_XS3, XS3, sizeof(int)*_SZ_XS3_1, hipMemcpyHostToDevice);
	int *_DEV_XP1;
	hipMalloc((void**) &_DEV_XP1, sizeof(int)*_SZ_XP1_2*_SZ_XP1_1);
	hipMemcpy(_DEV_XP1, XP1, sizeof(int)*_SZ_XP1_2*_SZ_XP1_1, hipMemcpyHostToDevice);
	float _NUM_THREADS = M*M,_NUM_BLOCKS=1;
	int _NUM_TILE=1;
	dim3 _THREADS(512);
	dim3 _BLOCKS(1);
	if(_NUM_THREADS < _NTHREAD)
	{
		_THREADS.x=M;
		_THREADS.y=M;
	}
	else {
		_NUM_BLOCKS=_NUM_THREADS/256;
		_BLOCKS.x=_BLOCKS.y=ceil(sqrt(_NUM_BLOCKS));
		_THREADS.x=_THREADS.y=ceil(sqrt((M*M*1.0)/(_BLOCKS.x*_BLOCKS.y)));
		int temp=_NUM_BLOCKS;
		if(_NUM_BLOCKS>_NBLOCK)
			_NUM_TILE=(temp % _NBLOCK == 0)?(_NUM_BLOCKS/_NBLOCK):((_NUM_BLOCKS/_NBLOCK)+1);
	}
	int _CUDA_TILE;
	int lambda=3*M+4;
	int id_1,id_2,id_3,id_4,id_5;
	int UB_1=M-0;
	int UB_2=M-0;
	clock_gettime(CLOCK_MONOTONIC, &mid_start);
	for(id_1=1;id_1<=(UB_1*UB_2);id_1+=lambda) {
		id_2=(id_1/UB_2);
		id_3=((id_1+lambda)/UB_2);
		id_4=(id_1%UB_2)-1;
		id_5=UB_2-((id_1+lambda)%UB_2);

		for(_CUDA_TILE=0;_CUDA_TILE<_NUM_TILE;_CUDA_TILE++)
		{
			_AFFINE_KERNEL_1<<<_BLOCKS,_THREADS>>>(_DEV_XS3, _SZ_XS3_1, _DEV_XP1, _SZ_XP1_2, _SZ_XP1_1, id_2, id_4, UB_2, _CUDA_TILE);
		    hipDeviceSynchronize();
        }
		for(_CUDA_TILE=0;_CUDA_TILE<_NUM_TILE;_CUDA_TILE++)
		{
			_AFFINE_KERNEL<<<_BLOCKS,_THREADS>>>(_DEV_XS3, _SZ_XS3_1, _DEV_XP1, _SZ_XP1_2, _SZ_XP1_1, id_2, id_3, 0, M, _CUDA_TILE);
		    hipDeviceSynchronize();
        }
		for(_CUDA_TILE=0;_CUDA_TILE<_NUM_TILE;_CUDA_TILE++)
		{
			_AFFINE_KERNEL_1<<<_BLOCKS,_THREADS>>>(_DEV_XS3, _SZ_XS3_1, _DEV_XP1, _SZ_XP1_2, _SZ_XP1_1, id_3, 0, id_5, _CUDA_TILE);
		    hipDeviceSynchronize();
		}
	}
	clock_gettime(CLOCK_MONOTONIC, &mid_end);
	hipMemcpy(XP1, _DEV_XP1, sizeof(int)*_SZ_XP1_2*_SZ_XP1_1, hipMemcpyDeviceToHost);
	hipFree(_DEV_XP1);
    clock_gettime(CLOCK_MONOTONIC, &end);
	pre_time = (double) ((((&mid_start)->tv_sec * 1000000000) + (&mid_start)->tv_nsec) - (((&start)->tv_sec * 1000000000) + (&start)->tv_nsec)) / 1000000000;
	post_time = (double) ((((&end)->tv_sec * 1000000000) + (&end)->tv_nsec) - (((&mid_end)->tv_sec * 1000000000) + (&mid_end)->tv_nsec)) / 1000000000;
	computeTime = (double) ((((&mid_end)->tv_sec * 1000000000) + (&mid_end)->tv_nsec) - (((&mid_start)->tv_sec * 1000000000) + (&mid_start)->tv_nsec)) / 1000000000;
	
	runTime = (double) ((((&end)->tv_sec * 1000000000) + (&end)->tv_nsec) - (((&start)->tv_sec * 1000000000) + (&start)->tv_nsec)) / 1000000000;
	printf("********************************\n");
	fprintf(fp,"%d,%d,%d,%d,%d,%.14f,%.14f,%.14f,%.14f,%d\n",N,_NTHREAD*_NBLOCK,_THREADS.x,_BLOCKS.x,data,pre_time,computeTime,post_time,runTime,_CUDA_TILE);
	printf("RUN TIME: %.14f\n", runTime);

	fclose(fp);
	fclose(f);
    return 0;
}



__global__ void _AFFINE_KERNEL_1(int* XS3,int _SZ_XS3_1,int* XP1,int _SZ_XP1_2,int _SZ_XP1_1,int i, int id_1, int UB_1, int _CUDA_TILE)
{
	int j = gridDim.y*blockDim.y*_CUDA_TILE + blockDim.y*blockIdx.y + threadIdx.y;
	if((id_1<=j)&&(j<=UB_1)){
		XP1[i*_SZ_XP1_1+j]=XP1[(i+3)*_SZ_XP1_1+j+4]+XS3[i];
	}
}



__global__ void _AFFINE_KERNEL(int* XS3,int _SZ_XS3_1,int* XP1,int _SZ_XP1_2,int _SZ_XP1_1,int CUDA_L_i,int CUDA_U_i, int CUDA_L_j,int CUDA_U_j, int _CUDA_TILE)
{
	int i = gridDim.x*blockDim.x*_CUDA_TILE + blockDim.x*blockIdx.x + threadIdx.x;
	int j = gridDim.y*blockDim.y*_CUDA_TILE + blockDim.y*blockIdx.y + threadIdx.y;
	if((CUDA_L_i<=i)&&(i<=CUDA_U_i)){
	if((CUDA_L_j<=j)&&(j<=CUDA_U_j)){
		XP1[i*_SZ_XP1_1+j]=XP1[(i+3)*_SZ_XP1_1+j+4]+XS3[i];
}}}


	.text
	.file	"higbie1_TD.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	0x3b800000                      # float 0.00390625
.LCPI0_1:
	.long	0x3f800000                      # float 1
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI0_2:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI0_3:
	.quad	0x0000000000000000              # double 0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$216, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	$1000, -44(%rbp)                # imm = 0x3E8
	movl	$100, -144(%rbp)
	movl	$1, %ebx
	cmpl	$2, %edi
	jl	.LBB0_5
# %bb.1:
	movq	%rsi, %r14
	movl	%edi, %r15d
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, -104(%rbp)                # 4-byte Spill
	cmpl	$2, %r15d
	je	.LBB0_6
# %bb.2:
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %r13d
	cmpl	$4, %r15d
	jb	.LBB0_7
# %bb.3:
	movq	24(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
	incl	%ebx
	cmpl	$4, %r15d
	je	.LBB0_7
# %bb.66:
	movq	32(%r14), %r14
	jmp	.LBB0_8
.LBB0_5:
	movl	$1, -104(%rbp)                  # 4-byte Folded Spill
.LBB0_6:
	movl	$1, %r13d
.LBB0_7:                                # %.thread250
                                        # implicit-def: $r14
.LBB0_8:                                # %.thread250
	movl	$.L.str, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %r12
.LBB0_9:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	callq	fgetc
	cmpb	$10, %al
	jne	.LBB0_9
# %bb.10:                               #   in Loop: Header=BB0_9 Depth=1
	movq	%r12, %rdi
	callq	fgetc
	cmpb	$37, %al
	je	.LBB0_9
# %bb.11:
	leaq	-144(%rbp), %r15
	movl	$.L.str.1, %esi
	movq	%r12, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.1, %esi
	movq	%r12, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	-44(%rbp), %r15
	movl	$.L.str.1, %esi
	movq	%r12, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r15), %eax
	addl	%eax, %eax
	movl	%r13d, %esi
	imull	-104(%rbp), %esi                # 4-byte Folded Reload
	cmpl	%esi, %eax
	jge	.LBB0_13
# %bb.12:
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%r12, %rdi
	callq	fclose
	jmp	.LBB0_65
.LBB0_13:
	movl	%esi, -140(%rbp)                # 4-byte Spill
	movq	%r14, %rdi
	callq	strlen
	leaq	50(%rax), %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	strcpy
	movq	%r15, %rdi
	callq	strlen
	movups	.L.str.3(%rip), %xmm0
	movups	%xmm0, (%r15,%rax)
	movb	$0, 16(%r15,%rax)
	movl	$.L.str.4, %esi
	movq	%r15, %rdi
	callq	fopen
	movq	%rax, -176(%rbp)                # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sdl	-44(%rbp), %xmm0
	addsd	%xmm0, %xmm0
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	movq	%rbx, -184(%rbp)                # 8-byte Spill
	movl	%r13d, -128(%rbp)               # 4-byte Spill
	jb	.LBB0_15
# %bb.14:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB0_16
.LBB0_15:                               # %call.sqrt
	callq	sqrt
.LBB0_16:                               # %.split
	movq	%rsp, -168(%rbp)                # 8-byte Spill
	cvttsd2si	%xmm0, %edx
	movq	%rdx, %rax
	imulq	%rdx, %rax
	movq	%rsp, %rcx
	leaq	15(,%rax,4), %rax
	andq	$-16, %rax
	subq	%rax, %rcx
	movq	%rcx, -88(%rbp)                 # 8-byte Spill
	movq	%rcx, %rsp
	movl	-44(%rbp), %eax
	movq	%rsp, %rsi
	leaq	15(,%rax,4), %rcx
	andq	$-16, %rcx
	subq	%rcx, %rsi
	movq	%rsi, -120(%rbp)                # 8-byte Spill
	movq	%rsi, %rsp
	testl	%eax, %eax
	movq	%r12, -80(%rbp)                 # 8-byte Spill
	movq	%rdx, -72(%rbp)                 # 8-byte Spill
	jle	.LBB0_32
# %bb.17:                               # %.lr.ph
	leal	-1(%rdx), %eax
	movl	%eax, -56(%rbp)                 # 4-byte Spill
	movq	-120(%rbp), %r13                # 8-byte Reload
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
	xorl	%esi, %esi
.LBB0_18:                               # =>This Inner Loop Header: Depth=1
	cmpl	%edx, %esi
	jge	.LBB0_22
# %bb.19:                               #   in Loop: Header=BB0_18 Depth=1
	cmpl	%edx, %r14d
	jge	.LBB0_22
# %bb.20:                               #   in Loop: Header=BB0_18 Depth=1
	movslq	%r14d, %rax
	imulq	%rdx, %rax
	movq	-88(%rbp), %rcx                 # 8-byte Reload
	leaq	(%rcx,%rax,4), %rcx
	movq	%r12, %rdi
	leal	1(%rsi), %r12d
	movslq	%esi, %rax
	movq	%rcx, -64(%rbp)                 # 8-byte Spill
	leaq	(%rcx,%rax,4), %r15
	movq	%rsi, -96(%rbp)                 # 8-byte Spill
	movl	$.L.str.1, %esi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r15), %eax
	movq	-72(%rbp), %rcx                 # 8-byte Reload
	movl	%eax, (%r13)
	cmpl	%ecx, %r12d
	jge	.LBB0_26
# %bb.21:                               #   in Loop: Header=BB0_18 Depth=1
	movq	-96(%rbp), %rsi                 # 8-byte Reload
	addl	$2, %esi
	movslq	%r12d, %rax
	movq	-64(%rbp), %rcx                 # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdx
	jmp	.LBB0_28
.LBB0_22:                               #   in Loop: Header=BB0_18 Depth=1
	cmpl	%edx, %esi
	jne	.LBB0_25
# %bb.23:                               #   in Loop: Header=BB0_18 Depth=1
	cmpl	-56(%rbp), %r14d                # 4-byte Folded Reload
	jge	.LBB0_25
# %bb.24:                               #   in Loop: Header=BB0_18 Depth=1
	incl	%r14d
	movslq	%r14d, %r12
	imulq	%rdx, %r12
	movq	-88(%rbp), %rax                 # 8-byte Reload
	leaq	(%rax,%r12,4), %r15
	movl	$.L.str.1, %esi
	movq	-80(%rbp), %rdi                 # 8-byte Reload
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r15), %eax
	movl	%eax, (%r13)
	movq	-88(%rbp), %rax                 # 8-byte Reload
	leaq	(%rax,%r12,4), %rdx
	addq	$4, %rdx
	movq	-80(%rbp), %r12                 # 8-byte Reload
	movl	$2, %esi
	movl	%r14d, %r15d
	jmp	.LBB0_29
.LBB0_25:                               #   in Loop: Header=BB0_18 Depth=1
	movq	%r13, %rdx
	movl	-56(%rbp), %eax                 # 4-byte Reload
	movl	%eax, %r15d
	cmpl	%eax, %r14d
	je	.LBB0_29
	jmp	.LBB0_30
.LBB0_26:                               #   in Loop: Header=BB0_18 Depth=1
	cmpl	-56(%rbp), %r14d                # 4-byte Folded Reload
	jge	.LBB0_31
# %bb.27:                               #   in Loop: Header=BB0_18 Depth=1
	incl	%r14d
	movslq	%r14d, %rax
	imulq	%rcx, %rax
	movq	-88(%rbp), %rcx                 # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdx
	movl	$1, %esi
.LBB0_28:                               # %.sink.split
                                        #   in Loop: Header=BB0_18 Depth=1
	movl	%r14d, %r15d
	movq	-80(%rbp), %r12                 # 8-byte Reload
.LBB0_29:                               # %.sink.split
                                        #   in Loop: Header=BB0_18 Depth=1
	movq	%rsi, %r14
	movl	$.L.str.1, %esi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movq	%r14, %rsi
	movl	%r15d, %r14d
.LBB0_30:                               #   in Loop: Header=BB0_18 Depth=1
	incq	%rbx
	movslq	-44(%rbp), %rax
	addq	$4, %r13
	cmpq	%rax, %rbx
	movq	-72(%rbp), %rdx                 # 8-byte Reload
	jl	.LBB0_18
	jmp	.LBB0_32
.LBB0_31:                               #   in Loop: Header=BB0_18 Depth=1
	movl	%r12d, %esi
	movq	-80(%rbp), %r12                 # 8-byte Reload
	jmp	.LBB0_30
.LBB0_32:                               # %._crit_edge
	movl	$1, %r13d
	leaq	-216(%rbp), %rsi
	movl	$1, %edi
	callq	clock_gettime
	movslq	-44(%rbp), %rax
	movq	%rax, -56(%rbp)                 # 8-byte Spill
	leaq	(,%rax,4), %r15
	leaq	-136(%rbp), %r12
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	-120(%rbp), %rsi                # 8-byte Reload
	movq	%r15, %rdx
	movq	-72(%rbp), %r15                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movslq	%r15d, %r12
	movq	%r12, %rbx
	imulq	%r12, %rbx
	shlq	$2, %rbx
	leaq	-112(%rbp), %r14
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	-88(%rbp), %rsi                 # 8-byte Reload
	movq	%rbx, -160(%rbp)                # 8-byte Spill
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	imull	%r12d, %r12d
	movq	%r12, -152(%rbp)                # 8-byte Spill
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12d, %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2ssl	-104(%rbp), %xmm0       # 4-byte Folded Reload
	ucomiss	%xmm1, %xmm0
	jbe	.LBB0_34
# %bb.33:
	movq	%r15, %r12
	movabsq	$4294967297, %r14               # imm = 0x100000001
	movq	%r14, %rbx
	jmp	.LBB0_44
.LBB0_34:
	movabsq	$4294967297, %r14               # imm = 0x100000001
	mulss	.LCPI0_0(%rip), %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	xorpd	%xmm2, %xmm2
	ucomisd	%xmm2, %xmm0
	movss	%xmm1, -64(%rbp)                # 4-byte Spill
	jb	.LBB0_36
# %bb.35:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB0_37
.LBB0_36:                               # %call.sqrt280
	callq	sqrt
.LBB0_37:                               # %.split279
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sdl	-152(%rbp), %xmm0       # 4-byte Folded Reload
	movl	%eax, %ebx
	imull	%eax, %eax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	divsd	%xmm1, %xmm0
	ucomisd	.LCPI0_3(%rip), %xmm0
	jb	.LBB0_39
# %bb.38:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB0_40
.LBB0_39:                               # %call.sqrt281
	callq	sqrt
.LBB0_40:                               # %.split279.split
	imulq	%r14, %rbx
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
	movl	-128(%rbp), %ecx                # 4-byte Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ecx, %xmm0
	movl	%eax, %r12d
	movss	-64(%rbp), %xmm1                # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB0_44
# %bb.41:
	cvttss2si	%xmm1, %eax
	cltd
	idivl	%ecx
	divss	%xmm0, %xmm1
	testl	%edx, %edx
	je	.LBB0_43
# %bb.42:
	addss	.LCPI0_1(%rip), %xmm1
.LBB0_43:
	cvttss2si	%xmm1, %r13d
.LBB0_44:
	imulq	%r14, %r12
	movl	$1, %r14d
	leaq	-200(%rbp), %rsi
	movl	$1, %edi
	callq	clock_gettime
	testq	%r15, %r15
	je	.LBB0_63
# %bb.45:                               # %.lr.ph273
	leal	(%r15,%r15,2), %eax
	addl	$4, %eax
	movq	%rax, -128(%rbp)                # 8-byte Spill
.LBB0_46:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_48 Depth 2
                                        #     Child Loop BB0_53 Depth 2
                                        #     Child Loop BB0_58 Depth 2
	movl	%r14d, %ecx
	movl	%r14d, %eax
	cltd
	idivl	%r15d
	movl	%eax, -64(%rbp)                 # 4-byte Spill
	movl	%edx, %r14d
	movq	-128(%rbp), %rax                # 8-byte Reload
	addl	%ecx, %eax
	movl	%eax, -120(%rbp)                # 4-byte Spill
	cltd
	idivl	%r15d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, -96(%rbp)                 # 8-byte Spill
	testl	%r13d, %r13d
	jle	.LBB0_61
# %bb.47:                               # %.lr.ph265.preheader
                                        #   in Loop: Header=BB0_46 Depth=1
	decl	%r14d
                                        # kill: def $r15d killed $r15d killed $r15 def $r15
	subl	%edx, %r15d
	movq	%r15, -104(%rbp)                # 8-byte Spill
	xorl	%r15d, %r15d
.LBB0_48:                               # %.lr.ph265
                                        #   Parent Loop BB0_46 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_50
# %bb.49:                               #   in Loop: Header=BB0_48 Depth=2
	movq	-136(%rbp), %rdi
	movq	-112(%rbp), %rdx
	subq	$8, %rsp
	movq	-56(%rbp), %rsi                 # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movq	-72(%rbp), %rcx                 # 8-byte Reload
	movl	%ecx, %r8d
	movl	-64(%rbp), %r9d                 # 4-byte Reload
	pushq	%r15
	pushq	%rcx
	pushq	%r14
	callq	_Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii
	addq	$32, %rsp
.LBB0_50:                               #   in Loop: Header=BB0_48 Depth=2
	callq	hipDeviceSynchronize
	incl	%r15d
	cmpl	%r15d, %r13d
	jne	.LBB0_48
# %bb.51:                               # %.preheader259
                                        #   in Loop: Header=BB0_46 Depth=1
	testl	%r13d, %r13d
	movq	-72(%rbp), %r15                 # 8-byte Reload
	jle	.LBB0_61
# %bb.52:                               # %.lr.ph267.preheader
                                        #   in Loop: Header=BB0_46 Depth=1
	xorl	%r14d, %r14d
.LBB0_53:                               # %.lr.ph267
                                        #   Parent Loop BB0_46 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_55
# %bb.54:                               #   in Loop: Header=BB0_53 Depth=2
	movq	-136(%rbp), %rdi
	movq	-112(%rbp), %rdx
	movq	-56(%rbp), %rsi                 # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %ecx
	movl	%r15d, %r8d
	movl	-64(%rbp), %r9d                 # 4-byte Reload
	pushq	%r14
	pushq	%r15
	pushq	$0
	pushq	-96(%rbp)                       # 8-byte Folded Reload
	callq	_Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii
	addq	$32, %rsp
.LBB0_55:                               #   in Loop: Header=BB0_53 Depth=2
	callq	hipDeviceSynchronize
	incl	%r14d
	cmpl	%r14d, %r13d
	jne	.LBB0_53
# %bb.56:                               # %.preheader
                                        #   in Loop: Header=BB0_46 Depth=1
	testl	%r13d, %r13d
	jle	.LBB0_61
# %bb.57:                               # %.lr.ph269.preheader
                                        #   in Loop: Header=BB0_46 Depth=1
	xorl	%r14d, %r14d
.LBB0_58:                               # %.lr.ph269
                                        #   Parent Loop BB0_46 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_60
# %bb.59:                               #   in Loop: Header=BB0_58 Depth=2
	movq	-136(%rbp), %rdi
	movq	-112(%rbp), %rdx
	subq	$8, %rsp
	movq	-56(%rbp), %rsi                 # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %ecx
	movl	%r15d, %r8d
	movq	-96(%rbp), %r9                  # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%r14
	pushq	-104(%rbp)                      # 8-byte Folded Reload
	pushq	$0
	callq	_Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii
	addq	$32, %rsp
.LBB0_60:                               #   in Loop: Header=BB0_58 Depth=2
	callq	hipDeviceSynchronize
	incl	%r14d
	cmpl	%r14d, %r13d
	jne	.LBB0_58
.LBB0_61:                               # %.loopexit
                                        #   in Loop: Header=BB0_46 Depth=1
	movl	-120(%rbp), %r14d               # 4-byte Reload
	cmpl	-152(%rbp), %r14d               # 4-byte Folded Reload
	jle	.LBB0_46
# %bb.62:                               # %._crit_edge274.loopexit
	xorl	%eax, %eax
	testl	%r13d, %r13d
	cmovgl	%r13d, %eax
	movq	%rax, %r13
	jmp	.LBB0_64
.LBB0_63:
                                        # implicit-def: $r13d
.LBB0_64:                               # %._crit_edge274
	leaq	-232(%rbp), %r14
	movl	$1, %edi
	movq	%r14, %rsi
	callq	clock_gettime
	movq	-112(%rbp), %rsi
	movq	-88(%rbp), %rdi                 # 8-byte Reload
	movq	-160(%rbp), %rdx                # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	-112(%rbp), %rdi
	callq	hipFree
	leaq	-248(%rbp), %r15
	movl	$1, %edi
	movq	%r15, %rsi
	callq	clock_gettime
	imulq	$1000000000, -200(%rbp), %rcx   # imm = 0x3B9ACA00
	addq	-192(%rbp), %rcx
	imulq	$1000000000, -216(%rbp), %rax   # imm = 0x3B9ACA00
	addq	-208(%rbp), %rax
	imulq	$1000000000, (%r15), %rdx       # imm = 0x3B9ACA00
	addq	8(%r15), %rdx
	imulq	$1000000000, (%r14), %rsi       # imm = 0x3B9ACA00
	addq	8(%r14), %rsi
	movq	%rdx, %rdi
	subq	%rsi, %rdi
	subq	%rcx, %rsi
	subq	%rax, %rcx
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rcx, %xmm1
	movsd	.LCPI0_2(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, -64(%rbp)                # 8-byte Spill
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rdi, %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, -72(%rbp)                # 8-byte Spill
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rsi, %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, -96(%rbp)                # 8-byte Spill
	subq	%rax, %rdx
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rdx, %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, -56(%rbp)                # 8-byte Spill
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	-44(%rbp), %edx
	movl	$.L.str.6, %esi
	movq	-176(%rbp), %r14                # 8-byte Reload
	movq	%r14, %rdi
	movl	-140(%rbp), %ecx                # 4-byte Reload
	movl	%r12d, %r8d
	movl	%ebx, %r9d
	movsd	-64(%rbp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	-96(%rbp), %xmm1                # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movsd	-72(%rbp), %xmm2                # 8-byte Reload
                                        # xmm2 = mem[0],zero
	movsd	-56(%rbp), %xmm3                # 8-byte Reload
                                        # xmm3 = mem[0],zero
	movb	$4, %al
	pushq	%r13
	pushq	-184(%rbp)                      # 8-byte Folded Reload
	callq	fprintf
	addq	$16, %rsp
	movl	$.L.str.7, %edi
	movsd	-56(%rbp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movq	%r14, %rdi
	callq	fclose
	movq	-80(%rbp), %rdi                 # 8-byte Reload
	callq	fclose
	movq	-168(%rbp), %rsp                # 8-byte Reload
.LBB0_65:
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii # -- Begin function _Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii
	.type	_Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii,@function
_Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii: # @_Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16_AFFINE_KERNEL_1PiiS_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii, .Lfunc_end1-_Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii # -- Begin function _Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii
	.type	_Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii,@function
_Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii: # @_Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14_AFFINE_KERNELPiiS_iiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii, .Lfunc_end2-_Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16_AFFINE_KERNEL_1PiiS_iiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14_AFFINE_KERNELPiiS_iiiiiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"r"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d\n"
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	".data_Higbie1_TD"
	.size	.L.str.3, 17

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"a"
	.size	.L.str.4, 2

	.type	_Z16_AFFINE_KERNEL_1PiiS_iiiiii,@object # @_Z16_AFFINE_KERNEL_1PiiS_iiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z16_AFFINE_KERNEL_1PiiS_iiiiii
	.p2align	3, 0x0
_Z16_AFFINE_KERNEL_1PiiS_iiiiii:
	.quad	_Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii
	.size	_Z16_AFFINE_KERNEL_1PiiS_iiiiii, 8

	.type	_Z14_AFFINE_KERNELPiiS_iiiiiii,@object # @_Z14_AFFINE_KERNELPiiS_iiiiiii
	.globl	_Z14_AFFINE_KERNELPiiS_iiiiiii
	.p2align	3, 0x0
_Z14_AFFINE_KERNELPiiS_iiiiiii:
	.quad	_Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii
	.size	_Z14_AFFINE_KERNELPiiS_iiiiiii, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"%d,%d,%d,%d,%d,%.14f,%.14f,%.14f,%.14f,%d\n"
	.size	.L.str.6, 43

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"RUN TIME: %.14f\n"
	.size	.L.str.7, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16_AFFINE_KERNEL_1PiiS_iiiiii"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14_AFFINE_KERNELPiiS_iiiiiii"
	.size	.L__unnamed_2, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"********************************"
	.size	.Lstr, 33

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub___AFFINE_KERNEL_1PiiS_iiiiii
	.addrsig_sym _Z29__device_stub___AFFINE_KERNELPiiS_iiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16_AFFINE_KERNEL_1PiiS_iiiiii
	.addrsig_sym _Z14_AFFINE_KERNELPiiS_iiiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16_AFFINE_KERNEL_1PiiS_iiiiii ; -- Begin function _Z16_AFFINE_KERNEL_1PiiS_iiiiii
	.globl	_Z16_AFFINE_KERNEL_1PiiS_iiiiii
	.p2align	8
	.type	_Z16_AFFINE_KERNEL_1PiiS_iiiiii,@function
_Z16_AFFINE_KERNEL_1PiiS_iiiiii:        ; @_Z16_AFFINE_KERNEL_1PiiS_iiiiii
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x34
	s_load_b32 s8, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x1c
	v_bfe_u32 v2, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s3, s2
	s_lshr_b32 s3, s8, 16
	s_add_i32 s2, s2, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s2, s3, v[2:3]
	v_cmp_le_i32_e32 vcc_lo, s6, v0
	v_cmp_ge_i32_e64 s2, s7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_add_i32 s6, s5, 3
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mad_u64_u32 v[1:2], null, s6, s4, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	s_ashr_i32 s7, s5, 31
	s_mov_b32 s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_load_b32 s0, s[0:1], 0x0
	global_load_b32 v3, v[1:2], off offset:16
	v_mad_u64_u32 v[1:2], null, s5, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, s0, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16_AFFINE_KERNEL_1PiiS_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16_AFFINE_KERNEL_1PiiS_iiiiii, .Lfunc_end0-_Z16_AFFINE_KERNEL_1PiiS_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 272
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z14_AFFINE_KERNELPiiS_iiiiiii ; -- Begin function _Z14_AFFINE_KERNELPiiS_iiiiiii
	.globl	_Z14_AFFINE_KERNELPiiS_iiiiiii
	.p2align	8
	.type	_Z14_AFFINE_KERNELPiiS_iiiiiii,@function
_Z14_AFFINE_KERNELPiiS_iiiiiii:         ; @_Z14_AFFINE_KERNELPiiS_iiiiiii
; %bb.0:
	s_clause 0x3
	s_load_b32 s6, s[0:1], 0x44
	s_load_b64 s[2:3], s[0:1], 0x38
	s_load_b64 s[4:5], s[0:1], 0x2c
	s_load_b128 s[8:11], s[0:1], 0x1c
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s6, 16
	s_and_b32 s6, s6, 0xffff
	s_mul_i32 s2, s2, s5
	s_mul_i32 s3, s3, s5
	s_add_i32 s2, s2, s14
	s_add_i32 s3, s3, s15
	v_mad_u64_u32 v[0:1], null, s2, s6, v[2:3]
	v_mad_u64_u32 v[2:3], null, s3, s7, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s9, v0
	v_cmp_ge_i32_e64 s3, s10, v0
	v_cmp_le_i32_e64 s2, s11, v2
	v_cmp_ge_i32_e64 s4, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_add_nc_u32_e32 v1, 3, v0
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v1, s8, v[2:3]
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[3:4], off offset:16
	v_mad_u64_u32 v[3:4], null, v0, s8, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v5, v6
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14_AFFINE_KERNELPiiS_iiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14_AFFINE_KERNELPiiS_iiiiiii, .Lfunc_end1-_Z14_AFFINE_KERNELPiiS_iiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16_AFFINE_KERNEL_1PiiS_iiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16_AFFINE_KERNEL_1PiiS_iiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14_AFFINE_KERNELPiiS_iiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14_AFFINE_KERNELPiiS_iiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
