#include <iostream>
#include <chrono>

#define BLOCK_SIZE 1024
#define NUM_OF_BANKS 32
#define LOG_NUM_OF_BANKS 5
#define SHIFT_BANK(n) \
    (n + (n >> LOG_NUM_OF_BANKS))


__global__ void prefix_sum(float *in, float *out, float* aux, int noc, int res) {
    __shared__ float temp[2*BLOCK_SIZE];
    int n = BLOCK_SIZE*2;
    if (blockIdx.x == noc - 1) n = res;

    int thid = threadIdx.x;
    // printf("thid: %d, bid: %d, noc: %d\n", thid, blockIdx.x, noc);
    temp[SHIFT_BANK(2*thid)] = in[2*(thid + blockIdx.x*BLOCK_SIZE)];
    temp[SHIFT_BANK(2*thid+1)] = in[2*(thid + blockIdx.x*BLOCK_SIZE)+1];
    
    int offset = 1;
    for (int d = (n >> 1); d > 0; d >>= 1) {
        __syncthreads();
        if (thid < d) {
            int ai = SHIFT_BANK(offset*(2*thid+1) - 1);
            int bi = SHIFT_BANK(offset*(2*thid+2) - 1);
            temp[bi] += temp[ai];
        }
        offset <<= 1;
    }
    
    __syncthreads();
    
    
    if (thid == 0) {
        aux[blockIdx.x] = temp[SHIFT_BANK(n - 1)];
        temp[SHIFT_BANK(n-1)] = 0;
    }

    for (int d = 1; d <= (n >> 1); d <<= 1) {
        offset >>= 1;
        __syncthreads();
        if (thid < d) {
            int ai = SHIFT_BANK(offset*(2*thid+1) - 1);
            int bi = SHIFT_BANK(offset*(2*thid+2) - 1);
            float t = temp[ai] + temp[bi];
            temp[ai] = temp[bi];
            temp[bi] = t;
        }
    }

    
    
    __syncthreads();
    out[2*(threadIdx.x + blockIdx.x * BLOCK_SIZE)] = temp[SHIFT_BANK(2*thid)];
    out[2*(threadIdx.x + blockIdx.x * BLOCK_SIZE) + 1] = temp[SHIFT_BANK(2*thid+1)];
}

__global__ void block_add(float *in, float *out){
    out[2*(threadIdx.x + blockIdx.x * BLOCK_SIZE)] += in[blockIdx.x];
    out[2*(threadIdx.x + blockIdx.x * BLOCK_SIZE) + 1] += in[blockIdx.x];
}

void prefix_sum_cpu_rec(float *in, float *out, int noc, int n) {
    float *aux;
    cudaMalloc((void **)&aux, noc*sizeof(float));
    int res = 2*BLOCK_SIZE;
    if (n%(2*BLOCK_SIZE) != 0 || n == 0) res = n%(2*BLOCK_SIZE); 
    prefix_sum<<<noc, BLOCK_SIZE>>>(in, out, aux, noc, res);
    
    cudaDeviceSynchronize();
    if (noc == 1) {
        cudaFree(aux);
        return;
    }
    float *auxout;
    cudaMalloc((void **)&auxout, ((noc + 2*BLOCK_SIZE - 1)/(2*BLOCK_SIZE))*sizeof(float));
    prefix_sum_cpu_rec(aux, auxout, (noc + 2*BLOCK_SIZE - 1)/(2*BLOCK_SIZE), noc);
    block_add<<<noc, BLOCK_SIZE>>>(auxout, out);
    cudaDeviceSynchronize();
}

int main() {
    int n = 1 << 20;
    float *in, *out;

    int noc = (n + 2*BLOCK_SIZE - 1)/(2*BLOCK_SIZE);
    cudaMalloc((void **)&in, n*sizeof(float));
    cudaMalloc((void **)&out, n*sizeof(float));
    
    srand(0);    

    float test[n];
    for (int i = 0; i < n; ++i) {
        float t = (rand()%10)/10.0f;
        test[i] = t;  
    }

    cudaMemcpy(in, test, n*sizeof(float), cudaMemcpyHostToDevice);
    
    auto start = std::chrono::steady_clock::now();

    prefix_sum_cpu_rec(in,out, noc, n);    

    auto end = std::chrono::steady_clock::now();
    auto diff = end - start;
    std::cout << std::chrono::duration <double, std::milli> (diff).count() << " ms" << std::endl;
    printf("%s\n", cudaGetErrorString(cudaGetLastError()));
    for (int i = n - 1; i < n; ++i) {
        float a;
        cudaMemcpy(&a, out+i, sizeof(float), cudaMemcpyDeviceToHost);
        std::cout << a << std::endl;
    }
    
    cudaFree(in);
    cudaFree(out);
}
	.file	"tmpxft_003a045b_00000000-6_prefix_sum.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3747:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3747:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z36__device_stub__Z10prefix_sumPfS_S_iiPfS_S_ii
	.type	_Z36__device_stub__Z10prefix_sumPfS_S_iiPfS_S_ii, @function
_Z36__device_stub__Z10prefix_sumPfS_S_iiPfS_S_ii:
.LFB3769:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10prefix_sumPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3769:
	.size	_Z36__device_stub__Z10prefix_sumPfS_S_iiPfS_S_ii, .-_Z36__device_stub__Z10prefix_sumPfS_S_iiPfS_S_ii
	.globl	_Z10prefix_sumPfS_S_ii
	.type	_Z10prefix_sumPfS_S_ii, @function
_Z10prefix_sumPfS_S_ii:
.LFB3770:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z10prefix_sumPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE3770:
	.size	_Z10prefix_sumPfS_S_ii, .-_Z10prefix_sumPfS_S_ii
	.globl	_Z30__device_stub__Z9block_addPfS_PfS_
	.type	_Z30__device_stub__Z9block_addPfS_PfS_, @function
_Z30__device_stub__Z9block_addPfS_PfS_:
.LFB3771:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9block_addPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3771:
	.size	_Z30__device_stub__Z9block_addPfS_PfS_, .-_Z30__device_stub__Z9block_addPfS_PfS_
	.globl	_Z9block_addPfS_
	.type	_Z9block_addPfS_, @function
_Z9block_addPfS_:
.LFB3772:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9block_addPfS_PfS_
	.cfi_endproc
.LFE3772:
	.size	_Z9block_addPfS_, .-_Z9block_addPfS_
	.globl	_Z18prefix_sum_cpu_recPfS_ii
	.type	_Z18prefix_sum_cpu_recPfS_ii, @function
_Z18prefix_sum_cpu_recPfS_ii:
.LFB3734:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	movslq	%edx, %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
	salq	$2, %rsi
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	testl	$2047, %ebp
	jne	.L22
	movl	$2048, %r14d
	testl	%ebp, %ebp
	jne	.L14
.L22:
	movl	%ebp, %eax
	movl	$2048, %ecx
	cltd
	idivl	%ecx
	movl	%edx, %r14d
.L14:
	movl	%ebx, 16(%rsp)
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, 36(%rsp)
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	movq	%rdx, 28(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	(%rsp), %rdx
	movl	%r14d, %r8d
	movl	%ebx, %ecx
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	_Z36__device_stub__Z10prefix_sumPfS_S_iiPfS_S_ii
.L16:
	call	cudaDeviceSynchronize@PLT
	cmpl	$1, %ebx
	jne	.L17
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	jmp	.L13
.L17:
	leal	2047(%rbx), %eax
	movl	$2048, %ecx
	leaq	8(%rsp), %rdi
	cltd
	idivl	%ecx
	movslq	%eax, %rsi
	movq	%rsi, %rbp
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebp, %edx
	call	_Z18prefix_sum_cpu_recPfS_ii
	movl	%ebx, 16(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$4194305, %edx
	movl	$1, %ecx
	movl	$1, 36(%rsp)
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	salq	$10, %rdx
	movl	24(%rsp), %esi
	movq	%rdx, 28(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z30__device_stub__Z9block_addPfS_PfS_
.L19:
	call	cudaDeviceSynchronize@PLT
.L13:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3734:
	.size	_Z18prefix_sum_cpu_recPfS_ii, .-_Z18prefix_sum_cpu_recPfS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	" ms"
.LC3:
	.string	"%s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3735:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$4194304, %esi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r12
	pushq	%rbx
	leaq	-40(%rbp), %rdi
	subq	$32, %rsp
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	movq	%fs:40, %rax
	movq	%rax, -24(%rbp)
	xorl	%eax, %eax
	call	cudaMalloc@PLT
	leaq	-32(%rbp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	xorl	%edi, %edi
	call	srand@PLT
	leaq	-4194304(%rsp), %rax
.L26:
	cmpq	%rax, %rsp
	je	.L27
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L26
.L27:
	xorl	%ebx, %ebx
	movq	%rsp, %r12
.L29:
	call	rand@PLT
	movl	$10, %ecx
	cltd
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	divss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	cmpq	$1048576, %rbx
	jne	.L29
	movq	-40(%rbp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movq	-32(%rbp), %rsi
	movq	-40(%rbp), %rdi
	movl	$1048576, %ecx
	movl	$512, %edx
	movq	%rax, %rbx
	call	_Z18prefix_sum_cpu_recPfS_ii
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	subq	%rbx, %rax
	leaq	_ZSt4cout(%rip), %rbx
	movq	%rbx, %rdi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC1(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	-32(%rbp), %rax
	movl	$2, %ecx
	movl	$4, %edx
	leaq	-44(%rbp), %rdi
	leaq	4194300(%rax), %rsi
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	cvtss2sd	-44(%rbp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	-40(%rbp), %rdi
	call	cudaFree@PLT
	movq	-32(%rbp), %rdi
	call	cudaFree@PLT
	movq	-24(%rbp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	leaq	-16(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3735:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z9block_addPfS_"
.LC5:
	.string	"_Z10prefix_sumPfS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3774:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9block_addPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10prefix_sumPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3774:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1092616192
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>

#define BLOCK_SIZE 1024
#define NUM_OF_BANKS 32
#define LOG_NUM_OF_BANKS 5
#define SHIFT_BANK(n) \
    (n + (n >> LOG_NUM_OF_BANKS))


__global__ void prefix_sum(float *in, float *out, float* aux, int noc, int res) {
    __shared__ float temp[2*BLOCK_SIZE];
    int n = BLOCK_SIZE*2;
    if (blockIdx.x == noc - 1) n = res;

    int thid = threadIdx.x;
    // printf("thid: %d, bid: %d, noc: %d\n", thid, blockIdx.x, noc);
    temp[SHIFT_BANK(2*thid)] = in[2*(thid + blockIdx.x*BLOCK_SIZE)];
    temp[SHIFT_BANK(2*thid+1)] = in[2*(thid + blockIdx.x*BLOCK_SIZE)+1];
    
    int offset = 1;
    for (int d = (n >> 1); d > 0; d >>= 1) {
        __syncthreads();
        if (thid < d) {
            int ai = SHIFT_BANK(offset*(2*thid+1) - 1);
            int bi = SHIFT_BANK(offset*(2*thid+2) - 1);
            temp[bi] += temp[ai];
        }
        offset <<= 1;
    }
    
    __syncthreads();
    
    
    if (thid == 0) {
        aux[blockIdx.x] = temp[SHIFT_BANK(n - 1)];
        temp[SHIFT_BANK(n-1)] = 0;
    }

    for (int d = 1; d <= (n >> 1); d <<= 1) {
        offset >>= 1;
        __syncthreads();
        if (thid < d) {
            int ai = SHIFT_BANK(offset*(2*thid+1) - 1);
            int bi = SHIFT_BANK(offset*(2*thid+2) - 1);
            float t = temp[ai] + temp[bi];
            temp[ai] = temp[bi];
            temp[bi] = t;
        }
    }

    
    
    __syncthreads();
    out[2*(threadIdx.x + blockIdx.x * BLOCK_SIZE)] = temp[SHIFT_BANK(2*thid)];
    out[2*(threadIdx.x + blockIdx.x * BLOCK_SIZE) + 1] = temp[SHIFT_BANK(2*thid+1)];
}

__global__ void block_add(float *in, float *out){
    out[2*(threadIdx.x + blockIdx.x * BLOCK_SIZE)] += in[blockIdx.x];
    out[2*(threadIdx.x + blockIdx.x * BLOCK_SIZE) + 1] += in[blockIdx.x];
}

void prefix_sum_cpu_rec(float *in, float *out, int noc, int n) {
    float *aux;
    hipMalloc((void **)&aux, noc*sizeof(float));
    int res = 2*BLOCK_SIZE;
    if (n%(2*BLOCK_SIZE) != 0 || n == 0) res = n%(2*BLOCK_SIZE); 
    prefix_sum<<<noc, BLOCK_SIZE>>>(in, out, aux, noc, res);
    
    hipDeviceSynchronize();
    if (noc == 1) {
        hipFree(aux);
        return;
    }
    float *auxout;
    hipMalloc((void **)&auxout, ((noc + 2*BLOCK_SIZE - 1)/(2*BLOCK_SIZE))*sizeof(float));
    prefix_sum_cpu_rec(aux, auxout, (noc + 2*BLOCK_SIZE - 1)/(2*BLOCK_SIZE), noc);
    block_add<<<noc, BLOCK_SIZE>>>(auxout, out);
    hipDeviceSynchronize();
}

int main() {
    int n = 1 << 20;
    float *in, *out;

    int noc = (n + 2*BLOCK_SIZE - 1)/(2*BLOCK_SIZE);
    hipMalloc((void **)&in, n*sizeof(float));
    hipMalloc((void **)&out, n*sizeof(float));
    
    srand(0);    

    float test[n];
    for (int i = 0; i < n; ++i) {
        float t = (rand()%10)/10.0f;
        test[i] = t;  
    }

    hipMemcpy(in, test, n*sizeof(float), hipMemcpyHostToDevice);
    
    auto start = std::chrono::steady_clock::now();

    prefix_sum_cpu_rec(in,out, noc, n);    

    auto end = std::chrono::steady_clock::now();
    auto diff = end - start;
    std::cout << std::chrono::duration <double, std::milli> (diff).count() << " ms" << std::endl;
    printf("%s\n", hipGetErrorString(hipGetLastError()));
    for (int i = n - 1; i < n; ++i) {
        float a;
        hipMemcpy(&a, out+i, sizeof(float), hipMemcpyDeviceToHost);
        std::cout << a << std::endl;
    }
    
    hipFree(in);
    hipFree(out);
}
	.text
	.file	"prefix_sum.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__prefix_sumPfS_S_ii # -- Begin function _Z25__device_stub__prefix_sumPfS_S_ii
	.type	_Z25__device_stub__prefix_sumPfS_S_ii,@function
_Z25__device_stub__prefix_sumPfS_S_ii:  # @_Z25__device_stub__prefix_sumPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10prefix_sumPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__prefix_sumPfS_S_ii, .Lfunc_end0-_Z25__device_stub__prefix_sumPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__block_addPfS_ # -- Begin function _Z24__device_stub__block_addPfS_
	.type	_Z24__device_stub__block_addPfS_,@function
_Z24__device_stub__block_addPfS_:       # @_Z24__device_stub__block_addPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9block_addPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__block_addPfS_, .Lfunc_end1-_Z24__device_stub__block_addPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z18prefix_sum_cpu_recPfS_ii    # -- Begin function _Z18prefix_sum_cpu_recPfS_ii
	.type	_Z18prefix_sum_cpu_recPfS_ii,@function
_Z18prefix_sum_cpu_recPfS_ii:           # @_Z18prefix_sum_cpu_recPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movq	%rsi, %rbx
	movq	%rdi, %r13
	movabsq	$4294968320, %r14               # imm = 0x100000400
	movslq	%edx, %r12
	leaq	(,%r12,4), %rsi
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	movl	%r12d, %eax
	leaq	(%rax,%r14), %r12
	addq	$-1024, %r12                    # imm = 0xFC00
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	leal	2047(%rbp), %eax
	testl	%ebp, %ebp
	cmovnsl	%ebp, %eax
	andl	$-2048, %eax                    # imm = 0xF800
	movl	%ebp, %ecx
	subl	%eax, %ecx
	movl	$2048, %r8d                     # imm = 0x800
	cmovnel	%ecx, %r8d
	testl	%ebp, %ebp
	cmovel	%ecx, %r8d
	movq	8(%rsp), %rdx
	movq	%r13, %rdi
	movq	%rbx, %rsi
	movl	%r15d, %ecx
	callq	_Z25__device_stub__prefix_sumPfS_S_ii
.LBB2_2:
	callq	hipDeviceSynchronize
	cmpl	$1, %r15d
	jne	.LBB2_4
# %bb.3:
	movq	8(%rsp), %rdi
	callq	hipFree
	jmp	.LBB2_7
.LBB2_4:
	leal	2047(%r15), %eax
	leal	4094(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$11, %ecx
	movslq	%ecx, %r13
	leaq	(,%r13,4), %rsi
	leaq	16(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	8(%rsp), %rdi
	movq	(%rbp), %rsi
	movl	%r13d, %edx
	movl	%r15d, %ecx
	callq	_Z18prefix_sum_cpu_recPfS_ii
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_Z24__device_stub__block_addPfS_
.LBB2_6:
	callq	hipDeviceSynchronize
.LBB2_7:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z18prefix_sum_cpu_recPfS_ii, .Lfunc_end2-_Z18prefix_sum_cpu_recPfS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x41200000                      # float 10
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_1:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$4194344, %rsp                  # imm = 0x400028
	.cfi_def_cfa_offset 4194368
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	srand
	movq	%rsp, %r14
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI3_0(%rip), %xmm0
	movss	%xmm0, 32(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$1048576, %rbx                  # imm = 0x100000
	jne	.LBB3_1
# %bb.2:                                # %.critedge
	movq	16(%rsp), %rdi
	leaq	32(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, %rbx
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movl	$1048576, %ecx                  # imm = 0x100000
	callq	_Z18prefix_sum_cpu_recPfS_ii
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI3_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movq	%rax, %rdi
	callq	puts@PLT
	movl	$4194300, %esi                  # imm = 0x3FFFFC
	addq	8(%rsp), %rsi
	leaq	28(%rsp), %rbx
	movl	$4, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rsp
	xorl	%eax, %eax
	addq	$4194344, %rsp                  # imm = 0x400028
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10prefix_sumPfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9block_addPfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10prefix_sumPfS_S_ii,@object  # @_Z10prefix_sumPfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z10prefix_sumPfS_S_ii
	.p2align	3, 0x0
_Z10prefix_sumPfS_S_ii:
	.quad	_Z25__device_stub__prefix_sumPfS_S_ii
	.size	_Z10prefix_sumPfS_S_ii, 8

	.type	_Z9block_addPfS_,@object        # @_Z9block_addPfS_
	.globl	_Z9block_addPfS_
	.p2align	3, 0x0
_Z9block_addPfS_:
	.quad	_Z24__device_stub__block_addPfS_
	.size	_Z9block_addPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" ms"
	.size	.L.str, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10prefix_sumPfS_S_ii"
	.size	.L__unnamed_1, 23

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9block_addPfS_"
	.size	.L__unnamed_2, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__prefix_sumPfS_S_ii
	.addrsig_sym _Z24__device_stub__block_addPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10prefix_sumPfS_S_ii
	.addrsig_sym _Z9block_addPfS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10prefix_sumPfS_S_ii  ; -- Begin function _Z10prefix_sumPfS_S_ii
	.globl	_Z10prefix_sumPfS_S_ii
	.p2align	8
	.type	_Z10prefix_sumPfS_S_ii,@function
_Z10prefix_sumPfS_S_ii:                 ; @_Z10prefix_sumPfS_S_ii
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v7, 1, v0
	s_mov_b32 s8, s15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_lshl_or_b32 v1, s8, 11, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	s_add_i32 s0, s6, -1
	s_mov_b32 s1, 1
	s_cmp_eq_u32 s15, s0
	global_load_b64 v[5:6], v[3:4], off
	v_lshrrev_b32_e32 v3, 4, v0
	s_cselect_b32 s6, s7, 0x800
	v_or_b32_e32 v4, 1, v7
	s_ashr_i32 s0, s6, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_lshl_u32 v3, v7, v3, 2
	s_cmp_lt_i32 s0, 1
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v3, v5, v6 offset1:1
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.lr.ph
	s_mov_b32 s7, s0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s7, v0
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[5:6], null, s1, v4, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, s1, v5
	v_ashrrev_i32_e32 v7, 5, v5
	v_ashrrev_i32_e32 v8, 5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_lshl_u32 v5, v7, v5, 2
	v_add_lshl_u32 v6, v8, v6, 2
	ds_load_b32 v5, v5
	ds_load_b32 v7, v6
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v5, v5, v7
	ds_store_b32 v6, v5
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b32 s1, s1, 1
	s_lshr_b32 s9, s7, 1
	s_cmp_lt_u32 s7, 2
	s_cbranch_scc1 .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s7, s9
	s_branch .LBB0_2
.LBB0_6:                                ; %Flow88
	s_mov_b32 s9, 0
	s_mov_b32 s7, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_8
; %bb.7:
	s_lshl_b64 s[8:9], s[8:9], 2
	v_mov_b32_e32 v7, 0
	s_add_u32 s4, s4, s8
	s_addc_u32 s5, s5, s9
	s_add_i32 s6, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s8, s6, 5
	s_add_i32 s8, s8, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s8, 2
	v_mov_b32_e32 v5, s6
	ds_load_b32 v6, v5
	ds_store_b32 v5, v7
	s_waitcnt lgkmcnt(1)
	global_store_b32 v7, v6, s[4:5]
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s7
	s_cmp_lt_i32 s0, 1
	s_mov_b32 s4, 1
	s_cbranch_scc1 .LBB0_12
.LBB0_9:                                ; =>This Inner Loop Header: Depth=1
	s_ashr_i32 s1, s1, 1
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s4, v0
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	v_mad_u64_u32 v[5:6], null, s1, v4, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, s1, v5
	v_ashrrev_i32_e32 v7, 5, v5
	v_ashrrev_i32_e32 v8, 5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_lshl_u32 v5, v7, v5, 2
	v_add_lshl_u32 v6, v8, v6, 2
	ds_load_b32 v7, v5
	ds_load_b32 v8, v6
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v7, v7, v8
	ds_store_b32 v5, v8
	ds_store_b32 v6, v7
.LBB0_11:                               ;   in Loop: Header=BB0_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_lshl_b32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_i32 s4, s0
	s_cbranch_scc0 .LBB0_9
.LBB0_12:                               ; %._crit_edge70
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[3:4], v3 offset1:1
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[0:1], v[3:4], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10prefix_sumPfS_S_ii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10prefix_sumPfS_S_ii, .Lfunc_end0-_Z10prefix_sumPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 604
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9block_addPfS_        ; -- Begin function _Z9block_addPfS_
	.globl	_Z9block_addPfS_
	.p2align	8
	.type	_Z9block_addPfS_,@function
_Z9block_addPfS_:                       ; @_Z9block_addPfS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 1, v0
	s_mov_b32 s4, s15
	s_mov_b32 s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_or_b32 v0, s4, 11, v0
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_lshl_b64 s[2:3], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s2
	global_load_b64 v[4:5], v[2:3], off
	s_addc_u32 s1, s1, s3
	s_load_b32 s2, s[0:1], 0x0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v0, s2, v4
	global_store_b32 v[2:3], v0, off
	global_load_b32 v0, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v5
	global_store_b32 v[2:3], v0, off offset:4
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9block_addPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9block_addPfS_, .Lfunc_end1-_Z9block_addPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10prefix_sumPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10prefix_sumPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9block_addPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9block_addPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
