// In this assignment you will write a kernel for vector addition 
// you will also go through generalized processing from of a 
// GPU accelerated application. 
// These are:
//         1) initialize the host and data (allocate memory, load data, ...)
//         2) initialize the device (allocate memory, set its properties, ...)
//         3) transfer data to the device
//         4) run your kernel which will generate some result
//         5) transfer results to the host (eventually)
//         6) clean up (deallocate memory)
//         Run your code
//            
// You should follow this assignment in steps mentioned in above list. 
// The TASK 1 correspond to initialization of the host, TASK 2 to 
// initialization of the device and so on.

// NOTE: You should finish your basic "Hello world" assignment first, before 
//       doing this one.

#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cuda_runtime_api.h>

//----------------------------------------------------------------------
// TASK 4.0: Write your own kernel for vector addition
//
// To calculate the index of the data which given thread should operate
// on use pre-set variables threadIdx, blockIdx, blockDim and gridDim.
//
// Remember that kernel is written from point of view of a single thread,
// i.e. like serial code CPU.


// write your kernel here
  __global__ void vector_add(float *d_C, float *d_A, float *d_B) {
    int index = blockIdx.x*blockDim.x + threadIdx.x;
    d_C[index] = d_A[index] + d_B[index];
  }

//----------------------------------------------------------------------






int main(void) {
  //----------------------------------------------------------------------
  // TASK 1: Our overall task is to calculate vector addition. To that end
  //         we have to declare arrays of float which will hold input data,
  //         vectors A and B and also the resulting vector C. All these 
  //         vectors will contain N elements (floats).
  // 
  // First you have to declare variables A, B and C. Remember that dynamically 
  // allocated arrays are expressed with pointers. Allocation of a pointer
  // looks like this: int *pointer_to_int;
  
  // Second step in initialization of the host is allocation of the memory
  // for our data. Allocation on the host could be done by using a 
  // function: void* malloc (size_t size);
  // pointer_to_int = (int*) malloc(size of the array in bytes);
  // The casting of the returned value is necessary because you want both 
  // sides of the expression of the same type. Since malloc returns void*,
  // which you can view as a pointer to a memory without any context, we
  // provide that context by telling the code that what this refers to is
  // actually an int.   
  
  // Last step is to initialize data on the host. We do not load any data
  // because we do not have any, which means you can initialize them to 
  // whatever value you want. However try to initialize them to values 
  // with which you can easily check that your implementation is correct.
  // However try to avoid using values which are same for every element.
  // You can initialize your data for example using a 'for' loop.

  size_t N = 320;
  
  // put your code here
    float *A, *B, *C;

    A = (float*)malloc(N * sizeof(float));
    B = (float*)malloc(N * sizeof(float));
    C = (float*)malloc(N * sizeof(float));
    
    for (int i = 0; i < N; i++) {
      A[i] = (float)(i % 5) + 1;
      B[i] = (float)(i % 3) + 1;
    }
  //----------------------------------------------------------------------
  
  
  //----------------------------------------------------------------------
  // TASK 2: In this task we initialize the GPU, declare variables which 
  //         resided on the GPU and then allocate memory for them.
  //           
  // We must start with device initialization. We do this by using same 
  // process we have used in our "Hello world" code.
  
  // Declaration of variables is no different than what we do for the host
  // it is the location to which the pointer points to which matters.
  
  // Lastly we allocate memory on the device by using cudaMalloc
  // cudaError_t cudaMalloc(void** pointer, size_t size);
  
  // put your code here
    // initiate GPU
    int deviceid = 0;
    int devCount;
    // get number of GPUs available
    cudaGetDeviceCount(&devCount);
    // Check if we have enough GPUs
    if (deviceid < devCount) {
      // tell CUDA that we want to use GPU 0
      cudaSetDevice(deviceid);
    } else {
      printf("Unable to load device.");
      return(1);
    }

    // Define device variables
      float *d_A, *d_B, *d_C;

    // Allocate device memory
      cudaError_t err_code;

      err_code = cudaMalloc(&d_A, N*sizeof(float));
      if(err_code!=cudaSuccess) return(1);
      err_code = cudaMalloc(&d_B, N*sizeof(float));
      if(err_code!=cudaSuccess) return(1);
      err_code= cudaMalloc(&d_C, N*sizeof(float));
      if(err_code!=cudaSuccess) return(1);
      cudaMemset(d_C, 0, N*sizeof(float));
  //----------------------------------------------------------------------
  
  
  //----------------------------------------------------------------------
  // TASK 3: Here we would like to copy the data from the host to the device
  
  // To do that we will use function 'cudaMemcpy'
  // cudaError_t cudaMemcpy(destination, source, size, direction);
  // where direction is either from the host to the device
  // 'cudaMemcpyHostToDevice' or from the device to the host 
  // 'cudaMemcpyDeviceToHost'.
    
  // put your code here
     err_code = cudaMemcpy(d_A, A, N*sizeof(float), cudaMemcpyHostToDevice);
     if(err_code!=cudaSuccess) return(1);
     err_code = cudaMemcpy(d_B, B, N*sizeof(float), cudaMemcpyHostToDevice);
     if(err_code!=cudaSuccess) return(1);
  //----------------------------------------------------------------------

  

  //----------------------------------------------------------------------
  // TASK 4.0: To write your vector addition kernel. Full task is above.
  //----------------------------------------------------------------------
  
  //----------------------------------------------------------------------
  // TASK 4.1: Now having data on the device and having a kernel for vector
  //           addition we would like to execute that kernel. 
  //
  // You can choose what ever grid configuration you desire, but take into 
  // account that, unless you have written the kernel otherwise, it cannot
  // handle data sizes which are not equal to 
  // (number of threads per block)*(number of blocks) == N !
  // In other words if N=200 and you are using 25 threads per block
  // you must launch your kernel with 8 blocks.
  
  // put your code here
    dim3 Gd(10,1,1);
    dim3 Bd(32,1,1);
    vector_add<<<Gd, Bd>>>(d_C, d_A, d_B);
  //----------------------------------------------------------------------

  //----------------------------------------------------------------------
  // TASK 5: Transfer data to the host.
  
  // put your code here
    err_code = cudaMemcpy(C, d_C, N*sizeof(float), cudaMemcpyDeviceToHost);
    if(err_code!=cudaSuccess) return(1);
  //----------------------------------------------------------------------
  
  
  if(N>10){
	  printf("Check:\n");
	  for(int f=0; f<10; f++){
		  printf("Is %f + %f = %f?\n", A[f], B[f], C[f]);
	  }
  }
  
  
  //----------------------------------------------------------------------
  // TASK 6: Free allocated resources.
  //
  // To do this on the device use cudaFree();
  
  // put your code here
    cudaFree(d_A);
    cudaFree(d_B);
    cudaFree(d_C);
    free(A);
    free(B);
    free(C);
  //----------------------------------------------------------------------
  
  // TASK 7: Run your code
  return(0);
}


	.file	"tmpxft_002b6443_00000000-6_vectoradd.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z10vector_addPfS_S_PfS_S_
	.type	_Z34__device_stub__Z10vector_addPfS_S_PfS_S_, @function
_Z34__device_stub__Z10vector_addPfS_S_PfS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10vector_addPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z34__device_stub__Z10vector_addPfS_S_PfS_S_, .-_Z34__device_stub__Z10vector_addPfS_S_PfS_S_
	.globl	_Z10vector_addPfS_S_
	.type	_Z10vector_addPfS_S_, @function
_Z10vector_addPfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10vector_addPfS_S_PfS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z10vector_addPfS_S_, .-_Z10vector_addPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Unable to load device."
.LC2:
	.string	"Check:\n"
.LC3:
	.string	"Is %f + %f = %f?\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$1280, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$1280, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$1280, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movss	.LC0(%rip), %xmm1
	xorl	%ecx, %ecx
	movl	$5, %r8d
	movq	%rax, %r13
	movl	$3, %edi
.L9:
	movl	%ecx, %eax
	cltd
	idivl	%r8d
	movl	%ecx, %eax
	cvtsi2ssl	%edx, %xmm0
	cltd
	idivl	%edi
	addss	%xmm1, %xmm0
	movss	%xmm0, 0(%rbp,%rcx,4)
	cvtsi2ssl	%edx, %xmm0
	addss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%rcx,4)
	incq	%rcx
	cmpq	$320, %rcx
	jne	.L9
	leaq	4(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	cmpl	$0, 4(%rsp)
	jle	.L10
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	8(%rsp), %rdi
	movl	$1280, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L11
.L13:
	movl	$1, %eax
	jmp	.L8
.L10:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L13
.L11:
	leaq	16(%rsp), %rdi
	movl	$1280, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L13
	leaq	24(%rsp), %rdi
	movl	$1280, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L13
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movl	$1280, %edx
	call	cudaMemset@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$1280, %edx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	jne	.L13
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$1280, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	jne	.L13
	movl	$134217729, %edx
	movl	$2147483653, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z34__device_stub__Z10vector_addPfS_S_PfS_S_
.L15:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$1280, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	jne	.L13
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%r12d, %r12d
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %r14
.L16:
	cvtss2sd	(%rbx,%r12), %xmm1
	cvtss2sd	0(%rbp,%r12), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	cvtss2sd	0(%r13,%r12), %xmm2
	movb	$3, %al
	addq	$4, %r12
	call	__printf_chk@PLT
	cmpq	$40, %r12
	jne	.L16
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	xorl	%eax, %eax
.L8:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z10vector_addPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10vector_addPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// In this assignment you will write a kernel for vector addition 
// you will also go through generalized processing from of a 
// GPU accelerated application. 
// These are:
//         1) initialize the host and data (allocate memory, load data, ...)
//         2) initialize the device (allocate memory, set its properties, ...)
//         3) transfer data to the device
//         4) run your kernel which will generate some result
//         5) transfer results to the host (eventually)
//         6) clean up (deallocate memory)
//         Run your code
//            
// You should follow this assignment in steps mentioned in above list. 
// The TASK 1 correspond to initialization of the host, TASK 2 to 
// initialization of the device and so on.

// NOTE: You should finish your basic "Hello world" assignment first, before 
//       doing this one.

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

#include <hip/hip_runtime_api.h>

//----------------------------------------------------------------------
// TASK 4.0: Write your own kernel for vector addition
//
// To calculate the index of the data which given thread should operate
// on use pre-set variables threadIdx, blockIdx, blockDim and gridDim.
//
// Remember that kernel is written from point of view of a single thread,
// i.e. like serial code CPU.


// write your kernel here
  __global__ void vector_add(float *d_C, float *d_A, float *d_B) {
    int index = blockIdx.x*blockDim.x + threadIdx.x;
    d_C[index] = d_A[index] + d_B[index];
  }

//----------------------------------------------------------------------






int main(void) {
  //----------------------------------------------------------------------
  // TASK 1: Our overall task is to calculate vector addition. To that end
  //         we have to declare arrays of float which will hold input data,
  //         vectors A and B and also the resulting vector C. All these 
  //         vectors will contain N elements (floats).
  // 
  // First you have to declare variables A, B and C. Remember that dynamically 
  // allocated arrays are expressed with pointers. Allocation of a pointer
  // looks like this: int *pointer_to_int;
  
  // Second step in initialization of the host is allocation of the memory
  // for our data. Allocation on the host could be done by using a 
  // function: void* malloc (size_t size);
  // pointer_to_int = (int*) malloc(size of the array in bytes);
  // The casting of the returned value is necessary because you want both 
  // sides of the expression of the same type. Since malloc returns void*,
  // which you can view as a pointer to a memory without any context, we
  // provide that context by telling the code that what this refers to is
  // actually an int.   
  
  // Last step is to initialize data on the host. We do not load any data
  // because we do not have any, which means you can initialize them to 
  // whatever value you want. However try to initialize them to values 
  // with which you can easily check that your implementation is correct.
  // However try to avoid using values which are same for every element.
  // You can initialize your data for example using a 'for' loop.

  size_t N = 320;
  
  // put your code here
    float *A, *B, *C;

    A = (float*)malloc(N * sizeof(float));
    B = (float*)malloc(N * sizeof(float));
    C = (float*)malloc(N * sizeof(float));
    
    for (int i = 0; i < N; i++) {
      A[i] = (float)(i % 5) + 1;
      B[i] = (float)(i % 3) + 1;
    }
  //----------------------------------------------------------------------
  
  
  //----------------------------------------------------------------------
  // TASK 2: In this task we initialize the GPU, declare variables which 
  //         resided on the GPU and then allocate memory for them.
  //           
  // We must start with device initialization. We do this by using same 
  // process we have used in our "Hello world" code.
  
  // Declaration of variables is no different than what we do for the host
  // it is the location to which the pointer points to which matters.
  
  // Lastly we allocate memory on the device by using cudaMalloc
  // cudaError_t cudaMalloc(void** pointer, size_t size);
  
  // put your code here
    // initiate GPU
    int deviceid = 0;
    int devCount;
    // get number of GPUs available
    hipGetDeviceCount(&devCount);
    // Check if we have enough GPUs
    if (deviceid < devCount) {
      // tell CUDA that we want to use GPU 0
      hipSetDevice(deviceid);
    } else {
      printf("Unable to load device.");
      return(1);
    }

    // Define device variables
      float *d_A, *d_B, *d_C;

    // Allocate device memory
      hipError_t err_code;

      err_code = hipMalloc(&d_A, N*sizeof(float));
      if(err_code!=hipSuccess) return(1);
      err_code = hipMalloc(&d_B, N*sizeof(float));
      if(err_code!=hipSuccess) return(1);
      err_code= hipMalloc(&d_C, N*sizeof(float));
      if(err_code!=hipSuccess) return(1);
      hipMemset(d_C, 0, N*sizeof(float));
  //----------------------------------------------------------------------
  
  
  //----------------------------------------------------------------------
  // TASK 3: Here we would like to copy the data from the host to the device
  
  // To do that we will use function 'cudaMemcpy'
  // cudaError_t cudaMemcpy(destination, source, size, direction);
  // where direction is either from the host to the device
  // 'cudaMemcpyHostToDevice' or from the device to the host 
  // 'cudaMemcpyDeviceToHost'.
    
  // put your code here
     err_code = hipMemcpy(d_A, A, N*sizeof(float), hipMemcpyHostToDevice);
     if(err_code!=hipSuccess) return(1);
     err_code = hipMemcpy(d_B, B, N*sizeof(float), hipMemcpyHostToDevice);
     if(err_code!=hipSuccess) return(1);
  //----------------------------------------------------------------------

  

  //----------------------------------------------------------------------
  // TASK 4.0: To write your vector addition kernel. Full task is above.
  //----------------------------------------------------------------------
  
  //----------------------------------------------------------------------
  // TASK 4.1: Now having data on the device and having a kernel for vector
  //           addition we would like to execute that kernel. 
  //
  // You can choose what ever grid configuration you desire, but take into 
  // account that, unless you have written the kernel otherwise, it cannot
  // handle data sizes which are not equal to 
  // (number of threads per block)*(number of blocks) == N !
  // In other words if N=200 and you are using 25 threads per block
  // you must launch your kernel with 8 blocks.
  
  // put your code here
    dim3 Gd(10,1,1);
    dim3 Bd(32,1,1);
    vector_add<<<Gd, Bd>>>(d_C, d_A, d_B);
  //----------------------------------------------------------------------

  //----------------------------------------------------------------------
  // TASK 5: Transfer data to the host.
  
  // put your code here
    err_code = hipMemcpy(C, d_C, N*sizeof(float), hipMemcpyDeviceToHost);
    if(err_code!=hipSuccess) return(1);
  //----------------------------------------------------------------------
  
  
  if(N>10){
	  printf("Check:\n");
	  for(int f=0; f<10; f++){
		  printf("Is %f + %f = %f?\n", A[f], B[f], C[f]);
	  }
  }
  
  
  //----------------------------------------------------------------------
  // TASK 6: Free allocated resources.
  //
  // To do this on the device use cudaFree();
  
  // put your code here
    hipFree(d_A);
    hipFree(d_B);
    hipFree(d_C);
    free(A);
    free(B);
    free(C);
  //----------------------------------------------------------------------
  
  // TASK 7: Run your code
  return(0);
}


	.text
	.file	"vectoradd.hip"
	.globl	_Z25__device_stub__vector_addPfS_S_ # -- Begin function _Z25__device_stub__vector_addPfS_S_
	.type	_Z25__device_stub__vector_addPfS_S_,@function
_Z25__device_stub__vector_addPfS_S_:    # @_Z25__device_stub__vector_addPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10vector_addPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__vector_addPfS_S_, .Lfunc_end0-_Z25__device_stub__vector_addPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1280, %edi                     # imm = 0x500
	callq	malloc
	movq	%rax, %rbx
	movl	$1280, %edi                     # imm = 0x500
	callq	malloc
	movq	%rax, %r14
	movl	$1280, %edi                     # imm = 0x500
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
	movl	$65535, %ecx                    # imm = 0xFFFF
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, %edx
	andl	%ecx, %edx
	imull	$52429, %edx, %esi              # imm = 0xCCCD
	shrl	$18, %esi
	leal	(%rsi,%rsi,4), %esi
	movl	%eax, %edi
	subl	%esi, %edi
	imull	$43691, %edx, %edx              # imm = 0xAAAB
	shrl	$17, %edx
	leal	(%rdx,%rdx,2), %edx
	andl	%ecx, %edi
	xorps	%xmm1, %xmm1
	cvtsi2ss	%edi, %xmm1
	movl	%eax, %esi
	subl	%edx, %esi
	addss	%xmm0, %xmm1
	movss	%xmm1, (%rbx,%rax,4)
	andl	%ecx, %esi
	xorps	%xmm1, %xmm1
	cvtsi2ss	%esi, %xmm1
	addss	%xmm0, %xmm1
	movss	%xmm1, (%r14,%rax,4)
	incq	%rax
	cmpq	$320, %rax                      # imm = 0x140
	jne	.LBB1_1
# %bb.2:
	leaq	28(%rsp), %r12
	movq	%r12, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%r12)
	jle	.LBB1_15
# %bb.3:
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	16(%rsp), %rdi
	movl	$1280, %esi                     # imm = 0x500
	callq	hipMalloc
	movl	$1, %ebp
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.4:
	leaq	8(%rsp), %rdi
	movl	$1280, %esi                     # imm = 0x500
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.5:
	movq	%rsp, %rdi
	movl	$1280, %esi                     # imm = 0x500
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.6:
	movq	(%rsp), %rdi
	movl	$1280, %edx                     # imm = 0x500
	xorl	%esi, %esi
	callq	hipMemset
	movq	16(%rsp), %rdi
	movl	$1, %ebp
	movl	$1280, %edx                     # imm = 0x500
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.7:
	movq	8(%rsp), %rdi
	movl	$1, %ebp
	movl	$1280, %edx                     # imm = 0x500
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.8:
	movabsq	$4294967306, %rdi               # imm = 0x10000000A
	leaq	22(%rdi), %rdx
	movl	$1, %ebp
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z25__device_stub__vector_addPfS_S_
.LBB1_10:
	movq	(%rsp), %rsi
	movl	$1280, %edx                     # imm = 0x500
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.11:
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r12d, %r12d
.LBB1_12:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	(%r14,%r12,4), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	(%r15,%r12,4), %xmm2
	movl	$.L.str.2, %edi
	movb	$3, %al
	callq	printf
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB1_12
# %bb.13:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%ebp, %ebp
	jmp	.LBB1_14
.LBB1_15:
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %ebp
.LBB1_14:
	movl	%ebp, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10vector_addPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10vector_addPfS_S_,@object    # @_Z10vector_addPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z10vector_addPfS_S_
	.p2align	3, 0x0
_Z10vector_addPfS_S_:
	.quad	_Z25__device_stub__vector_addPfS_S_
	.size	_Z10vector_addPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Unable to load device."
	.size	.L.str, 23

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Is %f + %f = %f?\n"
	.size	.L.str.2, 18

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10vector_addPfS_S_"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Check:"
	.size	.Lstr, 7

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__vector_addPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10vector_addPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10vector_addPfS_S_    ; -- Begin function _Z10vector_addPfS_S_
	.globl	_Z10vector_addPfS_S_
	.p2align	8
	.type	_Z10vector_addPfS_S_,@function
_Z10vector_addPfS_S_:                   ; @_Z10vector_addPfS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10vector_addPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10vector_addPfS_S_, .Lfunc_end0-_Z10vector_addPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10vector_addPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10vector_addPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
