#include "includes.h"
__global__ void CalculateFixed( const float *subBG, const float *subT, const int *subM, float *fixed, const int wb, const int hb, const int wt, const int ht, const int oy, const int ox ){
const int dir[16][2] = {{-2, -2},				{0, -2},			{2, -2},
{-1, -1},	{0, -1},	{1, -1},
{-2, 0},	{-1, 0},				{1, 0},	{2, 0},
{-1, 1},	{0, 1},		{1, 1},
{-2, 2},				{0, 2},				{2, 2}};
const int coef[16] = {	1,		1,		1,
2,	2,	2,
1,	2,		2,	1,
2,	2,	2,
1,		1,		1};
const int num = 24;
const int yt = blockIdx.y * blockDim.y + threadIdx.y;
const int xt = blockIdx.x * blockDim.x + threadIdx.x;
const int curt = wt * yt + xt;
if (yt < ht && xt < wt){
float sum[3] = {0}, bsum[3] = {0};
for (int i=0; i<16; i++){
int dxt = xt + dir[i][0];
int dyt = yt + dir[i][1];
int dcurt = wt * dyt + dxt;
int dxb = ox + dxt;
int dyb = oy + dyt;
if (dxt >= 0 && dxt < wt && dyt >= 0 && dyt < ht){
sum[0] += subT[dcurt*3 + 0] * coef[i];
sum[1] += subT[dcurt*3 + 1] * coef[i];
sum[2] += subT[dcurt*3 + 2] * coef[i];
}
else {
sum[0] += subT[curt*3 + 0] * coef[i];
sum[1] += subT[curt*3 + 1] * coef[i];
sum[2] += subT[curt*3 + 2] * coef[i];
}

if (dxt < 0 || dxt >= wt || dyt < 0 || dyt >= ht ||!subM[dcurt]){
dxb =	dxb <  0 ? 0:
dxb >= wb? wb-1: dxb;
dyb =	dyb <  0 ? 0:
dyb >= hb? hb-1: dyb;
int dcurb = wb * dyb + dxb;
bsum[0] += subBG[dcurb*3 + 0] * coef[i];
bsum[1] += subBG[dcurb*3 + 1] * coef[i];
bsum[2] += subBG[dcurb*3 + 2] * coef[i];
}
}
fixed[curt*3+0] = subT[curt*3+0] - sum[0] / num + bsum[0] / num;
fixed[curt*3+1] = subT[curt*3+1] - sum[1] / num + bsum[1] / num;
fixed[curt*3+2] = subT[curt*3+2] - sum[2] / num + bsum[2] / num;
}
}
	.file	"tmpxft_00387986_00000000-6_CalculateFixed.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z49__device_stub__Z14CalculateFixedPKfS0_PKiPfiiiiiiPKfS0_PKiPfiiiiii
	.type	_Z49__device_stub__Z14CalculateFixedPKfS0_PKiPfiiiiiiPKfS0_PKiPfiiiiii, @function
_Z49__device_stub__Z14CalculateFixedPKfS0_PKiPfiiiiiiPKfS0_PKiPfiiiiii:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z14CalculateFixedPKfS0_PKiPfiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L2:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z49__device_stub__Z14CalculateFixedPKfS0_PKiPfiiiiiiPKfS0_PKiPfiiiiii, .-_Z49__device_stub__Z14CalculateFixedPKfS0_PKiPfiiiiiiPKfS0_PKiPfiiiiii
	.globl	_Z14CalculateFixedPKfS0_PKiPfiiiiii
	.type	_Z14CalculateFixedPKfS0_PKiPfiiiiii, @function
_Z14CalculateFixedPKfS0_PKiPfiiiiii:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z14CalculateFixedPKfS0_PKiPfiiiiiiPKfS0_PKiPfiiiiii
	.cfi_endproc
.LFE2033:
	.size	_Z14CalculateFixedPKfS0_PKiPfiiiiii, .-_Z14CalculateFixedPKfS0_PKiPfiiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z14CalculateFixedPKfS0_PKiPfiiiiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14CalculateFixedPKfS0_PKiPfiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void CalculateFixed( const float *subBG, const float *subT, const int *subM, float *fixed, const int wb, const int hb, const int wt, const int ht, const int oy, const int ox ){
const int dir[16][2] = {{-2, -2},				{0, -2},			{2, -2},
{-1, -1},	{0, -1},	{1, -1},
{-2, 0},	{-1, 0},				{1, 0},	{2, 0},
{-1, 1},	{0, 1},		{1, 1},
{-2, 2},				{0, 2},				{2, 2}};
const int coef[16] = {	1,		1,		1,
2,	2,	2,
1,	2,		2,	1,
2,	2,	2,
1,		1,		1};
const int num = 24;
const int yt = blockIdx.y * blockDim.y + threadIdx.y;
const int xt = blockIdx.x * blockDim.x + threadIdx.x;
const int curt = wt * yt + xt;
if (yt < ht && xt < wt){
float sum[3] = {0}, bsum[3] = {0};
for (int i=0; i<16; i++){
int dxt = xt + dir[i][0];
int dyt = yt + dir[i][1];
int dcurt = wt * dyt + dxt;
int dxb = ox + dxt;
int dyb = oy + dyt;
if (dxt >= 0 && dxt < wt && dyt >= 0 && dyt < ht){
sum[0] += subT[dcurt*3 + 0] * coef[i];
sum[1] += subT[dcurt*3 + 1] * coef[i];
sum[2] += subT[dcurt*3 + 2] * coef[i];
}
else {
sum[0] += subT[curt*3 + 0] * coef[i];
sum[1] += subT[curt*3 + 1] * coef[i];
sum[2] += subT[curt*3 + 2] * coef[i];
}

if (dxt < 0 || dxt >= wt || dyt < 0 || dyt >= ht ||!subM[dcurt]){
dxb =	dxb <  0 ? 0:
dxb >= wb? wb-1: dxb;
dyb =	dyb <  0 ? 0:
dyb >= hb? hb-1: dyb;
int dcurb = wb * dyb + dxb;
bsum[0] += subBG[dcurb*3 + 0] * coef[i];
bsum[1] += subBG[dcurb*3 + 1] * coef[i];
bsum[2] += subBG[dcurb*3 + 2] * coef[i];
}
}
fixed[curt*3+0] = subT[curt*3+0] - sum[0] / num + bsum[0] / num;
fixed[curt*3+1] = subT[curt*3+1] - sum[1] / num + bsum[1] / num;
fixed[curt*3+2] = subT[curt*3+2] - sum[2] / num + bsum[2] / num;
}
}
	.text
	.file	"CalculateFixed.hip"
	.globl	_Z29__device_stub__CalculateFixedPKfS0_PKiPfiiiiii # -- Begin function _Z29__device_stub__CalculateFixedPKfS0_PKiPfiiiiii
	.type	_Z29__device_stub__CalculateFixedPKfS0_PKiPfiiiiii,@function
_Z29__device_stub__CalculateFixedPKfS0_PKiPfiiiiii: # @_Z29__device_stub__CalculateFixedPKfS0_PKiPfiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14CalculateFixedPKfS0_PKiPfiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__CalculateFixedPKfS0_PKiPfiiiiii, .Lfunc_end0-_Z29__device_stub__CalculateFixedPKfS0_PKiPfiiiiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14CalculateFixedPKfS0_PKiPfiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14CalculateFixedPKfS0_PKiPfiiiiii,@object # @_Z14CalculateFixedPKfS0_PKiPfiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z14CalculateFixedPKfS0_PKiPfiiiiii
	.p2align	3, 0x0
_Z14CalculateFixedPKfS0_PKiPfiiiiii:
	.quad	_Z29__device_stub__CalculateFixedPKfS0_PKiPfiiiiii
	.size	_Z14CalculateFixedPKfS0_PKiPfiiiiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z14CalculateFixedPKfS0_PKiPfiiiiii"
	.size	.L__unnamed_1, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__CalculateFixedPKfS0_PKiPfiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14CalculateFixedPKfS0_PKiPfiiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14CalculateFixedPKfS0_PKiPfiiiiii ; -- Begin function _Z14CalculateFixedPKfS0_PKiPfiiiiii
	.globl	_Z14CalculateFixedPKfS0_PKiPfiiiiii
	.p2align	8
	.type	_Z14CalculateFixedPKfS0_PKiPfiiiiii,@function
_Z14CalculateFixedPKfS0_PKiPfiiiiii:    ; @_Z14CalculateFixedPKfS0_PKiPfiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[16:19], s[0:1], 0x20
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[18:19], null, s15, s3, v[1:2]
	v_mad_u64_u32 v[21:22], null, s14, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s19, v18
	v_cmp_gt_i32_e64 s2, s18, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_16
; %bb.1:                                ; %.preheader
	s_delay_alu instid0(VALU_DEP_3)
	v_mad_u64_u32 v[0:1], null, v18, s18, v[21:22]
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x30
	v_mov_b32_e32 v33, 0
	v_dual_mov_b32 v3, 2 :: v_dual_mov_b32 v30, 0
	v_dual_mov_b32 v31, 0 :: v_dual_mov_b32 v34, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_lshl_add_u32 v22, v0, 1, v0
	v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v29, 0
	v_mov_b32_e32 v32, 0
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, __const._Z14CalculateFixedPKfS0_PKiPfiiiiii.dir@rel32@lo+8
	s_addc_u32 s13, s13, __const._Z14CalculateFixedPKfS0_PKiPfiiiiii.dir@rel32@hi+16
	v_ashrrev_i32_e32 v23, 31, v22
	s_add_i32 s20, s16, -1
	s_add_i32 s21, s17, -1
	s_mov_b64 s[14:15], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 2, v[22:23]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v16, vcc_lo, s6, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, s7, v20, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_add_u32 s0, s12, -4
	s_addc_u32 s1, s13, -1
	s_mov_b32 s22, 0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s24, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v24, s0, v21
	v_add_nc_u32_e32 v35, s1, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s23, 0, v24
	v_cmpx_lt_i32_e32 -1, v24
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_le_i32_e32 vcc_lo, s18, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e64 s0, s19, v35
	v_cmp_gt_i32_e64 s1, 0, v35
	s_mov_b32 s22, exec_lo
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_and_not1_b32 s1, s23, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s23, s1, s0
; %bb.4:                                ; %Flow171
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
                                        ; implicit-def: $vgpr37
                                        ; implicit-def: $vgpr36
	s_and_saveexec_b32 s0, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v25, v[16:17], off
	s_mov_b32 m0, s14
	v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v4, v3
	v_dual_mov_b32 v2, v0 :: v_dual_mov_b32 v5, v3
	v_dual_mov_b32 v6, v0 :: v_dual_mov_b32 v7, v3
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v9, v0
	v_dual_mov_b32 v10, v3 :: v_dual_mov_b32 v13, v0
	v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v14, v0
	v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v15, v0
	v_movrels_b32_e32 v1, v0
	s_and_not1_b32 s22, s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_ubyte0_e32 v36, v1
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v37, v25, v36
.LBB0_6:                                ; %Flow172
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u64_u32 v[27:28], null, v35, s18, v[24:25]
	v_dual_mov_b32 v26, v23 :: v_dual_mov_b32 v25, v22
	s_and_saveexec_b32 s0, s22
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v25, v27, 1, v27
	s_mov_b32 m0, s14
	v_dual_mov_b32 v6, v0 :: v_dual_mov_b32 v7, v3
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v9, v0
	v_ashrrev_i32_e32 v26, 31, v25
	v_dual_mov_b32 v10, v3 :: v_dual_mov_b32 v13, v0
	v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v14, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[1:2], 2, v[25:26]
	v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v15, v0
	v_mov_b32_e32 v4, v3
	v_mov_b32_e32 v5, v3
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v28, v[1:2], off
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_movrels_b32_e32 v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_ubyte0_e32 v36, v1
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v37, v28, v36
.LBB0_8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[25:26]
	v_cmp_gt_i32_e64 s22, 0, v24
	s_mov_b32 s23, exec_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b64 v[25:26], v[1:2], off offset:4
	v_cmpx_lt_i32_e32 -1, v24
	s_cbranch_execz .LBB0_12
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_gt_i32_e32 vcc_lo, s18, v24
	v_cmp_gt_i32_e64 s0, s19, v35
	v_cmp_lt_i32_e64 s1, -1, v35
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s24, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, s24, -1
	s_and_saveexec_b32 s1, s24
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v28, 31, v27
	s_and_not1_b32 s0, s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[27:28]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_and_b32 s24, vcc_lo, exec_lo
	s_or_b32 s0, s0, s24
.LBB0_11:                               ; %Flow169
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s22, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s22, s1, s0
.LBB0_12:                               ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	s_and_saveexec_b32 s0, s22
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v1, s3, v24
	s_mov_b32 m0, s14
	v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v14, v0
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v13, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s16, v1
	v_dual_mov_b32 v10, v3 :: v_dual_mov_b32 v15, v0
	v_mov_b32_e32 v6, v0
	v_dual_mov_b32 v9, v0 :: v_dual_cndmask_b32 v4, s20, v1
	v_add_nc_u32_e32 v2, s2, v35
	v_cmp_gt_i32_e32 vcc_lo, s17, v2
	v_cndmask_b32_e32 v5, s21, v2, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v1, 0, v4, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, 0, v5, vcc_lo
	v_mad_u64_u32 v[4:5], null, v2, s16, v[1:2]
	v_mov_b32_e32 v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v1, v4, 1, v4
	v_mov_b32_e32 v4, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b96 v[38:40], v[1:2], off
	v_mov_b32_e32 v1, v0
	v_dual_mov_b32 v2, v0 :: v_dual_mov_b32 v11, v3
	v_mov_b32_e32 v12, v3
	v_movrels_b32_e32 v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_ubyte0_e32 v1, v1
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v29, v40, v1
	v_fmac_f32_e32 v34, v38, v1
	v_fmac_f32_e32 v32, v39, v1
.LBB0_14:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_u32 s14, s14, 1
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v33, v33, v37 :: v_dual_fmac_f32 v30, v26, v36
	v_fmac_f32_e32 v31, v25, v36
	s_addc_u32 s15, s15, 0
	s_add_u32 s12, s12, 8
	s_addc_u32 s13, s13, 0
	s_cmp_eq_u32 s14, 16
	s_cbranch_scc0 .LBB0_2
; %bb.15:
	global_load_b32 v0, v[16:17], off
	v_div_scale_f32 v1, null, 0x41c00000, 0x41c00000, v33
	v_div_scale_f32 v2, null, 0x41c00000, 0x41c00000, v34
	v_div_scale_f32 v7, vcc_lo, v33, 0x41c00000, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v3, v1
	v_rcp_f32_e32 v4, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v1, v3, 1.0
	v_fma_f32 v6, -v2, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v3, v5, v3 :: v_dual_fmac_f32 v4, v6, v4
	v_div_scale_f32 v5, s0, v34, 0x41c00000, v34
	v_mul_f32_e32 v6, v7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v8, v5, v4
	v_fma_f32 v9, -v1, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, -v2, v8, v5
	v_fmac_f32_e32 v6, v9, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v8, v10, v4
	v_fma_f32 v1, -v1, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, -v2, v8, v5
	v_div_fmas_f32 v1, v1, v3, v6
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v2, v2, v4, v8
	v_div_scale_f32 v4, null, 0x41c00000, 0x41c00000, v32
	v_div_fixup_f32 v1, v1, 0x41c00000, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v2, v2, 0x41c00000, v34
	v_rcp_f32_e32 v6, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v4, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, v8, v6
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v3, v0, v1
	v_add_co_u32 v0, vcc_lo, s10, v19
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v20, vcc_lo
	v_add_f32_e32 v2, v2, v3
	v_div_scale_f32 v3, null, 0x41c00000, 0x41c00000, v31
	v_div_scale_f32 v9, vcc_lo, v31, 0x41c00000, v31
	global_store_b32 v[0:1], v2, off
	global_load_b32 v2, v[16:17], off offset:4
	v_rcp_f32_e32 v5, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v3, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v5, v7, v5
	v_div_scale_f32 v7, s0, v32, 0x41c00000, v32
	v_mul_f32_e32 v8, v9, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v10, v7, v6
	v_fma_f32 v11, -v3, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v4, v10, v7
	v_fmac_f32_e32 v8, v11, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, v12, v6
	v_fma_f32 v3, -v3, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v4, -v4, v10, v7
	v_div_fmas_f32 v3, v3, v5, v8
	s_mov_b32 vcc_lo, s0
	v_div_scale_f32 v5, null, 0x41c00000, 0x41c00000, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v4, v4, v6, v10
	v_div_fixup_f32 v3, v3, 0x41c00000, v31
	v_div_scale_f32 v8, vcc_lo, v30, 0x41c00000, v30
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v6, v5
	v_div_fixup_f32 v4, v4, 0x41c00000, v32
	v_div_scale_f32 v10, s0, v29, 0x41c00000, v29
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v3
	v_div_scale_f32 v3, null, 0x41c00000, 0x41c00000, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, v4, v2
	v_rcp_f32_e32 v4, v3
	global_store_b32 v[0:1], v2, off offset:4
	global_load_b32 v2, v[16:17], off offset:8
	v_fma_f32 v7, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v7, v4
	v_fma_f32 v7, -v5, v6, 1.0
	v_dual_mul_f32 v9, v8, v4 :: v_dual_fmac_f32 v6, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v3, v9, v8
	v_mul_f32_e32 v11, v10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, v7, v4
	v_fma_f32 v7, -v5, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v3, -v3, v9, v8
	v_fmac_f32_e32 v11, v7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v3, v3, v4, v9
	v_fma_f32 v4, -v5, v11, v10
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v3, v3, 0x41c00000, v30
	v_div_fmas_f32 v4, v4, v6, v11
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v2, v2, v3
	v_div_fixup_f32 v3, v4, 0x41c00000, v29
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off offset:8
.LBB0_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14CalculateFixedPKfS0_PKiPfiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 41
		.amdhsa_next_free_sgpr 25
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14CalculateFixedPKfS0_PKiPfiiiiii, .Lfunc_end0-_Z14CalculateFixedPKfS0_PKiPfiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1800
; NumSgprs: 27
; NumVgprs: 41
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 27
; NumVGPRsForWavesPerEU: 41
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__const._Z14CalculateFixedPKfS0_PKiPfiiiiii.dir,@object ; @__const._Z14CalculateFixedPKfS0_PKiPfiiiiii.dir
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
__const._Z14CalculateFixedPKfS0_PKiPfiiiiii.dir:
	.long	4294967294                      ; 0xfffffffe
	.long	4294967294                      ; 0xfffffffe
	.long	0                               ; 0x0
	.long	4294967294                      ; 0xfffffffe
	.long	2                               ; 0x2
	.long	4294967294                      ; 0xfffffffe
	.zero	8,255
	.long	0                               ; 0x0
	.long	4294967295                      ; 0xffffffff
	.long	1                               ; 0x1
	.long	4294967295                      ; 0xffffffff
	.long	4294967294                      ; 0xfffffffe
	.long	0                               ; 0x0
	.long	4294967295                      ; 0xffffffff
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.long	2                               ; 0x2
	.long	0                               ; 0x0
	.long	4294967295                      ; 0xffffffff
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	4294967294                      ; 0xfffffffe
	.long	2                               ; 0x2
	.long	0                               ; 0x0
	.long	2                               ; 0x2
	.long	2                               ; 0x2
	.long	2                               ; 0x2
	.size	__const._Z14CalculateFixedPKfS0_PKiPfiiiiii.dir, 128

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14CalculateFixedPKfS0_PKiPfiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     27
    .sgpr_spill_count: 0
    .symbol:         _Z14CalculateFixedPKfS0_PKiPfiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     41
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
