/*
 *
 * compiling:
 * nvcc -lglut -LGLEW life.cuda.cu -o life
 * 
 * for it's work:
 * export LD_LIBRARY_PATH=:/usr/local/cuda/lib
 * export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/usr/local/cuda/libnvvp/
 * 
 * cuda-gdb
 */

#include <stdio.h>

#define uchar unsigned char
#define NUMBER_OF_THREADS	512

uchar * dev_array1;
uchar * dev_array2;

uint * dev_size_x;
uint * dev_size_y;

uint sizeX,sizeY;

// bad -> fix it

__global__ void kernel2(float * field1, float * field2, uchar4 * screen, int sizex, int sizey)
{
//	int id = threadIdx.x + blockIdx.x*blockDim.x + threadIdx.y + blockIdx.y*blockDim.y;
	int id = threadIdx.x+threadIdx.y;
	
	int numberofneighbours=0;

	numberofneighbours += *(field1 + id + 1);
	numberofneighbours += *(field1 + id - 1);
	numberofneighbours += *(field1 + id + sizey);
	numberofneighbours += *(field1 + id - sizey);
	numberofneighbours += *(field1 + id + sizey + 1);
	numberofneighbours += *(field1 + id + sizey - 1);
	numberofneighbours += *(field1 + id - sizey - 1);
	numberofneighbours += *(field1 + id + sizey + 1);
	
//	(screen + id)->x = numberofneighbours;
//	(screen + id)->x = 1;
//	*(field2 + id) = 1;
//	if(*(field1 + id) == 1) *(field2 + id) = 1;
	/*
	switch(numberofneighbours)
	{
		case 3 :	*(field2 + id) = 1;
					(screen + id)->x = 0;
					(screen + id)->y = 250;
					(screen + id)->z = 0;
					(screen + id)->w = 0;
				break;
				
		case 2 :	if(*(field1 + id) == 1)
					{
						*(field2 + id) = 1;
						(screen + id)->x = 0;
						(screen + id)->y = 250;
						(screen + id)->z = 0;
						(screen + id)->w = 0;
					}
					else
					{
						*(field2 + id) = 0;
						(screen + id)->x = 0;
						(screen + id)->y = 0;
						(screen + id)->z = 0;
						(screen + id)->w = 0;
					}
				break;
				
		default :	*(field2 + id) = 0;
					(screen + id)->x = 0;
					(screen + id)->y = 0;
					(screen + id)->z = 0;
					(screen + id)->w = 0;
				break;
	}
	*/
}

__global__ void kernel(uchar * array1, uchar * array2, uint size_x, uint size_y)
{
//	int id = threadIdx.x*blockIdx.x+blockDim.x + threadIdx.y*blockIdx.y+blockDim.y;
	int id = threadIdx.x+threadIdx.y;
	
	if(id < size_x*size_y)
	{
		int numberofneighbours=0;
		
		int num = 0;
		
		// заменить на num += ...
		
		if(*(array1 + id + 1) == 1) num++;
		if(*(array1 + id - 1) == 1) num++;
		if(*(array1 + id + size_y) == 1) num++;
		if(*(array1 + id - size_y) == 1) num++;
		if(*(array1 + id + size_y + 1) == 1) num++;
		if(*(array1 + id + size_y - 1) == 1) num++;
		if(*(array1 + id - size_y + 1) == 1) num++;
		if(*(array1 + id - size_y - 1) == 1) num++;
		
		switch(num)
		{
			case 3 : *(array2 + id) = 1; break;
			case 2 : if(*(array1 + id) == 1) *(array2 + id) = 1; break;
			default : *(array2 + id) = 0; break;
		}
		
	}
}

void initCuda(uchar * array1, uchar * array2, uint size_x, uint size_y)
{
	sizeX = size_x;
	sizeY = size_y;
	
	cudaMalloc((void**)&dev_array1,sizeof(uchar)*size_x*size_y);
	cudaMalloc((void**)&dev_array2,sizeof(uchar)*size_x*size_y);
	
	cudaMalloc((void**)&dev_size_x,sizeof(uint));
	cudaMalloc((void**)&dev_size_y,sizeof(uint));
	
	cudaMemcpy(dev_array1,array1,sizeof(uchar)*size_x*size_y,cudaMemcpyHostToDevice);
	
	cudaMemcpy(dev_size_x,&size_x,sizeof(uchar),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_size_y,&size_y,sizeof(uchar),cudaMemcpyHostToDevice);
	
	cudaMemset(dev_array2,0,size_x*size_y);
}

void get_result(uchar * array)
{
	cudaMemcpy(array,dev_array2,sizeX*sizeY*sizeof(uchar),cudaMemcpyDeviceToHost);
}

void cuda_run()
{
	int threads = NUMBER_OF_THREADS;
	int blocks = sizeX*sizeY/threads+1;
	
//	kernel <<<blocks,threads>>>(dev_array1,dev_array2,dev_size_x,dev_size_y);
	kernel <<<blocks,threads>>>(dev_array1,dev_array2,sizeX,sizeY);
}

void FreeCuda()
{
	cudaFree(dev_array1);
	cudaFree(dev_array2);
	cudaFree(dev_size_x);
	cudaFree(dev_size_y);
}

void check(uchar * array1, uchar * array2, uint * size_x, uint * size_y)
{
	int num=0;
	puts("<=================>\n");
	
	printf("%u %u\n",*size_x,*size_y);
	
	puts("<=================>\n");
	
	for(int i=0;i<(*size_x * (*size_y));i++)
	{
		num = 0;
		
		if(*(array1 + i + 1) == 1) num++;
		if(*(array1 + i - 1) == 1) num++;
		if(*(array1 + i + *size_y) == 1) num++;
		if(*(array1 + i - *size_y) == 1) num++;
		if(*(array1 + i + *size_y + 1) == 1) num++;
		if(*(array1 + i + *size_y - 1) == 1) num++;
		if(*(array1 + i - *size_y + 1) == 1) num++;
		if(*(array1 + i - *size_y - 1) == 1) num++;
		
	//	*(array2 + i) = num;
		
		switch(num)
		{
			case 3 : *(array2 + i) = 1; break;
			case 2 : if(*(array1 + i) == 1) *(array2 + i) = 1; break;
			default : *(array2 + i) = 0; break;
		}
		
	}
	
	puts("<=================>\n");
}

#define cell_size 5
#define uchar unsigned char
#define screen_width 20
#define screen_height 20

int width = screen_width*cell_size; //770; //1024;
int height = screen_width*cell_size; //770; //768;
/*
int main()
{
//	uchar field1[screen_width][screen_height];
//	uchar field2[screen_width][screen_height];

	uchar field1[screen_width*screen_height];
	uchar field2[screen_width*screen_height];

	for(int i=0;i<screen_width;i++)
	{
		for(int j=0;j<screen_height;j++)
		{
			field1[i+j*screen_width] = 0;
			field2[i+j*screen_width] = 0;
		}
	}

	field1[0+0*screen_width] = 1;
	field1[0+1*screen_width] = 1;
	field1[0+2*screen_width] = 1;
//	field1[1][0] = 1;
	field1[1+1*screen_width] = 1;
	field1[3+3*screen_width] = 1;
	field1[4+3*screen_width] = 1;
	field1[10+5*screen_width] = 1;
	field1[10+6*screen_width] = 1;
	field1[11+5*screen_width] = 1;
	field1[11+6*screen_width] = 1;
//	field1[10][7] = 1;
	
	for(int i=0;i<screen_width;i++)
	{
		for(int j=0;j<screen_height;j++)
		{
			if(field1[i+j*screen_width] == 1) printf("*");
			else printf(".");
		//	printf("%c ",field1[i][j]);
		}
		printf("\n");
	}

	sizeX = 20;
	sizeY = 20;

//=======================================================================
/*
	check(field1,field2,&sizeX,&sizeY);

	for(int i=0;i<screen_width;i++)
	{
		for(int j=0;j<screen_height;j++)
		{
			if(field2[i+j*screen_width] == 1) printf("*");
			else printf("%i",(int) field2[i+j*screen_width]);
		//	printf("%c ",field2[i][j]);
		}
		printf("\n");
	}
*/
//=======================================================================
/*
	initCuda(&field1[0],&field2[0],screen_width,screen_height);
	cuda_run();
	get_result(&field2[0]);

	puts("\n<==========>\n\n");

	for(int i=0;i<screen_width;i++)
	{
		for(int j=0;j<screen_height;j++)
		{
			if(field2[i+j*screen_width] == 1) printf("*");
			else printf("%i",(int) field2[i+j*screen_width]);
		//	printf("%c ",field2[i][j]);
		}
		printf("\n");
	}

	FreeCuda();

	return 0;
}
*/
int main()
{
	float * field1;
	field1 = (float *) malloc(sizeof(float)*screen_width*screen_height);
	uchar4 * screen;
	screen = (uchar4 *) malloc(sizeof(uchar4)*screen_width*screen_height);
	
	float * dev_field1;
	float * dev_field2;
	uchar4 * dev_screen;
	
	*(field1 + 10) = 1;
	field1[40] = 1;
	field1[41] = 1;
	field1[59] = 1;
	field1[60] = 1;
	
	field1[90] = 1;
	field1[91] = 1;
	field1[92] = 1;
	
	for(int i=0;i<=400;i++)
	{
		printf("%i",(int) *(field1+i));
		if(i % 19 == 0) printf("\n");
	}
	printf("\n");
	cudaMalloc((void **)&dev_field1,sizeof(float)*screen_width*screen_height);
	cudaMalloc((void **)&dev_field2,sizeof(float)*screen_width*screen_height);
	cudaMalloc((void **)&dev_screen,sizeof(uchar4)*screen_width*screen_height);
	
	cudaMemcpy(dev_field1,field1,sizeof(uchar4)*screen_width*screen_height,cudaMemcpyHostToDevice);
	
	cudaMemset(dev_field2,8,sizeof(float)*screen_width*screen_height);
	
	kernel2<<<10 , 10>>>(dev_field1,dev_field2,dev_screen,20,20);
	
	float * field2;
	field2 = (float *) malloc(sizeof(float)*screen_width*screen_height);
	
	cudaMemcpy(field2,dev_field2,sizeof(float)*screen_width*screen_height,cudaMemcpyDeviceToHost);
	
	cudaMemcpy(screen,dev_screen,sizeof(uchar4)*screen_width*screen_height,cudaMemcpyDeviceToHost);
	
	cudaFree(dev_field1);
	cudaFree(dev_field2);
	cudaFree(dev_screen);
	
	for(int i=0;i<400;i++)
	{
		printf("%i",(int) (screen+i)->x);
		if(i % 19 == 0) printf("\n");
	}
	printf("\n");
	
	for(int i=0;i<400;i++)
	{
		printf("%4i",(int) *(field2+i));
		if(i % 19 == 0) printf("\n");
	}
	printf("\n");
	
	free(field1);
	free(field2);
	free(screen);
}

	.file	"tmpxft_0021d7e3_00000000-6_life.cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8initCudaPhS_jj
	.type	_Z8initCudaPhS_jj, @function
_Z8initCudaPhS_jj:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edx, %esi
	movl	%ecx, %eax
	movq	%rdi, %rbx
	leaq	dev_array1(%rip), %rdi
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movl	%esi, sizeX(%rip)
	imulq	%rax, %rsi
	movl	%edx, 12(%rsp)
	movl	%ecx, 8(%rsp)
	movl	%eax, sizeY(%rip)
	call	cudaMalloc@PLT
	movl	12(%rsp), %esi
	movl	8(%rsp), %eax
	leaq	dev_array2(%rip), %rdi
	imulq	%rax, %rsi
	call	cudaMalloc@PLT
	movl	$4, %esi
	leaq	dev_size_x(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$4, %esi
	leaq	dev_size_y(%rip), %rdi
	call	cudaMalloc@PLT
	movl	12(%rsp), %edx
	movl	8(%rsp), %eax
	movq	%rbx, %rsi
	movq	dev_array1(%rip), %rdi
	movl	$1, %ecx
	imulq	%rax, %rdx
	call	cudaMemcpy@PLT
	leaq	12(%rsp), %rsi
	movl	$1, %ecx
	movq	dev_size_x(%rip), %rdi
	movl	$1, %edx
	call	cudaMemcpy@PLT
	leaq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	dev_size_y(%rip), %rdi
	movl	$1, %edx
	call	cudaMemcpy@PLT
	movl	12(%rsp), %edx
	imull	8(%rsp), %edx
	xorl	%esi, %esi
	movq	dev_array2(%rip), %rdi
	call	cudaMemset@PLT
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8initCudaPhS_jj, .-_Z8initCudaPhS_jj
	.globl	_Z10get_resultPh
	.type	_Z10get_resultPh, @function
_Z10get_resultPh:
.LFB2028:
	.cfi_startproc
	endbr64
	movl	sizeX(%rip), %edx
	imull	sizeY(%rip), %edx
	movl	$2, %ecx
	movq	dev_array2(%rip), %rsi
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z10get_resultPh, .-_Z10get_resultPh
	.globl	_Z8FreeCudav
	.type	_Z8FreeCudav, @function
_Z8FreeCudav:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dev_array1(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_array2(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_size_x(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_size_y(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z8FreeCudav, .-_Z8FreeCudav
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"<=================>\n"
.LC1:
	.string	"%u %u\n"
	.text
	.globl	_Z5checkPhS_PjS0_
	.type	_Z5checkPhS_PjS0_, @function
_Z5checkPhS_PjS0_:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	movq	%r13, %rdi
	call	puts@PLT
	movl	0(%rbp), %edx
	movl	(%r12), %ecx
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	puts@PLT
	xorl	%edx, %edx
.L8:
	movl	(%r12), %ecx
	movl	0(%rbp), %eax
	imull	%ecx, %eax
	cmpl	%eax, %edx
	jnb	.L22
	xorl	%eax, %eax
	cmpb	$1, 1(%rbx,%rdx)
	sete	%al
	cmpb	$1, -1(%rbx,%rdx)
	jne	.L9
	incl	%eax
.L9:
	leaq	(%rcx,%rdx), %rdi
	cmpb	$1, (%rbx,%rdi)
	jne	.L10
	incl	%eax
.L10:
	movq	%rdx, %rsi
	subq	%rcx, %rsi
	cmpb	$1, (%rbx,%rsi)
	jne	.L11
	incl	%eax
.L11:
	cmpb	$1, 1(%rbx,%rdi)
	jne	.L12
	incl	%eax
.L12:
	cmpb	$1, -1(%rbx,%rdi)
	jne	.L13
	incl	%eax
.L13:
	cmpb	$1, 1(%rbx,%rsi)
	jne	.L14
	incl	%eax
.L14:
	cmpb	$1, -1(%rbx,%rsi)
	jne	.L15
	incl	%eax
.L15:
	cmpl	$2, %eax
	je	.L16
	cmpl	$3, %eax
	sete	(%r14,%rdx)
	jmp	.L18
.L16:
	cmpb	$1, (%rbx,%rdx)
	jne	.L18
	movb	$1, (%r14,%rdx)
.L18:
	incq	%rdx
	jmp	.L8
.L22:
	popq	%rbx
	.cfi_def_cfa_offset 40
	movq	%r13, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	puts@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z5checkPhS_PjS0_, .-_Z5checkPhS_PjS0_
	.globl	_Z38__device_stub__Z7kernel2PfS_P6uchar4iiPfS_P6uchar4ii
	.type	_Z38__device_stub__Z7kernel2PfS_P6uchar4iiPfS_P6uchar4ii, @function
_Z38__device_stub__Z7kernel2PfS_P6uchar4iiPfS_P6uchar4ii:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7kernel2PfS_P6uchar4ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z38__device_stub__Z7kernel2PfS_P6uchar4iiPfS_P6uchar4ii, .-_Z38__device_stub__Z7kernel2PfS_P6uchar4iiPfS_P6uchar4ii
	.globl	_Z7kernel2PfS_P6uchar4ii
	.type	_Z7kernel2PfS_P6uchar4ii, @function
_Z7kernel2PfS_P6uchar4ii:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z7kernel2PfS_P6uchar4iiPfS_P6uchar4ii
	.cfi_endproc
.LFE2058:
	.size	_Z7kernel2PfS_P6uchar4ii, .-_Z7kernel2PfS_P6uchar4ii
	.section	.rodata.str1.1
.LC3:
	.string	"%i"
.LC4:
	.string	"\n"
.LC5:
	.string	"%4i"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1600, %edi
	leaq	.LC3(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$1600, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movss	.LC2(%rip), %xmm0
	movq	%rax, %rbp
	movabsq	$4575657222473777152, %rax
	movq	%rax, 160(%rbx)
	movq	%rax, 236(%rbx)
	movq	%rax, 360(%rbx)
	movss	%xmm0, 40(%rbx)
	movss	%xmm0, 368(%rbx)
.L30:
	cvttss2sil	(%rbx,%r12,4), %edx
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	imull	$678152731, %r12d, %eax
	cmpl	$226050910, %eax
	ja	.L29
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L29:
	incq	%r12
	cmpq	$401, %r12
	jne	.L30
	leaq	.LC4(%rip), %r13
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r13, %rsi
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	movl	$1600, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1600, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1600, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1600, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1600, %edx
	movl	$8, %esi
	call	cudaMemset@PLT
	movl	$2147483653, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$20, %ecx
	movl	$20, %r8d
	movq	8(%rsp), %rdi
	call	_Z38__device_stub__Z7kernel2PfS_P6uchar4iiPfS_P6uchar4ii
.L31:
	movl	$1600, %edi
	xorl	%r14d, %r14d
	call	malloc@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$1600, %edx
	movq	%rax, %rdi
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$1600, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
.L33:
	movzbl	0(%rbp,%r14,4), %edx
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	imull	$678152731, %r14d, %eax
	cmpl	$226050910, %eax
	ja	.L32
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L32:
	incq	%r14
	cmpq	$400, %r14
	jne	.L33
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %r15
.L35:
	cvttss2sil	(%r12,%r14,4), %edx
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	imull	$678152731, %r14d, %eax
	cmpl	$226050910, %eax
	ja	.L34
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L34:
	incq	%r14
	cmpq	$400, %r14
	jne	.L35
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	main, .-main
	.text
	.globl	_Z29__device_stub__Z6kernelPhS_jjPhS_jj
	.type	_Z29__device_stub__Z6kernelPhS_jjPhS_jj, @function
_Z29__device_stub__Z6kernelPhS_jjPhS_jj:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6kernelPhS_jj(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L41:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z29__device_stub__Z6kernelPhS_jjPhS_jj, .-_Z29__device_stub__Z6kernelPhS_jjPhS_jj
	.globl	_Z6kernelPhS_jj
	.type	_Z6kernelPhS_jj, @function
_Z6kernelPhS_jj:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6kernelPhS_jjPhS_jj
	.cfi_endproc
.LFE2060:
	.size	_Z6kernelPhS_jj, .-_Z6kernelPhS_jj
	.globl	_Z8cuda_runv
	.type	_Z8cuda_runv, @function
_Z8cuda_runv:
.LFB2029:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	sizeX(%rip), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	imull	sizeY(%rip), %eax
	movl	$8388609, %edx
	movl	$1, %ecx
	salq	$9, %rdx
	shrl	$9, %eax
	incl	%eax
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movl	sizeY(%rip), %ecx
	movl	sizeX(%rip), %edx
	movq	dev_array2(%rip), %rsi
	movq	dev_array1(%rip), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_Z29__device_stub__Z6kernelPhS_jjPhS_jj
.L46:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z8cuda_runv, .-_Z8cuda_runv
	.section	.rodata.str1.1
.LC6:
	.string	"_Z6kernelPhS_jj"
.LC7:
	.string	"_Z7kernel2PfS_P6uchar4ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6kernelPhS_jj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel2PfS_P6uchar4ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	height
	.data
	.align 4
	.type	height, @object
	.size	height, 4
height:
	.long	100
	.globl	width
	.align 4
	.type	width, @object
	.size	width, 4
width:
	.long	100
	.globl	sizeY
	.bss
	.align 4
	.type	sizeY, @object
	.size	sizeY, 4
sizeY:
	.zero	4
	.globl	sizeX
	.align 4
	.type	sizeX, @object
	.size	sizeX, 4
sizeX:
	.zero	4
	.globl	dev_size_y
	.align 8
	.type	dev_size_y, @object
	.size	dev_size_y, 8
dev_size_y:
	.zero	8
	.globl	dev_size_x
	.align 8
	.type	dev_size_x, @object
	.size	dev_size_x, 8
dev_size_x:
	.zero	8
	.globl	dev_array2
	.align 8
	.type	dev_array2, @object
	.size	dev_array2, 8
dev_array2:
	.zero	8
	.globl	dev_array1
	.align 8
	.type	dev_array1, @object
	.size	dev_array1, 8
dev_array1:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 *
 * compiling:
 * nvcc -lglut -LGLEW life.cuda.cu -o life
 * 
 * for it's work:
 * export LD_LIBRARY_PATH=:/usr/local/cuda/lib
 * export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/usr/local/cuda/libnvvp/
 * 
 * cuda-gdb
 */


#include <hip/hip_runtime.h>
#include <stdio.h>

#define uchar unsigned char
#define NUMBER_OF_THREADS	512

uchar * dev_array1;
uchar * dev_array2;

uint * dev_size_x;
uint * dev_size_y;

uint sizeX,sizeY;

// bad -> fix it

__global__ void kernel2(float * field1, float * field2, uchar4 * screen, int sizex, int sizey)
{
//	int id = threadIdx.x + blockIdx.x*blockDim.x + threadIdx.y + blockIdx.y*blockDim.y;
	int id = threadIdx.x+threadIdx.y;
	
	int numberofneighbours=0;

	numberofneighbours += *(field1 + id + 1);
	numberofneighbours += *(field1 + id - 1);
	numberofneighbours += *(field1 + id + sizey);
	numberofneighbours += *(field1 + id - sizey);
	numberofneighbours += *(field1 + id + sizey + 1);
	numberofneighbours += *(field1 + id + sizey - 1);
	numberofneighbours += *(field1 + id - sizey - 1);
	numberofneighbours += *(field1 + id + sizey + 1);
	
//	(screen + id)->x = numberofneighbours;
//	(screen + id)->x = 1;
//	*(field2 + id) = 1;
//	if(*(field1 + id) == 1) *(field2 + id) = 1;
	/*
	switch(numberofneighbours)
	{
		case 3 :	*(field2 + id) = 1;
					(screen + id)->x = 0;
					(screen + id)->y = 250;
					(screen + id)->z = 0;
					(screen + id)->w = 0;
				break;
				
		case 2 :	if(*(field1 + id) == 1)
					{
						*(field2 + id) = 1;
						(screen + id)->x = 0;
						(screen + id)->y = 250;
						(screen + id)->z = 0;
						(screen + id)->w = 0;
					}
					else
					{
						*(field2 + id) = 0;
						(screen + id)->x = 0;
						(screen + id)->y = 0;
						(screen + id)->z = 0;
						(screen + id)->w = 0;
					}
				break;
				
		default :	*(field2 + id) = 0;
					(screen + id)->x = 0;
					(screen + id)->y = 0;
					(screen + id)->z = 0;
					(screen + id)->w = 0;
				break;
	}
	*/
}

__global__ void kernel(uchar * array1, uchar * array2, uint size_x, uint size_y)
{
//	int id = threadIdx.x*blockIdx.x+blockDim.x + threadIdx.y*blockIdx.y+blockDim.y;
	int id = threadIdx.x+threadIdx.y;
	
	if(id < size_x*size_y)
	{
		int numberofneighbours=0;
		
		int num = 0;
		
		// заменить на num += ...
		
		if(*(array1 + id + 1) == 1) num++;
		if(*(array1 + id - 1) == 1) num++;
		if(*(array1 + id + size_y) == 1) num++;
		if(*(array1 + id - size_y) == 1) num++;
		if(*(array1 + id + size_y + 1) == 1) num++;
		if(*(array1 + id + size_y - 1) == 1) num++;
		if(*(array1 + id - size_y + 1) == 1) num++;
		if(*(array1 + id - size_y - 1) == 1) num++;
		
		switch(num)
		{
			case 3 : *(array2 + id) = 1; break;
			case 2 : if(*(array1 + id) == 1) *(array2 + id) = 1; break;
			default : *(array2 + id) = 0; break;
		}
		
	}
}

void initCuda(uchar * array1, uchar * array2, uint size_x, uint size_y)
{
	sizeX = size_x;
	sizeY = size_y;
	
	hipMalloc((void**)&dev_array1,sizeof(uchar)*size_x*size_y);
	hipMalloc((void**)&dev_array2,sizeof(uchar)*size_x*size_y);
	
	hipMalloc((void**)&dev_size_x,sizeof(uint));
	hipMalloc((void**)&dev_size_y,sizeof(uint));
	
	hipMemcpy(dev_array1,array1,sizeof(uchar)*size_x*size_y,hipMemcpyHostToDevice);
	
	hipMemcpy(dev_size_x,&size_x,sizeof(uchar),hipMemcpyHostToDevice);
	hipMemcpy(dev_size_y,&size_y,sizeof(uchar),hipMemcpyHostToDevice);
	
	hipMemset(dev_array2,0,size_x*size_y);
}

void get_result(uchar * array)
{
	hipMemcpy(array,dev_array2,sizeX*sizeY*sizeof(uchar),hipMemcpyDeviceToHost);
}

void cuda_run()
{
	int threads = NUMBER_OF_THREADS;
	int blocks = sizeX*sizeY/threads+1;
	
//	kernel <<<blocks,threads>>>(dev_array1,dev_array2,dev_size_x,dev_size_y);
	kernel <<<blocks,threads>>>(dev_array1,dev_array2,sizeX,sizeY);
}

void FreeCuda()
{
	hipFree(dev_array1);
	hipFree(dev_array2);
	hipFree(dev_size_x);
	hipFree(dev_size_y);
}

void check(uchar * array1, uchar * array2, uint * size_x, uint * size_y)
{
	int num=0;
	puts("<=================>\n");
	
	printf("%u %u\n",*size_x,*size_y);
	
	puts("<=================>\n");
	
	for(int i=0;i<(*size_x * (*size_y));i++)
	{
		num = 0;
		
		if(*(array1 + i + 1) == 1) num++;
		if(*(array1 + i - 1) == 1) num++;
		if(*(array1 + i + *size_y) == 1) num++;
		if(*(array1 + i - *size_y) == 1) num++;
		if(*(array1 + i + *size_y + 1) == 1) num++;
		if(*(array1 + i + *size_y - 1) == 1) num++;
		if(*(array1 + i - *size_y + 1) == 1) num++;
		if(*(array1 + i - *size_y - 1) == 1) num++;
		
	//	*(array2 + i) = num;
		
		switch(num)
		{
			case 3 : *(array2 + i) = 1; break;
			case 2 : if(*(array1 + i) == 1) *(array2 + i) = 1; break;
			default : *(array2 + i) = 0; break;
		}
		
	}
	
	puts("<=================>\n");
}

#define cell_size 5
#define uchar unsigned char
#define screen_width 20
#define screen_height 20

int width = screen_width*cell_size; //770; //1024;
int height = screen_width*cell_size; //770; //768;
/*
int main()
{
//	uchar field1[screen_width][screen_height];
//	uchar field2[screen_width][screen_height];

	uchar field1[screen_width*screen_height];
	uchar field2[screen_width*screen_height];

	for(int i=0;i<screen_width;i++)
	{
		for(int j=0;j<screen_height;j++)
		{
			field1[i+j*screen_width] = 0;
			field2[i+j*screen_width] = 0;
		}
	}

	field1[0+0*screen_width] = 1;
	field1[0+1*screen_width] = 1;
	field1[0+2*screen_width] = 1;
//	field1[1][0] = 1;
	field1[1+1*screen_width] = 1;
	field1[3+3*screen_width] = 1;
	field1[4+3*screen_width] = 1;
	field1[10+5*screen_width] = 1;
	field1[10+6*screen_width] = 1;
	field1[11+5*screen_width] = 1;
	field1[11+6*screen_width] = 1;
//	field1[10][7] = 1;
	
	for(int i=0;i<screen_width;i++)
	{
		for(int j=0;j<screen_height;j++)
		{
			if(field1[i+j*screen_width] == 1) printf("*");
			else printf(".");
		//	printf("%c ",field1[i][j]);
		}
		printf("\n");
	}

	sizeX = 20;
	sizeY = 20;

//=======================================================================
/*
	check(field1,field2,&sizeX,&sizeY);

	for(int i=0;i<screen_width;i++)
	{
		for(int j=0;j<screen_height;j++)
		{
			if(field2[i+j*screen_width] == 1) printf("*");
			else printf("%i",(int) field2[i+j*screen_width]);
		//	printf("%c ",field2[i][j]);
		}
		printf("\n");
	}
*/
//=======================================================================
/*
	initCuda(&field1[0],&field2[0],screen_width,screen_height);
	cuda_run();
	get_result(&field2[0]);

	puts("\n<==========>\n\n");

	for(int i=0;i<screen_width;i++)
	{
		for(int j=0;j<screen_height;j++)
		{
			if(field2[i+j*screen_width] == 1) printf("*");
			else printf("%i",(int) field2[i+j*screen_width]);
		//	printf("%c ",field2[i][j]);
		}
		printf("\n");
	}

	FreeCuda();

	return 0;
}
*/
int main()
{
	float * field1;
	field1 = (float *) malloc(sizeof(float)*screen_width*screen_height);
	uchar4 * screen;
	screen = (uchar4 *) malloc(sizeof(uchar4)*screen_width*screen_height);
	
	float * dev_field1;
	float * dev_field2;
	uchar4 * dev_screen;
	
	*(field1 + 10) = 1;
	field1[40] = 1;
	field1[41] = 1;
	field1[59] = 1;
	field1[60] = 1;
	
	field1[90] = 1;
	field1[91] = 1;
	field1[92] = 1;
	
	for(int i=0;i<=400;i++)
	{
		printf("%i",(int) *(field1+i));
		if(i % 19 == 0) printf("\n");
	}
	printf("\n");
	hipMalloc((void **)&dev_field1,sizeof(float)*screen_width*screen_height);
	hipMalloc((void **)&dev_field2,sizeof(float)*screen_width*screen_height);
	hipMalloc((void **)&dev_screen,sizeof(uchar4)*screen_width*screen_height);
	
	hipMemcpy(dev_field1,field1,sizeof(uchar4)*screen_width*screen_height,hipMemcpyHostToDevice);
	
	hipMemset(dev_field2,8,sizeof(float)*screen_width*screen_height);
	
	kernel2<<<10 , 10>>>(dev_field1,dev_field2,dev_screen,20,20);
	
	float * field2;
	field2 = (float *) malloc(sizeof(float)*screen_width*screen_height);
	
	hipMemcpy(field2,dev_field2,sizeof(float)*screen_width*screen_height,hipMemcpyDeviceToHost);
	
	hipMemcpy(screen,dev_screen,sizeof(uchar4)*screen_width*screen_height,hipMemcpyDeviceToHost);
	
	hipFree(dev_field1);
	hipFree(dev_field2);
	hipFree(dev_screen);
	
	for(int i=0;i<400;i++)
	{
		printf("%i",(int) (screen+i)->x);
		if(i % 19 == 0) printf("\n");
	}
	printf("\n");
	
	for(int i=0;i<400;i++)
	{
		printf("%4i",(int) *(field2+i));
		if(i % 19 == 0) printf("\n");
	}
	printf("\n");
	
	free(field1);
	free(field2);
	free(screen);
}

	.text
	.file	"life.cuda.hip"
	.globl	_Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii # -- Begin function _Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.type	_Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii,@function
_Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii: # @_Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii, .Lfunc_end0-_Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__kernelPhS_jj # -- Begin function _Z21__device_stub__kernelPhS_jj
	.type	_Z21__device_stub__kernelPhS_jj,@function
_Z21__device_stub__kernelPhS_jj:        # @_Z21__device_stub__kernelPhS_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPhS_jj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__kernelPhS_jj, .Lfunc_end1-_Z21__device_stub__kernelPhS_jj
	.cfi_endproc
                                        # -- End function
	.globl	_Z8initCudaPhS_jj               # -- Begin function _Z8initCudaPhS_jj
	.type	_Z8initCudaPhS_jj,@function
_Z8initCudaPhS_jj:                      # @_Z8initCudaPhS_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %r15
	leaq	4(%rsp), %rbx
	movl	%edx, (%rbx)
	movq	%rsp, %r14
	movl	%ecx, (%r14)
	movl	%edx, sizeX(%rip)
	movl	%ecx, sizeY(%rip)
	movl	%edx, %eax
	movl	%ecx, %r12d
	imulq	%rax, %r12
	movl	$dev_array1, %edi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$dev_array2, %edi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$dev_size_x, %edi
	movl	$4, %esi
	callq	hipMalloc
	movl	$dev_size_y, %edi
	movl	$4, %esi
	callq	hipMalloc
	movq	dev_array1(%rip), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dev_size_x(%rip), %rdi
	movl	$1, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dev_size_y(%rip), %rdi
	movl	$1, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dev_array2(%rip), %rdi
	movl	(%r14), %edx
	imull	(%rbx), %edx
	xorl	%esi, %esi
	callq	hipMemset
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z8initCudaPhS_jj, .Lfunc_end2-_Z8initCudaPhS_jj
	.cfi_endproc
                                        # -- End function
	.globl	_Z10get_resultPh                # -- Begin function _Z10get_resultPh
	.type	_Z10get_resultPh,@function
_Z10get_resultPh:                       # @_Z10get_resultPh
	.cfi_startproc
# %bb.0:
	movq	dev_array2(%rip), %rsi
	movl	sizeY(%rip), %edx
	imull	sizeX(%rip), %edx
	movl	$2, %ecx
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end3:
	.size	_Z10get_resultPh, .Lfunc_end3-_Z10get_resultPh
	.cfi_endproc
                                        # -- End function
	.globl	_Z8cuda_runv                    # -- Begin function _Z8cuda_runv
	.type	_Z8cuda_runv,@function
_Z8cuda_runv:                           # @_Z8cuda_runv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	sizeY(%rip), %eax
	imull	sizeX(%rip), %eax
	shrl	$9, %eax
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	leaq	(%rdx,%rax), %rdi
	incq	%rdi
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB4_2
# %bb.1:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB4_2:
	.cfi_def_cfa_offset 16
	movq	dev_array1(%rip), %rdi
	movq	dev_array2(%rip), %rsi
	movl	sizeX(%rip), %edx
	movl	sizeY(%rip), %ecx
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Z21__device_stub__kernelPhS_jj # TAILCALL
.Lfunc_end4:
	.size	_Z8cuda_runv, .Lfunc_end4-_Z8cuda_runv
	.cfi_endproc
                                        # -- End function
	.globl	_Z8FreeCudav                    # -- Begin function _Z8FreeCudav
	.type	_Z8FreeCudav,@function
_Z8FreeCudav:                           # @_Z8FreeCudav
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dev_array1(%rip), %rdi
	callq	hipFree
	movq	dev_array2(%rip), %rdi
	callq	hipFree
	movq	dev_size_x(%rip), %rdi
	callq	hipFree
	movq	dev_size_y(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end5:
	.size	_Z8FreeCudav, .Lfunc_end5-_Z8FreeCudav
	.cfi_endproc
                                        # -- End function
	.globl	_Z5checkPhS_PjS0_               # -- Begin function _Z5checkPhS_PjS0_
	.type	_Z5checkPhS_PjS0_,@function
_Z5checkPhS_PjS0_:                      # @_Z5checkPhS_PjS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %r12
	movl	$.L.str, %edi
	callq	puts
	movl	(%r14), %esi
	movl	(%rbx), %edx
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str, %edi
	callq	puts
	movl	(%rbx), %ecx
	movl	(%r14), %eax
	imull	%ecx, %eax
	testl	%eax, %eax
	je	.LBB6_8
# %bb.1:                                # %.lr.ph.preheader
	xorl	%eax, %eax
.LBB6_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r12,%rax), %rdx
	xorl	%esi, %esi
	cmpb	$1, 1(%r12,%rax)
	sete	%sil
	leal	1(%rsi), %edi
	cmpb	$1, -1(%r12,%rax)
	cmovnel	%esi, %edi
	movl	%ecx, %r8d
	xorl	%r9d, %r9d
	cmpb	$1, (%r8,%rdx)
	sete	%r9b
	movq	%rdx, %rsi
	subq	%r8, %rsi
	xorl	%ecx, %ecx
	cmpb	$1, (%rsi)
	sete	%cl
	addl	%r9d, %ecx
	addl	%edi, %ecx
	xorl	%edi, %edi
	cmpb	$1, 1(%r8,%rdx)
	sete	%dil
	xorl	%r9d, %r9d
	cmpb	$1, -1(%r8,%rdx)
	sete	%r9b
	addl	%edi, %r9d
	xorl	%edi, %edi
	cmpb	$1, 1(%rsi)
	sete	%dil
	addl	%r9d, %edi
	xorl	%edx, %edx
	cmpb	$1, -1(%rsi)
	sete	%dl
	addl	%edi, %edx
	addl	%ecx, %edx
	movb	$1, %cl
	cmpl	$3, %edx
	je	.LBB6_6
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB6_2 Depth=1
	cmpl	$2, %edx
	jne	.LBB6_5
# %bb.4:                                #   in Loop: Header=BB6_2 Depth=1
	cmpb	$1, (%r12,%rax)
	je	.LBB6_6
	jmp	.LBB6_7
.LBB6_5:                                #   in Loop: Header=BB6_2 Depth=1
	xorl	%ecx, %ecx
.LBB6_6:                                # %.sink.split
                                        #   in Loop: Header=BB6_2 Depth=1
	movb	%cl, (%r15,%rax)
.LBB6_7:                                #   in Loop: Header=BB6_2 Depth=1
	incq	%rax
	movl	(%rbx), %ecx
	movl	(%r14), %edx
	imull	%ecx, %edx
	cmpq	%rdx, %rax
	jb	.LBB6_2
.LBB6_8:                                # %._crit_edge
	movl	$.L.str, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	puts                            # TAILCALL
.Lfunc_end6:
	.size	_Z5checkPhS_PjS0_, .Lfunc_end6-_Z5checkPhS_PjS0_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1600, %edi                     # imm = 0x640
	callq	malloc
	movq	%rax, %r14
	movl	$1600, %edi                     # imm = 0x640
	callq	malloc
	movq	%rax, %rbx
	movl	$1065353216, %eax               # imm = 0x3F800000
	movl	%eax, 40(%r14)
	movabsq	$4575657222473777152, %rcx      # imm = 0x3F8000003F800000
	movq	%rcx, 160(%r14)
	movq	%rcx, 236(%r14)
	movq	%rcx, 360(%r14)
	movl	%eax, 368(%r14)
	xorl	%ebp, %ebp
	xorl	%r15d, %r15d
.LBB7_1:                                # =>This Inner Loop Header: Depth=1
	movzwl	%r15w, %eax
	imull	$55189, %eax, %eax              # imm = 0xD795
	shrl	$20, %eax
	leal	(%rax,%rax,8), %ecx
	leal	(%rax,%rcx,2), %r12d
	cvttss2si	(%r14,%r15,4), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	addw	%bp, %r12w
	jne	.LBB7_3
# %bb.2:                                #   in Loop: Header=BB7_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB7_3:                                #   in Loop: Header=BB7_1 Depth=1
	incq	%r15
	decl	%ebp
	cmpq	$401, %r15                      # imm = 0x191
	jne	.LBB7_1
# %bb.4:
	movl	$10, %edi
	callq	putchar@PLT
	leaq	16(%rsp), %r15
	movl	$1600, %esi                     # imm = 0x640
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r12
	movl	$1600, %esi                     # imm = 0x640
	movq	%r12, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$1600, %esi                     # imm = 0x640
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$1600, %edx                     # imm = 0x640
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$1600, %edx                     # imm = 0x640
	movl	$8, %esi
	callq	hipMemset
	movabsq	$4294967306, %rdi               # imm = 0x10000000A
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_6
# %bb.5:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$20, %ecx
	movl	$20, %r8d
	callq	_Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii
.LBB7_6:
	movl	$1600, %edi                     # imm = 0x640
	callq	malloc
	movq	%rax, %r15
	movq	8(%rsp), %rsi
	movl	$1600, %edx                     # imm = 0x640
	movq	%rax, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rsi
	movl	$1600, %edx                     # imm = 0x640
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
.LBB7_7:                                # =>This Inner Loop Header: Depth=1
	movzwl	%r12w, %eax
	imull	$55189, %eax, %eax              # imm = 0xD795
	shrl	$20, %eax
	leal	(%rax,%rax,8), %ecx
	leal	(%rax,%rcx,2), %r13d
	movzbl	(%rbx,%r12,4), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	addw	%bp, %r13w
	jne	.LBB7_9
# %bb.8:                                #   in Loop: Header=BB7_7 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB7_9:                                #   in Loop: Header=BB7_7 Depth=1
	incq	%r12
	decl	%ebp
	cmpq	$400, %r12                      # imm = 0x190
	jne	.LBB7_7
# %bb.10:
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
.LBB7_11:                               # =>This Inner Loop Header: Depth=1
	movzwl	%r12w, %eax
	imull	$55189, %eax, %eax              # imm = 0xD795
	shrl	$20, %eax
	leal	(%rax,%rax,8), %ecx
	leal	(%rax,%rcx,2), %r13d
	cvttss2si	(%r15,%r12,4), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	addw	%bp, %r13w
	jne	.LBB7_13
# %bb.12:                               #   in Loop: Header=BB7_11 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB7_13:                               #   in Loop: Header=BB7_11 Depth=1
	incq	%r12
	decl	%ebp
	cmpq	$400, %r12                      # imm = 0x190
	jne	.LBB7_11
# %bb.14:
	movl	$10, %edi
	callq	putchar@PLT
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPhS_jj, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	dev_array1,@object              # @dev_array1
	.bss
	.globl	dev_array1
	.p2align	3, 0x0
dev_array1:
	.quad	0
	.size	dev_array1, 8

	.type	dev_array2,@object              # @dev_array2
	.globl	dev_array2
	.p2align	3, 0x0
dev_array2:
	.quad	0
	.size	dev_array2, 8

	.type	dev_size_x,@object              # @dev_size_x
	.globl	dev_size_x
	.p2align	3, 0x0
dev_size_x:
	.quad	0
	.size	dev_size_x, 8

	.type	dev_size_y,@object              # @dev_size_y
	.globl	dev_size_y
	.p2align	3, 0x0
dev_size_y:
	.quad	0
	.size	dev_size_y, 8

	.type	sizeX,@object                   # @sizeX
	.globl	sizeX
	.p2align	2, 0x0
sizeX:
	.long	0                               # 0x0
	.size	sizeX, 4

	.type	sizeY,@object                   # @sizeY
	.globl	sizeY
	.p2align	2, 0x0
sizeY:
	.long	0                               # 0x0
	.size	sizeY, 4

	.type	_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii,@object # @_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.section	.rodata,"a",@progbits
	.globl	_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.p2align	3, 0x0
_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii:
	.quad	_Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.size	_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii, 8

	.type	_Z6kernelPhS_jj,@object         # @_Z6kernelPhS_jj
	.globl	_Z6kernelPhS_jj
	.p2align	3, 0x0
_Z6kernelPhS_jj:
	.quad	_Z21__device_stub__kernelPhS_jj
	.size	_Z6kernelPhS_jj, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"<=================>\n"
	.size	.L.str, 21

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%u %u\n"
	.size	.L.str.1, 7

	.type	width,@object                   # @width
	.data
	.globl	width
	.p2align	2, 0x0
width:
	.long	100                             # 0x64
	.size	width, 4

	.type	height,@object                  # @height
	.globl	height
	.p2align	2, 0x0
height:
	.long	100                             # 0x64
	.size	height, 4

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"%i"
	.size	.L.str.2, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%4i"
	.size	.L.str.4, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii"
	.size	.L__unnamed_1, 42

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6kernelPhS_jj"
	.size	.L__unnamed_2, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.addrsig_sym _Z21__device_stub__kernelPhS_jj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym dev_array1
	.addrsig_sym dev_array2
	.addrsig_sym dev_size_x
	.addrsig_sym dev_size_y
	.addrsig_sym _Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.addrsig_sym _Z6kernelPhS_jj
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii ; -- Begin function _Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.globl	_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii
	.p2align	8
	.type	_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii,@function
_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii: ; @_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii, .Lfunc_end0-_Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6kernelPhS_jj         ; -- Begin function _Z6kernelPhS_jj
	.globl	_Z6kernelPhS_jj
	.p2align	8
	.type	_Z6kernelPhS_jj,@function
_Z6kernelPhS_jj:                        ; @_Z6kernelPhS_jj
; %bb.0:
	s_load_b64 s[6:7], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v1, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s7, s6
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s2, v2
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_11
; %bb.1:                                ; %NodeBlock
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s5, 0
	s_mov_b32 s4, s7
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, s6, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s6
	s_not_b64 s[6:7], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v5, vcc_lo, v0, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	s_clause 0x5
	global_load_u8 v7, v2, s[0:1] offset:1
	global_load_u16 v8, v[3:4], off
	global_load_u16 v9, v[5:6], off offset:-1
	global_load_u8 v10, v2, s[0:1] offset:-1
	global_load_u8 v5, v[5:6], off offset:1
	global_load_u8 v3, v[3:4], off offset:2
	s_mov_b32 s1, 1
	s_mov_b32 s4, 0
	s_mov_b32 s0, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(5)
	v_cmp_eq_u16_e32 vcc_lo, 1, v7
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v11, 8, v8
	s_waitcnt vmcnt(3)
	v_lshrrev_b32_e32 v4, 8, v9
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	v_cndmask_b32_e64 v7, 1, 2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_and_b32_e32 v4, 0xff, v4
	s_waitcnt vmcnt(2)
	v_cmp_eq_u16_e32 vcc_lo, 1, v10
	v_dual_cndmask_b32 v6, v6, v7 :: v_dual_and_b32 v7, 0xff, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_eq_u16_e32 vcc_lo, 1, v4
	v_and_b32_e32 v9, 0xff, v11
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	s_waitcnt vmcnt(1)
	v_cmp_eq_u16_e32 vcc_lo, 1, v5
	v_cndmask_b32_e64 v5, 0, 1, vcc_lo
	v_cmp_eq_u16_e32 vcc_lo, 1, v9
	v_add_co_ci_u32_e32 v4, vcc_lo, v6, v4, vcc_lo
	v_cmp_eq_u16_e32 vcc_lo, 1, v7
	v_and_b32_e32 v6, 0xff, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 1, v3
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	v_cmp_eq_u16_e32 vcc_lo, 1, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v4, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 2, v3
	s_xor_b32 s6, exec_lo, s6
; %bb.2:                                ; %LeafBlock136
	v_cmp_ne_u32_e32 vcc_lo, 3, v3
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr3
	s_and_b32 s4, vcc_lo, exec_lo
; %bb.3:                                ; %Flow
	s_and_not1_saveexec_b32 s6, s6
; %bb.4:                                ; %LeafBlock
	v_cmp_ne_u32_e32 vcc_lo, 2, v3
	s_and_not1_b32 s4, s4, exec_lo
	s_mov_b32 s5, exec_lo
	s_and_b32 s7, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s7
; %bb.5:                                ; %Flow138
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v3, s1
	s_and_saveexec_b32 s1, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s1
; %bb.6:
	v_mov_b32_e32 v3, 0
	s_or_b32 s0, s0, exec_lo
	s_and_not1_b32 s5, s5, exec_lo
; %bb.7:                                ; %Flow139
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s5
	s_cbranch_execz .LBB1_9
; %bb.8:
	global_load_u8 v0, v[0:1], off
	v_mov_b32_e32 v3, 1
	s_and_not1_b32 s0, s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 1, v0
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s4
.LBB1_9:                                ; %Flow140
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_11
; %bb.10:                               ; %.sink.split
	v_add_co_u32 v0, s0, s2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s3, 0, s0
	global_store_b8 v[0:1], v3, off
.LBB1_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPhS_jj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6kernelPhS_jj, .Lfunc_end1-_Z6kernelPhS_jj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 552
; NumSgprs: 10
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel2PfS_P15HIP_vector_typeIhLj4EEii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPhS_jj
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPhS_jj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
