
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <unistd.h>
#include <vector>
#include <iostream>
//#include <Windows.h>
//#include <direct.h>
using namespace std;

#ifndef __CUDACC__  
    #define __CUDACC__
#endif


__device__ int minIndex(double* data,double* centers,bool* centerflags,int kCenter,int dimension)
{
	int result;
	int firstindex=0;

	while(firstindex<kCenter && (! centerflags[ firstindex]))
		++firstindex;

	result=firstindex;
	double mindis=0.0;

	for (int i = 0; i < dimension; i++)
	{
		double tdis=centers[firstindex*dimension+i]-data[i];
		mindis+=tdis*tdis;
	}

	for(int i=firstindex+1;i<kCenter;++i)
	{
		if(centerflags[i])
		{
			double tdis=0.0;
			for (int j = 0; j < dimension; j++)
			{
				double ttdis=centers[i*dimension+j]-data[j];
				tdis+=ttdis*ttdis;
			}
			if(tdis<mindis)
			{
				mindis=tdis;
				result=i;
			}
		}
	}

	return result;
}
vector<int> shuffledOrder(int n,int m)
{
	//assert(n>=m);
	vector<int> result(m);
	vector<int> index(n);
	for(int i=0;i<n;++i)
	{
		index[i]=i;
	}

	for(int i=0;i<m;++i)
	{
		int tem=rand()%(n-i);
		result[i]=index[tem];
		index[tem]=index[n-i-1];

	}
	return result;
}
__global__ void updatebelonging4(int index,double* dataset,int datasize,int dimension,double* centers,int* labels,int kCenter,bool* goodCenterFlag,bool* CenterChangeFlag)
{
	int j=index+blockDim.x* blockIdx.x +threadIdx.x;

	int tlabel;
	if(j<datasize)
	{
		CenterChangeFlag[j]=false;
		tlabel=minIndex(dataset+j*dimension, centers,goodCenterFlag,kCenter,dimension);
		if(tlabel!=labels[j])
			CenterChangeFlag[j]=true;
		labels[j]=tlabel;

	}
	
	
}

__global__ void updateCorresponds(int* labels,int datasize,int kCenter,int* correspondings,bool* centerChangeFlag,int* centerStartIndex,int* centerCount,int* curCount,bool* goodCenterFlag,bool* nochange)
{
//	cudaMemset(correspondings,0,sizeof(int)*datasize);
//	cudaMemset(centerCount,0,sizeof(int)*kCenter);
	*nochange=true;
	for (int i = 0; i < kCenter; i++)
	{
		centerCount[i]=0;
		curCount[i]=0;
	}
	for (int i = 0; i < datasize; i++)
	{
		++centerCount[labels[i]];

		if(centerChangeFlag[i])
		{
			*nochange=false;
			centerChangeFlag[i]=false;
		}	
	}
	centerStartIndex[0]=0;
	for (int i = 0; i < kCenter; i++)
	{
		if (centerCount[i]==0)
		{
			goodCenterFlag[i]=false;
		}
		if(i>0)
		{
			centerStartIndex[i]=centerStartIndex[i-1]+centerCount[i-1];
		}
	}
	
	//curCount=new int[kCenter];

	for (int i = 0; i < datasize; i++)
	{
		int tlabel=labels[i];
		//int ind=;
		correspondings[centerStartIndex[tlabel] + curCount[tlabel]]=i;
		++curCount[tlabel];
	}

	


}

__global__ void updateCenters4(int ind,double* dataset,int datasize,int dimension,double* centers,int kCenter,int* corresponding,int* centerStartIndex,int* centerCount)
{
	int j=ind+blockDim.x*blockIdx.x+threadIdx.x;
	if(j<kCenter)
	{
		if(centerCount[j]>0)
		{
			for (int i = 0; i < dimension; i++)
			{
				centers[j*dimension+i]=0;
			}
			for (int i = 0; i < centerCount[j]; i++)
			{
				int curinde=corresponding[ centerStartIndex[j]+i];

				for (int k = 0; k < dimension; k++)
				{
					centers[j*dimension+k]+=dataset[curinde*dimension+k]/centerCount[j];
				}
			}

		}
	}
}

void kmeans4(double* dataset,int datasize,int dimension,double* centers,int* labels,int kCenter,int maxIterationNumber,int threadsize,int blocksize=65535)
{

	vector<int> initialCenterIndex=shuffledOrder(datasize,kCenter);

	for(int i=0;i<kCenter;++i)
		for(int j=0;j<dimension;++j)
			centers[i*dimension+j]=dataset[initialCenterIndex[i]*dimension+j];


	bool* goodCenterFlag;
	int* centerCount;
	int* curCount;
	bool* centerChangeFlag;
	int* corresponding;
	int* centerStartIndex;

	bool* noChange;
	

	cudaMallocManaged(&goodCenterFlag,sizeof(bool)*kCenter);

	cudaMallocManaged(&centerCount,sizeof(int)*kCenter);
	cudaMallocManaged(&curCount,sizeof(int)*kCenter);

	cudaMallocManaged(&centerChangeFlag,sizeof(bool)*datasize);

	cudaMallocManaged(&corresponding,sizeof(bool)*datasize);

	cudaMallocManaged(&centerStartIndex,sizeof(int)*kCenter);

	cudaMalloc(&noChange,sizeof(bool));
	
	for(int i=0;i<kCenter;++i) goodCenterFlag[i]=true;

	for(int i=0;i<kCenter;++i) centerCount[i]=0;

	for(int i=0;i<datasize;++i) centerChangeFlag[i]=false;

	cudaError_t error;

	for(int iterN=0;iterN<maxIterationNumber;++iterN)
	{

		int remain=datasize;
		while(remain>0)
		{
			int tblocksize=blocksize;
			if(blocksize*threadsize>=remain)
			{
				tblocksize=remain/threadsize+(remain%threadsize==0?0:1);
			}

			updatebelonging4<<<tblocksize,threadsize>>>(datasize-remain,dataset,datasize,
				dimension,centers,labels,
				kCenter,goodCenterFlag,
				centerChangeFlag);

			remain-=tblocksize*threadsize;
		}
		//printf("belongings ok\n");

		error = cudaGetLastError();
		if(error != cudaSuccess)
		{

			printf("belong CUDA error: %s\n", cudaGetErrorString(error));

		}
		updateCorresponds<<<1,1>>>(labels,datasize,kCenter,corresponding,centerChangeFlag,centerStartIndex,centerCount,curCount,goodCenterFlag,noChange);

		error = cudaGetLastError();
		if(error != cudaSuccess)
		{
		// print the CUDA error message and exit
			printf("corresponding  CUDA error: %s\n", cudaGetErrorString(error));
		// exit(-1);
		}
		remain=kCenter;

		while(remain>0)
		{
			//printf("%d ",i);
			int tblocksize=blocksize;
			if(blocksize*threadsize>remain)
			{
				tblocksize=remain/threadsize+(remain%threadsize==0?0:1);
			}

			updateCenters4<<<tblocksize,threadsize>>>(kCenter-remain,dataset,datasize,dimension,centers,kCenter,corresponding,centerStartIndex,centerCount);
			remain-=tblocksize*threadsize;
		}

		//printf("center ok\n");
		
		error = cudaGetLastError();
		if(error != cudaSuccess)
		{
		// print the CUDA error message and exit
			printf("center update CUDA error: %s\n", cudaGetErrorString(error));
		// exit(-1);
		}

		printf("finished iteration NO. %d\n",iterN);

		bool hnochange;
		cudaMemcpy(&hnochange,noChange,sizeof(bool),cudaMemcpyDeviceToHost);

		error = cudaGetLastError();
		if(error != cudaSuccess)
		{
		// print the CUDA error message and exit
			printf("memcopy free CUDA error: %s\n", cudaGetErrorString(error));
		// exit(-1);
		}
		if(hnochange)
			break;

	}



	cudaError_t cudaStatus;

	error = cudaGetLastError();
	if(error != cudaSuccess)
	{
	// print the CUDA error message and exit
		printf("before free CUDA error: %s\n", cudaGetErrorString(error));
	// exit(-1);
	}


	cudaFree(noChange);
	cudaFree(goodCenterFlag);

	cudaFree(corresponding);
	cudaFree(centerStartIndex);

	cudaFree(centerCount);
	cudaFree(curCount);
	cudaFree(centerChangeFlag);
	cudaFree(dataset);
	error = cudaGetLastError();
	if(error != cudaSuccess)
	{
	// print the CUDA error message and exit
		printf("before CUDA error: %s\n", cudaGetErrorString(error));
	// exit(-1);
	}

	cudaDeviceSynchronize();
	error = cudaGetLastError();
	if(error != cudaSuccess)
	{
	// print the CUDA error message and exit
		printf("CUDA error: %s\n", cudaGetErrorString(error));
	// exit(-1);
	}


}




int main()
{
//	_chdir("D:\\DATA\\Fujitsu\\images\\training\\");
	chdir("/home/pitybea/features/");
	cudaDeviceProp prop;

	cudaSetDevice(0);
	cudaGetDeviceProperties(&prop,0);
	cout<<prop.maxThreadsPerBlock<<endl;


	double* dataset;
	FILE* fp=fopen("task1_features.txt","r");

	int size,dimension;

	fscanf(fp,"%d %d\n",&size,&dimension);

	size=100000;

	cudaMallocManaged(&dataset,sizeof(double)*size*dimension);
	printf("%d %d\n",size,dimension);

	for (int i=0;i<size;i++)
	{
		if(i%10000==0) printf("%d\t",i);
		for (int j=0;j<dimension;j++)
		{
			fscanf(fp,"%lf ",&dataset[i*dimension+j]);
		}
		fscanf(fp,"\n");
	}

	fclose(fp);



	int k=size/1000;
	double* centers;
	int* labels;

	cudaMallocManaged(&centers,sizeof(double)*k*dimension);
	cudaMallocManaged(&labels,sizeof(int)*size);

	for(int i=0;i<k*dimension;++i)
		centers[i]=0;
	for(int i=0;i<size;++i)
		labels[i]=0;

	kmeans4(dataset,size,dimension,centers,labels,k,400,prop.maxThreadsPerBlock);

	//cout<<labels[0]<<" "<<endl;
	//FILE* fp;
	fp=fopen("labels.txt","w");
	fprintf(fp,"%d\n",size);
	for(int i=0;i<size;i++)
	{
		//if(i%1000==0)
		cout<<labels[i]<<" ";
		fprintf(fp,"%d\n",labels[i]);
	}

	fclose(fp);
	/*
	fp=fopen("centers.txt","w");
	fprintf(fp,"%d %d\n",k,dimension);
	for(int i=0;i<k;i++)
	{
		for(int j=0;j<dimension;j++)
			fprintf(fp,"%lf ",centers[i*dimension+j]);

		fprintf(fp,"\n");
	}
	fclose(fp);
	 */
	cudaFree(labels);
	cudaFree(centers);

	cudaDeviceReset();
	return 0;
}

	.file	"tmpxft_0028b0a5_00000000-6_kernel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4026:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4026:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0, @function
_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0:
.LFB4766:
	.cfi_startproc
	movl	$1, %edx
	jmp	cudaMallocManaged@PLT
	.cfi_endproc
.LFE4766:
	.size	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0, .-_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	.globl	_Z8minIndexPdS_Pbii
	.type	_Z8minIndexPdS_Pbii, @function
_Z8minIndexPdS_Pbii:
.LFB4011:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4011:
	.size	_Z8minIndexPdS_Pbii, .-_Z8minIndexPdS_Pbii
	.globl	_Z49__device_stub__Z16updatebelonging4iPdiiS_PiiPbS1_iPdiiS_PiiPbS1_
	.type	_Z49__device_stub__Z16updatebelonging4iPdiiS_PiiPbS1_iPdiiS_PiiPbS1_, @function
_Z49__device_stub__Z16updatebelonging4iPdiiS_PiiPbS1_iPdiiS_PiiPbS1_:
.LFB4048:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	232(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	240(%rsp), %rax
	movl	%edx, 56(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 44(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 32(%rsp)
	movq	%r9, 24(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z16updatebelonging4iPdiiS_PiiPbS1_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L5:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4048:
	.size	_Z49__device_stub__Z16updatebelonging4iPdiiS_PiiPbS1_iPdiiS_PiiPbS1_, .-_Z49__device_stub__Z16updatebelonging4iPdiiS_PiiPbS1_iPdiiS_PiiPbS1_
	.globl	_Z16updatebelonging4iPdiiS_PiiPbS1_
	.type	_Z16updatebelonging4iPdiiS_PiiPbS1_, @function
_Z16updatebelonging4iPdiiS_PiiPbS1_:
.LFB4049:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z16updatebelonging4iPdiiS_PiiPbS1_iPdiiS_PiiPbS1_
	.cfi_endproc
.LFE4049:
	.size	_Z16updatebelonging4iPdiiS_PiiPbS1_, .-_Z16updatebelonging4iPdiiS_PiiPbS1_
	.globl	_Z55__device_stub__Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_PiiiS_PbS_S_S_S0_S0_
	.type	_Z55__device_stub__Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_PiiiS_PbS_S_S_S0_S0_, @function
_Z55__device_stub__Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_PiiiS_PbS_S_S_S0_S0_:
.LFB4050:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	256(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	104(%rsp), %rdi
	movl	%esi, 68(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rax, 32(%rsp)
	movq	264(%rsp), %rax
	movl	%edx, 64(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movq	272(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	96(%rsp), %rcx
	movq	%rax, 16(%rsp)
	movq	280(%rsp), %rax
	movq	%r8, 48(%rsp)
	movq	%r9, 40(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 112(%rsp)
	movq	%rax, 152(%rsp)
	leaq	68(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	96(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 272
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	168(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L11:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4050:
	.size	_Z55__device_stub__Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_PiiiS_PbS_S_S_S0_S0_, .-_Z55__device_stub__Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_PiiiS_PbS_S_S_S0_S0_
	.globl	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.type	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_, @function
_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_:
.LFB4051:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_PiiiS_PbS_S_S_S0_S0_
	.cfi_endproc
.LFE4051:
	.size	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_, .-_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.globl	_Z48__device_stub__Z14updateCenters4iPdiiS_iPiS0_S0_iPdiiS_iPiS0_S0_
	.type	_Z48__device_stub__Z14updateCenters4iPdiiS_iPiS0_S0_iPdiiS_iPiS0_S0_, @function
_Z48__device_stub__Z14updateCenters4iPdiiS_iPiS0_S0_iPdiiS_iPiS0_S0_:
.LFB4052:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	232(%rsp), %rax
	movl	%edx, 56(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	240(%rsp), %rax
	movl	%ecx, 44(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 32(%rsp)
	movl	%r9d, 40(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z14updateCenters4iPdiiS_iPiS0_S0_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L16:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4052:
	.size	_Z48__device_stub__Z14updateCenters4iPdiiS_iPiS0_S0_iPdiiS_iPiS0_S0_, .-_Z48__device_stub__Z14updateCenters4iPdiiS_iPiS0_S0_iPdiiS_iPiS0_S0_
	.globl	_Z14updateCenters4iPdiiS_iPiS0_S0_
	.type	_Z14updateCenters4iPdiiS_iPiS0_S0_, @function
_Z14updateCenters4iPdiiS_iPiS0_S0_:
.LFB4053:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z14updateCenters4iPdiiS_iPiS0_S0_iPdiiS_iPiS0_S0_
	.cfi_endproc
.LFE4053:
	.size	_Z14updateCenters4iPdiiS_iPiS0_S0_, .-_Z14updateCenters4iPdiiS_iPiS0_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z14updateCenters4iPdiiS_iPiS0_S0_"
.LC1:
	.string	"_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_"
.LC2:
	.string	"_Z16updatebelonging4iPdiiS_PiiPbS1_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4055:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14updateCenters4iPdiiS_iPiS0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16updatebelonging4iPdiiS_PiiPbS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt6vectorIiSaIiEEC2EmRKS0_.str1.1,"aMS",@progbits,1
.LC3:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIiSaIiEEC2EmRKS0_,"axG",@progbits,_ZNSt6vectorIiSaIiEEC5EmRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.type	_ZNSt6vectorIiSaIiEEC2EmRKS0_, @function
_ZNSt6vectorIiSaIiEEC2EmRKS0_:
.LFB4362:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	cmpq	%rsi, %rax
	jnb	.L24
	leaq	.LC3(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L24:
	movq	%rsi, %rbp
	xorl	%esi, %esi
	movq	%rdi, %rbx
	xorl	%eax, %eax
	movq	%rsi, (%rdi)
	leaq	0(,%rbp,4), %r12
	movq	%rsi, 8(%rdi)
	movq	%rsi, 16(%rdi)
	testq	%rbp, %rbp
	je	.L25
	movq	%r12, %rdi
	call	_Znwm@PLT
.L25:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L26
	xorl	%ecx, %ecx
	addq	$4, %rax
	movl	%ecx, -4(%rax)
	decq	%rbp
	je	.L26
.L27:
	cmpq	%rax, %r12
	je	.L26
	xorl	%edx, %edx
	addq	$4, %rax
	movl	%edx, -4(%rax)
	jmp	.L27
.L26:
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4362:
	.size	_ZNSt6vectorIiSaIiEEC2EmRKS0_, .-_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.weak	_ZNSt6vectorIiSaIiEEC1EmRKS0_
	.set	_ZNSt6vectorIiSaIiEEC1EmRKS0_,_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB4365:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L38
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L38:
	ret
	.cfi_endproc
.LFE4365:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.text
	.globl	_Z13shuffledOrderii
	.type	_Z13shuffledOrderii, @function
_Z13shuffledOrderii:
.LFB4012:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4012
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%esi, %rbp
	movslq	%edx, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %r13
	movq	%rdi, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rax, %rdx
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE0:
	movq	8(%rsp), %rdi
	leaq	31(%rsp), %rdx
	movq	%rbp, %rsi
.LEHB1:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE1:
	movq	32(%rsp), %r14
	movq	%rbp, %r12
	xorl	%eax, %eax
.L41:
	cmpl	%eax, %r12d
	jle	.L51
	movl	%eax, (%r14,%rax,4)
	incq	%rax
	jmp	.L41
.L51:
	leaq	(%r14,%rbp,4), %r15
	xorl	%ebp, %ebp
.L43:
	subq	$4, %r15
	cmpl	%ebp, %r13d
	jle	.L52
	call	rand@PLT
	movl	%r12d, %esi
	subl	%ebp, %esi
	cltd
	idivl	%esi
	movslq	%edx, %rdx
	leaq	(%r14,%rdx,4), %rax
	movq	(%rbx), %rdx
	movl	(%rax), %esi
	movl	%esi, (%rdx,%rbp,4)
	movl	(%r15), %edx
	incq	%rbp
	movl	%edx, (%rax)
	jmp	.L43
.L52:
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	jmp	.L49
.L48:
	endbr64
	movq	%rax, %rbp
.L45:
	movq	%rbx, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L49
	movq	%rbp, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L49:
	call	__stack_chk_fail@PLT
.L47:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4012:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4012:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4012-.LLSDACSB4012
.LLSDACSB4012:
	.uleb128 .LEHB0-.LFB4012
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4012
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L48-.LFB4012
	.uleb128 0
	.uleb128 .LEHB2-.LFB4012
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE4012:
	.text
	.size	_Z13shuffledOrderii, .-_Z13shuffledOrderii
	.section	.rodata.str1.1
.LC4:
	.string	"belong CUDA error: %s\n"
.LC5:
	.string	"corresponding  CUDA error: %s\n"
.LC6:
	.string	"center update CUDA error: %s\n"
.LC7:
	.string	"finished iteration NO. %d\n"
.LC8:
	.string	"memcopy free CUDA error: %s\n"
.LC9:
	.string	"before free CUDA error: %s\n"
.LC10:
	.string	"before CUDA error: %s\n"
.LC11:
	.string	"CUDA error: %s\n"
	.text
	.globl	_Z7kmeans4PdiiS_Piiiii
	.type	_Z7kmeans4PdiiS_Piiiii, @function
_Z7kmeans4PdiiS_Piiiii:
.LFB4022:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4022
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	movl	%edx, %r13d
	movl	%r9d, %edx
	pushq	%r12
	pushq	%rbx
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movl	%r9d, %ebx
	subq	$168, %rsp
	movq	%rdi, -176(%rbp)
	leaq	-80(%rbp), %rdi
	movl	%esi, -164(%rbp)
	movq	%rcx, -184(%rbp)
	movq	%r8, -200(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
.LEHB3:
	call	_Z13shuffledOrderii
.LEHE3:
	movq	-80(%rbp), %r8
	xorl	%esi, %esi
	xorl	%ecx, %ecx
.L54:
	cmpl	%ecx, %ebx
	jle	.L56
	movq	-184(%rbp), %rdx
	movslq	%esi, %rax
	leaq	(%rdx,%rax,8), %rdi
	xorl	%eax, %eax
.L57:
	cmpl	%eax, %r13d
	jle	.L113
	movl	(%r8,%rcx,4), %edx
	movq	-176(%rbp), %r10
	imull	%r13d, %edx
	addl	%eax, %edx
	movslq	%edx, %rdx
	movsd	(%r10,%rdx,8), %xmm0
	movsd	%xmm0, (%rdi,%rax,8)
	incq	%rax
	jmp	.L57
.L113:
	incq	%rcx
	addl	%r13d, %esi
	jmp	.L54
.L56:
	movslq	%ebx, %r12
	leaq	-160(%rbp), %rdi
	movq	%r12, %rsi
.LEHB4:
	call	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	salq	$2, %r12
	leaq	-152(%rbp), %rdi
	movq	%r12, %rsi
	call	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	leaq	-144(%rbp), %rdi
	movq	%r12, %rsi
	call	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	movslq	-164(%rbp), %r14
	leaq	-136(%rbp), %rdi
	movq	%r14, %rsi
	call	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	leaq	-128(%rbp), %rdi
	movq	%r14, %rsi
	call	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	leaq	-120(%rbp), %rdi
	movq	%r12, %rsi
	call	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	leaq	-112(%rbp), %rdi
	movl	$1, %esi
	call	cudaMalloc@PLT
	movq	-160(%rbp), %rdx
	xorl	%eax, %eax
.L58:
	cmpl	%eax, %ebx
	jle	.L114
	movb	$1, (%rdx,%rax)
	incq	%rax
	jmp	.L58
.L114:
	movq	-152(%rbp), %rdx
	xorl	%eax, %eax
.L60:
	cmpl	%eax, %ebx
	jle	.L115
	xorl	%esi, %esi
	movl	%esi, (%rdx,%rax,4)
	incq	%rax
	jmp	.L60
.L115:
	movq	-136(%rbp), %rdx
	xorl	%eax, %eax
.L62:
	cmpl	%eax, -164(%rbp)
	jle	.L116
	movb	$0, (%rdx,%rax)
	incq	%rax
	jmp	.L62
.L116:
	movabsq	$4294967297, %r12
	movl	32(%rbp), %eax
	xorl	%ecx, %ecx
	imull	24(%rbp), %eax
	movl	%ecx, -168(%rbp)
	movl	%eax, -188(%rbp)
.L64:
	movl	-168(%rbp), %eax
	cmpl	16(%rbp), %eax
	jge	.L78
	movl	-164(%rbp), %r14d
.L79:
	testl	%r14d, %r14d
	jle	.L117
	movl	32(%rbp), %r15d
	cmpl	%r14d, -188(%rbp)
	jl	.L65
	movl	%r14d, %eax
	cltd
	idivl	24(%rbp)
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, %r15d
.L65:
	movl	24(%rbp), %eax
	movq	%r12, -88(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, -100(%rbp)
	movl	-84(%rbp), %ecx
	movl	%eax, -92(%rbp)
	movl	-96(%rbp), %esi
	movl	%r15d, -104(%rbp)
	movq	-92(%rbp), %rdx
	movq	-104(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	movl	-164(%rbp), %edi
	pushq	%rdx
	movl	%r13d, %ecx
	pushq	-136(%rbp)
	movq	-200(%rbp), %r9
	movq	-184(%rbp), %r8
	pushq	-160(%rbp)
	subl	%r14d, %edi
	movl	-164(%rbp), %edx
	pushq	%rbx
	movq	-176(%rbp), %rsi
	.cfi_escape 0x2e,0x20
	call	_Z49__device_stub__Z16updatebelonging4iPdiiS_PiiPbS1_iPdiiS_PiiPbS1_
	addq	$32, %rsp
.L66:
	imull	24(%rbp), %r15d
	subl	%r15d, %r14d
	jmp	.L79
.L117:
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L68
	call	cudaGetErrorString@PLT
	movq	%rax, %rdx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L68:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r12, -92(%rbp)
	movl	$1, -84(%rbp)
	movq	%r12, -104(%rbp)
	movl	$1, -96(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	pushq	-112(%rbp)
	movl	-164(%rbp), %esi
	movl	%ebx, %edx
	movq	-200(%rbp), %rdi
	pushq	-160(%rbp)
	movq	-136(%rbp), %r8
	pushq	-144(%rbp)
	pushq	-152(%rbp)
	movq	-120(%rbp), %r9
	movq	-128(%rbp), %rcx
	.cfi_escape 0x2e,0x20
	call	_Z55__device_stub__Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_PiiiS_PbS_S_S_S0_S0_
	addq	$32, %rsp
.L69:
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L70
	call	cudaGetErrorString@PLT
	movq	%rax, %rdx
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L70:
	movl	%ebx, %r14d
.L71:
	testl	%r14d, %r14d
	jle	.L118
	movl	32(%rbp), %r15d
	cmpl	%r14d, -188(%rbp)
	jle	.L72
	movl	%r14d, %eax
	cltd
	idivl	24(%rbp)
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, %r15d
.L72:
	movl	24(%rbp), %eax
	movq	%r12, -88(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, -100(%rbp)
	movl	-84(%rbp), %ecx
	movl	%eax, -92(%rbp)
	movl	-96(%rbp), %esi
	movl	%r15d, -104(%rbp)
	movq	-92(%rbp), %rdx
	movq	-104(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L73
	pushq	%rax
	movl	%ebx, %edi
	movq	-184(%rbp), %r8
	movl	%ebx, %r9d
	pushq	-152(%rbp)
	movl	-164(%rbp), %edx
	subl	%r14d, %edi
	movl	%r13d, %ecx
	movq	-176(%rbp), %rsi
	pushq	-120(%rbp)
	pushq	-128(%rbp)
	.cfi_escape 0x2e,0x20
	call	_Z48__device_stub__Z14updateCenters4iPdiiS_iPiS0_S0_iPdiiS_iPiS0_S0_
	addq	$32, %rsp
.L73:
	imull	24(%rbp), %r15d
	subl	%r15d, %r14d
	jmp	.L71
.L118:
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L75
	call	cudaGetErrorString@PLT
	movq	%rax, %rdx
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L75:
	movl	-168(%rbp), %edx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	-112(%rbp), %rsi
	leaq	-92(%rbp), %rdi
	movl	$2, %ecx
	movl	$1, %edx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L76
	call	cudaGetErrorString@PLT
	movq	%rax, %rdx
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L76:
	cmpb	$0, -92(%rbp)
	jne	.L78
	incl	-168(%rbp)
	jmp	.L64
.L78:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L80
	call	cudaGetErrorString@PLT
	movq	%rax, %rdx
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L80:
	movq	-112(%rbp), %rdi
	call	cudaFree@PLT
	movq	-160(%rbp), %rdi
	call	cudaFree@PLT
	movq	-128(%rbp), %rdi
	call	cudaFree@PLT
	movq	-120(%rbp), %rdi
	call	cudaFree@PLT
	movq	-152(%rbp), %rdi
	call	cudaFree@PLT
	movq	-144(%rbp), %rdi
	call	cudaFree@PLT
	movq	-136(%rbp), %rdi
	call	cudaFree@PLT
	movq	-176(%rbp), %rdi
	call	cudaFree@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L81
	call	cudaGetErrorString@PLT
	movq	%rax, %rdx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L81:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L82
	call	cudaGetErrorString@PLT
	movq	%rax, %rdx
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.LEHE4:
.L82:
	leaq	-80(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L85
	jmp	.L111
.L89:
	endbr64
	movq	%rax, %rbx
.L83:
	leaq	-80(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L111
	movq	%rbx, %rdi
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
.L111:
	call	__stack_chk_fail@PLT
.L85:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4022:
	.section	.gcc_except_table
.LLSDA4022:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4022-.LLSDACSB4022
.LLSDACSB4022:
	.uleb128 .LEHB3-.LFB4022
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB4-.LFB4022
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L89-.LFB4022
	.uleb128 0
	.uleb128 .LEHB5-.LFB4022
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE4022:
	.text
	.size	_Z7kmeans4PdiiS_Piiiii, .-_Z7kmeans4PdiiS_Piiiii
	.section	.rodata.str1.1
.LC12:
	.string	"/home/pitybea/features/"
.LC13:
	.string	"r"
.LC14:
	.string	"task1_features.txt"
.LC15:
	.string	"%d %d\n"
.LC16:
	.string	"%d\t"
.LC17:
	.string	"%lf "
.LC18:
	.string	"\n"
.LC20:
	.string	"w"
.LC21:
	.string	"labels.txt"
.LC22:
	.string	"%d\n"
.LC23:
	.string	" "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4023:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC12(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	.LC16(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	_ZSt4cout(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	.LC15(%rip), %rbx
	subq	$1096, %rsp
	.cfi_def_cfa_offset 1152
	movq	%fs:40, %rax
	movq	%rax, 1080(%rsp)
	xorl	%eax, %eax
	call	chdir@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaGetDeviceProperties_v2@PLT
	movl	368(%rsp), %esi
	movq	%r12, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC13(%rip), %rsi
	leaq	.LC14(%rip), %rdi
	call	fopen@PLT
	leaq	20(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%rbx, %rsi
	movq	%rax, %rdi
	movq	%rax, %rbp
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movslq	20(%rsp), %rsi
	leaq	24(%rsp), %rdi
	movl	$100000, 16(%rsp)
	imulq	$800000, %rsi, %rsi
	call	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	movl	20(%rsp), %ecx
	movl	16(%rsp), %edx
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
.L120:
	cmpl	%ebx, 16(%rsp)
	jle	.L133
	movl	%ebx, %eax
	movl	$10000, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L121
	movl	%ebx, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L121:
	xorl	%r15d, %r15d
	leaq	.LC17(%rip), %r14
.L122:
	movl	20(%rsp), %eax
	cmpl	%r15d, %eax
	jle	.L134
	imull	%ebx, %eax
	movq	24(%rsp), %rdx
	movq	%r14, %rsi
	movq	%rbp, %rdi
	addl	%r15d, %eax
	incl	%r15d
	cltq
	leaq	(%rdx,%rax,8), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L122
.L134:
	leaq	.LC18(%rip), %rsi
	movq	%rbp, %rdi
	xorl	%eax, %eax
	incl	%ebx
	call	__isoc23_fscanf@PLT
	jmp	.L120
.L133:
	movq	%rbp, %rdi
	call	fclose@PLT
	movl	16(%rsp), %eax
	movl	$1000, %ecx
	movslq	20(%rsp), %rsi
	leaq	32(%rsp), %rdi
	cltd
	idivl	%ecx
	cltq
	imulq	%rax, %rsi
	movl	%eax, 12(%rsp)
	salq	$3, %rsi
	call	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	movslq	16(%rsp), %rsi
	leaq	40(%rsp), %rdi
	salq	$2, %rsi
	call	_Z17cudaMallocManagedIbE9cudaErrorPPT_mj.constprop.0.isra.0
	movl	12(%rsp), %r9d
	movl	20(%rsp), %edx
	xorl	%eax, %eax
	movq	32(%rsp), %rcx
	imull	%r9d, %edx
.L125:
	cmpl	%eax, %edx
	jle	.L135
	movq	$0x000000000, (%rcx,%rax,8)
	incq	%rax
	jmp	.L125
.L135:
	movq	40(%rsp), %r8
	xorl	%eax, %eax
.L127:
	movl	16(%rsp), %esi
	cmpl	%eax, %esi
	jle	.L136
	xorl	%edx, %edx
	movl	%edx, (%r8,%rax,4)
	incq	%rax
	jmp	.L127
.L136:
	pushq	%rax
	.cfi_def_cfa_offset 1160
	leaq	.LC22(%rip), %r13
	xorl	%ebp, %ebp
	leaq	.LC23(%rip), %r14
	pushq	$65535
	.cfi_def_cfa_offset 1168
	movl	384(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 1176
	pushq	$400
	.cfi_def_cfa_offset 1184
	movl	52(%rsp), %edx
	movq	56(%rsp), %rdi
	call	_Z7kmeans4PdiiS_Piiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 1152
	leaq	.LC20(%rip), %rsi
	leaq	.LC21(%rip), %rdi
	call	fopen@PLT
	movl	16(%rsp), %ecx
	movq	%r13, %rdx
	movl	$2, %esi
	movq	%rax, %rdi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L129:
	cmpl	%ebp, 16(%rsp)
	jle	.L137
	movq	40(%rsp), %rax
	movq	%r12, %rdi
	movl	(%rax,%rbp,4), %esi
	call	_ZNSolsEi@PLT
	movl	$1, %edx
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	movq	40(%rsp), %rax
	movq	%r13, %rdx
	movq	%rbx, %rdi
	movl	$2, %esi
	movl	(%rax,%rbp,4), %ecx
	xorl	%eax, %eax
	incq	%rbp
	call	__fprintf_chk@PLT
	jmp	.L129
.L137:
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaDeviceReset@PLT
	movq	1080(%rsp), %rax
	subq	%fs:40, %rax
	je	.L131
	call	__stack_chk_fail@PLT
.L131:
	addq	$1096, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4023:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"


#include <stdio.h>
#include <unistd.h>
#include <vector>
#include <iostream>
//#include <Windows.h>
//#include <direct.h>
using namespace std;

#ifndef __HIPCC__  
    #define __HIPCC__
#endif


__device__ int minIndex(double* data,double* centers,bool* centerflags,int kCenter,int dimension)
{
	int result;
	int firstindex=0;

	while(firstindex<kCenter && (! centerflags[ firstindex]))
		++firstindex;

	result=firstindex;
	double mindis=0.0;

	for (int i = 0; i < dimension; i++)
	{
		double tdis=centers[firstindex*dimension+i]-data[i];
		mindis+=tdis*tdis;
	}

	for(int i=firstindex+1;i<kCenter;++i)
	{
		if(centerflags[i])
		{
			double tdis=0.0;
			for (int j = 0; j < dimension; j++)
			{
				double ttdis=centers[i*dimension+j]-data[j];
				tdis+=ttdis*ttdis;
			}
			if(tdis<mindis)
			{
				mindis=tdis;
				result=i;
			}
		}
	}

	return result;
}
vector<int> shuffledOrder(int n,int m)
{
	//assert(n>=m);
	vector<int> result(m);
	vector<int> index(n);
	for(int i=0;i<n;++i)
	{
		index[i]=i;
	}

	for(int i=0;i<m;++i)
	{
		int tem=rand()%(n-i);
		result[i]=index[tem];
		index[tem]=index[n-i-1];

	}
	return result;
}
__global__ void updatebelonging4(int index,double* dataset,int datasize,int dimension,double* centers,int* labels,int kCenter,bool* goodCenterFlag,bool* CenterChangeFlag)
{
	int j=index+blockDim.x* blockIdx.x +threadIdx.x;

	int tlabel;
	if(j<datasize)
	{
		CenterChangeFlag[j]=false;
		tlabel=minIndex(dataset+j*dimension, centers,goodCenterFlag,kCenter,dimension);
		if(tlabel!=labels[j])
			CenterChangeFlag[j]=true;
		labels[j]=tlabel;

	}
	
	
}

__global__ void updateCorresponds(int* labels,int datasize,int kCenter,int* correspondings,bool* centerChangeFlag,int* centerStartIndex,int* centerCount,int* curCount,bool* goodCenterFlag,bool* nochange)
{
//	cudaMemset(correspondings,0,sizeof(int)*datasize);
//	cudaMemset(centerCount,0,sizeof(int)*kCenter);
	*nochange=true;
	for (int i = 0; i < kCenter; i++)
	{
		centerCount[i]=0;
		curCount[i]=0;
	}
	for (int i = 0; i < datasize; i++)
	{
		++centerCount[labels[i]];

		if(centerChangeFlag[i])
		{
			*nochange=false;
			centerChangeFlag[i]=false;
		}	
	}
	centerStartIndex[0]=0;
	for (int i = 0; i < kCenter; i++)
	{
		if (centerCount[i]==0)
		{
			goodCenterFlag[i]=false;
		}
		if(i>0)
		{
			centerStartIndex[i]=centerStartIndex[i-1]+centerCount[i-1];
		}
	}
	
	//curCount=new int[kCenter];

	for (int i = 0; i < datasize; i++)
	{
		int tlabel=labels[i];
		//int ind=;
		correspondings[centerStartIndex[tlabel] + curCount[tlabel]]=i;
		++curCount[tlabel];
	}

	


}

__global__ void updateCenters4(int ind,double* dataset,int datasize,int dimension,double* centers,int kCenter,int* corresponding,int* centerStartIndex,int* centerCount)
{
	int j=ind+blockDim.x*blockIdx.x+threadIdx.x;
	if(j<kCenter)
	{
		if(centerCount[j]>0)
		{
			for (int i = 0; i < dimension; i++)
			{
				centers[j*dimension+i]=0;
			}
			for (int i = 0; i < centerCount[j]; i++)
			{
				int curinde=corresponding[ centerStartIndex[j]+i];

				for (int k = 0; k < dimension; k++)
				{
					centers[j*dimension+k]+=dataset[curinde*dimension+k]/centerCount[j];
				}
			}

		}
	}
}

void kmeans4(double* dataset,int datasize,int dimension,double* centers,int* labels,int kCenter,int maxIterationNumber,int threadsize,int blocksize=65535)
{

	vector<int> initialCenterIndex=shuffledOrder(datasize,kCenter);

	for(int i=0;i<kCenter;++i)
		for(int j=0;j<dimension;++j)
			centers[i*dimension+j]=dataset[initialCenterIndex[i]*dimension+j];


	bool* goodCenterFlag;
	int* centerCount;
	int* curCount;
	bool* centerChangeFlag;
	int* corresponding;
	int* centerStartIndex;

	bool* noChange;
	

	hipMallocManaged(&goodCenterFlag,sizeof(bool)*kCenter);

	hipMallocManaged(&centerCount,sizeof(int)*kCenter);
	hipMallocManaged(&curCount,sizeof(int)*kCenter);

	hipMallocManaged(&centerChangeFlag,sizeof(bool)*datasize);

	hipMallocManaged(&corresponding,sizeof(bool)*datasize);

	hipMallocManaged(&centerStartIndex,sizeof(int)*kCenter);

	hipMalloc(&noChange,sizeof(bool));
	
	for(int i=0;i<kCenter;++i) goodCenterFlag[i]=true;

	for(int i=0;i<kCenter;++i) centerCount[i]=0;

	for(int i=0;i<datasize;++i) centerChangeFlag[i]=false;

	hipError_t error;

	for(int iterN=0;iterN<maxIterationNumber;++iterN)
	{

		int remain=datasize;
		while(remain>0)
		{
			int tblocksize=blocksize;
			if(blocksize*threadsize>=remain)
			{
				tblocksize=remain/threadsize+(remain%threadsize==0?0:1);
			}

			updatebelonging4<<<tblocksize,threadsize>>>(datasize-remain,dataset,datasize,
				dimension,centers,labels,
				kCenter,goodCenterFlag,
				centerChangeFlag);

			remain-=tblocksize*threadsize;
		}
		//printf("belongings ok\n");

		error = hipGetLastError();
		if(error != hipSuccess)
		{

			printf("belong CUDA error: %s\n", hipGetErrorString(error));

		}
		updateCorresponds<<<1,1>>>(labels,datasize,kCenter,corresponding,centerChangeFlag,centerStartIndex,centerCount,curCount,goodCenterFlag,noChange);

		error = hipGetLastError();
		if(error != hipSuccess)
		{
		// print the CUDA error message and exit
			printf("corresponding  CUDA error: %s\n", hipGetErrorString(error));
		// exit(-1);
		}
		remain=kCenter;

		while(remain>0)
		{
			//printf("%d ",i);
			int tblocksize=blocksize;
			if(blocksize*threadsize>remain)
			{
				tblocksize=remain/threadsize+(remain%threadsize==0?0:1);
			}

			updateCenters4<<<tblocksize,threadsize>>>(kCenter-remain,dataset,datasize,dimension,centers,kCenter,corresponding,centerStartIndex,centerCount);
			remain-=tblocksize*threadsize;
		}

		//printf("center ok\n");
		
		error = hipGetLastError();
		if(error != hipSuccess)
		{
		// print the CUDA error message and exit
			printf("center update CUDA error: %s\n", hipGetErrorString(error));
		// exit(-1);
		}

		printf("finished iteration NO. %d\n",iterN);

		bool hnochange;
		hipMemcpy(&hnochange,noChange,sizeof(bool),hipMemcpyDeviceToHost);

		error = hipGetLastError();
		if(error != hipSuccess)
		{
		// print the CUDA error message and exit
			printf("memcopy free CUDA error: %s\n", hipGetErrorString(error));
		// exit(-1);
		}
		if(hnochange)
			break;

	}



	hipError_t cudaStatus;

	error = hipGetLastError();
	if(error != hipSuccess)
	{
	// print the CUDA error message and exit
		printf("before free CUDA error: %s\n", hipGetErrorString(error));
	// exit(-1);
	}


	hipFree(noChange);
	hipFree(goodCenterFlag);

	hipFree(corresponding);
	hipFree(centerStartIndex);

	hipFree(centerCount);
	hipFree(curCount);
	hipFree(centerChangeFlag);
	hipFree(dataset);
	error = hipGetLastError();
	if(error != hipSuccess)
	{
	// print the CUDA error message and exit
		printf("before CUDA error: %s\n", hipGetErrorString(error));
	// exit(-1);
	}

	hipDeviceSynchronize();
	error = hipGetLastError();
	if(error != hipSuccess)
	{
	// print the CUDA error message and exit
		printf("CUDA error: %s\n", hipGetErrorString(error));
	// exit(-1);
	}


}




int main()
{
//	_chdir("D:\\DATA\\Fujitsu\\images\\training\\");
	chdir("/home/pitybea/features/");
	hipDeviceProp_t prop;

	hipSetDevice(0);
	hipGetDeviceProperties(&prop,0);
	cout<<prop.maxThreadsPerBlock<<endl;


	double* dataset;
	FILE* fp=fopen("task1_features.txt","r");

	int size,dimension;

	fscanf(fp,"%d %d\n",&size,&dimension);

	size=100000;

	hipMallocManaged(&dataset,sizeof(double)*size*dimension);
	printf("%d %d\n",size,dimension);

	for (int i=0;i<size;i++)
	{
		if(i%10000==0) printf("%d\t",i);
		for (int j=0;j<dimension;j++)
		{
			fscanf(fp,"%lf ",&dataset[i*dimension+j]);
		}
		fscanf(fp,"\n");
	}

	fclose(fp);



	int k=size/1000;
	double* centers;
	int* labels;

	hipMallocManaged(&centers,sizeof(double)*k*dimension);
	hipMallocManaged(&labels,sizeof(int)*size);

	for(int i=0;i<k*dimension;++i)
		centers[i]=0;
	for(int i=0;i<size;++i)
		labels[i]=0;

	kmeans4(dataset,size,dimension,centers,labels,k,400,prop.maxThreadsPerBlock);

	//cout<<labels[0]<<" "<<endl;
	//FILE* fp;
	fp=fopen("labels.txt","w");
	fprintf(fp,"%d\n",size);
	for(int i=0;i<size;i++)
	{
		//if(i%1000==0)
		cout<<labels[i]<<" ";
		fprintf(fp,"%d\n",labels[i]);
	}

	fclose(fp);
	/*
	fp=fopen("centers.txt","w");
	fprintf(fp,"%d %d\n",k,dimension);
	for(int i=0;i<k;i++)
	{
		for(int j=0;j<dimension;j++)
			fprintf(fp,"%lf ",centers[i*dimension+j]);

		fprintf(fp,"\n");
	}
	fclose(fp);
	 */
	hipFree(labels);
	hipFree(centers);

	hipDeviceReset();
	return 0;
}

	.text
	.file	"kernel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z13shuffledOrderii             # -- Begin function _Z13shuffledOrderii
	.type	_Z13shuffledOrderii,@function
_Z13shuffledOrderii:                    # @_Z13shuffledOrderii
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %r15d
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movslq	%edx, %rsi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorIiSaIiEEC2EmRKS0_
	movslq	%ebp, %r14
.Ltmp0:
	leaq	8(%rsp), %rdi
	leaq	7(%rsp), %rdx
	movq	%r14, %rsi
	callq	_ZNSt6vectorIiSaIiEEC2EmRKS0_
.Ltmp1:
# %bb.1:
	testl	%ebp, %ebp
	jle	.LBB0_4
# %bb.2:                                # %.lr.ph
	movq	8(%rsp), %rax
	movl	%ebp, %ecx
	xorl	%edx, %edx
.LBB0_3:                                # =>This Inner Loop Header: Depth=1
	movl	%edx, (%rax,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rcx
	jne	.LBB0_3
.LBB0_4:                                # %.preheader
	testl	%r15d, %r15d
	jle	.LBB0_10
# %bb.5:                                # %.lr.ph28.preheader
	movl	%r15d, %r15d
	decq	%r14
	xorl	%r12d, %r12d
.LBB0_6:                                # %.lr.ph28
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltd
	idivl	%ebp
	movslq	%edx, %rax
	movq	8(%rsp), %rdi
	movl	(%rdi,%rax,4), %ecx
	movq	(%rbx), %rdx
	movl	%ecx, (%rdx,%r12,4)
	movl	(%rdi,%r14,4), %ecx
	movl	%ecx, (%rdi,%rax,4)
	incq	%r12
	decq	%r14
	decl	%ebp
	cmpq	%r12, %r15
	jne	.LBB0_6
	jmp	.LBB0_11
.LBB0_10:                               # %._crit_edge
	movq	8(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_12
.LBB0_11:                               # %._crit_edge.thread
	callq	_ZdlPv
.LBB0_12:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit25
	movq	%rbx, %rax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_7:
	.cfi_def_cfa_offset 80
.Ltmp2:
	movq	%rax, %r14
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.LBB0_9
# %bb.8:
	callq	_ZdlPv
.LBB0_9:                                # %_ZNSt6vectorIiSaIiEED2Ev.exit
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end0:
	.size	_Z13shuffledOrderii, .Lfunc_end0-_Z13shuffledOrderii
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table0:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp1-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Lfunc_end0-.Ltmp1             #   Call between .Ltmp1 and .Lfunc_end0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEEC2EmRKS0_,"axG",@progbits,_ZNSt6vectorIiSaIiEEC2EmRKS0_,comdat
	.weak	_ZNSt6vectorIiSaIiEEC2EmRKS0_   # -- Begin function _ZNSt6vectorIiSaIiEEC2EmRKS0_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEEC2EmRKS0_,@function
_ZNSt6vectorIiSaIiEEC2EmRKS0_:          # @_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB1_7
# %bb.1:                                # %_ZNSt6vectorIiSaIiEE17_S_check_init_lenEmRKS0_.exit
	movq	%rsi, %r14
	movq	%rdi, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	testq	%rsi, %rsi
	je	.LBB1_2
# %bb.3:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, (%rbx)
	leaq	(%rax,%r14,4), %r15
	movq	%r15, 16(%rbx)
	movl	$0, (%rax)
	addq	$4, %rax
	cmpq	$1, %r14
	jne	.LBB1_5
# %bb.4:
	movq	%rax, %r15
	jmp	.LBB1_6
.LBB1_2:                                # %_ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.thread
	movups	%xmm0, (%rbx)
	movq	$0, 16(%rbx)
	xorl	%r15d, %r15d
	jmp	.LBB1_6
.LBB1_5:                                # %_ZSt6fill_nIPimiET_S1_T0_RKT1_.exit.loopexit.i.i.i.i
	leaq	-4(,%r14,4), %rdx
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_6:
	movq	%r15, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_7:
	.cfi_def_cfa_offset 32
	movl	$.L.str.19, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end1:
	.size	_ZNSt6vectorIiSaIiEEC2EmRKS0_, .Lfunc_end1-_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_ # -- Begin function _Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_
	.type	_Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_,@function
_Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_: # @_Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16updatebelonging4iPdiiS_PiiPbS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_, .Lfunc_end2-_Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_ # -- Begin function _Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.type	_Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_,@function
_Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_: # @_Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_, .Lfunc_end3-_Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_ # -- Begin function _Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_
	.type	_Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_,@function
_Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_: # @_Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14updateCenters4iPdiiS_iPiS0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_, .Lfunc_end4-_Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7kmeans4PdiiS_Piiiii          # -- Begin function _Z7kmeans4PdiiS_Piiiii
	.type	_Z7kmeans4PdiiS_Piiiii,@function
_Z7kmeans4PdiiS_Piiiii:                 # @_Z7kmeans4PdiiS_Piiiii
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, 96(%rsp)                   # 8-byte Spill
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	movl	%esi, %ebp
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	leaq	112(%rsp), %rdi
	movl	%r9d, %edx
	callq	_Z13shuffledOrderii
	movl	%ebx, %r15d
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB5_6
# %bb.1:                                # %.preheader175.lr.ph
	movq	112(%rsp), %rax
	movslq	12(%rsp), %rcx                  # 4-byte Folded Reload
	movl	%ecx, %edx
	leaq	(,%rcx,8), %rsi
	xorl	%edi, %edi
	movq	64(%rsp), %r8                   # 8-byte Reload
.LBB5_2:                                # %.preheader175
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	jle	.LBB5_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB5_2 Depth=1
	movslq	(%rax,%rdi,4), %r9
	imulq	%rcx, %r9
	movq	32(%rsp), %r10                  # 8-byte Reload
	leaq	(%r10,%r9,8), %r9
	xorl	%r10d, %r10d
.LBB5_4:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r9,%r10,8), %xmm0             # xmm0 = mem[0],zero
	movsd	%xmm0, (%r8,%r10,8)
	incq	%r10
	cmpq	%r10, %rdx
	jne	.LBB5_4
.LBB5_5:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	incq	%rdi
	addq	%rsi, %r8
	cmpq	%r15, %rdi
	jne	.LBB5_2
.LBB5_6:                                # %._crit_edge178
	movslq	16(%rsp), %r13                  # 4-byte Folded Reload
.Ltmp3:
	.cfi_escape 0x2e, 0x00
	leaq	56(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp4:
# %bb.7:                                # %_ZL16hipMallocManagedIbE10hipError_tPPT_mj.exit
	shlq	$2, %r13
.Ltmp5:
	.cfi_escape 0x2e, 0x00
	leaq	48(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp6:
# %bb.8:                                # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit
.Ltmp7:
	.cfi_escape 0x2e, 0x00
	leaq	104(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp8:
# %bb.9:                                # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit151
	movslq	%ebp, %r12
.Ltmp9:
	.cfi_escape 0x2e, 0x00
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp10:
# %bb.10:                               # %_ZL16hipMallocManagedIbE10hipError_tPPT_mj.exit152
.Ltmp11:
	.cfi_escape 0x2e, 0x00
	leaq	88(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp12:
# %bb.11:                               # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit153
.Ltmp13:
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp14:
# %bb.12:                               # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit154
.Ltmp15:
	.cfi_escape 0x2e, 0x00
	leaq	72(%rsp), %rdi
	movl	$1, %esi
	callq	hipMalloc
.Ltmp16:
# %bb.13:                               # %_ZL9hipMallocIbE10hipError_tPPT_m.exit.preheader
	cmpl	$0, 16(%rsp)                    # 4-byte Folded Reload
	jle	.LBB5_15
# %bb.14:                               # %.lr.ph182
	movq	56(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$1, %esi
	movq	%r15, %rdx
	callq	memset@PLT
	movq	48(%rsp), %rdi
	shlq	$2, %r15
	.cfi_escape 0x2e, 0x00
	xorl	%esi, %esi
	movq	%r15, %rdx
	callq	memset@PLT
.LBB5_15:                               # %.preheader173
	testl	%ebp, %ebp
	jle	.LBB5_17
# %bb.16:                               # %.lr.ph184
	movq	40(%rsp), %rdi
	movl	%ebp, %edx
	.cfi_escape 0x2e, 0x00
	xorl	%esi, %esi
	callq	memset@PLT
.LBB5_17:                               # %.preheader172
	movl	%ebp, 8(%rsp)                   # 4-byte Spill
	cmpl	$0, 192(%rsp)
	jle	.LBB5_57
# %bb.18:                               # %.preheader.lr.ph
	movl	208(%rsp), %ebx
	movl	200(%rsp), %r14d
	movl	%ebx, %ebp
	imull	%r14d, %ebp
	movl	%r14d, %r15d
	btsq	$32, %r15
	movl	$0, 28(%rsp)                    # 4-byte Folded Spill
.LBB5_19:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_21 Depth 2
                                        #     Child Loop BB5_40 Depth 2
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB5_27
# %bb.20:                               # %.lr.ph186.preheader
                                        #   in Loop: Header=BB5_19 Depth=1
	movl	8(%rsp), %r13d                  # 4-byte Reload
.LBB5_21:                               # %.lr.ph186
                                        #   Parent Loop BB5_19 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ebx, %r12d
	cmpl	%r13d, %ebp
	jl	.LBB5_23
# %bb.22:                               #   in Loop: Header=BB5_21 Depth=2
	movl	%r13d, %eax
	cltd
	idivl	%r14d
	movl	%eax, %r12d
	cmpl	$1, %edx
	sbbl	$-1, %r12d
.LBB5_23:                               #   in Loop: Header=BB5_21 Depth=2
	movl	%r12d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
.Ltmp18:
	.cfi_escape 0x2e, 0x00
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp19:
# %bb.24:                               #   in Loop: Header=BB5_21 Depth=2
	testl	%eax, %eax
	jne	.LBB5_26
# %bb.25:                               #   in Loop: Header=BB5_21 Depth=2
	movl	8(%rsp), %edx                   # 4-byte Reload
	movl	%edx, %edi
	subl	%r13d, %edi
.Ltmp20:
	.cfi_escape 0x2e, 0x20
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movq	72(%rsp), %r8                   # 8-byte Reload
	movq	104(%rsp), %r9                  # 8-byte Reload
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.Ltmp21:
.LBB5_26:                               #   in Loop: Header=BB5_21 Depth=2
	imull	%r14d, %r12d
	subl	%r12d, %r13d
	jg	.LBB5_21
.LBB5_27:                               # %._crit_edge187
                                        #   in Loop: Header=BB5_19 Depth=1
.Ltmp23:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp24:
# %bb.28:                               #   in Loop: Header=BB5_19 Depth=1
	testl	%eax, %eax
	je	.LBB5_31
# %bb.29:                               #   in Loop: Header=BB5_19 Depth=1
.Ltmp25:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp26:
# %bb.30:                               #   in Loop: Header=BB5_19 Depth=1
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB5_31:                               #   in Loop: Header=BB5_19 Depth=1
.Ltmp27:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp28:
# %bb.32:                               #   in Loop: Header=BB5_19 Depth=1
	testl	%eax, %eax
	jne	.LBB5_34
# %bb.33:                               #   in Loop: Header=BB5_19 Depth=1
	movq	88(%rsp), %rcx
	movq	40(%rsp), %r8
	movq	80(%rsp), %r9
.Ltmp29:
	.cfi_escape 0x2e, 0x20
	movq	96(%rsp), %rdi                  # 8-byte Reload
	movl	8(%rsp), %esi                   # 4-byte Reload
	movq	16(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.Ltmp30:
.LBB5_34:                               #   in Loop: Header=BB5_19 Depth=1
.Ltmp31:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp32:
# %bb.35:                               #   in Loop: Header=BB5_19 Depth=1
	testl	%eax, %eax
	je	.LBB5_38
# %bb.36:                               #   in Loop: Header=BB5_19 Depth=1
.Ltmp33:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp34:
# %bb.37:                               #   in Loop: Header=BB5_19 Depth=1
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.1, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB5_38:                               #   in Loop: Header=BB5_19 Depth=1
	cmpl	$0, 16(%rsp)                    # 4-byte Folded Reload
	jle	.LBB5_46
# %bb.39:                               # %.lr.ph190.preheader
                                        #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rax                  # 8-byte Reload
	movl	%eax, %r13d
.LBB5_40:                               # %.lr.ph190
                                        #   Parent Loop BB5_19 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ebx, %r12d
	cmpl	%r13d, %ebp
	jle	.LBB5_42
# %bb.41:                               #   in Loop: Header=BB5_40 Depth=2
	movl	%r13d, %eax
	cltd
	idivl	%r14d
	movl	%eax, %r12d
	cmpl	$1, %edx
	sbbl	$-1, %r12d
.LBB5_42:                               #   in Loop: Header=BB5_40 Depth=2
	movl	%r12d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
.Ltmp35:
	.cfi_escape 0x2e, 0x00
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp36:
# %bb.43:                               #   in Loop: Header=BB5_40 Depth=2
	testl	%eax, %eax
	jne	.LBB5_45
# %bb.44:                               #   in Loop: Header=BB5_40 Depth=2
	movq	16(%rsp), %r9                   # 8-byte Reload
	movl	%r9d, %edi
	subl	%r13d, %edi
.Ltmp37:
	.cfi_escape 0x2e, 0x20
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	16(%rsp), %edx                  # 4-byte Reload
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movq	72(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.Ltmp38:
.LBB5_45:                               #   in Loop: Header=BB5_40 Depth=2
	imull	%r14d, %r12d
	subl	%r12d, %r13d
	jg	.LBB5_40
.LBB5_46:                               # %._crit_edge191
                                        #   in Loop: Header=BB5_19 Depth=1
.Ltmp40:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp41:
# %bb.47:                               #   in Loop: Header=BB5_19 Depth=1
	testl	%eax, %eax
	je	.LBB5_50
# %bb.48:                               #   in Loop: Header=BB5_19 Depth=1
.Ltmp42:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp43:
# %bb.49:                               #   in Loop: Header=BB5_19 Depth=1
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB5_50:                               #   in Loop: Header=BB5_19 Depth=1
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %edi
	movl	28(%rsp), %esi                  # 4-byte Reload
	xorl	%eax, %eax
	callq	printf
	movq	72(%rsp), %rsi
.Ltmp45:
	.cfi_escape 0x2e, 0x00
	movl	$1, %edx
	leaq	7(%rsp), %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp46:
# %bb.51:                               #   in Loop: Header=BB5_19 Depth=1
.Ltmp47:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp48:
# %bb.52:                               #   in Loop: Header=BB5_19 Depth=1
	testl	%eax, %eax
	je	.LBB5_55
# %bb.53:                               #   in Loop: Header=BB5_19 Depth=1
.Ltmp49:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp50:
# %bb.54:                               #   in Loop: Header=BB5_19 Depth=1
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.4, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB5_55:                               #   in Loop: Header=BB5_19 Depth=1
	cmpb	$0, 7(%rsp)
	jne	.LBB5_57
# %bb.56:                               #   in Loop: Header=BB5_19 Depth=1
	movl	28(%rsp), %eax                  # 4-byte Reload
	incl	%eax
	movl	%eax, 28(%rsp)                  # 4-byte Spill
	cmpl	192(%rsp), %eax
	jne	.LBB5_19
.LBB5_57:                               # %._crit_edge193
.Ltmp52:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp53:
# %bb.58:
	testl	%eax, %eax
	je	.LBB5_61
# %bb.59:
.Ltmp54:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp55:
# %bb.60:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.5, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB5_61:
	movq	72(%rsp), %rdi
.Ltmp56:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp57:
# %bb.62:
	movq	56(%rsp), %rdi
.Ltmp58:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp59:
# %bb.63:
	movq	88(%rsp), %rdi
.Ltmp60:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp61:
# %bb.64:
	movq	80(%rsp), %rdi
.Ltmp62:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp63:
# %bb.65:
	movq	48(%rsp), %rdi
.Ltmp64:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp65:
# %bb.66:
	movq	104(%rsp), %rdi
.Ltmp66:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp67:
# %bb.67:
	movq	40(%rsp), %rdi
.Ltmp68:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp69:
# %bb.68:
.Ltmp70:
	.cfi_escape 0x2e, 0x00
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	hipFree
.Ltmp71:
# %bb.69:
.Ltmp72:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp73:
# %bb.70:
	testl	%eax, %eax
	je	.LBB5_73
# %bb.71:
.Ltmp74:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp75:
# %bb.72:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.6, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB5_73:
.Ltmp76:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp77:
# %bb.74:
.Ltmp78:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp79:
# %bb.75:
	testl	%eax, %eax
	je	.LBB5_78
# %bb.76:
.Ltmp80:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp81:
# %bb.77:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.7, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB5_78:
	movq	112(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB5_80
# %bb.79:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB5_80:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_81:
	.cfi_def_cfa_offset 192
.Ltmp17:
	jmp	.LBB5_82
.LBB5_89:
.Ltmp82:
	jmp	.LBB5_82
.LBB5_88:
.Ltmp51:
	jmp	.LBB5_82
.LBB5_86:
.Ltmp44:
	jmp	.LBB5_82
.LBB5_87:
.Ltmp39:
	jmp	.LBB5_82
.LBB5_85:
.Ltmp22:
.LBB5_82:
	movq	%rax, %rbx
	movq	112(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB5_84
# %bb.83:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB5_84:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit156
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end5:
	.size	_Z7kmeans4PdiiS_Piiiii, .Lfunc_end5-_Z7kmeans4PdiiS_Piiiii
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table5:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp3-.Lfunc_begin1           #   Call between .Lfunc_begin1 and .Ltmp3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin1           # >> Call Site 2 <<
	.uleb128 .Ltmp16-.Ltmp3                 #   Call between .Ltmp3 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin1          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp18-.Ltmp16                #   Call between .Ltmp16 and .Ltmp18
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp21-.Ltmp18                #   Call between .Ltmp18 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin1          #     jumps to .Ltmp22
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp34-.Ltmp23                #   Call between .Ltmp23 and .Ltmp34
	.uleb128 .Ltmp44-.Lfunc_begin1          #     jumps to .Ltmp44
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp38-.Ltmp35                #   Call between .Ltmp35 and .Ltmp38
	.uleb128 .Ltmp39-.Lfunc_begin1          #     jumps to .Ltmp39
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp40-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Ltmp43-.Ltmp40                #   Call between .Ltmp40 and .Ltmp43
	.uleb128 .Ltmp44-.Lfunc_begin1          #     jumps to .Ltmp44
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp45-.Lfunc_begin1          # >> Call Site 8 <<
	.uleb128 .Ltmp50-.Ltmp45                #   Call between .Ltmp45 and .Ltmp50
	.uleb128 .Ltmp51-.Lfunc_begin1          #     jumps to .Ltmp51
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp52-.Lfunc_begin1          # >> Call Site 9 <<
	.uleb128 .Ltmp81-.Ltmp52                #   Call between .Ltmp52 and .Ltmp81
	.uleb128 .Ltmp82-.Lfunc_begin1          #     jumps to .Ltmp82
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin1          # >> Call Site 10 <<
	.uleb128 .Lfunc_end5-.Ltmp81            #   Call between .Ltmp81 and .Lfunc_end5
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1552
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str.8, %edi
	callq	chdir
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	320(%rbx), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	8(%rsp), %r14
	leaq	12(%rsp), %r15
	movl	$.L.str.11, %esi
	movq	%rax, %rdi
	movq	%r14, %rdx
	movq	%r15, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$100000, (%r14)                 # imm = 0x186A0
	movslq	(%r15), %rax
	imulq	$800000, %rax, %rsi             # imm = 0xC3500
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	(%r14), %esi
	movl	(%r15), %edx
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, (%r14)
	jle	.LBB6_8
# %bb.1:                                # %.lr.ph37.preheader
	xorl	%ebp, %ebp
.LBB6_2:                                # %.lr.ph37
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_6 Depth 2
	imull	$989560465, %ebp, %eax          # imm = 0x3AFB7E91
	rorl	$4, %eax
	cmpl	$429496, %eax                   # imm = 0x68DB8
	ja	.LBB6_4
# %bb.3:                                #   in Loop: Header=BB6_2 Depth=1
	movl	$.L.str.12, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
.LBB6_4:                                #   in Loop: Header=BB6_2 Depth=1
	movl	12(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB6_7
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB6_2 Depth=1
	xorl	%r14d, %r14d
.LBB6_6:                                # %.lr.ph
                                        #   Parent Loop BB6_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebp, %eax
	movslq	%eax, %rdx
	addq	%r14, %rdx
	shlq	$3, %rdx
	addq	32(%rsp), %rdx
	movl	$.L.str.13, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	12(%rsp), %eax
	incq	%r14
	cmpl	%eax, %r14d
	jl	.LBB6_6
.LBB6_7:                                # %._crit_edge
                                        #   in Loop: Header=BB6_2 Depth=1
	movl	$.L.str.14, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incl	%ebp
	cmpl	8(%rsp), %ebp
	jl	.LBB6_2
.LBB6_8:                                # %._crit_edge38
	movq	%rbx, %rdi
	callq	fclose
	movslq	8(%rsp), %rax
	imulq	$274877907, %rax, %rbx          # imm = 0x10624DD3
	movq	%rbx, %rax
	shrq	$63, %rax
	sarq	$38, %rbx
	addl	%eax, %ebx
	movslq	%ebx, %rax
	movslq	12(%rsp), %rsi
	imulq	%rax, %rsi
	shlq	$3, %rsi
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	12(%rsp), %ebp
	movl	%ebp, %eax
	imull	%ebx, %eax
	testl	%eax, %eax
	jle	.LBB6_10
# %bb.9:                                # %.lr.ph41
	movq	24(%rsp), %rdi
	movl	%eax, %edx
	shlq	$3, %rdx
	xorl	%esi, %esi
	callq	memset@PLT
.LBB6_10:                               # %.preheader
	movl	8(%rsp), %esi
	movq	16(%rsp), %r8
	testl	%esi, %esi
	jle	.LBB6_14
# %bb.11:                               # %.lr.ph43.preheader
	xorl	%eax, %eax
.LBB6_12:                               # %.lr.ph43
                                        # =>This Inner Loop Header: Depth=1
	movl	$0, (%r8,%rax,4)
	incq	%rax
	movslq	8(%rsp), %rsi
	cmpq	%rsi, %rax
	jl	.LBB6_12
# %bb.13:                               # %._crit_edge44.loopexit
	movl	12(%rsp), %ebp
.LBB6_14:                               # %._crit_edge44
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rcx
	movl	360(%rsp), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
                                        # kill: def $esi killed $esi killed $rsi
	movl	%ebp, %edx
	movl	%ebx, %r9d
	pushq	$65535                          # imm = 0xFFFF
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	$400                            # imm = 0x190
	.cfi_adjust_cfa_offset 8
	callq	_Z7kmeans4PdiiS_Piiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$.L.str.15, %edi
	movl	$.L.str.16, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	8(%rsp), %edx
	movl	$.L.str.17, %esi
	movq	%rax, %rdi
	xorl	%eax, %eax
	callq	fprintf
	cmpl	$0, 8(%rsp)
	jle	.LBB6_17
# %bb.15:                               # %.lr.ph47.preheader
	xorl	%r14d, %r14d
.LBB6_16:                               # %.lr.ph47
                                        # =>This Inner Loop Header: Depth=1
	movq	16(%rsp), %rax
	movl	(%rax,%r14,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.18, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rax
	movl	(%rax,%r14,4), %edx
	movl	$.L.str.17, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%r14
	movslq	8(%rsp), %rax
	cmpq	%rax, %r14
	jl	.LBB6_16
.LBB6_17:                               # %._crit_edge48
	movq	%rbx, %rdi
	callq	fclose
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIiE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIiE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIiE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIiE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIiE8allocateEmPKv,@function
_ZNSt15__new_allocatorIiE8allocateEmPKv: # @_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB7_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB7_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB7_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB7_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end7:
	.size	_ZNSt15__new_allocatorIiE8allocateEmPKv, .Lfunc_end7-_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16updatebelonging4iPdiiS_PiiPbS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14updateCenters4iPdiiS_iPiS0_S0_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16updatebelonging4iPdiiS_PiiPbS1_,@object # @_Z16updatebelonging4iPdiiS_PiiPbS1_
	.section	.rodata,"a",@progbits
	.globl	_Z16updatebelonging4iPdiiS_PiiPbS1_
	.p2align	3, 0x0
_Z16updatebelonging4iPdiiS_PiiPbS1_:
	.quad	_Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_
	.size	_Z16updatebelonging4iPdiiS_PiiPbS1_, 8

	.type	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_,@object # @_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.globl	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.p2align	3, 0x0
_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_:
	.quad	_Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.size	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_, 8

	.type	_Z14updateCenters4iPdiiS_iPiS0_S0_,@object # @_Z14updateCenters4iPdiiS_iPiS0_S0_
	.globl	_Z14updateCenters4iPdiiS_iPiS0_S0_
	.p2align	3, 0x0
_Z14updateCenters4iPdiiS_iPiS0_S0_:
	.quad	_Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_
	.size	_Z14updateCenters4iPdiiS_iPiS0_S0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"belong CUDA error: %s\n"
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"corresponding  CUDA error: %s\n"
	.size	.L.str.1, 31

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"center update CUDA error: %s\n"
	.size	.L.str.2, 30

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"finished iteration NO. %d\n"
	.size	.L.str.3, 27

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"memcopy free CUDA error: %s\n"
	.size	.L.str.4, 29

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"before free CUDA error: %s\n"
	.size	.L.str.5, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"before CUDA error: %s\n"
	.size	.L.str.6, 23

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"CUDA error: %s\n"
	.size	.L.str.7, 16

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"/home/pitybea/features/"
	.size	.L.str.8, 24

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"task1_features.txt"
	.size	.L.str.9, 19

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"r"
	.size	.L.str.10, 2

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%d %d\n"
	.size	.L.str.11, 7

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"%d\t"
	.size	.L.str.12, 4

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"%lf "
	.size	.L.str.13, 5

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"\n"
	.size	.L.str.14, 2

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"labels.txt"
	.size	.L.str.15, 11

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"w"
	.size	.L.str.16, 2

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"%d\n"
	.size	.L.str.17, 4

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	" "
	.size	.L.str.18, 2

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"cannot create std::vector larger than max_size()"
	.size	.L.str.19, 49

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16updatebelonging4iPdiiS_PiiPbS1_"
	.size	.L__unnamed_1, 36

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_"
	.size	.L__unnamed_2, 42

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z14updateCenters4iPdiiS_iPiS0_S0_"
	.size	.L__unnamed_3, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z31__device_stub__updatebelonging4iPdiiS_PiiPbS1_
	.addrsig_sym _Z32__device_stub__updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.addrsig_sym _Z29__device_stub__updateCenters4iPdiiS_iPiS0_S0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z16updatebelonging4iPdiiS_PiiPbS1_
	.addrsig_sym _Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.addrsig_sym _Z14updateCenters4iPdiiS_iPiS0_S0_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16updatebelonging4iPdiiS_PiiPbS1_ ; -- Begin function _Z16updatebelonging4iPdiiS_PiiPbS1_
	.globl	_Z16updatebelonging4iPdiiS_PiiPbS1_
	.p2align	8
	.type	_Z16updatebelonging4iPdiiS_PiiPbS1_,@function
_Z16updatebelonging4iPdiiS_PiiPbS1_:    ; @_Z16updatebelonging4iPdiiS_PiiPbS1_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_add3_u32 v0, s15, s3, v0
	v_cmpx_gt_i32_e64 s8, v0
	s_cbranch_execz .LBB0_24
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x30
	s_load_b32 s8, s[0:1], 0x28
	v_ashrrev_i32_e32 v1, 31, v0
	v_mov_b32_e32 v4, 0
	s_mov_b32 s10, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	s_cmp_lt_i32 s8, 1
	global_store_b8 v[2:3], v4, off
	s_cbranch_scc1 .LBB0_8
; %bb.2:                                ; %.lr.ph.i.preheader
	s_mov_b32 s10, s8
	s_mov_b64 s[6:7], 0
.LBB0_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b64 s[2:3], s[6:7]
	s_mov_b32 s11, -1
	s_add_u32 s6, s4, s2
	s_addc_u32 s7, s5, s3
	s_mov_b32 s12, -1
	global_load_u8 v5, v4, s[6:7]
                                        ; implicit-def: $sgpr6_sgpr7
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v5
	s_cbranch_vccnz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	s_add_u32 s6, s2, 1
	s_addc_u32 s7, s3, 0
	s_cmp_eq_u32 s8, s6
	s_mov_b32 s11, 0
	s_cselect_b32 s12, -1, 0
.LBB0_5:                                ; %Flow80
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_3
; %bb.6:                                ; %loop.exit.guard
	s_and_b32 vcc_lo, exec_lo, s11
	s_cbranch_vccz .LBB0_8
; %bb.7:                                ; %.lr.ph.i..critedge.i.loopexit_crit_edge
	s_mov_b32 s10, s2
.LBB0_8:                                ; %.critedge.i
	s_load_b64 s[6:7], s[0:1], 0x8
	v_mul_lo_u32 v4, v0, s9
	s_load_b128 s[0:3], s[0:1], 0x18
	s_cmp_gt_i32 s9, 0
	s_cselect_b32 s12, -1, 0
	s_cmp_lt_i32 s9, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	s_mov_b32 s7, 0
	s_cbranch_scc1 .LBB0_11
; %bb.9:                                ; %.lr.ph57.i
	s_mul_i32 s6, s10, s9
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v9, v5
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v8, v4
	s_lshl_b64 s[6:7], s[6:7], 3
	s_mov_b32 s11, s9
	s_add_u32 s6, s0, s6
	s_addc_u32 s7, s1, s7
.LBB0_10:                               ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[10:11], v[8:9], off
	s_load_b64 s[14:15], s[6:7], 0x0
	v_add_co_u32 v8, vcc_lo, v8, 8
	s_add_i32 s11, s11, -1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_add_u32 s6, s6, 8
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s11, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[10:11], s[14:15], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[10:11], v[6:7]
	s_cbranch_scc0 .LBB0_10
	s_branch .LBB0_12
.LBB0_11:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
.LBB0_12:                               ; %.preheader51.i
	v_mov_b32_e32 v12, s10
	s_add_i32 s13, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s13, s8
	s_cbranch_scc1 .LBB0_21
; %bb.13:                               ; %.lr.ph67.i.preheader
	v_mov_b32_e32 v12, s10
	s_mul_i32 s6, s9, s13
	s_mov_b32 s7, 0
.LBB0_14:                               ; %.lr.ph67.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_17 Depth 2
	v_mov_b32_e32 v8, s13
	global_load_u8 v8, v8, s[4:5]
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v8
	s_cbranch_vccnz .LBB0_20
; %bb.15:                               ; %.preheader.i
                                        ;   in Loop: Header=BB0_14 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_18
; %bb.16:                               ; %.lr.ph61.i
                                        ;   in Loop: Header=BB0_14 Depth=1
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v11, v5
	s_lshl_b64 s[10:11], s[6:7], 3
	v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v10, v4
	s_add_u32 s10, s0, s10
	s_addc_u32 s11, s1, s11
	s_mov_b32 s14, s9
.LBB0_17:                               ;   Parent Loop BB0_14 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b64 v[13:14], v[10:11], off
	s_load_b64 s[16:17], s[10:11], 0x0
	v_add_co_u32 v10, vcc_lo, v10, 8
	s_add_i32 s14, s14, -1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_eq_u32 s14, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[13:14], s[16:17], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[8:9], v[13:14], v[13:14], v[8:9]
	s_cbranch_scc0 .LBB0_17
	s_branch .LBB0_19
.LBB0_18:                               ;   in Loop: Header=BB0_14 Depth=1
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
.LBB0_19:                               ; %Flow73
                                        ;   in Loop: Header=BB0_14 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[8:9], v[6:7]
	v_dual_cndmask_b32 v7, v7, v9 :: v_dual_cndmask_b32 v6, v6, v8
	v_cndmask_b32_e64 v12, v12, s13, vcc_lo
.LBB0_20:                               ;   in Loop: Header=BB0_14 Depth=1
	s_add_i32 s13, s13, 1
	s_add_i32 s6, s6, s9
	s_cmp_lt_i32 s13, s8
	s_cbranch_scc1 .LBB0_14
.LBB0_21:                               ; %_Z8minIndexPdS_Pbii.exit
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v12, v4
	s_cbranch_execz .LBB0_23
; %bb.22:
	v_mov_b32_e32 v4, 1
	global_store_b8 v[2:3], v4, off
.LBB0_23:
	s_or_b32 exec_lo, exec_lo, s0
	global_store_b32 v[0:1], v12, off
.LBB0_24:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16updatebelonging4iPdiiS_PiiPbS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16updatebelonging4iPdiiS_PiiPbS1_, .Lfunc_end0-_Z16updatebelonging4iPdiiS_PiiPbS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 744
; NumSgprs: 20
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_ ; -- Begin function _Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.globl	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
	.p2align	8
	.type	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_,@function
_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_: ; @_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
; %bb.0:
	s_clause 0x2
	s_load_b256 s[4:11], s[0:1], 0x10
	s_load_b64 s[2:3], s[0:1], 0x8
	s_load_b256 s[12:19], s[0:1], 0x30
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s18, s10
	s_cmp_gt_i32 s3, 0
	s_mov_b32 s19, s11
	s_cselect_b32 s24, -1, 0
	s_cmp_lt_i32 s3, 1
	global_store_b8 v0, v1, s[16:17]
	s_cbranch_scc1 .LBB1_3
; %bb.1:
	s_mov_b32 s20, s12
	s_mov_b32 s21, s13
	s_mov_b64 s[22:23], s[18:19]
	s_mov_b32 s25, s3
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s25, s25, -1
	s_clause 0x1
	global_store_b32 v0, v0, s[22:23]
	global_store_b32 v0, v0, s[20:21]
	s_add_u32 s22, s22, 4
	s_addc_u32 s23, s23, 0
	s_add_u32 s20, s20, 4
	s_addc_u32 s21, s21, 0
	s_cmp_eq_u32 s25, 0
	s_cbranch_scc0 .LBB1_2
.LBB1_3:                                ; %.preheader60
	s_load_b64 s[0:1], s[0:1], 0x0
	s_cmp_gt_i32 s2, 0
	s_cselect_b32 s22, -1, 0
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB1_8
; %bb.4:                                ; %.lr.ph63.preheader
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[20:21], s[0:1]
	s_mov_b32 s23, s2
.LBB1_5:                                ; %.lr.ph63
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x1
	global_load_b32 v1, v0, s[20:21]
	global_load_u8 v3, v0, s[6:7]
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 1, v4
	global_store_b32 v[1:2], v3, off
	s_cbranch_vccnz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_5 Depth=1
	s_clause 0x1
	global_store_b8 v0, v0, s[16:17]
	global_store_b8 v0, v0, s[6:7]
.LBB1_7:                                ;   in Loop: Header=BB1_5 Depth=1
	s_add_i32 s23, s23, -1
	s_add_u32 s20, s20, 4
	s_addc_u32 s21, s21, 0
	s_add_u32 s6, s6, 1
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s23, 0
	s_cbranch_scc0 .LBB1_5
.LBB1_8:                                ; %._crit_edge
	v_mov_b32_e32 v0, 0
	s_and_not1_b32 vcc_lo, exec_lo, s24
	global_store_b32 v0, v0, s[8:9]
	s_cbranch_vccnz .LBB1_15
; %bb.9:                                ; %.lr.ph66.preheader
	s_mov_b64 s[6:7], 0
	s_mov_b32 s17, 0
	s_mov_b64 s[20:21], s[8:9]
.LBB1_10:                               ; %.lr.ph66
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v1, v0, s[18:19]
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v1
	s_cbranch_vccnz .LBB1_12
; %bb.11:                               ;   in Loop: Header=BB1_10 Depth=1
	s_add_u32 s24, s14, s6
	s_addc_u32 s25, s15, s7
	global_store_b8 v0, v0, s[24:25]
.LBB1_12:                               ;   in Loop: Header=BB1_10 Depth=1
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB1_14
; %bb.13:                               ;   in Loop: Header=BB1_10 Depth=1
	s_add_i32 s16, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[24:25], s[16:17], 2
	s_add_u32 s26, s10, s24
	s_addc_u32 s27, s11, s25
	s_add_u32 s24, s8, s24
	s_addc_u32 s25, s9, s25
	s_clause 0x1
	global_load_b32 v1, v0, s[24:25]
	global_load_b32 v2, v0, s[26:27]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v0, v1, s[20:21]
.LBB1_14:                               ;   in Loop: Header=BB1_10 Depth=1
	s_add_u32 s6, s6, 1
	s_addc_u32 s7, s7, 0
	s_add_u32 s18, s18, 4
	s_addc_u32 s19, s19, 0
	s_add_u32 s20, s20, 4
	s_addc_u32 s21, s21, 0
	s_cmp_eq_u32 s3, s6
	s_cbranch_scc0 .LBB1_10
.LBB1_15:                               ; %.preheader
	s_and_not1_b32 vcc_lo, exec_lo, s22
	s_cbranch_vccnz .LBB1_18
; %bb.16:                               ; %.lr.ph68.preheader
	v_mov_b32_e32 v0, 0
	s_mov_b32 s3, 0
.LBB1_17:                               ; %.lr.ph68
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[0:1]
	v_mov_b32_e32 v5, s3
	s_add_i32 s3, s3, 1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s2, s3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s12, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s13, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_store_b32 v[3:4], v5, off
	global_load_b32 v3, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 1, v3
	global_store_b32 v[1:2], v3, off
	s_cbranch_scc0 .LBB1_17
.LBB1_18:                               ; %._crit_edge69
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 72
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_, .Lfunc_end1-_Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 692
; NumSgprs: 30
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14updateCenters4iPdiiS_iPiS0_S0_ ; -- Begin function _Z14updateCenters4iPdiiS_iPiS0_S0_
	.globl	_Z14updateCenters4iPdiiS_iPiS0_S0_
	.p2align	8
	.type	_Z14updateCenters4iPdiiS_iPiS0_S0_,@function
_Z14updateCenters4iPdiiS_iPiS0_S0_:     ; @_Z14updateCenters4iPdiiS_iPiS0_S0_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x0
	s_load_b32 s4, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_add3_u32 v2, s15, s3, v0
	v_cmpx_gt_i32_e64 s4, v2
	s_cbranch_execz .LBB2_10
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x38
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v9, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 0, v9
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_10
; %bb.2:                                ; %.preheader41
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x14
	s_load_b128 s[4:7], s[0:1], 0x28
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v2, v2, s8
	s_cmp_gt_i32 s8, 0
	s_cselect_b32 s9, -1, 0
	s_cmp_lt_i32 s8, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_cbranch_scc1 .LBB2_5
; %bb.3:                                ; %.lr.ph
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 3, v[2:3]
	v_mov_b32_e32 v6, 0
	s_mov_b32 s10, s8
	v_add_co_u32 v4, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
.LBB2_4:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v7, v6
	s_add_i32 s10, s10, -1
	s_cmp_eq_u32 s10, 0
	global_store_b64 v[4:5], v[6:7], off
	v_add_co_u32 v4, vcc_lo, v4, 8
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_cbranch_scc0 .LBB2_4
.LBB2_5:                                ; %.lr.ph46
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_load_b64 s[0:1], s[0:1], 0x8
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	global_load_b32 v8, v[0:1], off
	v_cvt_f64_i32_e32 v[0:1], v9
	v_max_i32_e32 v9, 1, v9
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_mov_b32 s2, 0
	s_mov_b32 s3, 0
.LBB2_6:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_8 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB2_9
; %bb.7:                                ; %.lr.ph44
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, v3 :: v_dual_add_nc_u32 v4, s3, v8
	v_mov_b32_e32 v6, v2
	s_mov_b32 s6, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v4, v4, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB2_8:                                ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b64 v[10:11], v[4:5], off
	global_load_b64 v[16:17], v[6:7], off
	s_add_i32 s6, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s6, 0
	s_waitcnt vmcnt(1)
	v_div_scale_f64 v[12:13], null, v[0:1], v[0:1], v[10:11]
	v_div_scale_f64 v[20:21], vcc_lo, v[10:11], v[0:1], v[10:11]
	v_rcp_f64_e32 v[14:15], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_fma_f64 v[18:19], -v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_mul_f64 v[18:19], v[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[12:13], v[18:19], v[20:21]
	v_div_fmas_f64 v[12:13], v[12:13], v[14:15], v[18:19]
	v_add_co_u32 v4, vcc_lo, v4, 8
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[10:11], v[12:13], v[0:1], v[10:11]
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[16:17], v[10:11]
	global_store_b64 v[6:7], v[10:11], off
	v_add_co_u32 v6, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_cbranch_scc0 .LBB2_8
.LBB2_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s3, v9
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_6
.LBB2_10:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14updateCenters4iPdiiS_iPiS0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z14updateCenters4iPdiiS_iPiS0_S0_, .Lfunc_end2-_Z14updateCenters4iPdiiS_iPiS0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 680
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16updatebelonging4iPdiiS_PiiPbS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z16updatebelonging4iPdiiS_PiiPbS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 72
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     30
    .sgpr_spill_count: 0
    .symbol:         _Z17updateCorrespondsPiiiS_PbS_S_S_S0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14updateCenters4iPdiiS_iPiS0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14updateCenters4iPdiiS_iPiS0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
