extern "C"
__global__ void find_reduce_point(char *nodes, int node_count, int count, int threads, int blocks,  int *out)
{
	char TERMINAL = 0;
	char NETERMINAL = 1;
	char NONE = 0xf;
	
	int TYPE_INDEX = 0;
	int MODEL_INDEX = 1;
	int CHILD_INDEX = 2;
	int VALUE_INDEX = 3;
	
	int NODE_SIZE = 11;
	
	int node_offset = count * NODE_SIZE;
	int tid = blockIdx.x * threads + threadIdx.x;
	
	while (tid < count) {
		int start_pos = tid * NODE_SIZE;
		int child = 0;
		int actual = start_pos;
		
		if (nodes[start_pos + TYPE_INDEX] == TERMINAL) {
			out[tid] = 0;
		} 

		for (int i = start_pos + node_offset; i < (node_offset * node_count); i += node_offset) {
			if (nodes[i + TYPE_INDEX] == TERMINAL)
				child++;
			else if (nodes[i + TYPE_INDEX] == NETERMINAL) {
				child = 0;
				actual = i;
			} else {
				continue;
			}	

			if (child == nodes[actual + CHILD_INDEX]) {
				out[tid] = (actual / NODE_SIZE / count);
				break;	
			}
		}
		
		tid += threads * blocks;
	}
	__syncthreads();
}
	.file	"tmpxft_00257e3b_00000000-6_evaluate.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z43__device_stub__Z17find_reduce_pointPciiiiPiPciiiiPi
	.type	_Z43__device_stub__Z17find_reduce_pointPciiiiPiPciiiiPi, @function
_Z43__device_stub__Z17find_reduce_pointPciiiiPiPciiiiPi:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	find_reduce_point(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z43__device_stub__Z17find_reduce_pointPciiiiPiPciiiiPi, .-_Z43__device_stub__Z17find_reduce_pointPciiiiPiPciiiiPi
	.globl	find_reduce_point
	.type	find_reduce_point, @function
find_reduce_point:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z17find_reduce_pointPciiiiPiPciiiiPi
	.cfi_endproc
.LFE2033:
	.size	find_reduce_point, .-find_reduce_point
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"find_reduce_point"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	find_reduce_point(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
extern "C"
__global__ void find_reduce_point(char *nodes, int node_count, int count, int threads, int blocks,  int *out)
{
	char TERMINAL = 0;
	char NETERMINAL = 1;
	char NONE = 0xf;
	
	int TYPE_INDEX = 0;
	int MODEL_INDEX = 1;
	int CHILD_INDEX = 2;
	int VALUE_INDEX = 3;
	
	int NODE_SIZE = 11;
	
	int node_offset = count * NODE_SIZE;
	int tid = blockIdx.x * threads + threadIdx.x;
	
	while (tid < count) {
		int start_pos = tid * NODE_SIZE;
		int child = 0;
		int actual = start_pos;
		
		if (nodes[start_pos + TYPE_INDEX] == TERMINAL) {
			out[tid] = 0;
		} 

		for (int i = start_pos + node_offset; i < (node_offset * node_count); i += node_offset) {
			if (nodes[i + TYPE_INDEX] == TERMINAL)
				child++;
			else if (nodes[i + TYPE_INDEX] == NETERMINAL) {
				child = 0;
				actual = i;
			} else {
				continue;
			}	

			if (child == nodes[actual + CHILD_INDEX]) {
				out[tid] = (actual / NODE_SIZE / count);
				break;	
			}
		}
		
		tid += threads * blocks;
	}
	__syncthreads();
}
	.text
	.file	"evaluate.hip"
	.globl	__device_stub__find_reduce_point # -- Begin function __device_stub__find_reduce_point
	.type	__device_stub__find_reduce_point,@function
__device_stub__find_reduce_point:       # @__device_stub__find_reduce_point
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$find_reduce_point, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__find_reduce_point, .Lfunc_end0-__device_stub__find_reduce_point
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$find_reduce_point, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	find_reduce_point,@object       # @find_reduce_point
	.section	.rodata,"a",@progbits
	.globl	find_reduce_point
	.p2align	3, 0x0
find_reduce_point:
	.quad	__device_stub__find_reduce_point
	.size	find_reduce_point, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"find_reduce_point"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__find_reduce_point
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym find_reduce_point
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	find_reduce_point       ; -- Begin function find_reduce_point
	.globl	find_reduce_point
	.p2align	8
	.type	find_reduce_point,@function
find_reduce_point:                      ; @find_reduce_point
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x8
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s15, s15, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s15, v0
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB0_20
; %bb.1:                                ; %.lr.ph57
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x18
	v_add3_u32 v0, s15, s5, v0
	s_mul_i32 s10, s5, 11
	s_mul_i32 s6, s7, s6
	s_mul_i32 s4, s10, s4
	s_mov_b32 s7, 0
	v_mul_lo_u32 v0, v0, 11
	s_mul_i32 s15, s6, 11
	v_mov_b32_e32 v12, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s1, s2, 2
	s_addc_u32 s12, s3, 0
	s_ashr_i32 s13, s5, 31
	s_ashr_i32 s16, s10, 31
	s_add_i32 s0, s5, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s14, s0, s13
	v_cvt_f32_u32_e32 v2, s14
	s_sub_i32 s0, 0, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s0, v2
	v_mul_hi_u32 v5, v2, v3
	v_mad_u64_u32 v[3:4], null, v1, 11, s[10:11]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v2, v5
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	v_mul_lo_u32 v5, v1, 11
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v5
	v_add_co_u32 v6, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v2, vcc_lo
	global_load_u8 v2, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u16_e32 0, v2
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_co_u32 v6, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	global_store_b32 v[6:7], v12, off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v2, s10, v5
	v_ashrrev_i32_e32 v4, 31, v3
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s4, v2
	s_cbranch_execz .LBB0_19
; %bb.5:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v13, 0 :: v_dual_mov_b32 v2, v0
	v_dual_mov_b32 v8, v4 :: v_dual_mov_b32 v7, v3
	s_mov_b32 s18, 0
                                        ; implicit-def: $sgpr19
                                        ; implicit-def: $sgpr20
.LBB0_6:                                ; %NodeBlock
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v8, vcc_lo
	s_mov_b32 s21, 0
	s_mov_b32 s0, 0
	s_mov_b32 s22, exec_lo
	global_load_u8 v4, v[9:10], off
                                        ; implicit-def: $sgpr23
                                        ; implicit-def: $vgpr9_vgpr10
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i16_e32 0, v4
	s_xor_b32 s22, exec_lo, s22
	s_cbranch_execz .LBB0_10
; %bb.7:                                ; %LeafBlock
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s0, -1
	s_mov_b32 s24, exec_lo
                                        ; implicit-def: $sgpr23
	v_cmpx_eq_u16_e32 1, v4
; %bb.8:                                ; %.lr.ph._crit_edge
                                        ;   in Loop: Header=BB0_6 Depth=2
	v_mov_b32_e32 v5, v7
	s_mov_b32 s21, exec_lo
	s_mov_b32 s23, 0
	s_xor_b32 s0, exec_lo, -1
                                        ; implicit-def: $vgpr13
; %bb.9:                                ; %Flow85
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_and_b32 s0, s0, exec_lo
	s_and_b32 s21, s21, exec_lo
.LBB0_10:                               ; %Flow84
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_saveexec_b32 s22, s22
	v_mov_b32_e32 v4, s23
	s_xor_b32 exec_lo, exec_lo, s22
; %bb.11:                               ;   in Loop: Header=BB0_6 Depth=2
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_nc_u32_e32 v4, 1, v13
	s_or_b32 s21, s21, exec_lo
                                        ; implicit-def: $vgpr13
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v10, v6 :: v_dual_mov_b32 v9, v5
; %bb.12:                               ; %Flow86
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
                                        ; implicit-def: $sgpr23
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v9, vcc_lo, s1, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s12, v10, vcc_lo
	v_mov_b32_e32 v13, v4
	s_and_not1_b32 s0, s0, exec_lo
	s_mov_b32 s23, -1
	global_load_i8 v6, v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v4, v6
	s_and_b32 s21, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s21
.LBB0_14:                               ; %Flow87
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s20, s20, exec_lo
	s_and_b32 s22, s23, exec_lo
	s_mov_b32 s21, -1
	s_or_b32 s20, s20, s22
	s_and_saveexec_b32 s22, s0
; %bb.15:                               ;   in Loop: Header=BB0_6 Depth=2
	v_add_nc_u32_e32 v2, s10, v2
	v_add_co_u32 v7, s0, v7, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, s16, v8, s0
	v_cmp_le_i32_e32 vcc_lo, s4, v2
	s_and_not1_b32 s20, s20, exec_lo
	s_or_not1_b32 s21, vcc_lo, exec_lo
; %bb.16:                               ; %Flow88
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s21
	s_or_b32 s18, s0, s18
	s_and_not1_b32 s0, s19, exec_lo
	s_and_b32 s19, s20, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s19, s0, s19
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB0_6
; %bb.17:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	s_and_saveexec_b32 s0, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_19
; %bb.18:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mul_hi_i32 v2, 0x2e8ba2e9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 31, v2
	v_ashrrev_i32_e32 v2, 1, v2
	v_add_nc_u32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v2
	v_add_nc_u32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v4
	v_mul_hi_u32 v5, v2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v5, s14
	v_sub_nc_u32_e32 v2, v2, v6
	v_add_nc_u32_e32 v6, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v7, s14, v2
	v_cmp_le_u32_e32 vcc_lo, s14, v2
	v_dual_cndmask_b32 v5, v5, v6 :: v_dual_cndmask_b32 v2, v2, v7
	v_xor_b32_e32 v7, s13, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, 1, v5
	v_cmp_le_u32_e32 vcc_lo, s14, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v5, v6, vcc_lo
	v_xor_b32_e32 v6, v4, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_sub_nc_u32_e32 v2, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	global_store_b32 v[4:5], v2, off
.LBB0_19:                               ; %Flow89
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	v_add_nc_u32_e32 v1, s6, v1
	v_add_nc_u32_e32 v3, s15, v3
	v_add_nc_u32_e32 v0, s15, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s5, v1
	s_or_b32 s7, vcc_lo, s7
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_2
.LBB0_20:                               ; %Flow91
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel find_reduce_point
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 25
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	find_reduce_point, .Lfunc_end0-find_reduce_point
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 900
; NumSgprs: 27
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 27
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           find_reduce_point
    .private_segment_fixed_size: 0
    .sgpr_count:     27
    .sgpr_spill_count: 0
    .symbol:         find_reduce_point.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
