/*
	The program takes an array as input, multiply the elements with 2 and stores the output in another array.
	For the array size less than 4000, CPU runs faster than GPU and then GPU takes over CPU's performance.
*/

#include <iostream>
#include <stdio.h>
#include <cuda.h>
#include <sys/time.h>

__global__ void vecMult_d (int *A, int *B, int N)
{
	int i = blockIdx.x * blockDim.x + threadIdx.x ;
	if  (i  <  N)
	{
		B [i] = A [i] * 2;
	}
}

void vecMult_h(int *A, int *B, int N)
{
	for (int i  =0 ; i < N; i++)
	{
		B[i] = A [i] * 2;
	}
}

int main()
{
	int *a_h, *b_h;
	int *a_d, *b_d;
	int blocksize = 512, n;
	struct timeval t1_start, t1_end, t2_start, t2_end;
	double time_d, time_h;
	remove ("gpuresult");
	remove ("cpuresult");
	FILE *fp1, *fp2;
	fp1 = fopen ("gpuresult", "a+");
	fp2 = fopen ("cpuresult", "a+");

	for (n = 0; n < 8000; n += 1)
	{
		a_h = (int *)malloc(sizeof(int)*n);
		b_h = (int *)malloc(sizeof(int)*n);

		cudaMalloc ((void **) &a_d, n * sizeof (int));
		cudaMalloc ((void **) &b_d, n * sizeof (int));
		dim3 dimBlock (blocksize);
		dim3 dimGrid (ceil (float (n) / float (dimBlock.x)));

		for (int j = 0; j < n; j++)
			a_h [j] = j;

		cudaMemcpy (a_d, a_h, n * sizeof (int), cudaMemcpyHostToDevice);
		gettimeofday (&t1_start, 0);
		vecMult_d <<<dimGrid, dimBlock>>> (a_d, b_d, n);
		cudaThreadSynchronize ();
		gettimeofday (&t1_end, 0);
		cudaMemcpy (b_h, b_d, n * sizeof (int), cudaMemcpyDeviceToHost);

		gettimeofday (&t2_start, 0);
		vecMult_h (a_h, b_h, n);
		gettimeofday (&t2_end, 0);

		time_d = (t1_end.tv_sec-t1_start.tv_sec) * 1000000 + t1_end.tv_usec - t1_start.tv_usec;
		time_h = (t2_end.tv_sec-t2_start.tv_sec) * 1000000 + t2_end.tv_usec - t2_start.tv_usec;

		fprintf (fp1, "%d\t%lf\t\n", n, time_d);
		fprintf (fp2, "%d\t%lf\t\n", n, time_h);
		free (a_h);
		free (b_h);
		cudaFree (a_d);
		cudaFree (b_d);
	}
	return (0);
}

	.file	"tmpxft_0037f2e9_00000000-6_benchmark2.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9vecMult_hPiS_i
	.type	_Z9vecMult_hPiS_i, @function
_Z9vecMult_hPiS_i:
.LFB3635:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %edx
	jle	.L6
	movl	(%rdi,%rax,4), %ecx
	addl	%ecx, %ecx
	movl	%ecx, (%rsi,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z9vecMult_hPiS_i, .-_Z9vecMult_hPiS_i
	.globl	_Z31__device_stub__Z9vecMult_dPiS_iPiS_i
	.type	_Z31__device_stub__Z9vecMult_dPiS_iPiS_i, @function
_Z31__device_stub__Z9vecMult_dPiS_iPiS_i:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9vecMult_dPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L7:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z31__device_stub__Z9vecMult_dPiS_iPiS_i, .-_Z31__device_stub__Z9vecMult_dPiS_iPiS_i
	.globl	_Z9vecMult_dPiS_i
	.type	_Z9vecMult_dPiS_i, @function
_Z9vecMult_dPiS_i:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9vecMult_dPiS_iPiS_i
	.cfi_endproc
.LFE3662:
	.size	_Z9vecMult_dPiS_i, .-_Z9vecMult_dPiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"gpuresult"
.LC1:
	.string	"cpuresult"
.LC2:
	.string	"a+"
.LC4:
	.string	"%d\t%lf\t\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC0(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r12, %rdi
	leaq	.LC2(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	.LC1(%rip), %rbx
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	remove@PLT
	movq	%rbx, %rdi
	call	remove@PLT
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	fopen@PLT
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	xorl	%ebx, %ebx
	movq	%rax, %r15
	call	fopen@PLT
	movq	%rax, %r14
.L16:
	leaq	0(,%rbx,4), %r12
	movl	%ebx, %r13d
	movq	%r12, %rdi
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC3(%rip), %xmm0
	movl	$1, 36(%rsp)
	movl	$1, 40(%rsp)
	call	ceilf@PLT
	cvttss2siq	%xmm0, %rax
	movl	%eax, 44(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	xorl	%eax, %eax
.L13:
	cmpl	%ebx, %eax
	jge	.L20
	movl	%eax, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L13
.L20:
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	leaq	56(%rsp), %rdi
	call	gettimeofday@PLT
	movl	40(%rsp), %ecx
	movl	52(%rsp), %esi
	xorl	%r9d, %r9d
	movl	$512, 32(%rsp)
	movq	44(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%r13d, %edx
	call	_Z31__device_stub__Z9vecMult_dPiS_iPiS_i
.L15:
	call	cudaThreadSynchronize@PLT
	leaq	72(%rsp), %rdi
	xorl	%esi, %esi
	incq	%rbx
	call	gettimeofday@PLT
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	leaq	.LC4(%rip), %r12
	call	cudaMemcpy@PLT
	leaq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	(%rsp), %rsi
	movl	%r13d, %edx
	movq	%rbp, %rdi
	call	_Z9vecMult_hPiS_i
	leaq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	104(%rsp), %rax
	movl	%r13d, %ecx
	movq	%r12, %rdx
	subq	88(%rsp), %rax
	movl	$2, %esi
	movq	%r15, %rdi
	imulq	$1000000, %rax, %rax
	addq	112(%rsp), %rax
	subq	96(%rsp), %rax
	cvtsi2sdq	%rax, %xmm1
	movq	72(%rsp), %rax
	subq	56(%rsp), %rax
	imulq	$1000000, %rax, %rax
	addq	80(%rsp), %rax
	subq	64(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	movsd	%xmm1, 8(%rsp)
	call	__fprintf_chk@PLT
	movsd	8(%rsp), %xmm0
	movl	%r13d, %ecx
	movb	$1, %al
	movq	%r12, %rdx
	movl	$2, %esi
	movq	%r14, %rdi
	call	__fprintf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	cmpq	$8000, %rbx
	jne	.L16
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z9vecMult_dPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9vecMult_dPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	989855744
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
	The program takes an array as input, multiply the elements with 2 and stores the output in another array.
	For the array size less than 4000, CPU runs faster than GPU and then GPU takes over CPU's performance.
*/

#include <iostream>
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <sys/time.h>

__global__ void vecMult_d (int *A, int *B, int N)
{
	int i = blockIdx.x * blockDim.x + threadIdx.x ;
	if  (i  <  N)
	{
		B [i] = A [i] * 2;
	}
}

void vecMult_h(int *A, int *B, int N)
{
	for (int i  =0 ; i < N; i++)
	{
		B[i] = A [i] * 2;
	}
}

int main()
{
	int *a_h, *b_h;
	int *a_d, *b_d;
	int blocksize = 512, n;
	struct timeval t1_start, t1_end, t2_start, t2_end;
	double time_d, time_h;
	remove ("gpuresult");
	remove ("cpuresult");
	FILE *fp1, *fp2;
	fp1 = fopen ("gpuresult", "a+");
	fp2 = fopen ("cpuresult", "a+");

	for (n = 0; n < 8000; n += 1)
	{
		a_h = (int *)malloc(sizeof(int)*n);
		b_h = (int *)malloc(sizeof(int)*n);

		hipMalloc ((void **) &a_d, n * sizeof (int));
		hipMalloc ((void **) &b_d, n * sizeof (int));
		dim3 dimBlock (blocksize);
		dim3 dimGrid (ceil (float (n) / float (dimBlock.x)));

		for (int j = 0; j < n; j++)
			a_h [j] = j;

		hipMemcpy (a_d, a_h, n * sizeof (int), hipMemcpyHostToDevice);
		gettimeofday (&t1_start, 0);
		vecMult_d <<<dimGrid, dimBlock>>> (a_d, b_d, n);
		hipDeviceSynchronize ();
		gettimeofday (&t1_end, 0);
		hipMemcpy (b_h, b_d, n * sizeof (int), hipMemcpyDeviceToHost);

		gettimeofday (&t2_start, 0);
		vecMult_h (a_h, b_h, n);
		gettimeofday (&t2_end, 0);

		time_d = (t1_end.tv_sec-t1_start.tv_sec) * 1000000 + t1_end.tv_usec - t1_start.tv_usec;
		time_h = (t2_end.tv_sec-t2_start.tv_sec) * 1000000 + t2_end.tv_usec - t2_start.tv_usec;

		fprintf (fp1, "%d\t%lf\t\n", n, time_d);
		fprintf (fp2, "%d\t%lf\t\n", n, time_h);
		free (a_h);
		free (b_h);
		hipFree (a_d);
		hipFree (b_d);
	}
	return (0);
}

	.text
	.file	"benchmark2.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__vecMult_dPiS_i # -- Begin function _Z24__device_stub__vecMult_dPiS_i
	.type	_Z24__device_stub__vecMult_dPiS_i,@function
_Z24__device_stub__vecMult_dPiS_i:      # @_Z24__device_stub__vecMult_dPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9vecMult_dPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__vecMult_dPiS_i, .Lfunc_end0-_Z24__device_stub__vecMult_dPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z9vecMult_hPiS_i               # -- Begin function _Z9vecMult_hPiS_i
	.type	_Z9vecMult_hPiS_i,@function
_Z9vecMult_hPiS_i:                      # @_Z9vecMult_hPiS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rdi,%rcx,4), %edx
	addl	%edx, %edx
	movl	%edx, (%rsi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z9vecMult_hPiS_i, .Lfunc_end1-_Z9vecMult_hPiS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movl	$.L.str, %edi
	callq	remove
	movl	$.L.str.1, %edi
	callq	remove
	movl	$.L.str, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%r15d, %r15d
	leaq	512(%rbx), %r12
.LBB2_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
                                        #     Child Loop BB2_8 Depth 2
	leaq	(,%r15,4), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rsp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r15d, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	testq	%r15, %r15
	je	.LBB2_4
# %bb.2:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_1 Depth=1
	xorl	%eax, %eax
.LBB2_3:                                # %.lr.ph
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%eax, (%rbp,%rax,4)
	incq	%rax
	cmpq	%rax, %r15
	jne	.LBB2_3
.LBB2_4:                                # %._crit_edge
                                        #   in Loop: Header=BB2_1 Depth=1
	cvttss2si	%xmm0, %rax
	movl	%eax, %r14d
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r14
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	88(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_1 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r15d, %edx
	callq	_Z24__device_stub__vecMult_dPiS_i
.LBB2_6:                                #   in Loop: Header=BB2_1 Depth=1
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rsp), %rsi
	movq	%r13, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	testq	%r15, %r15
	je	.LBB2_9
# %bb.7:                                # %.lr.ph.i.preheader
                                        #   in Loop: Header=BB2_1 Depth=1
	xorl	%eax, %eax
.LBB2_8:                                # %.lr.ph.i
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbp,%rax,4), %ecx
	addl	%ecx, %ecx
	movl	%ecx, (%r13,%rax,4)
	incq	%rax
	cmpq	%rax, %r15
	jne	.LBB2_8
.LBB2_9:                                # %_Z9vecMult_hPiS_i.exit
                                        #   in Loop: Header=BB2_1 Depth=1
	leaq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	72(%rsp), %rax
	subq	88(%rsp), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	addq	80(%rsp), %rax
	subq	96(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	movq	40(%rsp), %rax
	subq	56(%rsp), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	addq	48(%rsp), %rax
	subq	64(%rsp), %rax
	cvtsi2sd	%rax, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movl	$.L.str.3, %esi
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	%r15d, %edx
	movb	$1, %al
	callq	fprintf
	movl	$.L.str.3, %esi
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movl	%r15d, %edx
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	fprintf
	movq	%rbp, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	incq	%r15
	cmpq	$8000, %r15                     # imm = 0x1F40
	jne	.LBB2_1
# %bb.10:
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9vecMult_dPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9vecMult_dPiS_i,@object       # @_Z9vecMult_dPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z9vecMult_dPiS_i
	.p2align	3, 0x0
_Z9vecMult_dPiS_i:
	.quad	_Z24__device_stub__vecMult_dPiS_i
	.size	_Z9vecMult_dPiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"gpuresult"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"cpuresult"
	.size	.L.str.1, 10

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"a+"
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d\t%lf\t\n"
	.size	.L.str.3, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9vecMult_dPiS_i"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__vecMult_dPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9vecMult_dPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9vecMult_dPiS_i       ; -- Begin function _Z9vecMult_dPiS_i
	.globl	_Z9vecMult_dPiS_i
	.p2align	8
	.type	_Z9vecMult_dPiS_i,@function
_Z9vecMult_dPiS_i:                      ; @_Z9vecMult_dPiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v2, 1, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9vecMult_dPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9vecMult_dPiS_i, .Lfunc_end0-_Z9vecMult_dPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9vecMult_dPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9vecMult_dPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
