#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <time.h>

#define OPERATOR *
#define OPERATOR_NAME "multiplication"

#define DTYPE float

void random_ints(int* a, int N)
{
   int i;
   for (i = 0; i < N; ++i)
    a[i] = rand();
}

void random_floats(float* a, int N)
{
    for (int i = 0; i < N; ++i)
        a[i] = (float)rand()/(float)(RAND_MAX/a[i]);
}

__global__ void add_gpu_blocks(DTYPE *a, DTYPE *b, DTYPE *c) {
    c[blockIdx.x] = a[blockIdx.x] OPERATOR b[blockIdx.x];
}

__global__ void add_gpu_threads(DTYPE *a, DTYPE *b, DTYPE *c) {
    c[threadIdx.x] = a[threadIdx.x] OPERATOR b[threadIdx.x];
}

void add_cpu(DTYPE *a, DTYPE *b, DTYPE *c, int size) {
    for (int i=0; i<size; ++i)
        c[i] = a[i] OPERATOR b[i];
}

#define N (int)10e7

int main(void) {

    int device;
    cudaGetDevice(&device);

    struct cudaDeviceProp props;
    cudaGetDeviceProperties(&props, device);

    printf("Using %s.\n\n", props.name);

    DTYPE *a, *b, *c; // host copies of a, b, c
    DTYPE *d_a, *d_b, *d_c; // device copies of a, b, c
    int size = N*sizeof(DTYPE);

    // Allocate space for device copies of a, b, c
    cudaMalloc((void **)&d_a, size);
    cudaMalloc((void **)&d_b, size);
    cudaMalloc((void **)&d_c, size);

    // Alloc space for host copies of a, b, c and setup input values
    a = (DTYPE *)malloc(size); random_floats(a, N);
    b = (DTYPE *)malloc(size); random_floats(b, N);
    c = (DTYPE *)malloc(size);

    printf("Calculating vector %s with %d elements...\n", OPERATOR_NAME, N);

    clock_t t_cpu;
    t_cpu = clock();
    add_cpu(a, b, c, N);
    t_cpu = clock() - t_cpu;
    double time_taken_cpu = 1000*((double)t_cpu)/CLOCKS_PER_SEC; // in micro-second
    printf("CPU: %.2fms\n", time_taken_cpu);

    // Calculate the time taken by calculation
    clock_t t_gpu;
    t_gpu = clock();

    // Copy inputs to device
    cudaMemcpy(d_a, a, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, b, size, cudaMemcpyHostToDevice);

    // Launch add() kernel on GPU
    add_gpu_blocks<<<N,1>>>(d_a, d_b, d_c);
    
    // Copy result back to host
    cudaMemcpy(c, d_c, size, cudaMemcpyDeviceToHost);

    t_gpu = clock() - t_gpu;
    double time_taken_gpu = 1000*((double)t_gpu)/CLOCKS_PER_SEC; // in micro-second

    printf("GPU (blocks): %.2fms.\n", time_taken_gpu);

    // ------------------------------------------------

    // Calculate the time taken by calculation
    clock_t t_gpu_2;
    t_gpu_2 = clock();

    // Copy inputs to device
    cudaMemcpy(d_a, a, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, b, size, cudaMemcpyHostToDevice);

    // Launch add() kernel on GPU
    add_gpu_threads<<<1,N>>>(d_a, d_b, d_c);
    
    // Copy result back to host
    cudaMemcpy(c, d_c, size, cudaMemcpyDeviceToHost);

    t_gpu_2 = clock() - t_gpu_2;
    double time_taken_gpu_2 = 1000*((double)t_gpu_2)/CLOCKS_PER_SEC; // in micro-second

    printf("GPU (threads): %.2fms.\n", time_taken_gpu_2);

    // Cleanup
    cudaFree(d_a); cudaFree(d_b); cudaFree(d_c);
    return 0;
}
	.file	"tmpxft_003b0054_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11random_intsPii
	.type	_Z11random_intsPii, @function
_Z11random_intsPii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	movl	%eax, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11random_intsPii, .-_Z11random_intsPii
	.globl	_Z13random_floatsPfi
	.type	_Z13random_floatsPfi, @function
_Z13random_floatsPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L9:
	cmpl	%ebx, %r12d
	jle	.L12
	call	rand@PLT
	movss	.LC0(%rip), %xmm1
	divss	0(%rbp,%rbx,4), %xmm1
	cvtsi2ssl	%eax, %xmm0
	divss	%xmm1, %xmm0
	movss	%xmm0, 0(%rbp,%rbx,4)
	incq	%rbx
	jmp	.L9
.L12:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z13random_floatsPfi, .-_Z13random_floatsPfi
	.globl	_Z7add_cpuPfS_S_i
	.type	_Z7add_cpuPfS_S_i, @function
_Z7add_cpuPfS_S_i:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L14:
	cmpl	%eax, %ecx
	jle	.L16
	movss	(%rdi,%rax,4), %xmm0
	mulss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L14
.L16:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z7add_cpuPfS_S_i, .-_Z7add_cpuPfS_S_i
	.globl	_Z38__device_stub__Z14add_gpu_blocksPfS_S_PfS_S_
	.type	_Z38__device_stub__Z14add_gpu_blocksPfS_S_PfS_S_, @function
_Z38__device_stub__Z14add_gpu_blocksPfS_S_PfS_S_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14add_gpu_blocksPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L17:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z38__device_stub__Z14add_gpu_blocksPfS_S_PfS_S_, .-_Z38__device_stub__Z14add_gpu_blocksPfS_S_PfS_S_
	.globl	_Z14add_gpu_blocksPfS_S_
	.type	_Z14add_gpu_blocksPfS_S_, @function
_Z14add_gpu_blocksPfS_S_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14add_gpu_blocksPfS_S_PfS_S_
	.cfi_endproc
.LFE2056:
	.size	_Z14add_gpu_blocksPfS_S_, .-_Z14add_gpu_blocksPfS_S_
	.globl	_Z39__device_stub__Z15add_gpu_threadsPfS_S_PfS_S_
	.type	_Z39__device_stub__Z15add_gpu_threadsPfS_S_PfS_S_, @function
_Z39__device_stub__Z15add_gpu_threadsPfS_S_PfS_S_:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15add_gpu_threadsPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L22:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z39__device_stub__Z15add_gpu_threadsPfS_S_PfS_S_, .-_Z39__device_stub__Z15add_gpu_threadsPfS_S_PfS_S_
	.globl	_Z15add_gpu_threadsPfS_S_
	.type	_Z15add_gpu_threadsPfS_S_, @function
_Z15add_gpu_threadsPfS_S_:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15add_gpu_threadsPfS_S_PfS_S_
	.cfi_endproc
.LFE2058:
	.size	_Z15add_gpu_threadsPfS_S_, .-_Z15add_gpu_threadsPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Using %s.\n\n"
.LC2:
	.string	"multiplication"
.LC3:
	.string	"Calculating vector %s with %d elements...\n"
.LC6:
	.string	"CPU: %.2fms\n"
.LC7:
	.string	"GPU (blocks): %.2fms.\n"
.LC8:
	.string	"GPU (threads): %.2fms.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1112, %rsp
	.cfi_def_cfa_offset 1152
	movq	%fs:40, %rax
	movq	%rax, 1096(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	leaq	64(%rsp), %rbx
	call	cudaGetDevice@PLT
	movl	12(%rsp), %esi
	movq	%rbx, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
	leaq	16(%rsp), %rdi
	movl	$400000000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$400000000, %esi
	call	cudaMalloc@PLT
	movl	$400000000, %esi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$400000000, %edi
	call	malloc@PLT
	movl	$100000000, %esi
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	_Z13random_floatsPfi
	movl	$400000000, %edi
	call	malloc@PLT
	movl	$100000000, %esi
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	_Z13random_floatsPfi
	movl	$400000000, %edi
	call	malloc@PLT
	movl	$100000000, %ecx
	movl	$2, %edi
	leaq	.LC2(%rip), %rdx
	leaq	.LC3(%rip), %rsi
	movq	%rax, %r12
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movl	$100000000, %ecx
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	movq	%rax, %r13
	call	_Z7add_cpuPfS_S_i
	call	clock@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	mulsd	.LC4(%rip), %xmm0
	movb	$1, %al
	divsd	.LC5(%rip), %xmm0
	call	__printf_chk@PLT
	call	clock@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$400000000, %edx
	movq	%rax, %r13
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$400000000, %edx
	call	cudaMemcpy@PLT
	movl	$17167841, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdi
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z38__device_stub__Z14add_gpu_blocksPfS_S_PfS_S_
.L28:
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movl	$400000000, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	call	clock@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	mulsd	.LC4(%rip), %xmm0
	movb	$1, %al
	divsd	.LC5(%rip), %xmm0
	call	__printf_chk@PLT
	call	clock@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$400000000, %edx
	movq	%rax, %r13
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$400000000, %edx
	call	cudaMemcpy@PLT
	movl	$17167841, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z39__device_stub__Z15add_gpu_threadsPfS_S_PfS_S_
.L29:
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movl	$400000000, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	call	clock@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	mulsd	.LC4(%rip), %xmm0
	movb	$1, %al
	divsd	.LC5(%rip), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	1096(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$1112, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z15add_gpu_threadsPfS_S_"
.LC10:
	.string	"_Z14add_gpu_blocksPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15add_gpu_threadsPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14add_gpu_blocksPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1325400064
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1083129856
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <time.h>

#define OPERATOR *
#define OPERATOR_NAME "multiplication"

#define DTYPE float

void random_ints(int* a, int N)
{
   int i;
   for (i = 0; i < N; ++i)
    a[i] = rand();
}

void random_floats(float* a, int N)
{
    for (int i = 0; i < N; ++i)
        a[i] = (float)rand()/(float)(RAND_MAX/a[i]);
}

__global__ void add_gpu_blocks(DTYPE *a, DTYPE *b, DTYPE *c) {
    c[blockIdx.x] = a[blockIdx.x] OPERATOR b[blockIdx.x];
}

__global__ void add_gpu_threads(DTYPE *a, DTYPE *b, DTYPE *c) {
    c[threadIdx.x] = a[threadIdx.x] OPERATOR b[threadIdx.x];
}

void add_cpu(DTYPE *a, DTYPE *b, DTYPE *c, int size) {
    for (int i=0; i<size; ++i)
        c[i] = a[i] OPERATOR b[i];
}

#define N (int)10e7

int main(void) {

    int device;
    hipGetDevice(&device);

    struct hipDeviceProp_t props;
    hipGetDeviceProperties(&props, device);

    printf("Using %s.\n\n", props.name);

    DTYPE *a, *b, *c; // host copies of a, b, c
    DTYPE *d_a, *d_b, *d_c; // device copies of a, b, c
    int size = N*sizeof(DTYPE);

    // Allocate space for device copies of a, b, c
    hipMalloc((void **)&d_a, size);
    hipMalloc((void **)&d_b, size);
    hipMalloc((void **)&d_c, size);

    // Alloc space for host copies of a, b, c and setup input values
    a = (DTYPE *)malloc(size); random_floats(a, N);
    b = (DTYPE *)malloc(size); random_floats(b, N);
    c = (DTYPE *)malloc(size);

    printf("Calculating vector %s with %d elements...\n", OPERATOR_NAME, N);

    clock_t t_cpu;
    t_cpu = clock();
    add_cpu(a, b, c, N);
    t_cpu = clock() - t_cpu;
    double time_taken_cpu = 1000*((double)t_cpu)/CLOCKS_PER_SEC; // in micro-second
    printf("CPU: %.2fms\n", time_taken_cpu);

    // Calculate the time taken by calculation
    clock_t t_gpu;
    t_gpu = clock();

    // Copy inputs to device
    hipMemcpy(d_a, a, size, hipMemcpyHostToDevice);
    hipMemcpy(d_b, b, size, hipMemcpyHostToDevice);

    // Launch add() kernel on GPU
    add_gpu_blocks<<<N,1>>>(d_a, d_b, d_c);
    
    // Copy result back to host
    hipMemcpy(c, d_c, size, hipMemcpyDeviceToHost);

    t_gpu = clock() - t_gpu;
    double time_taken_gpu = 1000*((double)t_gpu)/CLOCKS_PER_SEC; // in micro-second

    printf("GPU (blocks): %.2fms.\n", time_taken_gpu);

    // ------------------------------------------------

    // Calculate the time taken by calculation
    clock_t t_gpu_2;
    t_gpu_2 = clock();

    // Copy inputs to device
    hipMemcpy(d_a, a, size, hipMemcpyHostToDevice);
    hipMemcpy(d_b, b, size, hipMemcpyHostToDevice);

    // Launch add() kernel on GPU
    add_gpu_threads<<<1,N>>>(d_a, d_b, d_c);
    
    // Copy result back to host
    hipMemcpy(c, d_c, size, hipMemcpyDeviceToHost);

    t_gpu_2 = clock() - t_gpu_2;
    double time_taken_gpu_2 = 1000*((double)t_gpu_2)/CLOCKS_PER_SEC; // in micro-second

    printf("GPU (threads): %.2fms.\n", time_taken_gpu_2);

    // Cleanup
    hipFree(d_a); hipFree(d_b); hipFree(d_c);
    return 0;
}
	.text
	.file	"main.hip"
	.globl	_Z11random_intsPii              # -- Begin function _Z11random_intsPii
	.type	_Z11random_intsPii,@function
_Z11random_intsPii:                     # @_Z11random_intsPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z11random_intsPii, .Lfunc_end0-_Z11random_intsPii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z13random_floatsPfi
.LCPI1_0:
	.long	0x4f000000                      # float 2.14748365E+9
	.text
	.globl	_Z13random_floatsPfi
	.type	_Z13random_floatsPfi,@function
_Z13random_floatsPfi:                   # @_Z13random_floatsPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	(%rbx,%r15,4), %xmm1
	divss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z13random_floatsPfi, .Lfunc_end1-_Z13random_floatsPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__add_gpu_blocksPfS_S_ # -- Begin function _Z29__device_stub__add_gpu_blocksPfS_S_
	.type	_Z29__device_stub__add_gpu_blocksPfS_S_,@function
_Z29__device_stub__add_gpu_blocksPfS_S_: # @_Z29__device_stub__add_gpu_blocksPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14add_gpu_blocksPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub__add_gpu_blocksPfS_S_, .Lfunc_end2-_Z29__device_stub__add_gpu_blocksPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__add_gpu_threadsPfS_S_ # -- Begin function _Z30__device_stub__add_gpu_threadsPfS_S_
	.type	_Z30__device_stub__add_gpu_threadsPfS_S_,@function
_Z30__device_stub__add_gpu_threadsPfS_S_: # @_Z30__device_stub__add_gpu_threadsPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15add_gpu_threadsPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__add_gpu_threadsPfS_S_, .Lfunc_end3-_Z30__device_stub__add_gpu_threadsPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7add_cpuPfS_S_i               # -- Begin function _Z7add_cpuPfS_S_i
	.type	_Z7add_cpuPfS_S_i,@function
_Z7add_cpuPfS_S_i:                      # @_Z7add_cpuPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB4_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ecx, %eax
	xorl	%ecx, %ecx
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	(%rsi,%rcx,4), %xmm0
	movss	%xmm0, (%rdx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB4_2
.LBB4_3:                                # %._crit_edge
	retq
.Lfunc_end4:
	.size	_Z7add_cpuPfS_S_i, .Lfunc_end4-_Z7add_cpuPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	0x4f000000                      # float 2.14748365E+9
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI5_1:
	.quad	0x408f400000000000              # double 1000
.LCPI5_2:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevice
	movl	(%rbx), %esi
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevicePropertiesR0600
	xorl	%r14d, %r14d
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	leaq	24(%rsp), %rdi
	movl	$400000000, %esi                # imm = 0x17D78400
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$400000000, %esi                # imm = 0x17D78400
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$400000000, %esi                # imm = 0x17D78400
	callq	hipMalloc
	movl	$400000000, %edi                # imm = 0x17D78400
	callq	malloc
	movq	%rax, %rbx
.LBB5_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI5_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	(%rbx,%r14,4), %xmm1
	divss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$100000000, %r14                # imm = 0x5F5E100
	jne	.LBB5_1
# %bb.2:                                # %_Z13random_floatsPfi.exit
	movl	$400000000, %edi                # imm = 0x17D78400
	callq	malloc
	movq	%rax, %r15
	xorl	%r14d, %r14d
.LBB5_3:                                # %.lr.ph.i38
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI5_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	(%r15,%r14,4), %xmm1
	divss	%xmm1, %xmm0
	movss	%xmm0, (%r15,%r14,4)
	incq	%r14
	cmpq	$100000000, %r14                # imm = 0x5F5E100
	jne	.LBB5_3
# %bb.4:                                # %_Z13random_floatsPfi.exit42
	movl	$400000000, %edi                # imm = 0x17D78400
	callq	malloc
	movq	%rax, %r14
	xorl	%r12d, %r12d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$100000000, %edx                # imm = 0x5F5E100
	xorl	%eax, %eax
	callq	printf
	callq	clock
	movq	%rax, %r13
.LBB5_5:                                # %.lr.ph.i43
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%r12,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	(%r15,%r12,4), %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpq	$100000000, %r12                # imm = 0x5F5E100
	jne	.LBB5_5
# %bb.6:                                # %_Z7add_cpuPfS_S_i.exit
	movabsq	$4294967297, %r12               # imm = 0x100000001
	callq	clock
	subq	%r13, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	divsd	.LCPI5_2(%rip), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	callq	clock
	movq	%rax, %rbp
	movq	24(%rsp), %rdi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	99999999(%r12), %r13
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_8
# %bb.7:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z29__device_stub__add_gpu_blocksPfS_S_
.LBB5_8:
	movq	8(%rsp), %rsi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	subq	%rbp, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	divsd	.LCPI5_2(%rip), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	callq	clock
	movq	%rax, %rbp
	movq	24(%rsp), %rdi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_10
# %bb.9:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z30__device_stub__add_gpu_threadsPfS_S_
.LBB5_10:
	movq	8(%rsp), %rsi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	subq	%rbp, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	divsd	.LCPI5_2(%rip), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14add_gpu_blocksPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15add_gpu_threadsPfS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14add_gpu_blocksPfS_S_,@object # @_Z14add_gpu_blocksPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z14add_gpu_blocksPfS_S_
	.p2align	3, 0x0
_Z14add_gpu_blocksPfS_S_:
	.quad	_Z29__device_stub__add_gpu_blocksPfS_S_
	.size	_Z14add_gpu_blocksPfS_S_, 8

	.type	_Z15add_gpu_threadsPfS_S_,@object # @_Z15add_gpu_threadsPfS_S_
	.globl	_Z15add_gpu_threadsPfS_S_
	.p2align	3, 0x0
_Z15add_gpu_threadsPfS_S_:
	.quad	_Z30__device_stub__add_gpu_threadsPfS_S_
	.size	_Z15add_gpu_threadsPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Using %s.\n\n"
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Calculating vector %s with %d elements...\n"
	.size	.L.str.1, 43

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"multiplication"
	.size	.L.str.2, 15

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"CPU: %.2fms\n"
	.size	.L.str.3, 13

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"GPU (blocks): %.2fms.\n"
	.size	.L.str.4, 23

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"GPU (threads): %.2fms.\n"
	.size	.L.str.5, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14add_gpu_blocksPfS_S_"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15add_gpu_threadsPfS_S_"
	.size	.L__unnamed_2, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__add_gpu_blocksPfS_S_
	.addrsig_sym _Z30__device_stub__add_gpu_threadsPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14add_gpu_blocksPfS_S_
	.addrsig_sym _Z15add_gpu_threadsPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14add_gpu_blocksPfS_S_ ; -- Begin function _Z14add_gpu_blocksPfS_S_
	.globl	_Z14add_gpu_blocksPfS_S_
	.p2align	8
	.type	_Z14add_gpu_blocksPfS_S_,@function
_Z14add_gpu_blocksPfS_S_:               ; @_Z14add_gpu_blocksPfS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_mov_b32 s3, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_lshl_b64 s[2:3], s[2:3], 2
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s4, s2
	s_addc_u32 s5, s5, s3
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s5, s[6:7], 0x0
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v0, s4, s5
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14add_gpu_blocksPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14add_gpu_blocksPfS_S_, .Lfunc_end0-_Z14add_gpu_blocksPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 108
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15add_gpu_threadsPfS_S_ ; -- Begin function _Z15add_gpu_threadsPfS_S_
	.globl	_Z15add_gpu_threadsPfS_S_
	.p2align	8
	.type	_Z15add_gpu_threadsPfS_S_,@function
_Z15add_gpu_threadsPfS_S_:              ; @_Z15add_gpu_threadsPfS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5]
	global_load_b32 v2, v0, s[6:7]
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15add_gpu_threadsPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15add_gpu_threadsPfS_S_, .Lfunc_end1-_Z15add_gpu_threadsPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 72
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14add_gpu_blocksPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z14add_gpu_blocksPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15add_gpu_threadsPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z15add_gpu_threadsPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
