#include <stdio.h>
#include <iostream>

#define DIM 100

using namespace std;

struct point {
	float   r;
	float   i;
	//construct function
	__device__ point( float a, float b )  {r=a; i=b;}

	__device__ float magnitude2() { return r * r + i * i; }
	
	//override the operator *
    	__device__ point operator*(const point& a) {
        	return point(r*a.r - i*a.i, i*a.r + r*a.i);
    	}

	//override the operator +
    	__device__ point operator+(const point& a) {
        	return point(r+a.r, i+a.i);
    	}
};


	//according to the position to do calculation. if the value is bigger than 1000, return 0; otherwise, return 1.
__device__ int calculate( int x, int y ) { 
	

    	const float scale = 1.5;
	float jx = scale * (float)(DIM/2 - x)/(DIM/2);
    	float jy = scale * (float)(DIM/2 - y)/(DIM/2);

    	point c(-0.8, 0.156);
    	point a(jx, jy);

    	int i = 0;
    	for (i=0; i<200; i++) {
        	a = a * a + c;
        	if (a.magnitude2() > 1000)
            		return 0;
    	}

    	return 1;
}

//render each point of the image
__global__ void render( int image[DIM][DIM] ){
	int x = blockIdx.x;
	int y = blockIdx.y;
        int value = calculate( x, y );
        image[x][y] = 255 * value;
 }

int main() {
   	int image[DIM][DIM];
	int (*im_d)[DIM];
	int size = DIM*DIM*sizeof(int);
	cudaMalloc((void**)&im_d,size);

	for (int y=0; y<DIM; y++) {
        	for (int x=0; x<DIM; x++) {
			image[x][y]=30;
		}
	}

	cudaMemcpy(im_d,image,size, cudaMemcpyHostToDevice);
	dim3 numThreads(1);
	dim3 numBlocks(DIM,DIM);
    	render<<<numBlocks,numThreads>>>(im_d);
	cerr <<  cudaGetErrorString(cudaGetLastError()) << endl;

	cudaMemcpy(image,im_d,size, cudaMemcpyDeviceToHost);
	for (int y=0; y<DIM; y++) {
        	for (int x=0; x<DIM; x++) {
			printf("%d ",image[x][y]);
		}
	printf("\n");
	}
	cudaFree(im_d);
	return 0;
}

	.file	"tmpxft_002cf0dd_00000000-6_e2_cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3645:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3645:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9calculateii
	.type	_Z9calculateii, @function
_Z9calculateii:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3641:
	.size	_Z9calculateii, .-_Z9calculateii
	.globl	_Z30__device_stub__Z6renderPA100_iPA100_i
	.type	_Z30__device_stub__Z6renderPA100_iPA100_i, @function
_Z30__device_stub__Z6renderPA100_iPA100_i:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z6renderPA100_i(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L4:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z30__device_stub__Z6renderPA100_iPA100_i, .-_Z30__device_stub__Z6renderPA100_iPA100_i
	.globl	_Z6renderPA100_i
	.type	_Z6renderPA100_i, @function
_Z6renderPA100_i:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6renderPA100_iPA100_i
	.cfi_endproc
.LFE3668:
	.size	_Z6renderPA100_i, .-_Z6renderPA100_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3642:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leaq	-36864(%rsp), %r11
	.cfi_def_cfa 11, 36912
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$3184, %rsp
	.cfi_def_cfa_offset 40096
	movl	$40000, %esi
	movq	%fs:40, %rax
	movq	%rax, 40040(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	leaq	40(%rsp), %rbx
	call	cudaMalloc@PLT
	leaq	440(%rsp), %r13
	movq	%rbx, %rax
.L11:
	movq	%rax, %rcx
	movl	$100, %edx
.L12:
	movl	$30, (%rcx)
	addq	$400, %rcx
	decl	%edx
	jne	.L12
	addq	$4, %rax
	cmpq	%r13, %rax
	jne	.L11
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$40000, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	$1, %esi
	movabsq	$429496729700, %rdi
	movl	$1, 24(%rsp)
	movq	%rdx, 16(%rsp)
	movq	%rdi, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	8(%rsp), %rdi
	call	_Z30__device_stub__Z6renderPA100_iPA100_i
.L14:
	call	cudaGetLastError@PLT
	leaq	.LC0(%rip), %r14
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	_ZSt4cerr(%rip), %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$40000, %edx
	call	cudaMemcpy@PLT
.L15:
	movq	%rbx, %r12
	movl	$100, %ebp
.L16:
	movl	(%r12), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$400, %r12
	call	__printf_chk@PLT
	decl	%ebp
	jne	.L16
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4, %rbx
	call	__printf_chk@PLT
	cmpq	%r13, %rbx
	jne	.L15
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40040(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$40048, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3642:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z6renderPA100_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3670:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6renderPA100_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3670:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>

#define DIM 100

using namespace std;

struct point {
	float   r;
	float   i;
	//construct function
	__device__ point( float a, float b )  {r=a; i=b;}

	__device__ float magnitude2() { return r * r + i * i; }
	
	//override the operator *
    	__device__ point operator*(const point& a) {
        	return point(r*a.r - i*a.i, i*a.r + r*a.i);
    	}

	//override the operator +
    	__device__ point operator+(const point& a) {
        	return point(r+a.r, i+a.i);
    	}
};


	//according to the position to do calculation. if the value is bigger than 1000, return 0; otherwise, return 1.
__device__ int calculate( int x, int y ) { 
	

    	const float scale = 1.5;
	float jx = scale * (float)(DIM/2 - x)/(DIM/2);
    	float jy = scale * (float)(DIM/2 - y)/(DIM/2);

    	point c(-0.8, 0.156);
    	point a(jx, jy);

    	int i = 0;
    	for (i=0; i<200; i++) {
        	a = a * a + c;
        	if (a.magnitude2() > 1000)
            		return 0;
    	}

    	return 1;
}

//render each point of the image
__global__ void render( int image[DIM][DIM] ){
	int x = blockIdx.x;
	int y = blockIdx.y;
        int value = calculate( x, y );
        image[x][y] = 255 * value;
 }

int main() {
   	int image[DIM][DIM];
	int (*im_d)[DIM];
	int size = DIM*DIM*sizeof(int);
	hipMalloc((void**)&im_d,size);

	for (int y=0; y<DIM; y++) {
        	for (int x=0; x<DIM; x++) {
			image[x][y]=30;
		}
	}

	hipMemcpy(im_d,image,size, hipMemcpyHostToDevice);
	dim3 numThreads(1);
	dim3 numBlocks(DIM,DIM);
    	render<<<numBlocks,numThreads>>>(im_d);
	cerr <<  hipGetErrorString(hipGetLastError()) << endl;

	hipMemcpy(image,im_d,size, hipMemcpyDeviceToHost);
	for (int y=0; y<DIM; y++) {
        	for (int x=0; x<DIM; x++) {
			printf("%d ",image[x][y]);
		}
	printf("\n");
	}
	hipFree(im_d);
	return 0;
}

	.text
	.file	"e2_cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__renderPA100_i # -- Begin function _Z21__device_stub__renderPA100_i
	.type	_Z21__device_stub__renderPA100_i,@function
_Z21__device_stub__renderPA100_i:       # @_Z21__device_stub__renderPA100_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6renderPA100_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__renderPA100_i, .Lfunc_end0-_Z21__device_stub__renderPA100_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$40016, %rsp                    # imm = 0x9C50
	.cfi_def_cfa_offset 40048
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	8(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	16(%rsp), %rax
	xorl	%ecx, %ecx
.LBB1_1:                                # %.preheader27
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	movq	$-40000, %rdx                   # imm = 0xFFFF63C0
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$30, 40000(%rax,%rdx)
	addq	$400, %rdx                      # imm = 0x190
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%rcx
	addq	$4, %rax
	cmpq	$100, %rcx
	jne	.LBB1_1
# %bb.4:
	movq	8(%rsp), %rdi
	leaq	16(%rsp), %rbx
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$429496729700, %rdi             # imm = 0x6400000064
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	8(%rsp), %rdi
	callq	_Z21__device_stub__renderPA100_i
.LBB1_6:
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_7
# %bb.8:
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_9
.LBB1_7:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rsi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r14d, %r14d
.LBB1_10:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_11 Depth 2
	movq	$-40000, %r15                   # imm = 0xFFFF63C0
.LBB1_11:                               #   Parent Loop BB1_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	40000(%rbx,%r15), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	addq	$400, %r15                      # imm = 0x190
	jne	.LBB1_11
# %bb.12:                               #   in Loop: Header=BB1_10 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$4, %rbx
	cmpq	$100, %r14
	jne	.LBB1_10
# %bb.13:
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40016, %rsp                    # imm = 0x9C50
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6renderPA100_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6renderPA100_i,@object        # @_Z6renderPA100_i
	.section	.rodata,"a",@progbits
	.globl	_Z6renderPA100_i
	.p2align	3, 0x0
_Z6renderPA100_i:
	.quad	_Z21__device_stub__renderPA100_i
	.size	_Z6renderPA100_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d "
	.size	.L.str, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6renderPA100_i"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__renderPA100_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6renderPA100_i
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6renderPA100_i        ; -- Begin function _Z6renderPA100_i
	.globl	_Z6renderPA100_i
	.p2align	8
	.type	_Z6renderPA100_i,@function
_Z6renderPA100_i:                       ; @_Z6renderPA100_i
; %bb.0:
	s_sub_i32 s2, 50, s14
	s_sub_i32 s3, 50, s15
	v_cvt_f32_i32_e32 v0, s2
	v_cvt_f32_i32_e32 v1, s3
	s_mov_b32 s4, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v0, 0x3fc00000, v0 :: v_dual_mul_f32 v1, 0x3fc00000, v1
	v_div_scale_f32 v2, null, 0x42480000, 0x42480000, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f32 v3, null, 0x42480000, 0x42480000, v1
	v_div_scale_f32 v8, vcc_lo, v0, 0x42480000, v0
	v_rcp_f32_e32 v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v2, v4, 1.0
	v_fma_f32 v7, -v3, v5, 1.0
	v_dual_fmac_f32 v4, v6, v4 :: v_dual_fmac_f32 v5, v7, v5
	v_div_scale_f32 v6, s2, v1, 0x42480000, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, v8, v4
	v_mul_f32_e32 v9, v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, -v2, v7, v8
	v_fma_f32 v11, -v3, v9, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v7, v10, v4
	v_fmac_f32_e32 v9, v11, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, -v2, v7, v8
	v_fma_f32 v3, -v3, v9, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v2, v2, v4, v7
	s_mov_b32 vcc_lo, s2
	s_movk_i32 s2, 0xc8
	v_div_fmas_f32 v3, v3, v5, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v0, v2, 0x42480000, v0
	v_div_fixup_f32 v1, v3, 0x42480000, v1
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v2, v1, v1
	v_mul_f32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v0, v0, v0, -v2
	v_add_f32_e32 v0, 0xbf4ccccd, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v1, 2.0, v1, 0x3e1fbe77
	v_mul_f32_e32 v2, v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v0, v0
	v_cmp_nlt_f32_e32 vcc_lo, 0x447a0000, v2
	s_cbranch_vccz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s2, s2, -1
	s_movk_i32 s3, 0xff
	s_cmp_eq_u32 s2, 0
	s_cselect_b32 s5, -1, 0
	s_branch .LBB0_4
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s3, 0
	s_mov_b32 s5, -1
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr1
                                        ; implicit-def: $sgpr2
.LBB0_4:                                ; %Flow
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_1
; %bb.5:                                ; %_Z9calculateii.exit
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mul_hi_i32 s2, s14, 0x190
	s_mulk_i32 s14, 0x190
	s_ashr_i32 s5, s4, 31
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s6, s0, s14
	s_addc_u32 s2, s1, s2
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s2, s1
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6renderPA100_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6renderPA100_i, .Lfunc_end0-_Z6renderPA100_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6renderPA100_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6renderPA100_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
