#include <stdio.h>
#include <cuda.h>
//Code written by Alan Fleming

void mul_matrix_cpu(int *M, int *N, int *P, int width){
	for( int i = 0; i<width; i++){
		for( int j = 0; j<width; j++){
			int sum = 0;
			for (int k = 0; k < width; k++){
				sum += M[i * width + k] * N[k * width + j];
			}
			P[i * width + j] = sum;
		}
	}
}

__global__ void mul_matrix_gpu(int *M, int *N, int *P, int width){
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	
	if( row < width && col < width) {
		int pValue = 0;
		for( int k = 0; k < width; ++k){
			pValue += M[row * width + k] * N[k * width + col];
		}
		P[row * width + col] = pValue;
	}
}

void printMatrix(int *m, int N){
	for( int i = 0; i < N; i++){
		for( int j = 0; j < N; j++){
			printf("%d ", m[i * N + j]);
		}
		printf("\n");
	}
}


int verifyMatrix(int *a, int *b, int N){
	for( int i = 0; i < N; i++){
		for( int j = 0; j < N; j++){
			if(a[i * N + j] != b[i * N + j]){
				printf("TEST FAILED\n");
				return 1;
			}
		}
	}
	printf("TEST PASSED\n");
	return 0;
}

int main(int argc, char *argv[]){

	//check number of arguments
	if(argc <= 2) {
		printf("Please supply matrix size and block size");
		return 1;
	}

	//assign Matrix and block size
	const int MATRIXSIZE = atoi(argv[1]);
	const int BLOCKSIZE = atoi(argv[2]);

	//allocate system memory for array
	int *a = (int *)malloc(sizeof(int) * MATRIXSIZE * MATRIXSIZE );	//first matrix
	int *b = (int *)malloc(sizeof(int) * MATRIXSIZE * MATRIXSIZE ); //second matrix
	int *c = (int *)malloc(sizeof(int) * MATRIXSIZE * MATRIXSIZE ); //result from CPU
	int *d = (int *)malloc(sizeof(int) * MATRIXSIZE * MATRIXSIZE ); //result from gpu

	//initialize a and b for addition
	int init = 1325;
	for( int i = 0; i < MATRIXSIZE; i++){
		for( int j = 0; j < MATRIXSIZE; j++){
			init = 3125 * init % 65536;
			a[ i * MATRIXSIZE + j ] = (init - 32768)/6553;
			b[ i * MATRIXSIZE + j ] = init % 1000;
		}
	}

	//print initial matrix a and b
	printf("a \n --------------------- \n");
	printMatrix(a, MATRIXSIZE);

	printf("b \n --------------------- \n");
	printMatrix(b, MATRIXSIZE);

	//multiply matrix using cpu
	mul_matrix_cpu(a, b, c, MATRIXSIZE);
	
	//print the result
	printf("c \n --------------------- \n");
	printMatrix(c, MATRIXSIZE);

	//allocate memory on device
	int *dev_a, *dev_b, *dev_c;

	cudaMalloc((void **)(&dev_a),MATRIXSIZE * MATRIXSIZE * sizeof(int));
	cudaMalloc((void **)(&dev_b),MATRIXSIZE * MATRIXSIZE * sizeof(int));
	cudaMalloc((void **)(&dev_c),MATRIXSIZE * MATRIXSIZE * sizeof(int));

	//copy memory to device
	cudaMemcpy(dev_a,a, MATRIXSIZE * MATRIXSIZE * sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_b,b, MATRIXSIZE * MATRIXSIZE * sizeof(int),cudaMemcpyHostToDevice);
	
	//calculate gridWidth
	dim3 dimBlock(BLOCKSIZE, BLOCKSIZE, 1);

	int gridWidth = ceil((MATRIXSIZE-1)/double(dimBlock.x));

	//define dimGrid
	dim3 dimGrid(gridWidth, gridWidth,1);

	//multiply matrix using gpu
	mul_matrix_gpu<<<dimGrid, dimBlock>>>(dev_a, dev_b, dev_c, MATRIXSIZE);

	//copy memory from device
	cudaMemcpy(d,dev_c, MATRIXSIZE * MATRIXSIZE * sizeof(int),cudaMemcpyDeviceToHost);

	//print the result
	printf("d \n --------------------- \n");
	printMatrix(d, MATRIXSIZE);

	//verify the results
	verifyMatrix(c, d, MATRIXSIZE);

	//free memory
	free(a);
        free(b);
        free(c);
        free(d); 
        cudaFree(dev_a);
        cudaFree(dev_b);
        cudaFree(dev_c);
	//exit program
	return 0;
}

	.file	"tmpxft_0024771e_00000000-6_Fleming-MatrixMul.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14mul_matrix_cpuPiS_S_i
	.type	_Z14mul_matrix_cpuPiS_S_i, @function
_Z14mul_matrix_cpuPiS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	movq	%rsi, %r10
	movslq	%ecx, %rsi
	xorl	%r8d, %r8d
	movq	%rdi, %r9
	movq	%rsi, %rax
	movq	%rdx, %r11
	salq	$2, %rsi
	xorl	%ecx, %ecx
	cmpl	%eax, %r8d
	jl	.L11
	ret
.L11:
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L7:
	xorl	%edx, %edx
	leaq	(%r9,%rcx), %r13
	leaq	(%r11,%rcx), %r14
.L6:
	leaq	(%r10,%rdx,4), %rbp
	xorl	%edi, %edi
	xorl	%ebx, %ebx
.L4:
	movl	0(%r13,%rdi,4), %r12d
	imull	0(%rbp), %r12d
	incq	%rdi
	addq	%rsi, %rbp
	addl	%r12d, %ebx
	cmpl	%edi, %eax
	jg	.L4
	movl	%ebx, (%r14,%rdx,4)
	incq	%rdx
	cmpl	%edx, %eax
	jg	.L6
	incl	%r8d
	addq	%rsi, %rcx
	cmpl	%eax, %r8d
	jl	.L7
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14mul_matrix_cpuPiS_S_i, .-_Z14mul_matrix_cpuPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	"\n"
	.text
	.globl	_Z11printMatrixPii
	.type	_Z11printMatrixPii, @function
_Z11printMatrixPii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC0(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%esi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 64
.L14:
	cmpl	%ebp, %r12d
	jge	.L19
	leaq	(%rbx,%r13), %r15
.L15:
	movl	(%rbx), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4, %rbx
	call	__printf_chk@PLT
	cmpq	%r15, %rbx
	jne	.L15
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r12d
	call	__printf_chk@PLT
	jmp	.L14
.L19:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11printMatrixPii, .-_Z11printMatrixPii
	.section	.rodata.str1.1
.LC2:
	.string	"TEST FAILED\n"
.LC3:
	.string	"TEST PASSED\n"
	.text
	.globl	_Z12verifyMatrixPiS_i
	.type	_Z12verifyMatrixPiS_i, @function
_Z12verifyMatrixPiS_i:
.LFB2029:
	.cfi_startproc
	endbr64
	movslq	%edx, %r8
	xorl	%r9d, %r9d
	pushq	%rcx
	.cfi_def_cfa_offset 16
	xorl	%ecx, %ecx
	salq	$2, %r8
.L21:
	cmpl	%edx, %ecx
	jge	.L28
	movq	%r9, %rax
	xorl	%r10d, %r10d
.L24:
	movl	(%rsi,%rax), %r11d
	cmpl	%r11d, (%rdi,%rax)
	je	.L22
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L20
.L22:
	incl	%r10d
	addq	$4, %rax
	cmpl	%r10d, %edx
	jne	.L24
	incl	%ecx
	addq	%r8, %r9
	jmp	.L21
.L28:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L20:
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z12verifyMatrixPiS_i, .-_Z12verifyMatrixPiS_i
	.globl	_Z39__device_stub__Z14mul_matrix_gpuPiS_S_iPiS_S_i
	.type	_Z39__device_stub__Z14mul_matrix_gpuPiS_S_iPiS_S_i, @function
_Z39__device_stub__Z14mul_matrix_gpuPiS_S_iPiS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14mul_matrix_gpuPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L29:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z39__device_stub__Z14mul_matrix_gpuPiS_S_iPiS_S_i, .-_Z39__device_stub__Z14mul_matrix_gpuPiS_S_iPiS_S_i
	.globl	_Z14mul_matrix_gpuPiS_S_i
	.type	_Z14mul_matrix_gpuPiS_S_i, @function
_Z14mul_matrix_gpuPiS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z14mul_matrix_gpuPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2056:
	.size	_Z14mul_matrix_gpuPiS_S_i, .-_Z14mul_matrix_gpuPiS_S_i
	.section	.rodata.str1.1
.LC4:
	.string	"Please supply matrix size and block size"
.LC5:
	.string	"a \n --------------------- \n"
.LC6:
	.string	"b \n --------------------- \n"
.LC7:
	.string	"c \n --------------------- \n"
.LC8:
	.string	"d \n --------------------- \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	jg	.L35
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L34
.L35:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	movl	$1000, %r14d
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movslq	%eax, %r15
	call	atoi@PLT
	movq	%r15, %rbx
	movl	%eax, %r13d
	movq	%r15, %rax
	imulq	%r15, %rax
	salq	$2, %r15
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	xorl	%r8d, %r8d
	xorl	%edi, %edi
	movl	$1325, %ecx
	movq	%rax, 24(%rsp)
	movl	$65536, %r10d
	movl	$6553, %r11d
.L37:
	cmpl	%ebx, %edi
	jge	.L46
	movq	%r8, %rsi
	xorl	%r9d, %r9d
.L38:
	imull	$3125, %ecx, %eax
	incl	%r9d
	cltd
	idivl	%r10d
	leal	-32768(%rdx), %eax
	movl	%edx, %ecx
	cltd
	idivl	%r11d
	movl	%eax, (%r12,%rsi)
	movl	%ecx, %eax
	cltd
	idivl	%r14d
	movl	%edx, 0(%rbp,%rsi)
	addq	$4, %rsi
	cmpl	%r9d, %ebx
	jne	.L38
	incl	%edi
	addq	%r15, %r8
	jmp	.L37
.L46:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_Z11printMatrixPii
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	_Z11printMatrixPii
	movq	16(%rsp), %rdx
	movl	%ebx, %ecx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	_Z14mul_matrix_cpuPiS_S_i
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z11printMatrixPii
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leal	-1(%rbx), %eax
	movl	%r13d, 68(%rsp)
	cvtsi2sdl	%eax, %xmm0
	movl	%r13d, %eax
	cvtsi2sdq	%rax, %xmm1
	divsd	%xmm1, %xmm0
	call	ceil@PLT
	movl	%r13d, 64(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttsd2sil	%xmm0, %eax
	movq	64(%rsp), %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	%eax, 76(%rsp)
	movl	%eax, 80(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebx, %ecx
	movq	40(%rsp), %rdi
	call	_Z39__device_stub__Z14mul_matrix_gpuPiS_S_iPiS_S_i
.L41:
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z11printMatrixPii
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z12verifyMatrixPiS_i
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L34:
	movq	88(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z14mul_matrix_gpuPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14mul_matrix_gpuPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
//Code written by Alan Fleming

void mul_matrix_cpu(int *M, int *N, int *P, int width){
	for( int i = 0; i<width; i++){
		for( int j = 0; j<width; j++){
			int sum = 0;
			for (int k = 0; k < width; k++){
				sum += M[i * width + k] * N[k * width + j];
			}
			P[i * width + j] = sum;
		}
	}
}

__global__ void mul_matrix_gpu(int *M, int *N, int *P, int width){
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	
	if( row < width && col < width) {
		int pValue = 0;
		for( int k = 0; k < width; ++k){
			pValue += M[row * width + k] * N[k * width + col];
		}
		P[row * width + col] = pValue;
	}
}

void printMatrix(int *m, int N){
	for( int i = 0; i < N; i++){
		for( int j = 0; j < N; j++){
			printf("%d ", m[i * N + j]);
		}
		printf("\n");
	}
}


int verifyMatrix(int *a, int *b, int N){
	for( int i = 0; i < N; i++){
		for( int j = 0; j < N; j++){
			if(a[i * N + j] != b[i * N + j]){
				printf("TEST FAILED\n");
				return 1;
			}
		}
	}
	printf("TEST PASSED\n");
	return 0;
}

int main(int argc, char *argv[]){

	//check number of arguments
	if(argc <= 2) {
		printf("Please supply matrix size and block size");
		return 1;
	}

	//assign Matrix and block size
	const int MATRIXSIZE = atoi(argv[1]);
	const int BLOCKSIZE = atoi(argv[2]);

	//allocate system memory for array
	int *a = (int *)malloc(sizeof(int) * MATRIXSIZE * MATRIXSIZE );	//first matrix
	int *b = (int *)malloc(sizeof(int) * MATRIXSIZE * MATRIXSIZE ); //second matrix
	int *c = (int *)malloc(sizeof(int) * MATRIXSIZE * MATRIXSIZE ); //result from CPU
	int *d = (int *)malloc(sizeof(int) * MATRIXSIZE * MATRIXSIZE ); //result from gpu

	//initialize a and b for addition
	int init = 1325;
	for( int i = 0; i < MATRIXSIZE; i++){
		for( int j = 0; j < MATRIXSIZE; j++){
			init = 3125 * init % 65536;
			a[ i * MATRIXSIZE + j ] = (init - 32768)/6553;
			b[ i * MATRIXSIZE + j ] = init % 1000;
		}
	}

	//print initial matrix a and b
	printf("a \n --------------------- \n");
	printMatrix(a, MATRIXSIZE);

	printf("b \n --------------------- \n");
	printMatrix(b, MATRIXSIZE);

	//multiply matrix using cpu
	mul_matrix_cpu(a, b, c, MATRIXSIZE);
	
	//print the result
	printf("c \n --------------------- \n");
	printMatrix(c, MATRIXSIZE);

	//allocate memory on device
	int *dev_a, *dev_b, *dev_c;

	hipMalloc((void **)(&dev_a),MATRIXSIZE * MATRIXSIZE * sizeof(int));
	hipMalloc((void **)(&dev_b),MATRIXSIZE * MATRIXSIZE * sizeof(int));
	hipMalloc((void **)(&dev_c),MATRIXSIZE * MATRIXSIZE * sizeof(int));

	//copy memory to device
	hipMemcpy(dev_a,a, MATRIXSIZE * MATRIXSIZE * sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(dev_b,b, MATRIXSIZE * MATRIXSIZE * sizeof(int),hipMemcpyHostToDevice);
	
	//calculate gridWidth
	dim3 dimBlock(BLOCKSIZE, BLOCKSIZE, 1);

	int gridWidth = ceil((MATRIXSIZE-1)/double(dimBlock.x));

	//define dimGrid
	dim3 dimGrid(gridWidth, gridWidth,1);

	//multiply matrix using gpu
	mul_matrix_gpu<<<dimGrid, dimBlock>>>(dev_a, dev_b, dev_c, MATRIXSIZE);

	//copy memory from device
	hipMemcpy(d,dev_c, MATRIXSIZE * MATRIXSIZE * sizeof(int),hipMemcpyDeviceToHost);

	//print the result
	printf("d \n --------------------- \n");
	printMatrix(d, MATRIXSIZE);

	//verify the results
	verifyMatrix(c, d, MATRIXSIZE);

	//free memory
	free(a);
        free(b);
        free(c);
        free(d); 
        hipFree(dev_a);
        hipFree(dev_b);
        hipFree(dev_c);
	//exit program
	return 0;
}

	.text
	.file	"Fleming-MatrixMul.hip"
	.globl	_Z14mul_matrix_cpuPiS_S_i       # -- Begin function _Z14mul_matrix_cpuPiS_S_i
	.type	_Z14mul_matrix_cpuPiS_S_i,@function
_Z14mul_matrix_cpuPiS_S_i:              # @_Z14mul_matrix_cpuPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB0_7
# %bb.1:                                # %.preheader26.lr.ph
	movl	%ecx, %eax
	leaq	(,%rax,4), %r8
	xorl	%edx, %edx
	xorl	%r10d, %r10d
.LBB0_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
                                        #       Child Loop BB0_4 Depth 3
	movl	%edx, %r11d
	leaq	(%rdi,%r11,4), %r11
	movq	%r10, %rbx
	imulq	%rax, %rbx
	movq	-8(%rsp), %r9                   # 8-byte Reload
	leaq	(%r9,%rbx,4), %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB0_3:                                # %.preheader
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_4 Depth 3
	xorl	%r12d, %r12d
	movq	%r14, %r13
	xorl	%ebp, %ebp
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r13), %r9d
	imull	(%r11,%r12,4), %r9d
	addl	%r9d, %ebp
	incq	%r12
	addq	%r8, %r13
	cmpq	%r12, %rax
	jne	.LBB0_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_3 Depth=2
	movl	%ebp, (%rbx,%r15,4)
	incq	%r15
	addq	$4, %r14
	cmpq	%rax, %r15
	jne	.LBB0_3
# %bb.6:                                # %._crit_edge30
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r10
	addl	%ecx, %edx
	cmpq	%rax, %r10
	jne	.LBB0_2
.LBB0_7:                                # %._crit_edge32
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z14mul_matrix_cpuPiS_S_i, .Lfunc_end0-_Z14mul_matrix_cpuPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__mul_matrix_gpuPiS_S_i # -- Begin function _Z29__device_stub__mul_matrix_gpuPiS_S_i
	.type	_Z29__device_stub__mul_matrix_gpuPiS_S_i,@function
_Z29__device_stub__mul_matrix_gpuPiS_S_i: # @_Z29__device_stub__mul_matrix_gpuPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14mul_matrix_gpuPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__mul_matrix_gpuPiS_S_i, .Lfunc_end1-_Z29__device_stub__mul_matrix_gpuPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixPii              # -- Begin function _Z11printMatrixPii
	.type	_Z11printMatrixPii,@function
_Z11printMatrixPii:                     # @_Z11printMatrixPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, (%rsp)                    # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB2_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebx
	movl	%esi, %r15d
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
.LBB2_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
	movl	%ebp, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	xorl	%r14d, %r14d
.LBB2_3:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r13,%r14,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB2_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addl	%ebx, %ebp
	cmpq	%r15, %r12
	jne	.LBB2_2
.LBB2_5:                                # %._crit_edge13
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z11printMatrixPii, .Lfunc_end2-_Z11printMatrixPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12verifyMatrixPiS_i           # -- Begin function _Z12verifyMatrixPiS_i
	.type	_Z12verifyMatrixPiS_i,@function
_Z12verifyMatrixPiS_i:                  # @_Z12verifyMatrixPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rax
	movl	$.Lstr.1, %edi
	testl	%edx, %edx
	jle	.LBB3_7
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.LBB3_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	movl	%r8d, %r11d
	leaq	(%rsi,%r11,4), %r10
	leaq	(%rax,%r11,4), %r11
	xorl	%ebx, %ebx
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r11,%rbx,4), %ebp
	cmpl	(%r10,%rbx,4), %ebp
	jne	.LBB3_5
# %bb.3:                                #   in Loop: Header=BB3_4 Depth=2
	incq	%rbx
	cmpq	%rbx, %rcx
	jne	.LBB3_4
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r9
	addl	%edx, %r8d
	cmpq	%rcx, %r9
	jne	.LBB3_2
.LBB3_7:
	xorl	%ebx, %ebx
	jmp	.LBB3_8
.LBB3_5:
	movl	$1, %ebx
	movl	$.Lstr, %edi
.LBB3_8:                                # %._crit_edge31
	callq	puts@PLT
	movl	%ebx, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z12verifyMatrixPiS_i, .Lfunc_end3-_Z12verifyMatrixPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jg	.LBB4_2
# %bb.1:
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %eax
	jmp	.LBB4_18
.LBB4_2:
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	movslq	%ebx, %rbp
	movq	%rbp, %r13
	imulq	%rbp, %r13
	shlq	$2, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	testl	%ebp, %ebp
	movq	%r15, 24(%rsp)                  # 8-byte Spill
	jle	.LBB4_14
# %bb.3:                                # %.preheader.lr.ph
	movl	%ebx, %r13d
	movl	$1325, %ecx                     # imm = 0x52D
	xorl	%eax, %eax
	movl	$65535, %edx                    # imm = 0xFFFF
	xorl	%esi, %esi
.LBB4_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_5 Depth 2
	movl	%eax, %r8d
	leaq	(%r15,%r8,4), %rdi
	leaq	(%r14,%r8,4), %r8
	xorl	%r9d, %r9d
.LBB4_5:                                #   Parent Loop BB4_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	$3125, %ecx, %r10d              # imm = 0xC35
	movl	%r10d, %ecx
	andl	%edx, %ecx
	movl	%r10d, %r11d
	xorl	$32768, %r11d                   # imm = 0x8000
	movswl	%r11w, %r11d
	imull	$10241, %r11d, %r11d            # imm = 0x2801
	movl	%r11d, %ebp
	shrl	$31, %ebp
	sarl	$26, %r11d
	addl	%ebp, %r11d
	movl	%r11d, (%r8,%r9,4)
	movl	%ecx, %r11d
	shrl	$3, %r11d
	imull	$8389, %r11d, %r11d             # imm = 0x20C5
	shrl	$20, %r11d
	imull	$1000, %r11d, %r11d             # imm = 0x3E8
	subl	%r11d, %r10d
	andl	%edx, %r10d
	movl	%r10d, (%rdi,%r9,4)
	incq	%r9
	cmpq	%r9, %r13
	jne	.LBB4_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB4_4 Depth=1
	incq	%rsi
	addl	%ebx, %eax
	cmpq	%r13, %rsi
	jne	.LBB4_4
# %bb.7:                                # %._crit_edge88
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_Z11printMatrixPii
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_Z11printMatrixPii
	testl	%ebx, %ebx
	jle	.LBB4_15
# %bb.8:                                # %.preheader26.lr.ph.i
	leaq	(,%r13,4), %rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB4_9:                                # %.preheader.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_10 Depth 2
                                        #       Child Loop BB4_11 Depth 3
	movl	%ecx, %esi
	movq	%r14, %r15
	leaq	(%r14,%rsi,4), %rsi
	movq	%rdx, %rdi
	imulq	%r13, %rdi
	movq	%r12, %r14
	leaq	(%r12,%rdi,4), %rdi
	movq	24(%rsp), %r8                   # 8-byte Reload
	xorl	%r9d, %r9d
.LBB4_10:                               # %.preheader.i
                                        #   Parent Loop BB4_9 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_11 Depth 3
	xorl	%r10d, %r10d
	movq	%r8, %r11
	xorl	%ebp, %ebp
.LBB4_11:                               #   Parent Loop BB4_9 Depth=1
                                        #     Parent Loop BB4_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r11), %r12d
	imull	(%rsi,%r10), %r12d
	addl	%r12d, %ebp
	addq	$4, %r10
	addq	%rax, %r11
	cmpq	%r10, %rax
	jne	.LBB4_11
# %bb.12:                               # %._crit_edge.i
                                        #   in Loop: Header=BB4_10 Depth=2
	movl	%ebp, (%rdi,%r9,4)
	incq	%r9
	addq	$4, %r8
	cmpq	%r13, %r9
	jne	.LBB4_10
# %bb.13:                               # %._crit_edge30.i
                                        #   in Loop: Header=BB4_9 Depth=1
	incq	%rdx
	addl	%ebx, %ecx
	cmpq	%r13, %rdx
	movq	%r14, %r12
	movq	%r15, %r14
	jne	.LBB4_9
	jmp	.LBB4_15
.LBB4_14:                               # %_Z14mul_matrix_cpuPiS_S_i.exit.critedge
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_Z11printMatrixPii
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_Z11printMatrixPii
.LBB4_15:                               # %_Z14mul_matrix_cpuPiS_S_i.exit
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_Z11printMatrixPii
	movl	%ebx, %ebp
	imull	%ebp, %ebp
	shlq	$2, %rbp
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	24(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	20(%rsp), %eax                  # 4-byte Reload
	movq	%rax, %r13
	shlq	$32, %r13
	movl	%ebx, %ecx
	decl	%ecx
	cvtsi2sd	%ecx, %xmm0
	orq	%rax, %r13
	cvtsi2sd	%rax, %xmm1
	divsd	%xmm1, %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %eax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_17
# %bb.16:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z29__device_stub__mul_matrix_gpuPiS_S_i
.LBB4_17:
	movq	8(%rsp), %rsi
	movq	48(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_Z11printMatrixPii
	movq	%r12, %rdi
	movq	%r13, %rsi
	movl	%ebx, %edx
	callq	_Z12verifyMatrixPiS_i
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
.LBB4_18:
                                        # kill: def $eax killed $eax killed $rax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14mul_matrix_gpuPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14mul_matrix_gpuPiS_S_i,@object # @_Z14mul_matrix_gpuPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z14mul_matrix_gpuPiS_S_i
	.p2align	3, 0x0
_Z14mul_matrix_gpuPiS_S_i:
	.quad	_Z29__device_stub__mul_matrix_gpuPiS_S_i
	.size	_Z14mul_matrix_gpuPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d "
	.size	.L.str, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Please supply matrix size and block size"
	.size	.L.str.4, 41

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14mul_matrix_gpuPiS_S_i"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"TEST FAILED"
	.size	.Lstr, 12

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"TEST PASSED"
	.size	.Lstr.1, 12

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"a \n --------------------- "
	.size	.Lstr.2, 27

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"b \n --------------------- "
	.size	.Lstr.3, 27

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"c \n --------------------- "
	.size	.Lstr.4, 27

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"d \n --------------------- "
	.size	.Lstr.5, 27

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__mul_matrix_gpuPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14mul_matrix_gpuPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14mul_matrix_gpuPiS_S_i ; -- Begin function _Z14mul_matrix_gpuPiS_S_i
	.globl	_Z14mul_matrix_gpuPiS_S_i
	.p2align	8
	.type	_Z14mul_matrix_gpuPiS_S_i,@function
_Z14mul_matrix_gpuPiS_S_i:              ; @_Z14mul_matrix_gpuPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v1, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, s2
	v_mov_b32_e32 v5, v0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14mul_matrix_gpuPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14mul_matrix_gpuPiS_S_i, .Lfunc_end0-_Z14mul_matrix_gpuPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14mul_matrix_gpuPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14mul_matrix_gpuPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
