#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include <cuda.h> 
#include <curand.h> 

#define CUDA_CALL(x) do { if((x)!=cudaSuccess){ \
	printf("Error at %s:%d\n",__FILE__,__LINE__); \
	return EXIT_FAILURE;}} while(0) 

#define CURAND_CALL(x) do { if((x)!=CURAND_STATUS_SUCCESS) { \
	printf("Error at %s:%d\n",__FILE__,__LINE__); \
	return EXIT_FAILURE;}} while(0)

using namespace std;



__global__ void SDE_simulations(double *x1, double *x2, double *temp1, double *temp2, int n, int time, float *d_Normal, float *d_Uni)
{
	int i = threadIdx.x;
	double a1 = 1.0;
	double a2 = 1.0;
	double b1 = 1.0;
	double b2 = 1.0;
	double k1 = 1.0;
	double k2 = 1.0;
	double H = 4.0;
	double S = 0.5;

	double dt = 10.0 / (double)time;


	if (i<n)
	{
		x1[i] = (double)d_Uni[2*i]*3.0;
		x2[i] = (double)d_Uni[2*i+1]*3.0;
		//x1[i] = 3.0;
		//x2[i] = 3.0;

		for (int j = 0; j < time - 1; j++)
		{
			temp1[i] = x1[i];
			temp2[i] = x2[i];

			x1[i] = temp1[i] + dt*(a1*pow(temp1[i], H) / (pow(temp1[i], H) + pow(S, H)) + b1*pow(S, H) / (pow(temp2[i], H) + pow(S, H)) - k1*temp1[i])+ sqrt(fabs(a1*pow(temp1[i], H) / (pow(temp1[i], H) + pow(S, H)) + b1*pow(S, H) / (pow(temp2[i], H) + pow(S, H)) - k1*temp1[i]))*(double)d_Normal[i*time + 2 * j];
			x2[i] = temp2[i] + dt*(a2*pow(temp2[i], H) / (pow(temp2[i], H) + pow(S, H)) + b2*pow(S, H) / (pow(temp1[i], H) + pow(S, H)) - k2*temp2[i])+ sqrt(fabs(a2*pow(temp2[i], H) / (pow(temp2[i], H) + pow(S, H)) + b2*pow(S, H) / (pow(temp1[i], H) + pow(S, H)) - k2*temp2[i]))*(double)d_Normal[i*time + 2 * j + 1];
		}
	}
}



int main()
{
	int n = 1000000;
	int time = 10;

	//CPU Memory variables
	double *x1, *x2 , *temp1, *temp2;
	x1 = (double *)malloc(n* sizeof(double));
	x2 = (double *)malloc(n* sizeof(double));
	temp1 = (double *)malloc(n * sizeof(double));
	temp2 = (double *)malloc(n * sizeof(double));

	//GPU Memory variables
	double *d_x2, *d_x1 , *d_temp1, *d_temp2;

	cudaMalloc(&d_x1, n * sizeof(double));
	cudaMalloc(&d_x2, n * sizeof(double));
	cudaMalloc(&d_temp1, n * sizeof(double));
	cudaMalloc(&d_temp2, n * sizeof(double));

	curandGenerator_t gen;
	float *d_Normal, *d_Uni;//, *hostData;
	//hostData = (double *)calloc(n, sizeof(double));

	CUDA_CALL(cudaMalloc(&d_Normal, 2 * time*n * sizeof(float)));
	CUDA_CALL(cudaMalloc(&d_Uni, 2*n * sizeof(float)));
	CURAND_CALL(curandCreateGenerator(&gen, CURAND_RNG_PSEUDO_DEFAULT));
	CURAND_CALL(curandSetPseudoRandomGeneratorSeed(gen, 1234ULL));
	CURAND_CALL(curandGenerateNormal(gen, d_Normal, 2 * n*time, 0.0, 10.0/(float)time));
	CURAND_CALL(curandGenerateUniform(gen, d_Uni, 2 * n));
	

	/*for (int i = 0; i < n; i++)
	{
		x1[i] = 1.0;
		x2[i] = 1.0;
	}*/

	//cudaMemcpy(d_x1, x1, n* sizeof(double), cudaMemcpyHostToDevice);
	//cudaMemcpy(d_x2, x2, n* sizeof(double), cudaMemcpyHostToDevice);
	//cudaMemcpy(d_temp1, temp1, n*sizeof(double), cudaMemcpyHostToDevice);
	//cudaMemcpy(d_temp2, temp2, n*sizeof(double), cudaMemcpyHostToDevice);

	SDE_simulations<<<1,512>>>(d_x1, d_x2, d_temp1, d_temp2, n, time, d_Normal, d_Uni);

	cudaMemcpy(x1, d_x1, n*sizeof(double), cudaMemcpyDeviceToHost);
	cudaMemcpy(x2, d_x2, n*sizeof(double), cudaMemcpyDeviceToHost);
	cudaMemcpy(temp1, d_temp1, n * sizeof(double), cudaMemcpyDeviceToHost);
	cudaMemcpy(temp2, d_temp2, n * sizeof(double), cudaMemcpyDeviceToHost);

	for (int i = 0; i < 10; i++)
	{
		printf("%f - %f\n", x1[i], x2[i]);
	}


	CURAND_CALL(curandDestroyGenerator(gen));
	CUDA_CALL(cudaFree(d_Normal));
	CUDA_CALL(cudaFree(d_Uni));
	free(x1);
	free(x2);
	free(temp1);
	free(temp2);
	cudaFree(d_x1);
	cudaFree(d_x2);
	cudaFree(d_temp1);
	cudaFree(d_temp2);

	return 0;
}


	.file	"tmpxft_002dc473_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z48__device_stub__Z15SDE_simulationsPdS_S_S_iiPfS0_PdS_S_S_iiPfS0_
	.type	_Z48__device_stub__Z15SDE_simulationsPdS_S_S_iiPfS0_PdS_S_S_iiPfS0_, @function
_Z48__device_stub__Z15SDE_simulationsPdS_S_S_iiPfS0_PdS_S_S_iiPfS0_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movl	%r8d, 28(%rsp)
	movl	%r9d, 24(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z15SDE_simulationsPdS_S_S_iiPfS0_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L2:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z48__device_stub__Z15SDE_simulationsPdS_S_S_iiPfS0_PdS_S_S_iiPfS0_, .-_Z48__device_stub__Z15SDE_simulationsPdS_S_S_iiPfS0_PdS_S_S_iiPfS0_
	.globl	_Z15SDE_simulationsPdS_S_S_iiPfS0_
	.type	_Z15SDE_simulationsPdS_S_S_iiPfS0_, @function
_Z15SDE_simulationsPdS_S_S_iiPfS0_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z15SDE_simulationsPdS_S_S_iiPfS0_PdS_S_S_iiPfS0_
	.cfi_endproc
.LFE2053:
	.size	_Z15SDE_simulationsPdS_S_S_iiPfS0_, .-_Z15SDE_simulationsPdS_S_S_iiPfS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/burfel/waddington-project/master/src/simulations/SDE_solver_v2/SDE_solver_v2/kernel.cu"
.LC1:
	.string	"Error at %s:%d\n"
.LC4:
	.string	"%f - %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8000000, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$8000000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$8000000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$8000000, %edi
	movq	%rax, %r14
	call	malloc@PLT
	leaq	16(%rsp), %rdi
	movl	$8000000, %esi
	movq	%rax, %r13
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$80000000, %esi
	call	cudaMalloc@PLT
	movl	$80, %ecx
	testl	%eax, %eax
	jne	.L25
	leaq	56(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L11
	movl	$81, %ecx
.L25:
	leaq	.LC0(%rip), %rdx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L8
.L11:
	leaq	40(%rsp), %rdi
	movl	$100, %esi
	call	curandCreateGenerator@PLT
	movl	$82, %ecx
	testl	%eax, %eax
	jne	.L25
	movq	40(%rsp), %rdi
	movl	$1234, %esi
	call	curandSetPseudoRandomGeneratorSeed@PLT
	movl	$83, %ecx
	testl	%eax, %eax
	jne	.L25
	movss	.LC2(%rip), %xmm1
	movq	48(%rsp), %rsi
	xorps	%xmm0, %xmm0
	movl	$20000000, %edx
	movq	40(%rsp), %rdi
	call	curandGenerateNormal@PLT
	movl	$84, %ecx
	testl	%eax, %eax
	jne	.L25
	movq	56(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$2000000, %edx
	call	curandGenerateUniform@PLT
	movl	$85, %ecx
	testl	%eax, %eax
	jne	.L25
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	movl	$10, %r9d
	movl	$1000000, %r8d
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	48(%rsp), %rcx
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z48__device_stub__Z15SDE_simulationsPdS_S_S_iiPfS0_PdS_S_S_iiPfS0_
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L17:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%r12d, %r12d
	movl	$8000000, %edx
	leaq	.LC4(%rip), %r15
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$8000000, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r14, %rdi
	movl	$8000000, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$8000000, %edx
	call	cudaMemcpy@PLT
.L18:
	movsd	(%rbx,%r12), %xmm1
	movq	%r15, %rsi
	movl	$2, %edi
	movb	$2, %al
	movsd	0(%rbp,%r12), %xmm0
	addq	$8, %r12
	call	__printf_chk@PLT
	cmpq	$80, %r12
	jne	.L18
	movq	40(%rsp), %rdi
	call	curandDestroyGenerator@PLT
	movl	$112, %ecx
	testl	%eax, %eax
	jne	.L25
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movl	$113, %ecx
	testl	%eax, %eax
	jne	.L25
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	$114, %ecx
	testl	%eax, %eax
	jne	.L25
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L8:
	movq	88(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z15SDE_simulationsPdS_S_S_iiPfS0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15SDE_simulationsPdS_S_S_iiPfS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"

#include <stdlib.h>
#include <stdio.h>
#include <math.h>
 
#include <hiprand/hiprand.h> 

#define CUDA_CALL(x) do { if((x)!=hipSuccess){ \
	printf("Error at %s:%d\n",__FILE__,__LINE__); \
	return EXIT_FAILURE;}} while(0) 

#define CURAND_CALL(x) do { if((x)!=HIPRAND_STATUS_SUCCESS) { \
	printf("Error at %s:%d\n",__FILE__,__LINE__); \
	return EXIT_FAILURE;}} while(0)

using namespace std;



__global__ void SDE_simulations(double *x1, double *x2, double *temp1, double *temp2, int n, int time, float *d_Normal, float *d_Uni)
{
	int i = threadIdx.x;
	double a1 = 1.0;
	double a2 = 1.0;
	double b1 = 1.0;
	double b2 = 1.0;
	double k1 = 1.0;
	double k2 = 1.0;
	double H = 4.0;
	double S = 0.5;

	double dt = 10.0 / (double)time;


	if (i<n)
	{
		x1[i] = (double)d_Uni[2*i]*3.0;
		x2[i] = (double)d_Uni[2*i+1]*3.0;
		//x1[i] = 3.0;
		//x2[i] = 3.0;

		for (int j = 0; j < time - 1; j++)
		{
			temp1[i] = x1[i];
			temp2[i] = x2[i];

			x1[i] = temp1[i] + dt*(a1*pow(temp1[i], H) / (pow(temp1[i], H) + pow(S, H)) + b1*pow(S, H) / (pow(temp2[i], H) + pow(S, H)) - k1*temp1[i])+ sqrt(fabs(a1*pow(temp1[i], H) / (pow(temp1[i], H) + pow(S, H)) + b1*pow(S, H) / (pow(temp2[i], H) + pow(S, H)) - k1*temp1[i]))*(double)d_Normal[i*time + 2 * j];
			x2[i] = temp2[i] + dt*(a2*pow(temp2[i], H) / (pow(temp2[i], H) + pow(S, H)) + b2*pow(S, H) / (pow(temp1[i], H) + pow(S, H)) - k2*temp2[i])+ sqrt(fabs(a2*pow(temp2[i], H) / (pow(temp2[i], H) + pow(S, H)) + b2*pow(S, H) / (pow(temp1[i], H) + pow(S, H)) - k2*temp2[i]))*(double)d_Normal[i*time + 2 * j + 1];
		}
	}
}



int main()
{
	int n = 1000000;
	int time = 10;

	//CPU Memory variables
	double *x1, *x2 , *temp1, *temp2;
	x1 = (double *)malloc(n* sizeof(double));
	x2 = (double *)malloc(n* sizeof(double));
	temp1 = (double *)malloc(n * sizeof(double));
	temp2 = (double *)malloc(n * sizeof(double));

	//GPU Memory variables
	double *d_x2, *d_x1 , *d_temp1, *d_temp2;

	hipMalloc(&d_x1, n * sizeof(double));
	hipMalloc(&d_x2, n * sizeof(double));
	hipMalloc(&d_temp1, n * sizeof(double));
	hipMalloc(&d_temp2, n * sizeof(double));

	hiprandGenerator_t gen;
	float *d_Normal, *d_Uni;//, *hostData;
	//hostData = (double *)calloc(n, sizeof(double));

	CUDA_CALL(hipMalloc(&d_Normal, 2 * time*n * sizeof(float)));
	CUDA_CALL(hipMalloc(&d_Uni, 2*n * sizeof(float)));
	CURAND_CALL(hiprandCreateGenerator(&gen, HIPRAND_RNG_PSEUDO_DEFAULT));
	CURAND_CALL(hiprandSetPseudoRandomGeneratorSeed(gen, 1234ULL));
	CURAND_CALL(hiprandGenerateNormal(gen, d_Normal, 2 * n*time, 0.0, 10.0/(float)time));
	CURAND_CALL(hiprandGenerateUniform(gen, d_Uni, 2 * n));
	

	/*for (int i = 0; i < n; i++)
	{
		x1[i] = 1.0;
		x2[i] = 1.0;
	}*/

	//cudaMemcpy(d_x1, x1, n* sizeof(double), cudaMemcpyHostToDevice);
	//cudaMemcpy(d_x2, x2, n* sizeof(double), cudaMemcpyHostToDevice);
	//cudaMemcpy(d_temp1, temp1, n*sizeof(double), cudaMemcpyHostToDevice);
	//cudaMemcpy(d_temp2, temp2, n*sizeof(double), cudaMemcpyHostToDevice);

	SDE_simulations<<<1,512>>>(d_x1, d_x2, d_temp1, d_temp2, n, time, d_Normal, d_Uni);

	hipMemcpy(x1, d_x1, n*sizeof(double), hipMemcpyDeviceToHost);
	hipMemcpy(x2, d_x2, n*sizeof(double), hipMemcpyDeviceToHost);
	hipMemcpy(temp1, d_temp1, n * sizeof(double), hipMemcpyDeviceToHost);
	hipMemcpy(temp2, d_temp2, n * sizeof(double), hipMemcpyDeviceToHost);

	for (int i = 0; i < 10; i++)
	{
		printf("%f - %f\n", x1[i], x2[i]);
	}


	CURAND_CALL(hiprandDestroyGenerator(gen));
	CUDA_CALL(hipFree(d_Normal));
	CUDA_CALL(hipFree(d_Uni));
	free(x1);
	free(x2);
	free(temp1);
	free(temp2);
	hipFree(d_x1);
	hipFree(d_x2);
	hipFree(d_temp1);
	hipFree(d_temp2);

	return 0;
}


	.text
	.file	"kernel.hip"
	.globl	_Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_ # -- Begin function _Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_
	.type	_Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_,@function
_Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_: # @_Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15SDE_simulationsPdS_S_S_iiPfS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_, .Lfunc_end0-_Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$8000000, %edi                  # imm = 0x7A1200
	callq	malloc
	movq	%rax, %rbx
	movl	$8000000, %edi                  # imm = 0x7A1200
	callq	malloc
	movq	%rax, %r14
	movl	$8000000, %edi                  # imm = 0x7A1200
	callq	malloc
	movq	%rax, %r15
	movl	$8000000, %edi                  # imm = 0x7A1200
	callq	malloc
	movq	%rax, %r12
	leaq	48(%rsp), %rdi
	movl	$8000000, %esi                  # imm = 0x7A1200
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$8000000, %esi                  # imm = 0x7A1200
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$8000000, %esi                  # imm = 0x7A1200
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$8000000, %esi                  # imm = 0x7A1200
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$80000000, %esi                 # imm = 0x4C4B400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_3
# %bb.1:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$80, %edx
	jmp	.LBB1_2
.LBB1_3:
	leaq	16(%rsp), %rdi
	movl	$8000000, %esi                  # imm = 0x7A1200
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_5
# %bb.4:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$81, %edx
	jmp	.LBB1_2
.LBB1_5:
	leaq	8(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hiprandCreateGenerator
	testl	%eax, %eax
	je	.LBB1_7
# %bb.6:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$82, %edx
	jmp	.LBB1_2
.LBB1_7:
	movq	8(%rsp), %rdi
	movl	$1234, %esi                     # imm = 0x4D2
	callq	hiprandSetPseudoRandomGeneratorSeed
	testl	%eax, %eax
	je	.LBB1_9
# %bb.8:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$83, %edx
	jmp	.LBB1_2
.LBB1_9:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movl	$20000000, %edx                 # imm = 0x1312D00
	xorps	%xmm0, %xmm0
	callq	hiprandGenerateNormal
	testl	%eax, %eax
	je	.LBB1_11
# %bb.10:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$84, %edx
	jmp	.LBB1_2
.LBB1_11:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$2000000, %edx                  # imm = 0x1E8480
	callq	hiprandGenerateUniform
	testl	%eax, %eax
	je	.LBB1_13
# %bb.12:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$85, %edx
	jmp	.LBB1_2
.LBB1_13:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	511(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.14:
	movq	48(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	movl	$1000000, %r8d                  # imm = 0xF4240
	movl	$10, %r9d
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_15:
	movq	48(%rsp), %rsi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rsi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rsi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r13d, %r13d
.LBB1_16:                               # =>This Inner Loop Header: Depth=1
	movsd	(%rbx,%r13,8), %xmm0            # xmm0 = mem[0],zero
	movsd	(%r14,%r13,8), %xmm1            # xmm1 = mem[0],zero
	movl	$.L.str.2, %edi
	movb	$2, %al
	callq	printf
	incq	%r13
	cmpq	$10, %r13
	jne	.LBB1_16
# %bb.17:
	movq	8(%rsp), %rdi
	callq	hiprandDestroyGenerator
	testl	%eax, %eax
	je	.LBB1_19
# %bb.18:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$112, %edx
	jmp	.LBB1_2
.LBB1_19:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	je	.LBB1_21
# %bb.20:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$113, %edx
	jmp	.LBB1_2
.LBB1_21:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	je	.LBB1_23
# %bb.22:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$114, %edx
.LBB1_2:
	xorl	%eax, %eax
	callq	printf
	movl	$1, %eax
.LBB1_24:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_23:
	.cfi_def_cfa_offset 112
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB1_24
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15SDE_simulationsPdS_S_S_iiPfS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15SDE_simulationsPdS_S_S_iiPfS0_,@object # @_Z15SDE_simulationsPdS_S_S_iiPfS0_
	.section	.rodata,"a",@progbits
	.globl	_Z15SDE_simulationsPdS_S_S_iiPfS0_
	.p2align	3, 0x0
_Z15SDE_simulationsPdS_S_S_iiPfS0_:
	.quad	_Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_
	.size	_Z15SDE_simulationsPdS_S_S_iiPfS0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error at %s:%d\n"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/burfel/waddington-project/master/src/simulations/SDE_solver_v2/SDE_solver_v2/kernel.hip"
	.size	.L.str.1, 150

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%f - %f\n"
	.size	.L.str.2, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15SDE_simulationsPdS_S_S_iiPfS0_"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__SDE_simulationsPdS_S_S_iiPfS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15SDE_simulationsPdS_S_S_iiPfS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15SDE_simulationsPdS_S_S_iiPfS0_ ; -- Begin function _Z15SDE_simulationsPdS_S_S_iiPfS0_
	.globl	_Z15SDE_simulationsPdS_S_S_iiPfS0_
	.p2align	8
	.type	_Z15SDE_simulationsPdS_S_S_iiPfS0_,@function
_Z15SDE_simulationsPdS_S_S_iiPfS0_:     ; @_Z15SDE_simulationsPdS_S_S_iiPfS0_
; %bb.0:
	s_load_b64 s[12:13], s[0:1], 0x20
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s12, v0
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_load_b128 s[8:11], s[0:1], 0x28
	v_lshlrev_b32_e32 v6, 3, v0
	s_load_b256 s[0:7], s[0:1], 0x0
	s_cmp_lt_i32 s13, 2
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[1:2], v6, s[10:11]
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[3:4], v1
	v_cvt_f64_f32_e32 v[1:2], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[3:4], 0x40080000, v[3:4]
	v_mul_f64 v[1:2], 0x40080000, v[1:2]
	s_clause 0x1
	global_store_b64 v6, v[3:4], s[0:1]
	global_store_b64 v6, v[1:2], s[2:3]
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_cvt_f64_i32_e32 v[12:13], s13
	v_mul_lo_u32 v11, v0, s13
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v0, 0x3ff00000
	s_mov_b32 s10, -1
	s_mov_b32 s14, 0x968915a9
	s_mov_b32 s16, 0x4222de17
	s_mov_b32 s18, 0x3abe935a
	s_mov_b32 s20, 0x47e6c9c2
	s_mov_b32 s22, 0xcfa74449
	s_mov_b32 s24, 0x71bf3c30
	s_mov_b32 s26, 0x1c7792ce
	s_mov_b32 s28, 0x924920da
	s_mov_b32 s30, 0x9999999c
	s_mov_b32 s34, 0xfefa39ef
	s_mov_b32 s36, 0x3b39803f
	s_mov_b32 s38, 0xd5df274d
	s_mov_b32 s40, 0x652b82fe
	s_mov_b32 s42, 0xfca7ab0c
	s_mov_b32 s44, 0x6a5dcb37
	s_mov_b32 s46, 0x623fde64
	s_mov_b32 s48, 0x7c89e6b0
	s_mov_b32 s50, 0x14761f6e
	s_mov_b32 s52, 0x1852b7b0
	s_mov_b32 s54, 0x11122322
	s_mov_b32 s56, 0x555502a1
	s_mov_b32 s58, 0x55555511
	s_mov_b32 s60, 11
	s_mov_b32 s11, 0x3fafffff
	s_mov_b32 s15, 0x3fba6564
	s_mov_b32 s17, 0x3fbdee67
	s_mov_b32 s19, 0x3fbe25e4
	s_mov_b32 s21, 0x3fc110ef
	s_mov_b32 s23, 0x3fc3b13b
	s_mov_b32 s25, 0x3fc745d1
	s_mov_b32 s27, 0x3fcc71c7
	s_mov_b32 s29, 0x3fd24924
	s_mov_b32 s31, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_3)
	v_div_scale_f64 v[1:2], null, v[12:13], v[12:13], 0x40240000
	v_div_scale_f64 v[9:10], vcc_lo, 0x40240000, v[12:13], 0x40240000
	s_mov_b32 s35, 0x3fe62e42
	s_mov_b32 s37, 0x3c7abc9e
	s_mov_b32 s39, 0x3c8543b0
	s_mov_b32 s41, 0x3ff71547
	s_mov_b32 s43, 0x3e928af3
	s_mov_b32 s45, 0x3e5ade15
	s_mov_b32 s47, 0x3ec71dee
	s_mov_b32 s49, 0x3efa0199
	s_mov_b32 s51, 0x3f2a01a0
	s_mov_b32 s53, 0x3f56c16c
	s_mov_b32 s55, 0x3f811111
	s_mov_b32 s57, 0x3fa55555
	s_mov_b32 s59, 0x3fc55555
	s_mov_b32 s61, 0x3fe00000
	s_mov_b32 s63, 0xbfe55555
	s_mov_b32 s65, 0xbfe62e42
	s_mov_b32 s67, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[3:4], v[1:2]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[7:8], -v[1:2], v[3:4], 1.0
	v_fma_f64 v[3:4], v[3:4], v[7:8], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], -v[1:2], v[3:4], 1.0
	v_fma_f64 v[3:4], v[3:4], v[7:8], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[7:8], v[9:10], v[3:4]
	v_fma_f64 v[1:2], -v[1:2], v[7:8], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[14:15], v[1:2], v[3:4], v[7:8]
	v_add_co_u32 v1, s0, s0, v6
	v_add_co_ci_u32_e64 v2, null, s1, 0, s0
	v_add_co_u32 v3, s0, s2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, null, s3, 0, s0
	v_add_co_u32 v7, s0, s4, v6
	v_add_co_ci_u32_e64 v8, null, s5, 0, s0
	v_add_co_u32 v9, s0, s6, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s7, 0, s0
	s_add_i32 s7, s13, -1
	s_mov_b32 s12, 0x55555555
	s_mov_b32 s13, 0x3fe55555
	v_div_fixup_f64 v[13:14], v[14:15], v[12:13], 0x40240000
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[15:16], v[1:2], off
	s_mov_b32 s62, s12
	s_mov_b32 s64, s34
	s_mov_b32 s66, s36
	s_add_i32 s7, s7, -1
	s_waitcnt vmcnt(0)
	global_store_b64 v[7:8], v[15:16], off
	global_load_b64 v[17:18], v[3:4], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[9:10], v[17:18], off
	global_load_b64 v[15:16], v[7:8], off
	v_frexp_mant_f64_e64 v[23:24], |v[17:18]|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s0, s[12:13], v[23:24]
	s_waitcnt vmcnt(0)
	v_frexp_mant_f64_e64 v[19:20], |v[15:16]|
	v_cmp_gt_f64_e32 vcc_lo, s[12:13], v[19:20]
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[19:20], v[19:20], v6
	v_cndmask_b32_e64 v6, 0, 1, s0
	v_ldexp_f64 v[23:24], v[23:24], v6
	v_frexp_exp_i32_f64_e32 v6, v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[19:20], 1.0
	v_add_f64 v[35:36], v[19:20], -1.0
	v_add_f64 v[29:30], v[23:24], 1.0
	v_add_f64 v[41:42], v[23:24], -1.0
	v_subrev_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_rcp_f64_e32 v[25:26], v[21:22]
	v_add_f64 v[37:38], v[21:22], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], -v[37:38]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[27:28], -v[21:22], v[25:26], 1.0
	v_fma_f64 v[25:26], v[27:28], v[25:26], v[25:26]
	v_rcp_f64_e32 v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], -v[21:22], v[25:26], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[33:34], -v[29:30], v[27:28], 1.0
	v_fma_f64 v[25:26], v[31:32], v[25:26], v[25:26]
	v_fma_f64 v[27:28], v[33:34], v[27:28], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[31:32], v[35:36], v[25:26]
	v_fma_f64 v[33:34], -v[29:30], v[27:28], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[39:40], v[21:22], v[31:32]
	v_fma_f64 v[27:28], v[33:34], v[27:28], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[31:32], v[21:22], -v[39:40]
	v_mul_f64 v[33:34], v[41:42], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[31:32], v[19:20], v[21:22]
	v_add_f64 v[21:22], v[29:30], -1.0
	v_mul_f64 v[37:38], v[29:30], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[39:40], v[19:20]
	v_add_f64 v[21:22], v[23:24], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[33:34], v[29:30], -v[37:38]
	v_add_f64 v[29:30], v[35:36], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[33:34], v[21:22], v[23:24]
	v_add_f64 v[23:24], v[43:44], -v[39:40]
	v_add_f64 v[35:36], v[35:36], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[37:38], v[21:22]
	v_add_f64 v[19:20], v[23:24], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[35:36], -v[43:44]
	v_add_f64 v[35:36], v[41:42], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], v[23:24]
	v_add_f64 v[23:24], v[39:40], -v[37:38]
	v_add_f64 v[37:38], v[41:42], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[29:30], v[19:20]
	v_add_f64 v[21:22], v[23:24], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[37:38], -v[39:40]
	v_mul_f64 v[19:20], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], v[23:24]
	v_add_f64 v[23:24], v[31:32], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[35:36], v[21:22]
	v_add_f64 v[25:26], v[23:24], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[21:22], v[27:28], v[21:22]
	v_mul_f64 v[27:28], v[23:24], v[23:24]
	v_add_f64 v[19:20], v[19:20], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[33:34], v[21:22]
	v_fma_f64 v[29:30], v[23:24], v[23:24], -v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[19:20], v[19:20]
	v_add_f64 v[33:34], v[25:26], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[29:30], v[23:24], v[31:32], v[29:30]
	v_mul_f64 v[31:32], v[25:26], v[25:26]
	v_add_f64 v[21:22], v[21:22], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[27:28], v[29:30]
	v_fma_f64 v[35:36], v[25:26], v[25:26], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[21:22], v[21:22]
	v_fma_f64 v[39:40], v[33:34], s[16:17], s[14:15]
	v_add_f64 v[27:28], v[33:34], -v[27:28]
	v_mul_f64 v[49:50], v[23:24], v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[35:36], v[25:26], v[37:38], v[35:36]
	v_fma_f64 v[37:38], v[33:34], v[39:40], s[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[29:30], -v[27:28]
	v_add_f64 v[39:40], v[31:32], v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[37:38], v[33:34], v[37:38], s[20:21]
	v_fma_f64 v[41:42], v[39:40], s[16:17], s[14:15]
	v_add_f64 v[31:32], v[39:40], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[37:38], v[33:34], v[37:38], s[22:23]
	v_fma_f64 v[41:42], v[39:40], v[41:42], s[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[35:36], -v[31:32]
	v_fma_f64 v[37:38], v[33:34], v[37:38], s[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[39:40], v[41:42], s[20:21]
	v_fma_f64 v[37:38], v[33:34], v[37:38], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[39:40], v[41:42], s[22:23]
	v_fma_f64 v[37:38], v[33:34], v[37:38], s[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[39:40], v[41:42], s[24:25]
	v_fma_f64 v[37:38], v[33:34], v[37:38], s[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[39:40], v[41:42], s[26:27]
	v_mul_f64 v[43:44], v[33:34], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[39:40], v[41:42], s[28:29]
	v_fma_f64 v[29:30], v[33:34], v[37:38], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[39:40], v[41:42], s[30:31]
	v_fma_f64 v[29:30], v[27:28], v[37:38], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[37:38], v[39:40], v[41:42]
	v_add_f64 v[45:46], v[43:44], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[35:36], v[39:40], v[41:42], -v[37:38]
	v_add_f64 v[47:48], v[45:46], s[12:13]
	v_add_f64 v[43:44], v[45:46], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[35:36], v[31:32], v[41:42], v[35:36]
	v_add_f64 v[41:42], v[47:48], s[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[29:30], -v[43:44]
	v_fma_f64 v[43:44], v[33:34], v[23:24], -v[49:50]
	v_add_f64 v[51:52], v[37:38], v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[45:46], -v[41:42]
	v_add_f64 v[29:30], v[29:30], s[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[33:34], v[33:34], v[19:20], v[43:44]
	v_add_f64 v[43:44], v[51:52], s[12:13]
	v_add_f64 v[37:38], v[51:52], -v[37:38]
	v_mul_f64 v[45:46], v[25:26], v[39:40]
	v_ldexp_f64 v[19:20], v[19:20], 1
	v_add_f64 v[29:30], v[29:30], v[41:42]
	v_fma_f64 v[27:28], v[27:28], v[23:24], v[33:34]
	v_add_f64 v[33:34], v[43:44], s[62:63]
	v_add_f64 v[35:36], v[35:36], -v[37:38]
	v_fma_f64 v[37:38], v[39:40], v[25:26], -v[45:46]
	v_ldexp_f64 v[23:24], v[23:24], 1
	v_add_f64 v[41:42], v[47:48], v[29:30]
	v_add_f64 v[53:54], v[49:50], v[27:28]
	v_add_f64 v[33:34], v[51:52], -v[33:34]
	v_add_f64 v[35:36], v[35:36], s[38:39]
	v_fma_f64 v[37:38], v[39:40], v[21:22], v[37:38]
	v_ldexp_f64 v[21:22], v[21:22], 1
	v_add_f64 v[39:40], v[47:48], -v[41:42]
	v_mul_f64 v[47:48], v[53:54], v[41:42]
	v_add_f64 v[33:34], v[35:36], v[33:34]
	v_fma_f64 v[31:32], v[31:32], v[25:26], v[37:38]
	v_add_f64 v[35:36], v[53:54], -v[49:50]
	v_ldexp_f64 v[25:26], v[25:26], 1
	v_add_f64 v[29:30], v[29:30], v[39:40]
	v_fma_f64 v[37:38], v[53:54], v[41:42], -v[47:48]
	v_add_f64 v[39:40], v[43:44], v[33:34]
	v_add_f64 v[49:50], v[45:46], v[31:32]
	v_add_f64 v[27:28], v[27:28], -v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[29:30], v[53:54], v[29:30], v[37:38]
	v_add_f64 v[35:36], v[43:44], -v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[37:38], v[49:50], v[39:40]
	v_fma_f64 v[27:28], v[27:28], v[41:42], v[29:30]
	v_add_f64 v[29:30], v[49:50], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[33:34], v[35:36]
	v_fma_f64 v[35:36], v[49:50], v[39:40], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[47:48], v[27:28]
	v_add_f64 v[29:30], v[31:32], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[31:32], v[49:50], v[33:34], v[35:36]
	v_cvt_f64_i32_e32 v[33:34], v6
	v_frexp_exp_i32_f64_e32 v6, v[17:18]
	v_add_f64 v[35:36], v[23:24], v[41:42]
	v_add_f64 v[43:44], v[41:42], -v[47:48]
	v_fma_f64 v[29:30], v[29:30], v[39:40], v[31:32]
	v_mul_f64 v[31:32], v[33:34], s[34:35]
	v_subrev_co_ci_u32_e64 v6, vcc_lo, 0, v6, s0
	v_cmp_eq_f64_e32 vcc_lo, 1.0, v[15:16]
	v_cmp_eq_f64_e64 s0, 1.0, v[17:18]
	v_add_f64 v[23:24], v[35:36], -v[23:24]
	v_add_f64 v[27:28], v[27:28], -v[43:44]
	v_add_f64 v[39:40], v[37:38], v[29:30]
	v_fma_f64 v[43:44], v[33:34], s[34:35], -v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[41:42], -v[23:24]
	v_add_f64 v[19:20], v[19:20], v[27:28]
	v_cvt_f64_i32_e32 v[27:28], v6
	v_add_f64 v[41:42], v[25:26], v[39:40]
	v_add_f64 v[37:38], v[39:40], -v[37:38]
	v_fma_f64 v[33:34], v[33:34], s[36:37], v[43:44]
	v_cndmask_b32_e32 v6, 0x40100000, v0, vcc_lo
	v_add_f64 v[19:20], v[19:20], v[23:24]
	v_mul_f64 v[23:24], v[27:28], s[34:35]
	v_add_f64 v[25:26], v[41:42], -v[25:26]
	v_add_f64 v[29:30], v[29:30], -v[37:38]
	v_add_f64 v[37:38], v[31:32], v[33:34]
	v_add_f64 v[43:44], v[35:36], v[19:20]
	v_fma_f64 v[45:46], v[27:28], s[34:35], -v[23:24]
	v_add_f64 v[25:26], v[39:40], -v[25:26]
	v_add_f64 v[21:22], v[21:22], v[29:30]
	v_add_f64 v[31:32], v[37:38], -v[31:32]
	v_add_f64 v[29:30], v[37:38], v[43:44]
	v_fma_f64 v[27:28], v[27:28], s[36:37], v[45:46]
	v_add_f64 v[35:36], v[43:44], -v[35:36]
	v_add_f64 v[21:22], v[21:22], v[25:26]
	v_add_f64 v[31:32], v[33:34], -v[31:32]
	v_add_f64 v[25:26], v[29:30], -v[37:38]
	v_add_f64 v[39:40], v[23:24], v[27:28]
	v_add_f64 v[19:20], v[19:20], -v[35:36]
	v_add_f64 v[45:46], v[41:42], v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[47:48], v[29:30], -v[25:26]
	v_add_f64 v[25:26], v[43:44], -v[25:26]
	v_add_f64 v[23:24], v[39:40], -v[23:24]
	v_add_f64 v[49:50], v[39:40], v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[37:38], -v[47:48]
	v_add_f64 v[37:38], v[31:32], v[19:20]
	v_add_f64 v[23:24], v[27:28], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[49:50], -v[39:40]
	v_add_f64 v[25:26], v[25:26], v[33:34]
	v_add_f64 v[33:34], v[45:46], -v[41:42]
	v_add_f64 v[43:44], v[37:38], -v[31:32]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[41:42], v[49:50], -v[35:36]
	v_add_f64 v[27:28], v[45:46], -v[35:36]
	v_add_f64 v[25:26], v[37:38], v[25:26]
	v_add_f64 v[21:22], v[21:22], -v[33:34]
	v_add_f64 v[35:36], v[37:38], -v[43:44]
	v_add_f64 v[33:34], v[39:40], -v[41:42]
	v_add_f64 v[19:20], v[19:20], -v[43:44]
	v_add_f64 v[37:38], v[29:30], v[25:26]
	v_add_f64 v[39:40], v[23:24], v[21:22]
	v_add_f64 v[31:32], v[31:32], -v[35:36]
	v_add_f64 v[27:28], v[27:28], v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[37:38], -v[29:30]
	v_add_f64 v[33:34], v[39:40], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], v[31:32]
	v_add_f64 v[27:28], v[39:40], v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	v_add_f64 v[29:30], v[39:40], -v[33:34]
	v_add_f64 v[21:22], v[21:22], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_f64 v[31:32], v[49:50], v[27:28]
	v_mul_f64 v[33:34], v[5:6], 0.5
	v_add_f64 v[19:20], v[19:20], v[25:26]
	v_add_f64 v[23:24], v[23:24], -v[29:30]
	v_add_f64 v[25:26], v[31:32], -v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[37:38], v[19:20]
	v_add_f64 v[21:22], v[21:22], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[27:28], -v[25:26]
	v_add_f64 v[25:26], v[29:30], -v[37:38]
	v_mul_f64 v[27:28], v[5:6], v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[21:22], v[23:24]
	v_trunc_f64_e32 v[23:24], v[5:6]
	v_add_f64 v[19:20], v[19:20], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[25:26], v[5:6], v[29:30], -v[27:28]
	v_add_f64 v[29:30], v[31:32], v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_f64_e32 vcc_lo, v[23:24], v[5:6]
	v_fma_f64 v[19:20], v[5:6], v[19:20], v[25:26]
	v_cndmask_b32_e64 v6, 0x40100000, v0, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[29:30], -v[31:32]
	v_cmp_class_f64_e64 s0, v[27:28], 0x204
	v_mul_f64 v[25:26], v[5:6], v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], -v[23:24]
	v_fma_f64 v[23:24], v[5:6], v[29:30], -v[25:26]
	v_cmp_class_f64_e64 s1, v[25:26], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[5:6], v[21:22], v[23:24]
	v_add_f64 v[23:24], v[27:28], v[19:20]
	v_add_f64 v[29:30], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v32, v24, v28, s0
	v_cndmask_b32_e64 v31, v23, v27, s0
	v_add_f64 v[23:24], v[23:24], -v[27:28]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[37:38], v[31:32], s[40:41]
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[31:32]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[31:32]|
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[31:32]
	v_cndmask_b32_e64 v36, v30, v26, s1
	v_cndmask_b32_e64 v35, v29, v25, s1
	v_add_f64 v[25:26], v[29:30], -v[25:26]
	v_add_f64 v[19:20], v[19:20], -v[23:24]
	v_mul_f64 v[23:24], v[5:6], 0.5
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[39:40], v[35:36], s[40:41]
	v_rndne_f64_e32 v[37:38], v[37:38]
	v_cmp_nlt_f64_e64 s4, 0x40900000, v[35:36]
	v_cmp_ngt_f64_e64 s5, 0xc090cc00, v[35:36]
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[35:36]|
	v_add_f64 v[21:22], v[21:22], -v[25:26]
	v_cndmask_b32_e64 v20, 0, v20, s0
	v_cndmask_b32_e64 v19, 0, v19, s0
	s_and_b32 s0, s3, s2
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[37:38], s[64:65], v[31:32]
	v_cvt_i32_f64_e32 v12, v[37:38]
	v_trunc_f64_e32 v[31:32], v[5:6]
	v_cndmask_b32_e64 v22, 0, v22, s1
	v_cndmask_b32_e64 v21, 0, v21, s1
	v_fma_f64 v[43:44], v[39:40], s[64:65], v[35:36]
	v_fma_f64 v[41:42], v[37:38], s[66:67], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[43:44], v[39:40], s[66:67], v[43:44]
	v_fma_f64 v[45:46], v[41:42], s[44:45], s[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], s[44:45], s[42:43]
	v_fma_f64 v[45:46], v[41:42], v[45:46], s[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[46:47]
	v_fma_f64 v[45:46], v[41:42], v[45:46], s[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[48:49]
	v_fma_f64 v[45:46], v[41:42], v[45:46], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[50:51]
	v_fma_f64 v[45:46], v[41:42], v[45:46], s[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[52:53]
	v_fma_f64 v[45:46], v[41:42], v[45:46], s[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[54:55]
	v_fma_f64 v[45:46], v[41:42], v[45:46], s[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[56:57]
	v_fma_f64 v[45:46], v[41:42], v[45:46], s[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[58:59]
	v_fma_f64 v[45:46], v[41:42], v[45:46], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[60:61]
	v_fma_f64 v[45:46], v[41:42], v[45:46], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], v[47:48], 1.0
	v_fma_f64 v[37:38], v[41:42], v[45:46], 1.0
	v_cvt_i32_f64_e32 v41, v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[39:40], v[43:44], v[47:48], 1.0
	v_ldexp_f64 v[27:28], v[37:38], v12
	v_trunc_f64_e32 v[37:38], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[29:30], v[39:40], v41
	v_cndmask_b32_e64 v12, 0x7ff00000, v28, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, 0, v27, s0
	s_and_b32 s0, s5, s4
	v_cmp_neq_f64_e64 s6, v[37:38], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v26, 0, v12, s3
	v_cmp_eq_f64_e64 s3, v[31:32], v[5:6]
	v_fma_f64 v[19:20], v[25:26], v[19:20], v[25:26]
	v_cndmask_b32_e64 v27, 0, v29, s0
	v_cmp_class_f64_e64 s0, v[25:26], 0x204
	v_cndmask_b32_e64 v28, 0x7ff00000, v30, s4
	v_trunc_f64_e32 v[29:30], v[23:24]
	s_and_b32 s1, vcc_lo, s6
	v_cmp_eq_f64_e64 s4, 0, v[15:16]
	v_cndmask_b32_e64 v12, 0x3ff00000, v16, s1
	v_cndmask_b32_e64 v28, 0, v28, s5
	v_cmp_class_f64_e64 s5, v[15:16], 0x204
	v_cmp_class_f64_e64 s6, v[17:18], 0x204
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[21:22], v[27:28], v[21:22], v[27:28]
	v_cndmask_b32_e64 v19, v19, v25, s0
	v_cndmask_b32_e64 v20, v20, v26, s0
	v_cmp_class_f64_e64 s0, v[27:28], 0x204
	v_cmp_neq_f64_e64 s2, v[29:30], v[23:24]
	v_cndmask_b32_e64 v23, 0x7ff00000, 0, s4
	v_cndmask_b32_e64 v26, 0, v16, s1
	v_bfi_b32 v6, 0x7fffffff, v20, v12
	s_or_b32 s1, s4, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v23, 0x7fffffff, v23, v26
	v_cndmask_b32_e32 v12, 0x7ff80000, v6, vcc_lo
	v_cndmask_b32_e64 v21, v21, v27, s0
	v_cndmask_b32_e64 v22, v22, v28, s0
	s_and_b32 s0, s3, s2
	v_cmp_eq_f64_e64 s2, 0, v[17:18]
	v_cndmask_b32_e64 v25, 0x3ff00000, v18, s0
	v_cndmask_b32_e64 v24, 0, v21, s3
	v_cndmask_b32_e32 v20, 0, v19, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, 0, v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v22, 0x7fffffff, v22, v25
	v_cndmask_b32_e32 v19, v19, v20, vcc_lo
	v_cndmask_b32_e32 v6, v6, v12, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, 0, v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v12, 0x7ff80000, v22, s3
	v_cndmask_b32_e64 v20, 0x7ff00000, 0, s2
	v_cndmask_b32_e64 v6, v6, v23, s1
	v_cndmask_b32_e64 v23, 0, v18, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v22, v12, vcc_lo
	v_bfi_b32 v22, 0x7fffffff, v20, v23
	v_cndmask_b32_e32 v21, v21, v24, vcc_lo
	s_or_b32 vcc_lo, s2, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v22, v12, v22, vcc_lo
	v_cndmask_b32_e64 v19, v19, 0, s1
	v_cmp_o_f64_e64 s1, v[15:16], v[15:16]
	v_cndmask_b32_e64 v21, v21, 0, vcc_lo
	v_mov_b32_e32 v12, v5
	v_add_f64 v[21:22], v[21:22], s[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v19, 0, v19, s1
	v_cndmask_b32_e64 v20, 0x7ff80000, v6, s1
	v_add_f64 v[23:24], v[19:20], s[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[27:28], null, v[21:22], v[21:22], s[10:11]
	v_div_scale_f64 v[25:26], null, v[23:24], v[23:24], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[31:32], v[27:28]
	v_div_scale_f64 v[37:38], vcc_lo, v[19:20], v[23:24], v[19:20]
	v_rcp_f64_e32 v[29:30], v[25:26]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[35:36], -v[27:28], v[31:32], 1.0
	v_fma_f64 v[33:34], -v[25:26], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[31:32], v[35:36], v[31:32]
	v_fma_f64 v[29:30], v[29:30], v[33:34], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[35:36], -v[27:28], v[31:32], 1.0
	v_fma_f64 v[33:34], -v[25:26], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[31:32], v[35:36], v[31:32]
	v_fma_f64 v[29:30], v[29:30], v[33:34], v[29:30]
	v_div_scale_f64 v[33:34], s0, s[10:11], v[21:22], s[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[35:36], v[37:38], v[29:30]
	v_mul_f64 v[39:40], v[33:34], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[25:26], -v[25:26], v[35:36], v[37:38]
	v_fma_f64 v[27:28], -v[27:28], v[39:40], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[25:26], v[25:26], v[29:30], v[35:36]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[27:28], v[27:28], v[31:32], v[39:40]
	v_cmp_o_f64_e32 vcc_lo, v[17:18], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[17:18], v[25:26], v[23:24], v[19:20]
	v_div_fixup_f64 v[21:22], v[27:28], v[21:22], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, 0x7ff80000, v22, vcc_lo
	v_cndmask_b32_e32 v19, 0, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[19:20], v[17:18]
	v_add_f64 v[19:20], v[17:18], -v[15:16]
	v_lshlrev_b64 v[17:18], 2, v[11:12]
	v_add_nc_u32_e32 v11, 2, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v17, vcc_lo, s8, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, s9, v18, vcc_lo
	global_load_b64 v[17:18], v[17:18], off
	v_cmp_gt_f64_e64 s0, 0x10000000, |v[19:20]|
	v_fma_f64 v[15:16], v[13:14], v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, 0, 1, s0
	v_lshlrev_b32_e32 v6, 8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[21:22], |v[19:20]|, v6
	v_cndmask_b32_e64 v6, 0, 0xffffff80, s0
	v_rsq_f64_e32 v[23:24], v[21:22]
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[27:28], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[27:28], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[27:28], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[27:28], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[27:28], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[27:28], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[27:28], v[23:24], v[25:26]
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[25:26], v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v6
	v_dual_cndmask_b32 v20, v24, v22 :: v_dual_cndmask_b32 v19, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[15:16], v[19:20], v[25:26], v[15:16]
	global_store_b64 v[1:2], v[15:16], off
	global_load_b64 v[15:16], v[9:10], off
	global_load_b64 v[19:20], v[7:8], off
	s_waitcnt vmcnt(1)
	v_frexp_mant_f64_e64 v[21:22], |v[15:16]|
	s_waitcnt vmcnt(0)
	v_frexp_mant_f64_e64 v[25:26], |v[19:20]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[12:13], v[21:22]
	v_cmp_gt_f64_e64 s0, s[12:13], v[25:26]
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[21:22], v[21:22], v6
	v_cndmask_b32_e64 v6, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[25:26], v[25:26], v6
	v_frexp_exp_i32_f64_e32 v6, v[15:16]
	v_add_f64 v[23:24], v[21:22], 1.0
	v_add_f64 v[37:38], v[21:22], -1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[25:26], 1.0
	v_add_f64 v[43:44], v[25:26], -1.0
	v_subrev_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_rcp_f64_e32 v[27:28], v[23:24]
	v_add_f64 v[39:40], v[23:24], -1.0
	v_add_f64 v[21:22], v[21:22], -v[39:40]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[29:30], -v[23:24], v[27:28], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[27:28], v[29:30], v[27:28], v[27:28]
	v_rcp_f64_e32 v[29:30], v[31:32]
	v_fma_f64 v[33:34], -v[23:24], v[27:28], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[35:36], -v[31:32], v[29:30], 1.0
	v_fma_f64 v[27:28], v[33:34], v[27:28], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[35:36], v[29:30], v[29:30]
	v_mul_f64 v[33:34], v[37:38], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[35:36], -v[31:32], v[29:30], 1.0
	v_mul_f64 v[41:42], v[23:24], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[35:36], v[29:30], v[29:30]
	v_fma_f64 v[23:24], v[33:34], v[23:24], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[35:36], v[43:44], v[29:30]
	v_fma_f64 v[21:22], v[33:34], v[21:22], v[23:24]
	v_add_f64 v[23:24], v[31:32], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[39:40], v[31:32], v[35:36]
	v_add_f64 v[45:46], v[41:42], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[25:26], -v[23:24]
	v_fma_f64 v[25:26], v[35:36], v[31:32], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[37:38], -v[45:46]
	v_fma_f64 v[23:24], v[35:36], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[45:46], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[37:38], -v[31:32]
	v_add_f64 v[41:42], v[39:40], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[25:26], -v[21:22]
	v_add_f64 v[25:26], v[37:38], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[43:44], -v[41:42]
	v_add_f64 v[21:22], v[21:22], v[25:26]
	v_add_f64 v[25:26], v[41:42], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[43:44], -v[37:38]
	v_add_f64 v[21:22], v[31:32], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[25:26], -v[23:24]
	v_add_f64 v[25:26], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[21:22], v[27:28], v[21:22]
	v_add_f64 v[23:24], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[33:34], v[21:22]
	v_add_f64 v[23:24], v[37:38], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[25:26], -v[33:34]
	v_mul_f64 v[23:24], v[29:30], v[23:24]
	v_mul_f64 v[29:30], v[25:26], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[21:22], -v[27:28]
	v_add_f64 v[27:28], v[35:36], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[31:32], v[25:26], v[25:26], -v[29:30]
	v_add_f64 v[33:34], v[21:22], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[27:28], -v[35:36]
	v_fma_f64 v[31:32], v[25:26], v[33:34], v[31:32]
	v_mul_f64 v[33:34], v[27:28], v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[35:36]
	v_add_f64 v[35:36], v[29:30], v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[37:38], v[27:28], v[27:28], -v[33:34]
	v_add_f64 v[39:40], v[23:24], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[41:42], v[35:36], s[16:17], s[14:15]
	v_add_f64 v[29:30], v[35:36], -v[29:30]
	v_mul_f64 v[51:52], v[25:26], v[35:36]
	v_fma_f64 v[37:38], v[27:28], v[39:40], v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[39:40], v[35:36], v[41:42], s[18:19]
	v_add_f64 v[29:30], v[31:32], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[33:34], v[37:38]
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[43:44], v[41:42], s[16:17], s[14:15]
	v_add_f64 v[33:34], v[41:42], -v[33:34]
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[43:44], v[41:42], v[43:44], s[18:19]
	v_add_f64 v[33:34], v[37:38], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[24:25]
	v_fma_f64 v[43:44], v[41:42], v[43:44], s[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[26:27]
	v_fma_f64 v[43:44], v[41:42], v[43:44], s[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[28:29]
	v_fma_f64 v[43:44], v[41:42], v[43:44], s[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[30:31]
	v_fma_f64 v[43:44], v[41:42], v[43:44], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[45:46], v[35:36], v[39:40]
	v_fma_f64 v[43:44], v[41:42], v[43:44], s[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[35:36], v[39:40], -v[45:46]
	v_fma_f64 v[43:44], v[41:42], v[43:44], s[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[29:30], v[39:40], v[31:32]
	v_mul_f64 v[39:40], v[41:42], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[45:46], v[31:32]
	v_fma_f64 v[37:38], v[41:42], v[43:44], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[47:48], s[12:13]
	v_add_f64 v[45:46], v[47:48], -v[45:46]
	v_fma_f64 v[37:38], v[33:34], v[43:44], v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[49:50], s[62:63]
	v_add_f64 v[31:32], v[31:32], -v[45:46]
	v_fma_f64 v[45:46], v[35:36], v[25:26], -v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[53:54], v[39:40], v[37:38]
	v_add_f64 v[43:44], v[47:48], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[31:32], v[31:32], s[38:39]
	v_fma_f64 v[35:36], v[35:36], v[21:22], v[45:46]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[45:46], v[53:54], s[12:13]
	v_add_f64 v[39:40], v[53:54], -v[39:40]
	v_mul_f64 v[47:48], v[27:28], v[41:42]
	v_ldexp_f64 v[21:22], v[21:22], 1
	v_add_f64 v[31:32], v[31:32], v[43:44]
	v_fma_f64 v[29:30], v[29:30], v[25:26], v[35:36]
	v_add_f64 v[35:36], v[45:46], s[62:63]
	v_add_f64 v[37:38], v[37:38], -v[39:40]
	v_fma_f64 v[39:40], v[41:42], v[27:28], -v[47:48]
	v_ldexp_f64 v[25:26], v[25:26], 1
	v_add_f64 v[43:44], v[49:50], v[31:32]
	v_add_f64 v[55:56], v[51:52], v[29:30]
	v_add_f64 v[35:36], v[53:54], -v[35:36]
	v_add_f64 v[37:38], v[37:38], s[38:39]
	v_fma_f64 v[39:40], v[41:42], v[23:24], v[39:40]
	v_ldexp_f64 v[23:24], v[23:24], 1
	v_add_f64 v[41:42], v[49:50], -v[43:44]
	v_mul_f64 v[49:50], v[55:56], v[43:44]
	v_add_f64 v[35:36], v[37:38], v[35:36]
	v_fma_f64 v[33:34], v[33:34], v[27:28], v[39:40]
	v_add_f64 v[37:38], v[55:56], -v[51:52]
	v_ldexp_f64 v[27:28], v[27:28], 1
	v_add_f64 v[31:32], v[31:32], v[41:42]
	v_fma_f64 v[39:40], v[55:56], v[43:44], -v[49:50]
	v_add_f64 v[41:42], v[45:46], v[35:36]
	v_add_f64 v[51:52], v[47:48], v[33:34]
	v_add_f64 v[29:30], v[29:30], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[31:32], v[55:56], v[31:32], v[39:40]
	v_add_f64 v[37:38], v[45:46], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[39:40], v[51:52], v[41:42]
	v_fma_f64 v[29:30], v[29:30], v[43:44], v[31:32]
	v_add_f64 v[31:32], v[51:52], -v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[35:36], v[37:38]
	v_fma_f64 v[37:38], v[51:52], v[41:42], -v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[43:44], v[49:50], v[29:30]
	v_add_f64 v[31:32], v[33:34], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[33:34], v[51:52], v[35:36], v[37:38]
	v_cvt_f64_i32_e32 v[35:36], v6
	v_frexp_exp_i32_f64_e32 v6, v[19:20]
	v_add_f64 v[37:38], v[25:26], v[43:44]
	v_add_f64 v[45:46], v[43:44], -v[49:50]
	v_fma_f64 v[31:32], v[31:32], v[41:42], v[33:34]
	v_mul_f64 v[33:34], v[35:36], s[34:35]
	v_subrev_co_ci_u32_e64 v6, vcc_lo, 0, v6, s0
	v_cmp_eq_f64_e32 vcc_lo, 1.0, v[15:16]
	v_cmp_eq_f64_e64 s0, 1.0, v[19:20]
	v_add_f64 v[25:26], v[37:38], -v[25:26]
	v_add_f64 v[29:30], v[29:30], -v[45:46]
	v_add_f64 v[41:42], v[39:40], v[31:32]
	v_fma_f64 v[45:46], v[35:36], s[34:35], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[43:44], -v[25:26]
	v_add_f64 v[21:22], v[21:22], v[29:30]
	v_cvt_f64_i32_e32 v[29:30], v6
	v_add_f64 v[43:44], v[27:28], v[41:42]
	v_add_f64 v[39:40], v[41:42], -v[39:40]
	v_fma_f64 v[35:36], v[35:36], s[36:37], v[45:46]
	v_cndmask_b32_e32 v6, 0x40100000, v0, vcc_lo
	v_add_f64 v[21:22], v[21:22], v[25:26]
	v_mul_f64 v[25:26], v[29:30], s[34:35]
	v_add_f64 v[27:28], v[43:44], -v[27:28]
	v_add_f64 v[31:32], v[31:32], -v[39:40]
	v_add_f64 v[39:40], v[33:34], v[35:36]
	v_add_f64 v[45:46], v[37:38], v[21:22]
	v_fma_f64 v[47:48], v[29:30], s[34:35], -v[25:26]
	v_add_f64 v[27:28], v[41:42], -v[27:28]
	v_add_f64 v[23:24], v[23:24], v[31:32]
	v_add_f64 v[33:34], v[39:40], -v[33:34]
	v_add_f64 v[31:32], v[39:40], v[45:46]
	v_fma_f64 v[29:30], v[29:30], s[36:37], v[47:48]
	v_add_f64 v[37:38], v[45:46], -v[37:38]
	v_add_f64 v[23:24], v[23:24], v[27:28]
	v_add_f64 v[33:34], v[35:36], -v[33:34]
	v_add_f64 v[27:28], v[31:32], -v[39:40]
	v_add_f64 v[41:42], v[25:26], v[29:30]
	v_add_f64 v[21:22], v[21:22], -v[37:38]
	v_add_f64 v[47:48], v[43:44], v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[49:50], v[31:32], -v[27:28]
	v_add_f64 v[27:28], v[45:46], -v[27:28]
	v_add_f64 v[25:26], v[41:42], -v[25:26]
	v_add_f64 v[51:52], v[41:42], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[39:40], -v[49:50]
	v_add_f64 v[39:40], v[33:34], v[21:22]
	v_add_f64 v[25:26], v[29:30], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[37:38], v[51:52], -v[41:42]
	v_add_f64 v[27:28], v[27:28], v[35:36]
	v_add_f64 v[35:36], v[47:48], -v[43:44]
	v_add_f64 v[45:46], v[39:40], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[43:44], v[51:52], -v[37:38]
	v_add_f64 v[29:30], v[47:48], -v[37:38]
	v_add_f64 v[27:28], v[39:40], v[27:28]
	v_add_f64 v[23:24], v[23:24], -v[35:36]
	v_add_f64 v[37:38], v[39:40], -v[45:46]
	v_add_f64 v[35:36], v[41:42], -v[43:44]
	v_add_f64 v[21:22], v[21:22], -v[45:46]
	v_add_f64 v[39:40], v[31:32], v[27:28]
	v_add_f64 v[41:42], v[25:26], v[23:24]
	v_add_f64 v[33:34], v[33:34], -v[37:38]
	v_add_f64 v[29:30], v[29:30], v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[31:32], v[39:40], -v[31:32]
	v_add_f64 v[35:36], v[41:42], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[21:22], v[33:34]
	v_add_f64 v[29:30], v[41:42], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[27:28], v[27:28], -v[31:32]
	v_add_f64 v[31:32], v[41:42], -v[35:36]
	v_add_f64 v[23:24], v[23:24], -v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[51:52], v[29:30]
	v_mul_f64 v[35:36], v[5:6], 0.5
	v_add_f64 v[21:22], v[21:22], v[27:28]
	v_add_f64 v[25:26], v[25:26], -v[31:32]
	v_add_f64 v[27:28], v[33:34], -v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[39:40], v[21:22]
	v_add_f64 v[23:24], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[29:30], -v[27:28]
	v_add_f64 v[27:28], v[31:32], -v[39:40]
	v_mul_f64 v[29:30], v[5:6], v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_trunc_f64_e32 v[25:26], v[5:6]
	v_add_f64 v[21:22], v[21:22], -v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[27:28], v[5:6], v[31:32], -v[29:30]
	v_add_f64 v[31:32], v[33:34], v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_f64_e32 vcc_lo, v[25:26], v[5:6]
	v_fma_f64 v[21:22], v[5:6], v[21:22], v[27:28]
	v_cndmask_b32_e64 v6, 0x40100000, v0, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[31:32], -v[33:34]
	v_cmp_class_f64_e64 s0, v[29:30], 0x204
	v_mul_f64 v[27:28], v[5:6], v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	v_fma_f64 v[25:26], v[5:6], v[31:32], -v[27:28]
	v_cmp_class_f64_e64 s1, v[27:28], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[5:6], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[29:30], v[21:22]
	v_add_f64 v[31:32], v[27:28], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v34, v26, v30, s0
	v_cndmask_b32_e64 v33, v25, v29, s0
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[39:40], v[33:34], s[40:41]
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[33:34]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[33:34]|
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[33:34]
	v_cndmask_b32_e64 v38, v32, v28, s1
	v_cndmask_b32_e64 v37, v31, v27, s1
	v_add_f64 v[27:28], v[31:32], -v[27:28]
	v_add_f64 v[21:22], v[21:22], -v[25:26]
	v_mul_f64 v[25:26], v[5:6], 0.5
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[41:42], v[37:38], s[40:41]
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_cmp_nlt_f64_e64 s4, 0x40900000, v[37:38]
	v_cmp_ngt_f64_e64 s5, 0xc090cc00, v[37:38]
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[37:38]|
	v_add_f64 v[23:24], v[23:24], -v[27:28]
	v_cndmask_b32_e64 v22, 0, v22, s0
	v_cndmask_b32_e64 v21, 0, v21, s0
	s_and_b32 s0, s3, s2
	v_rndne_f64_e32 v[41:42], v[41:42]
	v_fma_f64 v[43:44], v[39:40], s[64:65], v[33:34]
	v_cvt_i32_f64_e32 v12, v[39:40]
	v_trunc_f64_e32 v[33:34], v[5:6]
	v_cndmask_b32_e64 v24, 0, v24, s1
	v_cndmask_b32_e64 v23, 0, v23, s1
	v_fma_f64 v[45:46], v[41:42], s[64:65], v[37:38]
	v_fma_f64 v[43:44], v[39:40], s[66:67], v[43:44]
	v_cvt_i32_f64_e32 v17, v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[45:46], v[41:42], s[66:67], v[45:46]
	v_fma_f64 v[47:48], v[43:44], s[44:45], s[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], s[44:45], s[42:43]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[46:47]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[48:49]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[50:51]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[52:53]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[54:55]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[56:57]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[58:59]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[60:61]
	v_fma_f64 v[47:48], v[43:44], v[47:48], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], 1.0
	v_fma_f64 v[39:40], v[43:44], v[47:48], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[45:46], v[49:50], 1.0
	v_ldexp_f64 v[29:30], v[39:40], v12
	v_trunc_f64_e32 v[39:40], v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[31:32], v[41:42], v17
	v_cndmask_b32_e64 v12, 0x7ff00000, v30, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v27, 0, v29, s0
	v_cmp_neq_f64_e64 s6, v[39:40], v[35:36]
	s_and_b32 s0, s5, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v28, 0, v12, s3
	v_cmp_eq_f64_e64 s3, v[33:34], v[5:6]
	v_fma_f64 v[21:22], v[27:28], v[21:22], v[27:28]
	v_cndmask_b32_e64 v29, 0, v31, s0
	v_cmp_class_f64_e64 s0, v[27:28], 0x204
	v_cndmask_b32_e64 v17, 0x7ff00000, v32, s4
	v_trunc_f64_e32 v[31:32], v[25:26]
	s_and_b32 s1, vcc_lo, s6
	v_cmp_eq_f64_e64 s4, 0, v[15:16]
	v_cndmask_b32_e64 v12, 0x3ff00000, v16, s1
	v_cndmask_b32_e64 v30, 0, v17, s5
	v_cmp_class_f64_e64 s5, v[15:16], 0x204
	v_cmp_class_f64_e64 s6, v[19:20], 0x204
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[23:24], v[29:30], v[23:24], v[29:30]
	v_cndmask_b32_e64 v17, v21, v27, s0
	v_cndmask_b32_e64 v21, v22, v28, s0
	v_cmp_class_f64_e64 s0, v[29:30], 0x204
	v_cmp_neq_f64_e64 s2, v[31:32], v[25:26]
	v_cndmask_b32_e64 v27, 0, v16, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_bfi_b32 v6, 0x7fffffff, v21, v12
	v_cndmask_b32_e32 v21, 0, v17, vcc_lo
	s_or_b32 s1, s4, s5
	v_cndmask_b32_e32 v12, 0x7ff80000, v6, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, 0, v[15:16]
	v_cndmask_b32_e64 v22, v23, v29, s0
	v_cndmask_b32_e64 v23, 0x7ff00000, 0, s4
	v_cndmask_b32_e64 v24, v24, v30, s0
	s_and_b32 s0, s3, s2
	v_cmp_eq_f64_e64 s2, 0, v[19:20]
	v_cndmask_b32_e64 v26, 0x3ff00000, v20, s0
	v_bfi_b32 v23, 0x7fffffff, v23, v27
	v_cndmask_b32_e64 v25, 0, v22, s3
	v_dual_cndmask_b32 v17, v17, v21 :: v_dual_cndmask_b32 v6, v6, v12
	v_cmp_gt_f64_e32 vcc_lo, 0, v[19:20]
	v_bfi_b32 v24, 0x7fffffff, v24, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, v17, 0, s1
	v_cndmask_b32_e64 v6, v6, v23, s1
	v_cmp_o_f64_e64 s1, v[15:16], v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v12, 0x7ff80000, v24, s3
	v_cndmask_b32_e64 v23, 0, v20, s0
	v_cndmask_b32_e64 v21, 0x7ff00000, 0, s2
	v_cndmask_b32_e32 v12, v24, v12, vcc_lo
	v_cndmask_b32_e32 v24, v22, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_bfi_b32 v25, 0x7fffffff, v21, v23
	s_or_b32 vcc_lo, s2, s6
	s_cmp_lg_u32 s7, 0
	v_cndmask_b32_e64 v21, 0, v17, s1
	v_cndmask_b32_e64 v22, 0x7ff80000, v6, s1
	v_cndmask_b32_e64 v23, v24, 0, vcc_lo
	v_cndmask_b32_e32 v24, v12, v25, vcc_lo
	v_cvt_f64_f32_e32 v[17:18], v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[21:22], s[10:11]
	v_add_f64 v[23:24], v[23:24], s[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[27:28], null, v[25:26], v[25:26], v[21:22]
	v_div_scale_f64 v[29:30], null, v[23:24], v[23:24], s[10:11]
	v_div_scale_f64 v[39:40], vcc_lo, v[21:22], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[31:32], v[27:28]
	v_rcp_f64_e32 v[33:34], v[29:30]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[35:36], -v[27:28], v[31:32], 1.0
	v_fma_f64 v[37:38], -v[29:30], v[33:34], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[31:32], v[35:36], v[31:32]
	v_fma_f64 v[33:34], v[33:34], v[37:38], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[35:36], -v[27:28], v[31:32], 1.0
	v_fma_f64 v[37:38], -v[29:30], v[33:34], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[31:32], v[31:32], v[35:36], v[31:32]
	v_div_scale_f64 v[35:36], s0, s[10:11], v[23:24], s[10:11]
	v_fma_f64 v[33:34], v[33:34], v[37:38], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[37:38], v[39:40], v[31:32]
	v_mul_f64 v[41:42], v[35:36], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[27:28], -v[27:28], v[37:38], v[39:40]
	v_fma_f64 v[29:30], -v[29:30], v[41:42], v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[27:28], v[27:28], v[31:32], v[37:38]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[29:30], v[29:30], v[33:34], v[41:42]
	v_cmp_o_f64_e32 vcc_lo, v[19:20], v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[19:20], v[27:28], v[25:26], v[21:22]
	v_div_fixup_f64 v[23:24], v[29:30], v[23:24], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v22, 0x7ff80000, v24, vcc_lo
	v_cndmask_b32_e32 v21, 0, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_add_f64 v[19:20], v[19:20], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0x10000000, |v[19:20]|
	v_fma_f64 v[15:16], v[13:14], v[19:20], v[15:16]
	v_cndmask_b32_e64 v6, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v6, 8, v6
	v_ldexp_f64 v[21:22], |v[19:20]|, v6
	v_cndmask_b32_e64 v6, 0, 0xffffff80, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[23:24], v[21:22]
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	v_fma_f64 v[27:28], -v[23:24], v[25:26], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[25:26], v[25:26], v[27:28], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[27:28], v[23:24]
	v_fma_f64 v[27:28], -v[25:26], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[27:28], v[23:24], v[25:26]
	v_fma_f64 v[27:28], -v[25:26], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], v[27:28], v[23:24], v[25:26]
	v_ldexp_f64 v[23:24], v[23:24], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v23, v21 :: v_dual_cndmask_b32 v20, v24, v22
	v_fma_f64 v[15:16], v[19:20], v[17:18], v[15:16]
	global_store_b64 v[3:4], v[15:16], off
	s_cbranch_scc1 .LBB0_3
.LBB0_4:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15SDE_simulationsPdS_S_S_iiPfS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 56
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 57
		.amdhsa_next_free_sgpr 68
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15SDE_simulationsPdS_S_S_iiPfS0_, .Lfunc_end0-_Z15SDE_simulationsPdS_S_S_iiPfS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 8128
; NumSgprs: 70
; NumVgprs: 57
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 8
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 70
; NumVGPRsForWavesPerEU: 57
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 56
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15SDE_simulationsPdS_S_S_iiPfS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     70
    .sgpr_spill_count: 0
    .symbol:         _Z15SDE_simulationsPdS_S_S_iiPfS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     57
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
