#include <stdio.h>
#include <stdlib.h>
#include <string.h> /* memcpy */
#include <math.h>
#include <stdint.h>

void *cuda_upload_var(void *host_var, int size)
{
	void *cuda_var;
	cudaMalloc(&cuda_var, 4);
	cudaMemcpy(cuda_var, host_var, size, cudaMemcpyHostToDevice);
	return cuda_var;
}
void cuda_download_var(void *cuda_var, void *host_var, int size)
{
	cudaMemcpy(host_var, cuda_var, size, cudaMemcpyDeviceToHost);
	cudaFree(cuda_var);
}

typedef struct floatfield2
{
    float *m;
    int size[2];
    int is_device_field;
} floatfield2;

void memcpy_field_floatfield2(floatfield2 dst, floatfield2 src)
{
    if (dst.is_device_field == 0 && src.is_device_field == 0) {
        cudaMemcpy(dst.m, src.m, (sizeof(*dst.m))*dst.size[0]*dst.size[1], cudaMemcpyHostToHost);
    }
    if (dst.is_device_field == 1 && src.is_device_field == 0) {
        cudaMemcpy(dst.m, src.m, (sizeof(*dst.m))*dst.size[0]*dst.size[1], cudaMemcpyHostToDevice);
    }
    if (dst.is_device_field == 0 && src.is_device_field == 1) {
        cudaMemcpy(dst.m, src.m, (sizeof(*dst.m))*dst.size[0]*dst.size[1], cudaMemcpyDeviceToHost);
    }
    if (dst.is_device_field == 1 && src.is_device_field == 1) {
        cudaMemcpy(dst.m, src.m, (sizeof(*dst.m))*dst.size[0]*dst.size[1], cudaMemcpyDeviceToDevice);
    }
}

int size_floatfield2(floatfield2 field, int index)
{
    return field.size[index];
}

floatfield2 alloc_host_field_floatfield2(int size_0, int size_1)
{
    floatfield2 field;
    field.m = (float*)malloc((sizeof(*field.m))*size_0*size_1);
    field.size[0] = size_0;
    field.size[1] = size_1;
    field.is_device_field = 0;
    return field;
}

void free_host_field_floatfield2(floatfield2 field)
{
    free(field.m);
}

floatfield2 alloc_device_field_floatfield2(int size_0, int size_1)
{
    floatfield2 field;
    cudaMalloc((void**)&field.m, (sizeof(*field.m))*size_0*size_1);
    field.size[0] = size_0;
    field.size[1] = size_1;
    field.is_device_field = 1;
    return field;
}

void free_device_field_floatfield2(floatfield2 field)
{
    cudaFree(field.m);
}

typedef struct intmat2
{
    int m[2];
} intmat2;

int printf(const char *fmt, ...);

typedef floatfield2 Field;
__global__ void kernel_0(floatfield2 output, floatfield2 input, int size_x, int size_y)
{
    if (threadIdx.x + blockIdx.x*blockDim.x >= output.size[0]*output.size[1]) {
        return;
    }
    intmat2 id;
    id.m[1*0] = (threadIdx.x + blockIdx.x*blockDim.x) % output.size[0]/1;
    id.m[1*1] = (threadIdx.x + blockIdx.x*blockDim.x) % (output.size[0]*output.size[1])/output.size[0];

    int x = id.m[1*0];

    int y = id.m[1*1];

    int nx = (x + 1) % size_x;

    int ny = (y + 1) % size_y;

    int px = (x - 1 + size_x) % size_x;

    int py = (y - 1 + size_y) % size_y;
    output.m[output.size[1]*x + 1*y] = input.m[input.size[1]*x + 1*y] + input.m[input.size[1]*nx + 1*y] + input.m[input.size[1]*px + 1*y] + input.m[input.size[1]*x + 1*ny] + input.m[input.size[1]*x + 1*py];
    output.m[output.size[1]*x + 1*y] /= 5.000000;
}


int main(int argc, char **argv)
{

    int size_x = 20;

    int size_y = 20;

    floatfield2 host_field = alloc_host_field_floatfield2(size_x, size_y);

    floatfield2 device_field_1 = alloc_device_field_floatfield2(size_x, size_y);

    floatfield2 device_field_2 = alloc_device_field_floatfield2(size_x, size_y);

    /* Init field */

    {

        for (int x = 0; x < size_x; ++x) {

            for (int y = 0; y < size_y; ++y) {
                host_field.m[host_field.size[1]*x + 1*y] = 0;
            }
        }
        host_field.m[host_field.size[1]*(size_x/2) + 1*(size_y/2)] = 1000;
    }
    memcpy_field_floatfield2(device_field_1, host_field);

    for (int i = 0; i < 5; ++i) {

        floatfield2 *input = &device_field_1;

        floatfield2 *output = &device_field_2;

        /* Swap */

        if (i % 2 == 1) {

            floatfield2 *tmp = output;
            output = input;
            input = tmp;
        }

        /* Diffusion! */

        {
            dim3 dim_grid((*output).size[0]*(*output).size[1]/128 + 1, 1, 1);
            dim3 dim_block(128, 1, 1);
            kernel_0<<<dim_grid, dim_block>>>(*output, *input, size_x, size_y);
        }
        memcpy_field_floatfield2(host_field, *output);

        /* Print current state */

        for (int y = 0; y < size_y; ++y) {

            for (int x = 0; x < size_x; ++x) {

                const char *ch = " ";

                if (host_field.m[host_field.size[1]*x + 1*y] > 0.500000) {
                    ch = "#";
                } else if (host_field.m[host_field.size[1]*x + 1*y] > 0.100000) {
                    ch = ".";
                }
                printf("%s", ch);
            }
            printf("\n");
        }
        printf("\n");
    }
    free_host_field_floatfield2(host_field);
    free_device_field_floatfield2(device_field_1);
    free_device_field_floatfield2(device_field_2);

    return 0;
}

	.file	"tmpxft_002d53cb_00000000-6_diffusion.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2038:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2038:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15cuda_upload_varPvi
	.type	_Z15cuda_upload_varPvi, @function
_Z15cuda_upload_varPvi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%esi, %ebx
	movl	$4, %esi
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movslq	%ebx, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rax
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z15cuda_upload_varPvi, .-_Z15cuda_upload_varPvi
	.globl	_Z17cuda_download_varPvS_i
	.type	_Z17cuda_download_varPvS_i, @function
_Z17cuda_download_varPvS_i:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movslq	%edx, %rdx
	movq	%rsi, %rdi
	movl	$2, %ecx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z17cuda_download_varPvS_i, .-_Z17cuda_download_varPvS_i
	.globl	_Z24memcpy_field_floatfield211floatfield2S_
	.type	_Z24memcpy_field_floatfield211floatfield2S_, @function
_Z24memcpy_field_floatfield211floatfield2S_:
.LFB2029:
	.cfi_startproc
	endbr64
	movl	24(%rsp), %r8d
	movq	8(%rsp), %rdi
	movslq	16(%rsp), %rdx
	movslq	20(%rsp), %rax
	movq	32(%rsp), %rsi
	movl	48(%rsp), %ecx
	testl	%r8d, %r8d
	jne	.L9
	testl	%ecx, %ecx
	jne	.L10
	imulq	%rax, %rdx
	salq	$2, %rdx
	jmp	.L15
.L9:
	decl	%r8d
	jne	.L8
	testl	%ecx, %ecx
	jne	.L12
	imulq	%rax, %rdx
	movl	$1, %ecx
	salq	$2, %rdx
	jmp	.L15
.L12:
	decl	%ecx
	jne	.L8
	imulq	%rax, %rdx
	movl	$3, %ecx
	salq	$2, %rdx
.L15:
	jmp	cudaMemcpy@PLT
.L10:
	decl	%ecx
	jne	.L8
	imulq	%rax, %rdx
	movl	$2, %ecx
	salq	$2, %rdx
	jmp	.L15
.L8:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z24memcpy_field_floatfield211floatfield2S_, .-_Z24memcpy_field_floatfield211floatfield2S_
	.globl	_Z16size_floatfield211floatfield2i
	.type	_Z16size_floatfield211floatfield2i, @function
_Z16size_floatfield211floatfield2i:
.LFB2030:
	.cfi_startproc
	endbr64
	movslq	%edi, %rdi
	movl	16(%rsp,%rdi,4), %eax
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z16size_floatfield211floatfield2i, .-_Z16size_floatfield211floatfield2i
	.globl	_Z28alloc_host_field_floatfield2ii
	.type	_Z28alloc_host_field_floatfield2ii, @function
_Z28alloc_host_field_floatfield2ii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movslq	%edx, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rax, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	movslq	%esi, %rdi
	movq	%rdi, %r12
	imulq	%rax, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movl	%r12d, 8(%rbx)
	movq	%rax, (%rbx)
	xorl	%eax, %eax
	movl	%eax, 16(%rbx)
	movq	%rbx, %rax
	movl	%ebp, 12(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z28alloc_host_field_floatfield2ii, .-_Z28alloc_host_field_floatfield2ii
	.globl	_Z27free_host_field_floatfield211floatfield2
	.type	_Z27free_host_field_floatfield211floatfield2, @function
_Z27free_host_field_floatfield211floatfield2:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	8(%rsp), %rdi
	jmp	free@PLT
	.cfi_endproc
.LFE2032:
	.size	_Z27free_host_field_floatfield211floatfield2, .-_Z27free_host_field_floatfield211floatfield2
	.globl	_Z30alloc_device_field_floatfield2ii
	.type	_Z30alloc_device_field_floatfield2ii, @function
_Z30alloc_device_field_floatfield2ii:
.LFB2033:
	.cfi_startproc
	endbr64
	movslq	%edx, %rax
	movslq	%esi, %rsi
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	imulq	%rax, %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rax, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	%r12d, 8(%rbx)
	movq	%rbx, %rax
	movl	%ebp, 12(%rbx)
	movl	$1, 16(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z30alloc_device_field_floatfield2ii, .-_Z30alloc_device_field_floatfield2ii
	.globl	_Z29free_device_field_floatfield211floatfield2
	.type	_Z29free_device_field_floatfield211floatfield2, @function
_Z29free_device_field_floatfield211floatfield2:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	8(%rsp), %rdi
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2034:
	.size	_Z29free_device_field_floatfield211floatfield2, .-_Z29free_device_field_floatfield211floatfield2
	.globl	_Z42__device_stub__Z8kernel_011floatfield2S_iiR11floatfield2S0_ii
	.type	_Z42__device_stub__Z8kernel_011floatfield2S_iiR11floatfield2S0_ii, @function
_Z42__device_stub__Z8kernel_011floatfield2S_iiR11floatfield2S0_ii:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edx, 12(%rsp)
	leaq	24(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	32(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rsi, 96(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8kernel_011floatfield2S_ii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L23:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z42__device_stub__Z8kernel_011floatfield2S_iiR11floatfield2S0_ii, .-_Z42__device_stub__Z8kernel_011floatfield2S_iiR11floatfield2S0_ii
	.globl	_Z8kernel_011floatfield2S_ii
	.type	_Z8kernel_011floatfield2S_ii, @function
_Z8kernel_011floatfield2S_ii:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%edi, %edx
	movl	%esi, %ecx
	leaq	16(%rsp), %rdi
	leaq	40(%rsp), %rsi
	call	_Z42__device_stub__Z8kernel_011floatfield2S_iiR11floatfield2S0_ii
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z8kernel_011floatfield2S_ii, .-_Z8kernel_011floatfield2S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"#"
.LC1:
	.string	" "
.LC2:
	.string	"."
.LC6:
	.string	"%s"
.LC7:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1600, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movabsq	$85899345940, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %r12
	leaq	96(%rsp), %r13
	call	malloc@PLT
	movl	$1600, %esi
	movq	%r12, %rdi
	movq	%rbp, 56(%rsp)
	movq	%rax, 48(%rsp)
	movq	%rax, %rbx
	xorl	%eax, %eax
	movl	%eax, 64(%rsp)
	call	cudaMalloc@PLT
	movl	$1600, %esi
	movq	%r13, %rdi
	movq	%rbp, 80(%rsp)
	movl	$1, 88(%rsp)
	call	cudaMalloc@PLT
	xorl	%eax, %eax
	movl	$400, %ecx
	movq	%rbx, %rdi
	rep stosl
	movq	%rbp, 104(%rsp)
	subq	$48, %rsp
	.cfi_def_cfa_offset 288
	xorl	%ebp, %ebp
	movl	$1, 160(%rsp)
	movq	112(%rsp), %rax
	movl	$0x447a0000, 840(%rbx)
	movups	96(%rsp), %xmm1
	movq	%rax, 40(%rsp)
	movups	120(%rsp), %xmm2
	movq	136(%rsp), %rax
	movups	%xmm1, 24(%rsp)
	movups	%xmm2, (%rsp)
	movq	%rax, 16(%rsp)
	call	_Z24memcpy_field_floatfield211floatfield2S_
	addq	$48, %rsp
	.cfi_def_cfa_offset 240
.L36:
	testl	$1, %ebp
	jne	.L38
	movq	%r13, %r15
	movq	%r12, %r14
	jmp	.L30
.L38:
	movq	%r12, %r15
	movq	%r13, %r14
.L30:
	movl	8(%r15), %eax
	imull	12(%r15), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$128, %ecx
	movl	$1, 44(%rsp)
	cltd
	idivl	%ecx
	movl	$33554433, %edx
	movl	$1, %ecx
	salq	$7, %rdx
	movq	%rdx, 36(%rsp)
	incl	%eax
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	16(%r15), %rax
	movups	(%r15), %xmm3
	leaq	144(%rsp), %rsi
	leaq	120(%rsp), %rdi
	movups	(%r14), %xmm4
	movl	$20, %ecx
	movl	$20, %edx
	movq	%rax, 136(%rsp)
	movq	16(%r14), %rax
	movups	%xmm3, 120(%rsp)
	movq	%rax, 160(%rsp)
	movups	%xmm4, 144(%rsp)
	call	_Z42__device_stub__Z8kernel_011floatfield2S_iiR11floatfield2S0_ii
.L31:
	movups	(%r15), %xmm5
	movq	%rbx, 48(%rsp)
	subq	$48, %rsp
	.cfi_def_cfa_offset 288
	movups	96(%rsp), %xmm6
	movups	%xmm5, 24(%rsp)
	movq	16(%r15), %rax
	xorl	%r15d, %r15d
	movups	%xmm6, (%rsp)
	movq	%rax, 40(%rsp)
	movq	112(%rsp), %rax
	movq	%rax, 16(%rsp)
	call	_Z24memcpy_field_floatfield211floatfield2S_
	addq	$48, %rsp
	.cfi_def_cfa_offset 240
.L32:
	leaq	(%rbx,%r15,4), %r8
	xorl	%r14d, %r14d
.L34:
	movss	(%r8), %xmm0
	comiss	.LC4(%rip), %xmm0
	leaq	.LC0(%rip), %rdx
	ja	.L33
	cvtss2sd	%xmm0, %xmm0
	comisd	.LC5(%rip), %xmm0
	leaq	.LC2(%rip), %rdx
	leaq	.LC1(%rip), %rax
	cmovbe	%rax, %rdx
.L33:
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r8, 8(%rsp)
	incl	%r14d
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movq	8(%rsp), %r8
	addq	$80, %r8
	cmpl	$20, %r14d
	jne	.L34
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incq	%r15
	call	__printf_chk@PLT
	cmpq	$20, %r15
	leaq	.LC7(%rip), %rsi
	jne	.L32
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebp
	call	__printf_chk@PLT
	cmpl	$5, %ebp
	jne	.L36
	movq	%rbx, %rdi
	call	free@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z8kernel_011floatfield2S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2063:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8kernel_011floatfield2S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2063:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	1056964608
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	-1717986918
	.long	1069128089
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h> /* memcpy */
#include <math.h>
#include <stdint.h>

void *cuda_upload_var(void *host_var, int size)
{
	void *cuda_var;
	hipMalloc(&cuda_var, 4);
	hipMemcpy(cuda_var, host_var, size, hipMemcpyHostToDevice);
	return cuda_var;
}
void cuda_download_var(void *cuda_var, void *host_var, int size)
{
	hipMemcpy(host_var, cuda_var, size, hipMemcpyDeviceToHost);
	hipFree(cuda_var);
}

typedef struct floatfield2
{
    float *m;
    int size[2];
    int is_device_field;
} floatfield2;

void memcpy_field_floatfield2(floatfield2 dst, floatfield2 src)
{
    if (dst.is_device_field == 0 && src.is_device_field == 0) {
        hipMemcpy(dst.m, src.m, (sizeof(*dst.m))*dst.size[0]*dst.size[1], hipMemcpyHostToHost);
    }
    if (dst.is_device_field == 1 && src.is_device_field == 0) {
        hipMemcpy(dst.m, src.m, (sizeof(*dst.m))*dst.size[0]*dst.size[1], hipMemcpyHostToDevice);
    }
    if (dst.is_device_field == 0 && src.is_device_field == 1) {
        hipMemcpy(dst.m, src.m, (sizeof(*dst.m))*dst.size[0]*dst.size[1], hipMemcpyDeviceToHost);
    }
    if (dst.is_device_field == 1 && src.is_device_field == 1) {
        hipMemcpy(dst.m, src.m, (sizeof(*dst.m))*dst.size[0]*dst.size[1], hipMemcpyDeviceToDevice);
    }
}

int size_floatfield2(floatfield2 field, int index)
{
    return field.size[index];
}

floatfield2 alloc_host_field_floatfield2(int size_0, int size_1)
{
    floatfield2 field;
    field.m = (float*)malloc((sizeof(*field.m))*size_0*size_1);
    field.size[0] = size_0;
    field.size[1] = size_1;
    field.is_device_field = 0;
    return field;
}

void free_host_field_floatfield2(floatfield2 field)
{
    free(field.m);
}

floatfield2 alloc_device_field_floatfield2(int size_0, int size_1)
{
    floatfield2 field;
    hipMalloc((void**)&field.m, (sizeof(*field.m))*size_0*size_1);
    field.size[0] = size_0;
    field.size[1] = size_1;
    field.is_device_field = 1;
    return field;
}

void free_device_field_floatfield2(floatfield2 field)
{
    hipFree(field.m);
}

typedef struct intmat2
{
    int m[2];
} intmat2;

int printf(const char *fmt, ...);

typedef floatfield2 Field;
__global__ void kernel_0(floatfield2 output, floatfield2 input, int size_x, int size_y)
{
    if (threadIdx.x + blockIdx.x*blockDim.x >= output.size[0]*output.size[1]) {
        return;
    }
    intmat2 id;
    id.m[1*0] = (threadIdx.x + blockIdx.x*blockDim.x) % output.size[0]/1;
    id.m[1*1] = (threadIdx.x + blockIdx.x*blockDim.x) % (output.size[0]*output.size[1])/output.size[0];

    int x = id.m[1*0];

    int y = id.m[1*1];

    int nx = (x + 1) % size_x;

    int ny = (y + 1) % size_y;

    int px = (x - 1 + size_x) % size_x;

    int py = (y - 1 + size_y) % size_y;
    output.m[output.size[1]*x + 1*y] = input.m[input.size[1]*x + 1*y] + input.m[input.size[1]*nx + 1*y] + input.m[input.size[1]*px + 1*y] + input.m[input.size[1]*x + 1*ny] + input.m[input.size[1]*x + 1*py];
    output.m[output.size[1]*x + 1*y] /= 5.000000;
}


int main(int argc, char **argv)
{

    int size_x = 20;

    int size_y = 20;

    floatfield2 host_field = alloc_host_field_floatfield2(size_x, size_y);

    floatfield2 device_field_1 = alloc_device_field_floatfield2(size_x, size_y);

    floatfield2 device_field_2 = alloc_device_field_floatfield2(size_x, size_y);

    /* Init field */

    {

        for (int x = 0; x < size_x; ++x) {

            for (int y = 0; y < size_y; ++y) {
                host_field.m[host_field.size[1]*x + 1*y] = 0;
            }
        }
        host_field.m[host_field.size[1]*(size_x/2) + 1*(size_y/2)] = 1000;
    }
    memcpy_field_floatfield2(device_field_1, host_field);

    for (int i = 0; i < 5; ++i) {

        floatfield2 *input = &device_field_1;

        floatfield2 *output = &device_field_2;

        /* Swap */

        if (i % 2 == 1) {

            floatfield2 *tmp = output;
            output = input;
            input = tmp;
        }

        /* Diffusion! */

        {
            dim3 dim_grid((*output).size[0]*(*output).size[1]/128 + 1, 1, 1);
            dim3 dim_block(128, 1, 1);
            kernel_0<<<dim_grid, dim_block>>>(*output, *input, size_x, size_y);
        }
        memcpy_field_floatfield2(host_field, *output);

        /* Print current state */

        for (int y = 0; y < size_y; ++y) {

            for (int x = 0; x < size_x; ++x) {

                const char *ch = " ";

                if (host_field.m[host_field.size[1]*x + 1*y] > 0.500000) {
                    ch = "#";
                } else if (host_field.m[host_field.size[1]*x + 1*y] > 0.100000) {
                    ch = ".";
                }
                printf("%s", ch);
            }
            printf("\n");
        }
        printf("\n");
    }
    free_host_field_floatfield2(host_field);
    free_device_field_floatfield2(device_field_1);
    free_device_field_floatfield2(device_field_2);

    return 0;
}

	.text
	.file	"diffusion.hip"
	.globl	_Z15cuda_upload_varPvi          # -- Begin function _Z15cuda_upload_varPvi
	.type	_Z15cuda_upload_varPvi,@function
_Z15cuda_upload_varPvi:                 # @_Z15cuda_upload_varPvi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	leaq	8(%rsp), %r15
	movl	$4, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movslq	%ebx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z15cuda_upload_varPvi, .Lfunc_end0-_Z15cuda_upload_varPvi
	.cfi_endproc
                                        # -- End function
	.globl	_Z17cuda_download_varPvS_i      # -- Begin function _Z17cuda_download_varPvS_i
	.type	_Z17cuda_download_varPvS_i,@function
_Z17cuda_download_varPvS_i:             # @_Z17cuda_download_varPvS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movslq	%edx, %rdx
	movq	%rsi, %rdi
	movq	%rbx, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end1:
	.size	_Z17cuda_download_varPvS_i, .Lfunc_end1-_Z17cuda_download_varPvS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24memcpy_field_floatfield211floatfield2S_ # -- Begin function _Z24memcpy_field_floatfield211floatfield2S_
	.type	_Z24memcpy_field_floatfield211floatfield2S_,@function
_Z24memcpy_field_floatfield211floatfield2S_: # @_Z24memcpy_field_floatfield211floatfield2S_
	.cfi_startproc
# %bb.0:
	movl	24(%rsp), %edx
	movl	48(%rsp), %eax
	xorl	%ecx, %ecx
	movl	%edx, %esi
	orl	%eax, %esi
	je	.LBB2_8
# %bb.1:
	cmpl	$1, %edx
	jne	.LBB2_3
# %bb.2:
	movl	$1, %ecx
	testl	%eax, %eax
	je	.LBB2_8
.LBB2_3:
	testl	%edx, %edx
	jne	.LBB2_5
# %bb.4:
	movl	$2, %ecx
	cmpl	$1, %eax
	je	.LBB2_8
.LBB2_5:                                # %.thread13
	cmpl	$1, %edx
	jne	.LBB2_7
# %bb.6:                                # %.thread13
	movl	$3, %ecx
	cmpl	$1, %eax
	jne	.LBB2_7
.LBB2_8:                                # %.thread13.thread.sink.split
	leaq	32(%rsp), %rax
	leaq	8(%rsp), %rdx
	movq	(%rdx), %rdi
	movq	(%rax), %rsi
	movslq	8(%rdx), %rax
	movslq	12(%rdx), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	jmp	hipMemcpy                       # TAILCALL
.LBB2_7:                                # %.thread13.thread
	retq
.Lfunc_end2:
	.size	_Z24memcpy_field_floatfield211floatfield2S_, .Lfunc_end2-_Z24memcpy_field_floatfield211floatfield2S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z16size_floatfield211floatfield2i # -- Begin function _Z16size_floatfield211floatfield2i
	.type	_Z16size_floatfield211floatfield2i,@function
_Z16size_floatfield211floatfield2i:     # @_Z16size_floatfield211floatfield2i
	.cfi_startproc
# %bb.0:
	movslq	%edi, %rax
	movl	16(%rsp,%rax,4), %eax
	retq
.Lfunc_end3:
	.size	_Z16size_floatfield211floatfield2i, .Lfunc_end3-_Z16size_floatfield211floatfield2i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28alloc_host_field_floatfield2ii # -- Begin function _Z28alloc_host_field_floatfield2ii
	.type	_Z28alloc_host_field_floatfield2ii,@function
_Z28alloc_host_field_floatfield2ii:     # @_Z28alloc_host_field_floatfield2ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movslq	%esi, %r14
	movslq	%edx, %r15
	movq	%r14, %rdi
	imulq	%r15, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, (%rbx)
	movl	%r14d, 8(%rbx)
	movl	%r15d, 12(%rbx)
	movl	$0, 16(%rbx)
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z28alloc_host_field_floatfield2ii, .Lfunc_end4-_Z28alloc_host_field_floatfield2ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27free_host_field_floatfield211floatfield2 # -- Begin function _Z27free_host_field_floatfield211floatfield2
	.type	_Z27free_host_field_floatfield211floatfield2,@function
_Z27free_host_field_floatfield211floatfield2: # @_Z27free_host_field_floatfield211floatfield2
	.cfi_startproc
# %bb.0:
	movq	8(%rsp), %rdi
	jmp	free                            # TAILCALL
.Lfunc_end5:
	.size	_Z27free_host_field_floatfield211floatfield2, .Lfunc_end5-_Z27free_host_field_floatfield211floatfield2
	.cfi_endproc
                                        # -- End function
	.globl	_Z30alloc_device_field_floatfield2ii # -- Begin function _Z30alloc_device_field_floatfield2ii
	.type	_Z30alloc_device_field_floatfield2ii,@function
_Z30alloc_device_field_floatfield2ii:   # @_Z30alloc_device_field_floatfield2ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movslq	%esi, %r14
	movslq	%edx, %r15
	movq	%r14, %rsi
	imulq	%r15, %rsi
	shlq	$2, %rsi
	callq	hipMalloc
	movl	%r14d, 8(%rbx)
	movl	%r15d, 12(%rbx)
	movl	$1, 16(%rbx)
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z30alloc_device_field_floatfield2ii, .Lfunc_end6-_Z30alloc_device_field_floatfield2ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29free_device_field_floatfield211floatfield2 # -- Begin function _Z29free_device_field_floatfield211floatfield2
	.type	_Z29free_device_field_floatfield211floatfield2,@function
_Z29free_device_field_floatfield211floatfield2: # @_Z29free_device_field_floatfield211floatfield2
	.cfi_startproc
# %bb.0:
	movq	8(%rsp), %rdi
	jmp	hipFree                         # TAILCALL
.Lfunc_end7:
	.size	_Z29free_device_field_floatfield211floatfield2, .Lfunc_end7-_Z29free_device_field_floatfield211floatfield2
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__kernel_011floatfield2S_ii # -- Begin function _Z23__device_stub__kernel_011floatfield2S_ii
	.type	_Z23__device_stub__kernel_011floatfield2S_ii,@function
_Z23__device_stub__kernel_011floatfield2S_ii: # @_Z23__device_stub__kernel_011floatfield2S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	144(%rsp), %rdx
	leaq	64(%rsp), %rbx
	movq	%rdx, (%rbx)
	leaq	168(%rsp), %rdx
	movq	%rdx, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8kernel_011floatfield2S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z23__device_stub__kernel_011floatfield2S_ii, .Lfunc_end8-_Z23__device_stub__kernel_011floatfield2S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI9_0:
	.long	0x3f000000                      # float 0.5
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI9_1:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1, %edi
	movl	$1600, %esi                     # imm = 0x640
	callq	calloc@PLT
	movq	%rax, %rbx
	leaq	64(%rsp), %r12
	movl	$1600, %esi                     # imm = 0x640
	movq	%r12, %rdi
	callq	hipMalloc
	movabsq	$85899345940, %r14              # imm = 0x1400000014
	movq	%r14, 8(%r12)
	movl	$1, %ebp
	movl	%ebp, 16(%r12)
	leaq	96(%rsp), %r15
	movl	$1600, %esi                     # imm = 0x640
	movq	%r15, %rdi
	callq	hipMalloc
	movq	%r14, 8(%r15)
	movl	%ebp, 16(%r15)
	movq	%rbx, 56(%rsp)                  # 8-byte Spill
	movl	$1148846080, 840(%rbx)          # imm = 0x447A0000
	movl	16(%r12), %ecx
	cmpl	%ebp, %ecx
	ja	.LBB9_2
# %bb.1:                                # %.thread13.thread.sink.split.i
	movslq	76(%rsp), %rax
	movslq	72(%rsp), %rdx
	imulq	%rax, %rdx
	movq	64(%rsp), %rdi
	shlq	$2, %rdx
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	hipMemcpy
.LBB9_2:                                # %_Z24memcpy_field_floatfield211floatfield2S_.exit.preheader
	movabsq	$4294967296, %rax               # imm = 0x100000000
	addq	$128, %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	xorl	%r13d, %r13d
.LBB9_3:                                # %_Z24memcpy_field_floatfield211floatfield2S_.exit
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_10 Depth 2
                                        #       Child Loop BB9_11 Depth 3
	testb	$1, %r13b
	movq	%r12, %r14
	cmoveq	%r15, %r14
	leaq	72(%rsp), %rax
	leaq	104(%rsp), %rcx
	cmoveq	%rcx, %rax
	leaq	76(%rsp), %rcx
	leaq	108(%rsp), %rdx
	cmoveq	%rdx, %rcx
	movl	(%rcx), %ecx
	imull	(%rax), %ecx
	leal	127(%rcx), %edi
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edi
	sarl	$7, %edi
	incl	%edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	88(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_5
# %bb.4:                                #   in Loop: Header=BB9_3 Depth=1
	testb	$1, %r13b
	movq	%r15, %rax
	cmoveq	%r12, %rax
	movq	16(%r14), %rcx
	movq	%rcx, 16(%rsp)
	movups	(%r14), %xmm0
	movups	%xmm0, (%rsp)
	movq	16(%rax), %rcx
	movq	%rcx, 40(%rsp)
	movups	(%rax), %xmm0
	movups	%xmm0, 24(%rsp)
	movl	$20, %edi
	movl	$20, %esi
	callq	_Z23__device_stub__kernel_011floatfield2S_ii
.LBB9_5:                                #   in Loop: Header=BB9_3 Depth=1
	testb	$1, %r13b
	movq	(%r14), %rsi
	movq	%r12, %rax
	cmoveq	%r15, %rax
	movl	16(%rax), %ecx
	testl	%ecx, %ecx
	je	.LBB9_8
# %bb.6:                                #   in Loop: Header=BB9_3 Depth=1
	cmpl	$1, %ecx
	jne	.LBB9_9
# %bb.7:                                # %.thread13.thread.sink.split.i65.fold.split
                                        #   in Loop: Header=BB9_3 Depth=1
	movl	$2, %ecx
.LBB9_8:                                # %.thread13.thread.sink.split.i65
                                        #   in Loop: Header=BB9_3 Depth=1
	movl	$1600, %edx                     # imm = 0x640
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	hipMemcpy
.LBB9_9:                                # %.preheader.preheader
                                        #   in Loop: Header=BB9_3 Depth=1
	movq	%r15, %rbx
	movq	%r12, %r15
	movq	56(%rsp), %r14                  # 8-byte Reload
	xorl	%ebp, %ebp
.LBB9_10:                               # %.preheader
                                        #   Parent Loop BB9_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB9_11 Depth 3
	movq	$-1600, %r12                    # imm = 0xF9C0
.LBB9_11:                               #   Parent Loop BB9_3 Depth=1
                                        #     Parent Loop BB9_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	1600(%r14,%r12), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movl	$.L.str.1, %esi
	ucomiss	.LCPI9_0(%rip), %xmm0
	ja	.LBB9_14
# %bb.12:                               #   in Loop: Header=BB9_11 Depth=3
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %esi
	ucomisd	.LCPI9_1(%rip), %xmm0
	jbe	.LBB9_14
# %bb.13:                               #   in Loop: Header=BB9_11 Depth=3
	movl	$.L.str.2, %esi
.LBB9_14:                               #   in Loop: Header=BB9_11 Depth=3
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	addq	$80, %r12
	jne	.LBB9_11
# %bb.15:                               #   in Loop: Header=BB9_10 Depth=2
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addq	$4, %r14
	cmpq	$20, %rbp
	jne	.LBB9_10
# %bb.16:                               #   in Loop: Header=BB9_3 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%r13d
	cmpl	$5, %r13d
	movq	%r15, %r12
	movq	%rbx, %r15
	jne	.LBB9_3
# %bb.17:
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8kernel_011floatfield2S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8kernel_011floatfield2S_ii,@object # @_Z8kernel_011floatfield2S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z8kernel_011floatfield2S_ii
	.p2align	3, 0x0
_Z8kernel_011floatfield2S_ii:
	.quad	_Z23__device_stub__kernel_011floatfield2S_ii
	.size	_Z8kernel_011floatfield2S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" "
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"#"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"."
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%s"
	.size	.L.str.3, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8kernel_011floatfield2S_ii"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__kernel_011floatfield2S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8kernel_011floatfield2S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8kernel_011floatfield2S_ii ; -- Begin function _Z8kernel_011floatfield2S_ii
	.globl	_Z8kernel_011floatfield2S_ii
	.p2align	8
	.type	_Z8kernel_011floatfield2S_ii,@function
_Z8kernel_011floatfield2S_ii:           ; @_Z8kernel_011floatfield2S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x44
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mul_i32 s4, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v1
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_cvt_f32_u32_e32 v0, s2
	s_sub_i32 s4, 0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s4, v0
	s_load_b64 s[4:5], s[0:1], 0x30
	v_mul_hi_u32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v2
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s6, s4, 31
	v_mul_hi_u32 v0, v1, v0
	s_add_i32 s7, s4, s6
	s_ashr_i32 s8, s5, 31
	s_xor_b32 s6, s7, s6
	s_add_i32 s7, s5, s8
	v_cvt_f32_u32_e32 v3, s6
	s_xor_b32 s7, s7, s8
	s_sub_i32 s8, 0, s6
	v_mul_lo_u32 v2, v0, s2
	v_add_nc_u32_e32 v4, 1, v0
	v_rcp_iflag_f32_e32 v3, v3
	v_cvt_f32_u32_e32 v5, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v2, v1, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	v_subrev_nc_u32_e32 v6, s2, v2
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	v_cvt_u32_f32_e32 v3, v3
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v6, vcc_lo
	v_rcp_iflag_f32_e32 v4, v5
	v_add_nc_u32_e32 v5, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v4
	v_mul_lo_u32 v5, s8, v3
	v_mul_lo_u32 v4, v0, s2
	s_sub_i32 s2, 0, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v11, v1, v4
	v_mul_hi_u32 v4, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, 1, v11
	v_add3_u32 v9, s4, -1, v11
	v_add_nc_u32_e32 v3, v3, v4
	v_add3_u32 v5, s5, -1, v0
	v_add_nc_u32_e32 v1, 1, v0
	v_ashrrev_i32_e32 v12, 31, v7
	v_ashrrev_i32_e32 v4, 31, v9
	s_load_b64 s[4:5], s[0:1], 0x18
	v_ashrrev_i32_e32 v10, 31, v5
	v_ashrrev_i32_e32 v8, 31, v1
	v_add_nc_u32_e32 v7, v7, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v5, v5, v10
	v_cvt_u32_f32_e32 v2, v2
	v_add_nc_u32_e32 v1, v1, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v7, v7, v12
	v_xor_b32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v6, s2, v2
	v_xor_b32_e32 v1, v1, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v13, v7, v3
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mul_hi_u32 v6, v2, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v13, v13, s6
	v_add_nc_u32_e32 v2, v2, v6
	v_add_nc_u32_e32 v6, v9, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v9, v1, v2
	v_mul_hi_u32 v2, v5, v2
	v_xor_b32_e32 v6, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v3, v6, v3
	v_mul_lo_u32 v9, v9, s7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v2, v2, s7
	v_mul_lo_u32 v3, v3, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v1, v1, v9
	v_sub_nc_u32_e32 v2, v5, v2
	v_sub_nc_u32_e32 v5, v7, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v7, s7, v1
	v_cmp_le_u32_e32 vcc_lo, s7, v1
	v_subrev_nc_u32_e32 v9, s6, v5
	v_sub_nc_u32_e32 v3, v6, v3
	v_subrev_nc_u32_e32 v6, s7, v2
	v_cndmask_b32_e32 v1, v1, v7, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_subrev_nc_u32_e32 v7, s6, v3
	v_cndmask_b32_e32 v5, v5, v9, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v2
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v9, v11, s2
	v_cndmask_b32_e32 v2, v2, v6, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s6, v3
	v_subrev_nc_u32_e32 v6, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v13, s7, v2
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s6, v5
	v_subrev_nc_u32_e32 v7, s7, v1
	v_subrev_nc_u32_e32 v14, s6, v3
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v5, v5, v12
	v_cndmask_b32_e32 v1, v1, v7, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s6, v3
	v_sub_nc_u32_e32 v5, v5, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v6, v1, v8
	v_cndmask_b32_e32 v3, v3, v14, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v2
	v_add_nc_u32_e32 v1, v9, v0
	v_sub_nc_u32_e32 v7, v6, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v3, v3, v4
	v_cndmask_b32_e32 v2, v2, v13, vcc_lo
	v_add_nc_u32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v8, v3, v4
	v_xor_b32_e32 v2, v2, v10
	v_mad_u64_u32 v[3:4], null, v5, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[5:6], null, v8, s2, v[0:1]
	v_sub_nc_u32_e32 v4, v2, v10
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v9, v4, v9
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v12, v[1:2], off
	global_load_b32 v13, v[3:4], off
	v_add_co_u32 v1, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v5, v[5:6], off
	v_add_co_u32 v3, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(3)
	v_add_f32_e32 v3, v12, v13
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v5
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v1, v3, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v1, v2
	v_div_scale_f32 v4, null, 0x40a00000, 0x40a00000, v3
	v_div_scale_f32 v6, vcc_lo, v3, 0x40a00000, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v1, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v1, v5
	v_mad_u64_u32 v[1:2], null, v11, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, v6, v5
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v0, -v4, v7, v6
	v_fmac_f32_e32 v7, v0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_fma_f32 v4, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v2, v4, v5, v7
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_div_fixup_f32 v2, v2, 0x40a00000, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8kernel_011floatfield2S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8kernel_011floatfield2S_ii, .Lfunc_end0-_Z8kernel_011floatfield2S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1136
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .offset:         24
        .size:           24
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8kernel_011floatfield2S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8kernel_011floatfield2S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
