#include <stdlib.h>
#include <stdlib.h>
#include <stdio.h>
#include <cuda_runtime.h>
#include <math.h>
#include <locale.h>
#include <cuda.h>

#define BLOCK_SIZE 250
#define GRID_SIZE 4
#define THREAD_SIZE 1000
#define CUDA_FLOAT float

__global__ void pi_kern(CUDA_FLOAT *res)
{
        int n = threadIdx.x + blockIdx.x * BLOCK_SIZE;
        CUDA_FLOAT x0 = n * 1.f / (BLOCK_SIZE * GRID_SIZE);
        CUDA_FLOAT y0 = sqrt(1 - x0 * x0);
        CUDA_FLOAT dx = 1.f / (1.f * BLOCK_SIZE * GRID_SIZE);
        CUDA_FLOAT s = 0;
        CUDA_FLOAT x1, y1;
//      for(int i = 0; i < THREAD_SIZE; i++){
                x1 = x0 + dx; 
                y1 = sqrt(1 - x1 * x1);
                s += (y0 + y1) * dx / 2.f;
                x0 = x1;
                y0 = y1;
//      }
        res[n] = s;
}


__global__ void pi_kern_(CUDA_FLOAT *res_)
{
        int n = threadIdx.x + blockIdx.x * BLOCK_SIZE;
        CUDA_FLOAT x0 = n * 1.f / (BLOCK_SIZE * GRID_SIZE);
        CUDA_FLOAT y0 = x0 * sqrt(1 - x0 * x0);
        CUDA_FLOAT dx = 1.f / (1.f * BLOCK_SIZE * GRID_SIZE);
        CUDA_FLOAT s = 0;
        CUDA_FLOAT x1, y1;

//      for(int i = 0; i < THREAD_SIZE; i++){
        x1 = x0 + dx;
        y1 = x1 * sqrt(1 - x1 * x1);
        s += (y0 + y1) * dx / 2.f;
        x0 = x1;
        y0 = y1;
//      }
        res_[n] = s;
}


int main() {
        float *res_h,  *res_d_;
        float *res_d;
        res_h = (float *)malloc(sizeof(float)*THREAD_SIZE);
        cudaMalloc((void **) &res_d, sizeof(float)*THREAD_SIZE);
        cudaMalloc((void **) &res_d_, sizeof(float)*THREAD_SIZE);
        cudaMemcpy(res_d, res_h, sizeof(float)*THREAD_SIZE, cudaMemcpyHostToDevice);
        dim3 grid(GRID_SIZE);
        dim3 block(BLOCK_SIZE);
        pi_kern<<< grid,  block >>>(res_d);
        cudaMemcpy(res_h, res_d, sizeof(float)*THREAD_SIZE, cudaMemcpyDeviceToHost);

        float sum = 0.0;
        for(int i = 0; i < THREAD_SIZE; i++){
                sum += res_h[i];
        }

        cudaMemcpy(res_d_, res_h, sizeof(float)*THREAD_SIZE, cudaMemcpyHostToDevice);
        pi_kern_<<< grid,  block >>>(res_d_);
        cudaMemcpy(res_h, res_d_, sizeof(float)*THREAD_SIZE, cudaMemcpyDeviceToHost);

        float sum_ = 0.0;
        for(int j = 0; j < THREAD_SIZE; j++){
                sum_ += res_h[j];
        }

        printf("%0.8f\n", sum*4);
        printf("%0.8f\n", sum_ / sum);

        free(res_h);
        cudaFree(res_d);
        cudaFree(res_d_);
        return 0;

}


	.file	"tmpxft_00354ae4_00000000-6_center_mass.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z26__device_stub__Z7pi_kernPfPf
	.type	_Z26__device_stub__Z7pi_kernPfPf, @function
_Z26__device_stub__Z7pi_kernPfPf:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z7pi_kernPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L2:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z26__device_stub__Z7pi_kernPfPf, .-_Z26__device_stub__Z7pi_kernPfPf
	.globl	_Z7pi_kernPf
	.type	_Z7pi_kernPf, @function
_Z7pi_kernPf:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z7pi_kernPfPf
	.cfi_endproc
.LFE2053:
	.size	_Z7pi_kernPf, .-_Z7pi_kernPf
	.globl	_Z27__device_stub__Z8pi_kern_PfPf
	.type	_Z27__device_stub__Z8pi_kern_PfPf, @function
_Z27__device_stub__Z8pi_kern_PfPf:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z8pi_kern_Pf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L8:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z27__device_stub__Z8pi_kern_PfPf, .-_Z27__device_stub__Z8pi_kern_PfPf
	.globl	_Z8pi_kern_Pf
	.type	_Z8pi_kern_Pf, @function
_Z8pi_kern_Pf:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z8pi_kern_PfPf
	.cfi_endproc
.LFE2055:
	.size	_Z8pi_kern_Pf, .-_Z8pi_kern_Pf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"%0.8f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$4000, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4000, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4000, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4000, %edx
	call	cudaMemcpy@PLT
	movl	$1073741825, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147483773, %edx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdx, %rdx
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rdx, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	24(%rsp), %rdi
	call	_Z26__device_stub__Z7pi_kernPfPf
.L14:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$4000, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$0x00000000, 8(%rsp)
	xorl	%eax, %eax
.L15:
	movss	8(%rsp), %xmm2
	addss	(%rbx,%rax,4), %xmm2
	incq	%rax
	movss	%xmm2, 8(%rsp)
	cmpq	$1000, %rax
	jne	.L15
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$4000, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	52(%rsp), %ecx
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	16(%rsp), %rdi
	call	_Z27__device_stub__Z8pi_kern_PfPf
.L16:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4000, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L17:
	addss	(%rbx,%rax,4), %xmm1
	incq	%rax
	cmpq	$1000, %rax
	jne	.L17
	movss	8(%rsp), %xmm0
	leaq	.LC2(%rip), %rbp
	movl	$2, %edi
	movb	$1, %al
	mulss	.LC1(%rip), %xmm0
	movq	%rbp, %rsi
	movss	%xmm1, 12(%rsp)
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	%rbp, %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	12(%rsp), %xmm1
	divss	8(%rsp), %xmm1
	cvtss2sd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z8pi_kern_Pf"
.LC4:
	.string	"_Z7pi_kernPf"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8pi_kern_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7pi_kernPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1082130432
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdlib.h>
#include <stdlib.h>
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <math.h>
#include <locale.h>


#define BLOCK_SIZE 250
#define GRID_SIZE 4
#define THREAD_SIZE 1000
#define CUDA_FLOAT float

__global__ void pi_kern(CUDA_FLOAT *res)
{
        int n = threadIdx.x + blockIdx.x * BLOCK_SIZE;
        CUDA_FLOAT x0 = n * 1.f / (BLOCK_SIZE * GRID_SIZE);
        CUDA_FLOAT y0 = sqrt(1 - x0 * x0);
        CUDA_FLOAT dx = 1.f / (1.f * BLOCK_SIZE * GRID_SIZE);
        CUDA_FLOAT s = 0;
        CUDA_FLOAT x1, y1;
//      for(int i = 0; i < THREAD_SIZE; i++){
                x1 = x0 + dx; 
                y1 = sqrt(1 - x1 * x1);
                s += (y0 + y1) * dx / 2.f;
                x0 = x1;
                y0 = y1;
//      }
        res[n] = s;
}


__global__ void pi_kern_(CUDA_FLOAT *res_)
{
        int n = threadIdx.x + blockIdx.x * BLOCK_SIZE;
        CUDA_FLOAT x0 = n * 1.f / (BLOCK_SIZE * GRID_SIZE);
        CUDA_FLOAT y0 = x0 * sqrt(1 - x0 * x0);
        CUDA_FLOAT dx = 1.f / (1.f * BLOCK_SIZE * GRID_SIZE);
        CUDA_FLOAT s = 0;
        CUDA_FLOAT x1, y1;

//      for(int i = 0; i < THREAD_SIZE; i++){
        x1 = x0 + dx;
        y1 = x1 * sqrt(1 - x1 * x1);
        s += (y0 + y1) * dx / 2.f;
        x0 = x1;
        y0 = y1;
//      }
        res_[n] = s;
}


int main() {
        float *res_h,  *res_d_;
        float *res_d;
        res_h = (float *)malloc(sizeof(float)*THREAD_SIZE);
        hipMalloc((void **) &res_d, sizeof(float)*THREAD_SIZE);
        hipMalloc((void **) &res_d_, sizeof(float)*THREAD_SIZE);
        hipMemcpy(res_d, res_h, sizeof(float)*THREAD_SIZE, hipMemcpyHostToDevice);
        dim3 grid(GRID_SIZE);
        dim3 block(BLOCK_SIZE);
        pi_kern<<< grid,  block >>>(res_d);
        hipMemcpy(res_h, res_d, sizeof(float)*THREAD_SIZE, hipMemcpyDeviceToHost);

        float sum = 0.0;
        for(int i = 0; i < THREAD_SIZE; i++){
                sum += res_h[i];
        }

        hipMemcpy(res_d_, res_h, sizeof(float)*THREAD_SIZE, hipMemcpyHostToDevice);
        pi_kern_<<< grid,  block >>>(res_d_);
        hipMemcpy(res_h, res_d_, sizeof(float)*THREAD_SIZE, hipMemcpyDeviceToHost);

        float sum_ = 0.0;
        for(int j = 0; j < THREAD_SIZE; j++){
                sum_ += res_h[j];
        }

        printf("%0.8f\n", sum*4);
        printf("%0.8f\n", sum_ / sum);

        free(res_h);
        hipFree(res_d);
        hipFree(res_d_);
        return 0;

}


	.text
	.file	"center_mass.hip"
	.globl	_Z22__device_stub__pi_kernPf    # -- Begin function _Z22__device_stub__pi_kernPf
	.type	_Z22__device_stub__pi_kernPf,@function
_Z22__device_stub__pi_kernPf:           # @_Z22__device_stub__pi_kernPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7pi_kernPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__pi_kernPf, .Lfunc_end0-_Z22__device_stub__pi_kernPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__pi_kern_Pf   # -- Begin function _Z23__device_stub__pi_kern_Pf
	.type	_Z23__device_stub__pi_kern_Pf,@function
_Z23__device_stub__pi_kern_Pf:          # @_Z23__device_stub__pi_kern_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8pi_kern_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__pi_kern_Pf, .Lfunc_end1-_Z23__device_stub__pi_kern_Pf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x40800000                      # float 4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movabsq	$4294967300, %r14               # imm = 0x100000004
	movl	$4000, %edi                     # imm = 0xFA0
	callq	malloc
	movq	%rax, %rbx
	leaq	16(%rsp), %r15
	movl	$4000, %esi                     # imm = 0xFA0
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$4000, %esi                     # imm = 0xFA0
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$4000, %edx                     # imm = 0xFA0
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	246(%r14), %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	16(%rsp), %rdi
	callq	_Z22__device_stub__pi_kernPf
.LBB2_2:
	movq	16(%rsp), %rsi
	movl	$4000, %edx                     # imm = 0xFA0
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	addss	(%rbx,%rax,4), %xmm0
	incq	%rax
	cmpq	$1000, %rax                     # imm = 0x3E8
	jne	.LBB2_3
# %bb.4:
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movq	8(%rsp), %rdi
	movl	$4000, %edx                     # imm = 0xFA0
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	8(%rsp), %rdi
	callq	_Z23__device_stub__pi_kern_Pf
.LBB2_6:
	movq	8(%rsp), %rsi
	movl	$4000, %edx                     # imm = 0xFA0
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	addss	(%rbx,%rax,4), %xmm0
	incq	%rax
	cmpq	$1000, %rax                     # imm = 0x3E8
	jne	.LBB2_7
# %bb.8:
	movss	%xmm0, 28(%rsp)                 # 4-byte Spill
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	mulss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movss	28(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7pi_kernPf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8pi_kern_Pf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7pi_kernPf,@object            # @_Z7pi_kernPf
	.section	.rodata,"a",@progbits
	.globl	_Z7pi_kernPf
	.p2align	3, 0x0
_Z7pi_kernPf:
	.quad	_Z22__device_stub__pi_kernPf
	.size	_Z7pi_kernPf, 8

	.type	_Z8pi_kern_Pf,@object           # @_Z8pi_kern_Pf
	.globl	_Z8pi_kern_Pf
	.p2align	3, 0x0
_Z8pi_kern_Pf:
	.quad	_Z23__device_stub__pi_kern_Pf
	.size	_Z8pi_kern_Pf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%0.8f\n"
	.size	.L.str, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7pi_kernPf"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8pi_kern_Pf"
	.size	.L__unnamed_2, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__pi_kernPf
	.addrsig_sym _Z23__device_stub__pi_kern_Pf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7pi_kernPf
	.addrsig_sym _Z8pi_kern_Pf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7pi_kernPf            ; -- Begin function _Z7pi_kernPf
	.globl	_Z7pi_kernPf
	.p2align	8
	.type	_Z7pi_kernPf,@function
_Z7pi_kernPf:                           ; @_Z7pi_kernPf
; %bb.0:
	v_mad_u64_u32 v[1:2], null, 0xfa, s15, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v0, v1
	v_div_scale_f32 v2, null, 0x447a0000, 0x447a0000, v0
	v_div_scale_f32 v5, vcc_lo, v0, 0x447a0000, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v5, v3
	v_fma_f32 v6, -v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v6, v3
	v_fma_f32 v2, -v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v4
	v_div_fixup_f32 v0, v2, 0x447a0000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, 0x3a83126f, v0
	v_fma_f32 v0, -v0, v0, 1.0
	v_fma_f32 v2, -v2, v2, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v3, 0x4f800000, v0
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
	v_cmp_gt_f32_e64 s2, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	v_sqrt_f32_e32 v3, v0
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v4, 0x4f800000, v2 :: v_dual_add_nc_u32 v5, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v2, v4, s2
	v_add_nc_u32_e32 v7, 1, v3
	v_sqrt_f32_e32 v4, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v6, -1, v4
	v_add_nc_u32_e32 v9, 1, v4
	v_fma_f32 v8, -v5, v3, v0
	v_fma_f32 v11, -v7, v3, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v10, -v6, v4, v2
	v_cmp_ge_f32_e64 s3, 0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v5, s3
	v_cmp_ge_f32_e64 s3, 0, v10
	v_fma_f32 v5, -v9, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v6, s3
	v_cmp_lt_f32_e64 s3, 0, v11
	v_cndmask_b32_e64 v3, v3, v7, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e64 s3, 0, v5
	v_mul_f32_e32 v5, 0x37800000, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v9, s3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_mul_f32 v6, 0x37800000, v4
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v4, v4, v6, s2
	v_cndmask_b32_e32 v0, v3, v0, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v4, v2, vcc_lo
	v_add_f32_e32 v0, v0, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v3, 0x3a83126f, v0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v2, v3, 0.5, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7pi_kernPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7pi_kernPf, .Lfunc_end0-_Z7pi_kernPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 516
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8pi_kern_Pf           ; -- Begin function _Z8pi_kern_Pf
	.globl	_Z8pi_kern_Pf
	.p2align	8
	.type	_Z8pi_kern_Pf,@function
_Z8pi_kern_Pf:                          ; @_Z8pi_kern_Pf
; %bb.0:
	v_mad_u64_u32 v[1:2], null, 0xfa, s15, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v0, v1
	v_div_scale_f32 v2, null, 0x447a0000, 0x447a0000, v0
	v_div_scale_f32 v5, vcc_lo, v0, 0x447a0000, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v5, v3
	v_fma_f32 v6, -v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v6, v3
	v_fma_f32 v2, -v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v4
	v_div_fixup_f32 v0, v2, 0x447a0000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, 0x3a83126f, v0
	v_fma_f32 v4, -v0, v0, 1.0
	v_fma_f32 v3, -v2, v2, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f32_e64 s2, 0xf800000, v4
	v_dual_mul_f32 v6, 0x4f800000, v4 :: v_dual_mul_f32 v5, 0x4f800000, v3
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v4, v4, v6, s2
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sqrt_f32_e32 v6, v4
	v_sqrt_f32_e32 v5, v3
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v8, -1, v6
	v_add_nc_u32_e32 v11, 1, v6
	v_add_nc_u32_e32 v7, -1, v5
	v_add_nc_u32_e32 v9, 1, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v12, -v8, v6, v4
	v_fma_f32 v10, -v7, v5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, -v9, v5, v3
	v_cmp_ge_f32_e64 s3, 0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v7, s3
	v_cmp_ge_f32_e64 s3, 0, v12
	v_fma_f32 v7, -v11, v6, v4
	v_cndmask_b32_e64 v6, v6, v8, s3
	v_cmp_lt_f32_e64 s3, 0, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v5, v5, v9, s3
	v_cmp_lt_f32_e64 s3, 0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, 0x37800000, v5
	v_cndmask_b32_e64 v6, v6, v11, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v5, v5, v7 :: v_dual_mul_f32 v8, 0x37800000, v6
	v_cmp_class_f32_e64 vcc_lo, v3, 0x260
	v_cndmask_b32_e64 v6, v6, v8, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v5, v3, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v4, 0x260
	v_mul_f32_e32 v3, v2, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v6, v4, vcc_lo
	v_ashrrev_i32_e32 v2, 31, v1
	v_fmac_f32_e32 v3, v0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mul_f32_e32 v3, 0x3a83126f, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v2, v3, 0.5, 0
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8pi_kern_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8pi_kern_Pf, .Lfunc_end1-_Z8pi_kern_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 516
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7pi_kernPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7pi_kernPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8pi_kern_Pf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8pi_kern_Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
