//__global__ void gpuRecursiveReduce(int *g_idata, int *g_odata,
//	unsigned int isize)
//{
//	int tid = threadIdx.x;
//
//	int *idata = g_idata + blockIdx.x*blockDim.x;
//	int *odata = &g_odata[blockIdx.x];
//
//	// stop condition   
//	if (isize == 2 && tid == 0)
//	{
//		g_odata[blockIdx.x] = idata[0] + idata[1];
//		return;
//	}
//
//	// nested invocation   
//	int istride = isize >> 1;
//	if (istride > 1 && tid < istride)
//	{
//		// in place reduction    
//		idata[tid] += idata[tid + istride];
//	}
//
//	// sync at block level   
//	__syncthreads();
//
//	// nested invocation to generate child grids 
//	if (tid == 0)
//	{
//		gpuRecursiveReduce << <1, istride >> > (idata, odata, istride);
//		cudaDeviceSynchronize();
//	}
//
//	// sync at block level again 
//	__syncthreads();
//}
//
//__global__ void gpuRecursiveReduce_improved(int *g_idata, int *g_odata,
//	unsigned int isize)
//{
//	int tid = threadIdx.x;
//
//	int *idata = g_idata + blockIdx.x*blockDim.x;
//	int *odata = &g_odata[blockIdx.x];
//
//	// stop condition   
//	if (isize == 2 && tid == 0)
//	{
//		g_odata[blockIdx.x] = idata[0] + idata[1];
//		return;
//	}
//
//	// nested invocation   
//	int istride = isize >> 1;
//	if (istride > 1 && tid < istride)
//	{
//		// in place reduction    
//		idata[tid] += idata[tid + istride];
//	}
//
//	// nested invocation to generate child grids 
//	if (tid == 0)
//	{
//		gpuRecursiveReduce << <1, istride >> > (idata, odata, istride);
//	}
//}
//
//__global__ void gpuRecursiveReduce_2(int *g_idata, int *g_odata, int iStride,
//	int const iDim)
//{
//	// convert global data pointer to the local pointer of this block
//	int *idata = g_idata + blockIdx.x * iDim;
//
//	// stop condition
//	if (iStride == 1 && threadIdx.x == 0)
//	{
//		g_odata[blockIdx.x] = idata[0] + idata[1];
//		return;
//	}
//
//	// in place reduction
//	idata[threadIdx.x] += idata[threadIdx.x + iStride];
//
//	// nested invocation to generate child grids
//	if (threadIdx.x == 0 && blockIdx.x == 0)
//	{
//		gpuRecursiveReduce_2 << <gridDim.x, iStride / 2 >> >(g_idata, g_odata,
//			iStride / 2, iDim);
//	}
//}
	.file	"tmpxft_00282ed2_00000000-6_test_code.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
//__global__ void gpuRecursiveReduce(int *g_idata, int *g_odata,
//	unsigned int isize)
//{
//	int tid = threadIdx.x;
//
//	int *idata = g_idata + blockIdx.x*blockDim.x;
//	int *odata = &g_odata[blockIdx.x];
//
//	// stop condition   
//	if (isize == 2 && tid == 0)
//	{
//		g_odata[blockIdx.x] = idata[0] + idata[1];
//		return;
//	}
//
//	// nested invocation   
//	int istride = isize >> 1;
//	if (istride > 1 && tid < istride)
//	{
//		// in place reduction    
//		idata[tid] += idata[tid + istride];
//	}
//
//	// sync at block level   
//	__syncthreads();
//
//	// nested invocation to generate child grids 
//	if (tid == 0)
//	{
//		gpuRecursiveReduce << <1, istride >> > (idata, odata, istride);
//		cudaDeviceSynchronize();
//	}
//
//	// sync at block level again 
//	__syncthreads();
//}
//
//__global__ void gpuRecursiveReduce_improved(int *g_idata, int *g_odata,
//	unsigned int isize)
//{
//	int tid = threadIdx.x;
//
//	int *idata = g_idata + blockIdx.x*blockDim.x;
//	int *odata = &g_odata[blockIdx.x];
//
//	// stop condition   
//	if (isize == 2 && tid == 0)
//	{
//		g_odata[blockIdx.x] = idata[0] + idata[1];
//		return;
//	}
//
//	// nested invocation   
//	int istride = isize >> 1;
//	if (istride > 1 && tid < istride)
//	{
//		// in place reduction    
//		idata[tid] += idata[tid + istride];
//	}
//
//	// nested invocation to generate child grids 
//	if (tid == 0)
//	{
//		gpuRecursiveReduce << <1, istride >> > (idata, odata, istride);
//	}
//}
//
//__global__ void gpuRecursiveReduce_2(int *g_idata, int *g_odata, int iStride,
//	int const iDim)
//{
//	// convert global data pointer to the local pointer of this block
//	int *idata = g_idata + blockIdx.x * iDim;
//
//	// stop condition
//	if (iStride == 1 && threadIdx.x == 0)
//	{
//		g_odata[blockIdx.x] = idata[0] + idata[1];
//		return;
//	}
//
//	// in place reduction
//	idata[threadIdx.x] += idata[threadIdx.x + iStride];
//
//	// nested invocation to generate child grids
//	if (threadIdx.x == 0 && blockIdx.x == 0)
//	{
//		gpuRecursiveReduce_2 << <gridDim.x, iStride / 2 >> >(g_idata, g_odata,
//			iStride / 2, iDim);
//	}
//}
	.text
	.file	"test_code.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
