#include <cassert>
#include <cmath>
#include <cstddef>
#include <cstdint>
#include <cstdlib>
#include <iostream>
#include <limits>
#include <random>
#include <vector>

#include <cuda_runtime_api.h>
#include <cuda.h>

/* Define the kernel function: */

__global__ void add_vec_kernel(
    double const* __restrict__ x, double const* __restrict__ y,
    double* __restrict__ z, int const n )
{
    /* blockIdx, blockDim and threadIdx are variables describing the
     * dimensions of the "grid" which are automatically provided by the
     * Cuda runtime */

    int const gid = blockIdx.x * blockDim.x + threadIdx.x;

    if( gid < n )
    {
        z[ gid ] = x[ gid ] + y[ gid ];
    }

    return;
}

int main( void )
{
    /* ---------------------------------------------------------------------- */
    /* prepare the host vectors: */

    int32_t const N = int32_t{ 10000 };

    std::vector< double > x( N, double{ 0.0 } );
    std::vector< double > y( N, double{ 0.0 } );
    std::vector< double > z( N, double{ 0.0 } );

    std::mt19937_64 prng( 20181205u );
    std::uniform_real_distribution< double >
        dist( double{ -10. }, double{ +10. } );

    for( int32_t ii = int32_t{ 0 } ; ii < N ; ++ii )
    {
        x[ ii ] = dist( prng );
        y[ ii ] = dist( prng );
    }

    cudaError_t cu_err;

    /* --------------------------------------------------------------------- */
    /* use the "default" / "first" Cuda device for the program: */

    int device = int{ 0 };
    ::cudaGetDevice( &device );
    cu_err = ::cudaDeviceSynchronize();
    assert( cu_err == ::cudaSuccess );

    /* --------------------------------------------------------------------- */
    /* Allocate the buffers on the device */
    /* x_arg, y_arg, z_arg ... handles on the host side managing buffers in *
     * the device memory */

    double* x_arg = nullptr;
    double* y_arg = nullptr;
    double* z_arg = nullptr;

    ::cudaMalloc( &x_arg, sizeof( double ) * N );
    ::cudaMalloc( &y_arg, sizeof( double ) * N );
    ::cudaMalloc( &z_arg, sizeof( double ) * N );

    /* --------------------------------------------------------------------- */
    /* Transfer x and y from host to device */

    ::cudaMemcpy( x_arg, x.data(), sizeof( double ) * N, cudaMemcpyHostToDevice );
    ::cudaMemcpy( y_arg, y.data(), sizeof( double ) * N, cudaMemcpyHostToDevice );

    /* --------------------------------------------------------------------- */
    /* execute kernel on the device */

    int32_t const threads_per_block = int32_t{ 128 };

    int32_t const num_blocks =
        ( N + threads_per_block - int32_t{ 1 } ) / threads_per_block;

    add_vec_kernel<<< num_blocks, threads_per_block >>>( x_arg, y_arg, z_arg, N );

    cu_err = ::cudaPeekAtLastError();
    assert( cu_err == ::cudaSuccess );

    /* -------------------------------------------------------------------- */
    /* transfer the result from the device buffer to the host buffer */

    ::cudaMemcpy( z.data(), z_arg, sizeof( double ) * N, cudaMemcpyDeviceToHost );

    /* ------------------------------------------------------------------- */
    /* verify that the result is correct */

    bool success = true;
    double const EPS = std::numeric_limits< double >::epsilon();

    for( int32_t ii = int32_t{ 0 } ; ii < N ; ++ii )
    {
        if( std::fabs( ( x[ ii ] + y[ ii ] ) - z[ ii ] ) > EPS )
        {
            success = false;
            break;
        }
    }

    std::cout << "Success: " << std::boolalpha << success << std::endl;

    /* -------------------------------------------------------------------- */
    /* Clean-up */

    ::cudaFree( x_arg );
    ::cudaFree( y_arg );
    ::cudaFree( z_arg );

    return 0;
}

/* end: */

	.file	"tmpxft_0034ab52_00000000-6_vec_add_cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text._ZSt9boolalphaRSt8ios_base,"axG",@progbits,_ZSt9boolalphaRSt8ios_base,comdat
	.weak	_ZSt9boolalphaRSt8ios_base
	.type	_ZSt9boolalphaRSt8ios_base, @function
_ZSt9boolalphaRSt8ios_base:
.LFB3265:
	.cfi_startproc
	endbr64
	orl	$1, 24(%rdi)
	movq	%rdi, %rax
	ret
	.cfi_endproc
.LFE3265:
	.size	_ZSt9boolalphaRSt8ios_base, .-_ZSt9boolalphaRSt8ios_base
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4722:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4722:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z41__device_stub__Z14add_vec_kernelPKdS0_PdiPKdS0_Pdi
	.type	_Z41__device_stub__Z14add_vec_kernelPKdS0_PdiPKdS0_Pdi, @function
_Z41__device_stub__Z14add_vec_kernelPKdS0_PdiPKdS0_Pdi:
.LFB4744:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14add_vec_kernelPKdS0_Pdi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4744:
	.size	_Z41__device_stub__Z14add_vec_kernelPKdS0_PdiPKdS0_Pdi, .-_Z41__device_stub__Z14add_vec_kernelPKdS0_PdiPKdS0_Pdi
	.globl	_Z14add_vec_kernelPKdS0_Pdi
	.type	_Z14add_vec_kernelPKdS0_Pdi, @function
_Z14add_vec_kernelPKdS0_Pdi:
.LFB4745:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z14add_vec_kernelPKdS0_PdiPKdS0_Pdi
	.cfi_endproc
.LFE4745:
	.size	_Z14add_vec_kernelPKdS0_Pdi, .-_Z14add_vec_kernelPKdS0_Pdi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z14add_vec_kernelPKdS0_Pdi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4747:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14add_vec_kernelPKdS0_Pdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4747:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt6vectorIdSaIdEEC2EmRKdRKS0_.str1.1,"aMS",@progbits,1
.LC1:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIdSaIdEEC2EmRKdRKS0_,"axG",@progbits,_ZNSt6vectorIdSaIdEEC5EmRKdRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	.type	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_, @function
_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_:
.LFB5070:
	.cfi_startproc
	endbr64
	movabsq	$1152921504606846975, %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rcx
	.cfi_def_cfa_offset 48
	cmpq	%rsi, %rax
	jnb	.L12
	leaq	.LC1(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L12:
	movq	%rdx, %r13
	xorl	%edx, %edx
	movq	%rdi, %rbx
	movq	%rsi, %rbp
	movq	%rdx, (%rdi)
	leaq	0(,%rsi,8), %r12
	xorl	%eax, %eax
	movq	%rdx, 8(%rdi)
	movq	%rdx, 16(%rdi)
	testq	%rsi, %rsi
	je	.L13
	movq	%r12, %rdi
	call	_Znwm@PLT
.L13:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L14
	movsd	0(%r13), %xmm0
.L15:
	cmpq	%rax, %r12
	je	.L14
	movsd	%xmm0, (%rax)
	addq	$8, %rax
	jmp	.L15
.L14:
	movq	%rax, 8(%rbx)
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5070:
	.size	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_, .-_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	.weak	_ZNSt6vectorIdSaIdEEC1EmRKdRKS0_
	.set	_ZNSt6vectorIdSaIdEEC1EmRKdRKS0_,_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	.section	.text._ZNSt6vectorIdSaIdEED2Ev,"axG",@progbits,_ZNSt6vectorIdSaIdEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIdSaIdEED2Ev
	.type	_ZNSt6vectorIdSaIdEED2Ev, @function
_ZNSt6vectorIdSaIdEED2Ev:
.LFB5073:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L23
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L23:
	ret
	.cfi_endproc
.LFE5073:
	.size	_ZNSt6vectorIdSaIdEED2Ev, .-_ZNSt6vectorIdSaIdEED2Ev
	.weak	_ZNSt6vectorIdSaIdEED1Ev
	.set	_ZNSt6vectorIdSaIdEED1Ev,_ZNSt6vectorIdSaIdEED2Ev
	.section	.text._ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,comdat
	.align 2
	.weak	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.type	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv, @function
_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv:
.LFB5502:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	xorl	%edx, %edx
	movabsq	$-5403634167711393303, %rdi
.L27:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	1240(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L26
	movq	%rdi, %rcx
.L26:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$156, %rdx
	jne	.L27
	movabsq	$-5403634167711393303, %rdi
.L29:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	-1256(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L28
	movq	%rdi, %rcx
.L28:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$311, %rdx
	jne	.L29
	movq	2488(%rax), %rdx
	movq	(%rax), %rcx
	andq	$-2147483648, %rdx
	andl	$2147483647, %ecx
	orq	%rcx, %rdx
	movq	%rdx, %rcx
	shrq	%rcx
	xorq	1240(%rax), %rcx
	andl	$1, %edx
	je	.L30
	movabsq	$-5403634167711393303, %rdx
.L30:
	xorq	%rcx, %rdx
	movq	%rdx, 2488(%rax)
	xorl	%edx, %edx
	movq	%rdx, 2496(%rax)
	ret
	.cfi_endproc
.LFE5502:
	.size	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv, .-_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.section	.text._ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_,comdat
	.weak	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
	.type	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_, @function
_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_:
.LFB5461:
	.cfi_startproc
	endbr64
	cmpq	$311, 2496(%rdi)
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	jbe	.L43
	call	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
.L43:
	movq	2496(%rbx), %rax
	movaps	.LC6(%rip), %xmm2
	movq	(%rbx,%rax,8), %xmm0
	leaq	1(%rax), %rdx
	movq	%rdx, 2496(%rbx)
	movaps	%xmm0, %xmm3
	psrlq	$29, %xmm3
	movaps	%xmm3, %xmm1
	andps	%xmm2, %xmm1
	movaps	.LC7(%rip), %xmm2
	xorps	%xmm1, %xmm0
	movaps	%xmm0, %xmm4
	psllq	$17, %xmm4
	movaps	%xmm4, %xmm1
	andps	%xmm2, %xmm1
	movaps	.LC8(%rip), %xmm2
	xorps	%xmm1, %xmm0
	movaps	%xmm0, %xmm5
	psllq	$37, %xmm5
	movaps	%xmm5, %xmm1
	andps	%xmm2, %xmm1
	xorps	%xmm1, %xmm0
	movq	%xmm0, %rdx
	psrlq	$43, %xmm0
	movq	%xmm0, %rax
	xorq	%rdx, %rax
	js	.L44
	cvtsi2sdq	%rax, %xmm0
	jmp	.L45
.L44:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2sdq	%rdx, %xmm0
	addsd	%xmm0, %xmm0
.L45:
	xorps	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	mulsd	.LC4(%rip), %xmm0
	comisd	.LC5(%rip), %xmm0
	jb	.L42
	movsd	.LC2(%rip), %xmm0
.L42:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5461:
	.size	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_, .-_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
	.section	.rodata.str1.1
.LC13:
	.string	"Success: "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4719:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4719
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$10000, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$2680, %rsp
	.cfi_def_cfa_offset 2736
	movq	%fs:40, %rax
	movq	%rax, 2664(%rsp)
	xorl	%eax, %eax
	leaq	112(%rsp), %r12
	leaq	88(%rsp), %rax
	movq	$0x000000000, 136(%rsp)
	movq	%r12, %rcx
	movq	%rax, %rdi
	leaq	72(%rsp), %rbx
	movq	%rax, 8(%rsp)
	leaq	136(%rsp), %r13
	movq	%r13, %rdx
.LEHB0:
	call	_ZNSt6vectorIdSaIdEEC1EmRKdRKS0_
.LEHE0:
	movq	%rbx, %rcx
	movq	%r13, %rdx
	movl	$10000, %esi
	movq	$0x000000000, 136(%rsp)
	movq	%r12, %rdi
.LEHB1:
	call	_ZNSt6vectorIdSaIdEEC1EmRKdRKS0_
.LEHE1:
	leaq	60(%rsp), %rcx
	movq	%rbx, %rdx
	movl	$10000, %esi
	movq	%r13, %rdi
	movq	$0x000000000, 72(%rsp)
.LEHB2:
	call	_ZNSt6vectorIdSaIdEEC1EmRKdRKS0_
.LEHE2:
	movl	$1, %edx
	movq	$20181205, 160(%rsp)
	leaq	160(%rsp), %rbp
	movabsq	$6364136223846793005, %rsi
.L50:
	movq	-8(%rbp,%rdx,8), %rax
	movq	%rax, %rdi
	shrq	$62, %rdi
	xorq	%rdi, %rax
	imulq	%rsi, %rax
	addq	%rdx, %rax
	movq	%rax, 0(%rbp,%rdx,8)
	incq	%rdx
	cmpq	$312, %rdx
	jne	.L50
	movq	$312, 2656(%rsp)
	xorl	%r15d, %r15d
.L51:
	movq	%rbp, %rdi
	call	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
	mulsd	.LC9(%rip), %xmm0
	movq	88(%rsp), %rbx
	movq	%rbp, %rdi
	subsd	.LC10(%rip), %xmm0
	movsd	%xmm0, (%rbx,%r15)
	call	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
	mulsd	.LC9(%rip), %xmm0
	movq	112(%rsp), %r14
	subsd	.LC10(%rip), %xmm0
	movsd	%xmm0, (%r14,%r15)
	addq	$8, %r15
	cmpq	$80000, %r15
	jne	.L51
	xorl	%edx, %edx
	leaq	28(%rsp), %rdi
	movl	%edx, 28(%rsp)
.LEHB3:
	call	cudaGetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	movl	$80000, %esi
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
	movq	%rax, 48(%rsp)
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$80000, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$80000, %esi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$80000, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$80000, %edx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$7, %rdx
	movl	$1, %esi
	movabsq	$4294967375, %rdi
	movl	$1, 80(%rsp)
	movq	%rdx, 72(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L52
.L54:
	call	cudaPeekAtLastError@PLT
	jmp	.L72
.L52:
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$10000, %ecx
	movq	32(%rsp), %rdi
	call	_Z41__device_stub__Z14add_vec_kernelPKdS0_PdiPKdS0_Pdi
	jmp	.L54
.L72:
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movl	$80000, %edx
	movq	136(%rsp), %r15
	movq	%r15, %rdi
	call	cudaMemcpy@PLT
	movq	.LC11(%rip), %xmm1
	movsd	.LC12(%rip), %xmm2
	xorl	%eax, %eax
.L56:
	movsd	(%rbx,%rax), %xmm0
	addsd	(%r14,%rax), %xmm0
	subsd	(%r15,%rax), %xmm0
	andps	%xmm1, %xmm0
	comisd	%xmm2, %xmm0
	ja	.L62
	addq	$8, %rax
	cmpq	$80000, %rax
	jne	.L56
	movb	$1, %bl
	jmp	.L55
.L62:
	xorl	%ebx, %ebx
.L55:
	leaq	.LC13(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	leaq	_ZSt9boolalphaRSt8ios_base(%rip), %rsi
	call	_ZNSolsEPFRSt8ios_baseS0_E@PLT
	movq	%rax, %rdi
	movzbl	%bl, %esi
	call	_ZNSo9_M_insertIbEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
.LEHE3:
	movq	%r13, %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	movq	%r12, %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	movq	2664(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	jmp	.L70
.L65:
	endbr64
	movq	%rax, %rbx
.L57:
	movq	%r13, %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	jmp	.L58
.L64:
	endbr64
	movq	%rax, %rbx
.L58:
	movq	%r12, %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	jmp	.L59
.L63:
	endbr64
	movq	%rax, %rbx
.L59:
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	movq	2664(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L70
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L70:
	call	__stack_chk_fail@PLT
.L61:
	addq	$2680, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4719:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4719:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4719-.LLSDACSB4719
.LLSDACSB4719:
	.uleb128 .LEHB0-.LFB4719
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4719
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L63-.LFB4719
	.uleb128 0
	.uleb128 .LEHB2-.LFB4719
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L64-.LFB4719
	.uleb128 0
	.uleb128 .LEHB3-.LFB4719
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L65-.LFB4719
	.uleb128 0
	.uleb128 .LEHB4-.LFB4719
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE4719:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-1
	.long	1072693247
	.align 8
.LC4:
	.long	0
	.long	1005584384
	.align 8
.LC5:
	.long	0
	.long	1072693248
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC6:
	.quad	6148914691236517205
	.quad	0
	.align 16
.LC7:
	.quad	8202884508482404352
	.quad	0
	.align 16
.LC8:
	.quad	-2270628950310912
	.quad	0
	.section	.rodata.cst8
	.align 8
.LC9:
	.long	0
	.long	1077149696
	.align 8
.LC10:
	.long	0
	.long	1076101120
	.section	.rodata.cst16
	.align 16
.LC11:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC12:
	.long	0
	.long	1018167296
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <cassert>
#include <cmath>
#include <cstddef>
#include <cstdint>
#include <cstdlib>
#include <iostream>
#include <limits>
#include <random>
#include <vector>

#include <hip/hip_runtime_api.h>
#include <hip/hip_runtime.h>

/* Define the kernel function: */

__global__ void add_vec_kernel(
    double const* __restrict__ x, double const* __restrict__ y,
    double* __restrict__ z, int const n )
{
    /* blockIdx, blockDim and threadIdx are variables describing the
     * dimensions of the "grid" which are automatically provided by the
     * Cuda runtime */

    int const gid = blockIdx.x * blockDim.x + threadIdx.x;

    if( gid < n )
    {
        z[ gid ] = x[ gid ] + y[ gid ];
    }

    return;
}

int main( void )
{
    /* ---------------------------------------------------------------------- */
    /* prepare the host vectors: */

    int32_t const N = int32_t{ 10000 };

    std::vector< double > x( N, double{ 0.0 } );
    std::vector< double > y( N, double{ 0.0 } );
    std::vector< double > z( N, double{ 0.0 } );

    std::mt19937_64 prng( 20181205u );
    std::uniform_real_distribution< double >
        dist( double{ -10. }, double{ +10. } );

    for( int32_t ii = int32_t{ 0 } ; ii < N ; ++ii )
    {
        x[ ii ] = dist( prng );
        y[ ii ] = dist( prng );
    }

    hipError_t cu_err;

    /* --------------------------------------------------------------------- */
    /* use the "default" / "first" Cuda device for the program: */

    int device = int{ 0 };
    ::hipGetDevice( &device );
    cu_err = ::hipDeviceSynchronize();
    assert( cu_err == ::hipSuccess );

    /* --------------------------------------------------------------------- */
    /* Allocate the buffers on the device */
    /* x_arg, y_arg, z_arg ... handles on the host side managing buffers in *
     * the device memory */

    double* x_arg = nullptr;
    double* y_arg = nullptr;
    double* z_arg = nullptr;

    ::hipMalloc( &x_arg, sizeof( double ) * N );
    ::hipMalloc( &y_arg, sizeof( double ) * N );
    ::hipMalloc( &z_arg, sizeof( double ) * N );

    /* --------------------------------------------------------------------- */
    /* Transfer x and y from host to device */

    ::hipMemcpy( x_arg, x.data(), sizeof( double ) * N, hipMemcpyHostToDevice );
    ::hipMemcpy( y_arg, y.data(), sizeof( double ) * N, hipMemcpyHostToDevice );

    /* --------------------------------------------------------------------- */
    /* execute kernel on the device */

    int32_t const threads_per_block = int32_t{ 128 };

    int32_t const num_blocks =
        ( N + threads_per_block - int32_t{ 1 } ) / threads_per_block;

    add_vec_kernel<<< num_blocks, threads_per_block >>>( x_arg, y_arg, z_arg, N );

    cu_err = ::hipPeekAtLastError();
    assert( cu_err == ::hipSuccess );

    /* -------------------------------------------------------------------- */
    /* transfer the result from the device buffer to the host buffer */

    ::hipMemcpy( z.data(), z_arg, sizeof( double ) * N, hipMemcpyDeviceToHost );

    /* ------------------------------------------------------------------- */
    /* verify that the result is correct */

    bool success = true;
    double const EPS = std::numeric_limits< double >::epsilon();

    for( int32_t ii = int32_t{ 0 } ; ii < N ; ++ii )
    {
        if( std::fabs( ( x[ ii ] + y[ ii ] ) - z[ ii ] ) > EPS )
        {
            success = false;
            break;
        }
    }

    std::cout << "Success: " << std::boolalpha << success << std::endl;

    /* -------------------------------------------------------------------- */
    /* Clean-up */

    ::hipFree( x_arg );
    ::hipFree( y_arg );
    ::hipFree( z_arg );

    return 0;
}

/* end: */

	.text
	.file	"vec_add_cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__add_vec_kernelPKdS0_Pdi # -- Begin function _Z29__device_stub__add_vec_kernelPKdS0_Pdi
	.type	_Z29__device_stub__add_vec_kernelPKdS0_Pdi,@function
_Z29__device_stub__add_vec_kernelPKdS0_Pdi: # @_Z29__device_stub__add_vec_kernelPKdS0_Pdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14add_vec_kernelPKdS0_Pdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__add_vec_kernelPKdS0_Pdi, .Lfunc_end0-_Z29__device_stub__add_vec_kernelPKdS0_Pdi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x4034000000000000              # double 20
.LCPI1_1:
	.quad	0xc024000000000000              # double -10
.LCPI1_3:
	.quad	0x3cb0000000000000              # double 2.2204460492503131E-16
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_2:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:                                # %.noexc
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$2536, %rsp                     # imm = 0x9E8
	.cfi_def_cfa_offset 2592
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$80000, %edi                    # imm = 0x13880
	callq	_Znwm
	movq	%rax, %rbx
	movl	$80000, %edx                    # imm = 0x13880
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp0:
	movl	$80000, %edi                    # imm = 0x13880
	callq	_Znwm
.Ltmp1:
# %bb.1:                                # %.lr.ph.i.i.i.i.i.i.i.i.i34.preheader
	movq	%rax, %r14
	movl	$80000, %edx                    # imm = 0x13880
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp3:
	movl	$80000, %edi                    # imm = 0x13880
	callq	_Znwm
.Ltmp4:
# %bb.2:                                # %.lr.ph.i.i.i.i.i.i.i.i.i39.preheader
	movq	%rax, %r15
	movl	$80000, %edx                    # imm = 0x13880
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	$20181205, 32(%rsp)             # imm = 0x133F0D5
	movl	$1, %eax
	movl	$20181205, %esi                 # imm = 0x133F0D5
	movabsq	$6364136223846793005, %rcx      # imm = 0x5851F42D4C957F2D
	movq	%rsi, %rdx
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	shrq	$62, %rdx
	xorq	%rsi, %rdx
	imulq	%rcx, %rdx
	addq	%rax, %rdx
	movq	%rdx, 32(%rsp,%rax,8)
	incq	%rax
	movq	%rdx, %rsi
	cmpq	$312, %rax                      # imm = 0x138
	jne	.LBB1_3
# %bb.4:
	leaq	32(%rsp), %r12
	movq	$312, 2496(%r12)                # imm = 0x138
	xorl	%r13d, %r13d
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
.Ltmp6:
	movq	%r12, %rdi
	callq	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
.Ltmp7:
	movsd	.LCPI1_0(%rip), %xmm2           # xmm2 = mem[0],zero
	movsd	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero
# %bb.6:                                #   in Loop: Header=BB1_5 Depth=1
	mulsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	movsd	%xmm0, (%rbx,%r13,8)
.Ltmp8:
	movq	%r12, %rdi
	callq	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
	movsd	.LCPI1_0(%rip), %xmm2           # xmm2 = mem[0],zero
	movsd	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero
.Ltmp9:
# %bb.7:                                #   in Loop: Header=BB1_5 Depth=1
	mulsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	movsd	%xmm0, (%r14,%r13,8)
	incq	%r13
	cmpq	$10000, %r13                    # imm = 0x2710
	jne	.LBB1_5
# %bb.8:
	leaq	28(%rsp), %rdi
	movl	$0, (%rdi)
.Ltmp11:
	callq	hipGetDevice
.Ltmp12:
# %bb.9:
.Ltmp13:
	callq	hipDeviceSynchronize
.Ltmp14:
# %bb.10:
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rax, 8(%rsp)
	movq	%rax, (%rsp)
.Ltmp16:
	movl	$80000, %esi                    # imm = 0x13880
	callq	hipMalloc
.Ltmp17:
# %bb.11:                               # %_ZL9hipMallocIdE10hipError_tPPT_m.exit
.Ltmp18:
	leaq	8(%rsp), %rdi
	movl	$80000, %esi                    # imm = 0x13880
	callq	hipMalloc
.Ltmp19:
# %bb.12:                               # %_ZL9hipMallocIdE10hipError_tPPT_m.exit49
.Ltmp20:
	movq	%rsp, %rdi
	movl	$80000, %esi                    # imm = 0x13880
	callq	hipMalloc
.Ltmp21:
# %bb.13:                               # %_ZL9hipMallocIdE10hipError_tPPT_m.exit51
	movq	16(%rsp), %rdi
.Ltmp22:
	movl	$80000, %edx                    # imm = 0x13880
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp23:
# %bb.14:
	movq	8(%rsp), %rdi
.Ltmp24:
	movl	$80000, %edx                    # imm = 0x13880
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp25:
# %bb.15:
.Ltmp27:
	movabsq	$4294967375, %rdi               # imm = 0x10000004F
	movabsq	$4294967424, %rdx               # imm = 0x100000080
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp28:
# %bb.16:
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.17:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
.Ltmp29:
	movl	$10000, %ecx                    # imm = 0x2710
	callq	_Z29__device_stub__add_vec_kernelPKdS0_Pdi
.Ltmp30:
.LBB1_18:
.Ltmp31:
	callq	hipPeekAtLastError
.Ltmp32:
# %bb.19:
	movq	(%rsp), %rsi
.Ltmp33:
	movl	$80000, %edx                    # imm = 0x13880
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp34:
# %bb.20:                               # %.preheader.preheader
	movsd	(%rbx), %xmm0                   # xmm0 = mem[0],zero
	addsd	(%r14), %xmm0
	subsd	(%r15), %xmm0
	andpd	.LCPI1_2(%rip), %xmm0
	ucomisd	.LCPI1_3(%rip), %xmm0
	jbe	.LBB1_28
# %bb.21:
	xorl	%ebp, %ebp
	jmp	.LBB1_32
.LBB1_28:                               # %.lr.ph.preheader
	xorl	%ecx, %ecx
	movapd	.LCPI1_2(%rip), %xmm0           # xmm0 = [NaN,NaN]
	movsd	.LCPI1_3(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB1_29:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rcx, %rax
	cmpq	$9999, %rcx                     # imm = 0x270F
	je	.LBB1_31
# %bb.30:                               # %.preheader
                                        #   in Loop: Header=BB1_29 Depth=1
	movsd	8(%rbx,%rax,8), %xmm2           # xmm2 = mem[0],zero
	addsd	8(%r14,%rax,8), %xmm2
	subsd	8(%r15,%rax,8), %xmm2
	andpd	%xmm0, %xmm2
	leaq	1(%rax), %rcx
	ucomisd	%xmm1, %xmm2
	jbe	.LBB1_29
.LBB1_31:                               # %.preheader._crit_edge.loopexit
	cmpq	$9999, %rax                     # imm = 0x270F
	setae	%bpl
.LBB1_32:                               # %.preheader._crit_edge
.Ltmp36:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp37:
# %bb.33:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	orl	$1, _ZSt4cout+24(%rax)
.Ltmp38:
	movzbl	%bpl, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIbEERSoT_
.Ltmp39:
# %bb.34:                               # %_ZNSolsEb.exit
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
.Ltmp40:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp41:
# %bb.35:                               # %.noexc71
.Ltmp42:
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
.Ltmp43:
# %bb.36:                               # %.noexc72
.Ltmp44:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp45:
# %bb.37:                               # %_ZNSolsEPFRSoS_E.exit
	movq	16(%rsp), %rdi
.Ltmp46:
	callq	hipFree
.Ltmp47:
# %bb.38:
	movq	8(%rsp), %rdi
.Ltmp48:
	callq	hipFree
.Ltmp49:
# %bb.39:
	movq	(%rsp), %rdi
.Ltmp50:
	callq	hipFree
.Ltmp51:
# %bb.40:                               # %_ZNSt6vectorIdSaIdEED2Ev.exit59
	movq	%r15, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$2536, %rsp                     # imm = 0x9E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_23:
	.cfi_def_cfa_offset 2592
.Ltmp5:
	movq	%rax, %r12
	jmp	.LBB1_43
.LBB1_22:
.Ltmp2:
	movq	%rax, %r12
	jmp	.LBB1_44
.LBB1_25:
.Ltmp15:
	jmp	.LBB1_42
.LBB1_27:
.Ltmp35:
	jmp	.LBB1_42
.LBB1_26:
.Ltmp26:
	jmp	.LBB1_42
.LBB1_41:
.Ltmp52:
	jmp	.LBB1_42
.LBB1_24:
.Ltmp10:
.LBB1_42:
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB1_43:                               # %_ZNSt6vectorIdSaIdEED2Ev.exit63
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB1_44:                               # %_ZNSt6vectorIdSaIdEED2Ev.exit65
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r12, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp1-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp1                  #   Call between .Ltmp1 and .Ltmp3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp6-.Ltmp4                  #   Call between .Ltmp4 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp9-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp14-.Ltmp11                #   Call between .Ltmp11 and .Ltmp14
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp25-.Ltmp16                #   Call between .Ltmp16 and .Ltmp25
	.uleb128 .Ltmp26-.Lfunc_begin0          #     jumps to .Ltmp26
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp34-.Ltmp27                #   Call between .Ltmp27 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin0          #     jumps to .Ltmp35
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp51-.Ltmp36                #   Call between .Ltmp36 and .Ltmp51
	.uleb128 .Ltmp52-.Lfunc_begin0          #     jumps to .Ltmp52
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp51-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Lfunc_end1-.Ltmp51            #   Call between .Ltmp51 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
.LCPI2_0:
	.long	0x5f800000                      # float 1.84467441E+19
.LCPI2_1:
	.long	0x40000000                      # float 2
.LCPI2_2:
	.long	0x5f000000                      # float 9.22337203E+18
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_3:
	.quad	0x3ff0000000000000              # double 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI2_4:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI2_5:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.text._ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_,comdat
	.weak	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
	.type	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_,@function
_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_: # @_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	flds	.LCPI2_0(%rip)
	fstpt	(%rsp)
	callq	logl
	fstpt	24(%rsp)                        # 10-byte Folded Spill
	flds	.LCPI2_1(%rip)
	fstpt	(%rsp)
	callq	logl
	fldt	24(%rsp)                        # 10-byte Folded Reload
	fdivp	%st, %st(1)
	flds	.LCPI2_2(%rip)
	xorl	%ecx, %ecx
	fxch	%st(1)
	fucomi	%st(1), %st
	fldz
	fcmovnb	%st(2), %st
	fstp	%st(2)
	fsubp	%st, %st(1)
	setae	%cl
	fnstcw	20(%rsp)
	movzwl	20(%rsp), %eax
	orl	$3072, %eax                     # imm = 0xC00
	movw	%ax, 22(%rsp)
	fldcw	22(%rsp)
	fistpll	64(%rsp)
	fldcw	20(%rsp)
	shlq	$63, %rcx
	xorq	64(%rsp), %rcx
	leaq	52(%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r14
	cmpq	$1, %rax
	adcq	$0, %r14
	xorpd	%xmm0, %xmm0
	movsd	.LCPI2_3(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB2_1:                                # %select.unfold
                                        # =>This Inner Loop Header: Depth=1
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	movq	%rax, %xmm0
	punpckldq	.LCPI2_4(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI2_5(%rip), %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	40(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	mulsd	%xmm2, %xmm1
	movsd	%xmm2, 56(%rsp)
	fldl	56(%rsp)
	fmuls	.LCPI2_0(%rip)
	addsd	%xmm1, %xmm0
	fstpl	48(%rsp)
	movsd	48(%rsp), %xmm1                 # xmm1 = mem[0],zero
	decq	%r14
	jne	.LBB2_1
# %bb.2:
	divsd	%xmm1, %xmm0
	ucomisd	.LCPI2_3(%rip), %xmm0
	jae	.LBB2_4
# %bb.3:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_4:
	.cfi_def_cfa_offset 96
	movsd	.LCPI2_3(%rip), %xmm0           # xmm0 = mem[0],zero
	xorpd	%xmm1, %xmm1
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	nextafter                       # TAILCALL
.Lfunc_end2:
	.size	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_, .Lfunc_end2-_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEET_RT1_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv # -- Begin function _ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv,@function
_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv: # @_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	2496(%rdi), %rax
	cmpq	$312, %rax                      # imm = 0x138
	jb	.LBB3_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	movq	2496(%rbx), %rax
.LBB3_2:
	leaq	1(%rax), %rcx
	movq	%rcx, 2496(%rbx)
	movq	(%rbx,%rax,8), %rax
	movq	%rax, %rcx
	shrq	$29, %rcx
	movabsq	$22906492245, %rdx              # imm = 0x555555555
	andq	%rcx, %rdx
	xorq	%rax, %rdx
	movq	%rdx, %rax
	shlq	$17, %rax
	movabsq	$8202884508482404352, %rcx      # imm = 0x71D67FFFEDA60000
	andq	%rax, %rcx
	xorq	%rdx, %rcx
	movl	%ecx, %edx
	andl	$134201207, %edx                # imm = 0x7FFBF77
	shlq	$37, %rdx
	xorq	%rcx, %rdx
	movq	%rdx, %rax
	shrq	$43, %rax
	xorq	%rdx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv, .Lfunc_end3-_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv # -- Begin function _ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,@function
_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv: # @_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.cfi_startproc
# %bb.0:
	movabsq	$-5403634167711393303, %rax     # imm = 0xB5026F5AA96619E9
	movq	(%rdi), %rdx
	xorl	%ecx, %ecx
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	8(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	1248(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negq	%rsi
	andq	%rax, %rsi
	xorq	%r8, %rsi
	movq	%rsi, (%rdi,%rcx,8)
	leaq	1(%rcx), %rsi
	movq	%rsi, %rcx
	cmpq	$156, %rsi
	jne	.LBB4_1
# %bb.2:                                # %.preheader.preheader
	movq	1248(%rdi), %rdx
	movl	$157, %ecx
.LBB4_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	-1256(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negq	%rsi
	andq	%rax, %rsi
	xorq	%r8, %rsi
	movq	%rsi, -8(%rdi,%rcx,8)
	incq	%rcx
	cmpq	$312, %rcx                      # imm = 0x138
	jne	.LBB4_3
# %bb.4:
	movq	$-2147483648, %rcx              # imm = 0x80000000
	andq	2488(%rdi), %rcx
	movq	(%rdi), %rdx
	movl	%edx, %esi
	andl	$2147483646, %esi               # imm = 0x7FFFFFFE
	orq	%rcx, %rsi
	shrq	%rsi
	xorq	1240(%rdi), %rsi
	andl	$1, %edx
	negq	%rdx
	andq	%rax, %rdx
	xorq	%rsi, %rdx
	movq	%rdx, 2488(%rdi)
	movq	$0, 2496(%rdi)
	retq
.Lfunc_end4:
	.size	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv, .Lfunc_end4-_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14add_vec_kernelPKdS0_Pdi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14add_vec_kernelPKdS0_Pdi,@object # @_Z14add_vec_kernelPKdS0_Pdi
	.section	.rodata,"a",@progbits
	.globl	_Z14add_vec_kernelPKdS0_Pdi
	.p2align	3, 0x0
_Z14add_vec_kernelPKdS0_Pdi:
	.quad	_Z29__device_stub__add_vec_kernelPKdS0_Pdi
	.size	_Z14add_vec_kernelPKdS0_Pdi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Success: "
	.size	.L.str, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14add_vec_kernelPKdS0_Pdi"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__add_vec_kernelPKdS0_Pdi
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z14add_vec_kernelPKdS0_Pdi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14add_vec_kernelPKdS0_Pdi ; -- Begin function _Z14add_vec_kernelPKdS0_Pdi
	.globl	_Z14add_vec_kernelPKdS0_Pdi
	.p2align	8
	.type	_Z14add_vec_kernelPKdS0_Pdi,@function
_Z14add_vec_kernelPKdS0_Pdi:            ; @_Z14add_vec_kernelPKdS0_Pdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14add_vec_kernelPKdS0_Pdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14add_vec_kernelPKdS0_Pdi, .Lfunc_end0-_Z14add_vec_kernelPKdS0_Pdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .actual_access:  read_only
        .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  write_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14add_vec_kernelPKdS0_Pdi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14add_vec_kernelPKdS0_Pdi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
