/*
        Grupo: 8
        Nome: Abner Eduardo Silveira Santos             NUSP: 10692012
        Nome: Gyovana Mayara Moriyama                   NUSP: 10734387
        Nome: Henrique Matarazo Camillo                 NUSP: 10294943
        Nome: Vitor Augusto de Oliveira                 NUSP: 9360815
*/

/*
Soma dois vetores
Ilustra a alocação dinâmica da memoria compartilhada
*/

#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <limits.h>

#define TAM 16
#define TPB 2

__global__ void min_max(int *vetorA, int *vetorB,int *min_max_val,int tam)
{ 
    int idx = blockDim.x * blockIdx.x + threadIdx.x; 
    if (idx < tam) 
    {
        if (vetorA[idx] < min_max_val[0])
            min_max_val[0] = vetorA[idx];
        if (vetorA[idx] > min_max_val[1])
            min_max_val[1] = vetorA[idx];
        if (vetorB[idx] < min_max_val[0])
            min_max_val[0] = vetorB[idx];
        if (vetorB[idx] > min_max_val[1])
            min_max_val[1] = vetorB[idx];
    }
}

__global__ void mult(int *vetorA, int *vetorB,int *vetorC,int tam)
{ 
    int idx = blockDim.x * blockIdx.x + threadIdx.x; 
    if (idx < tam) 
    {
        vetorC[idx] = vetorA[idx] * vetorB[idx];
    }
}

// __global__ void soma(int *vetorA, int *vetorB,int *vetorC,int tam)
// { 
//     int idx = blockDim.x * blockIdx.x + threadIdx.x; 
//     if (idx < tam) 
//     {
//         vetorC[idx]=vetorA[idx]+vetorB[idx];
//     }
// }

int main(int argc,char **argv){

    //Declara as matrizes
    int *A,*B,*C;
    //Declara as variáveis de índice
    int i,j,k,dim;
    //Declara o acumulador para o produto escalar global
    int somape, minimo = INT_MAX, maximo = INT_MIN;
    int* min_max_val;

    //Declara um vetor para os produtos escalares locais
    // int prod_escalar;

    FILE *inputfile;     // handler para o arquivo de entrada
    char *inputfilename;  // nome do arquivo de entrada

   
    if (argc < 2)
    {
        printf("Please run with input file name, i.e., num_perf_mpi inputfile.ext\n");
        exit(-1);
    }

    inputfilename = (char*) malloc (256*sizeof(char));
    strcpy(inputfilename,argv[1]);

	printf("inputfilename=%s\n", inputfilename);
	fflush(0);

    if ((inputfile=fopen(inputfilename,"r")) == 0)
    {
		printf("Error openning input file.\n");
		exit(-1);
    }
    
    fscanf(inputfile, "%d\n", &dim); //Lê a dimensão das matrizes
    
    //Aloca as matrizes
    cudaHostAlloc((void**)&A, dim * dim * sizeof(int), cudaHostAllocMapped);
    cudaHostAlloc((void**)&B, dim * dim * sizeof(int), cudaHostAllocMapped); 
    cudaHostAlloc((void**)&C, dim * dim * sizeof(int), cudaHostAllocMapped); 
    cudaHostAlloc((void**)&min_max_val, 3 * sizeof(int), cudaHostAllocMapped); 

    //Aloca um vetor para armazenar os produtos escalares de cada linha
    // cudaHostAlloc((void*)&prod_escalar, sizeof(int), cudaHostAllocMapped);

     //Lê a matriz A
    for (i = 0; i < dim; i++)
        for (j = 0; j < dim; j++)
            fscanf(inputfile, "%d ",&(A[i*dim+j]));


    //Lê a matriz B
    for (i = 0; i < dim; i++)
        for(j = 0; j < dim; j++)
            fscanf(inputfile, "%d ",&(B[i*dim+j])); 

    min_max_val[0] = INT_MAX;
    min_max_val[1] = INT_MIN;

	cudaDeviceSynchronize();
	
	// fecha o arquivo de entrada
	fclose(inputfile);





    int threadsPerBlock,blocksPerGrid; 

    //Define a quantidade de threads por bloco
    threadsPerBlock = 256; 
    
    //Define a quantidade de blocos por grade
    blocksPerGrid = (dim * dim + threadsPerBlock - 1) / threadsPerBlock; 




    //Invoca o kernel com blocksPerGrid blocos e threadsPerBlock threads
    mult <<<blocksPerGrid, threadsPerBlock>>> (A, B, C, dim * dim); 
    min_max <<<blocksPerGrid, threadsPerBlock>>> (A, B, min_max_val, dim * dim); 

	cudaDeviceSynchronize();
	
    //Imprime o resultado no host
    int result = 0;
    for(i = 0; i < dim * dim; i++)
    {
        // printf("%d ",C[i]);
        result += C[i];
    }
    
    printf("%d\n", result);

    printf("%d %d", min_max_val[0], min_max_val[1]);
	
	

    //Desaloca os vetores no host e no device
    cudaFreeHost(A);
    cudaFreeHost(B);
    cudaFreeHost(C);
    cudaFreeHost(min_max_val);

}
	.file	"tmpxft_002a1903_00000000-6_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z31__device_stub__Z7min_maxPiS_S_iPiS_S_i
	.type	_Z31__device_stub__Z7min_maxPiS_S_iPiS_S_i, @function
_Z31__device_stub__Z7min_maxPiS_S_iPiS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7min_maxPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z31__device_stub__Z7min_maxPiS_S_iPiS_S_i, .-_Z31__device_stub__Z7min_maxPiS_S_iPiS_S_i
	.globl	_Z7min_maxPiS_S_i
	.type	_Z7min_maxPiS_S_i, @function
_Z7min_maxPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7min_maxPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z7min_maxPiS_S_i, .-_Z7min_maxPiS_S_i
	.globl	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.type	_Z28__device_stub__Z4multPiS_S_iPiS_S_i, @function
_Z28__device_stub__Z4multPiS_S_iPiS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4multPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z28__device_stub__Z4multPiS_S_iPiS_S_i, .-_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.globl	_Z4multPiS_S_i
	.type	_Z4multPiS_S_i, @function
_Z4multPiS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2055:
	.size	_Z4multPiS_S_i, .-_Z4multPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Please run with input file name, i.e., num_perf_mpi inputfile.ext\n"
.LC1:
	.string	"inputfilename=%s\n"
.LC2:
	.string	"r"
.LC3:
	.string	"Error openning input file.\n"
.LC4:
	.string	"%d\n"
.LC5:
	.string	"%d "
.LC6:
	.string	"%d %d"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L14
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	jmp	.L30
.L14:
	movq	%rsi, %rbp
	movl	$256, %edi
	call	malloc@PLT
	movq	8(%rbp), %rsi
	movl	$256, %edx
	movq	%rax, %rbx
	movq	%rax, %rdi
	call	__strcpy_chk@PLT
	movq	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	fflush@PLT
	movq	%rbx, %rdi
	leaq	.LC2(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L15
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
.L30:
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L15:
	leaq	.LC4(%rip), %rbp
	movq	%rax, %rdi
	leaq	12(%rsp), %rdx
	xorl	%eax, %eax
	movq	%rbp, %rsi
	xorl	%r13d, %r13d
	leaq	.LC5(%rip), %r12
	call	__isoc23_fscanf@PLT
	movl	12(%rsp), %esi
	leaq	16(%rsp), %rdi
	movl	$2, %edx
	imull	%esi, %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaHostAlloc@PLT
	movl	12(%rsp), %esi
	leaq	24(%rsp), %rdi
	movl	$2, %edx
	imull	%esi, %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaHostAlloc@PLT
	movl	12(%rsp), %esi
	leaq	32(%rsp), %rdi
	movl	$2, %edx
	imull	%esi, %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaHostAlloc@PLT
	leaq	40(%rsp), %rdi
	movl	$2, %edx
	movl	$12, %esi
	call	cudaHostAlloc@PLT
.L16:
	cmpl	%r13d, 12(%rsp)
	jle	.L31
	xorl	%r14d, %r14d
.L18:
	movl	12(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L32
	imull	%r13d, %eax
	movq	16(%rsp), %rdx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	addl	%r14d, %eax
	incl	%r14d
	cltq
	leaq	(%rdx,%rax,4), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L18
.L32:
	incl	%r13d
	jmp	.L16
.L31:
	xorl	%r13d, %r13d
	leaq	.LC5(%rip), %r12
.L19:
	cmpl	%r13d, 12(%rsp)
	jle	.L33
	xorl	%r14d, %r14d
.L21:
	movl	12(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L34
	imull	%r13d, %eax
	movq	24(%rsp), %rdx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	addl	%r14d, %eax
	incl	%r14d
	cltq
	leaq	(%rdx,%rax,4), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L21
.L34:
	incl	%r13d
	jmp	.L19
.L33:
	movabsq	$-9223372034707292161, %rcx
	movq	40(%rsp), %rax
	movq	%rcx, (%rax)
	call	cudaDeviceSynchronize@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
	movl	12(%rsp), %ebx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$16777217, %edx
	movl	$1, %ecx
	movl	$1, 68(%rsp)
	imull	%ebx, %ebx
	movq	%rax, 52(%rsp)
	movl	56(%rsp), %esi
	salq	$8, %rdx
	movq	%rdx, 60(%rsp)
	addl	$255, %ebx
	sarl	$8, %ebx
	movl	%ebx, 48(%rsp)
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movl	12(%rsp), %ecx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	imull	%ecx, %ecx
	call	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
.L22:
	movl	%ebx, 48(%rsp)
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, 68(%rsp)
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	movq	%rdx, 60(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movl	12(%rsp), %ecx
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	imull	%ecx, %ecx
	call	_Z31__device_stub__Z7min_maxPiS_S_iPiS_S_i
.L23:
	call	cudaDeviceSynchronize@PLT
	movl	12(%rsp), %eax
	movq	32(%rsp), %rsi
	xorl	%ecx, %ecx
	imull	%eax, %eax
	movl	%eax, %edx
	xorl	%eax, %eax
.L24:
	cmpl	%eax, %edx
	jle	.L35
	addl	(%rsi,%rax,4), %ecx
	incq	%rax
	jmp	.L24
.L35:
	movl	%ecx, %edx
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	40(%rsp), %rax
	movl	$2, %edi
	leaq	.LC6(%rip), %rsi
	movl	4(%rax), %ecx
	movl	(%rax), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	32(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	40(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z4multPiS_S_i"
.LC8:
	.string	"_Z7min_maxPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z4multPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7min_maxPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
        Grupo: 8
        Nome: Abner Eduardo Silveira Santos             NUSP: 10692012
        Nome: Gyovana Mayara Moriyama                   NUSP: 10734387
        Nome: Henrique Matarazo Camillo                 NUSP: 10294943
        Nome: Vitor Augusto de Oliveira                 NUSP: 9360815
*/

/*
Soma dois vetores
Ilustra a alocação dinâmica da memoria compartilhada
*/

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <limits.h>

#define TAM 16
#define TPB 2

__global__ void min_max(int *vetorA, int *vetorB,int *min_max_val,int tam)
{ 
    int idx = blockDim.x * blockIdx.x + threadIdx.x; 
    if (idx < tam) 
    {
        if (vetorA[idx] < min_max_val[0])
            min_max_val[0] = vetorA[idx];
        if (vetorA[idx] > min_max_val[1])
            min_max_val[1] = vetorA[idx];
        if (vetorB[idx] < min_max_val[0])
            min_max_val[0] = vetorB[idx];
        if (vetorB[idx] > min_max_val[1])
            min_max_val[1] = vetorB[idx];
    }
}

__global__ void mult(int *vetorA, int *vetorB,int *vetorC,int tam)
{ 
    int idx = blockDim.x * blockIdx.x + threadIdx.x; 
    if (idx < tam) 
    {
        vetorC[idx] = vetorA[idx] * vetorB[idx];
    }
}

// __global__ void soma(int *vetorA, int *vetorB,int *vetorC,int tam)
// { 
//     int idx = blockDim.x * blockIdx.x + threadIdx.x; 
//     if (idx < tam) 
//     {
//         vetorC[idx]=vetorA[idx]+vetorB[idx];
//     }
// }

int main(int argc,char **argv){

    //Declara as matrizes
    int *A,*B,*C;
    //Declara as variáveis de índice
    int i,j,k,dim;
    //Declara o acumulador para o produto escalar global
    int somape, minimo = INT_MAX, maximo = INT_MIN;
    int* min_max_val;

    //Declara um vetor para os produtos escalares locais
    // int prod_escalar;

    FILE *inputfile;     // handler para o arquivo de entrada
    char *inputfilename;  // nome do arquivo de entrada

   
    if (argc < 2)
    {
        printf("Please run with input file name, i.e., num_perf_mpi inputfile.ext\n");
        exit(-1);
    }

    inputfilename = (char*) malloc (256*sizeof(char));
    strcpy(inputfilename,argv[1]);

	printf("inputfilename=%s\n", inputfilename);
	fflush(0);

    if ((inputfile=fopen(inputfilename,"r")) == 0)
    {
		printf("Error openning input file.\n");
		exit(-1);
    }
    
    fscanf(inputfile, "%d\n", &dim); //Lê a dimensão das matrizes
    
    //Aloca as matrizes
    hipHostAlloc((void**)&A, dim * dim * sizeof(int), hipHostMallocMapped);
    hipHostAlloc((void**)&B, dim * dim * sizeof(int), hipHostMallocMapped); 
    hipHostAlloc((void**)&C, dim * dim * sizeof(int), hipHostMallocMapped); 
    hipHostAlloc((void**)&min_max_val, 3 * sizeof(int), hipHostMallocMapped); 

    //Aloca um vetor para armazenar os produtos escalares de cada linha
    // cudaHostAlloc((void*)&prod_escalar, sizeof(int), cudaHostAllocMapped);

     //Lê a matriz A
    for (i = 0; i < dim; i++)
        for (j = 0; j < dim; j++)
            fscanf(inputfile, "%d ",&(A[i*dim+j]));


    //Lê a matriz B
    for (i = 0; i < dim; i++)
        for(j = 0; j < dim; j++)
            fscanf(inputfile, "%d ",&(B[i*dim+j])); 

    min_max_val[0] = INT_MAX;
    min_max_val[1] = INT_MIN;

	hipDeviceSynchronize();
	
	// fecha o arquivo de entrada
	fclose(inputfile);





    int threadsPerBlock,blocksPerGrid; 

    //Define a quantidade de threads por bloco
    threadsPerBlock = 256; 
    
    //Define a quantidade de blocos por grade
    blocksPerGrid = (dim * dim + threadsPerBlock - 1) / threadsPerBlock; 




    //Invoca o kernel com blocksPerGrid blocos e threadsPerBlock threads
    mult <<<blocksPerGrid, threadsPerBlock>>> (A, B, C, dim * dim); 
    min_max <<<blocksPerGrid, threadsPerBlock>>> (A, B, min_max_val, dim * dim); 

	hipDeviceSynchronize();
	
    //Imprime o resultado no host
    int result = 0;
    for(i = 0; i < dim * dim; i++)
    {
        // printf("%d ",C[i]);
        result += C[i];
    }
    
    printf("%d\n", result);

    printf("%d %d", min_max_val[0], min_max_val[1]);
	
	

    //Desaloca os vetores no host e no device
    hipHostFree(A);
    hipHostFree(B);
    hipHostFree(C);
    hipHostFree(min_max_val);

}
	.text
	.file	"cuda.hip"
	.globl	_Z22__device_stub__min_maxPiS_S_i # -- Begin function _Z22__device_stub__min_maxPiS_S_i
	.type	_Z22__device_stub__min_maxPiS_S_i,@function
_Z22__device_stub__min_maxPiS_S_i:      # @_Z22__device_stub__min_maxPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7min_maxPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__min_maxPiS_S_i, .Lfunc_end0-_Z22__device_stub__min_maxPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__multPiS_S_i  # -- Begin function _Z19__device_stub__multPiS_S_i
	.type	_Z19__device_stub__multPiS_S_i,@function
_Z19__device_stub__multPiS_S_i:         # @_Z19__device_stub__multPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4multPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__multPiS_S_i, .Lfunc_end1-_Z19__device_stub__multPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jle	.LBB2_1
# %bb.3:
	movq	%rsi, %rbx
	movl	$256, %edi                      # imm = 0x100
	callq	malloc
	movq	%rax, %r14
	movq	8(%rbx), %rsi
	movq	%rax, %rdi
	callq	strcpy
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	fflush
	movl	$.L.str.2, %esi
	movq	%r14, %rdi
	callq	fopen
	testq	%rax, %rax
	je	.LBB2_4
# %bb.5:
	movq	%rax, %rbx
	leaq	4(%rsp), %r14
	movl	$.L.str.4, %esi
	movq	%rax, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r14), %esi
	imull	%esi, %esi
	shlq	$2, %rsi
	leaq	24(%rsp), %rdi
	movl	$2, %edx
	callq	hipHostAlloc
	movl	(%r14), %esi
	imull	%esi, %esi
	shlq	$2, %rsi
	leaq	16(%rsp), %rdi
	movl	$2, %edx
	callq	hipHostAlloc
	movl	(%r14), %esi
	imull	%esi, %esi
	shlq	$2, %rsi
	leaq	32(%rsp), %rdi
	movl	$2, %edx
	callq	hipHostAlloc
	leaq	8(%rsp), %rdi
	movl	$12, %esi
	movl	$2, %edx
	callq	hipHostAlloc
	movl	(%r14), %eax
	testl	%eax, %eax
	jle	.LBB2_17
# %bb.6:                                # %.preheader56.preheader
	xorl	%ebp, %ebp
.LBB2_7:                                # %.preheader56
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_9 Depth 2
	testl	%eax, %eax
	jle	.LBB2_10
# %bb.8:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_7 Depth=1
	xorl	%r14d, %r14d
.LBB2_9:                                # %.lr.ph
                                        #   Parent Loop BB2_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebp, %eax
	movslq	%eax, %rdx
	addq	%r14, %rdx
	shlq	$2, %rdx
	addq	24(%rsp), %rdx
	movl	$.L.str.5, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	4(%rsp), %eax
	incq	%r14
	cmpl	%eax, %r14d
	jl	.LBB2_9
.LBB2_10:                               # %._crit_edge
                                        #   in Loop: Header=BB2_7 Depth=1
	incl	%ebp
	cmpl	%eax, %ebp
	jl	.LBB2_7
# %bb.11:                               # %.preheader55
	testl	%eax, %eax
	jle	.LBB2_17
# %bb.12:                               # %.preheader.preheader
	xorl	%ebp, %ebp
.LBB2_13:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_15 Depth 2
	testl	%eax, %eax
	jle	.LBB2_16
# %bb.14:                               # %.lr.ph60.preheader
                                        #   in Loop: Header=BB2_13 Depth=1
	xorl	%r14d, %r14d
.LBB2_15:                               # %.lr.ph60
                                        #   Parent Loop BB2_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebp, %eax
	movslq	%eax, %rdx
	addq	%r14, %rdx
	shlq	$2, %rdx
	addq	16(%rsp), %rdx
	movl	$.L.str.5, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	4(%rsp), %eax
	incq	%r14
	cmpl	%eax, %r14d
	jl	.LBB2_15
.LBB2_16:                               # %._crit_edge61
                                        #   in Loop: Header=BB2_13 Depth=1
	incl	%ebp
	cmpl	%eax, %ebp
	jl	.LBB2_13
.LBB2_17:                               # %._crit_edge63
	movabsq	$4294967552, %r14               # imm = 0x100000100
	movq	8(%rsp), %rax
	movabsq	$-9223372034707292161, %rcx     # imm = 0x800000007FFFFFFF
	movq	%rcx, (%rax)
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	callq	fclose
	movl	4(%rsp), %eax
	imull	%eax, %eax
	addl	$255, %eax
	shrl	$8, %eax
	leaq	(%rax,%r14), %r15
	addq	$-256, %r15
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_19
# %bb.18:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	4(%rsp), %ecx
	imull	%ecx, %ecx
	callq	_Z19__device_stub__multPiS_S_i
.LBB2_19:
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_21
# %bb.20:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	4(%rsp), %ecx
	imull	%ecx, %ecx
	callq	_Z22__device_stub__min_maxPiS_S_i
.LBB2_21:
	callq	hipDeviceSynchronize
	movl	4(%rsp), %eax
	testl	%eax, %eax
	je	.LBB2_24
# %bb.22:                               # %.lr.ph67
	imull	%eax, %eax
	movq	32(%rsp), %rcx
	cmpl	$1, %eax
	adcl	$0, %eax
	xorl	%edx, %edx
	xorl	%ebx, %ebx
.LBB2_23:                               # =>This Inner Loop Header: Depth=1
	addl	(%rcx,%rdx,4), %ebx
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB2_23
.LBB2_24:                               # %._crit_edge68
	movl	$.L.str.4, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movq	8(%rsp), %rax
	movl	(%rax), %esi
	movl	4(%rax), %edx
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	16(%rsp), %rdi
	callq	hipHostFree
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	8(%rsp), %rdi
	callq	hipHostFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 80
	movl	$.Lstr.1, %edi
	jmp	.LBB2_2
.LBB2_4:
	movl	$.Lstr, %edi
.LBB2_2:
	callq	puts@PLT
	movl	$-1, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7min_maxPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4multPiS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7min_maxPiS_S_i,@object       # @_Z7min_maxPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z7min_maxPiS_S_i
	.p2align	3, 0x0
_Z7min_maxPiS_S_i:
	.quad	_Z22__device_stub__min_maxPiS_S_i
	.size	_Z7min_maxPiS_S_i, 8

	.type	_Z4multPiS_S_i,@object          # @_Z4multPiS_S_i
	.globl	_Z4multPiS_S_i
	.p2align	3, 0x0
_Z4multPiS_S_i:
	.quad	_Z19__device_stub__multPiS_S_i
	.size	_Z4multPiS_S_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"inputfilename=%s\n"
	.size	.L.str.1, 18

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d\n"
	.size	.L.str.4, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d "
	.size	.L.str.5, 4

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%d %d"
	.size	.L.str.6, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7min_maxPiS_S_i"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z4multPiS_S_i"
	.size	.L__unnamed_2, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Error openning input file."
	.size	.Lstr, 27

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Please run with input file name, i.e., num_perf_mpi inputfile.ext"
	.size	.Lstr.1, 66

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__min_maxPiS_S_i
	.addrsig_sym _Z19__device_stub__multPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7min_maxPiS_S_i
	.addrsig_sym _Z4multPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7min_maxPiS_S_i       ; -- Begin function _Z7min_maxPiS_S_i
	.globl	_Z7min_maxPiS_S_i
	.p2align	8
	.type	_Z7min_maxPiS_S_i,@function
_Z7min_maxPiS_S_i:                      ; @_Z7min_maxPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_9
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	s_load_b32 s2, s[0:1], 0x0
	global_load_b32 v5, v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v4, s2
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s2, v5
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_mov_b32_e32 v4, 0
	global_store_b32 v4, v5, s[0:1]
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v4, v5 :: v_dual_mov_b32 v5, v2
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b32 v2, v3, s[0:1] offset:4
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v5, v2
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_mov_b32_e32 v2, v5
	global_store_b32 v3, v5, s[0:1] offset:4
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_mov_b32 s2, exec_lo
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v3, v4
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_mov_b32_e32 v4, 0
	global_store_b32 v4, v3, s[0:1]
	global_load_b32 v3, v[0:1], off
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v3, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	global_store_b32 v0, v3, s[0:1] offset:4
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7min_maxPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7min_maxPiS_S_i, .Lfunc_end0-_Z7min_maxPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4multPiS_S_i          ; -- Begin function _Z4multPiS_S_i
	.globl	_Z4multPiS_S_i
	.p2align	8
	.type	_Z4multPiS_S_i,@function
_Z4multPiS_S_i:                         ; @_Z4multPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4multPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z4multPiS_S_i, .Lfunc_end1-_Z4multPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7min_maxPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7min_maxPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4multPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4multPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
