#include <iostream>
#include <cuda_runtime.h>
#include <iomanip>
using namespace std;

struct feature {
    int channel;
    int width;
    int height;
    size_t size;
    float* h_elements;
    float* d_elements;
};

struct kernel {
    int number;
    int channel;
    int width;
    int height;
    size_t size;
    float* h_elements;
    float* d_elements;
};

__global__ void Conv2dKernel(feature A, kernel B, feature C){
    float Cvalue = 0;

    int c = threadIdx.x;
    
    int n = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;

    extern __shared__ float channels[];

    channels[c] = 0;
    for (int i = 0; i < B.width; i++){
        for (int j = 0; j < B.height; j++){
            int idxA = c * A.height * A.width + (w + i) * A.height + h + j;
            int idxB = n * B.channel * B.width * B.height + c * B.width * B.height + i * B.width + j;
            channels[c] += A.d_elements[idxA] * B.d_elements[idxB];
        }
    }
    __syncthreads();

    for (int i = 0; i < B.channel; i++)
        Cvalue += channels[i];

    __syncthreads();

    C.d_elements[n * gridDim.y * gridDim.z + w * gridDim.z + h] = Cvalue;

}

__global__ void AddBiasKernel(feature A, kernel B){
    int c = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;
    
    int idxA = c * A.width*A.height + w * A.height + h;

    A.d_elements[idxA] += B.d_elements[c];
}

__global__ void paddingKernel(float* A, feature B, int padding){
    // A is original array, B is padded array
    int c = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;
    
    int idxA = c * gridDim.y*gridDim.z + w * gridDim.z + h;
    int idxB = c * B.width*B.height + (w + padding) * B.height + (h + padding);
    B.d_elements[idxB] = A[idxA];
}

__global__ void ReLUKernel(feature A){
    int c = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;
    
    int idxA = c * A.width*A.height + w * A.height + h;

    if (A.d_elements[idxA] < 0)
        A.d_elements[idxA] = 0;
}

__global__ void MaxpoolingKernel(feature A, feature B, int filter){
    // A is input B is output
    int c = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;

    float max_value = A.d_elements[c * A.width*A.height + w*filter * A.height + h*filter];

    for (int i = 0; i < filter; i++){
        for (int j = 0; j < filter; j++){
            int idxA = c * A.height * A.width + (w*filter + i) * A.height + h*filter + j;
            if (max_value < A.d_elements[idxA])
                max_value = A.d_elements[idxA];
        }
    }

    int idxB = c * gridDim.y * gridDim.z + w * gridDim.z + h;
    B.d_elements[idxB] = max_value;


}

void init_feature(feature& A, int channel, int width, int height, float init_value = 0);
void init_kernel(kernel& A, int number, int channel, int width, int height, float init_value = 0);
void init_feature(feature& A, int channel, int width, int height, string filename);
void init_kernel(kernel& A, int number, int channel, int width, int height, string filename);

void fprint(feature data);
void kprint(kernel data);

void make_pad(feature& A, int pad);
void ReLU(feature& A);
void convolution(feature& A, kernel B, int stride);
void addBias(feature& A, kernel B);
void maxPooling(feature& A, int filter);
void view(feature& A);

int main()
{
    //feature A initialization
    feature A;
    init_feature(A, 3, 8, 8, 1);
    cudaMalloc(&A.d_elements, A.size);
    cudaMemcpy(A.d_elements, A.h_elements, A.size, cudaMemcpyHostToDevice);
    fprint(A);

    //kernel B initialization
    kernel B;
    init_kernel(B, 3, 3, 3, 3, 1);
    cudaMalloc(&B.d_elements, B.size);
    cudaMemcpy(B.d_elements, B.h_elements, B.size, cudaMemcpyHostToDevice);
    kprint(B);

    //kernel C initialization
    kernel C;
    init_kernel(C, 3, 1, 1, 1, 1);
    cudaMalloc(&C.d_elements, C.size);
    cudaMemcpy(C.d_elements, C.h_elements, C.size, cudaMemcpyHostToDevice);
    kprint(C);

    //calculation
    make_pad(A, 1);
    convolution(A, B, 1);
    addBias(A,C);
    ReLU(A);
    maxPooling(A, 2);
    view(A);



    //receive data from device
    delete A.h_elements;
    A.size = A.channel * A.width * A.height * sizeof(float);    
    A.h_elements = new float [A.size];
    cudaMemcpy(A.h_elements, A.d_elements, A.size, cudaMemcpyDeviceToHost);
    
    //print data
    fprint(A);
    
    //release all cuda memories
    cudaFree(A.d_elements);
    cudaFree(B.d_elements);
    cudaFree(C.d_elements);
    return 0;
}

void init_feature(feature& A, int channel, int width, int height, float init_value){
    A.channel = channel;
    A.width = width;
    A.height = height;
    size_t size = channel * width * height;
    A.h_elements = new float [size];
    if (init_value != 0)
        for (int i = 0; i < size; i++)
            A.h_elements[i] = init_value;
    A.size = size*sizeof(float);
}

void init_kernel(kernel& A, int number, int channel, int width, int height, float init_value){
    A.number = number;
    A.channel = channel;
    A.width = width;
    A.height = height;
    size_t size = number * channel * width * height;
    A.h_elements = new float [size];
    if (init_value != 0)
        for (int i = 0; i < size; i++)
            A.h_elements[i] = init_value;
    A.size = size*sizeof(float);
}

void init_feature(feature& A, int channel, int width, int height, string filename){
    A.channel = channel;
    A.width = width;
    A.height = height;
    size_t size = channel * width * height;
    A.h_elements = new float [size];

    // if (init_value != 0)
    //     for (int i = 0; i < size; i++)
    //         A.h_elements[i] = init_value;

    A.size = size*sizeof(float);
}

void init_kernel(kernel& A, int number, int channel, int width, int height, string filename){
    A.number = number;
    A.channel = channel;
    A.width = width;
    A.height = height;
    size_t size = number * channel * width * height;
    A.h_elements = new float [size];

    // if (init_value != 0)
    //     for (int i = 0; i < size; i++)
    //         A.h_elements[i] = init_value;

    A.size = size*sizeof(float);
}

void fprint(feature data){
    cout << "feature type \n[ " << data.channel << ", " << data.width << ", " << data.height << " ]" << endl;
    for (int i = 0; i < data.channel; i++){
        for (int j = 0; j < data.width; j++){
            for (int k = 0; k < data.height; k++){
                cout << setw(3) << data.h_elements[i * data.width*data.height + j * data.height + k];
            }
            cout << endl;
        }
        cout << endl;
    }
}
    
void kprint(kernel data){
    cout << "kernel type \n[ " << data.number << ", " << data.channel << ", " << data.width << ", " << data.height << " ]" << endl;
    for (int i = 0; i < data.number; i++){
        for (int j = 0; j < data.channel; j++){
            for (int k = 0; k < data.width; k++){
                for (int l = 0; l < data.height; l++){
                    cout << setw(3) << data.h_elements[i * data.channel*data.width*data.height + j * data.width*data.height + k * data.height + l];
                }
                cout << endl;
            }
            cout << endl;
        }
        cout << endl;
    }
}

void make_pad(feature& A, int pad){
    //invoke kernel padding
    float* temp;
    cudaMalloc(&temp, A.size);
    cudaMemcpy(temp, A.d_elements, A.size, cudaMemcpyDeviceToDevice);
    dim3 dimGrid(A.channel, A.width, A.height);
    A.height += 2*pad; A.width += 2*pad;
    A.size = A.channel * A.width * A.height * sizeof(float);
    cudaFree(A.d_elements);
    cudaMalloc(&A.d_elements, A.size);
    cudaMemset(A.d_elements, 0, A.size);
    paddingKernel<<<dimGrid, 1>>> (temp, A, pad);
    cudaFree(temp);
}

void ReLU(feature& A){
    //invoke kernel relu
    dim3 dimGrid(A.channel, A.width, A.height);
    ReLUKernel<<<dimGrid, 1>>>(A);
}

void convolution(feature& A, kernel B, int stride){
    feature temp;
    init_feature(temp, B.number, A.width - B.width + 1, A.height - B.height + 1, 0);
    cudaMalloc(&temp.d_elements, temp.size);

    dim3 dimGrid(temp.channel, temp.width, temp.height);
    Conv2dKernel<<<dimGrid, A.channel, A.channel>>>(A, B, temp);
    
    cudaFree(A.d_elements);
    cudaMalloc(&A.d_elements, temp.size);
    cudaMemcpy(A.d_elements, temp.d_elements, temp.size, cudaMemcpyDeviceToDevice);
    delete temp.h_elements;
    cudaFree(temp.d_elements);

    A.channel = temp.channel;
    A.width = temp.width;
    A.height = temp.height;
}

void addBias(feature& A, kernel B){
    dim3 dimGrid(A.channel, A.width, A.height);
    AddBiasKernel<<<dimGrid, 1>>>(A, B);
}

void maxPooling(feature& A, int filter){
    feature temp;
    init_feature(temp, A.channel, A.width / filter, A.height / filter);
    cudaMalloc(&temp.d_elements, temp.size);

    dim3 dimGrid(temp.channel, temp.width, temp.height);
    MaxpoolingKernel<<<dimGrid, 1>>>(A, temp, filter);

    cudaFree(A.d_elements);
    cudaMalloc(&A.d_elements, temp.size);
    cudaMemcpy(A.d_elements, temp.d_elements, temp.size, cudaMemcpyDeviceToDevice);
    delete temp.h_elements;
    cudaFree(temp.d_elements);

    A.channel = temp.channel;
    A.width = temp.width;
    A.height = temp.height;
}

void view(feature& A){
    A.channel = A.channel*A.width*A.height;
    A.width = 1;
    A.height = 1;
}

	.file	"tmpxft_001fe47d_00000000-6_VGG_CUDA.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3930:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3930:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4612:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4612:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.type	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0:
.LFB4613:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4613:
	.size	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	.globl	_Z12init_featureR7featureiiif
	.type	_Z12init_featureR7featureiiif, @function
_Z12init_featureR7featureiiif:
.LFB3916:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movl	%esi, (%rdi)
	imull	%edx, %esi
	movl	%edx, 4(%rdi)
	movl	%ecx, 8(%rdi)
	imull	%ecx, %esi
	movss	%xmm0, 12(%rsp)
	movslq	%esi, %rbx
	cmpq	%rbx, %rax
	jb	.L5
	leaq	0(,%rbx,4), %r12
	movq	%rdi, %rbp
	movq	%r12, %rdi
	call	_Znam@PLT
	movss	12(%rsp), %xmm0
	xorps	%xmm1, %xmm1
	movq	%rax, 24(%rbp)
	ucomiss	%xmm1, %xmm0
	jp	.L10
	jne	.L10
.L9:
	movq	%r12, 16(%rbp)
	addq	$16, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
.L5:
	.cfi_restore_state
	call	__cxa_throw_bad_array_new_length@PLT
.L10:
	xorl	%edx, %edx
.L6:
	cmpq	%rbx, %rdx
	jnb	.L9
	movss	%xmm0, (%rax,%rdx,4)
	incq	%rdx
	jmp	.L6
	.cfi_endproc
.LFE3916:
	.size	_Z12init_featureR7featureiiif, .-_Z12init_featureR7featureiiif
	.globl	_Z11init_kernelR6kerneliiiif
	.type	_Z11init_kernelR6kerneliiiif, @function
_Z11init_kernelR6kerneliiiif:
.LFB3917:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movl	%esi, (%rdi)
	imull	%edx, %esi
	movl	%edx, 4(%rdi)
	movl	%ecx, 8(%rdi)
	movl	%esi, %ebx
	movl	%r8d, 12(%rdi)
	imull	%ecx, %ebx
	movss	%xmm0, 12(%rsp)
	imull	%r8d, %ebx
	movslq	%ebx, %rbx
	cmpq	%rbx, %rax
	jb	.L15
	leaq	0(,%rbx,4), %r12
	movq	%rdi, %rbp
	movq	%r12, %rdi
	call	_Znam@PLT
	movss	12(%rsp), %xmm0
	xorps	%xmm1, %xmm1
	movq	%rax, 24(%rbp)
	ucomiss	%xmm1, %xmm0
	jp	.L20
	jne	.L20
.L19:
	movq	%r12, 16(%rbp)
	addq	$16, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
.L15:
	.cfi_restore_state
	call	__cxa_throw_bad_array_new_length@PLT
.L20:
	xorl	%edx, %edx
.L16:
	cmpq	%rbx, %rdx
	jnb	.L19
	movss	%xmm0, (%rax,%rdx,4)
	incq	%rdx
	jmp	.L16
	.cfi_endproc
.LFE3917:
	.size	_Z11init_kernelR6kerneliiiif, .-_Z11init_kernelR6kerneliiiif
	.globl	_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, @function
_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
.LFB3918:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%r8
	.cfi_def_cfa_offset 32
	movl	%esi, (%rdi)
	imull	%edx, %esi
	movl	%edx, 4(%rdi)
	movl	%ecx, 8(%rdi)
	imull	%ecx, %esi
	movslq	%esi, %rbx
	cmpq	%rbx, %rax
	jb	.L24
	salq	$2, %rbx
	movq	%rdi, %rbp
	movq	%rbx, %rdi
	call	_Znam@PLT
	movq	%rbx, 16(%rbp)
	movq	%rax, 24(%rbp)
	popq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L24:
	.cfi_restore_state
	call	__cxa_throw_bad_array_new_length@PLT
	.cfi_endproc
.LFE3918:
	.size	_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .-_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.globl	_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, @function
_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
.LFB3919:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%r9
	.cfi_def_cfa_offset 32
	movl	%esi, (%rdi)
	imull	%edx, %esi
	movl	%edx, 4(%rdi)
	movl	%ecx, 8(%rdi)
	movl	%esi, %ebx
	movl	%r8d, 12(%rdi)
	imull	%ecx, %ebx
	imull	%r8d, %ebx
	movslq	%ebx, %rbx
	cmpq	%rbx, %rax
	jb	.L28
	salq	$2, %rbx
	movq	%rdi, %rbp
	movq	%rbx, %rdi
	call	_Znam@PLT
	movq	%rbx, 16(%rbp)
	movq	%rax, 24(%rbp)
	popq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L28:
	.cfi_restore_state
	call	__cxa_throw_bad_array_new_length@PLT
	.cfi_endproc
.LFE3919:
	.size	_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .-_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"feature type \n[ "
.LC2:
	.string	", "
.LC3:
	.string	" ]"
	.text
	.globl	_Z6fprint7feature
	.type	_Z6fprint7feature, @function
_Z6fprint7feature:
.LFB3920:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC1(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC2(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	_ZSt4cout(%rip), %rbx
	movq	%rbx, %rdi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	96(%rsp), %eax
	movl	104(%rsp), %ebp
	movl	%eax, 12(%rsp)
	movl	100(%rsp), %eax
	movl	%eax, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	12(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	8(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r12, %rsi
	xorl	%r12d, %r12d
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	8(%rsp), %eax
	imull	%ebp, %eax
	movl	%eax, 24(%rsp)
.L32:
	cmpl	%r12d, 12(%rsp)
	jle	.L39
	movl	%r13d, %r14d
	xorl	%r15d, %r15d
.L36:
	cmpl	%r15d, 8(%rsp)
	jle	.L34
	movslq	%r14d, %rdx
	xorl	%ecx, %ecx
	salq	$2, %rdx
.L35:
	cmpl	%ecx, %ebp
	jle	.L40
	movq	(%rbx), %rax
	movq	%rbx, %rdi
	movl	%ecx, 28(%rsp)
	movq	%rdx, 16(%rsp)
	movq	-24(%rax), %rax
	movq	$3, 16(%rbx,%rax)
	movq	120(%rsp), %rax
	cvtss2sd	(%rax,%rdx), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	28(%rsp), %ecx
	movq	16(%rsp), %rdx
	incl	%ecx
	addq	$4, %rdx
	jmp	.L35
.L40:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	incl	%r15d
	addl	%ebp, %r14d
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L36
.L34:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	incl	%r12d
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	24(%rsp), %eax
	addl	%eax, %r13d
	jmp	.L32
.L39:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3920:
	.size	_Z6fprint7feature, .-_Z6fprint7feature
	.section	.rodata.str1.1
.LC4:
	.string	"kernel type \n[ "
	.text
	.globl	_Z6kprint6kernel
	.type	_Z6kprint6kernel, @function
_Z6kprint6kernel:
.LFB3921:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC4(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	.LC2(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	_ZSt4cout(%rip), %rbx
	movq	%rbx, %rdi
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	112(%rsp), %eax
	movl	120(%rsp), %r12d
	movl	124(%rsp), %ebp
	movl	%eax, 12(%rsp)
	movl	116(%rsp), %eax
	movl	%eax, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	12(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	8(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r13, %rsi
	xorl	%r13d, %r13d
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	8(%rsp), %eax
	imull	%r12d, %eax
	imull	%ebp, %eax
	movl	%eax, 40(%rsp)
	movl	%r12d, %eax
	imull	%ebp, %eax
	movl	%eax, 28(%rsp)
	xorl	%eax, %eax
	movl	%eax, 24(%rsp)
.L42:
	cmpl	%r13d, 12(%rsp)
	jle	.L51
	movl	24(%rsp), %eax
	xorl	%r14d, %r14d
	movl	%eax, 20(%rsp)
.L47:
	cmpl	%r14d, 8(%rsp)
	jle	.L52
	movl	20(%rsp), %eax
	xorl	%r15d, %r15d
	movl	%eax, 16(%rsp)
.L46:
	cmpl	%r15d, %r12d
	jle	.L44
	movslq	16(%rsp), %rdx
	xorl	%ecx, %ecx
	salq	$2, %rdx
.L45:
	cmpl	%ecx, %ebp
	jle	.L53
	movq	(%rbx), %rax
	movq	%rbx, %rdi
	movl	%ecx, 44(%rsp)
	movq	%rdx, 32(%rsp)
	movq	-24(%rax), %rax
	movq	$3, 16(%rbx,%rax)
	movq	136(%rsp), %rax
	cvtss2sd	(%rax,%rdx), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	44(%rsp), %ecx
	movq	32(%rsp), %rdx
	incl	%ecx
	addq	$4, %rdx
	jmp	.L45
.L53:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	incl	%r15d
	call	_ZNSolsEPFRSoS_E.isra.0
	addl	%ebp, 16(%rsp)
	jmp	.L46
.L44:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	incl	%r14d
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	28(%rsp), %ecx
	addl	%ecx, 20(%rsp)
	jmp	.L47
.L52:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	incl	%r13d
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	40(%rsp), %edx
	addl	%edx, 24(%rsp)
	jmp	.L42
.L51:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3921:
	.size	_Z6kprint6kernel, .-_Z6kprint6kernel
	.globl	_Z4viewR7feature
	.type	_Z4viewR7feature, @function
_Z4viewR7feature:
.LFB3927:
	.cfi_startproc
	endbr64
	movl	(%rdi), %eax
	imull	4(%rdi), %eax
	imull	8(%rdi), %eax
	movl	%eax, (%rdi)
	movabsq	$4294967297, %rax
	movq	%rax, 4(%rdi)
	ret
	.cfi_endproc
.LFE3927:
	.size	_Z4viewR7feature, .-_Z4viewR7feature
	.globl	_Z47__device_stub__Z12Conv2dKernel7feature6kernelS_R7featureR6kernelS0_
	.type	_Z47__device_stub__Z12Conv2dKernel7feature6kernelS_R7featureR6kernelS0_, @function
_Z47__device_stub__Z12Conv2dKernel7feature6kernelS_R7featureR6kernelS0_:
.LFB3952:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12Conv2dKernel7feature6kernelS_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L55:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L57
	call	__stack_chk_fail@PLT
.L57:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3952:
	.size	_Z47__device_stub__Z12Conv2dKernel7feature6kernelS_R7featureR6kernelS0_, .-_Z47__device_stub__Z12Conv2dKernel7feature6kernelS_R7featureR6kernelS0_
	.globl	_Z12Conv2dKernel7feature6kernelS_
	.type	_Z12Conv2dKernel7feature6kernelS_, @function
_Z12Conv2dKernel7feature6kernelS_:
.LFB3953:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	96(%rsp), %rdx
	leaq	56(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z47__device_stub__Z12Conv2dKernel7feature6kernelS_R7featureR6kernelS0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3953:
	.size	_Z12Conv2dKernel7feature6kernelS_, .-_Z12Conv2dKernel7feature6kernelS_
	.globl	_Z11convolutionR7feature6kerneli
	.type	_Z11convolutionR7feature6kerneli, @function
_Z11convolutionR7feature6kerneli:
.LFB3924:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorps	%xmm0, %xmm0
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	subq	$200, %rsp
	.cfi_def_cfa_offset 224
	movl	8(%rdi), %ecx
	movl	4(%rdi), %edx
	subl	236(%rsp), %ecx
	subl	232(%rsp), %edx
	leaq	24(%rsp), %rbp
	movl	224(%rsp), %esi
	incl	%ecx
	incl	%edx
	movq	%rbp, %rdi
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	call	_Z12init_featureR7featureiiif
	movq	40(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movslq	(%rbx), %r8
	movl	32(%rsp), %esi
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	24(%rsp), %rdi
	movq	%rax, 16(%rsp)
	movl	20(%rsp), %ecx
	movl	%r8d, 12(%rsp)
	movq	12(%rsp), %rdx
	movq	%rdi, (%rsp)
	movl	%esi, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	leaq	64(%rsp), %rdi
	movl	$10, %ecx
	movq	%rbx, %rsi
	rep movsl
	leaq	144(%rsp), %rdx
	leaq	104(%rsp), %rdi
	movl	$10, %ecx
	leaq	224(%rsp), %rsi
	rep movsl
	leaq	144(%rsp), %rdi
	movl	$10, %ecx
	movq	%rbp, %rsi
	rep movsl
	leaq	104(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	_Z47__device_stub__Z12Conv2dKernel7feature6kernelS_R7featureR6kernelS0_
.L62:
	movq	32(%rbx), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rsi
	leaq	32(%rbx), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	32(%rbx), %rdi
	movq	40(%rsp), %rdx
	movl	$3, %ecx
	movq	56(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L63
	movl	$4, %esi
	call	_ZdlPvm@PLT
.L63:
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rax
	movq	%rax, (%rbx)
	movl	32(%rsp), %eax
	movl	%eax, 8(%rbx)
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	addq	$200, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3924:
	.size	_Z11convolutionR7feature6kerneli, .-_Z11convolutionR7feature6kerneli
	.globl	_Z46__device_stub__Z13AddBiasKernel7feature6kernelR7featureR6kernel
	.type	_Z46__device_stub__Z13AddBiasKernel7feature6kernelR7featureR6kernel, @function
_Z46__device_stub__Z13AddBiasKernel7feature6kernelR7featureR6kernel:
.LFB3954:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rcx
	movq	%rdi, 72(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 80(%rsp)
	leaq	8(%rsp), %rdx
	leaq	36(%rsp), %rsi
	leaq	24(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	pushq	16(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z13AddBiasKernel7feature6kernel(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 128
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	88(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L69:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3954:
	.size	_Z46__device_stub__Z13AddBiasKernel7feature6kernelR7featureR6kernel, .-_Z46__device_stub__Z13AddBiasKernel7feature6kernelR7featureR6kernel
	.globl	_Z13AddBiasKernel7feature6kernel
	.type	_Z13AddBiasKernel7feature6kernel, @function
_Z13AddBiasKernel7feature6kernel:
.LFB3955:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	56(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z46__device_stub__Z13AddBiasKernel7feature6kernelR7featureR6kernel
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3955:
	.size	_Z13AddBiasKernel7feature6kernel, .-_Z13AddBiasKernel7feature6kernel
	.globl	_Z7addBiasR7feature6kernel
	.type	_Z7addBiasR7feature6kernel, @function
_Z7addBiasR7feature6kernel:
.LFB3925:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	subq	$112, %rsp
	.cfi_def_cfa_offset 128
	movl	8(%rdi), %esi
	movq	(%rdi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	leaq	24(%rsp), %rdi
	movl	$10, %ecx
	movq	%rbx, %rsi
	rep movsl
	leaq	64(%rsp), %rdi
	movl	$10, %ecx
	leaq	128(%rsp), %rsi
	rep movsl
	leaq	64(%rsp), %rsi
	leaq	24(%rsp), %rdi
	call	_Z46__device_stub__Z13AddBiasKernel7feature6kernelR7featureR6kernel
.L75:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L77
	call	__stack_chk_fail@PLT
.L77:
	addq	$112, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3925:
	.size	_Z7addBiasR7feature6kernel, .-_Z7addBiasR7feature6kernel
	.globl	_Z42__device_stub__Z13paddingKernelPf7featureiPfR7featurei
	.type	_Z42__device_stub__Z13paddingKernelPf7featureiPfR7featurei, @function
_Z42__device_stub__Z13paddingKernelPf7featureiPfR7featurei:
.LFB3956:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%edx, 4(%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rsi, 88(%rsp)
	leaq	44(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L79
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13paddingKernelPf7featurei(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L79:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L81
	call	__stack_chk_fail@PLT
.L81:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3956:
	.size	_Z42__device_stub__Z13paddingKernelPf7featureiPfR7featurei, .-_Z42__device_stub__Z13paddingKernelPf7featureiPfR7featurei
	.globl	_Z13paddingKernelPf7featurei
	.type	_Z13paddingKernelPf7featurei, @function
_Z13paddingKernelPf7featurei:
.LFB3957:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%esi, %edx
	leaq	16(%rsp), %rsi
	call	_Z42__device_stub__Z13paddingKernelPf7featureiPfR7featurei
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3957:
	.size	_Z13paddingKernelPf7featurei, .-_Z13paddingKernelPf7featurei
	.globl	_Z8make_padR7featurei
	.type	_Z8make_padR7featurei, @function
_Z8make_padR7featurei:
.LFB3922:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	movq	16(%rdi), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	32(%rbx), %rsi
	movq	16(%rbx), %rdx
	movl	$3, %ecx
	movq	(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rbx), %rax
	movl	8(%rbx), %edx
	movq	32(%rbx), %rdi
	movq	%rax, 8(%rsp)
	leal	(%rbp,%rbp), %eax
	movl	%edx, 16(%rsp)
	addl	%eax, %edx
	addl	4(%rbx), %eax
	movl	%eax, 4(%rbx)
	imull	(%rbx), %eax
	movl	%edx, 8(%rbx)
	imull	%edx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, 16(%rbx)
	call	cudaFree@PLT
	movq	16(%rbx), %rsi
	leaq	32(%rbx), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	16(%rbx), %rdx
	movq	32(%rbx), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	8(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	16(%rsp), %esi
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	leaq	32(%rsp), %rdi
	movl	$10, %ecx
	movq	%rbx, %rsi
	movl	%ebp, %edx
	rep movsl
	movq	(%rsp), %rdi
	leaq	32(%rsp), %rsi
	call	_Z42__device_stub__Z13paddingKernelPf7featureiPfR7featurei
.L86:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L87
	call	__stack_chk_fail@PLT
.L87:
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3922:
	.size	_Z8make_padR7featurei, .-_Z8make_padR7featurei
	.globl	_Z36__device_stub__Z10ReLUKernel7featureR7feature
	.type	_Z36__device_stub__Z10ReLUKernel7featureR7feature, @function
_Z36__device_stub__Z10ReLUKernel7featureR7feature:
.LFB3958:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movq	%rsp, %rdx
	movabsq	$4294967297, %rax
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L89
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z10ReLUKernel7feature(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L89:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L91
	call	__stack_chk_fail@PLT
.L91:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3958:
	.size	_Z36__device_stub__Z10ReLUKernel7featureR7feature, .-_Z36__device_stub__Z10ReLUKernel7featureR7feature
	.globl	_Z10ReLUKernel7feature
	.type	_Z10ReLUKernel7feature, @function
_Z10ReLUKernel7feature:
.LFB3959:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	16(%rsp), %rdi
	call	_Z36__device_stub__Z10ReLUKernel7featureR7feature
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3959:
	.size	_Z10ReLUKernel7feature, .-_Z10ReLUKernel7feature
	.globl	_Z4ReLUR7feature
	.type	_Z4ReLUR7feature, @function
_Z4ReLUR7feature:
.LFB3923:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	subq	$80, %rsp
	.cfi_def_cfa_offset 96
	movl	8(%rdi), %esi
	movq	(%rdi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L95
	leaq	32(%rsp), %rdi
	movl	$10, %ecx
	movq	%rbx, %rsi
	rep movsl
	leaq	32(%rsp), %rdi
	call	_Z36__device_stub__Z10ReLUKernel7featureR7feature
.L95:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L97
	call	__stack_chk_fail@PLT
.L97:
	addq	$80, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3923:
	.size	_Z4ReLUR7feature, .-_Z4ReLUR7feature
	.globl	_Z45__device_stub__Z16MaxpoolingKernel7featureS_iR7featureS0_i
	.type	_Z45__device_stub__Z16MaxpoolingKernel7featureS_iR7featureS0_i, @function
_Z45__device_stub__Z16MaxpoolingKernel7featureS_iR7featureS0_i:
.LFB3960:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edx, 12(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdi, 80(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rsi, 88(%rsp)
	leaq	44(%rsp), %rsi
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L99
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16MaxpoolingKernel7featureS_i(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L99:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L101
	call	__stack_chk_fail@PLT
.L101:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3960:
	.size	_Z45__device_stub__Z16MaxpoolingKernel7featureS_iR7featureS0_i, .-_Z45__device_stub__Z16MaxpoolingKernel7featureS_iR7featureS0_i
	.globl	_Z16MaxpoolingKernel7featureS_i
	.type	_Z16MaxpoolingKernel7featureS_i, @function
_Z16MaxpoolingKernel7featureS_i:
.LFB3961:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%edi, %edx
	leaq	56(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z45__device_stub__Z16MaxpoolingKernel7featureS_iR7featureS0_i
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3961:
	.size	_Z16MaxpoolingKernel7featureS_i, .-_Z16MaxpoolingKernel7featureS_i
	.globl	_Z10maxPoolingR7featurei
	.type	_Z10maxPoolingR7featurei, @function
_Z10maxPoolingR7featurei:
.LFB3926:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorps	%xmm0, %xmm0
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	subq	$160, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	movl	8(%rdi), %eax
	leaq	32(%rsp), %r12
	cltd
	idivl	%esi
	movl	%eax, %ecx
	movl	4(%rdi), %eax
	cltd
	idivl	%esi
	movl	(%rdi), %esi
	movq	%r12, %rdi
	movl	%eax, %edx
	call	_Z12init_featureR7featureiiif
	movq	48(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	$1, 28(%rsp)
	movl	%esi, 16(%rsp)
	movq	%rdi, 8(%rsp)
	movq	%rdx, 20(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L106
	leaq	72(%rsp), %rdi
	movl	$10, %ecx
	movq	%rbx, %rsi
	movl	%ebp, %edx
	rep movsl
	leaq	112(%rsp), %rdi
	movl	$10, %ecx
	movq	%r12, %rsi
	rep movsl
	leaq	112(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	_Z45__device_stub__Z16MaxpoolingKernel7featureS_iR7featureS0_i
.L106:
	movq	32(%rbx), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rsi
	leaq	32(%rbx), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	32(%rbx), %rdi
	movq	48(%rsp), %rdx
	movl	$3, %ecx
	movq	64(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L107
	movl	$4, %esi
	call	_ZdlPvm@PLT
.L107:
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rax
	movq	%rax, (%rbx)
	movl	40(%rsp), %eax
	movl	%eax, 8(%rbx)
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	addq	$160, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3926:
	.size	_Z10maxPoolingR7featurei, .-_Z10maxPoolingR7featurei
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3915:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$8, %ecx
	movl	$8, %edx
	movl	$3, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	addq	$-128, %rsp
	.cfi_def_cfa_offset 160
	movss	.LC5(%rip), %xmm0
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	call	_Z12init_featureR7featureiiif
	movq	16(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	16(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	subq	$48, %rsp
	.cfi_def_cfa_offset 208
	movl	$10, %ecx
	movq	%rbx, %rsi
	movq	%rsp, %rdi
	rep movsl
	call	_Z6fprint7feature
	movq	%rbx, %rsp
	.cfi_def_cfa_offset 160
	movl	$3, %r8d
	movss	.LC5(%rip), %xmm0
	leaq	40(%rsp), %r12
	movl	$3, %ecx
	movl	$3, %edx
	movl	$3, %esi
	movq	%r12, %rdi
	call	_Z11init_kernelR6kerneliiiif
	movq	56(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	56(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	subq	$48, %rsp
	.cfi_def_cfa_offset 208
	movl	$10, %ecx
	movq	%r12, %rsi
	movq	%rsp, %rdi
	rep movsl
	call	_Z6kprint6kernel
	movq	%rbx, %rsp
	.cfi_def_cfa_offset 160
	movl	$1, %r8d
	movss	.LC5(%rip), %xmm0
	leaq	80(%rsp), %rbp
	movl	$1, %ecx
	movl	$1, %edx
	movl	$3, %esi
	movq	%rbp, %rdi
	call	_Z11init_kernelR6kerneliiiif
	movq	96(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	96(%rsp), %rdx
	movq	104(%rsp), %rsi
	movl	$1, %ecx
	movq	112(%rsp), %rdi
	call	cudaMemcpy@PLT
	subq	$48, %rsp
	.cfi_def_cfa_offset 208
	movl	$10, %ecx
	movq	%rbp, %rsi
	movq	%rsp, %rdi
	rep movsl
	call	_Z6kprint6kernel
	movq	%rbx, %rsp
	.cfi_def_cfa_offset 160
	movl	$1, %esi
	movq	%rbx, %rdi
	call	_Z8make_padR7featurei
	subq	$48, %rsp
	.cfi_def_cfa_offset 208
	movl	$10, %ecx
	movq	%r12, %rsi
	movq	%rsp, %rdi
	rep movsl
	movl	$1, %esi
	movq	%rbx, %rdi
	call	_Z11convolutionR7feature6kerneli
	movq	%rsp, %rdi
	movl	$10, %ecx
	movq	%rbp, %rsi
	rep movsl
	movq	%rbx, %rdi
	call	_Z7addBiasR7feature6kernel
	movq	%rbx, %rsp
	.cfi_def_cfa_offset 160
	movq	%rbx, %rdi
	call	_Z4ReLUR7feature
	movq	%rbx, %rdi
	movl	$2, %esi
	call	_Z10maxPoolingR7featurei
	movq	%rbx, %rdi
	call	_Z4viewR7feature
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L114
	movl	$4, %esi
	call	_ZdlPvm@PLT
.L114:
	movabsq	$2305843009213693950, %rdx
	movl	(%rsp), %edi
	imull	4(%rsp), %edi
	imull	8(%rsp), %edi
	movslq	%edi, %rdi
	leaq	0(,%rdi,4), %rax
	movq	%rax, 16(%rsp)
	cmpq	%rax, %rdx
	jb	.L115
	salq	$4, %rdi
	call	_Znam@PLT
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	cudaMemcpy@PLT
	subq	$48, %rsp
	.cfi_def_cfa_offset 208
	movl	$10, %ecx
	movq	%rbx, %rsi
	movq	%rsp, %rdi
	rep movsl
	call	_Z6fprint7feature
	movq	80(%rsp), %rdi
	addq	$48, %rsp
	.cfi_def_cfa_offset 160
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L117
	jmp	.L121
.L115:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L121
	call	__cxa_throw_bad_array_new_length@PLT
.L121:
	call	__stack_chk_fail@PLT
.L117:
	subq	$-128, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3915:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z16MaxpoolingKernel7featureS_i"
.LC7:
	.string	"_Z10ReLUKernel7feature"
.LC8:
	.string	"_Z13paddingKernelPf7featurei"
.LC9:
	.string	"_Z13AddBiasKernel7feature6kernel"
.LC10:
	.string	"_Z12Conv2dKernel7feature6kernelS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3963:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16MaxpoolingKernel7featureS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10ReLUKernel7feature(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13paddingKernelPf7featurei(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13AddBiasKernel7feature6kernel(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12Conv2dKernel7feature6kernelS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3963:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <iomanip>
using namespace std;

struct feature {
    int channel;
    int width;
    int height;
    size_t size;
    float* h_elements;
    float* d_elements;
};

struct kernel {
    int number;
    int channel;
    int width;
    int height;
    size_t size;
    float* h_elements;
    float* d_elements;
};

__global__ void Conv2dKernel(feature A, kernel B, feature C){
    float Cvalue = 0;

    int c = threadIdx.x;
    
    int n = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;

    extern __shared__ float channels[];

    channels[c] = 0;
    for (int i = 0; i < B.width; i++){
        for (int j = 0; j < B.height; j++){
            int idxA = c * A.height * A.width + (w + i) * A.height + h + j;
            int idxB = n * B.channel * B.width * B.height + c * B.width * B.height + i * B.width + j;
            channels[c] += A.d_elements[idxA] * B.d_elements[idxB];
        }
    }
    __syncthreads();

    for (int i = 0; i < B.channel; i++)
        Cvalue += channels[i];

    __syncthreads();

    C.d_elements[n * gridDim.y * gridDim.z + w * gridDim.z + h] = Cvalue;

}

__global__ void AddBiasKernel(feature A, kernel B){
    int c = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;
    
    int idxA = c * A.width*A.height + w * A.height + h;

    A.d_elements[idxA] += B.d_elements[c];
}

__global__ void paddingKernel(float* A, feature B, int padding){
    // A is original array, B is padded array
    int c = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;
    
    int idxA = c * gridDim.y*gridDim.z + w * gridDim.z + h;
    int idxB = c * B.width*B.height + (w + padding) * B.height + (h + padding);
    B.d_elements[idxB] = A[idxA];
}

__global__ void ReLUKernel(feature A){
    int c = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;
    
    int idxA = c * A.width*A.height + w * A.height + h;

    if (A.d_elements[idxA] < 0)
        A.d_elements[idxA] = 0;
}

__global__ void MaxpoolingKernel(feature A, feature B, int filter){
    // A is input B is output
    int c = blockIdx.x;
    int w = blockIdx.y;
    int h = blockIdx.z;

    float max_value = A.d_elements[c * A.width*A.height + w*filter * A.height + h*filter];

    for (int i = 0; i < filter; i++){
        for (int j = 0; j < filter; j++){
            int idxA = c * A.height * A.width + (w*filter + i) * A.height + h*filter + j;
            if (max_value < A.d_elements[idxA])
                max_value = A.d_elements[idxA];
        }
    }

    int idxB = c * gridDim.y * gridDim.z + w * gridDim.z + h;
    B.d_elements[idxB] = max_value;


}

void init_feature(feature& A, int channel, int width, int height, float init_value = 0);
void init_kernel(kernel& A, int number, int channel, int width, int height, float init_value = 0);
void init_feature(feature& A, int channel, int width, int height, string filename);
void init_kernel(kernel& A, int number, int channel, int width, int height, string filename);

void fprint(feature data);
void kprint(kernel data);

void make_pad(feature& A, int pad);
void ReLU(feature& A);
void convolution(feature& A, kernel B, int stride);
void addBias(feature& A, kernel B);
void maxPooling(feature& A, int filter);
void view(feature& A);

int main()
{
    //feature A initialization
    feature A;
    init_feature(A, 3, 8, 8, 1);
    hipMalloc(&A.d_elements, A.size);
    hipMemcpy(A.d_elements, A.h_elements, A.size, hipMemcpyHostToDevice);
    fprint(A);

    //kernel B initialization
    kernel B;
    init_kernel(B, 3, 3, 3, 3, 1);
    hipMalloc(&B.d_elements, B.size);
    hipMemcpy(B.d_elements, B.h_elements, B.size, hipMemcpyHostToDevice);
    kprint(B);

    //kernel C initialization
    kernel C;
    init_kernel(C, 3, 1, 1, 1, 1);
    hipMalloc(&C.d_elements, C.size);
    hipMemcpy(C.d_elements, C.h_elements, C.size, hipMemcpyHostToDevice);
    kprint(C);

    //calculation
    make_pad(A, 1);
    convolution(A, B, 1);
    addBias(A,C);
    ReLU(A);
    maxPooling(A, 2);
    view(A);



    //receive data from device
    delete A.h_elements;
    A.size = A.channel * A.width * A.height * sizeof(float);    
    A.h_elements = new float [A.size];
    hipMemcpy(A.h_elements, A.d_elements, A.size, hipMemcpyDeviceToHost);
    
    //print data
    fprint(A);
    
    //release all cuda memories
    hipFree(A.d_elements);
    hipFree(B.d_elements);
    hipFree(C.d_elements);
    return 0;
}

void init_feature(feature& A, int channel, int width, int height, float init_value){
    A.channel = channel;
    A.width = width;
    A.height = height;
    size_t size = channel * width * height;
    A.h_elements = new float [size];
    if (init_value != 0)
        for (int i = 0; i < size; i++)
            A.h_elements[i] = init_value;
    A.size = size*sizeof(float);
}

void init_kernel(kernel& A, int number, int channel, int width, int height, float init_value){
    A.number = number;
    A.channel = channel;
    A.width = width;
    A.height = height;
    size_t size = number * channel * width * height;
    A.h_elements = new float [size];
    if (init_value != 0)
        for (int i = 0; i < size; i++)
            A.h_elements[i] = init_value;
    A.size = size*sizeof(float);
}

void init_feature(feature& A, int channel, int width, int height, string filename){
    A.channel = channel;
    A.width = width;
    A.height = height;
    size_t size = channel * width * height;
    A.h_elements = new float [size];

    // if (init_value != 0)
    //     for (int i = 0; i < size; i++)
    //         A.h_elements[i] = init_value;

    A.size = size*sizeof(float);
}

void init_kernel(kernel& A, int number, int channel, int width, int height, string filename){
    A.number = number;
    A.channel = channel;
    A.width = width;
    A.height = height;
    size_t size = number * channel * width * height;
    A.h_elements = new float [size];

    // if (init_value != 0)
    //     for (int i = 0; i < size; i++)
    //         A.h_elements[i] = init_value;

    A.size = size*sizeof(float);
}

void fprint(feature data){
    cout << "feature type \n[ " << data.channel << ", " << data.width << ", " << data.height << " ]" << endl;
    for (int i = 0; i < data.channel; i++){
        for (int j = 0; j < data.width; j++){
            for (int k = 0; k < data.height; k++){
                cout << setw(3) << data.h_elements[i * data.width*data.height + j * data.height + k];
            }
            cout << endl;
        }
        cout << endl;
    }
}
    
void kprint(kernel data){
    cout << "kernel type \n[ " << data.number << ", " << data.channel << ", " << data.width << ", " << data.height << " ]" << endl;
    for (int i = 0; i < data.number; i++){
        for (int j = 0; j < data.channel; j++){
            for (int k = 0; k < data.width; k++){
                for (int l = 0; l < data.height; l++){
                    cout << setw(3) << data.h_elements[i * data.channel*data.width*data.height + j * data.width*data.height + k * data.height + l];
                }
                cout << endl;
            }
            cout << endl;
        }
        cout << endl;
    }
}

void make_pad(feature& A, int pad){
    //invoke kernel padding
    float* temp;
    hipMalloc(&temp, A.size);
    hipMemcpy(temp, A.d_elements, A.size, hipMemcpyDeviceToDevice);
    dim3 dimGrid(A.channel, A.width, A.height);
    A.height += 2*pad; A.width += 2*pad;
    A.size = A.channel * A.width * A.height * sizeof(float);
    hipFree(A.d_elements);
    hipMalloc(&A.d_elements, A.size);
    hipMemset(A.d_elements, 0, A.size);
    paddingKernel<<<dimGrid, 1>>> (temp, A, pad);
    hipFree(temp);
}

void ReLU(feature& A){
    //invoke kernel relu
    dim3 dimGrid(A.channel, A.width, A.height);
    ReLUKernel<<<dimGrid, 1>>>(A);
}

void convolution(feature& A, kernel B, int stride){
    feature temp;
    init_feature(temp, B.number, A.width - B.width + 1, A.height - B.height + 1, 0);
    hipMalloc(&temp.d_elements, temp.size);

    dim3 dimGrid(temp.channel, temp.width, temp.height);
    Conv2dKernel<<<dimGrid, A.channel, A.channel>>>(A, B, temp);
    
    hipFree(A.d_elements);
    hipMalloc(&A.d_elements, temp.size);
    hipMemcpy(A.d_elements, temp.d_elements, temp.size, hipMemcpyDeviceToDevice);
    delete temp.h_elements;
    hipFree(temp.d_elements);

    A.channel = temp.channel;
    A.width = temp.width;
    A.height = temp.height;
}

void addBias(feature& A, kernel B){
    dim3 dimGrid(A.channel, A.width, A.height);
    AddBiasKernel<<<dimGrid, 1>>>(A, B);
}

void maxPooling(feature& A, int filter){
    feature temp;
    init_feature(temp, A.channel, A.width / filter, A.height / filter);
    hipMalloc(&temp.d_elements, temp.size);

    dim3 dimGrid(temp.channel, temp.width, temp.height);
    MaxpoolingKernel<<<dimGrid, 1>>>(A, temp, filter);

    hipFree(A.d_elements);
    hipMalloc(&A.d_elements, temp.size);
    hipMemcpy(A.d_elements, temp.d_elements, temp.size, hipMemcpyDeviceToDevice);
    delete temp.h_elements;
    hipFree(temp.d_elements);

    A.channel = temp.channel;
    A.width = temp.width;
    A.height = temp.height;
}

void view(feature& A){
    A.channel = A.channel*A.width*A.height;
    A.width = 1;
    A.height = 1;
}

	.text
	.file	"VGG_CUDA.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__Conv2dKernel7feature6kernelS_ # -- Begin function _Z27__device_stub__Conv2dKernel7feature6kernelS_
	.type	_Z27__device_stub__Conv2dKernel7feature6kernelS_,@function
_Z27__device_stub__Conv2dKernel7feature6kernelS_: # @_Z27__device_stub__Conv2dKernel7feature6kernelS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	168(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12Conv2dKernel7feature6kernelS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__Conv2dKernel7feature6kernelS_, .Lfunc_end0-_Z27__device_stub__Conv2dKernel7feature6kernelS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__AddBiasKernel7feature6kernel # -- Begin function _Z28__device_stub__AddBiasKernel7feature6kernel
	.type	_Z28__device_stub__AddBiasKernel7feature6kernel,@function
_Z28__device_stub__AddBiasKernel7feature6kernel: # @_Z28__device_stub__AddBiasKernel7feature6kernel
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	112(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	152(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13AddBiasKernel7feature6kernel, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__AddBiasKernel7feature6kernel, .Lfunc_end1-_Z28__device_stub__AddBiasKernel7feature6kernel
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__paddingKernelPf7featurei # -- Begin function _Z28__device_stub__paddingKernelPf7featurei
	.type	_Z28__device_stub__paddingKernelPf7featurei,@function
_Z28__device_stub__paddingKernelPf7featurei: # @_Z28__device_stub__paddingKernelPf7featurei
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	144(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	%rcx, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13paddingKernelPf7featurei, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__paddingKernelPf7featurei, .Lfunc_end2-_Z28__device_stub__paddingKernelPf7featurei
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__ReLUKernel7feature # -- Begin function _Z25__device_stub__ReLUKernel7feature
	.type	_Z25__device_stub__ReLUKernel7feature,@function
_Z25__device_stub__ReLUKernel7feature:  # @_Z25__device_stub__ReLUKernel7feature
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	112(%rsp), %rax
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10ReLUKernel7feature, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__ReLUKernel7feature, .Lfunc_end3-_Z25__device_stub__ReLUKernel7feature
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__MaxpoolingKernel7featureS_i # -- Begin function _Z31__device_stub__MaxpoolingKernel7featureS_i
	.type	_Z31__device_stub__MaxpoolingKernel7featureS_i,@function
_Z31__device_stub__MaxpoolingKernel7featureS_i: # @_Z31__device_stub__MaxpoolingKernel7featureS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	144(%rsp), %rcx
	leaq	64(%rsp), %rbx
	movq	%rcx, (%rbx)
	leaq	184(%rsp), %rcx
	movq	%rcx, 8(%rbx)
	movq	%rax, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16MaxpoolingKernel7featureS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z31__device_stub__MaxpoolingKernel7featureS_i, .Lfunc_end4-_Z31__device_stub__MaxpoolingKernel7featureS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	3                               # 0x3
	.long	3                               # 0x3
	.long	3                               # 0x3
	.long	3                               # 0x3
.LCPI5_1:
	.long	3                               # 0x3
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	1                               # 0x1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$160, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movabsq	$34359738371, %rax              # imm = 0x800000003
	movq	%rax, 40(%rsp)
	movl	$8, 48(%rsp)
	movl	$768, %edi                      # imm = 0x300
	callq	_Znam
	movq	%rax, 64(%rsp)
	xorl	%ecx, %ecx
.LBB5_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rax,%rcx,4)      # imm = 0x3F800000
	incq	%rcx
	cmpq	$192, %rcx
	jne	.LBB5_1
# %bb.2:                                # %_Z12init_featureR7featureiiif.exit
	leaq	72(%rsp), %rbx
	movq	$768, -16(%rbx)                 # imm = 0x300
	movl	$768, %esi                      # imm = 0x300
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	-16(%rbx), %rdx
	movq	-8(%rbx), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rax
	movq	%rax, 32(%rsp)
	movups	-32(%rbx), %xmm0
	movups	-16(%rbx), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	callq	_Z6fprint7feature
	movaps	.LCPI5_0(%rip), %xmm0           # xmm0 = [3,3,3,3]
	movups	%xmm0, 80(%rsp)
	movl	$324, %edi                      # imm = 0x144
	callq	_Znam
	movq	%rax, 104(%rsp)
	xorl	%ecx, %ecx
.LBB5_3:                                # %.lr.ph.i1
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rax,%rcx,4)      # imm = 0x3F800000
	incq	%rcx
	cmpq	$81, %rcx
	jne	.LBB5_3
# %bb.4:                                # %_Z11init_kernelR6kerneliiiif.exit
	leaq	112(%rsp), %rbx
	movq	$324, -16(%rbx)                 # imm = 0x144
	movl	$324, %esi                      # imm = 0x144
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	-16(%rbx), %rdx
	movq	-8(%rbx), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rax
	movq	%rax, 32(%rsp)
	movups	-32(%rbx), %xmm0
	movups	-16(%rbx), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	callq	_Z6kprint6kernel
	movaps	.LCPI5_1(%rip), %xmm0           # xmm0 = [3,1,1,1]
	movups	%xmm0, 120(%rsp)
	movl	$12, %edi
	callq	_Znam
	movq	%rax, 144(%rsp)
	xorl	%ecx, %ecx
.LBB5_5:                                # %.lr.ph.i5
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rax,%rcx,4)      # imm = 0x3F800000
	incq	%rcx
	cmpq	$3, %rcx
	jne	.LBB5_5
# %bb.6:                                # %_Z11init_kernelR6kerneliiiif.exit9
	leaq	152(%rsp), %rbx
	movq	$12, -16(%rbx)
	movl	$12, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	-16(%rbx), %rdx
	movq	-8(%rbx), %rsi
	movl	$1, %ebp
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rax
	movq	%rax, 32(%rsp)
	movups	-32(%rbx), %xmm0
	movups	-16(%rbx), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	callq	_Z6kprint6kernel
	leaq	40(%rsp), %r14
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_Z8make_padR7featurei
	movq	112(%rsp), %rax
	movq	%rax, 32(%rsp)
	movups	80(%rsp), %xmm0
	movups	96(%rsp), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movq	%r14, %rdi
	callq	_Z11convolutionR7feature6kerneli
	movq	(%rbx), %rax
	movq	%rax, 32(%rsp)
	movups	-32(%rbx), %xmm0
	movups	-16(%rbx), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movq	%r14, %rdi
	callq	_Z7addBiasR7feature6kernel
	movq	%r14, %rdi
	callq	_Z4ReLUR7feature
	movq	%r14, %rdi
	movl	$2, %esi
	callq	_Z10maxPoolingR7featurei
	movl	4(%r14), %eax
	imull	(%r14), %eax
	imull	8(%r14), %eax
	movl	%eax, (%r14)
	movabsq	$4294967297, %rcx               # imm = 0x100000001
	movq	%rcx, 4(%r14)
	movq	24(%r14), %rdi
	movl	$1, %ecx
	testq	%rdi, %rdi
	je	.LBB5_8
# %bb.7:
	callq	_ZdlPv
	movl	40(%rsp), %eax
	movl	44(%rsp), %ecx
	movl	48(%rsp), %ebp
.LBB5_8:
	imull	%eax, %ebp
	imull	%ecx, %ebp
	movslq	%ebp, %rax
	leaq	(,%rax,4), %rbx
	movq	%rbx, 56(%rsp)
	movq	%rax, %rcx
	shrq	$62, %rcx
	shlq	$4, %rax
	xorl	%edi, %edi
	negq	%rcx
	sbbq	%rdi, %rdi
	orq	%rax, %rdi
	callq	_Znam
	movq	%rax, 64(%rsp)
	movq	72(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rax
	movq	%rax, 32(%rsp)
	movups	40(%rsp), %xmm0
	movups	56(%rsp), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	callq	_Z6fprint7feature
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rdi
	callq	hipFree
	movq	152(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$160, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z12init_featureR7featureiiif   # -- Begin function _Z12init_featureR7featureiiif
	.type	_Z12init_featureR7featureiiif,@function
_Z12init_featureR7featureiiif:          # @_Z12init_featureR7featureiiif
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movl	%esi, (%rdi)
	movl	%edx, 4(%rdi)
	movl	%ecx, 8(%rdi)
	imull	%esi, %ebp
	imull	%ecx, %ebp
	movslq	%ebp, %rax
	leaq	(,%rax,4), %r14
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r14, %rdi
	callq	_Znam
	movq	%rax, 24(%rbx)
	xorps	%xmm0, %xmm0
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jne	.LBB6_1
	jnp	.LBB6_4
.LBB6_1:
	testl	%ebp, %ebp
	je	.LBB6_4
# %bb.2:                                # %.lr.ph.preheader
	movaps	%xmm1, %xmm0
	movl	%ebp, %ecx
	xorl	%edx, %edx
.LBB6_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm0, (%rax,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rcx
	jne	.LBB6_3
.LBB6_4:                                # %.loopexit
	movq	%r14, 16(%rbx)
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z12init_featureR7featureiiif, .Lfunc_end6-_Z12init_featureR7featureiiif
	.cfi_endproc
                                        # -- End function
	.globl	_Z6fprint7feature               # -- Begin function _Z6fprint7feature
	.type	_Z6fprint7feature,@function
_Z6fprint7feature:                      # @_Z6fprint7feature
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	96(%rsp), %ebx
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	100(%rsp), %r14d
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	104(%rsp), %r15d
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.2, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB7_9
# %bb.1:                                # %.preheader11.lr.ph
	leaq	96(%rsp), %rax
	movq	24(%rax), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%r14d, %eax
	imull	%r15d, %eax
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	xorl	%eax, %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	xorl	%ecx, %ecx
.LBB7_2:                                # %.preheader11
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
                                        #       Child Loop BB7_6 Depth 3
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	testl	%r14d, %r14d
	jle	.LBB7_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB7_2 Depth=1
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	%eax, %r13d
	xorl	%ebx, %ebx
.LBB7_4:                                # %.preheader
                                        #   Parent Loop BB7_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB7_6 Depth 3
	testl	%r15d, %r15d
	jle	.LBB7_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB7_4 Depth=2
	movslq	%r13d, %rax
	movq	32(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	xorl	%r12d, %r12d
.LBB7_6:                                #   Parent Loop BB7_2 Depth=1
                                        #     Parent Loop BB7_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movq	$3, _ZSt4cout+16(%rax)
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB7_6
.LBB7_7:                                # %._crit_edge
                                        #   in Loop: Header=BB7_4 Depth=2
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbx
	addl	%r15d, %r13d
	cmpq	%r14, %rbx
	jne	.LBB7_4
.LBB7_8:                                # %._crit_edge14
                                        #   in Loop: Header=BB7_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	24(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	(%rsp), %rax                    # 8-byte Reload
	addl	12(%rsp), %eax                  # 4-byte Folded Reload
	movq	%rax, (%rsp)                    # 8-byte Spill
	cmpq	16(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB7_2
.LBB7_9:                                # %._crit_edge16
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z6fprint7feature, .Lfunc_end7-_Z6fprint7feature
	.cfi_endproc
                                        # -- End function
	.globl	_Z11init_kernelR6kerneliiiif    # -- Begin function _Z11init_kernelR6kerneliiiif
	.type	_Z11init_kernelR6kerneliiiif,@function
_Z11init_kernelR6kerneliiiif:           # @_Z11init_kernelR6kerneliiiif
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	%ecx, %ebp
	movq	%rdi, %rbx
	movl	%esi, (%rdi)
	movl	%edx, 4(%rdi)
	movl	%ecx, 8(%rdi)
	movl	%r8d, 12(%rdi)
	imull	%esi, %edx
	imull	%r8d, %ebp
	imull	%edx, %ebp
	movslq	%ebp, %rax
	leaq	(,%rax,4), %r14
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r14, %rdi
	callq	_Znam
	movq	%rax, 24(%rbx)
	xorps	%xmm0, %xmm0
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jne	.LBB8_1
	jnp	.LBB8_4
.LBB8_1:
	testl	%ebp, %ebp
	je	.LBB8_4
# %bb.2:                                # %.lr.ph.preheader
	movaps	%xmm1, %xmm0
	movl	%ebp, %ecx
	xorl	%edx, %edx
.LBB8_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm0, (%rax,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rcx
	jne	.LBB8_3
.LBB8_4:                                # %.loopexit
	movq	%r14, 16(%rbx)
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z11init_kernelR6kerneliiiif, .Lfunc_end8-_Z11init_kernelR6kerneliiiif
	.cfi_endproc
                                        # -- End function
	.globl	_Z6kprint6kernel                # -- Begin function _Z6kprint6kernel
	.type	_Z6kprint6kernel,@function
_Z6kprint6kernel:                       # @_Z6kprint6kernel
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$15, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	112(%rsp), %ebx
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	116(%rsp), %esi
	movq	%r14, %rdi
	movl	%esi, 8(%rsp)                   # 4-byte Spill
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	120(%rsp), %r14d
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	124(%rsp), %r15d
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.2, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	%ebx, 32(%rsp)                  # 4-byte Spill
	testl	%ebx, %ebx
	jle	.LBB9_12
# %bb.1:                                # %.preheader16.lr.ph
	leaq	112(%rsp), %rax
	movq	24(%rax), %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	%r14d, %eax
	imull	%r15d, %eax
	movl	%eax, 40(%rsp)                  # 4-byte Spill
	imull	8(%rsp), %eax                   # 4-byte Folded Reload
	movl	%eax, 28(%rsp)                  # 4-byte Spill
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ecx, %ecx
.LBB9_2:                                # %.preheader16
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_4 Depth 2
                                        #       Child Loop BB9_6 Depth 3
                                        #         Child Loop BB9_8 Depth 4
	movl	%ecx, 36(%rsp)                  # 4-byte Spill
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB9_11
# %bb.3:                                # %.preheader15.lr.ph
                                        #   in Loop: Header=BB9_2 Depth=1
	xorl	%ecx, %ecx
	movq	16(%rsp), %rax                  # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	movl	%eax, 12(%rsp)                  # 4-byte Spill
.LBB9_4:                                # %.preheader15
                                        #   Parent Loop BB9_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB9_6 Depth 3
                                        #         Child Loop BB9_8 Depth 4
	movl	%ecx, 44(%rsp)                  # 4-byte Spill
	testl	%r14d, %r14d
	jle	.LBB9_10
# %bb.5:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB9_4 Depth=2
	movl	12(%rsp), %ebx                  # 4-byte Reload
	xorl	%r13d, %r13d
.LBB9_6:                                # %.preheader
                                        #   Parent Loop BB9_2 Depth=1
                                        #     Parent Loop BB9_4 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB9_8 Depth 4
	testl	%r15d, %r15d
	jle	.LBB9_9
# %bb.7:                                # %.lr.ph
                                        #   in Loop: Header=BB9_6 Depth=3
	movslq	%ebx, %rax
	movq	48(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	xorl	%r12d, %r12d
.LBB9_8:                                #   Parent Loop BB9_2 Depth=1
                                        #     Parent Loop BB9_4 Depth=2
                                        #       Parent Loop BB9_6 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movq	$3, _ZSt4cout+16(%rax)
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB9_8
.LBB9_9:                                # %._crit_edge
                                        #   in Loop: Header=BB9_6 Depth=3
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r13
	addl	%r15d, %ebx
	cmpq	%r14, %r13
	jne	.LBB9_6
.LBB9_10:                               # %._crit_edge19
                                        #   in Loop: Header=BB9_4 Depth=2
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	44(%rsp), %ecx                  # 4-byte Reload
	incl	%ecx
	movl	12(%rsp), %eax                  # 4-byte Reload
	addl	40(%rsp), %eax                  # 4-byte Folded Reload
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	cmpl	8(%rsp), %ecx                   # 4-byte Folded Reload
	jne	.LBB9_4
.LBB9_11:                               # %._crit_edge21
                                        #   in Loop: Header=BB9_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	36(%rsp), %ecx                  # 4-byte Reload
	incl	%ecx
	movq	16(%rsp), %rax                  # 8-byte Reload
	addl	28(%rsp), %eax                  # 4-byte Folded Reload
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	cmpl	32(%rsp), %ecx                  # 4-byte Folded Reload
	jne	.LBB9_2
.LBB9_12:                               # %._crit_edge23
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z6kprint6kernel, .Lfunc_end9-_Z6kprint6kernel
	.cfi_endproc
                                        # -- End function
	.globl	_Z8make_padR7featurei           # -- Begin function _Z8make_padR7featurei
	.type	_Z8make_padR7featurei,@function
_Z8make_padR7featurei:                  # @_Z8make_padR7featurei
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	movq	16(%rdi), %rsi
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	leaq	32(%r14), %r12
	movq	16(%r14), %rdx
	movq	32(%r14), %rsi
	movl	$3, %ecx
	callq	hipMemcpy
	movl	(%r14), %eax
	movl	4(%r14), %r13d
	movl	8(%r14), %r15d
	leal	(%r13,%rbx,2), %ecx
	shlq	$32, %r13
	orq	%rax, %r13
	leal	(%r15,%rbx,2), %edx
	movl	%edx, 8(%r14)
	movl	%ecx, 4(%r14)
	imull	%ecx, %eax
	imull	%edx, %eax
	cltq
	shlq	$2, %rax
	movq	%rax, 16(%r14)
	movq	32(%r14), %rdi
	callq	hipFree
	movq	16(%r14), %rsi
	movq	%r12, %rdi
	callq	hipMalloc
	movq	16(%r14), %rdx
	movq	32(%r14), %rdi
	xorl	%esi, %esi
	callq	hipMemset
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movq	%r13, %rdi
	movl	%r15d, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	32(%r14), %rax
	movq	%rax, 32(%rsp)
	movups	(%r14), %xmm0
	movups	16(%r14), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	%ebx, %esi
	callq	_Z28__device_stub__paddingKernelPf7featurei
.LBB10_2:
	movq	40(%rsp), %rdi
	callq	hipFree
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z8make_padR7featurei, .Lfunc_end10-_Z8make_padR7featurei
	.cfi_endproc
                                        # -- End function
	.globl	_Z11convolutionR7feature6kerneli # -- Begin function _Z11convolutionR7feature6kerneli
	.type	_Z11convolutionR7feature6kerneli,@function
_Z11convolutionR7feature6kerneli:       # @_Z11convolutionR7feature6kerneli
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$264, %rsp                      # imm = 0x108
	.cfi_def_cfa_offset 320
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	320(%rsp), %eax
	movl	4(%rdi), %ecx
	movl	8(%rdi), %edx
	subl	328(%rsp), %ecx
	incl	%ecx
	subl	332(%rsp), %edx
	incl	%edx
	leaq	40(%rsp), %r14
	movl	%eax, -32(%r14)
	movl	%ecx, -28(%r14)
	movl	%edx, -24(%r14)
	imull	%eax, %ecx
	imull	%edx, %ecx
	movslq	%ecx, %rax
	leaq	(,%rax,4), %r15
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r15, %rdi
	callq	_Znam
	movq	%rax, -8(%r14)
	movq	%r15, -16(%r14)
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	-32(%r14), %rdi
	movl	-24(%r14), %esi
	movl	(%rbx), %edx
	movslq	%edx, %r8
	btsq	$32, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_2
# %bb.1:
	leaq	320(%rsp), %rax
	movq	32(%rbx), %rcx
	leaq	128(%rsp), %rdx
	movq	%rcx, 32(%rdx)
	movups	(%rbx), %xmm0
	movups	16(%rbx), %xmm1
	movaps	%xmm1, 16(%rdx)
	movaps	%xmm0, (%rdx)
	movq	32(%rax), %rcx
	leaq	176(%rsp), %rsi
	movq	%rcx, 32(%rsi)
	movups	(%rax), %xmm0
	movups	16(%rax), %xmm1
	movaps	%xmm1, 16(%rsi)
	movaps	%xmm0, (%rsi)
	movq	40(%rsp), %rax
	leaq	224(%rsp), %rcx
	movq	%rax, 32(%rcx)
	movups	8(%rsp), %xmm0
	movups	24(%rsp), %xmm1
	movaps	%xmm1, 16(%rcx)
	movaps	%xmm0, (%rcx)
	leaq	96(%rsp), %r14
	movq	%rdx, (%r14)
	movq	%rsi, 8(%r14)
	movq	%rcx, 16(%r14)
	leaq	80(%rsp), %r15
	leaq	64(%rsp), %r12
	leaq	56(%rsp), %r13
	leaq	48(%rsp), %rbp
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r15), %rsi
	movl	8(%r15), %edx
	movq	(%r12), %rcx
	movl	8(%r12), %r8d
	movl	$_Z12Conv2dKernel7feature6kernelS_, %edi
	movq	%r14, %r9
	pushq	(%rbp)
	.cfi_adjust_cfa_offset 8
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB11_2:
	leaq	32(%rbx), %r14
	movq	32(%rbx), %rdi
	callq	hipFree
	movq	24(%rsp), %rsi
	movq	%r14, %rdi
	callq	hipMalloc
	movq	32(%rbx), %rdi
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$3, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB11_4
# %bb.3:
	callq	_ZdlPv
.LBB11_4:
	movq	40(%rsp), %rdi
	callq	hipFree
	movl	8(%rsp), %eax
	movl	%eax, (%rbx)
	movl	12(%rsp), %eax
	movl	%eax, 4(%rbx)
	movl	16(%rsp), %eax
	movl	%eax, 8(%rbx)
	addq	$264, %rsp                      # imm = 0x108
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z11convolutionR7feature6kerneli, .Lfunc_end11-_Z11convolutionR7feature6kerneli
	.cfi_endproc
                                        # -- End function
	.globl	_Z7addBiasR7feature6kernel      # -- Begin function _Z7addBiasR7feature6kernel
	.type	_Z7addBiasR7feature6kernel,@function
_Z7addBiasR7feature6kernel:             # @_Z7addBiasR7feature6kernel
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	movl	8(%rbx), %esi
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_2
# %bb.1:
	leaq	208(%rsp), %rax
	movq	32(%rbx), %rcx
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rdx)
	movups	(%rbx), %xmm0
	movups	16(%rbx), %xmm1
	movaps	%xmm1, 16(%rdx)
	movaps	%xmm0, (%rdx)
	movq	32(%rax), %rcx
	leaq	112(%rsp), %rsi
	movq	%rcx, 32(%rsi)
	movups	(%rax), %xmm0
	movups	16(%rax), %xmm1
	movaps	%xmm1, 16(%rsi)
	movaps	%xmm0, (%rsi)
	leaq	48(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rsi, 8(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13AddBiasKernel7feature6kernel, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB12_2:
	addq	$160, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z7addBiasR7feature6kernel, .Lfunc_end12-_Z7addBiasR7feature6kernel
	.cfi_endproc
                                        # -- End function
	.globl	_Z4ReLUR7feature                # -- Begin function _Z4ReLUR7feature
	.type	_Z4ReLUR7feature,@function
_Z4ReLUR7feature:                       # @_Z4ReLUR7feature
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	movl	8(%rbx), %esi
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_2
# %bb.1:
	movq	32(%rbx), %rax
	movq	%rax, 32(%rsp)
	movups	(%rbx), %xmm0
	movups	16(%rbx), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	callq	_Z25__device_stub__ReLUKernel7feature
.LBB13_2:
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z4ReLUR7feature, .Lfunc_end13-_Z4ReLUR7feature
	.cfi_endproc
                                        # -- End function
	.globl	_Z10maxPoolingR7featurei        # -- Begin function _Z10maxPoolingR7featurei
	.type	_Z10maxPoolingR7featurei,@function
_Z10maxPoolingR7featurei:               # @_Z10maxPoolingR7featurei
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movl	(%rdi), %esi
	movl	4(%rdi), %eax
	cltd
	idivl	%ebp
	movl	%eax, %ecx
	movl	8(%rdi), %eax
	cltd
	idivl	%ebp
	leaq	32(%rsp), %r14
	movl	%esi, -32(%r14)
	movl	%ecx, -28(%r14)
	movl	%eax, -24(%r14)
	imull	%esi, %ecx
	imull	%eax, %ecx
	movslq	%ecx, %rax
	leaq	(,%rax,4), %r15
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r15, %rdi
	callq	_Znam
	movq	%rax, -8(%r14)
	movq	%r15, -16(%r14)
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	-32(%r14), %rdi
	movl	-24(%r14), %esi
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB14_2
# %bb.1:
	movq	32(%rbx), %rax
	leaq	128(%rsp), %rcx
	movq	%rax, 32(%rcx)
	movups	(%rbx), %xmm0
	movups	16(%rbx), %xmm1
	movaps	%xmm1, 16(%rcx)
	movaps	%xmm0, (%rcx)
	movq	32(%rsp), %rax
	leaq	176(%rsp), %rdx
	movq	%rax, 32(%rdx)
	movups	(%rsp), %xmm0
	movups	16(%rsp), %xmm1
	movaps	%xmm1, 16(%rdx)
	movaps	%xmm0, (%rdx)
	leaq	44(%rsp), %rax
	movl	%ebp, (%rax)
	leaq	96(%rsp), %r14
	movq	%rcx, (%r14)
	movq	%rdx, 8(%r14)
	movq	%rax, 16(%r14)
	leaq	80(%rsp), %r15
	leaq	64(%rsp), %r12
	leaq	56(%rsp), %r13
	leaq	48(%rsp), %rbp
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r15), %rsi
	movl	8(%r15), %edx
	movq	(%r12), %rcx
	movl	8(%r12), %r8d
	movl	$_Z16MaxpoolingKernel7featureS_i, %edi
	movq	%r14, %r9
	pushq	(%rbp)
	.cfi_adjust_cfa_offset 8
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB14_2:
	leaq	32(%rbx), %r14
	movq	32(%rbx), %rdi
	callq	hipFree
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	callq	hipMalloc
	movq	32(%rbx), %rdi
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$3, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB14_4
# %bb.3:
	callq	_ZdlPv
.LBB14_4:
	movq	32(%rsp), %rdi
	callq	hipFree
	movl	(%rsp), %eax
	movl	%eax, (%rbx)
	movl	4(%rsp), %eax
	movl	%eax, 4(%rbx)
	movl	8(%rsp), %eax
	movl	%eax, 8(%rbx)
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z10maxPoolingR7featurei, .Lfunc_end14-_Z10maxPoolingR7featurei
	.cfi_endproc
                                        # -- End function
	.globl	_Z4viewR7feature                # -- Begin function _Z4viewR7feature
	.type	_Z4viewR7feature,@function
_Z4viewR7feature:                       # @_Z4viewR7feature
	.cfi_startproc
# %bb.0:
	movl	4(%rdi), %eax
	imull	(%rdi), %eax
	imull	8(%rdi), %eax
	movl	%eax, (%rdi)
	movabsq	$4294967297, %rax               # imm = 0x100000001
	movq	%rax, 4(%rdi)
	retq
.Lfunc_end15:
	.size	_Z4viewR7feature, .Lfunc_end15-_Z4viewR7feature
	.cfi_endproc
                                        # -- End function
	.globl	_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE # -- Begin function _Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@function
_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: # @_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movl	%esi, (%rdi)
	movl	%edx, 4(%rdi)
	movl	%ecx, 8(%rdi)
	imull	%esi, %edx
	imull	%ecx, %edx
	movslq	%edx, %rax
	leaq	(,%rax,4), %r14
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r14, %rdi
	callq	_Znam
	movq	%rax, 24(%rbx)
	movq	%r14, 16(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end16-_Z12init_featureR7featureiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_endproc
                                        # -- End function
	.globl	_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE # -- Begin function _Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@function
_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: # @_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movl	%esi, (%rdi)
	movl	%edx, 4(%rdi)
	movl	%ecx, 8(%rdi)
	movl	%r8d, 12(%rdi)
	imull	%esi, %edx
	imull	%r8d, %ecx
	imull	%edx, %ecx
	movslq	%ecx, %rax
	leaq	(,%rax,4), %r14
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r14, %rdi
	callq	_Znam
	movq	%rax, 24(%rbx)
	movq	%r14, 16(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end17-_Z11init_kernelR6kerneliiiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB18_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB18_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12Conv2dKernel7feature6kernelS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13AddBiasKernel7feature6kernel, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13paddingKernelPf7featurei, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10ReLUKernel7feature, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16MaxpoolingKernel7featureS_i, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end18:
	.size	__hip_module_ctor, .Lfunc_end18-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB19_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB19_2:
	retq
.Lfunc_end19:
	.size	__hip_module_dtor, .Lfunc_end19-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12Conv2dKernel7feature6kernelS_,@object # @_Z12Conv2dKernel7feature6kernelS_
	.section	.rodata,"a",@progbits
	.globl	_Z12Conv2dKernel7feature6kernelS_
	.p2align	3, 0x0
_Z12Conv2dKernel7feature6kernelS_:
	.quad	_Z27__device_stub__Conv2dKernel7feature6kernelS_
	.size	_Z12Conv2dKernel7feature6kernelS_, 8

	.type	_Z13AddBiasKernel7feature6kernel,@object # @_Z13AddBiasKernel7feature6kernel
	.globl	_Z13AddBiasKernel7feature6kernel
	.p2align	3, 0x0
_Z13AddBiasKernel7feature6kernel:
	.quad	_Z28__device_stub__AddBiasKernel7feature6kernel
	.size	_Z13AddBiasKernel7feature6kernel, 8

	.type	_Z13paddingKernelPf7featurei,@object # @_Z13paddingKernelPf7featurei
	.globl	_Z13paddingKernelPf7featurei
	.p2align	3, 0x0
_Z13paddingKernelPf7featurei:
	.quad	_Z28__device_stub__paddingKernelPf7featurei
	.size	_Z13paddingKernelPf7featurei, 8

	.type	_Z10ReLUKernel7feature,@object  # @_Z10ReLUKernel7feature
	.globl	_Z10ReLUKernel7feature
	.p2align	3, 0x0
_Z10ReLUKernel7feature:
	.quad	_Z25__device_stub__ReLUKernel7feature
	.size	_Z10ReLUKernel7feature, 8

	.type	_Z16MaxpoolingKernel7featureS_i,@object # @_Z16MaxpoolingKernel7featureS_i
	.globl	_Z16MaxpoolingKernel7featureS_i
	.p2align	3, 0x0
_Z16MaxpoolingKernel7featureS_i:
	.quad	_Z31__device_stub__MaxpoolingKernel7featureS_i
	.size	_Z16MaxpoolingKernel7featureS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"feature type \n[ "
	.size	.L.str, 17

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	", "
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" ]"
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"kernel type \n[ "
	.size	.L.str.3, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12Conv2dKernel7feature6kernelS_"
	.size	.L__unnamed_1, 34

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13AddBiasKernel7feature6kernel"
	.size	.L__unnamed_2, 33

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z13paddingKernelPf7featurei"
	.size	.L__unnamed_3, 29

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z10ReLUKernel7feature"
	.size	.L__unnamed_4, 23

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z16MaxpoolingKernel7featureS_i"
	.size	.L__unnamed_5, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__Conv2dKernel7feature6kernelS_
	.addrsig_sym _Z28__device_stub__AddBiasKernel7feature6kernel
	.addrsig_sym _Z28__device_stub__paddingKernelPf7featurei
	.addrsig_sym _Z25__device_stub__ReLUKernel7feature
	.addrsig_sym _Z31__device_stub__MaxpoolingKernel7featureS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12Conv2dKernel7feature6kernelS_
	.addrsig_sym _Z13AddBiasKernel7feature6kernel
	.addrsig_sym _Z13paddingKernelPf7featurei
	.addrsig_sym _Z10ReLUKernel7feature
	.addrsig_sym _Z16MaxpoolingKernel7featureS_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12Conv2dKernel7feature6kernelS_ ; -- Begin function _Z12Conv2dKernel7feature6kernelS_
	.globl	_Z12Conv2dKernel7feature6kernelS_
	.p2align	8
	.type	_Z12Conv2dKernel7feature6kernelS_,@function
_Z12Conv2dKernel7feature6kernelS_:      ; @_Z12Conv2dKernel7feature6kernelS_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x2c
	v_lshl_add_u32 v6, v0, 2, 0
	v_mov_b32_e32 v5, 0
	s_add_u32 s16, s0, 40
	s_addc_u32 s17, s1, 0
	s_mov_b32 s8, s15
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s7, 0
	ds_store_b32 v6, v5
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.preheader.lr.ph
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x4
	s_load_b64 s[10:11], s[0:1], 0x20
	s_load_b64 s[16:17], s[16:17], 0x20
	v_mad_u64_u32 v[1:2], null, s4, s13, v[0:1]
	s_cmp_gt_i32 s6, 0
	v_mov_b32_e32 v8, 0
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[2:3], null, s2, v0, s[14:15]
	s_mul_i32 s2, s6, s5
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v7, s2, v1
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, 0, 1, s2
	v_mad_u64_u32 v[0:1], null, s3, v2, s[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e64 s2, 1, v3
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v3, v7
	s_and_b32 vcc_lo, exec_lo, s2
	s_mov_b32 s9, s6
	s_cbranch_vccnz .LBB0_5
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s9, s9, -1
	s_cmp_eq_u32 s9, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_add_nc_u32_e32 v1, 1, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s16, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v12, vcc_lo
	global_load_b32 v2, v[9:10], off
	global_load_b32 v4, v[11:12], off
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v8, v2, v4 :: v_dual_add_nc_u32 v3, 1, v3
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	ds_store_b32 v6, v8
.LBB0_5:                                ; %Flow82
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v7, s5, v7
	v_add_nc_u32_e32 v0, s3, v0
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, s5
	s_cbranch_scc0 .LBB0_2
.LBB0_6:                                ; %._crit_edge46
	s_load_b64 s[2:3], s[0:1], 0x70
	s_cmp_lt_i32 s4, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_9
; %bb.7:                                ; %.lr.ph50.preheader
	v_mov_b32_e32 v5, 0
	s_mov_b32 s5, 0
.LBB0_8:                                ; %.lr.ph50
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v0, s5
	s_add_i32 s4, s4, -1
	s_add_i32 s5, s5, 4
	s_cmp_eq_u32 s4, 0
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v5, v5, v0
	s_cbranch_scc0 .LBB0_8
.LBB0_9:                                ; %Flow81
	s_barrier
	buffer_gl0_inv
	s_load_b64 s[0:1], s[0:1], 0x7c
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s14
	s_mul_i32 s0, s0, s1
	s_mov_b32 s1, 0
	s_add_i32 s0, s0, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	global_store_b32 v0, v5, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12Conv2dKernel7feature6kernelS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 376
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12Conv2dKernel7feature6kernelS_, .Lfunc_end0-_Z12Conv2dKernel7feature6kernelS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 496
; NumSgprs: 20
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13AddBiasKernel7feature6kernel ; -- Begin function _Z13AddBiasKernel7feature6kernel
	.globl	_Z13AddBiasKernel7feature6kernel
	.p2align	8
	.type	_Z13AddBiasKernel7feature6kernel,@function
_Z13AddBiasKernel7feature6kernel:       ; @_Z13AddBiasKernel7feature6kernel
; %bb.0:
	s_clause 0x2
	s_load_b64 s[4:5], s[0:1], 0x4
	s_load_b64 s[6:7], s[0:1], 0x48
	s_load_b64 s[0:1], s[0:1], 0x20
	s_mov_b32 s2, s13
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s4, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s4, s3, s14
	s_ashr_i32 s3, s13, 31
	s_mul_i32 s4, s4, s5
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_i32 s4, s4, s15
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[4:5], s[4:5], 2
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_load_b32 s2, s[2:3], 0x0
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_f32_e64 v1, s2, s3
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13AddBiasKernel7feature6kernel
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 80
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13AddBiasKernel7feature6kernel, .Lfunc_end1-_Z13AddBiasKernel7feature6kernel
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13paddingKernelPf7featurei ; -- Begin function _Z13paddingKernelPf7featurei
	.globl	_Z13paddingKernelPf7featurei
	.p2align	8
	.type	_Z13paddingKernelPf7featurei,@function
_Z13paddingKernelPf7featurei:           ; @_Z13paddingKernelPf7featurei
; %bb.0:
	s_clause 0x4
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b64 s[4:5], s[0:1], 0xc
	s_load_b32 s8, s[0:1], 0x30
	s_load_b64 s[6:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s13
	s_mul_i32 s4, s4, s13
	s_add_i32 s2, s2, s14
	s_add_i32 s9, s14, s8
	s_mul_i32 s2, s2, s3
	s_add_i32 s3, s9, s4
	s_add_i32 s2, s2, s15
	s_mul_i32 s4, s3, s5
	s_ashr_i32 s3, s2, 31
	s_add_i32 s5, s15, s8
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_i32 s4, s5, s4
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
	s_ashr_i32 s5, s4, 31
	s_load_b32 s6, s[2:3], 0x0
	s_lshl_b64 s[2:3], s[4:5], 2
	v_mov_b32_e32 v0, 0
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v1, s6
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13paddingKernelPf7featurei
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z13paddingKernelPf7featurei, .Lfunc_end2-_Z13paddingKernelPf7featurei
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 160
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10ReLUKernel7feature  ; -- Begin function _Z10ReLUKernel7feature
	.globl	_Z10ReLUKernel7feature
	.p2align	8
	.type	_Z10ReLUKernel7feature,@function
_Z10ReLUKernel7feature:                 ; @_Z10ReLUKernel7feature
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x4
	s_load_b64 s[0:1], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s14
	s_mul_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s15
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_load_b32 s2, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_nlt_f32_e64 s2, s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_2
; %bb.1:
	v_mov_b32_e32 v0, 0
	global_store_b32 v0, v0, s[0:1]
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10ReLUKernel7feature
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z10ReLUKernel7feature, .Lfunc_end3-_Z10ReLUKernel7feature
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 124
; NumSgprs: 18
; NumVgprs: 1
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16MaxpoolingKernel7featureS_i ; -- Begin function _Z16MaxpoolingKernel7featureS_i
	.globl	_Z16MaxpoolingKernel7featureS_i
	.p2align	8
	.type	_Z16MaxpoolingKernel7featureS_i,@function
_Z16MaxpoolingKernel7featureS_i:        ; @_Z16MaxpoolingKernel7featureS_i
; %bb.0:
	s_clause 0x3
	s_load_b64 s[4:5], s[0:1], 0x4
	s_load_b32 s10, s[0:1], 0x50
	s_load_b64 s[6:7], s[0:1], 0x20
	s_load_b64 s[2:3], s[0:1], 0x48
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, s13
	s_mul_i32 s8, s14, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s4, s4, s8
	s_mul_i32 s8, s15, s10
	s_mul_i32 s4, s4, s5
	s_add_i32 s8, s4, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s9, s8, 31
	s_lshl_b64 s[16:17], s[8:9], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s6, s16
	s_addc_u32 s17, s7, s17
	s_cmp_lt_i32 s10, 1
	s_load_b32 s4, s[16:17], 0x0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v0, s4
	s_cbranch_scc1 .LBB4_5
; %bb.1:                                ; %.preheader.preheader
	s_mov_b32 s4, 0
.LBB4_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_3 Depth 2
	s_mov_b32 s9, 0
.LBB4_3:                                ;   Parent Loop BB4_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s16, s8, s9
	s_ashr_i32 s17, s16, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[16:17], s[16:17], 2
	s_add_u32 s16, s6, s16
	s_addc_u32 s17, s7, s17
	s_add_i32 s9, s9, 1
	s_load_b32 s11, s[16:17], 0x0
	s_cmp_eq_u32 s10, s9
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, s11, v0
	v_cndmask_b32_e64 v0, v0, s11, vcc_lo
	s_cbranch_scc0 .LBB4_3
; %bb.4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_add_i32 s4, s4, 1
	s_add_i32 s8, s8, s5
	s_cmp_eq_u32 s4, s10
	s_cbranch_scc0 .LBB4_2
.LBB4_5:                                ; %._crit_edge44
	s_load_b64 s[0:1], s[0:1], 0x5c
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s14
	s_mul_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s15
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16MaxpoolingKernel7featureS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z16MaxpoolingKernel7featureS_i, .Lfunc_end4-_Z16MaxpoolingKernel7featureS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 20
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           40
        .value_kind:     by_value
      - .offset:         40
        .size:           40
        .value_kind:     by_value
      - .offset:         80
        .size:           40
        .value_kind:     by_value
      - .offset:         120
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         124
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         128
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         132
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         134
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         136
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         138
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         140
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         142
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         168
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         184
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         240
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 376
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12Conv2dKernel7feature6kernelS_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z12Conv2dKernel7feature6kernelS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           40
        .value_kind:     by_value
      - .offset:         40
        .size:           40
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 80
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13AddBiasKernel7feature6kernel
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z13AddBiasKernel7feature6kernel.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           40
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13paddingKernelPf7featurei
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z13paddingKernelPf7featurei.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           40
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10ReLUKernel7feature
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10ReLUKernel7feature.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     1
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           40
        .value_kind:     by_value
      - .offset:         40
        .size:           40
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         92
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         100
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         102
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         104
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         106
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         108
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         110
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         152
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 344
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16MaxpoolingKernel7featureS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z16MaxpoolingKernel7featureS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
