#include <cstdio>
#include <cstdlib>
#include <cmath>
#include <vector>
#include <fstream>
#include <iostream>
#include <algorithm>
#include <curand.h>
#include <string>

#define N 9
#define n 3

#define cudaCheckError() {                                          \
	cudaError_t error = cudaGetLastError();	\
	if(error != cudaSuccess) {	\
		printf("CUDA error: %s\n", cudaGetErrorString(error));	\
		exit(-1);	\
	}                                                             \
}

void load(char* filename, int* board) {
	FILE * f = fopen(filename, "r");

	if(f == NULL) {
		printf("Could not open file\n"); return;
	}

	char tmpBuff;

	for(int i=0; i < N; i++) {
		for(int j=0; j < N; j++) {
			if(!fscanf(f, "%c\n", &tmpBuff)) {
				printf("Error reading char\n");
				return;
			}

			if(tmpBuff >= '1' && tmpBuff <= '9') {
				board[i*N + j] = (int) (tmpBuff - '0');
			} else {
				board[i*N + j] = 0;
			}
		}
	}

	fclose(f);

}

void printBoard(int* board) {
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            printf("%d", board[i*N + j]);
        }
        printf("\n");
    }
}

void writeBoard(std::string fn, int* board) {
	std::ofstream f;
	std::string filename = fn + ".sol";

	// printf(filename.c_str());
	
	f.open(filename.c_str());
	
	for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            f << board[i*N + j];
        }
        f << "\n";
    }

	f.close();
}

__global__
void genChildBoards(int* frontierBoards,
					int* childBoards,
					int numFrontierBoards,
					int* boardIdx,
					int* emptySpaces,
					int* emptySpacesCount) {
	
	unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;
	int offset = idx * N*N;

	while(idx < numFrontierBoards) {
		//each thread searches one N*N board for next empty space
		bool found = false;

		for(int i = offset; (found == false) && (i < offset + N*N); i++) {
			if(frontierBoards[i] == 0) {
				found = true;

				//now generate a child board with valid input within the constraints
				int row = (i - offset) / N;
				int col = (i - offset) % N;

				//guess integer between [1-N]				
				for(int guess = 1; guess <= N; guess++){
					bool valid = true;
					//check if guess exists in same row
					for(int c=0; c < N; c++) {
						if(frontierBoards[row*N + c + offset] == guess) {
							valid = false;
						}
					}
					//check if guess exists in same column
					for(int r=0; r < N; r++) {
						if(frontierBoards[r*N + col + offset] == guess) {
							valid = false;
						}
					}
					//check if guess exists in same 3x3 box
					for(int r = n*(row/n); r < n; r++) {
						for(int c = n*(col/n); c < n; c++) {
							if(frontierBoards[r*N + c + offset] == guess) {
								valid = false;
							}
						}
					}

					//persist the new child board
					if(valid == true) {
						int childBoardIdx = atomicAdd(boardIdx, 1); //multiple threads updating this index
						int emptyIdx = 0;

						for(int r=0; r < N; r++) {
							for(int c=0; c < N; c++) {
								childBoards[childBoardIdx*N*N + r*N + c] = frontierBoards[idx*N*N + r*N + c];
								if(frontierBoards[idx*N*N + r*N + c] == 0 && (r != row || c != col)) {
									emptySpaces[emptyIdx + N*N*childBoardIdx] = r*9 + c;
									emptyIdx++;
								}
							}
							emptySpacesCount[childBoardIdx] = emptyIdx; //num empty spaces on board
							childBoards[childBoardIdx*N*N + row*N + col] = guess;
						}
					}
				}
			}
		}

		idx += blockDim.x * gridDim.x;
	}
}

__device__
void resetBitmap(bool* map, int mapsize) {
	for(int i=0; i < mapsize; i++) {
		map[i] = false;
	}
}

//checks if value has been seen earlier
//if it has the board is invalid
__device__
bool seenIt(int val, bool* seen) {
	if (val != 0) {
        if (seen[val-1]) {
            return true;
        }
        seen[val-1] = true;
        return false;
    }
    return false;
}

//check entire board for value
__device__
bool valid(const int* board) {
	bool seen[N];
	resetBitmap(seen, N);

	//check row for repetitions
	for(int i=0; i<N; i++) {
		resetBitmap(seen, N);

		for(int j=0; j<N; j++) {
			int v = board[i*N + j];

			if(seenIt(v, seen)) {
				return false;
			}
		}
	}

	//check col for repetitions
	for(int j=0; j<N; j++) {
		resetBitmap(seen, N);

		for(int i=0; i<N; i++) {
			int v = board[i*N + j];

			if(seenIt(v, seen)) {
				return false;
			}
		}
	}

	//check 3x3 for repetitions
	for(int ridx=0; ridx < n; ridx++) {
		for(int cidx=0; cidx < n; cidx++) {
			resetBitmap(seen, N);

			for(int i=0; i<n; i++) {
				for(int j=0; j<n; j++) {
					int v = board[(ridx*n + i)*N + (cidx*n + j)];

					if(seenIt(v, seen)) {
						return false;
					}
				}
			}
		}
	}

	return true;
}

//chech if change is valud
__device__
bool valid(const int* board, int changedIdx) {
	int r = changedIdx / 9;
	int c = changedIdx % 9;

	bool seen[N];
	resetBitmap(seen, N);

	if(changedIdx < 0) {
		return valid(board);
	}
	if((board[changedIdx] < 1) || (board[changedIdx] > 9)) {
		return false;
	}

    //check for repetitions in row
    for(int i=0; i < N; i++) {
    	int v = board[r*N + i];

    	if(seenIt(v, seen)) {
    		return false;
    	}
    }

    //check for repetitions in col
    resetBitmap(seen, N);
    for(int i=0; i < N; i++) {
    	int v = board[i*N + c];

    	if(seenIt(v, seen)) {
    		return false;
    	}
    }

    //check 3x3 for repetitions
    int ridx = r / n;
    int cidx = c / n;

    resetBitmap(seen, N);
    for (int i=0; i < n; i++) {
    	for (int j=0; j < n; j++) {
    		int v = board[(ridx*n + i)*N + (cidx*n + j)];

    		if(seenIt(v, seen)) {
    			return false;
    		}
    	}
    }

    return true;
}

__global__
void findSolution(int* boards,
				const int numBoards,
				int* emptySpaces,
				int* emptySpacesCount,
				int* found,
				int* solution) {
	int idx = blockDim.x * blockIdx.x + threadIdx.x;

	int* curBoard;
	int* curEmptySpace;
	int curEmptySpaceCount;

	while ((*found == 0) && (idx < numBoards)) {
		int emptyIdx = 0;

		curBoard = boards + idx*N*N;
		curEmptySpace = emptySpaces + idx*N*N;
		curEmptySpaceCount = emptySpacesCount[idx];

		while((emptyIdx >= 0) && (emptyIdx < curEmptySpaceCount)) {
			curBoard[curEmptySpace[emptyIdx]]++;

			if(!valid(curBoard, curEmptySpace[emptyIdx])) {
				//backtrack
				if(curBoard[curEmptySpace[emptyIdx]] >= 9) {
					//reset
					curBoard[curEmptySpace[emptyIdx]] = 0;
					emptyIdx--;
				}
			} else {
				emptyIdx++;
			}
		}

		// # if __CUDA_ARCH__>=200
		// 	printf("emptyIdx = %d \n", emptyIdx);
		// 	printf("curEmptySpaceCount = %d \n", curEmptySpaceCount);
		// #endif  

		if(emptyIdx == curEmptySpaceCount) {
			// # if __CUDA_ARCH__>=200
			// 	printf("found solution \n");
			// #endif  
			*found = 1;

			for(int i=0; i < N*N; i++) {
				solution[i] = curBoard[i];
			}
		}

		idx += gridDim.x * blockDim.x;
	}
}

// magic starts here
int main(int argc, char* argv[]) {
	if (argc < 2){
        printf("Usage: sudokusolver (filename.in)\n");
        exit(-1);
    }

    char* filename = argv[1];
    char* delim = ".";
    std::string fn = strtok(strdup(filename), delim); //used for output
    
    //store board as flattened 9*9 int array
    int* board = new int[N*N];
    load(filename, board);

    int* d_frontierBoards; //start BFS from these boards
    int* d_childBoards; //boards generated from iteration of BFS
    int* d_emptySpaces; //location of empty spaces in the boards
    int* d_emptySpacesCount; //number of empty spaces in each board
    int* d_boardIdx; //index within child boards

    // amount of space to allocate for boards generated from BFS
    const int maxBoardsGen = pow(2,26);

    cudaMalloc(&d_emptySpaces, maxBoardsGen*sizeof(int));
    cudaMalloc(&d_emptySpacesCount, (maxBoardsGen/81 + 1) * sizeof(int));
    cudaMalloc(&d_frontierBoards, maxBoardsGen*sizeof(int));
    cudaMalloc(&d_childBoards, maxBoardsGen*sizeof(int));
    cudaMalloc(&d_boardIdx, sizeof(int));

    cudaMemset(d_boardIdx, 0, sizeof(int));
    cudaMemset(d_frontierBoards, 0, maxBoardsGen*sizeof(int));
    cudaMemset(d_childBoards, 0, maxBoardsGen*sizeof(int));

    //ToDo: optimize block sizes
    int numBlocks = 512;
    int threadsPerBlock = 256; 
    dim3 dimGrid(numBlocks, 1, 1);
    dim3 dimBlock(threadsPerBlock, 1, 1);

    /***
    * Generate BFS of guesses, 
    * each guess generates a child board
    ***/
    //copy given board to frontier
    cudaMemcpy(d_frontierBoards, board, N*N*sizeof(int), cudaMemcpyHostToDevice);
    int totalBoards = 1;
    //call once as set up for the loop
    genChildBoards<<<dimGrid, dimBlock>>>
    	(d_frontierBoards, d_childBoards, totalBoards, d_boardIdx, d_emptySpaces, d_emptySpacesCount);

    int BFSiterations = 18;

    for(int i=0; i < BFSiterations; i++) {
    	cudaMemcpy(&totalBoards, d_boardIdx, sizeof(int), cudaMemcpyDeviceToHost);
    	// printf("total boards after an iteration %d: %d\n", i, totalBoards);
    	cudaMemset(d_boardIdx, 0, sizeof(int));

    	if(i%2 == 0) {
    		genChildBoards<<<dimGrid, dimBlock>>>
    			(d_childBoards, d_frontierBoards, totalBoards, d_boardIdx, d_emptySpaces, d_emptySpacesCount);
    	} else {
    		genChildBoards<<<dimGrid, dimBlock>>>
    			(d_frontierBoards, d_childBoards, totalBoards, d_boardIdx, d_emptySpaces, d_emptySpacesCount);
    	}
    }

    cudaMemcpy(&totalBoards, d_boardIdx, sizeof(int), cudaMemcpyDeviceToHost);
    // printf("total boards: %d\n", totalBoards);

    int* d_found;
    int* d_solution; //solved board

    cudaMalloc(&d_found, sizeof(int));
    cudaMalloc(&d_solution, N*N*sizeof(int));

    cudaMemset(d_found, false, sizeof(int));
    cudaMemcpy(d_solution, board, N*N*sizeof(int), cudaMemcpyHostToDevice);

    if(BFSiterations % 2 == 1) {
    	d_childBoards = d_frontierBoards;
    }

    /***
	* Check generated boards for a solution 
	* in separate threads using backtracking 
    ***/
	findSolution<<<dimGrid, dimBlock>>>
		(d_childBoards, totalBoards, d_emptySpaces, d_emptySpacesCount, d_found, d_solution);

	cudaDeviceSynchronize();
	cudaCheckError();

	//copy solution back to host
    int* h_solution = new int[N*N];
    cudaMemset(h_solution, 0, N*N*sizeof(int));
    cudaMemcpy(h_solution, d_solution, N*N*sizeof(int), cudaMemcpyDeviceToHost);
    
    // printBoard(h_solution);
    writeBoard(fn, h_solution);

    delete[] board;
    delete[] h_solution;
    cudaFree(d_emptySpaces);
    cudaFree(d_emptySpacesCount);
    cudaFree(d_childBoards);
    cudaFree(d_frontierBoards);
    cudaFree(d_boardIdx);
    cudaFree(d_found);
    cudaFree(d_solution);

	return 0;
}
	.file	"tmpxft_003a9194_00000000-6_sudokusolver.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4394:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4394:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"basic_string::append"
	.text
	.align 2
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0:
.LFB5118:
	.cfi_startproc
	movabsq	$4611686018427387903, %rax
	subq	8(%rdi), %rax
	cmpq	%rdx, %rax
	jnb	.L3
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	.LC0(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L3:
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT
	.cfi_endproc
.LFE5118:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0
	.section	.rodata.str1.1
.LC1:
	.string	"r"
.LC2:
	.string	"Could not open file\n"
.LC3:
	.string	"%c\n"
.LC4:
	.string	"Error reading char\n"
	.text
	.globl	_Z4loadPcPi
	.type	_Z4loadPcPi, @function
_Z4loadPcPi:
.LFB4383:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
	leaq	.LC1(%rip), %rsi
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	testq	%rax, %rax
	je	.L9
	movq	%rax, %rbp
	xorl	%r14d, %r14d
	leaq	.LC3(%rip), %r13
	jmp	.L10
.L9:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L22
	addq	$16, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L10:
	.cfi_restore_state
	xorl	%r12d, %r12d
.L15:
	xorl	%eax, %eax
	leaq	7(%rsp), %rdx
	movq	%r13, %rsi
	movq	%rbp, %rdi
	call	__isoc23_fscanf@PLT
	testl	%eax, %eax
	jne	.L12
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L8
.L12:
	movsbl	7(%rsp), %eax
	xorl	%edx, %edx
	leal	-49(%rax), %ecx
	cmpb	$8, %cl
	ja	.L14
	leal	-48(%rax), %edx
.L14:
	movl	%edx, (%rbx,%r12,4)
	incq	%r12
	cmpq	$9, %r12
	jne	.L15
	addl	$9, %r14d
	addq	$36, %rbx
	cmpl	$81, %r14d
	jne	.L10
	movq	%rbp, %rdi
	call	fclose@PLT
.L8:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
.L22:
	call	__stack_chk_fail@PLT
.L18:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4383:
	.size	_Z4loadPcPi, .-_Z4loadPcPi
	.section	.rodata.str1.1
.LC5:
	.string	"%d"
.LC6:
	.string	"\n"
	.text
	.globl	_Z10printBoardPi
	.type	_Z10printBoardPi, @function
_Z10printBoardPi:
.LFB4384:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC5(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L24:
	imulq	$36, %rbp, %r12
	xorl	%ebx, %ebx
	addq	%r13, %r12
.L25:
	movl	(%r12,%rbx,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$9, %rbx
	jne	.L25
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$9, %rbp
	jne	.L24
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4384:
	.size	_Z10printBoardPi, .-_Z10printBoardPi
	.globl	_Z11resetBitmapPbi
	.type	_Z11resetBitmapPbi, @function
_Z11resetBitmapPbi:
.LFB4386:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4386:
	.size	_Z11resetBitmapPbi, .-_Z11resetBitmapPbi
	.globl	_Z6seenItiPb
	.type	_Z6seenItiPb, @function
_Z6seenItiPb:
.LFB4387:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4387:
	.size	_Z6seenItiPb, .-_Z6seenItiPb
	.globl	_Z5validPKi
	.type	_Z5validPKi, @function
_Z5validPKi:
.LFB4388:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4388:
	.size	_Z5validPKi, .-_Z5validPKi
	.globl	_Z5validPKii
	.type	_Z5validPKii, @function
_Z5validPKii:
.LFB4389:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4389:
	.size	_Z5validPKii, .-_Z5validPKii
	.globl	_Z43__device_stub__Z14genChildBoardsPiS_iS_S_S_PiS_iS_S_S_
	.type	_Z43__device_stub__Z14genChildBoardsPiS_iS_S_S_PiS_iS_S_S_, @function
_Z43__device_stub__Z14genChildBoardsPiS_iS_S_S_PiS_iS_S_S_:
.LFB4416:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z14genChildBoardsPiS_iS_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L37:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4416:
	.size	_Z43__device_stub__Z14genChildBoardsPiS_iS_S_S_PiS_iS_S_S_, .-_Z43__device_stub__Z14genChildBoardsPiS_iS_S_S_PiS_iS_S_S_
	.globl	_Z14genChildBoardsPiS_iS_S_S_
	.type	_Z14genChildBoardsPiS_iS_S_S_, @function
_Z14genChildBoardsPiS_iS_S_S_:
.LFB4417:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z14genChildBoardsPiS_iS_S_S_PiS_iS_S_S_
	.cfi_endproc
.LFE4417:
	.size	_Z14genChildBoardsPiS_iS_S_S_, .-_Z14genChildBoardsPiS_iS_S_S_
	.globl	_Z41__device_stub__Z12findSolutionPiiS_S_S_S_PiiS_S_S_S_
	.type	_Z41__device_stub__Z12findSolutionPiiS_S_S_S_PiiS_S_S_S_, @function
_Z41__device_stub__Z12findSolutionPiiS_S_S_S_PiiS_S_S_S_:
.LFB4418:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12findSolutionPiiS_S_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L42:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4418:
	.size	_Z41__device_stub__Z12findSolutionPiiS_S_S_S_PiiS_S_S_S_, .-_Z41__device_stub__Z12findSolutionPiiS_S_S_S_PiiS_S_S_S_
	.globl	_Z12findSolutionPiiS_S_S_S_
	.type	_Z12findSolutionPiiS_S_S_S_, @function
_Z12findSolutionPiiS_S_S_S_:
.LFB4419:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z12findSolutionPiiS_S_S_S_PiiS_S_S_S_
	.cfi_endproc
.LFE4419:
	.size	_Z12findSolutionPiiS_S_S_S_, .-_Z12findSolutionPiiS_S_S_S_
	.section	.rodata.str1.1
.LC7:
	.string	"_Z12findSolutionPiiS_S_S_S_"
.LC8:
	.string	"_Z14genChildBoardsPiS_iS_S_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4421:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12findSolutionPiiS_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14genChildBoardsPiS_iS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4421:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC9:
	.string	".sol"
	.text
	.globl	_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi
	.type	_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi, @function
_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi:
.LFB4385:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4385
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$584, %rsp
	.cfi_def_cfa_offset 640
	movq	%fs:40, %rax
	movq	%rax, 568(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movq	8(%rbx), %rbp
	leaq	40(%rsp), %rax
	movq	(%rbx), %r12
	leaq	24(%rsp), %rbx
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	4(%rbp), %rsi
	movq	%rbx, %rdi
	movq	%rax, 32(%rsp)
	movb	$0, 40(%rsp)
.LEHB1:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEm@PLT
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0
	movl	$4, %edx
	leaq	.LC9(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0
.LEHE1:
	jmp	.L68
.L61:
	endbr64
	jmp	.L67
.L68:
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$16, %edx
.LEHB2:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%r12d, %r12d
	leaq	.LC6(%rip), %r15
.L53:
	imulq	$36, %r12, %r13
	xorl	%ebp, %ebp
	addq	%r14, %r13
.L54:
	movl	0(%r13,%rbp,4), %esi
	movq	8(%rsp), %rdi
	call	_ZNSolsEi@PLT
	incq	%rbp
	cmpq	$9, %rbp
	jne	.L54
	movq	8(%rsp), %rdi
	movl	$1, %edx
	movq	%r15, %rsi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	incq	%r12
	cmpq	$9, %r12
	jne	.L53
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE2:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	je	.L58
	jmp	.L65
.L60:
	endbr64
.L67:
	movq	%rax, %rbp
.L56:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L65
	movq	%rbp, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L65:
	call	__stack_chk_fail@PLT
.L58:
	addq	$584, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4385:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4385:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4385-.LLSDACSB4385
.LLSDACSB4385:
	.uleb128 .LEHB0-.LFB4385
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4385
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L61-.LFB4385
	.uleb128 0
	.uleb128 .LEHB2-.LFB4385
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L60-.LFB4385
	.uleb128 0
	.uleb128 .LEHB3-.LFB4385
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE4385:
	.text
	.size	_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi, .-_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi
	.section	.rodata.str1.1
.LC10:
	.string	"Usage: sudokusolver (filename.in)\n"
.LC11:
	.string	"."
.LC12:
	.string	"basic_string: construction from null is not valid"
.LC13:
	.string	"CUDA error: %s\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4390:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4390
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L70
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
.LEHB4:
	call	__printf_chk@PLT
	jmp	.L91
.L70:
	movq	8(%rsi), %r13
	leaq	104(%rsp), %rbp
	movq	%r13, %rdi
	call	strdup@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rdi
	call	strtok@PLT
	movq	%rax, %rbx
	leaq	120(%rsp), %rax
	movq	%rax, 104(%rsp)
	testq	%rbx, %rbx
	jne	.L71
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L87
	leaq	.LC12(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L71:
	movq	%rbx, %rdi
	call	strlen@PLT
	movq	%rax, 88(%rsp)
	leaq	(%rbx,%rax), %r12
	cmpq	$15, %rax
	jbe	.L73
	leaq	88(%rsp), %rsi
	xorl	%edx, %edx
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
.LEHE4:
	movq	%rax, 104(%rsp)
	movq	88(%rsp), %rax
	movq	%rax, 120(%rsp)
.L73:
	movq	104(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbx, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	88(%rsp), %rax
	movq	104(%rsp), %rdx
	movl	$324, %edi
	movq	%rax, 112(%rsp)
	movb	$0, (%rdx,%rax)
.LEHB5:
	call	_Znam@PLT
	movq	%rax, %rsi
	movq	%r13, %rdi
	movq	%rax, %r12
	call	_Z4loadPcPi
	leaq	32(%rsp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$3314020, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	16(%rsp), %rdi
	movl	$268435456, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	24(%rsp), %rdi
	movl	$268435456, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$8388609, %eax
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	salq	$9, %rax
	movl	$324, %edx
	movl	$1, 84(%rsp)
	movq	%rax, 76(%rsp)
	subq	$256, %rax
	movq	%rax, 88(%rsp)
	movl	$1, 96(%rsp)
	call	cudaMemcpy@PLT
	movl	96(%rsp), %ecx
	movq	88(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	76(%rsp), %rdi
	movl	84(%rsp), %esi
	movl	$1, 12(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movq	48(%rsp), %rcx
	testl	%eax, %eax
	jne	.L74
	movq	40(%rsp), %r9
	movq	32(%rsp), %r8
	movl	12(%rsp), %edx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z43__device_stub__Z14genChildBoardsPiS_iS_S_S_PiS_iS_S_S_
.L74:
	xorl	%ebx, %ebx
	leaq	12(%rsp), %r13
.L77:
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	testb	$1, %bl
	movq	88(%rsp), %rdx
	movl	96(%rsp), %ecx
	movq	76(%rsp), %rdi
	movl	84(%rsp), %esi
	jne	.L75
	call	__cudaPushCallConfiguration@PLT
	movq	48(%rsp), %rcx
	testl	%eax, %eax
	jne	.L76
	movq	40(%rsp), %r9
	movq	32(%rsp), %r8
	movl	12(%rsp), %edx
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	jmp	.L90
.L75:
	call	__cudaPushCallConfiguration@PLT
	movq	48(%rsp), %rcx
	testl	%eax, %eax
	jne	.L76
	movq	40(%rsp), %r9
	movq	32(%rsp), %r8
	movl	12(%rsp), %edx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
.L90:
	call	_Z43__device_stub__Z14genChildBoardsPiS_iS_S_S_PiS_iS_S_S_
.L76:
	incl	%ebx
	cmpl	$18, %ebx
	jne	.L77
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$324, %esi
	call	cudaMalloc@PLT
	movq	56(%rsp), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movl	$324, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	96(%rsp), %ecx
	movq	88(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	76(%rsp), %rdi
	movl	84(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L78
	movq	64(%rsp), %r9
	movq	56(%rsp), %r8
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movl	12(%rsp), %esi
	movq	24(%rsp), %rdi
	call	_Z41__device_stub__Z12findSolutionPiiS_S_S_S_PiiS_S_S_S_
.L78:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L79
	call	cudaGetErrorString@PLT
	movq	%rax, %rdx
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L91:
	orl	$-1, %edi
	call	exit@PLT
.L79:
	movl	$324, %edi
	call	_Znam@PLT
	movl	$324, %edx
	xorl	%esi, %esi
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	cudaMemset@PLT
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movl	$324, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	104(%rsp), %r14
	leaq	136(%rsp), %r13
	movq	%r14, %rsi
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_@PLT
.LEHE5:
	movq	%rbx, %rsi
	movq	%r13, %rdi
.LEHB6:
	call	_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi
.LEHE6:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	32(%rsp), %rdi
.LEHB7:
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
.LEHE7:
	movq	%r14, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L83
	jmp	.L87
.L85:
	endbr64
	movq	%rax, %rbx
.L80:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L81
.L84:
	endbr64
	movq	%rax, %rbx
.L81:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L87
	movq	%rbx, %rdi
.LEHB8:
	call	_Unwind_Resume@PLT
.LEHE8:
.L87:
	call	__stack_chk_fail@PLT
.L83:
	addq	$176, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4390:
	.section	.gcc_except_table
.LLSDA4390:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4390-.LLSDACSB4390
.LLSDACSB4390:
	.uleb128 .LEHB4-.LFB4390
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB5-.LFB4390
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L84-.LFB4390
	.uleb128 0
	.uleb128 .LEHB6-.LFB4390
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L85-.LFB4390
	.uleb128 0
	.uleb128 .LEHB7-.LFB4390
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L84-.LFB4390
	.uleb128 0
	.uleb128 .LEHB8-.LFB4390
	.uleb128 .LEHE8-.LEHB8
	.uleb128 0
	.uleb128 0
.LLSDACSE4390:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <cmath>
#include <vector>
#include <fstream>
#include <iostream>
#include <algorithm>
#include <hiprand/hiprand.h>
#include <string>

#define N 9
#define n 3

#define cudaCheckError() {                                          \
	hipError_t error = hipGetLastError();	\
	if(error != hipSuccess) {	\
		printf("CUDA error: %s\n", hipGetErrorString(error));	\
		exit(-1);	\
	}                                                             \
}

void load(char* filename, int* board) {
	FILE * f = fopen(filename, "r");

	if(f == NULL) {
		printf("Could not open file\n"); return;
	}

	char tmpBuff;

	for(int i=0; i < N; i++) {
		for(int j=0; j < N; j++) {
			if(!fscanf(f, "%c\n", &tmpBuff)) {
				printf("Error reading char\n");
				return;
			}

			if(tmpBuff >= '1' && tmpBuff <= '9') {
				board[i*N + j] = (int) (tmpBuff - '0');
			} else {
				board[i*N + j] = 0;
			}
		}
	}

	fclose(f);

}

void printBoard(int* board) {
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            printf("%d", board[i*N + j]);
        }
        printf("\n");
    }
}

void writeBoard(std::string fn, int* board) {
	std::ofstream f;
	std::string filename = fn + ".sol";

	// printf(filename.c_str());
	
	f.open(filename.c_str());
	
	for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            f << board[i*N + j];
        }
        f << "\n";
    }

	f.close();
}

__global__
void genChildBoards(int* frontierBoards,
					int* childBoards,
					int numFrontierBoards,
					int* boardIdx,
					int* emptySpaces,
					int* emptySpacesCount) {
	
	unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;
	int offset = idx * N*N;

	while(idx < numFrontierBoards) {
		//each thread searches one N*N board for next empty space
		bool found = false;

		for(int i = offset; (found == false) && (i < offset + N*N); i++) {
			if(frontierBoards[i] == 0) {
				found = true;

				//now generate a child board with valid input within the constraints
				int row = (i - offset) / N;
				int col = (i - offset) % N;

				//guess integer between [1-N]				
				for(int guess = 1; guess <= N; guess++){
					bool valid = true;
					//check if guess exists in same row
					for(int c=0; c < N; c++) {
						if(frontierBoards[row*N + c + offset] == guess) {
							valid = false;
						}
					}
					//check if guess exists in same column
					for(int r=0; r < N; r++) {
						if(frontierBoards[r*N + col + offset] == guess) {
							valid = false;
						}
					}
					//check if guess exists in same 3x3 box
					for(int r = n*(row/n); r < n; r++) {
						for(int c = n*(col/n); c < n; c++) {
							if(frontierBoards[r*N + c + offset] == guess) {
								valid = false;
							}
						}
					}

					//persist the new child board
					if(valid == true) {
						int childBoardIdx = atomicAdd(boardIdx, 1); //multiple threads updating this index
						int emptyIdx = 0;

						for(int r=0; r < N; r++) {
							for(int c=0; c < N; c++) {
								childBoards[childBoardIdx*N*N + r*N + c] = frontierBoards[idx*N*N + r*N + c];
								if(frontierBoards[idx*N*N + r*N + c] == 0 && (r != row || c != col)) {
									emptySpaces[emptyIdx + N*N*childBoardIdx] = r*9 + c;
									emptyIdx++;
								}
							}
							emptySpacesCount[childBoardIdx] = emptyIdx; //num empty spaces on board
							childBoards[childBoardIdx*N*N + row*N + col] = guess;
						}
					}
				}
			}
		}

		idx += blockDim.x * gridDim.x;
	}
}

__device__
void resetBitmap(bool* map, int mapsize) {
	for(int i=0; i < mapsize; i++) {
		map[i] = false;
	}
}

//checks if value has been seen earlier
//if it has the board is invalid
__device__
bool seenIt(int val, bool* seen) {
	if (val != 0) {
        if (seen[val-1]) {
            return true;
        }
        seen[val-1] = true;
        return false;
    }
    return false;
}

//check entire board for value
__device__
bool valid(const int* board) {
	bool seen[N];
	resetBitmap(seen, N);

	//check row for repetitions
	for(int i=0; i<N; i++) {
		resetBitmap(seen, N);

		for(int j=0; j<N; j++) {
			int v = board[i*N + j];

			if(seenIt(v, seen)) {
				return false;
			}
		}
	}

	//check col for repetitions
	for(int j=0; j<N; j++) {
		resetBitmap(seen, N);

		for(int i=0; i<N; i++) {
			int v = board[i*N + j];

			if(seenIt(v, seen)) {
				return false;
			}
		}
	}

	//check 3x3 for repetitions
	for(int ridx=0; ridx < n; ridx++) {
		for(int cidx=0; cidx < n; cidx++) {
			resetBitmap(seen, N);

			for(int i=0; i<n; i++) {
				for(int j=0; j<n; j++) {
					int v = board[(ridx*n + i)*N + (cidx*n + j)];

					if(seenIt(v, seen)) {
						return false;
					}
				}
			}
		}
	}

	return true;
}

//chech if change is valud
__device__
bool valid(const int* board, int changedIdx) {
	int r = changedIdx / 9;
	int c = changedIdx % 9;

	bool seen[N];
	resetBitmap(seen, N);

	if(changedIdx < 0) {
		return valid(board);
	}
	if((board[changedIdx] < 1) || (board[changedIdx] > 9)) {
		return false;
	}

    //check for repetitions in row
    for(int i=0; i < N; i++) {
    	int v = board[r*N + i];

    	if(seenIt(v, seen)) {
    		return false;
    	}
    }

    //check for repetitions in col
    resetBitmap(seen, N);
    for(int i=0; i < N; i++) {
    	int v = board[i*N + c];

    	if(seenIt(v, seen)) {
    		return false;
    	}
    }

    //check 3x3 for repetitions
    int ridx = r / n;
    int cidx = c / n;

    resetBitmap(seen, N);
    for (int i=0; i < n; i++) {
    	for (int j=0; j < n; j++) {
    		int v = board[(ridx*n + i)*N + (cidx*n + j)];

    		if(seenIt(v, seen)) {
    			return false;
    		}
    	}
    }

    return true;
}

__global__
void findSolution(int* boards,
				const int numBoards,
				int* emptySpaces,
				int* emptySpacesCount,
				int* found,
				int* solution) {
	int idx = blockDim.x * blockIdx.x + threadIdx.x;

	int* curBoard;
	int* curEmptySpace;
	int curEmptySpaceCount;

	while ((*found == 0) && (idx < numBoards)) {
		int emptyIdx = 0;

		curBoard = boards + idx*N*N;
		curEmptySpace = emptySpaces + idx*N*N;
		curEmptySpaceCount = emptySpacesCount[idx];

		while((emptyIdx >= 0) && (emptyIdx < curEmptySpaceCount)) {
			curBoard[curEmptySpace[emptyIdx]]++;

			if(!valid(curBoard, curEmptySpace[emptyIdx])) {
				//backtrack
				if(curBoard[curEmptySpace[emptyIdx]] >= 9) {
					//reset
					curBoard[curEmptySpace[emptyIdx]] = 0;
					emptyIdx--;
				}
			} else {
				emptyIdx++;
			}
		}

		// # if __CUDA_ARCH__>=200
		// 	printf("emptyIdx = %d \n", emptyIdx);
		// 	printf("curEmptySpaceCount = %d \n", curEmptySpaceCount);
		// #endif  

		if(emptyIdx == curEmptySpaceCount) {
			// # if __CUDA_ARCH__>=200
			// 	printf("found solution \n");
			// #endif  
			*found = 1;

			for(int i=0; i < N*N; i++) {
				solution[i] = curBoard[i];
			}
		}

		idx += gridDim.x * blockDim.x;
	}
}

// magic starts here
int main(int argc, char* argv[]) {
	if (argc < 2){
        printf("Usage: sudokusolver (filename.in)\n");
        exit(-1);
    }

    char* filename = argv[1];
    char* delim = ".";
    std::string fn = strtok(strdup(filename), delim); //used for output
    
    //store board as flattened 9*9 int array
    int* board = new int[N*N];
    load(filename, board);

    int* d_frontierBoards; //start BFS from these boards
    int* d_childBoards; //boards generated from iteration of BFS
    int* d_emptySpaces; //location of empty spaces in the boards
    int* d_emptySpacesCount; //number of empty spaces in each board
    int* d_boardIdx; //index within child boards

    // amount of space to allocate for boards generated from BFS
    const int maxBoardsGen = pow(2,26);

    hipMalloc(&d_emptySpaces, maxBoardsGen*sizeof(int));
    hipMalloc(&d_emptySpacesCount, (maxBoardsGen/81 + 1) * sizeof(int));
    hipMalloc(&d_frontierBoards, maxBoardsGen*sizeof(int));
    hipMalloc(&d_childBoards, maxBoardsGen*sizeof(int));
    hipMalloc(&d_boardIdx, sizeof(int));

    hipMemset(d_boardIdx, 0, sizeof(int));
    hipMemset(d_frontierBoards, 0, maxBoardsGen*sizeof(int));
    hipMemset(d_childBoards, 0, maxBoardsGen*sizeof(int));

    //ToDo: optimize block sizes
    int numBlocks = 512;
    int threadsPerBlock = 256; 
    dim3 dimGrid(numBlocks, 1, 1);
    dim3 dimBlock(threadsPerBlock, 1, 1);

    /***
    * Generate BFS of guesses, 
    * each guess generates a child board
    ***/
    //copy given board to frontier
    hipMemcpy(d_frontierBoards, board, N*N*sizeof(int), hipMemcpyHostToDevice);
    int totalBoards = 1;
    //call once as set up for the loop
    genChildBoards<<<dimGrid, dimBlock>>>
    	(d_frontierBoards, d_childBoards, totalBoards, d_boardIdx, d_emptySpaces, d_emptySpacesCount);

    int BFSiterations = 18;

    for(int i=0; i < BFSiterations; i++) {
    	hipMemcpy(&totalBoards, d_boardIdx, sizeof(int), hipMemcpyDeviceToHost);
    	// printf("total boards after an iteration %d: %d\n", i, totalBoards);
    	hipMemset(d_boardIdx, 0, sizeof(int));

    	if(i%2 == 0) {
    		genChildBoards<<<dimGrid, dimBlock>>>
    			(d_childBoards, d_frontierBoards, totalBoards, d_boardIdx, d_emptySpaces, d_emptySpacesCount);
    	} else {
    		genChildBoards<<<dimGrid, dimBlock>>>
    			(d_frontierBoards, d_childBoards, totalBoards, d_boardIdx, d_emptySpaces, d_emptySpacesCount);
    	}
    }

    hipMemcpy(&totalBoards, d_boardIdx, sizeof(int), hipMemcpyDeviceToHost);
    // printf("total boards: %d\n", totalBoards);

    int* d_found;
    int* d_solution; //solved board

    hipMalloc(&d_found, sizeof(int));
    hipMalloc(&d_solution, N*N*sizeof(int));

    hipMemset(d_found, false, sizeof(int));
    hipMemcpy(d_solution, board, N*N*sizeof(int), hipMemcpyHostToDevice);

    if(BFSiterations % 2 == 1) {
    	d_childBoards = d_frontierBoards;
    }

    /***
	* Check generated boards for a solution 
	* in separate threads using backtracking 
    ***/
	findSolution<<<dimGrid, dimBlock>>>
		(d_childBoards, totalBoards, d_emptySpaces, d_emptySpacesCount, d_found, d_solution);

	hipDeviceSynchronize();
	cudaCheckError();

	//copy solution back to host
    int* h_solution = new int[N*N];
    hipMemset(h_solution, 0, N*N*sizeof(int));
    hipMemcpy(h_solution, d_solution, N*N*sizeof(int), hipMemcpyDeviceToHost);
    
    // printBoard(h_solution);
    writeBoard(fn, h_solution);

    delete[] board;
    delete[] h_solution;
    hipFree(d_emptySpaces);
    hipFree(d_emptySpacesCount);
    hipFree(d_childBoards);
    hipFree(d_frontierBoards);
    hipFree(d_boardIdx);
    hipFree(d_found);
    hipFree(d_solution);

	return 0;
}
	.text
	.file	"sudokusolver.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z4loadPcPi                     # -- Begin function _Z4loadPcPi
	.type	_Z4loadPcPi,@function
_Z4loadPcPi:                            # @_Z4loadPcPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	$.L.str, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB0_8
# %bb.1:
	movq	%rax, %r14
	xorl	%r12d, %r12d
	leaq	7(%rsp), %r15
	xorl	%r13d, %r13d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	xorl	%ebp, %ebp
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	testl	%eax, %eax
	je	.LBB0_9
# %bb.4:                                #   in Loop: Header=BB0_3 Depth=2
	movzbl	7(%rsp), %eax
	leal	-49(%rax), %ecx
	addl	$-48, %eax
	cmpb	$9, %cl
	cmovael	%r12d, %eax
	movl	%eax, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$9, %rbp
	jne	.LBB0_3
# %bb.5:                                # %.critedge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r13
	addq	$36, %rbx
	cmpq	$9, %r13
	jne	.LBB0_2
# %bb.6:                                # %.critedge24
	movq	%r14, %rdi
	callq	fclose
	jmp	.LBB0_7
.LBB0_9:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB0_7:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_8:
	.cfi_def_cfa_offset 64
	movl	$.Lstr.1, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end0:
	.size	_Z4loadPcPi, .Lfunc_end0-_Z4loadPcPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10printBoardPi                # -- Begin function _Z10printBoardPi
	.type	_Z10printBoardPi,@function
_Z10printBoardPi:                       # @_Z10printBoardPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%r15d, %r15d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$9, %r15
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$36, %rbx
	cmpq	$9, %r14
	jne	.LBB1_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z10printBoardPi, .Lfunc_end1-_Z10printBoardPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi # -- Begin function _Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi
	.type	_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi,@function
_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi: # @_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$544, %rsp                      # imm = 0x220
	.cfi_def_cfa_offset 592
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r15
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
	movq	(%r15), %r14
	movq	8(%r15), %r15
	leaq	16(%rsp), %r12
	movq	%r12, -16(%r12)
	movq	$0, -8(%r12)
	movb	$0, (%r12)
	leaq	4(%r15), %rsi
.Ltmp0:
	movq	%rsp, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEm
.Ltmp1:
# %bb.1:
.Ltmp2:
	movq	%rsp, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm
.Ltmp3:
# %bb.2:
.Ltmp4:
	movq	%rsp, %rdi
	movl	$.L.str.6, %esi
	movl	$4, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm
.Ltmp5:
# %bb.3:                                # %_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_PKS5_.exit
	movq	(%rsp), %rsi
.Ltmp7:
	leaq	32(%rsp), %rdi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp8:
# %bb.4:                                # %.preheader.preheader
	xorl	%r15d, %r15d
	leaq	32(%rsp), %r14
.LBB2_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	xorl	%r13d, %r13d
.LBB2_6:                                #   Parent Loop BB2_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r13,4), %esi
.Ltmp9:
	movq	%r14, %rdi
	callq	_ZNSolsEi
.Ltmp10:
# %bb.7:                                #   in Loop: Header=BB2_6 Depth=2
	incq	%r13
	cmpq	$9, %r13
	jne	.LBB2_6
# %bb.8:                                #   in Loop: Header=BB2_5 Depth=1
.Ltmp12:
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp13:
# %bb.9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB2_5 Depth=1
	incq	%r15
	addq	$36, %rbx
	cmpq	$9, %r15
	jne	.LBB2_5
# %bb.10:
.Ltmp15:
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp16:
# %bb.11:
	movq	(%rsp), %rdi
	cmpq	%r12, %rdi
	je	.LBB2_13
# %bb.12:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB2_13:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	40(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 32(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	280(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	addq	$544, %rsp                      # imm = 0x220
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_17:
	.cfi_def_cfa_offset 592
.Ltmp17:
	jmp	.LBB2_18
.LBB2_14:
.Ltmp6:
	jmp	.LBB2_18
.LBB2_16:
.Ltmp14:
	jmp	.LBB2_18
.LBB2_15:
.Ltmp11:
.LBB2_18:
	movq	%rax, %rbx
	movq	(%rsp), %rdi
	cmpq	%r12, %rdi
	je	.LBB2_20
# %bb.19:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i16
	callq	_ZdlPv
.LBB2_20:                               # %.body
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi, .Lfunc_end2-_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp5-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp5
	.uleb128 .Ltmp6-.Lfunc_begin0           #     jumps to .Ltmp6
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp7-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp8-.Ltmp7                  #   Call between .Ltmp7 and .Ltmp8
	.uleb128 .Ltmp17-.Lfunc_begin0          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin0          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Lfunc_end2-.Ltmp16            #   Call between .Ltmp16 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z29__device_stub__genChildBoardsPiS_iS_S_S_ # -- Begin function _Z29__device_stub__genChildBoardsPiS_iS_S_S_
	.type	_Z29__device_stub__genChildBoardsPiS_iS_S_S_,@function
_Z29__device_stub__genChildBoardsPiS_iS_S_S_: # @_Z29__device_stub__genChildBoardsPiS_iS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14genChildBoardsPiS_iS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z29__device_stub__genChildBoardsPiS_iS_S_S_, .Lfunc_end3-_Z29__device_stub__genChildBoardsPiS_iS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__findSolutionPiiS_S_S_S_ # -- Begin function _Z27__device_stub__findSolutionPiiS_S_S_S_
	.type	_Z27__device_stub__findSolutionPiiS_S_S_S_,@function
_Z27__device_stub__findSolutionPiiS_S_S_S_: # @_Z27__device_stub__findSolutionPiiS_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12findSolutionPiiS_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__findSolutionPiiS_S_S_S_, .Lfunc_end4-_Z27__device_stub__findSolutionPiiS_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jle	.LBB5_54
# %bb.1:
	movq	8(%rsi), %r14
	movq	%r14, %rdi
	callq	strdup
	movl	$.L.str.8, %esi
	movq	%rax, %rdi
	callq	strtok
	leaq	104(%rsp), %rdi
	leaq	16(%rsp), %rdx
	movq	%rax, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp18:
	movl	$324, %edi                      # imm = 0x144
	callq	_Znam
.Ltmp19:
# %bb.2:
.Ltmp20:
	movq	%rax, %rbx
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_Z4loadPcPi
.Ltmp21:
# %bb.3:
.Ltmp23:
	leaq	40(%rsp), %rdi
	movl	$268435456, %esi                # imm = 0x10000000
	callq	hipMalloc
.Ltmp24:
# %bb.4:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp25:
	leaq	32(%rsp), %rdi
	movl	$3314020, %esi                  # imm = 0x329164
	callq	hipMalloc
.Ltmp26:
# %bb.5:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit84
.Ltmp27:
	leaq	16(%rsp), %r14
	movl	$268435456, %esi                # imm = 0x10000000
	movq	%r14, %rdi
	callq	hipMalloc
.Ltmp28:
# %bb.6:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit85
.Ltmp29:
	leaq	48(%rsp), %r15
	movl	$268435456, %esi                # imm = 0x10000000
	movq	%r15, %rdi
	callq	hipMalloc
.Ltmp30:
# %bb.7:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit86
.Ltmp31:
	leaq	8(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
.Ltmp32:
# %bb.8:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit87
	movq	8(%rsp), %rdi
.Ltmp33:
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp34:
# %bb.9:
	movq	16(%rsp), %rdi
.Ltmp35:
	movl	$268435456, %edx                # imm = 0x10000000
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp36:
# %bb.10:
	movq	48(%rsp), %rdi
.Ltmp37:
	movl	$268435456, %edx                # imm = 0x10000000
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp38:
# %bb.11:
	movq	16(%rsp), %rdi
.Ltmp40:
	movl	$324, %edx                      # imm = 0x144
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp41:
# %bb.12:
	movq	%rbx, 64(%rsp)                  # 8-byte Spill
	movl	$1, 4(%rsp)
.Ltmp43:
	movabsq	$4294967808, %rdi               # imm = 0x100000200
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp44:
# %bb.13:
	testl	%eax, %eax
	jne	.LBB5_15
# %bb.14:
	movq	16(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	4(%rsp), %edx
	movq	8(%rsp), %rcx
	movq	40(%rsp), %r8
	movq	32(%rsp), %r9
.Ltmp45:
	callq	_Z29__device_stub__genChildBoardsPiS_iS_S_S_
.Ltmp46:
.LBB5_15:                               # %.preheader
	xorl	%ebx, %ebx
	leaq	4(%rsp), %r12
	movabsq	$4294967808, %r13               # imm = 0x100000200
	movabsq	$4294967552, %rbp               # imm = 0x100000100
.LBB5_16:                               # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rsi
.Ltmp48:
	movl	$4, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp49:
# %bb.17:                               #   in Loop: Header=BB5_16 Depth=1
	movq	8(%rsp), %rdi
.Ltmp50:
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp51:
# %bb.18:                               #   in Loop: Header=BB5_16 Depth=1
	testb	$1, %bl
	jne	.LBB5_21
# %bb.19:                               #   in Loop: Header=BB5_16 Depth=1
.Ltmp54:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp55:
# %bb.20:                               #   in Loop: Header=BB5_16 Depth=1
	movq	%r15, %rdi
	movq	%r14, %rsi
	jmp	.LBB5_23
.LBB5_21:                               #   in Loop: Header=BB5_16 Depth=1
.Ltmp52:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp53:
# %bb.22:                               #   in Loop: Header=BB5_16 Depth=1
	movq	%r14, %rdi
	movq	%r15, %rsi
.LBB5_23:                               #   in Loop: Header=BB5_16 Depth=1
	testl	%eax, %eax
	jne	.LBB5_25
# %bb.24:                               # %.invoke
                                        #   in Loop: Header=BB5_16 Depth=1
	movq	32(%rsp), %r9
	movq	40(%rsp), %r8
	movq	8(%rsp), %rcx
	movl	4(%rsp), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
.Ltmp56:
	callq	_Z29__device_stub__genChildBoardsPiS_iS_S_S_
.Ltmp57:
.LBB5_25:                               #   in Loop: Header=BB5_16 Depth=1
	incl	%ebx
	cmpl	$18, %ebx
	jne	.LBB5_16
# %bb.26:
	movq	8(%rsp), %rsi
.Ltmp59:
	leaq	4(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp60:
	movq	64(%rsp), %rbx                  # 8-byte Reload
# %bb.27:
.Ltmp62:
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
.Ltmp63:
# %bb.28:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit88
.Ltmp64:
	leaq	24(%rsp), %rdi
	movl	$324, %esi                      # imm = 0x144
	callq	hipMalloc
.Ltmp65:
# %bb.29:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit89
	movq	56(%rsp), %rdi
.Ltmp66:
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp67:
# %bb.30:
	movq	24(%rsp), %rdi
.Ltmp68:
	movl	$324, %edx                      # imm = 0x144
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp69:
# %bb.31:
.Ltmp70:
	movabsq	$4294967808, %rdi               # imm = 0x100000200
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp71:
# %bb.32:
	testl	%eax, %eax
	jne	.LBB5_34
# %bb.33:
	movq	48(%rsp), %rdi
	movl	4(%rsp), %esi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	movq	56(%rsp), %r8
	movq	24(%rsp), %r9
.Ltmp72:
	callq	_Z27__device_stub__findSolutionPiiS_S_S_S_
.Ltmp73:
.LBB5_34:
.Ltmp74:
	callq	hipDeviceSynchronize
.Ltmp75:
# %bb.35:
.Ltmp77:
	callq	hipGetLastError
.Ltmp78:
# %bb.36:
	testl	%eax, %eax
	jne	.LBB5_56
# %bb.37:
.Ltmp82:
	movl	$324, %edi                      # imm = 0x144
	callq	_Znam
.Ltmp83:
# %bb.38:
.Ltmp84:
	movq	%rax, %r14
	movl	$324, %edx                      # imm = 0x144
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp85:
# %bb.39:
	movq	24(%rsp), %rsi
.Ltmp86:
	movl	$324, %edx                      # imm = 0x144
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp87:
# %bb.40:
	leaq	88(%rsp), %r15
	movq	%r15, -16(%r15)
	movq	104(%rsp), %rsi
	movq	112(%rsp), %rdx
	addq	%rsi, %rdx
.Ltmp88:
	leaq	72(%rsp), %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
.Ltmp89:
# %bb.41:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_.exit
.Ltmp90:
	leaq	72(%rsp), %rdi
	movq	%r14, %rsi
	callq	_Z10writeBoardNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPi
.Ltmp91:
# %bb.42:
	movq	72(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB5_44
# %bb.43:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB5_44:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	40(%rsp), %rdi
.Ltmp93:
	callq	hipFree
.Ltmp94:
# %bb.45:
	movq	32(%rsp), %rdi
.Ltmp95:
	callq	hipFree
.Ltmp96:
# %bb.46:
	movq	48(%rsp), %rdi
.Ltmp97:
	callq	hipFree
.Ltmp98:
# %bb.47:
	movq	16(%rsp), %rdi
.Ltmp99:
	callq	hipFree
.Ltmp100:
# %bb.48:
	movq	8(%rsp), %rdi
.Ltmp101:
	callq	hipFree
.Ltmp102:
# %bb.49:
	movq	56(%rsp), %rdi
.Ltmp103:
	callq	hipFree
.Ltmp104:
# %bb.50:
	movq	24(%rsp), %rdi
.Ltmp105:
	callq	hipFree
.Ltmp106:
# %bb.51:
	leaq	120(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB5_53
# %bb.52:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i90
	callq	_ZdlPv
.LBB5_53:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit92
	xorl	%eax, %eax
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_54:
	.cfi_def_cfa_offset 192
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	jmp	.LBB5_55
.LBB5_56:
.Ltmp79:
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp80:
# %bb.57:
	movl	$.L.str.9, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB5_55:
	movl	$-1, %edi
	callq	exit
.LBB5_58:
.Ltmp92:
	movq	%rax, %rbx
	movq	72(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB5_70
# %bb.59:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i93
	callq	_ZdlPv
	jmp	.LBB5_70
.LBB5_60:
.Ltmp61:
	jmp	.LBB5_69
.LBB5_61:
.Ltmp42:
	jmp	.LBB5_69
.LBB5_62:
.Ltmp47:
	jmp	.LBB5_69
.LBB5_63:
.Ltmp81:
	jmp	.LBB5_69
.LBB5_64:
.Ltmp22:
	jmp	.LBB5_69
.LBB5_65:
.Ltmp76:
	jmp	.LBB5_69
.LBB5_66:
.Ltmp39:
	jmp	.LBB5_69
.LBB5_67:
.Ltmp107:
	jmp	.LBB5_69
.LBB5_68:
.Ltmp58:
.LBB5_69:
	movq	%rax, %rbx
.LBB5_70:
	leaq	120(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB5_72
# %bb.71:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i96
	callq	_ZdlPv
.LBB5_72:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit98
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table5:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp18-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp18
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp21-.Ltmp18                #   Call between .Ltmp18 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin1          #     jumps to .Ltmp22
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp38-.Ltmp23                #   Call between .Ltmp23 and .Ltmp38
	.uleb128 .Ltmp39-.Lfunc_begin1          #     jumps to .Ltmp39
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp40-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp41-.Ltmp40                #   Call between .Ltmp40 and .Ltmp41
	.uleb128 .Ltmp42-.Lfunc_begin1          #     jumps to .Ltmp42
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp43-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp46-.Ltmp43                #   Call between .Ltmp43 and .Ltmp46
	.uleb128 .Ltmp47-.Lfunc_begin1          #     jumps to .Ltmp47
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp48-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp57-.Ltmp48                #   Call between .Ltmp48 and .Ltmp57
	.uleb128 .Ltmp58-.Lfunc_begin1          #     jumps to .Ltmp58
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp59-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Ltmp60-.Ltmp59                #   Call between .Ltmp59 and .Ltmp60
	.uleb128 .Ltmp61-.Lfunc_begin1          #     jumps to .Ltmp61
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp62-.Lfunc_begin1          # >> Call Site 8 <<
	.uleb128 .Ltmp75-.Ltmp62                #   Call between .Ltmp62 and .Ltmp75
	.uleb128 .Ltmp76-.Lfunc_begin1          #     jumps to .Ltmp76
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp77-.Lfunc_begin1          # >> Call Site 9 <<
	.uleb128 .Ltmp78-.Ltmp77                #   Call between .Ltmp77 and .Ltmp78
	.uleb128 .Ltmp81-.Lfunc_begin1          #     jumps to .Ltmp81
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp82-.Lfunc_begin1          # >> Call Site 10 <<
	.uleb128 .Ltmp89-.Ltmp82                #   Call between .Ltmp82 and .Ltmp89
	.uleb128 .Ltmp107-.Lfunc_begin1         #     jumps to .Ltmp107
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp90-.Lfunc_begin1          # >> Call Site 11 <<
	.uleb128 .Ltmp91-.Ltmp90                #   Call between .Ltmp90 and .Ltmp91
	.uleb128 .Ltmp92-.Lfunc_begin1          #     jumps to .Ltmp92
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp93-.Lfunc_begin1          # >> Call Site 12 <<
	.uleb128 .Ltmp106-.Ltmp93               #   Call between .Ltmp93 and .Ltmp106
	.uleb128 .Ltmp107-.Lfunc_begin1         #     jumps to .Ltmp107
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp79-.Lfunc_begin1          # >> Call Site 13 <<
	.uleb128 .Ltmp80-.Ltmp79                #   Call between .Ltmp79 and .Ltmp80
	.uleb128 .Ltmp81-.Lfunc_begin1          #     jumps to .Ltmp81
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp80-.Lfunc_begin1          # >> Call Site 14 <<
	.uleb128 .Lfunc_end5-.Ltmp80            #   Call between .Ltmp80 and .Lfunc_end5
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	je	.LBB6_1
# %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	strlen
	leaq	(%rax,%rbx), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL
.LBB6_1:
	.cfi_def_cfa_offset 32
	movl	$.L.str.11, %edi
	callq	_ZSt19__throw_logic_errorPKc
.Lfunc_end6:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end6-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB7_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB7_3
.LBB7_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB7_3:
	testq	%r14, %r14
	je	.LBB7_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB7_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB7_7
.LBB7_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB7_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end7-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB8_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB8_3
.LBB8_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB8_3:
	testq	%r14, %r14
	je	.LBB8_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB8_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB8_7
.LBB8_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB8_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag, .Lfunc_end8-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14genChildBoardsPiS_iS_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12findSolutionPiiS_S_S_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"r"
	.size	.L.str, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%c\n"
	.size	.L.str.2, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d"
	.size	.L.str.4, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\n"
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	".sol"
	.size	.L.str.6, 5

	.type	_Z14genChildBoardsPiS_iS_S_S_,@object # @_Z14genChildBoardsPiS_iS_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z14genChildBoardsPiS_iS_S_S_
	.p2align	3, 0x0
_Z14genChildBoardsPiS_iS_S_S_:
	.quad	_Z29__device_stub__genChildBoardsPiS_iS_S_S_
	.size	_Z14genChildBoardsPiS_iS_S_S_, 8

	.type	_Z12findSolutionPiiS_S_S_S_,@object # @_Z12findSolutionPiiS_S_S_S_
	.globl	_Z12findSolutionPiiS_S_S_S_
	.p2align	3, 0x0
_Z12findSolutionPiiS_S_S_S_:
	.quad	_Z27__device_stub__findSolutionPiiS_S_S_S_
	.size	_Z12findSolutionPiiS_S_S_S_, 8

	.type	.L.str.8,@object                # @.str.8
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.8:
	.asciz	"."
	.size	.L.str.8, 2

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"CUDA error: %s\n"
	.size	.L.str.9, 16

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"basic_string: construction from null is not valid"
	.size	.L.str.11, 50

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14genChildBoardsPiS_iS_S_S_"
	.size	.L__unnamed_1, 30

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12findSolutionPiiS_S_S_S_"
	.size	.L__unnamed_2, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Error reading char"
	.size	.Lstr, 19

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Could not open file"
	.size	.Lstr.1, 20

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Usage: sudokusolver (filename.in)"
	.size	.Lstr.2, 34

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z29__device_stub__genChildBoardsPiS_iS_S_S_
	.addrsig_sym _Z27__device_stub__findSolutionPiiS_S_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z14genChildBoardsPiS_iS_S_S_
	.addrsig_sym _Z12findSolutionPiiS_S_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14genChildBoardsPiS_iS_S_S_ ; -- Begin function _Z14genChildBoardsPiS_iS_S_S_
	.globl	_Z14genChildBoardsPiS_iS_S_S_
	.p2align	8
	.type	_Z14genChildBoardsPiS_iS_S_S_,@function
_Z14genChildBoardsPiS_iS_S_S_:          ; @_Z14genChildBoardsPiS_iS_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b32 s14, s[0:1], 0x10
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s4, 0xffff
	s_mov_b32 s4, exec_lo
	s_mul_i32 s15, s15, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v15, s15, v0
	v_cmpx_gt_u32_e64 s14, v15
	s_cbranch_execz .LBB0_29
; %bb.1:                                ; %.preheader114.lr.ph
	s_load_b32 s2, s[2:3], 0x0
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b64 s[12:13], s[0:1], 0x28
	v_mul_lo_u32 v1, 0x51, v15
	s_mulk_i32 s15, 0x51
	v_mov_b32_e32 v3, 0
	v_mad_u32_u24 v0, 0x51, v0, s15
	s_mov_b32 s17, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v16, 0x51, v1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s15, s2, s16
	s_mul_i32 s16, s15, 0x51
.LBB0_2:                                ; %.preheader114
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
                                        ;         Child Loop BB0_8 Depth 4
                                        ;         Child Loop BB0_11 Depth 4
                                        ;           Child Loop BB0_13 Depth 5
                                        ;         Child Loop BB0_21 Depth 4
                                        ;           Child Loop BB0_22 Depth 5
	v_mov_b32_e32 v4, v1
	s_mov_b32 s18, 0
	s_mov_b32 s19, 0
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
                                        ;         Child Loop BB0_8 Depth 4
                                        ;         Child Loop BB0_11 Depth 4
                                        ;           Child Loop BB0_13 Depth 5
                                        ;         Child Loop BB0_21 Depth 4
                                        ;           Child Loop BB0_22 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v2, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_saveexec_b32 s20, vcc_lo
	s_cbranch_execz .LBB0_27
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=2
	v_sub_nc_u32_e32 v17, v4, v1
	s_mul_hi_u32 s1, s19, 0x2f684bdb
	s_mov_b32 s21, 1
	s_sub_i32 s0, s19, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshr_b32 s2, s0, 1
	v_mul_hi_u32 v2, 0x38e38e39, v17
	v_mul_hi_u32 v6, 0x2f684bdb, v17
	s_add_i32 s2, s2, s1
	v_cmp_gt_u32_e64 s0, 27, v17
	s_lshr_b32 s1, s2, 4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v18, 1, v2
	v_sub_nc_u32_e32 v7, v17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v2, v18, 3, v18
	v_lshrrev_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v19, v17, v2
	v_add_nc_u32_e32 v6, v7, v6
	v_add_nc_u32_e32 v7, v1, v17
	v_add_nc_u32_e32 v21, v1, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_and_b32_e32 v5, 0xff, v19
	v_lshrrev_b32_e32 v8, 4, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v23, v7, v2
	v_mul_lo_u16 v5, 0xab, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v22, v8, 1, v8
	v_lshrrev_b16 v5, 9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u16 v5, v5, 3
	v_sub_nc_u16 v5, v19, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v5, 0xff, v5
	v_sub_nc_u32_e32 v20, v19, v5
	v_mad_u64_u32 v[5:6], null, s1, 27, v[1:2]
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s1, 3, v20
.LBB0_5:                                ; %.preheader112
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_6 Depth 4
                                        ;         Child Loop BB0_8 Depth 4
                                        ;         Child Loop BB0_11 Depth 4
                                        ;           Child Loop BB0_13 Depth 5
                                        ;         Child Loop BB0_21 Depth 4
                                        ;           Child Loop BB0_22 Depth 5
	s_mov_b32 s22, -1
	s_mov_b32 s23, 0
                                        ; implicit-def: $sgpr3
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, s23, v21
	s_add_i32 s23, s23, 1
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, s2, s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s5, v7, s2
	global_load_b32 v2, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s2, s21, v2
	s_and_b32 s22, s2, s22
	s_and_not1_b32 s2, s3, exec_lo
	s_and_b32 s3, s22, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s2, s3
	s_cmp_lg_u32 s23, 9
	s_cbranch_scc1 .LBB0_6
; %bb.7:                                ; %.preheader111.preheader
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_mov_b32 s22, 0
                                        ; implicit-def: $sgpr23
.LBB0_8:                                ; %.preheader111
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, s22, v23
	s_add_i32 s22, s22, 9
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, s2, s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s5, v7, s2
	global_load_b32 v2, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s2, s21, v2
	s_and_b32 s3, s2, s3
	s_and_not1_b32 s2, s23, exec_lo
	s_and_b32 s23, s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s23, s2, s23
	s_cmpk_eq_i32 s22, 0x51
	s_cbranch_scc0 .LBB0_8
; %bb.9:                                ;   in Loop: Header=BB0_5 Depth=3
	s_and_saveexec_b32 s22, s0
	s_cbranch_execz .LBB0_17
; %bb.10:                               ; %.lr.ph124.preheader
                                        ;   in Loop: Header=BB0_5 Depth=3
	v_mov_b32_e32 v2, v5
	v_mov_b32_e32 v6, v22
	s_mov_b32 s24, 0
	s_mov_b32 s26, s23
                                        ; implicit-def: $sgpr25
.LBB0_11:                               ; %.lr.ph124
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_13 Depth 5
	s_and_saveexec_b32 s27, s1
	s_cbranch_execz .LBB0_15
; %bb.12:                               ; %.lr.ph
                                        ;   in Loop: Header=BB0_11 Depth=4
	v_mov_b32_e32 v7, v20
	s_mov_b32 s28, 0
	s_mov_b32 s30, s26
                                        ; implicit-def: $sgpr29
.LBB0_13:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ;         Parent Loop BB0_11 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v2, v7
	v_cmp_lt_i32_e64 s3, 1, v7
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, s2, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s2, s5, v9, s2
	global_load_b32 v8, v[8:9], off
	v_add_nc_u32_e32 v9, 1, v7
	v_mov_b32_e32 v7, v9
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s2, s21, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_and_b32 s30, s2, s30
	s_or_b32 s28, s3, s28
	s_and_not1_b32 s2, s29, exec_lo
	s_and_b32 s3, s30, exec_lo
	s_or_b32 s29, s2, s3
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB0_13
; %bb.14:                               ; %Flow173
                                        ;   in Loop: Header=BB0_11 Depth=4
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s2, s26, exec_lo
	s_and_b32 s3, s29, exec_lo
	s_or_b32 s26, s2, s3
.LBB0_15:                               ; %Flow174
                                        ;   in Loop: Header=BB0_11 Depth=4
	s_or_b32 exec_lo, exec_lo, s27
	v_cmp_lt_u32_e64 s2, 1, v6
	v_add_nc_u32_e32 v6, 1, v6
	v_add_nc_u32_e32 v2, 9, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s24, s2, s24
	s_and_not1_b32 s2, s25, exec_lo
	s_and_b32 s3, s26, exec_lo
	s_or_b32 s25, s2, s3
	s_and_not1_b32 exec_lo, exec_lo, s24
	s_cbranch_execnz .LBB0_11
; %bb.16:                               ; %Flow175
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s2, s23, exec_lo
	s_and_b32 s3, s25, exec_lo
	s_or_b32 s23, s2, s3
.LBB0_17:                               ; %Flow176
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s23
	s_cbranch_execz .LBB0_26
; %bb.18:                               ;   in Loop: Header=BB0_5 Depth=3
	s_mov_b32 s23, exec_lo
	s_mov_b32 s3, exec_lo
	v_mbcnt_lo_u32_b32 v2, s23, 0
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_5 Depth=3
	s_bcnt1_i32_b32 s2, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v6, s2
	global_atomic_add_u32 v6, v3, v6, s[8:9] glc
.LBB0_20:                               ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v6
	v_mov_b32_e32 v24, s21
	s_mov_b32 s23, 0
	s_mov_b32 s24, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v25, 0 :: v_dual_add_nc_u32 v8, s2, v2
	v_mul_lo_u32 v6, 0x51, v8
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_nc_u32_e32 v10, v17, v6
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[12:13], 2, v[6:7]
	v_add_co_u32 v7, s2, s12, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v8, s2, s13, v9, s2
	v_lshlrev_b64 v[26:27], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s2, s6, v12
	v_add_co_ci_u32_e64 v10, s2, s7, v13, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s2, s6, v26
	v_add_co_ci_u32_e64 v12, s2, s7, v27, s2
	v_mov_b32_e32 v26, v0
.LBB0_21:                               ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_22 Depth 5
	v_cmp_eq_u32_e64 s2, s24, v18
	v_dual_mov_b32 v14, v10 :: v_dual_mov_b32 v13, v9
	s_mov_b32 s26, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_xor_b32 s25, s2, -1
.LBB0_22:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ;         Parent Loop BB0_21 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v2, s26, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[27:28], 2, v[2:3]
	v_add_co_u32 v27, s2, s4, v27
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v28, s2, s5, v28, s2
	v_cmp_ne_u32_e64 s2, s26, v19
	global_load_b32 v2, v[27:28], off
	s_or_b32 s2, s25, s2
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s3, 0, v2
	global_store_b32 v[13:14], v2, off
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_22 Depth=5
	s_add_i32 s27, s23, s26
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v2, s27 :: v_dual_add_nc_u32 v27, v25, v6
	v_add_nc_u32_e32 v25, 1, v25
	v_ashrrev_i32_e32 v28, 31, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[27:28], 2, v[27:28]
	v_add_co_u32 v27, s2, s10, v27
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v28, s2, s11, v28, s2
	global_store_b32 v[27:28], v2, off
.LBB0_24:                               ;   in Loop: Header=BB0_22 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	v_add_co_u32 v13, s2, v13, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v14, s2, 0, v14, s2
	s_add_i32 s26, s26, 1
	s_cmp_eq_u32 s26, 9
	s_cbranch_scc0 .LBB0_22
; %bb.25:                               ;   in Loop: Header=BB0_21 Depth=4
	v_add_co_u32 v9, s2, v9, 36
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, 0, v10, s2
	v_add_nc_u32_e32 v26, 9, v26
	s_add_i32 s24, s24, 1
	s_add_i32 s23, s23, 9
	s_cmp_eq_u32 s24, 9
	global_store_b32 v[7:8], v25, off
	global_store_b32 v[11:12], v24, off
	s_cbranch_scc0 .LBB0_21
.LBB0_26:                               ; %Flow172
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s22
	s_add_i32 s21, s21, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s21, 10
	s_cbranch_scc1 .LBB0_5
.LBB0_27:                               ; %Flow178
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v4, 1, v4
	s_add_i32 s19, s19, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s0, v4, v16
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s18, s0, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB0_3
; %bb.28:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v15, s15, v15
	v_add_nc_u32_e32 v0, s16, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_u32_e32 vcc_lo, s14, v15
	s_or_b32 s17, vcc_lo, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB0_2
.LBB0_29:                               ; %._crit_edge135
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14genChildBoardsPiS_iS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 29
		.amdhsa_next_free_sgpr 31
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14genChildBoardsPiS_iS_S_S_, .Lfunc_end0-_Z14genChildBoardsPiS_iS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1524
; NumSgprs: 33
; NumVgprs: 29
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 33
; NumVGPRsForWavesPerEU: 29
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12findSolutionPiiS_S_S_S_ ; -- Begin function _Z12findSolutionPiiS_S_S_S_
	.globl	_Z12findSolutionPiiS_S_S_S_
	.p2align	8
	.type	_Z12findSolutionPiiS_S_S_S_,@function
_Z12findSolutionPiiS_S_S_S_:            ; @_Z12findSolutionPiiS_S_S_S_
; %bb.0:
	s_clause 0x2
	s_load_b256 s[4:11], s[0:1], 0x10
	s_load_b32 s13, s[0:1], 0x3c
	s_load_b32 s12, s[0:1], 0x8
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s16, s[8:9], 0x0
	s_and_b32 s14, s13, 0xffff
	s_mov_b32 s13, 0
	v_mad_u64_u32 v[1:2], null, s15, s14, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s12, v1
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s16, 0
	s_cselect_b32 s15, -1, 0
	s_and_b32 s15, s15, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s16, s15
	s_cbranch_execz .LBB1_111
; %bb.1:                                ; %.lr.ph54
	v_cvt_f32_u32_e32 v0, 9
	s_load_b32 s2, s[2:3], 0x0
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mul_lo_u32 v3, 0x51, v1
	v_add_nc_u32_e64 v15, 4, -1
	v_rcp_iflag_f32_e32 v0, v0
	v_mov_b32_e32 v5, 0
	s_waitcnt_depctr 0xfff
	v_dual_mov_b32 v17, 1 :: v_dual_mul_f32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cvt_u32_f32_e32 v2, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s2, s14
	s_mul_i32 s15, s14, 0x51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v2, -9
	v_mul_hi_u32 v4, v2, v0
	v_add_nc_u32_e64 v0, 13, -1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v16, v2, v4
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
                                        ;       Child Loop BB1_5 Depth 3
                                        ;       Child Loop BB1_9 Depth 3
                                        ;       Child Loop BB1_15 Depth 3
                                        ;       Child Loop BB1_17 Depth 3
                                        ;       Child Loop BB1_24 Depth 3
                                        ;       Child Loop BB1_26 Depth 3
                                        ;         Child Loop BB1_27 Depth 4
                                        ;       Child Loop BB1_45 Depth 3
                                        ;       Child Loop BB1_47 Depth 3
                                        ;         Child Loop BB1_48 Depth 4
                                        ;         Child Loop BB1_50 Depth 4
                                        ;       Child Loop BB1_60 Depth 3
                                        ;         Child Loop BB1_61 Depth 4
                                        ;         Child Loop BB1_63 Depth 4
                                        ;       Child Loop BB1_73 Depth 3
                                        ;         Child Loop BB1_74 Depth 4
                                        ;           Child Loop BB1_75 Depth 5
                                        ;           Child Loop BB1_77 Depth 5
                                        ;             Child Loop BB1_78 Depth 6
                                        ;     Child Loop BB1_109 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v9, v5
	s_mov_b32 s17, 0
	s_mov_b32 s16, exec_lo
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v2, v[6:7], off
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB1_107
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mul_lo_u32 v8, 0x51, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v19, vcc_lo, s1, v9, vcc_lo
	v_add_co_u32 v20, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v9, vcc_lo
	v_mov_b32_e32 v9, 0
.LBB1_4:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_5 Depth 3
                                        ;       Child Loop BB1_9 Depth 3
                                        ;       Child Loop BB1_15 Depth 3
                                        ;       Child Loop BB1_17 Depth 3
                                        ;       Child Loop BB1_24 Depth 3
                                        ;       Child Loop BB1_26 Depth 3
                                        ;         Child Loop BB1_27 Depth 4
                                        ;       Child Loop BB1_45 Depth 3
                                        ;       Child Loop BB1_47 Depth 3
                                        ;         Child Loop BB1_48 Depth 4
                                        ;         Child Loop BB1_50 Depth 4
                                        ;       Child Loop BB1_60 Depth 3
                                        ;         Child Loop BB1_61 Depth 4
                                        ;         Child Loop BB1_63 Depth 4
                                        ;       Child Loop BB1_73 Depth 3
                                        ;         Child Loop BB1_74 Depth 4
                                        ;           Child Loop BB1_75 Depth 5
                                        ;           Child Loop BB1_77 Depth 5
                                        ;             Child Loop BB1_78 Depth 6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v8, v9
	v_mov_b32_e32 v9, v5
	s_mov_b32 s2, 0
	v_lshlrev_b64 v[9:10], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v20, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, v21, v10, vcc_lo
	global_load_b32 v11, v[9:10], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v11, vcc_lo, v18, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v12, vcc_lo
	global_load_b32 v4, v[11:12], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	global_store_b32 v[11:12], v4, off
	global_load_b32 v4, v[9:10], off
.LBB1_5:                                ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s3, s2, 13
	s_add_i32 s2, s2, 1
	scratch_store_b8 off, v5, s3
	s_cmp_lg_u32 s2, 9
	s_cbranch_scc1 .LBB1_5
; %bb.6:                                ; %_Z11resetBitmapPbi.exit.i
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s21, 0
	s_mov_b32 s19, 0
	s_mov_b32 s18, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v4
	s_xor_b32 s20, exec_lo, s2
	s_cbranch_execz .LBB1_43
; %bb.7:                                ;   in Loop: Header=BB1_4 Depth=2
	v_lshlrev_b64 v[9:10], 2, v[4:5]
	s_mov_b32 s3, -1
	s_mov_b32 s2, 0
	s_mov_b32 s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v18, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, v19, v10, vcc_lo
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, -10, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e32 -10, v9
	s_cbranch_execz .LBB1_40
; %bb.8:                                ; %.preheader91.i
                                        ;   in Loop: Header=BB1_4 Depth=2
	v_mul_hi_u32 v9, v4, v16
	s_mov_b64 s[2:3], 0
	s_mov_b32 s23, 0
                                        ; implicit-def: $sgpr22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v10, v9, 3, v9
	v_sub_nc_u32_e32 v10, v4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 8, v10
	v_add_nc_u32_e32 v12, -9, v10
	v_dual_cndmask_b32 v10, v10, v12 :: v_dual_add_nc_u32 v11, 1, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v11, vcc_lo
	v_cmp_lt_u32_e32 vcc_lo, 8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v11, 1, v9
	v_cndmask_b32_e32 v11, v9, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v11, 36, v[6:7]
.LBB1_9:                                ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v10, vcc_lo
	s_mov_b32 s26, exec_lo
                                        ; implicit-def: $sgpr24
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s25, 0, v11
	v_cmpx_ne_u32_e32 0, v11
	s_cbranch_execz .LBB1_11
; %bb.10:                               ; %_Z6seenItiPb.exit.i
                                        ;   in Loop: Header=BB1_9 Depth=3
	v_add_nc_u32_e32 v11, v0, v11
	s_delay_alu instid0(VALU_DEP_3)
	s_and_not1_b32 s25, s25, exec_lo
	s_mov_b32 s24, -1
	scratch_load_u8 v12, v11, off
	scratch_store_b8 v11, v17, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v12
	s_and_b32 s27, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s25, s25, s27
.LBB1_11:                               ; %Flow162
                                        ;   in Loop: Header=BB1_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s26
	s_mov_b32 s27, -1
	s_and_saveexec_b32 s26, s25
; %bb.12:                               ; %.critedge78.i
                                        ;   in Loop: Header=BB1_9 Depth=3
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 36
	s_cselect_b32 s25, -1, 0
	s_and_not1_b32 s24, s24, exec_lo
	s_or_not1_b32 s27, s25, exec_lo
; %bb.13:                               ; %Flow163
                                        ;   in Loop: Header=BB1_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s26
	s_xor_b32 s24, s24, -1
	s_and_b32 s25, exec_lo, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s23, s25, s23
	s_and_not1_b32 s22, s22, exec_lo
	s_and_b32 s24, s24, exec_lo
	s_or_b32 s22, s22, s24
	s_and_not1_b32 exec_lo, exec_lo, s23
	s_cbranch_execnz .LBB1_9
; %bb.14:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	s_mov_b32 s3, -1
	s_mov_b32 s2, 0
	s_and_saveexec_b32 s23, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s22, exec_lo, s23
	s_cbranch_execz .LBB1_39
.LBB1_15:                               ; %.critedge.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s3, s2, 13
	s_add_i32 s2, s2, 1
	scratch_store_b8 off, v5, s3
	s_cmp_lg_u32 s2, 9
	s_cbranch_scc1 .LBB1_15
; %bb.16:                               ; %_Z11resetBitmapPbi.exit66.preheader.i.preheader
                                        ;   in Loop: Header=BB1_4 Depth=2
	v_mul_hi_i32 v9, 0x38e38e39, v4
	s_mov_b64 s[2:3], 0
	s_mov_b32 s24, 0
                                        ; implicit-def: $sgpr23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v10, 31, v9
	v_ashrrev_i32_e32 v9, 1, v9
	v_add_nc_u32_e32 v9, v9, v10
	v_mov_b32_e32 v10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v9, v9, 3, v9
	v_sub_nc_u32_e32 v9, v4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[9:10]
	v_add_co_u32 v10, vcc_lo, v6, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v7, v11, vcc_lo
.LBB1_17:                               ; %_Z11resetBitmapPbi.exit66.preheader.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v11, vcc_lo
	s_mov_b32 s27, exec_lo
                                        ; implicit-def: $sgpr25
	global_load_b32 v12, v[12:13], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s26, 0, v12
	v_cmpx_ne_u32_e32 0, v12
	s_cbranch_execz .LBB1_19
; %bb.18:                               ; %_Z6seenItiPb.exit70.i
                                        ;   in Loop: Header=BB1_17 Depth=3
	v_add_nc_u32_e32 v12, v0, v12
	s_delay_alu instid0(VALU_DEP_3)
	s_and_not1_b32 s26, s26, exec_lo
	s_mov_b32 s25, -1
	scratch_load_u8 v13, v12, off
	scratch_store_b8 v12, v17, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v13
	s_and_b32 s28, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s26, s26, s28
.LBB1_19:                               ; %Flow160
                                        ;   in Loop: Header=BB1_17 Depth=3
	s_or_b32 exec_lo, exec_lo, s27
	s_mov_b32 s28, -1
	s_and_saveexec_b32 s27, s26
; %bb.20:                               ; %.critedge81.i
                                        ;   in Loop: Header=BB1_17 Depth=3
	s_add_u32 s2, s2, 36
	s_addc_u32 s3, s3, 0
	s_cmpk_eq_i32 s2, 0x144
	s_cselect_b32 s26, -1, 0
	s_and_not1_b32 s25, s25, exec_lo
	s_or_not1_b32 s28, s26, exec_lo
; %bb.21:                               ; %Flow161
                                        ;   in Loop: Header=BB1_17 Depth=3
	s_or_b32 exec_lo, exec_lo, s27
	s_xor_b32 s25, s25, -1
	s_and_b32 s26, exec_lo, s28
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s24, s26, s24
	s_and_not1_b32 s23, s23, exec_lo
	s_and_b32 s25, s25, exec_lo
	s_or_b32 s23, s23, s25
	s_and_not1_b32 exec_lo, exec_lo, s24
	s_cbranch_execnz .LBB1_17
; %bb.22:                               ; %loop.exit.guard140
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
	s_mov_b32 s3, -1
	s_mov_b32 s24, 0
	s_and_saveexec_b32 s2, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB1_38
; %bb.23:                               ; %.critedge59.i.preheader
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s3, 0
.LBB1_24:                               ; %.critedge59.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s23, s3, 13
	s_add_i32 s3, s3, 1
	scratch_store_b8 off, v5, s23
	s_cmp_lg_u32 s3, 9
	s_cbranch_scc1 .LBB1_24
; %bb.25:                               ; %_Z11resetBitmapPbi.exit73.preheader.i
                                        ;   in Loop: Header=BB1_4 Depth=2
	v_mul_hi_u32 v10, 0x2f684bdb, v4
	v_mul_hi_u32 v9, 0xaaaaaaab, v9
	s_mov_b32 s3, 0
	s_mov_b32 s24, 0
                                        ; implicit-def: $sgpr23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v11, v4, v10
	v_lshrrev_b32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v11, 1, v11
	v_add_nc_u32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v11, v9, 1, v9
	v_lshrrev_b32_e32 v12, 4, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v12, 27, v[11:12]
.LBB1_26:                               ; %.preheader.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_27 Depth 4
	s_mov_b32 s26, 0
	s_mov_b32 s28, 0
                                        ; implicit-def: $sgpr25
                                        ; implicit-def: $sgpr27
.LBB1_27:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_26 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v10, s28, v9
	s_mov_b32 s31, exec_lo
                                        ; implicit-def: $sgpr29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v18, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, v19, v11, vcc_lo
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s30, 0, v10
	v_cmpx_ne_u32_e32 0, v10
	s_cbranch_execz .LBB1_29
; %bb.28:                               ; %_Z6seenItiPb.exit77.i
                                        ;   in Loop: Header=BB1_27 Depth=4
	v_add_nc_u32_e32 v10, v0, v10
	s_delay_alu instid0(VALU_DEP_3)
	s_and_not1_b32 s30, s30, exec_lo
	s_mov_b32 s29, -1
	scratch_load_u8 v11, v10, off
	scratch_store_b8 v10, v17, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v11
	s_and_b32 s33, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s30, s30, s33
.LBB1_29:                               ; %Flow157
                                        ;   in Loop: Header=BB1_27 Depth=4
	s_or_b32 exec_lo, exec_lo, s31
	s_mov_b32 s31, -1
	s_mov_b32 s33, s29
	s_and_saveexec_b32 s34, s30
; %bb.30:                               ; %.critedge84.i
                                        ;   in Loop: Header=BB1_27 Depth=4
	s_add_i32 s28, s28, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s28, 3
	s_cselect_b32 s30, -1, 0
	s_and_not1_b32 s33, s29, exec_lo
	s_or_not1_b32 s31, s30, exec_lo
; %bb.31:                               ; %Flow158
                                        ;   in Loop: Header=BB1_27 Depth=4
	s_or_b32 exec_lo, exec_lo, s34
	s_xor_b32 s30, s33, -1
	s_and_b32 s31, exec_lo, s31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s26, s31, s26
	s_and_not1_b32 s27, s27, exec_lo
	s_and_b32 s30, s30, exec_lo
	s_and_not1_b32 s25, s25, exec_lo
	s_and_b32 s29, s29, exec_lo
	s_or_b32 s27, s27, s30
	s_or_b32 s25, s25, s29
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB1_27
; %bb.32:                               ; %loop.exit.guard144
                                        ;   in Loop: Header=BB1_26 Depth=3
	s_or_b32 exec_lo, exec_lo, s26
	s_mov_b32 s26, -1
	s_and_saveexec_b32 s28, s27
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s27, exec_lo, s28
; %bb.33:                               ; %.critedge61.i
                                        ;   in Loop: Header=BB1_26 Depth=3
	s_add_i32 s24, s24, 1
	v_add_nc_u32_e32 v9, 9, v9
	s_cmp_eq_u32 s24, 3
	s_cselect_b32 s26, -1, 0
	s_and_not1_b32 s25, s25, exec_lo
	s_or_not1_b32 s26, s26, exec_lo
; %bb.34:                               ; %Flow159
                                        ;   in Loop: Header=BB1_26 Depth=3
	s_or_b32 exec_lo, exec_lo, s27
	s_xor_b32 s25, s25, -1
	s_and_b32 s26, exec_lo, s26
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s26, s3
	s_and_not1_b32 s23, s23, exec_lo
	s_and_b32 s25, s25, exec_lo
	s_or_b32 s23, s23, s25
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_26
; %bb.35:                               ; %loop.exit.guard142
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s3, -1
	s_mov_b32 s24, 0
	s_and_saveexec_b32 s25, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s23, exec_lo, s25
; %bb.36:                               ; %.critedge42
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s24, exec_lo
	s_xor_b32 s3, exec_lo, -1
; %bb.37:                               ; %Flow191
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s24, s24, exec_lo
	s_or_not1_b32 s3, s3, exec_lo
.LBB1_38:                               ; %Flow190
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s24, exec_lo
	s_or_not1_b32 s3, s3, exec_lo
.LBB1_39:                               ; %Flow189
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, exec_lo
	s_or_not1_b32 s3, s3, exec_lo
.LBB1_40:                               ; %Flow188
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_and_saveexec_b32 s19, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s19
; %bb.41:                               ; %.critedge
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s18, exec_lo
; %bb.42:                               ; %Flow192
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s18, s18, exec_lo
	s_and_b32 s19, s2, exec_lo
.LBB1_43:                               ; %Flow187
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_and_not1_saveexec_b32 s20, s20
	s_cbranch_execz .LBB1_97
; %bb.44:                               ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s2, 0
.LBB1_45:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s2, 4
	s_add_i32 s2, s2, 1
	scratch_store_b8 off, v5, s3
	s_cmp_lg_u32 s2, 9
	s_cbranch_scc1 .LBB1_45
; %bb.46:                               ; %.preheader112.i.i.preheader
                                        ;   in Loop: Header=BB1_4 Depth=2
	v_dual_mov_b32 v10, v7 :: v_dual_mov_b32 v9, v6
	s_mov_b32 s22, 0
	s_mov_b32 s23, 0
                                        ; implicit-def: $sgpr21
.LBB1_47:                               ; %.preheader112.i.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_48 Depth 4
                                        ;         Child Loop BB1_50 Depth 4
	s_mov_b32 s2, 0
.LBB1_48:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_47 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s2, 4
	s_add_i32 s2, s2, 1
	scratch_store_b8 off, v5, s3
	s_cmp_lg_u32 s2, 9
	s_cbranch_scc1 .LBB1_48
; %bb.49:                               ; %_Z11resetBitmapPbi.exit84.preheader.i.i
                                        ;   in Loop: Header=BB1_47 Depth=3
	s_mov_b64 s[2:3], 0
	s_mov_b32 s26, 0
                                        ; implicit-def: $sgpr24
                                        ; implicit-def: $sgpr25
.LBB1_50:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_47 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_add_co_u32 v11, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v10, vcc_lo
	s_mov_b32 s29, exec_lo
                                        ; implicit-def: $sgpr27
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s28, 0, v11
	v_cmpx_ne_u32_e32 0, v11
	s_cbranch_execz .LBB1_52
; %bb.51:                               ; %_Z6seenItiPb.exit.i.i
                                        ;   in Loop: Header=BB1_50 Depth=4
	v_add_nc_u32_e32 v11, v15, v11
	s_delay_alu instid0(VALU_DEP_3)
	s_and_not1_b32 s28, s28, exec_lo
	s_mov_b32 s27, -1
	scratch_load_u8 v12, v11, off
	scratch_store_b8 v11, v17, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v12
	s_and_b32 s30, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s28, s28, s30
.LBB1_52:                               ; %Flow176
                                        ;   in Loop: Header=BB1_50 Depth=4
	s_or_b32 exec_lo, exec_lo, s29
	s_mov_b32 s30, -1
	s_mov_b32 s31, s27
	s_and_saveexec_b32 s29, s28
; %bb.53:                               ; %.critedge99.i.i
                                        ;   in Loop: Header=BB1_50 Depth=4
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 36
	s_cselect_b32 s28, -1, 0
	s_and_not1_b32 s31, s27, exec_lo
	s_or_not1_b32 s30, s28, exec_lo
; %bb.54:                               ; %Flow177
                                        ;   in Loop: Header=BB1_50 Depth=4
	s_or_b32 exec_lo, exec_lo, s29
	s_xor_b32 s28, s31, -1
	s_and_b32 s29, exec_lo, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s26, s29, s26
	s_and_not1_b32 s25, s25, exec_lo
	s_and_b32 s28, s28, exec_lo
	s_and_not1_b32 s24, s24, exec_lo
	s_and_b32 s27, s27, exec_lo
	s_or_b32 s25, s25, s28
	s_or_b32 s24, s24, s27
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB1_50
; %bb.55:                               ; %loop.exit.guard146
                                        ;   in Loop: Header=BB1_47 Depth=3
	s_or_b32 exec_lo, exec_lo, s26
	s_mov_b32 s2, -1
	s_and_saveexec_b32 s3, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
; %bb.56:                               ; %.critedge.i.i
                                        ;   in Loop: Header=BB1_47 Depth=3
	s_add_i32 s23, s23, 1
	v_add_co_u32 v9, vcc_lo, v9, 36
	s_cmp_eq_u32 s23, 9
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_and_not1_b32 s24, s24, exec_lo
	s_or_not1_b32 s2, s2, exec_lo
; %bb.57:                               ; %Flow179
                                        ;   in Loop: Header=BB1_47 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_xor_b32 s3, s24, -1
	s_and_b32 s2, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s22, s2, s22
	s_and_not1_b32 s2, s21, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s21, s2, s3
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB1_47
; %bb.58:                               ; %loop.exit.guard145
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_mov_b32 s2, -1
	s_mov_b32 s3, s19
	s_and_saveexec_b32 s22, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s21, exec_lo, s22
	s_cbranch_execz .LBB1_96
; %bb.59:                               ; %.preheader110.i.i.preheader
                                        ;   in Loop: Header=BB1_4 Depth=2
	v_dual_mov_b32 v10, v7 :: v_dual_mov_b32 v9, v6
	s_mov_b32 s23, 0
	s_mov_b32 s24, 0
                                        ; implicit-def: $sgpr22
.LBB1_60:                               ; %.preheader110.i.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_61 Depth 4
                                        ;         Child Loop BB1_63 Depth 4
	s_mov_b32 s2, 0
.LBB1_61:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_60 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s2, 4
	s_add_i32 s2, s2, 1
	scratch_store_b8 off, v5, s3
	s_cmp_lg_u32 s2, 9
	s_cbranch_scc1 .LBB1_61
; %bb.62:                               ; %_Z11resetBitmapPbi.exit87.preheader.i.i.preheader
                                        ;   in Loop: Header=BB1_60 Depth=3
	s_mov_b64 s[2:3], 0
	s_mov_b32 s27, 0
                                        ; implicit-def: $sgpr25
                                        ; implicit-def: $sgpr26
.LBB1_63:                               ; %_Z11resetBitmapPbi.exit87.preheader.i.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_60 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_add_co_u32 v11, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v10, vcc_lo
	s_mov_b32 s30, exec_lo
                                        ; implicit-def: $sgpr28
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s29, 0, v11
	v_cmpx_ne_u32_e32 0, v11
	s_cbranch_execz .LBB1_65
; %bb.64:                               ; %_Z6seenItiPb.exit91.i.i
                                        ;   in Loop: Header=BB1_63 Depth=4
	v_add_nc_u32_e32 v11, v15, v11
	s_delay_alu instid0(VALU_DEP_3)
	s_and_not1_b32 s29, s29, exec_lo
	s_mov_b32 s28, -1
	scratch_load_u8 v12, v11, off
	scratch_store_b8 v11, v17, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v12
	s_and_b32 s31, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s29, s29, s31
.LBB1_65:                               ; %Flow172
                                        ;   in Loop: Header=BB1_63 Depth=4
	s_or_b32 exec_lo, exec_lo, s30
	s_mov_b32 s31, -1
	s_mov_b32 s33, s28
	s_and_saveexec_b32 s30, s29
; %bb.66:                               ; %.critedge102.i.i
                                        ;   in Loop: Header=BB1_63 Depth=4
	s_add_u32 s2, s2, 36
	s_addc_u32 s3, s3, 0
	s_cmpk_eq_i32 s2, 0x144
	s_cselect_b32 s29, -1, 0
	s_and_not1_b32 s33, s28, exec_lo
	s_or_not1_b32 s31, s29, exec_lo
; %bb.67:                               ; %Flow173
                                        ;   in Loop: Header=BB1_63 Depth=4
	s_or_b32 exec_lo, exec_lo, s30
	s_xor_b32 s29, s33, -1
	s_and_b32 s30, exec_lo, s31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s27, s30, s27
	s_and_not1_b32 s26, s26, exec_lo
	s_and_b32 s29, s29, exec_lo
	s_and_not1_b32 s25, s25, exec_lo
	s_and_b32 s28, s28, exec_lo
	s_or_b32 s26, s26, s29
	s_or_b32 s25, s25, s28
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB1_63
; %bb.68:                               ; %loop.exit.guard149
                                        ;   in Loop: Header=BB1_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s27
	s_mov_b32 s2, -1
	s_and_saveexec_b32 s3, s26
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
; %bb.69:                               ; %.critedge73.i.i
                                        ;   in Loop: Header=BB1_60 Depth=3
	s_add_i32 s24, s24, 1
	v_add_co_u32 v9, vcc_lo, v9, 4
	s_cmp_eq_u32 s24, 9
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_and_not1_b32 s25, s25, exec_lo
	s_or_not1_b32 s2, s2, exec_lo
; %bb.70:                               ; %Flow175
                                        ;   in Loop: Header=BB1_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_xor_b32 s3, s25, -1
	s_and_b32 s2, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s23, s2, s23
	s_and_not1_b32 s2, s22, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s22, s2, s3
	s_and_not1_b32 exec_lo, exec_lo, s23
	s_cbranch_execnz .LBB1_60
; %bb.71:                               ; %loop.exit.guard147
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	s_mov_b32 s2, -1
	s_mov_b32 s3, s19
	s_and_saveexec_b32 s23, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s22, exec_lo, s23
	s_cbranch_execz .LBB1_95
; %bb.72:                               ; %.preheader107.i.i.preheader
                                        ;   in Loop: Header=BB1_4 Depth=2
	v_dual_mov_b32 v10, v7 :: v_dual_mov_b32 v9, v6
	s_mov_b32 s24, 0
	s_mov_b32 s25, 0
                                        ; implicit-def: $sgpr23
.LBB1_73:                               ; %.preheader107.i.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_74 Depth 4
                                        ;           Child Loop BB1_75 Depth 5
                                        ;           Child Loop BB1_77 Depth 5
                                        ;             Child Loop BB1_78 Depth 6
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v12, v10 :: v_dual_mov_b32 v11, v9
	s_mov_b32 s28, 0
	s_mov_b32 s29, 0
                                        ; implicit-def: $sgpr27
                                        ; implicit-def: $sgpr26
                                        ; implicit-def: $sgpr30
.LBB1_74:                               ; %.preheader106.i.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_73 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB1_75 Depth 5
                                        ;           Child Loop BB1_77 Depth 5
                                        ;             Child Loop BB1_78 Depth 6
	s_mov_b32 s2, 0
.LBB1_75:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_73 Depth=3
                                        ;         Parent Loop BB1_74 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s2, 4
	s_add_i32 s2, s2, 1
	scratch_store_b8 off, v5, s3
	s_cmp_lg_u32 s2, 9
	s_cbranch_scc1 .LBB1_75
; %bb.76:                               ; %_Z11resetBitmapPbi.exit94.preheader.i.i
                                        ;   in Loop: Header=BB1_74 Depth=4
	v_dual_mov_b32 v14, v12 :: v_dual_mov_b32 v13, v11
	s_mov_b32 s34, 0
	s_mov_b32 s35, 0
                                        ; implicit-def: $sgpr33
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr36
.LBB1_77:                               ; %.preheader.i.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_73 Depth=3
                                        ;         Parent Loop BB1_74 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB1_78 Depth 6
	s_mov_b64 s[2:3], 0
	s_mov_b32 s39, 0
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
.LBB1_78:                               ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_73 Depth=3
                                        ;         Parent Loop BB1_74 Depth=4
                                        ;           Parent Loop BB1_77 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_co_u32 v22, vcc_lo, v13, s2
	v_add_co_ci_u32_e32 v23, vcc_lo, s3, v14, vcc_lo
	s_mov_b32 s42, exec_lo
                                        ; implicit-def: $sgpr40
	global_load_b32 v22, v[22:23], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s41, 0, v22
	v_cmpx_ne_u32_e32 0, v22
	s_cbranch_execz .LBB1_80
; %bb.79:                               ; %_Z6seenItiPb.exit98.i.i
                                        ;   in Loop: Header=BB1_78 Depth=6
	v_add_nc_u32_e32 v22, v15, v22
	s_delay_alu instid0(VALU_DEP_3)
	s_and_not1_b32 s41, s41, exec_lo
	s_mov_b32 s40, -1
	scratch_load_u8 v23, v22, off
	scratch_store_b8 v22, v17, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v23
	s_and_b32 s43, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s41, s41, s43
.LBB1_80:                               ; %Flow164
                                        ;   in Loop: Header=BB1_78 Depth=6
	s_or_b32 exec_lo, exec_lo, s42
	s_mov_b32 s43, -1
	s_mov_b32 s44, s40
	s_and_saveexec_b32 s42, s41
; %bb.81:                               ; %.critedge105.i.i
                                        ;   in Loop: Header=BB1_78 Depth=6
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 12
	s_cselect_b32 s41, -1, 0
	s_and_not1_b32 s44, s40, exec_lo
	s_or_not1_b32 s43, s41, exec_lo
; %bb.82:                               ; %Flow165
                                        ;   in Loop: Header=BB1_78 Depth=6
	s_or_b32 exec_lo, exec_lo, s42
	s_xor_b32 s41, s44, -1
	s_and_b32 s42, exec_lo, s43
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s39, s42, s39
	s_and_not1_b32 s38, s38, exec_lo
	s_and_b32 s41, s41, exec_lo
	s_and_not1_b32 s37, s37, exec_lo
	s_and_b32 s40, s40, exec_lo
	s_or_b32 s38, s38, s41
	s_or_b32 s37, s37, s40
	s_and_not1_b32 exec_lo, exec_lo, s39
	s_cbranch_execnz .LBB1_78
; %bb.83:                               ; %loop.exit.guard154
                                        ;   in Loop: Header=BB1_77 Depth=5
	s_or_b32 exec_lo, exec_lo, s39
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s3, s36, exec_lo
	s_and_b32 s36, s37, exec_lo
	s_mov_b32 s2, -1
	s_or_b32 s36, s3, s36
	s_and_saveexec_b32 s3, s38
	s_xor_b32 s3, exec_lo, s3
; %bb.84:                               ; %.critedge77.i.i
                                        ;   in Loop: Header=BB1_77 Depth=5
	s_add_i32 s35, s35, 1
	v_add_co_u32 v13, vcc_lo, v13, 36
	s_cmp_eq_u32 s35, 3
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_and_not1_b32 s37, s37, exec_lo
	s_and_not1_b32 s36, s36, exec_lo
	s_or_not1_b32 s2, s2, exec_lo
; %bb.85:                               ; %Flow167
                                        ;   in Loop: Header=BB1_77 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_xor_b32 s3, s37, -1
	s_and_b32 s2, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s34, s2, s34
	s_and_not1_b32 s2, s31, exec_lo
	s_and_b32 s31, s36, exec_lo
	s_and_not1_b32 s33, s33, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s31, s2, s31
	s_or_b32 s33, s33, s3
	s_and_not1_b32 exec_lo, exec_lo, s34
	s_cbranch_execnz .LBB1_77
; %bb.86:                               ; %loop.exit.guard153
                                        ;   in Loop: Header=BB1_74 Depth=4
	s_or_b32 exec_lo, exec_lo, s34
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s3, s30, exec_lo
	s_and_b32 s30, s31, exec_lo
	s_mov_b32 s2, -1
	s_or_b32 s30, s3, s30
	s_and_saveexec_b32 s3, s33
	s_xor_b32 s3, exec_lo, s3
; %bb.87:                               ; %.critedge79.i.i
                                        ;   in Loop: Header=BB1_74 Depth=4
	s_add_i32 s29, s29, 1
	v_add_co_u32 v11, vcc_lo, v11, 12
	s_cmp_eq_u32 s29, 3
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_and_not1_b32 s31, s31, exec_lo
	s_and_not1_b32 s30, s30, exec_lo
	s_or_not1_b32 s2, s2, exec_lo
; %bb.88:                               ; %Flow169
                                        ;   in Loop: Header=BB1_74 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	s_xor_b32 s3, s31, -1
	s_and_b32 s2, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s28, s2, s28
	s_and_not1_b32 s2, s26, exec_lo
	s_and_b32 s26, s30, exec_lo
	s_and_not1_b32 s27, s27, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s26, s2, s26
	s_or_b32 s27, s27, s3
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB1_74
; %bb.89:                               ; %loop.exit.guard152
                                        ;   in Loop: Header=BB1_73 Depth=3
	s_or_b32 exec_lo, exec_lo, s28
	s_mov_b32 s2, -1
	s_and_saveexec_b32 s3, s27
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
; %bb.90:                               ; %.critedge81.i.i
                                        ;   in Loop: Header=BB1_73 Depth=3
	s_add_i32 s25, s25, 1
	v_add_co_u32 v9, vcc_lo, 0x6c, v9
	s_cmp_eq_u32 s25, 3
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_and_not1_b32 s26, s26, exec_lo
	s_or_not1_b32 s2, s2, exec_lo
; %bb.91:                               ; %Flow171
                                        ;   in Loop: Header=BB1_73 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_xor_b32 s3, s26, -1
	s_and_b32 s2, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s24, s2, s24
	s_and_not1_b32 s2, s23, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s23, s2, s3
	s_and_not1_b32 exec_lo, exec_lo, s24
	s_cbranch_execnz .LBB1_73
; %bb.92:                               ; %loop.exit.guard150
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
	s_mov_b32 s2, -1
	s_mov_b32 s3, s19
	s_and_saveexec_b32 s24, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s23, exec_lo, s24
; %bb.93:                               ; %_Z5validPKi.exit.i
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_xor_b32 s2, exec_lo, -1
	s_or_b32 s3, s19, exec_lo
; %bb.94:                               ; %Flow196
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s23, s19, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_not1_b32 s2, s2, exec_lo
	s_or_b32 s3, s23, s3
.LBB1_95:                               ; %Flow195
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s22, s19, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_not1_b32 s2, s2, exec_lo
	s_or_b32 s3, s22, s3
.LBB1_96:                               ; %Flow194
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s19, s19, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_and_b32 s21, s2, exec_lo
	s_or_b32 s19, s19, s3
.LBB1_97:                               ; %Flow193
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s20
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s2, s19
; %bb.98:                               ;   in Loop: Header=BB1_4 Depth=2
	v_add_nc_u32_e32 v9, 1, v8
; %bb.99:                               ; %Flow197
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s21
; %bb.100:                              ; %.critedge43
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 s18, s18, exec_lo
                                        ; implicit-def: $vgpr9
; %bb.101:                              ; %Flow198
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB1_105
; %bb.102:                              ;   in Loop: Header=BB1_4 Depth=2
	v_ashrrev_i32_e32 v10, 31, v4
	v_mov_b32_e32 v9, v4
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, v18, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v19, v10, vcc_lo
	global_load_b32 v4, v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 8, v4
	s_cbranch_execz .LBB1_104
; %bb.103:                              ;   in Loop: Header=BB1_4 Depth=2
	v_add_nc_u32_e32 v8, -1, v8
	global_store_b32 v[9:10], v5, off
.LBB1_104:                              ; %Flow156
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v9, v8
.LBB1_105:                              ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v9, v2
	s_or_b32 s17, vcc_lo, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB1_4
; %bb.106:                              ; %Flow200
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
.LBB1_107:                              ; %Flow201
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
	s_mov_b32 s16, exec_lo
	v_cmpx_eq_u32_e64 v9, v2
	s_cbranch_execz .LBB1_110
; %bb.108:                              ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b64 s[2:3], 0
	global_store_b32 v5, v17, s[8:9]
.LBB1_109:                              ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v8, vcc_lo, v6, s2
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v7, vcc_lo
	s_add_u32 s18, s10, s2
	s_addc_u32 s19, s11, s3
	s_add_u32 s2, s2, 4
	global_load_b32 v2, v[8:9], off
	s_addc_u32 s3, s3, 0
	s_cmpk_lg_i32 s2, 0x144
	s_waitcnt vmcnt(0)
	global_store_b32 v5, v2, s[18:19]
	s_cbranch_scc1 .LBB1_109
.LBB1_110:                              ; %Flow155
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	global_load_b32 v2, v5, s[8:9]
	v_add_nc_u32_e32 v1, s14, v1
	v_add_nc_u32_e32 v3, s15, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s12, v1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v2
	s_cmp_lg_u32 s2, 0
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, vcc_lo
	s_and_b32 s2, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s13, s2, s13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_2
.LBB1_111:                              ; %._crit_edge55
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12findSolutionPiiS_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 22
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 45
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12findSolutionPiiS_S_S_S_, .Lfunc_end1-_Z12findSolutionPiiS_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3556
; NumSgprs: 47
; NumVgprs: 24
; ScratchSize: 22
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 47
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14genChildBoardsPiS_iS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     33
    .sgpr_spill_count: 0
    .symbol:         _Z14genChildBoardsPiS_iS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     29
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12findSolutionPiiS_S_S_S_
    .private_segment_fixed_size: 22
    .sgpr_count:     47
    .sgpr_spill_count: 0
    .symbol:         _Z12findSolutionPiiS_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
