#include "includes.h"
__global__ void kernel2DXYp ( double* dataOutput, double* dataInput, double* boundaryTop, double* boundaryBottom, const double* weights, const int numSten, const int numStenHoriz, const int numStenLeft, const int numStenRight, const int numStenVert, const int numStenTop, const int numStenBottom, const int nxLocal, const int nyLocal, const int BLOCK_X, const int BLOCK_Y, const int nx, const int nyTile )
{
// -----------------------------
// Allocate the shared memory
// -----------------------------

extern __shared__ int memory[];

double* arrayLocal = (double*)&memory;
double* weigthsLocal = (double*)&arrayLocal[nxLocal * nyLocal];

// Move the weigths into shared memory
#pragma unroll
for (int k = 0; k < numSten; k++)
{
weigthsLocal[k] = weights[k];
}

// -----------------------------
// Set the indexing
// -----------------------------

// True matrix index
int globalIdx = blockDim.x * blockIdx.x + threadIdx.x;
int globalIdy = blockDim.y * blockIdx.y + threadIdx.y;

// Local matrix index
int localIdx = threadIdx.x + numStenLeft;
int localIdy = threadIdx.y + numStenTop;

// Local sum variable
double sum = 0.0;

// Set index for summing stencil
int stenSet;

// Set temporary index for looping
int temp;

// Use to loop over indexing in the weighsLocal
int weight = 0;

// -----------------------------
// Set interior
// -----------------------------

arrayLocal[localIdy * nxLocal + localIdx] = dataInput[globalIdy * nx + globalIdx];

// -----------------------------
// Set x boundaries
// -----------------------------

// If block is in the interior
if (blockIdx.x != 0 && blockIdx.x != nx / BLOCK_X - 1)
{
if (threadIdx.x < numStenLeft)
{
arrayLocal[localIdy * nxLocal + threadIdx.x] = dataInput[globalIdy * nx + (globalIdx - numStenLeft)];
}

if (threadIdx.x < numStenRight)
{
arrayLocal[localIdy * nxLocal + (localIdx + BLOCK_X)] = dataInput[globalIdy * nx + globalIdx + BLOCK_X];
}
}

// If block is on the left boundary
if (blockIdx.x == 0)
{
if (threadIdx.x < numStenLeft)
{
arrayLocal[localIdy * nxLocal + threadIdx.x] = dataInput[globalIdy * nx + (nx - numStenLeft + threadIdx.x)];
}

if (threadIdx.x < numStenRight)
{
arrayLocal[localIdy * nxLocal + (localIdx + BLOCK_X)] = dataInput[globalIdy * nx + globalIdx + BLOCK_X];
}
}

// Set the right boundary blocks
if (blockIdx.x == nx / BLOCK_X - 1)
{
if (threadIdx.x < numStenLeft)
{
arrayLocal[localIdy * nxLocal + threadIdx.x] = dataInput[globalIdy * nx + (globalIdx - numStenLeft)];
}

if (threadIdx.x < numStenRight)
{
arrayLocal[localIdy * nxLocal + (localIdx + BLOCK_X)] = dataInput[globalIdy * nx + threadIdx.x];
}
}

// -----------------------------
// Set y boundaries
// -----------------------------

// Set interior y boundary
if (blockIdx.y != 0 && blockIdx.y != nyTile / BLOCK_Y - 1)
{
if (threadIdx.y < numStenTop )
{
arrayLocal[threadIdx.y * nxLocal + localIdx] = dataInput[(globalIdy - numStenTop) * nx + globalIdx];
}

if (threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + localIdx] = dataInput[(globalIdy + BLOCK_Y) * nx + globalIdx];
}
}

// Set top y boundary
if (blockIdx.y == 0)
{
if (threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + localIdx] = boundaryTop[threadIdx.y * nx + globalIdx];
}

if (threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + localIdx] = dataInput[(globalIdy + BLOCK_Y) * nx + globalIdx];
}
}

// Set bottom y boundary
if (blockIdx.y == nyTile / BLOCK_Y - 1)
{
if (threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + localIdx] = dataInput[(globalIdy - numStenTop) * nx + globalIdx];
}

if (threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + localIdx] = boundaryBottom[threadIdx.y * nx + globalIdx];
}
}

// -----------------------------
// Corners - Interior of tile
// -----------------------------

// Set interior y boundary
if (blockIdx.y != 0 && blockIdx.y != nyTile / BLOCK_Y - 1)
{
// If block is in the interior
if (blockIdx.x != 0 && blockIdx.x != nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the left boundary
if (blockIdx.x == 0)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (nx - numStenLeft + threadIdx.x)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (nx - numStenLeft + threadIdx.x)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the right boundary
if (blockIdx.x == nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + threadIdx.x];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + threadIdx.x];
}
}
}

// -----------------------------
// Corners - Top of tile
// -----------------------------

// Set top y boundary
if (blockIdx.y == 0)
{
// If block is in the interior
if (blockIdx.x != 0 && blockIdx.x != nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = boundaryTop[threadIdx.y * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = boundaryTop[threadIdx.y * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the left boundary
if (blockIdx.x == 0)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = boundaryTop[threadIdx.y * nx + (nx - numStenLeft + threadIdx.x)];

}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = boundaryTop[threadIdx.y * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (nx - numStenLeft + threadIdx.x)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the right boundary
if (blockIdx.x == nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = boundaryTop[threadIdx.y * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = boundaryTop[threadIdx.y * nx + threadIdx.x];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + threadIdx.x];
}
}
}

// -----------------------------
// Corners - Bottom of tile
// -----------------------------

// Set bottom y boundary
if (blockIdx.y == nyTile / BLOCK_Y - 1)
{
// If block is in the interior
if (blockIdx.x != 0 && blockIdx.x != nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = boundaryBottom[threadIdx.y * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] =  boundaryBottom[threadIdx.y * nx + (globalIdx + BLOCK_X)];

}
}

// If block is on the left boundary
if (blockIdx.x == 0)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (nx - numStenLeft + threadIdx.x)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = boundaryBottom[threadIdx.y * nx + (nx - numStenLeft + threadIdx.x)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] =  boundaryBottom[threadIdx.y * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the right boundary
if (blockIdx.x == nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + threadIdx.x];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = boundaryBottom[threadIdx.y * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] =  boundaryBottom[threadIdx.y * nx + threadIdx.x];
}
}
}

// -----------------------------
// Compute the stencil
// -----------------------------

__syncthreads();

stenSet = (localIdy - numStenTop) * nxLocal + (localIdx - numStenLeft);
weight = 0;

for (int j = 0; j < numStenVert; j++) // Allow for the point we're actually at
{
temp = j * nxLocal;

for (int i = 0; i < numStenHoriz; i++) // Allow for the point we're actually at
{
sum += weigthsLocal[weight] * arrayLocal[stenSet + temp + i];

weight++;
}
}

__syncthreads();

// -----------------------------
// Copy back to global
// -----------------------------

dataOutput[globalIdy * nx + globalIdx] = sum;

}
	.file	"tmpxft_002d0284_00000000-6_kernel2DXYp.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z53__device_stub__Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiiiPdS_S_S_PKdiiiiiiiiiiiii
	.type	_Z53__device_stub__Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiiiPdS_S_S_PKdiiiiiiiiiiiii, @function
_Z53__device_stub__Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiiiPdS_S_S_PKdiiiiiiiiiiiii:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$280, %rsp
	.cfi_def_cfa_offset 288
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 264(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	288(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	296(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	304(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	312(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	320(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	328(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	336(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	376(%rsp), %rax
	movq	%rax, 256(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 296
	leaq	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 304
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 296
	popq	%rdx
	.cfi_def_cfa_offset 288
.L2:
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$280, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z53__device_stub__Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiiiPdS_S_S_PKdiiiiiiiiiiiii, .-_Z53__device_stub__Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiiiPdS_S_S_PKdiiiiiiiiiiiii
	.globl	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.type	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii, @function
_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiiiPdS_S_S_PKdiiiiiiiiiiiii
	.cfi_endproc
.LFE2033:
	.size	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii, .-_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernel2DXYp ( double* dataOutput, double* dataInput, double* boundaryTop, double* boundaryBottom, const double* weights, const int numSten, const int numStenHoriz, const int numStenLeft, const int numStenRight, const int numStenVert, const int numStenTop, const int numStenBottom, const int nxLocal, const int nyLocal, const int BLOCK_X, const int BLOCK_Y, const int nx, const int nyTile )
{
// -----------------------------
// Allocate the shared memory
// -----------------------------

extern __shared__ int memory[];

double* arrayLocal = (double*)&memory;
double* weigthsLocal = (double*)&arrayLocal[nxLocal * nyLocal];

// Move the weigths into shared memory
#pragma unroll
for (int k = 0; k < numSten; k++)
{
weigthsLocal[k] = weights[k];
}

// -----------------------------
// Set the indexing
// -----------------------------

// True matrix index
int globalIdx = blockDim.x * blockIdx.x + threadIdx.x;
int globalIdy = blockDim.y * blockIdx.y + threadIdx.y;

// Local matrix index
int localIdx = threadIdx.x + numStenLeft;
int localIdy = threadIdx.y + numStenTop;

// Local sum variable
double sum = 0.0;

// Set index for summing stencil
int stenSet;

// Set temporary index for looping
int temp;

// Use to loop over indexing in the weighsLocal
int weight = 0;

// -----------------------------
// Set interior
// -----------------------------

arrayLocal[localIdy * nxLocal + localIdx] = dataInput[globalIdy * nx + globalIdx];

// -----------------------------
// Set x boundaries
// -----------------------------

// If block is in the interior
if (blockIdx.x != 0 && blockIdx.x != nx / BLOCK_X - 1)
{
if (threadIdx.x < numStenLeft)
{
arrayLocal[localIdy * nxLocal + threadIdx.x] = dataInput[globalIdy * nx + (globalIdx - numStenLeft)];
}

if (threadIdx.x < numStenRight)
{
arrayLocal[localIdy * nxLocal + (localIdx + BLOCK_X)] = dataInput[globalIdy * nx + globalIdx + BLOCK_X];
}
}

// If block is on the left boundary
if (blockIdx.x == 0)
{
if (threadIdx.x < numStenLeft)
{
arrayLocal[localIdy * nxLocal + threadIdx.x] = dataInput[globalIdy * nx + (nx - numStenLeft + threadIdx.x)];
}

if (threadIdx.x < numStenRight)
{
arrayLocal[localIdy * nxLocal + (localIdx + BLOCK_X)] = dataInput[globalIdy * nx + globalIdx + BLOCK_X];
}
}

// Set the right boundary blocks
if (blockIdx.x == nx / BLOCK_X - 1)
{
if (threadIdx.x < numStenLeft)
{
arrayLocal[localIdy * nxLocal + threadIdx.x] = dataInput[globalIdy * nx + (globalIdx - numStenLeft)];
}

if (threadIdx.x < numStenRight)
{
arrayLocal[localIdy * nxLocal + (localIdx + BLOCK_X)] = dataInput[globalIdy * nx + threadIdx.x];
}
}

// -----------------------------
// Set y boundaries
// -----------------------------

// Set interior y boundary
if (blockIdx.y != 0 && blockIdx.y != nyTile / BLOCK_Y - 1)
{
if (threadIdx.y < numStenTop )
{
arrayLocal[threadIdx.y * nxLocal + localIdx] = dataInput[(globalIdy - numStenTop) * nx + globalIdx];
}

if (threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + localIdx] = dataInput[(globalIdy + BLOCK_Y) * nx + globalIdx];
}
}

// Set top y boundary
if (blockIdx.y == 0)
{
if (threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + localIdx] = boundaryTop[threadIdx.y * nx + globalIdx];
}

if (threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + localIdx] = dataInput[(globalIdy + BLOCK_Y) * nx + globalIdx];
}
}

// Set bottom y boundary
if (blockIdx.y == nyTile / BLOCK_Y - 1)
{
if (threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + localIdx] = dataInput[(globalIdy - numStenTop) * nx + globalIdx];
}

if (threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + localIdx] = boundaryBottom[threadIdx.y * nx + globalIdx];
}
}

// -----------------------------
// Corners - Interior of tile
// -----------------------------

// Set interior y boundary
if (blockIdx.y != 0 && blockIdx.y != nyTile / BLOCK_Y - 1)
{
// If block is in the interior
if (blockIdx.x != 0 && blockIdx.x != nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the left boundary
if (blockIdx.x == 0)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (nx - numStenLeft + threadIdx.x)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (nx - numStenLeft + threadIdx.x)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the right boundary
if (blockIdx.x == nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + threadIdx.x];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + threadIdx.x];
}
}
}

// -----------------------------
// Corners - Top of tile
// -----------------------------

// Set top y boundary
if (blockIdx.y == 0)
{
// If block is in the interior
if (blockIdx.x != 0 && blockIdx.x != nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = boundaryTop[threadIdx.y * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = boundaryTop[threadIdx.y * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the left boundary
if (blockIdx.x == 0)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = boundaryTop[threadIdx.y * nx + (nx - numStenLeft + threadIdx.x)];

}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = boundaryTop[threadIdx.y * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (nx - numStenLeft + threadIdx.x)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the right boundary
if (blockIdx.x == nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = boundaryTop[threadIdx.y * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = boundaryTop[threadIdx.y * nx + threadIdx.x];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = dataInput[(globalIdy + BLOCK_Y) * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy + BLOCK_Y) * nx + threadIdx.x];
}
}
}

// -----------------------------
// Corners - Bottom of tile
// -----------------------------

// Set bottom y boundary
if (blockIdx.y == nyTile / BLOCK_Y - 1)
{
// If block is in the interior
if (blockIdx.x != 0 && blockIdx.x != nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = boundaryBottom[threadIdx.y * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] =  boundaryBottom[threadIdx.y * nx + (globalIdx + BLOCK_X)];

}
}

// If block is on the left boundary
if (blockIdx.x == 0)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (nx - numStenLeft + threadIdx.x)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx + BLOCK_X)];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = boundaryBottom[threadIdx.y * nx + (nx - numStenLeft + threadIdx.x)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] =  boundaryBottom[threadIdx.y * nx + (globalIdx + BLOCK_X)];
}
}

// If block is on the right boundary
if (blockIdx.x == nx / BLOCK_X - 1)
{
// Top Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + threadIdx.x] = dataInput[(globalIdy - numStenTop) * nx + (globalIdx - numStenLeft)];
}

// Top Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenTop)
{
arrayLocal[threadIdx.y * nxLocal + (localIdx + BLOCK_X)] = dataInput[(globalIdy - numStenTop) * nx + threadIdx.x];
}

// Bottom Left
if (threadIdx.x < numStenLeft && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + threadIdx.x] = boundaryBottom[threadIdx.y * nx + (globalIdx - numStenLeft)];
}

// Bottom Right
if (threadIdx.x < numStenRight && threadIdx.y < numStenBottom)
{
arrayLocal[(localIdy + BLOCK_Y) * nxLocal + (localIdx + BLOCK_X)] =  boundaryBottom[threadIdx.y * nx + threadIdx.x];
}
}
}

// -----------------------------
// Compute the stencil
// -----------------------------

__syncthreads();

stenSet = (localIdy - numStenTop) * nxLocal + (localIdx - numStenLeft);
weight = 0;

for (int j = 0; j < numStenVert; j++) // Allow for the point we're actually at
{
temp = j * nxLocal;

for (int i = 0; i < numStenHoriz; i++) // Allow for the point we're actually at
{
sum += weigthsLocal[weight] * arrayLocal[stenSet + temp + i];

weight++;
}
}

__syncthreads();

// -----------------------------
// Copy back to global
// -----------------------------

dataOutput[globalIdy * nx + globalIdx] = sum;

}
	.text
	.file	"kernel2DXYp.hip"
	.globl	_Z26__device_stub__kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii # -- Begin function _Z26__device_stub__kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.type	_Z26__device_stub__kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii,@function
_Z26__device_stub__kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii: # @_Z26__device_stub__kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 136(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii, .Lfunc_end0-_Z26__device_stub__kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii,@object # @_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.p2align	3, 0x0
_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii:
	.quad	_Z26__device_stub__kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.size	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii"
	.size	.L__unnamed_1, 40

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii ; -- Begin function _Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.globl	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
	.p2align	8
	.type	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii,@function
_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii: ; @_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
; %bb.0:
	s_clause 0x4
	s_load_b256 s[16:23], s[0:1], 0x28
	s_load_b128 s[24:27], s[0:1], 0x48
	s_load_b32 s13, s[0:1], 0x58
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s24, s23
	s_mov_b32 s24, 0
	s_lshl_b32 s12, s12, 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s12, s12, 0
	s_cmp_lt_i32 s16, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_mov_b32 s28, s12
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b64 s[30:31], s[2:3], 0x0
	v_mov_b32_e32 v3, s28
	s_add_i32 s16, s16, -1
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_add_i32 s28, s28, 8
	s_cmp_eq_u32 s16, 0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s30 :: v_dual_mov_b32 v2, s31
	ds_store_b64 v3, v[1:2]
	s_cbranch_scc0 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_load_b32 s0, s[0:1], 0x6c
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v9, s18, v2
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s1, s0, 16
	s_and_b32 s0, s0, 0xffff
	v_mad_u64_u32 v[6:7], null, s15, s1, v[3:4]
	v_mad_u64_u32 v[4:5], null, s14, s0, v[2:3]
	v_add_nc_u32_e32 v5, s21, v3
	s_cmp_eq_u32 s14, 0
	s_mov_b32 s0, -1
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v6, s27
	v_mul_lo_u32 v11, v5, s23
	s_cmp_lg_u32 s14, 0
	v_add_nc_u32_e32 v0, v10, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v12, v11, 3, 0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v11, v9, 3, v12
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[13:14], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v11, v[13:14]
	s_cbranch_scc0 .LBB0_8
; %bb.4:
	s_ashr_i32 s0, s25, 31
	s_ashr_i32 s24, s27, 31
	s_add_i32 s1, s25, s0
	s_add_i32 s28, s27, s24
	s_xor_b32 s1, s1, s0
	s_xor_b32 s28, s28, s24
	v_cvt_f32_u32_e32 v13, s1
	s_sub_i32 s16, 0, s1
	s_xor_b32 s0, s24, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v13, v13
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v13, 0x4f7ffffe, v13
	v_cvt_u32_f32_e32 v13, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s3, v13
	s_mul_i32 s16, s16, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s16, s3, s16
	s_add_i32 s3, s3, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s3, s28, s3
	s_mul_i32 s16, s3, s1
	s_add_i32 s24, s3, 1
	s_sub_i32 s16, s28, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s28, s16, s1
	s_cmp_ge_u32 s16, s1
	s_cselect_b32 s3, s24, s3
	s_cselect_b32 s16, s28, s16
	s_add_i32 s24, s3, 1
	s_cmp_ge_u32 s16, s1
	s_cselect_b32 s1, s24, s3
	s_mov_b32 s24, 0
	s_xor_b32 s1, s1, s0
	s_not_b32 s0, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s1, s0, s1
	s_mov_b32 s0, 0
	s_cmp_lg_u32 s14, s1
	s_cbranch_scc0 .LBB0_8
; %bb.5:
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s18, v2
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_subrev_nc_u32_e32 v13, s18, v4
	v_lshl_add_u32 v15, v2, 3, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v13, v13, v10
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	v_add_co_u32 v13, vcc_lo, s6, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
	global_load_b64 v[13:14], v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v15, v[13:14]
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e64 s24, s19, v2
.LBB0_8:                                ; %Flow784
	s_and_b32 vcc_lo, exec_lo, s0
	v_cmp_gt_u32_e64 s0, s18, v2
	s_cbranch_vccz .LBB0_12
; %bb.9:                                ; %.critedge
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_subrev_nc_u32_e32 v13, s18, v2
	v_mov_b32_e32 v14, 0
	v_lshl_add_u32 v15, v2, 3, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v13, v13, s27, v10
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, s6, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
	global_load_b64 v[13:14], v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v15, v[13:14]
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e64 s24, s19, v2
.LBB0_12:                               ; %Flow786
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s0, s24
	s_cbranch_execz .LBB0_14
; %bb.13:                               ; %.sink.split
	s_ashr_i32 s29, s25, 31
	s_mov_b32 s28, s25
	v_lshl_add_u32 v13, s25, 3, v11
	s_lshl_b64 s[28:29], s[28:29], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v7, vcc_lo, v7, s28
	v_add_co_ci_u32_e32 v8, vcc_lo, s29, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v13, v[7:8]
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s0
	s_ashr_i32 s0, s25, 31
	s_ashr_i32 s24, s27, 31
	s_add_i32 s1, s25, s0
	s_add_i32 s28, s27, s24
	s_xor_b32 s1, s1, s0
	s_xor_b32 s28, s28, s24
	v_cvt_f32_u32_e32 v7, s1
	s_sub_i32 s16, 0, s1
	s_xor_b32 s0, s24, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x4f7ffffe, v7
	v_cvt_u32_f32_e32 v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s3, v7
	s_mul_i32 s16, s16, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s16, s3, s16
	s_add_i32 s3, s3, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s3, s28, s3
	s_mul_i32 s16, s3, s1
	s_add_i32 s24, s3, 1
	s_sub_i32 s16, s28, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s28, s16, s1
	s_cmp_ge_u32 s16, s1
	s_cselect_b32 s3, s24, s3
	s_cselect_b32 s16, s28, s16
	s_add_i32 s24, s3, 1
	s_cmp_ge_u32 s16, s1
	s_cselect_b32 s1, s24, s3
	s_not_b32 s3, s0
	s_xor_b32 s0, s1, s0
	s_mov_b32 s1, 0
	s_add_i32 s0, s3, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s14, s0
	s_cselect_b32 s3, -1, 0
	s_cmp_lg_u32 s14, s0
	s_cbranch_scc1 .LBB0_20
; %bb.15:
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e64 s18, v2
	s_cbranch_execz .LBB0_17
; %bb.16:
	v_subrev_nc_u32_e32 v7, s18, v4
	v_lshl_add_u32 v12, v2, 3, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, v7, v10
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v12, v[7:8]
.LBB0_17:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e64 s19, v2
	s_cbranch_execz .LBB0_19
; %bb.18:
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, v10, v2
	v_lshl_add_u32 v10, s25, 3, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_19:                               ; %Flow782
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_20:
	s_cmp_eq_u32 s15, 0
	s_mov_b32 s0, -1
	s_cselect_b32 s14, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_25
; %bb.21:
	s_ashr_i32 s0, s26, 31
	s_ashr_i32 s28, s13, 31
	s_add_i32 s1, s26, s0
	s_add_i32 s29, s13, s28
	s_xor_b32 s1, s1, s0
	s_xor_b32 s29, s29, s28
	v_cvt_f32_u32_e32 v7, s1
	s_sub_i32 s24, 0, s1
	s_xor_b32 s0, s28, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x4f7ffffe, v7
	v_cvt_u32_f32_e32 v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s16, v7
	s_mul_i32 s24, s24, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s24, s16, s24
	s_add_i32 s16, s16, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s16, s29, s16
	s_mul_i32 s24, s16, s1
	s_add_i32 s28, s16, 1
	s_sub_i32 s24, s29, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s29, s24, s1
	s_cmp_ge_u32 s24, s1
	s_cselect_b32 s16, s28, s16
	s_cselect_b32 s24, s29, s24
	s_add_i32 s28, s16, 1
	s_cmp_ge_u32 s24, s1
	s_cselect_b32 s1, s28, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s1, s0
	s_not_b32 s0, s0
	s_add_i32 s1, s0, s1
	s_mov_b32 s0, 0
	s_cmp_lg_u32 s15, s1
	s_mov_b32 s1, 0
	s_cbranch_scc0 .LBB0_25
; %bb.22:
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s21, v3
	s_cbranch_execz .LBB0_24
; %bb.23:
	v_subrev_nc_u32_e32 v10, s21, v6
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[7:8], null, v10, s27, v[4:5]
	v_mul_lo_u32 v10, v3, s23
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 3, v10
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v10, 0, v10, v11
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_24:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e64 s1, s22, v3
.LBB0_25:                               ; %Flow779
	s_and_b32 vcc_lo, exec_lo, s0
	v_cmp_gt_u32_e64 s0, s21, v3
	s_cbranch_vccz .LBB0_29
; %bb.26:                               ; %.critedge618
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_28
; %bb.27:
	v_mad_u64_u32 v[7:8], null, v3, s27, v[4:5]
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v9
	v_mul_lo_u32 v10, v3, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_lshlrev_b32_e32 v10, 3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v10, 0, v10, v11
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_28:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e64 s1, s22, v3
.LBB0_29:                               ; %Flow781
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_31
; %bb.30:                               ; %.sink.split678
	v_add_nc_u32_e32 v10, s26, v6
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v10, s27, v[4:5]
	v_add_nc_u32_e32 v10, s26, v5
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 3, v10
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	v_add3_u32 v10, 0, v10, v11
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_31:
	s_or_b32 exec_lo, exec_lo, s0
	s_ashr_i32 s0, s26, 31
	s_ashr_i32 s28, s13, 31
	s_add_i32 s1, s26, s0
	s_add_i32 s13, s13, s28
	s_xor_b32 s1, s1, s0
	s_xor_b32 s13, s13, s28
	v_cvt_f32_u32_e32 v7, s1
	s_sub_i32 s24, 0, s1
	s_xor_b32 s0, s28, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x4f7ffffe, v7
	v_cvt_u32_f32_e32 v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s16, v7
	s_mul_i32 s24, s24, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s24, s16, s24
	s_add_i32 s16, s16, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s16, s13, s16
	s_mul_i32 s24, s16, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s13, s13, s24
	s_add_i32 s24, s16, 1
	s_sub_i32 s28, s13, s1
	s_cmp_ge_u32 s13, s1
	s_cselect_b32 s16, s24, s16
	s_cselect_b32 s13, s28, s13
	s_add_i32 s24, s16, 1
	s_cmp_ge_u32 s13, s1
	s_cselect_b32 s1, s24, s16
	s_not_b32 s13, s0
	s_xor_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s13, s0
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s13, -1, 0
	s_cmp_lg_u32 s15, s0
	s_cbranch_scc1 .LBB0_37
; %bb.32:
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e64 s21, v3
	s_cbranch_execz .LBB0_34
; %bb.33:
	v_subrev_nc_u32_e32 v10, s21, v6
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[7:8], null, v10, s27, v[4:5]
	v_mul_lo_u32 v10, v3, s23
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 3, v10
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v10, 0, v10, v11
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_34:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e64 s22, v3
	s_cbranch_execz .LBB0_36
; %bb.35:
	v_mad_u64_u32 v[7:8], null, v3, s27, v[4:5]
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v9
	v_add_nc_u32_e32 v10, s26, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b32_e32 v10, 3, v10
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_36:                               ; %Flow777
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_37:
	s_or_b32 s0, s14, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_68
; %bb.38:
	s_or_b32 s0, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_48
; %bb.39:
	v_cmp_gt_u32_e32 vcc_lo, s18, v2
	v_cmp_gt_u32_e64 s1, s21, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s1
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB0_41
; %bb.40:
	v_subrev_nc_u32_e32 v8, s21, v6
	v_subrev_nc_u32_e32 v7, s18, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v8, s27, v[7:8]
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 3, v[10:11]
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b32_e32 v11, 3, v2
	v_add_co_u32 v7, s0, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v8, s0, s7, v8, s0
	v_lshlrev_b32_e32 v10, 3, v10
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_41:
	s_or_b32 exec_lo, exec_lo, s15
	v_cmp_gt_u32_e64 s0, s19, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s15, s1
	s_cbranch_execz .LBB0_43
; %bb.42:
	v_subrev_nc_u32_e32 v7, s21, v6
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, v7, s27
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v7, v4, s25, v7
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, s1, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v8, s1, s7, v8, s1
	s_lshl_b32 s1, s25, 3
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_43:
	s_or_b32 exec_lo, exec_lo, s15
	v_cmp_gt_u32_e64 s1, s22, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s16, vcc_lo, s1
	s_and_saveexec_b32 s15, s16
	s_cbranch_execz .LBB0_45
; %bb.44:
	v_add_nc_u32_e32 v8, s26, v6
	v_subrev_nc_u32_e32 v7, s18, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v8, s27, v[7:8]
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[10:11]
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b32_e32 v11, 3, v2
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	v_lshlrev_b32_e32 v10, 3, v10
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_45:
	s_or_b32 exec_lo, exec_lo, s15
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_47
; %bb.46:
	v_add_nc_u32_e32 v7, s26, v6
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b32_e32 v11, 3, v9
	s_lshl_b32 s1, s25, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, v7, s27
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v4, s25, v7
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_add3_u32 v10, v10, v11, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_47:                               ; %Flow774
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_48:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_58
; %bb.49:
	v_cmp_gt_u32_e32 vcc_lo, s18, v2
	v_cmp_gt_u32_e64 s1, s21, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s1
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB0_51
; %bb.50:
	v_subrev_nc_u32_e32 v7, s21, v6
	v_subrev_nc_u32_e32 v10, s18, v2
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v7, s27
	v_add3_u32 v7, v10, s27, v7
	v_mul_lo_u32 v10, v3, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_lshlrev_b32_e32 v10, 3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s0, s6, v7
	v_add_co_ci_u32_e64 v8, s0, s7, v8, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v10, 0, v10, v11
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_51:
	s_or_b32 exec_lo, exec_lo, s15
	v_cmp_gt_u32_e64 s0, s19, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s15, s1
	s_cbranch_execz .LBB0_53
; %bb.52:
	v_subrev_nc_u32_e32 v7, s21, v6
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, v7, s27
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v7, v4, s25, v7
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, s1, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v8, s1, s7, v8, s1
	s_lshl_b32 s1, s25, 3
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_53:
	s_or_b32 exec_lo, exec_lo, s15
	v_cmp_gt_u32_e64 s1, s22, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s16, vcc_lo, s1
	s_and_saveexec_b32 s15, s16
	s_cbranch_execz .LBB0_55
; %bb.54:
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, s26, v6
	v_subrev_nc_u32_e32 v10, s18, v2
	v_lshlrev_b32_e32 v11, 3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v7, s27
	v_add3_u32 v7, v10, s27, v7
	v_add_nc_u32_e32 v10, s26, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b32_e32 v10, 3, v10
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_55:
	s_or_b32 exec_lo, exec_lo, s15
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_57
; %bb.56:
	v_add_nc_u32_e32 v7, s26, v6
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b32_e32 v11, 3, v9
	s_lshl_b32 s1, s25, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, v7, s27
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v4, s25, v7
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_add3_u32 v10, v10, v11, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_57:                               ; %Flow772
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_58:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_68
; %bb.59:
	v_cmp_gt_u32_e32 vcc_lo, s18, v2
	v_cmp_gt_u32_e64 s1, s21, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s1
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB0_61
; %bb.60:
	v_subrev_nc_u32_e32 v8, s21, v6
	v_subrev_nc_u32_e32 v7, s18, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v8, s27, v[7:8]
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 3, v[10:11]
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b32_e32 v11, 3, v2
	v_add_co_u32 v7, s0, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v8, s0, s7, v8, s0
	v_lshlrev_b32_e32 v10, 3, v10
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_61:
	s_or_b32 exec_lo, exec_lo, s15
	v_cmp_gt_u32_e64 s0, s19, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s15, s1
	s_cbranch_execz .LBB0_63
; %bb.62:
	v_subrev_nc_u32_e32 v10, s21, v6
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[7:8], null, v10, s27, v[2:3]
	v_mov_b32_e32 v8, 0
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v10, v10, 3, 0
	v_add_co_u32 v7, s1, s6, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s1, s7, v8, s1
	s_lshl_b32 s1, s25, 3
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_63:
	s_or_b32 exec_lo, exec_lo, s15
	v_cmp_gt_u32_e64 s1, s22, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s16, vcc_lo, s1
	s_and_saveexec_b32 s15, s16
	s_cbranch_execz .LBB0_65
; %bb.64:
	v_add_nc_u32_e32 v8, s26, v6
	v_subrev_nc_u32_e32 v7, s18, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v8, s27, v[7:8]
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[10:11]
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b32_e32 v11, 3, v2
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	v_lshlrev_b32_e32 v10, 3, v10
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_65:
	s_or_b32 exec_lo, exec_lo, s15
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_67
; %bb.66:
	v_add_nc_u32_e32 v10, s26, v6
	s_lshl_b32 s1, s25, 3
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v10, s27, v[2:3]
	v_mov_b32_e32 v8, 0
	v_add_nc_u32_e32 v10, s26, v5
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	v_lshl_add_u32 v10, v10, 3, 0
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v10, v10, v11, s1
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_67:                               ; %Flow770
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_68:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_99
; %bb.69:
	s_or_b32 s0, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_79
; %bb.70:
	v_cmp_gt_u32_e32 vcc_lo, s18, v2
	v_cmp_gt_u32_e64 s1, s21, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s1
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_72
; %bb.71:
	v_mul_lo_u32 v7, v3, s27
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b32_e32 v11, 3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v7, s18, v7
	v_mov_b32_e32 v8, 0
	v_lshlrev_b32_e32 v10, 3, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v7, v4
	v_add3_u32 v10, 0, v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, s0, s8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, s9, v8, s0
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_72:
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_gt_u32_e64 s0, s19, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s14, s1
	s_cbranch_execz .LBB0_74
; %bb.73:
	v_mul_lo_u32 v7, v3, s27
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v9
	v_mul_lo_u32 v10, v3, s23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v7, s25, v4
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, s1, s8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v8, s1, s9, v8, s1
	s_lshl_b32 s1, s25, 3
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_74:
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_gt_u32_e64 s1, s22, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s15, vcc_lo, s1
	s_and_saveexec_b32 s14, s15
	s_cbranch_execz .LBB0_76
; %bb.75:
	v_add_nc_u32_e32 v8, s26, v6
	v_subrev_nc_u32_e32 v7, s18, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v8, s27, v[7:8]
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[10:11]
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b32_e32 v11, 3, v2
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	v_lshlrev_b32_e32 v10, 3, v10
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_76:
	s_or_b32 exec_lo, exec_lo, s14
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_78
; %bb.77:
	v_add_nc_u32_e32 v7, s26, v6
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b32_e32 v11, 3, v9
	s_lshl_b32 s1, s25, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, v7, s27
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v4, s25, v7
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_add3_u32 v10, v10, v11, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_78:                               ; %Flow767
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_79:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_89
; %bb.80:
	v_cmp_gt_u32_e32 vcc_lo, s18, v2
	v_cmp_gt_u32_e64 s1, s21, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s1
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_82
; %bb.81:
	v_mul_lo_u32 v7, v3, s27
	v_subrev_nc_u32_e32 v10, s18, v2
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v10, s27, v7
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 3, v10
	v_add_co_u32 v7, s0, s8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, s9, v8, s0
	v_add3_u32 v10, 0, v10, v11
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_82:
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_gt_u32_e64 s0, s19, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s14, s1
	s_cbranch_execz .LBB0_84
; %bb.83:
	v_mul_lo_u32 v7, v3, s27
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v9
	v_mul_lo_u32 v10, v3, s23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v7, s25, v4
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, s1, s8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v8, s1, s9, v8, s1
	s_lshl_b32 s1, s25, 3
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_84:
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_gt_u32_e64 s1, s22, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s15, vcc_lo, s1
	s_and_saveexec_b32 s14, s15
	s_cbranch_execz .LBB0_86
; %bb.85:
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, s26, v6
	v_subrev_nc_u32_e32 v10, s18, v2
	v_lshlrev_b32_e32 v11, 3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v7, s27
	v_add3_u32 v7, v10, s27, v7
	v_add_nc_u32_e32 v10, s26, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b32_e32 v10, 3, v10
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_86:
	s_or_b32 exec_lo, exec_lo, s14
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_88
; %bb.87:
	v_add_nc_u32_e32 v7, s26, v6
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b32_e32 v11, 3, v9
	s_lshl_b32 s1, s25, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, v7, s27
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v4, s25, v7
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_add3_u32 v10, v10, v11, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_88:                               ; %Flow765
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_89:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_99
; %bb.90:
	v_cmp_gt_u32_e32 vcc_lo, s18, v2
	v_cmp_gt_u32_e64 s1, s21, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s1
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_92
; %bb.91:
	v_mul_lo_u32 v7, v3, s27
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b32_e32 v11, 3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v7, s18, v7
	v_mov_b32_e32 v8, 0
	v_lshlrev_b32_e32 v10, 3, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v7, v4
	v_add3_u32 v10, 0, v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, s0, s8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, s9, v8, s0
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_92:
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_gt_u32_e64 s0, s19, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s14, s1
	s_cbranch_execz .LBB0_94
; %bb.93:
	v_mad_u64_u32 v[7:8], null, v3, s27, v[2:3]
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v9
	v_mul_lo_u32 v10, v3, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s1, s8, v7
	v_add_co_ci_u32_e64 v8, s1, s9, v8, s1
	s_lshl_b32 s1, s25, 3
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_94:
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_gt_u32_e64 s1, s22, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s9, vcc_lo, s1
	s_and_saveexec_b32 s8, s9
	s_cbranch_execz .LBB0_96
; %bb.95:
	v_add_nc_u32_e32 v8, s26, v6
	v_subrev_nc_u32_e32 v7, s18, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v8, s27, v[7:8]
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[10:11]
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b32_e32 v11, 3, v2
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	v_lshlrev_b32_e32 v10, 3, v10
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_96:
	s_or_b32 exec_lo, exec_lo, s8
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_98
; %bb.97:
	v_add_nc_u32_e32 v10, s26, v6
	s_lshl_b32 s1, s25, 3
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v10, s27, v[2:3]
	v_mov_b32_e32 v8, 0
	v_add_nc_u32_e32 v10, s26, v5
	v_mul_lo_u32 v10, v10, s23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	v_lshl_add_u32 v10, v10, 3, 0
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v10, v10, v11, s1
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_98:                               ; %Flow763
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_99:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_130
; %bb.100:
	s_or_b32 s0, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_110
; %bb.101:
	v_cmp_gt_u32_e32 vcc_lo, s18, v2
	v_cmp_gt_u32_e64 s1, s21, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s1
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB0_103
; %bb.102:
	v_subrev_nc_u32_e32 v8, s21, v6
	v_subrev_nc_u32_e32 v7, s18, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v8, s27, v[7:8]
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 3, v[10:11]
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b32_e32 v11, 3, v2
	v_add_co_u32 v7, s0, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v8, s0, s7, v8, s0
	v_lshlrev_b32_e32 v10, 3, v10
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_103:
	s_or_b32 exec_lo, exec_lo, s8
	v_cmp_gt_u32_e64 s0, s19, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s8, s1
	s_cbranch_execz .LBB0_105
; %bb.104:
	v_subrev_nc_u32_e32 v7, s21, v6
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, v7, s27
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v7, v4, s25, v7
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, s1, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v8, s1, s7, v8, s1
	s_lshl_b32 s1, s25, 3
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_105:
	s_or_b32 exec_lo, exec_lo, s8
	v_cmp_gt_u32_e64 s1, s22, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s9, vcc_lo, s1
	s_and_saveexec_b32 s8, s9
	s_cbranch_execz .LBB0_107
; %bb.106:
	v_mul_lo_u32 v7, v3, s27
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b32_e32 v11, 3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v10, v10, s23
	v_subrev_nc_u32_e32 v7, s18, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, v7, v4
	v_lshlrev_b32_e32 v10, 3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add3_u32 v10, 0, v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_107:
	s_or_b32 exec_lo, exec_lo, s8
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_109
; %bb.108:
	v_mul_lo_u32 v7, v3, s27
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v9
	v_add_nc_u32_e32 v10, s26, v5
	s_lshl_b32 s1, s25, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v10, v10, s23
	v_add3_u32 v7, v7, s25, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_109:                              ; %Flow760
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_110:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_120
; %bb.111:
	v_cmp_gt_u32_e32 vcc_lo, s18, v2
	v_cmp_gt_u32_e64 s1, s21, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s1
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB0_113
; %bb.112:
	v_subrev_nc_u32_e32 v7, s21, v6
	v_subrev_nc_u32_e32 v10, s18, v2
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v7, s27
	v_add3_u32 v7, v10, s27, v7
	v_mul_lo_u32 v10, v3, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_lshlrev_b32_e32 v10, 3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s0, s6, v7
	v_add_co_ci_u32_e64 v8, s0, s7, v8, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v10, 0, v10, v11
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_113:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e64 s0, s19, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_115
; %bb.114:
	v_subrev_nc_u32_e32 v7, s21, v6
	v_mul_lo_u32 v10, v3, s23
	v_lshlrev_b32_e32 v11, 3, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, v7, s27
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v7, v4, s25, v7
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, s1, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v8, s1, s7, v8, s1
	s_lshl_b32 s1, s25, 3
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_115:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e64 s1, s22, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, vcc_lo, s1
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB0_117
; %bb.116:
	v_mul_lo_u32 v7, v3, s27
	v_subrev_nc_u32_e32 v10, s18, v2
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v10, s27, v7
	v_add_nc_u32_e32 v10, s26, v5
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, s23
	v_add_co_u32 v7, vcc_lo, s10, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	v_lshlrev_b32_e32 v10, 3, v10
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v10, 0, v10, v11
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_117:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_119
; %bb.118:
	v_mul_lo_u32 v7, v3, s27
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v11, 3, v9
	v_add_nc_u32_e32 v10, s26, v5
	s_lshl_b32 s1, s25, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v10, v10, s23
	v_add3_u32 v7, v7, s25, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_lshl_add_u32 v10, v10, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v10, v10, v11, s1
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8]
.LBB0_119:                              ; %Flow758
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_120:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_130
; %bb.121:
	v_cmp_gt_u32_e32 vcc_lo, s18, v2
	v_cmp_gt_u32_e64 s1, s21, v3
	v_subrev_nc_u32_e32 v7, s21, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s1
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB0_123
; %bb.122:
	v_subrev_nc_u32_e32 v6, s18, v4
	v_lshlrev_b32_e32 v8, 3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[10:11], null, v7, s27, v[6:7]
	v_mul_lo_u32 v6, v3, s23
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 3, v6
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v6, 0, v6, v8
	v_add_co_u32 v10, s0, s6, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s7, v11, s0
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v6, v[10:11]
.LBB0_123:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e64 s0, s19, v2
	v_lshlrev_b32_e32 v6, 3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_125
; %bb.124:
	v_mad_u64_u32 v[8:9], null, v7, s27, v[2:3]
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[8:9]
	v_mul_lo_u32 v9, v3, s23
	v_add_co_u32 v7, s1, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s1, s7, v8, s1
	v_lshl_add_u32 v9, v9, 3, 0
	s_lshl_b32 s1, s25, 3
	global_load_b64 v[7:8], v[7:8], off
	v_add3_u32 v9, v9, v6, s1
	s_waitcnt vmcnt(0)
	ds_store_b64 v9, v[7:8]
.LBB0_125:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v5, s26, v5
	v_cmp_gt_u32_e64 s1, s22, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, v5, s23
	s_and_b32 s3, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_127
; %bb.126:
	v_mul_lo_u32 v7, v3, s27
	v_lshlrev_b32_e32 v9, 3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v7, s18, v7
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, v7, v4
	v_lshlrev_b32_e32 v4, 3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add3_u32 v4, 0, v4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[7:8]
.LBB0_127:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_129
; %bb.128:
	v_mad_u64_u32 v[7:8], null, v3, s27, v[2:3]
	v_mov_b32_e32 v8, 0
	v_lshl_add_u32 v4, v5, 3, 0
	s_lshl_b32 s1, s25, 3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v4, v4, v6, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v7, vcc_lo, s10, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[7:8]
.LBB0_129:                              ; %Flow756
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_130:
	s_cmp_lt_i32 s20, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_137
; %bb.131:                              ; %.lr.ph669
	v_mul_lo_u32 v3, v3, s23
	v_lshlrev_b32_e32 v4, 3, v2
	s_cmp_gt_i32 s17, 0
	s_mov_b32 s0, 0
	s_cselect_b32 s1, -1, 0
	s_max_i32 s3, s17, 0
	s_lshl_b32 s2, s23, 3
	s_lshl_b32 s3, s3, 3
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v5, 3, v3
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v4, 0, v5, v4
.LBB0_132:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_134 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_136
; %bb.133:                              ;   in Loop: Header=BB0_132 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v5, v4
	s_mov_b32 s7, s12
	s_mov_b32 s8, s17
.LBB0_134:                              ;   Parent Loop BB0_132 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v8, s7
	s_add_i32 s8, s8, -1
	s_add_i32 s7, s7, 8
	s_cmp_eq_u32 s8, 0
	ds_load_b64 v[6:7], v5
	ds_load_b64 v[8:9], v8
	v_add_nc_u32_e32 v5, 8, v5
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], v[8:9], v[6:7], v[2:3]
	s_cbranch_scc0 .LBB0_134
; %bb.135:                              ; %._crit_edge663.loopexit
                                        ;   in Loop: Header=BB0_132 Depth=1
	s_add_i32 s6, s6, s17
.LBB0_136:                              ; %._crit_edge663
                                        ;   in Loop: Header=BB0_132 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v4, s2, v4
	s_add_i32 s0, s0, 1
	s_add_i32 s12, s12, s3
	s_cmp_eq_u32 s0, s20
	s_cbranch_scc0 .LBB0_132
	s_branch .LBB0_138
.LBB0_137:
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
.LBB0_138:                              ; %Flow755
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_barrier
	buffer_gl0_inv
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 352
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii, .Lfunc_end0-_Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7320
; NumSgprs: 34
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         60
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .offset:         68
        .size:           4
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     by_value
      - .offset:         76
        .size:           4
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .offset:         84
        .size:           4
        .value_kind:     by_value
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         100
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         108
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         110
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         112
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         114
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         116
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         118
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         160
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         216
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 352
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z11kernel2DXYpPdS_S_S_PKdiiiiiiiiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
