#include <cstdlib>
#include <iostream>

#define NUM_BLOCKS 16
#define NUM_THREADS_PER_BLOCK 16
#define N 16

using namespace std;

cudaEvent_t start, stop;

void startKernelTime (void) {
	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	cudaEventRecord(start);
}

void stopKernelTime (void) {
	cudaEventRecord(stop);

	cudaEventSynchronize(stop);
	float milliseconds = 0;
	cudaEventElapsedTime(&milliseconds, start, stop);

	cout << milliseconds << " ms have elapsed for the CUDA execution" << endl;
}

void checkCUDAError (const char *msg) {
	cudaError_t err = cudaGetLastError();
	if( cudaSuccess != err) {
		cerr << "Cuda error: " << msg << ", " << cudaGetErrorString( err) << endl;
		exit(-1);
	}
}

void printMatrix(char c, float *M) {
    cout << c << endl;
    for (int i = 0; i < N; i++) {
        cout << endl;
        for (int j = 0; j < N; j++) {
            cout << M[i * N + j] << "    ";
        }
    }
    cout << "\n\n";
}

void fillMatrices(float *A, float *B) {
    for (int i = 0; i < N; ++i) {
        for (int j = 0; j < N; ++j) {
            A[i*N+j] = ((float)rand()) / ((float)RAND_MAX);
            B[i*N+j] = 1;
        }
    }

}

__global__ void matMultKernel_ijk(float *A, float *B, float *C) {
    int i = blockIdx.x;
    int j = threadIdx.x;

    if (i < N && j < N) {
        C[i * N + j] = 0;
        for (int k = 0; k < N; k++) {
            C[i * N + j] += A[i * N + k] * B[k * N + j];
        }
    }
}

__global__ void matMultKernel_ikj(float *A, float *B, float *C) {
    int i = blockIdx.x;
    int k = threadIdx.x;

    if (i < N && k < N/*  && k >= 1 */) {
        for (int j = 0; j < N; j++) {
            C[i * N + j] += A[i * N + k] * B[k * N + j];
        }
    }

    // void matMult_ikj(float *A, float *B, float *C, int N) {
    //     for (int i = 0; i < N; i++) {
    //         for (int j = 0; j < N; j++) {   //1ª iteração é necessário definir ter a matriz resultado a 0
    //             C[i*N+j] = A[i*N+0] * B[0*N+j];
    //         }
    //         for (int k = 1; k < N; k++) {
    //             for (int j = 0; j < N; j++) {
    //                 C[i*N+j] += A[i*N+k] * B[k*N+j];
    //             }
    //         }
    //     }
    // }
}

void matMultGPU(float *A, float *B, float *C) {
    // declare variable with size of the array in bytes
    int bytes = N * N * sizeof(float);

	// pointers to the device memory
    float *dA, *dB, *dC; 

	// allocate the memory on the device
	cudaMalloc((void**) &dA, bytes);
	cudaMalloc((void**) &dB, bytes);
	cudaMalloc((void**) &dC, bytes);
    
    startKernelTime();

    checkCUDAError("mem allocation");
	// copy inputs to the device
	cudaMemcpy(dA, A, bytes, cudaMemcpyHostToDevice);
    cudaMemcpy(dB, B, bytes, cudaMemcpyHostToDevice);


    //cudaMemcpy(dC, C, bytes, cudaMemcpyHostToDevice); /** Temporário **/

	checkCUDAError("memcpy h->d");
    // launch the kernel
	matMultKernel_ijk <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>> (dA, dB, dC);
	// matMultKernel_ikj <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>> (dA, dB, dC);

	checkCUDAError("kernel invocation");
	// copy the output to the host
	cudaMemcpy(C, dC, bytes, cudaMemcpyDeviceToHost);
	checkCUDAError("memcpy d->h");
    
    stopKernelTime();

	// free the device memory
	cudaFree(dA); cudaFree(dB); cudaFree(dC);
	checkCUDAError("mem free");
}

int main(int argc, char const *argv[]) {
    float A[N * N];
    float B[N * N];
    float C[N * N];

    fillMatrices(A, B);

    // /** Temporário **/
    // for (int i = 0; i < N * N; i++) {
    //     C[i] = 0;
    // }

    matMultGPU(A, B, C);

    printMatrix('A', A);
    printMatrix('B', B);
    printMatrix('C', C);
}

	.file	"tmpxft_002bc881_00000000-6_matMultGPU_alt.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3644:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3644:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15startKernelTimev
	.type	_Z15startKernelTimev, @function
_Z15startKernelTimev:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	start(%rip), %rdi
	call	cudaEventCreate@PLT
	leaq	stop(%rip), %rdi
	call	cudaEventCreate@PLT
	movq	start(%rip), %rdi
	xorl	%esi, %esi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaEventRecord@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z15startKernelTimev, .-_Z15startKernelTimev
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	" ms have elapsed for the CUDA execution"
	.text
	.globl	_Z14stopKernelTimev
	.type	_Z14stopKernelTimev, @function
_Z14stopKernelTimev:
.LFB3636:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	stop(%rip), %rdi
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	cudaEventRecord@PLT
	movq	stop(%rip), %rdi
	call	cudaEventSynchronize@PLT
	movq	stop(%rip), %rdx
	movq	start(%rip), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	4(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z14stopKernelTimev, .-_Z14stopKernelTimev
	.section	.rodata.str1.1
.LC2:
	.string	"Cuda error: "
.LC3:
	.string	", "
	.text
	.globl	_Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc, @function
_Z14checkCUDAErrorPKc:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L8
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	movl	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %edi
	call	exit@PLT
.L8:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc
	.section	.rodata.str1.1
.LC4:
	.string	"    "
.LC5:
	.string	"\n\n"
	.text
	.globl	_Z11printMatrixcPf
	.type	_Z11printMatrixcPf, @function
_Z11printMatrixcPf:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC4(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	movsbl	%dil, %esi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	_ZSt4cout(%rip), %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 64
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L13:
	movq	%rbp, %r14
	movq	%rbx, %rdi
	xorl	%r12d, %r12d
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	salq	$6, %r14
	addq	%r13, %r14
.L12:
	movq	%rbx, %rdi
	cvtss2sd	(%r14,%r12,4), %xmm0
	incq	%r12
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$16, %r12
	jne	.L12
	incq	%rbp
	cmpq	$16, %rbp
	jne	.L13
	popq	%rax
	.cfi_def_cfa_offset 56
	movq	%rbx, %rdi
	leaq	.LC5(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	.cfi_endproc
.LFE3638:
	.size	_Z11printMatrixcPf, .-_Z11printMatrixcPf
	.globl	_Z12fillMatricesPfS_
	.type	_Z12fillMatricesPfS_, @function
_Z12fillMatricesPfS_:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L18:
	xorl	%ebx, %ebx
.L19:
	call	rand@PLT
	movl	%eax, %edx
	leaq	(%r12,%rbp), %rax
	cvtsi2ssl	%edx, %xmm0
	mulss	.LC6(%rip), %xmm0
	movss	%xmm0, (%rax,%rbx)
	leaq	0(%r13,%rbp), %rax
	movl	$0x3f800000, (%rax,%rbx)
	addq	$4, %rbx
	cmpq	$64, %rbx
	jne	.L19
	addq	$64, %rbp
	cmpq	$1024, %rbp
	jne	.L18
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z12fillMatricesPfS_, .-_Z12fillMatricesPfS_
	.globl	_Z41__device_stub__Z17matMultKernel_ijkPfS_S_PfS_S_
	.type	_Z41__device_stub__Z17matMultKernel_ijkPfS_S_PfS_S_, @function
_Z41__device_stub__Z17matMultKernel_ijkPfS_S_PfS_S_:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z17matMultKernel_ijkPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L23:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z41__device_stub__Z17matMultKernel_ijkPfS_S_PfS_S_, .-_Z41__device_stub__Z17matMultKernel_ijkPfS_S_PfS_S_
	.globl	_Z17matMultKernel_ijkPfS_S_
	.type	_Z17matMultKernel_ijkPfS_S_, @function
_Z17matMultKernel_ijkPfS_S_:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z17matMultKernel_ijkPfS_S_PfS_S_
	.cfi_endproc
.LFE3667:
	.size	_Z17matMultKernel_ijkPfS_S_, .-_Z17matMultKernel_ijkPfS_S_
	.section	.rodata.str1.1
.LC8:
	.string	"mem allocation"
.LC9:
	.string	"memcpy h->d"
.LC10:
	.string	"kernel invocation"
.LC11:
	.string	"memcpy d->h"
.LC12:
	.string	"mem free"
	.text
	.globl	_Z10matMultGPUPfS_S_
	.type	_Z10matMultGPUPfS_S_, @function
_Z10matMultGPUPfS_S_:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	movl	$1024, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movl	$1024, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	call	_Z15startKernelTimev
	leaq	.LC8(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movl	$268435457, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z41__device_stub__Z17matMultKernel_ijkPfS_S_PfS_S_
.L29:
	leaq	.LC10(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	leaq	.LC11(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	call	_Z14stopKernelTimev
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC12(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	_Z10matMultGPUPfS_S_, .-_Z10matMultGPUPfS_S_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$3088, %rsp
	.cfi_def_cfa_offset 3120
	movq	%fs:40, %rax
	movq	%rax, 3080(%rsp)
	xorl	%eax, %eax
	leaq	1032(%rsp), %rbx
	leaq	8(%rsp), %rbp
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	leaq	2056(%rsp), %r12
	call	_Z12fillMatricesPfS_
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z10matMultGPUPfS_S_
	movq	%rbp, %rsi
	movl	$65, %edi
	call	_Z11printMatrixcPf
	movq	%rbx, %rsi
	movl	$66, %edi
	call	_Z11printMatrixcPf
	movq	%r12, %rsi
	movl	$67, %edi
	call	_Z11printMatrixcPf
	movq	3080(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$3088, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3641:
	.size	main, .-main
	.text
	.globl	_Z41__device_stub__Z17matMultKernel_ikjPfS_S_PfS_S_
	.type	_Z41__device_stub__Z17matMultKernel_ikjPfS_S_PfS_S_, @function
_Z41__device_stub__Z17matMultKernel_ikjPfS_S_PfS_S_:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z17matMultKernel_ikjPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L35:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z41__device_stub__Z17matMultKernel_ikjPfS_S_PfS_S_, .-_Z41__device_stub__Z17matMultKernel_ikjPfS_S_PfS_S_
	.globl	_Z17matMultKernel_ikjPfS_S_
	.type	_Z17matMultKernel_ikjPfS_S_, @function
_Z17matMultKernel_ikjPfS_S_:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z17matMultKernel_ikjPfS_S_PfS_S_
	.cfi_endproc
.LFE3669:
	.size	_Z17matMultKernel_ikjPfS_S_, .-_Z17matMultKernel_ikjPfS_S_
	.section	.rodata.str1.1
.LC13:
	.string	"_Z17matMultKernel_ikjPfS_S_"
.LC14:
	.string	"_Z17matMultKernel_ijkPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3671:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17matMultKernel_ikjPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17matMultKernel_ijkPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3671:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	stop
	.bss
	.align 8
	.type	stop, @object
	.size	stop, 8
stop:
	.zero	8
	.globl	start
	.align 8
	.type	start, @object
	.size	start, 8
start:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdlib>
#include <iostream>

#define NUM_BLOCKS 16
#define NUM_THREADS_PER_BLOCK 16
#define N 16

using namespace std;

hipEvent_t start, stop;

void startKernelTime (void) {
	hipEventCreate(&start);
	hipEventCreate(&stop);

	hipEventRecord(start);
}

void stopKernelTime (void) {
	hipEventRecord(stop);

	hipEventSynchronize(stop);
	float milliseconds = 0;
	hipEventElapsedTime(&milliseconds, start, stop);

	cout << milliseconds << " ms have elapsed for the CUDA execution" << endl;
}

void checkCUDAError (const char *msg) {
	hipError_t err = hipGetLastError();
	if( hipSuccess != err) {
		cerr << "Cuda error: " << msg << ", " << hipGetErrorString( err) << endl;
		exit(-1);
	}
}

void printMatrix(char c, float *M) {
    cout << c << endl;
    for (int i = 0; i < N; i++) {
        cout << endl;
        for (int j = 0; j < N; j++) {
            cout << M[i * N + j] << "    ";
        }
    }
    cout << "\n\n";
}

void fillMatrices(float *A, float *B) {
    for (int i = 0; i < N; ++i) {
        for (int j = 0; j < N; ++j) {
            A[i*N+j] = ((float)rand()) / ((float)RAND_MAX);
            B[i*N+j] = 1;
        }
    }

}

__global__ void matMultKernel_ijk(float *A, float *B, float *C) {
    int i = blockIdx.x;
    int j = threadIdx.x;

    if (i < N && j < N) {
        C[i * N + j] = 0;
        for (int k = 0; k < N; k++) {
            C[i * N + j] += A[i * N + k] * B[k * N + j];
        }
    }
}

__global__ void matMultKernel_ikj(float *A, float *B, float *C) {
    int i = blockIdx.x;
    int k = threadIdx.x;

    if (i < N && k < N/*  && k >= 1 */) {
        for (int j = 0; j < N; j++) {
            C[i * N + j] += A[i * N + k] * B[k * N + j];
        }
    }

    // void matMult_ikj(float *A, float *B, float *C, int N) {
    //     for (int i = 0; i < N; i++) {
    //         for (int j = 0; j < N; j++) {   //1ª iteração é necessário definir ter a matriz resultado a 0
    //             C[i*N+j] = A[i*N+0] * B[0*N+j];
    //         }
    //         for (int k = 1; k < N; k++) {
    //             for (int j = 0; j < N; j++) {
    //                 C[i*N+j] += A[i*N+k] * B[k*N+j];
    //             }
    //         }
    //     }
    // }
}

void matMultGPU(float *A, float *B, float *C) {
    // declare variable with size of the array in bytes
    int bytes = N * N * sizeof(float);

	// pointers to the device memory
    float *dA, *dB, *dC; 

	// allocate the memory on the device
	hipMalloc((void**) &dA, bytes);
	hipMalloc((void**) &dB, bytes);
	hipMalloc((void**) &dC, bytes);
    
    startKernelTime();

    checkCUDAError("mem allocation");
	// copy inputs to the device
	hipMemcpy(dA, A, bytes, hipMemcpyHostToDevice);
    hipMemcpy(dB, B, bytes, hipMemcpyHostToDevice);


    //cudaMemcpy(dC, C, bytes, cudaMemcpyHostToDevice); /** Temporário **/

	checkCUDAError("memcpy h->d");
    // launch the kernel
	matMultKernel_ijk <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>> (dA, dB, dC);
	// matMultKernel_ikj <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>> (dA, dB, dC);

	checkCUDAError("kernel invocation");
	// copy the output to the host
	hipMemcpy(C, dC, bytes, hipMemcpyDeviceToHost);
	checkCUDAError("memcpy d->h");
    
    stopKernelTime();

	// free the device memory
	hipFree(dA); hipFree(dB); hipFree(dC);
	checkCUDAError("mem free");
}

int main(int argc, char const *argv[]) {
    float A[N * N];
    float B[N * N];
    float C[N * N];

    fillMatrices(A, B);

    // /** Temporário **/
    // for (int i = 0; i < N * N; i++) {
    //     C[i] = 0;
    // }

    matMultGPU(A, B, C);

    printMatrix('A', A);
    printMatrix('B', B);
    printMatrix('C', C);
}

	.text
	.file	"matMultGPU_alt.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z15startKernelTimev            # -- Begin function _Z15startKernelTimev
	.type	_Z15startKernelTimev,@function
_Z15startKernelTimev:                   # @_Z15startKernelTimev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$start, %edi
	callq	hipEventCreate
	movl	$stop, %edi
	callq	hipEventCreate
	movq	start(%rip), %rdi
	xorl	%esi, %esi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipEventRecord                  # TAILCALL
.Lfunc_end0:
	.size	_Z15startKernelTimev, .Lfunc_end0-_Z15startKernelTimev
	.cfi_endproc
                                        # -- End function
	.globl	_Z14stopKernelTimev             # -- Begin function _Z14stopKernelTimev
	.type	_Z14stopKernelTimev,@function
_Z14stopKernelTimev:                    # @_Z14stopKernelTimev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	stop(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	stop(%rip), %rdi
	callq	hipEventSynchronize
	leaq	12(%rsp), %rbx
	movl	$0, (%rbx)
	movq	start(%rip), %rsi
	movq	stop(%rip), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str, %esi
	movl	$39, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z14stopKernelTimev, .Lfunc_end1-_Z14stopKernelTimev
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCUDAErrorPKc           # -- Begin function _Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc,@function
_Z14checkCUDAErrorPKc:                  # @_Z14checkCUDAErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %r14
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_2:
	.cfi_def_cfa_offset 32
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$-1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z14checkCUDAErrorPKc, .Lfunc_end2-_Z14checkCUDAErrorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixcPf              # -- Begin function _Z11printMatrixcPf
	.type	_Z11printMatrixcPf,@function
_Z11printMatrixcPf:                     # @_Z11printMatrixcPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movb	%dil, 7(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB3_2
# %bb.1:
	leaq	7(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %r14
	jmp	.LBB3_3
.LBB3_2:
	movsbl	%dil, %esi
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.LBB3_3:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r14d, %r14d
	movl	$_ZSt4cout, %r15d
.LBB3_4:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r12d, %r12d
.LBB3_5:                                #   Parent Loop BB3_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$16, %r12
	jne	.LBB3_5
# %bb.6:                                #   in Loop: Header=BB3_4 Depth=1
	incq	%r14
	addq	$64, %rbx
	cmpq	$16, %r14
	jne	.LBB3_4
# %bb.7:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z11printMatrixcPf, .Lfunc_end3-_Z11printMatrixcPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12fillMatricesPfS_
.LCPI4_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z12fillMatricesPfS_
	.type	_Z12fillMatricesPfS_,@function
_Z12fillMatricesPfS_:                   # @_Z12fillMatricesPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorl	%r15d, %r15d
.LBB4_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	xorl	%r12d, %r12d
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%r12,4)
	movl	$1065353216, (%rbx,%r12,4)      # imm = 0x3F800000
	incq	%r12
	cmpq	$16, %r12
	jne	.LBB4_2
# %bb.3:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%r15
	addq	$64, %rbx
	addq	$64, %r14
	cmpq	$16, %r15
	jne	.LBB4_1
# %bb.4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z12fillMatricesPfS_, .Lfunc_end4-_Z12fillMatricesPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__matMultKernel_ijkPfS_S_ # -- Begin function _Z32__device_stub__matMultKernel_ijkPfS_S_
	.type	_Z32__device_stub__matMultKernel_ijkPfS_S_,@function
_Z32__device_stub__matMultKernel_ijkPfS_S_: # @_Z32__device_stub__matMultKernel_ijkPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17matMultKernel_ijkPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z32__device_stub__matMultKernel_ijkPfS_S_, .Lfunc_end5-_Z32__device_stub__matMultKernel_ijkPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__matMultKernel_ikjPfS_S_ # -- Begin function _Z32__device_stub__matMultKernel_ikjPfS_S_
	.type	_Z32__device_stub__matMultKernel_ikjPfS_S_,@function
_Z32__device_stub__matMultKernel_ikjPfS_S_: # @_Z32__device_stub__matMultKernel_ikjPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17matMultKernel_ikjPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z32__device_stub__matMultKernel_ikjPfS_S_, .Lfunc_end6-_Z32__device_stub__matMultKernel_ikjPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10matMultGPUPfS_S_            # -- Begin function _Z10matMultGPUPfS_S_
	.type	_Z10matMultGPUPfS_S_,@function
_Z10matMultGPUPfS_S_:                   # @_Z10matMultGPUPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	24(%rsp), %r13
	movl	$1024, %esi                     # imm = 0x400
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r12
	movl	$1024, %esi                     # imm = 0x400
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	callq	_Z15startKernelTimev
	movl	$.L.str.5, %edi
	callq	_Z14checkCUDAErrorPKc
	movq	(%r13), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.6, %edi
	callq	_Z14checkCUDAErrorPKc
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z32__device_stub__matMultKernel_ijkPfS_S_
.LBB7_2:
	movl	$.L.str.7, %edi
	callq	_Z14checkCUDAErrorPKc
	movq	8(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.8, %edi
	callq	_Z14checkCUDAErrorPKc
	callq	_Z14stopKernelTimev
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.9, %edi
	callq	_Z14checkCUDAErrorPKc
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z10matMultGPUPfS_S_, .Lfunc_end7-_Z10matMultGPUPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$3072, %rsp                     # imm = 0xC00
	.cfi_def_cfa_offset 3104
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	2048(%rsp), %rbx
	leaq	1024(%rsp), %r14
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_Z12fillMatricesPfS_
	movq	%rsp, %r15
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_Z10matMultGPUPfS_S_
	movl	$65, %edi
	movq	%rbx, %rsi
	callq	_Z11printMatrixcPf
	movl	$66, %edi
	movq	%r14, %rsi
	callq	_Z11printMatrixcPf
	movl	$67, %edi
	movq	%r15, %rsi
	callq	_Z11printMatrixcPf
	xorl	%eax, %eax
	addq	$3072, %rsp                     # imm = 0xC00
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17matMultKernel_ijkPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17matMultKernel_ikjPfS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	start,@object                   # @start
	.bss
	.globl	start
	.p2align	3, 0x0
start:
	.quad	0
	.size	start, 8

	.type	stop,@object                    # @stop
	.globl	stop
	.p2align	3, 0x0
stop:
	.quad	0
	.size	stop, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" ms have elapsed for the CUDA execution"
	.size	.L.str, 40

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Cuda error: "
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	", "
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"    "
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n\n"
	.size	.L.str.4, 3

	.type	_Z17matMultKernel_ijkPfS_S_,@object # @_Z17matMultKernel_ijkPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z17matMultKernel_ijkPfS_S_
	.p2align	3, 0x0
_Z17matMultKernel_ijkPfS_S_:
	.quad	_Z32__device_stub__matMultKernel_ijkPfS_S_
	.size	_Z17matMultKernel_ijkPfS_S_, 8

	.type	_Z17matMultKernel_ikjPfS_S_,@object # @_Z17matMultKernel_ikjPfS_S_
	.globl	_Z17matMultKernel_ikjPfS_S_
	.p2align	3, 0x0
_Z17matMultKernel_ikjPfS_S_:
	.quad	_Z32__device_stub__matMultKernel_ikjPfS_S_
	.size	_Z17matMultKernel_ikjPfS_S_, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"mem allocation"
	.size	.L.str.5, 15

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"memcpy h->d"
	.size	.L.str.6, 12

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"kernel invocation"
	.size	.L.str.7, 18

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"memcpy d->h"
	.size	.L.str.8, 12

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"mem free"
	.size	.L.str.9, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17matMultKernel_ijkPfS_S_"
	.size	.L__unnamed_1, 28

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17matMultKernel_ikjPfS_S_"
	.size	.L__unnamed_2, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__matMultKernel_ijkPfS_S_
	.addrsig_sym _Z32__device_stub__matMultKernel_ikjPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym start
	.addrsig_sym stop
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _Z17matMultKernel_ijkPfS_S_
	.addrsig_sym _Z17matMultKernel_ikjPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17matMultKernel_ijkPfS_S_ ; -- Begin function _Z17matMultKernel_ijkPfS_S_
	.globl	_Z17matMultKernel_ijkPfS_S_
	.p2align	8
	.type	_Z17matMultKernel_ijkPfS_S_,@function
_Z17matMultKernel_ijkPfS_S_:            ; @_Z17matMultKernel_ijkPfS_S_
; %bb.0:
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_cmp_lt_i32 s15, 16
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x10
	s_lshl_b32 s6, s15, 4
	s_load_b128 s[0:3], s[0:1], 0x0
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v1, s6, v0
	v_lshlrev_b32_e32 v3, 2, v0
	s_ashr_i32 s7, s6, 31
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v2, s2, s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, null, s3, 0, s2
	s_lshl_b64 s[2:3], s[6:7], 2
	global_store_b32 v[0:1], v4, off
	s_add_u32 s2, s0, s2
	s_addc_u32 s3, s1, s3
	s_mov_b64 s[0:1], 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s2, s0
	s_addc_u32 s5, s3, s1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v4, s[4:5]
	v_add_co_u32 v2, vcc_lo, v2, 64
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 64
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v7, v6
	global_store_b32 v[0:1], v5, off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17matMultKernel_ijkPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17matMultKernel_ijkPfS_S_, .Lfunc_end0-_Z17matMultKernel_ijkPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17matMultKernel_ikjPfS_S_ ; -- Begin function _Z17matMultKernel_ikjPfS_S_
	.globl	_Z17matMultKernel_ikjPfS_S_
	.p2align	8
	.type	_Z17matMultKernel_ikjPfS_S_,@function
_Z17matMultKernel_ikjPfS_S_:            ; @_Z17matMultKernel_ikjPfS_S_
; %bb.0:
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_cmp_lt_i32 s15, 16
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.preheader
	s_load_b128 s[4:7], s[0:1], 0x0
	s_lshl_b32 s2, s15, 4
	s_load_b64 s[0:1], s[0:1], 0x10
	v_add_nc_u32_e32 v1, s2, v0
	v_lshlrev_b32_e32 v5, 6, v0
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b64 s[2:3], s[2:3], 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v3
	v_add_co_u32 v3, s4, s6, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v4, vcc_lo
	v_add_co_ci_u32_e64 v4, null, s7, 0, s4
	s_add_u32 s2, s0, s2
	s_addc_u32 s3, s1, s3
	s_mov_b64 s[0:1], 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v5, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v4, vcc_lo
	s_add_u32 s4, s2, s0
	s_addc_u32 s5, s3, s1
	global_load_b32 v7, v[0:1], off
	global_load_b32 v8, v2, s[4:5]
	global_load_b32 v5, v[5:6], off
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 64
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v8, v7, v5
	global_store_b32 v2, v8, s[4:5]
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17matMultKernel_ikjPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17matMultKernel_ikjPfS_S_, .Lfunc_end1-_Z17matMultKernel_ikjPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 228
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17matMultKernel_ijkPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17matMultKernel_ijkPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17matMultKernel_ikjPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17matMultKernel_ikjPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
