#include <cuda.h>
#include <stdio.h>
#include <math.h>

#define N 6

__global__ void add( float *a, float *b, float *c) {
	int tid = blockIdx.x;	//Handle the data at the index

		c[tid] = a[tid] + b[tid];
}


__global__ void scale(float *a, int size, int index){
 	int i;
	int start=(index*size+index);
	int end=(index*size+size);
	
	for(i=start+1;i<end;i++){
		a[i]=(a[i]/a[start]);
	}

}

__global__ void reduce(float *a, int size, int index){
	int i;
        int tid=threadIdx.x;
	int start= ((index+tid+1)*size+index);
	int end= ((index+tid+1)*size+size);

        for(i=start+1;i<end;i++){
                 // a[i]=a[i]-(a[start]*a[(index*size)+i]);
		 a[i]=a[i]-(a[start]*a[(index*size)+(index+(i-start))]);
        }

}


int main(){
	float a[(N*N)], c[(N*N)];
	float result[N][N],b[N][N];
	float *dev_a, *dev_b, *dev_c;
	int i;
	int j;
	int k;
	float l1;
	float u1;

        int threads=((N*N)-1);	
	//allocate the memory on the GPU
	cudaMalloc ( (void**)&dev_a, N*N* sizeof (float) );
	cudaMalloc ( (void**)&dev_b, N*N* sizeof (float) );
	cudaMalloc ( (void**)&dev_c, N*N* sizeof (float) );


	srand((unsigned)2);
	//fill the arrays 'a' and 'b' on the CPU
	for ( i = 0; i <= (N*N); i++) {
		a[i] =((rand()%10)+1);
	}
	
	printf("Matrix a is :\n");
	for(i=0; i<(N*N); i++){
           if(i%N==0)
          printf("\n %f ", a[i]);
           else printf("%lf ",a[i]);
         }

	cudaMemcpy( dev_a, a, N*N*sizeof(float), cudaMemcpyHostToDevice);//copy array to device memory
       
        /*Perform LU Decomposition*/
      	printf("\n=========================================================="); 
	for(i=0;i<N;i++){
        printf("\nPerforming scaling \n");
        scale<<<1,1>>>(dev_a,N,i);
      	reduce<<<1,(N-i-1)>>>(dev_a,N,i);

       /* 
        scale<<<1,1>>>(dev_a,N,0);//scaling step
        reduce<<<1, (N-0-1)>>>(dev_a, N, 0);//reduction step
	
	scale<<<1,1>>>(dev_a,N,1);
 	reduce<<<1,(N-1-1)>>>(dev_a,N,1);
	scale<<<1,1>>>(dev_a,N,2);
 	reduce<<<1,(N-2-1)>>>(dev_a,N,2);
	scale<<<1,1>>>(dev_a,N,3);
 	reduce<<<1,(N-3-1)>>>(dev_a,N,3);
	scale<<<1,1>>>(dev_a,N,4);
 	reduce<<<1,(N-4-1)>>>(dev_a,N,4);
	scale<<<1,1>>>(dev_a,N,5);
 	reduce<<<1,(N-5-1)>>>(dev_a,N,5);*/
       }
        /*LU decomposition ends here*/

	cudaMemcpy( c, dev_a, N*N*sizeof(float),cudaMemcpyDeviceToHost );//copy array back to host

       //display the results
	printf("\nCopied matrix C is \n");
	for ( i = 0; i < (N*N); i++) {
               if(i%N==0)
		printf( "\n%f  ", c[i]);  
               else printf("%lf ",c[i]);
	}
	printf("\n");	

	/*copy the result matrix into explicit 2D matrix for verification*/
        for(i=0;i<N;i++){
             for(j=0;j<N;j++){
		result[i][j]=c[i*N+j];
		}
        }

        /*printf("The result matrix\n");	
        for(i=0;i<N;i++){
         	for(j=0;j<N;j++){
		printf("%lf ",result[i][j]);	
		}
	  printf("\n");
          }*/

	printf("=======================================================");
	printf("\n Performing inplace verification \n");
        /*Inplace verification step*/

        for(i=0;i<N;i++){
           for(j=0;j<N;j++){
                b[i][j]=0;
              for(k=0;k<N;k++){
                 if(i>=k)l1=result[i][k];
                  else l1=0;

                  if(k==j)u1=1;
                  else if(k<j)u1=result[k][j];//figured it out 
                  else u1=0.0;

               b[i][j]=b[i][j]+(l1*u1);

             }
           }
         }


        printf("==================================================");
         printf("\nThe b matrix\n");	

         for(i=0;i<N;i++){
         	for(j=0;j<N;j++){
		printf("%lf ",b[i][j]);	
		}
	  printf("\n");
          }


	//free the memory allocated on the GPU
	cudaFree( dev_a );
	cudaFree( dev_b );
	cudaFree( dev_c );
	
	return 0;
}
	.file	"tmpxft_0033e67b_00000000-6_LU.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z26__device_stub__Z3addPfS_S_PfS_S_
	.type	_Z26__device_stub__Z3addPfS_S_PfS_S_, @function
_Z26__device_stub__Z3addPfS_S_PfS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3addPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z26__device_stub__Z3addPfS_S_PfS_S_, .-_Z26__device_stub__Z3addPfS_S_PfS_S_
	.globl	_Z3addPfS_S_
	.type	_Z3addPfS_S_, @function
_Z3addPfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3addPfS_S_PfS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z3addPfS_S_, .-_Z3addPfS_S_
	.globl	_Z26__device_stub__Z5scalePfiiPfii
	.type	_Z26__device_stub__Z5scalePfiiPfii, @function
_Z26__device_stub__Z5scalePfiiPfii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z5scalePfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z26__device_stub__Z5scalePfiiPfii, .-_Z26__device_stub__Z5scalePfiiPfii
	.globl	_Z5scalePfii
	.type	_Z5scalePfii, @function
_Z5scalePfii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z5scalePfiiPfii
	.cfi_endproc
.LFE2055:
	.size	_Z5scalePfii, .-_Z5scalePfii
	.globl	_Z27__device_stub__Z6reducePfiiPfii
	.type	_Z27__device_stub__Z6reducePfiiPfii, @function
_Z27__device_stub__Z6reducePfiiPfii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6reducePfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L13:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z27__device_stub__Z6reducePfiiPfii, .-_Z27__device_stub__Z6reducePfiiPfii
	.globl	_Z6reducePfii
	.type	_Z6reducePfii, @function
_Z6reducePfii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z6reducePfiiPfii
	.cfi_endproc
.LFE2057:
	.size	_Z6reducePfii, .-_Z6reducePfii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Matrix a is :\n"
.LC3:
	.string	"\n %f "
.LC4:
	.string	"%lf "
.LC5:
	.string	"\n=========================================================="
.LC6:
	.string	"\nPerforming scaling \n"
.LC7:
	.string	"\nCopied matrix C is \n"
.LC8:
	.string	"\n%f  "
.LC9:
	.string	"\n"
.LC10:
	.string	"======================================================="
.LC11:
	.string	"\n Performing inplace verification \n"
.LC12:
	.string	"=================================================="
.LC13:
	.string	"\nThe b matrix\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$144, %esi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	subq	$640, %rsp
	.cfi_def_cfa_offset 688
	movq	%fs:40, %rax
	movq	%rax, 632(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	leaq	56(%rsp), %rbp
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$144, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$144, %esi
	call	cudaMalloc@PLT
	movl	$2, %edi
	call	srand@PLT
.L19:
	call	rand@PLT
	movl	$10, %ecx
	cltd
	idivl	%ecx
	incl	%edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$37, %rbx
	jne	.L19
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %r12
.L22:
	movl	%ebx, %eax
	movl	$6, %ecx
	leaq	.LC3(%rip), %rsi
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	cltd
	idivl	%ecx
	testl	%edx, %edx
	je	.L50
	movq	%r12, %rsi
.L50:
	movl	$2, %edi
	movb	$1, %al
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$36, %rbx
	jne	.L22
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	xorl	%ebp, %ebp
	movabsq	$4294967297, %rbx
	movl	$144, %edx
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L25:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rbx, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movq	8(%rsp), %rdi
	movl	%ebp, %edx
	movl	$6, %esi
	call	_Z26__device_stub__Z5scalePfiiPfii
.L23:
	movl	$5, %eax
	movq	%rbx, 48(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	subl	%ebp, %eax
	movl	52(%rsp), %ecx
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	%eax, 44(%rsp)
	movq	44(%rsp), %rdx
	movq	%rbx, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	8(%rsp), %rdi
	movl	%ebp, %edx
	movl	$6, %esi
	call	_Z27__device_stub__Z6reducePfiiPfii
.L24:
	incl	%ebp
	cmpl	$6, %ebp
	jne	.L25
	movq	8(%rsp), %rsi
	leaq	200(%rsp), %r12
	movl	$2, %ecx
	xorl	%ebx, %ebx
	movl	$144, %edx
	movq	%r12, %rdi
	leaq	.LC4(%rip), %rbp
	call	cudaMemcpy@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L28:
	movl	%ebx, %eax
	movl	$6, %ecx
	leaq	.LC8(%rip), %rsi
	cvtss2sd	(%r12,%rbx,4), %xmm0
	cltd
	idivl	%ecx
	testl	%edx, %edx
	je	.L51
	movq	%rbp, %rsi
.L51:
	movl	$2, %edi
	movb	$1, %al
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$36, %rbx
	jne	.L28
	leaq	.LC9(%rip), %rbp
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%rbp, %rsi
	call	__printf_chk@PLT
	movq	%rbx, %rcx
	movq	%r12, %rsi
	xorl	%eax, %eax
	leaq	344(%rsp), %rdi
	leaq	488(%rsp), %rbx
	rep movsl
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$2, %edi
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	344(%rsp), %r10
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	movq	%r10, %r8
.L29:
	movq	%r10, %rsi
	xorl	%edx, %edx
.L33:
	movq	%rsi, %r9
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L32:
	movl	%eax, %r11d
	xorps	%xmm0, %xmm0
	cmpl	%ecx, %eax
	jg	.L30
	movss	(%r8,%rax,4), %xmm0
.L30:
	movss	.LC1(%rip), %xmm2
	cmpl	%edx, %r11d
	je	.L31
	xorps	%xmm2, %xmm2
	jge	.L31
	movss	(%r9), %xmm2
.L31:
	mulss	%xmm2, %xmm0
	incq	%rax
	addq	$24, %r9
	addss	%xmm0, %xmm1
	cmpq	$6, %rax
	jne	.L32
	movss	%xmm1, (%rdi,%rdx,4)
	incq	%rdx
	addq	$4, %rsi
	cmpq	$6, %rdx
	jne	.L33
	incl	%ecx
	addq	$24, %rdi
	addq	$24, %r8
	cmpl	$6, %ecx
	jne	.L29
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	144(%rbx), %r13
	leaq	.LC4(%rip), %r14
.L35:
	xorl	%r12d, %r12d
.L36:
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r12
	cmpq	$6, %r12
	jne	.L36
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$24, %rbx
	call	__printf_chk@PLT
	cmpq	%rbx, %r13
	jne	.L35
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	632(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$640, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z6reducePfii"
.LC15:
	.string	"_Z5scalePfii"
.LC16:
	.string	"_Z3addPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6reducePfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5scalePfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3addPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>

#define N 6

__global__ void add( float *a, float *b, float *c) {
	int tid = blockIdx.x;	//Handle the data at the index

		c[tid] = a[tid] + b[tid];
}


__global__ void scale(float *a, int size, int index){
 	int i;
	int start=(index*size+index);
	int end=(index*size+size);
	
	for(i=start+1;i<end;i++){
		a[i]=(a[i]/a[start]);
	}

}

__global__ void reduce(float *a, int size, int index){
	int i;
        int tid=threadIdx.x;
	int start= ((index+tid+1)*size+index);
	int end= ((index+tid+1)*size+size);

        for(i=start+1;i<end;i++){
                 // a[i]=a[i]-(a[start]*a[(index*size)+i]);
		 a[i]=a[i]-(a[start]*a[(index*size)+(index+(i-start))]);
        }

}


int main(){
	float a[(N*N)], c[(N*N)];
	float result[N][N],b[N][N];
	float *dev_a, *dev_b, *dev_c;
	int i;
	int j;
	int k;
	float l1;
	float u1;

        int threads=((N*N)-1);	
	//allocate the memory on the GPU
	hipMalloc ( (void**)&dev_a, N*N* sizeof (float) );
	hipMalloc ( (void**)&dev_b, N*N* sizeof (float) );
	hipMalloc ( (void**)&dev_c, N*N* sizeof (float) );


	srand((unsigned)2);
	//fill the arrays 'a' and 'b' on the CPU
	for ( i = 0; i <= (N*N); i++) {
		a[i] =((rand()%10)+1);
	}
	
	printf("Matrix a is :\n");
	for(i=0; i<(N*N); i++){
           if(i%N==0)
          printf("\n %f ", a[i]);
           else printf("%lf ",a[i]);
         }

	hipMemcpy( dev_a, a, N*N*sizeof(float), hipMemcpyHostToDevice);//copy array to device memory
       
        /*Perform LU Decomposition*/
      	printf("\n=========================================================="); 
	for(i=0;i<N;i++){
        printf("\nPerforming scaling \n");
        scale<<<1,1>>>(dev_a,N,i);
      	reduce<<<1,(N-i-1)>>>(dev_a,N,i);

       /* 
        scale<<<1,1>>>(dev_a,N,0);//scaling step
        reduce<<<1, (N-0-1)>>>(dev_a, N, 0);//reduction step
	
	scale<<<1,1>>>(dev_a,N,1);
 	reduce<<<1,(N-1-1)>>>(dev_a,N,1);
	scale<<<1,1>>>(dev_a,N,2);
 	reduce<<<1,(N-2-1)>>>(dev_a,N,2);
	scale<<<1,1>>>(dev_a,N,3);
 	reduce<<<1,(N-3-1)>>>(dev_a,N,3);
	scale<<<1,1>>>(dev_a,N,4);
 	reduce<<<1,(N-4-1)>>>(dev_a,N,4);
	scale<<<1,1>>>(dev_a,N,5);
 	reduce<<<1,(N-5-1)>>>(dev_a,N,5);*/
       }
        /*LU decomposition ends here*/

	hipMemcpy( c, dev_a, N*N*sizeof(float),hipMemcpyDeviceToHost );//copy array back to host

       //display the results
	printf("\nCopied matrix C is \n");
	for ( i = 0; i < (N*N); i++) {
               if(i%N==0)
		printf( "\n%f  ", c[i]);  
               else printf("%lf ",c[i]);
	}
	printf("\n");	

	/*copy the result matrix into explicit 2D matrix for verification*/
        for(i=0;i<N;i++){
             for(j=0;j<N;j++){
		result[i][j]=c[i*N+j];
		}
        }

        /*printf("The result matrix\n");	
        for(i=0;i<N;i++){
         	for(j=0;j<N;j++){
		printf("%lf ",result[i][j]);	
		}
	  printf("\n");
          }*/

	printf("=======================================================");
	printf("\n Performing inplace verification \n");
        /*Inplace verification step*/

        for(i=0;i<N;i++){
           for(j=0;j<N;j++){
                b[i][j]=0;
              for(k=0;k<N;k++){
                 if(i>=k)l1=result[i][k];
                  else l1=0;

                  if(k==j)u1=1;
                  else if(k<j)u1=result[k][j];//figured it out 
                  else u1=0.0;

               b[i][j]=b[i][j]+(l1*u1);

             }
           }
         }


        printf("==================================================");
         printf("\nThe b matrix\n");	

         for(i=0;i<N;i++){
         	for(j=0;j<N;j++){
		printf("%lf ",b[i][j]);	
		}
	  printf("\n");
          }


	//free the memory allocated on the GPU
	hipFree( dev_a );
	hipFree( dev_b );
	hipFree( dev_c );
	
	return 0;
}
	.text
	.file	"LU.hip"
	.globl	_Z18__device_stub__addPfS_S_    # -- Begin function _Z18__device_stub__addPfS_S_
	.type	_Z18__device_stub__addPfS_S_,@function
_Z18__device_stub__addPfS_S_:           # @_Z18__device_stub__addPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addPfS_S_, .Lfunc_end0-_Z18__device_stub__addPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__scalePfii    # -- Begin function _Z20__device_stub__scalePfii
	.type	_Z20__device_stub__scalePfii,@function
_Z20__device_stub__scalePfii:           # @_Z20__device_stub__scalePfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5scalePfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20__device_stub__scalePfii, .Lfunc_end1-_Z20__device_stub__scalePfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__reducePfii   # -- Begin function _Z21__device_stub__reducePfii
	.type	_Z21__device_stub__reducePfii,@function
_Z21__device_stub__reducePfii:          # @_Z21__device_stub__reducePfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6reducePfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z21__device_stub__reducePfii, .Lfunc_end2-_Z21__device_stub__reducePfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$608, %rsp                      # imm = 0x260
	.cfi_def_cfa_offset 640
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	8(%rsp), %rdi
	movl	$144, %esi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$144, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$144, %esi
	callq	hipMalloc
	movl	$2, %edi
	callq	srand
	xorl	%ebx, %ebx
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, 320(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$37, %rbx
	jne	.LBB3_1
# %bb.2:
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB3_3:                                # =>This Inner Loop Header: Depth=1
	movzbl	%r14b, %eax
	imull	$171, %eax, %eax
	shrl	$9, %eax
	andl	$-2, %eax
	leal	(%rax,%rax,2), %eax
	movl	$.L.str.1, %edi
	addb	%bl, %al
	je	.LBB3_5
# %bb.4:                                #   in Loop: Header=BB3_3 Depth=1
	movl	$.L.str.2, %edi
.LBB3_5:                                #   in Loop: Header=BB3_3 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	320(%rsp,%r14,4), %xmm0
	movb	$1, %al
	callq	printf
	incq	%r14
	decb	%bl
	cmpq	$36, %r14
	jne	.LBB3_3
# %bb.6:
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	movq	8(%rsp), %rdi
	leaq	320(%rsp), %rsi
	movl	$144, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%r14d, %r14d
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	4(%rbx), %r15
.LBB3_7:                                # =>This Inner Loop Header: Depth=1
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_9
# %bb.8:                                #   in Loop: Header=BB3_7 Depth=1
	movq	8(%rsp), %rdi
	movl	$6, %esi
	movl	%r14d, %edx
	callq	_Z20__device_stub__scalePfii
.LBB3_9:                                #   in Loop: Header=BB3_7 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_11
# %bb.10:                               #   in Loop: Header=BB3_7 Depth=1
	movq	8(%rsp), %rdi
	movl	$6, %esi
	movl	%r14d, %edx
	callq	_Z21__device_stub__reducePfii
.LBB3_11:                               #   in Loop: Header=BB3_7 Depth=1
	incq	%r14
	decq	%r15
	cmpq	$6, %r14
	jne	.LBB3_7
# %bb.12:
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movl	$144, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB3_13:                               # =>This Inner Loop Header: Depth=1
	movzbl	%r14b, %eax
	imull	$171, %eax, %eax
	shrl	$9, %eax
	andl	$-2, %eax
	leal	(%rax,%rax,2), %eax
	movl	$.L.str.6, %edi
	addb	%bl, %al
	je	.LBB3_15
# %bb.14:                               #   in Loop: Header=BB3_13 Depth=1
	movl	$.L.str.2, %edi
.LBB3_15:                               #   in Loop: Header=BB3_13 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	32(%rsp,%r14,4), %xmm0
	movb	$1, %al
	callq	printf
	incq	%r14
	decb	%bl
	cmpq	$36, %r14
	jne	.LBB3_13
# %bb.16:
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%eax, %eax
.LBB3_17:                               # %.preheader86
                                        # =>This Inner Loop Header: Depth=1
	movq	48(%rsp,%rax), %rcx
	movq	%rcx, 192(%rsp,%rax)
	movups	32(%rsp,%rax), %xmm0
	movups	%xmm0, 176(%rsp,%rax)
	addq	$24, %rax
	cmpq	$144, %rax
	jne	.LBB3_17
# %bb.18:
	xorl	%ebx, %ebx
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	leaq	176(%rsp), %rax
	movss	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movq	%rax, %rcx
.LBB3_19:                               # %.preheader85
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_20 Depth 2
                                        #       Child Loop BB3_21 Depth 3
	leaq	(%rbx,%rbx,2), %rdx
	leaq	(%rsp,%rdx,8), %rdx
	addq	$464, %rdx                      # imm = 0x1D0
	movq	%rax, %rsi
	xorl	%edi, %edi
.LBB3_20:                               #   Parent Loop BB3_19 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_21 Depth 3
	leaq	(%rdx,%rdi,4), %r8
	xorps	%xmm1, %xmm1
	movq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB3_21:                               #   Parent Loop BB3_19 Depth=1
                                        #     Parent Loop BB3_20 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm2, %xmm2
	cmpq	%r10, %rbx
	jb	.LBB3_23
# %bb.22:                               #   in Loop: Header=BB3_21 Depth=3
	movss	(%rcx,%r10,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
.LBB3_23:                               #   in Loop: Header=BB3_21 Depth=3
	movaps	%xmm0, %xmm3
	cmpq	%r10, %rdi
	je	.LBB3_26
# %bb.24:                               #   in Loop: Header=BB3_21 Depth=3
	xorps	%xmm3, %xmm3
	jbe	.LBB3_26
# %bb.25:                               #   in Loop: Header=BB3_21 Depth=3
	movss	(%r9), %xmm3                    # xmm3 = mem[0],zero,zero,zero
.LBB3_26:                               #   in Loop: Header=BB3_21 Depth=3
	mulss	%xmm3, %xmm2
	addss	%xmm2, %xmm1
	incq	%r10
	addq	$24, %r9
	cmpq	$6, %r10
	jne	.LBB3_21
# %bb.27:                               #   in Loop: Header=BB3_20 Depth=2
	movss	%xmm1, (%r8)
	incq	%rdi
	addq	$4, %rsi
	cmpq	$6, %rdi
	jne	.LBB3_20
# %bb.28:                               #   in Loop: Header=BB3_19 Depth=1
	incq	%rbx
	addq	$24, %rcx
	cmpq	$6, %rbx
	jne	.LBB3_19
# %bb.29:
	xorl	%ebx, %ebx
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	leaq	464(%rsp), %r14
.LBB3_30:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_31 Depth 2
	xorl	%r15d, %r15d
.LBB3_31:                               #   Parent Loop BB3_30 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$6, %r15
	jne	.LBB3_31
# %bb.32:                               #   in Loop: Header=BB3_30 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbx
	addq	$24, %r14
	cmpq	$6, %rbx
	jne	.LBB3_30
# %bb.33:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$608, %rsp                      # imm = 0x260
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5scalePfii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6reducePfii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3addPfS_S_,@object            # @_Z3addPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3addPfS_S_
	.p2align	3, 0x0
_Z3addPfS_S_:
	.quad	_Z18__device_stub__addPfS_S_
	.size	_Z3addPfS_S_, 8

	.type	_Z5scalePfii,@object            # @_Z5scalePfii
	.globl	_Z5scalePfii
	.p2align	3, 0x0
_Z5scalePfii:
	.quad	_Z20__device_stub__scalePfii
	.size	_Z5scalePfii, 8

	.type	_Z6reducePfii,@object           # @_Z6reducePfii
	.globl	_Z6reducePfii
	.p2align	3, 0x0
_Z6reducePfii:
	.quad	_Z21__device_stub__reducePfii
	.size	_Z6reducePfii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"\n %f "
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%lf "
	.size	.L.str.2, 5

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n=========================================================="
	.size	.L.str.3, 60

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\n%f  "
	.size	.L.str.6, 6

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"======================================================="
	.size	.L.str.8, 56

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"=================================================="
	.size	.L.str.10, 51

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPfS_S_"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z5scalePfii"
	.size	.L__unnamed_2, 13

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z6reducePfii"
	.size	.L__unnamed_3, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Matrix a is :"
	.size	.Lstr, 14

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\nCopied matrix C is "
	.size	.Lstr.1, 21

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\n Performing inplace verification "
	.size	.Lstr.2, 35

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\nThe b matrix"
	.size	.Lstr.3, 14

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"\nPerforming scaling "
	.size	.Lstr.4, 21

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPfS_S_
	.addrsig_sym _Z20__device_stub__scalePfii
	.addrsig_sym _Z21__device_stub__reducePfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addPfS_S_
	.addrsig_sym _Z5scalePfii
	.addrsig_sym _Z6reducePfii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPfS_S_            ; -- Begin function _Z3addPfS_S_
	.globl	_Z3addPfS_S_
	.p2align	8
	.type	_Z3addPfS_S_,@function
_Z3addPfS_S_:                           ; @_Z3addPfS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_ashr_i32 s3, s15, 31
	s_load_b64 s[0:1], s[0:1], 0x10
	s_lshl_b64 s[2:3], s[2:3], 2
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s4, s2
	s_addc_u32 s5, s5, s3
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s5, s[6:7], 0x0
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e64 v0, s4, s5
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPfS_S_, .Lfunc_end0-_Z3addPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 108
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5scalePfii            ; -- Begin function _Z5scalePfii
	.globl	_Z5scalePfii
	.p2align	8
	.type	_Z5scalePfii,@function
_Z5scalePfii:                           ; @_Z5scalePfii
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s3, s5
	s_add_i32 s4, s3, s4
	s_add_i32 s5, s2, 1
	s_cmp_ge_i32 s5, s4
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[0:1], s[0:1], 0x0
	s_ashr_i32 s3, s2, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[2:3], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_add_u32 s2, s0, 4
	s_addc_u32 s3, s1, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_clause 0x1
	global_load_b32 v1, v0, s[2:3]
	global_load_b32 v2, v0, s[0:1]
	s_add_i32 s5, s5, 1
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v3, null, v2, v2, v1
	v_div_scale_f32 v6, vcc_lo, v1, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	v_fmac_f32_e32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v6, v4
	v_fma_f32 v7, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v7, v4
	v_fma_f32 v3, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v4, v5
	v_div_fixup_f32 v1, v3, v2, v1
	global_store_b32 v0, v1, s[2:3]
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_lt_i32 s5, s4
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5scalePfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z5scalePfii, .Lfunc_end1-_Z5scalePfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 8
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6reducePfii           ; -- Begin function _Z6reducePfii
	.globl	_Z6reducePfii
	.p2align	8
	.type	_Z6reducePfii,@function
_Z6reducePfii:                          ; @_Z6reducePfii
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x8
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, s5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s4, v2, s[4:5]
	v_add_nc_u32_e32 v2, s5, v0
	v_add_nc_u32_e32 v5, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 1, v2
	v_cmpx_lt_i32_e64 v0, v5
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[2:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s0, s4, 1
	s_mov_b32 s1, 0
	s_mul_i32 s0, s0, s5
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	s_add_i32 s4, s0, 1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v7, vcc_lo
	v_mov_b32_e32 v6, 0
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	s_ashr_i32 s5, s4, 31
	global_load_b32 v7, v[3:4], off
	s_lshl_b64 s[6:7], s[4:5], 2
	global_load_b32 v8, v[1:2], off
	s_add_u32 s6, s2, s6
	s_addc_u32 s7, s3, s7
	v_add_nc_u32_e32 v0, 1, v0
	global_load_b32 v9, v6, s[6:7]
	s_add_i32 s4, s4, 1
	v_cmp_ge_i32_e32 vcc_lo, v0, v5
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_fma_f32 v7, -v8, v9, v7
	global_store_b32 v[3:4], v7, off
	v_add_co_u32 v3, s0, v3, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, 0, v4, s0
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_2
.LBB2_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6reducePfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z6reducePfii, .Lfunc_end2-_Z6reducePfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 10
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z3addPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5scalePfii
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z5scalePfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6reducePfii
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z6reducePfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
