#include "cuda.h"
#include "StereoMatchKernels.cuh"

// TODO Subpixel Genauigkeit
__global__ void kernelStereoMatchL2R(unsigned char* dev_leftImg,
		unsigned char* dev_rightImg, float* dev_disparity, int width,
		int height, int kernelSize, int maxDisp, bool colorInput,
		bool subPixel) {

	int idx = threadIdx.x + blockIdx.x * blockDim.x;
	int imgX = idx % width;
	int imgY = idx / width;
	int imgSize = width * height;
	int halfKS = kernelSize / 2;

	bool doCalc = imgY > halfKS && imgY < height - halfKS && imgX > halfKS
			&& imgX < width - halfKS;

	int bytesPerPixel = colorInput ? 3 : 1;

	// Berechne disparitätswert für pixel idx
	if (doCalc) {
		// x,y gegeben. Berechne x2 und disparität
		int bestSAD = 65532;
		int bestDisparity = 0;
		unsigned char* pX1L = dev_leftImg
				+ (idx - halfKS - halfKS * width) * bytesPerPixel; // Zeiger auf Anfang des Kernel
		unsigned char* pX1R = dev_rightImg
				+ (idx - halfKS - halfKS * width) * bytesPerPixel;

		for (int currDisp = 0; currDisp >= -maxDisp; currDisp--) {
			if (currDisp + imgX < 0)
				break;

			int sad = 0;
			unsigned char* pL = pX1L;
			unsigned char* pR = pX1R + currDisp * bytesPerPixel;

			// Berechne SAD (y,x1,x2)
			for (int dy = -halfKS; dy <= halfKS; dy++) {
				for (int dx = -halfKS; dx <= halfKS; dx++) {
					if (colorInput)
						// Color diff
//						sad += sqrtf((*pL - *pR) * (*pL++ - *pR++)
//								  + (*pL - *pR) * (*pL++ - *pR++)
//								  + (*pL - *pR) * (*pL++ - *pR++));
						sad += abs(*pL++ - *pR++) + abs(*pL++ - *pR++)
								+ abs(*pL++ - *pR++);
					else
						sad += abs(*pL++ - *pR++);	// delta;

				}
				pL += (width - kernelSize) * bytesPerPixel;
				pR += (width - kernelSize) * bytesPerPixel;
			}

			if (sad < bestSAD) {
				bestSAD = sad;
				bestDisparity = currDisp;
			}
		}
		dev_disparity[idx] = abs(bestDisparity);
	}
	__syncthreads();

}
__global__ void kernelStereoMatchR2L(unsigned char* dev_leftImg,
		unsigned char* dev_rightImg, float* dev_disparity, int width,
		int height, int kernelSize, int maxDisp, bool colorInput,
		bool subPixel) {

	int idx = threadIdx.x + blockIdx.x * blockDim.x;
	int imgX = idx % width;
	int imgY = idx / width;
	int imgSize = width * height;
	int halfKS = kernelSize / 2;

	bool doCalc = imgY > halfKS && imgY < height - halfKS && imgX > halfKS
			&& imgX < width - halfKS;

	int bytesPerPixel = colorInput ? 3 : 1;

	// Berechne disparitätswert für pixel idx
	if (doCalc) {
		// x,y gegeben. Berechne x2 und disparität
		int bestSAD = 65532;
		int bestDisparity = 0;
		unsigned char* pX1L = dev_leftImg
				+ (idx - halfKS - halfKS * width) * bytesPerPixel;// Zeiger auf Anfang des Kernel
		unsigned char* pX1R = dev_rightImg
				+ (idx - halfKS - halfKS * width) * bytesPerPixel;

		for (int currDisp = 0; currDisp <= maxDisp; currDisp++) {
			if (currDisp + imgX >= width)
				break;

			int sad = 0;
			unsigned char* pL = pX1L + currDisp * bytesPerPixel;
			unsigned char* pR = pX1R;

			// Berechne SAD (y,x1,x2)
			for (int dy = -halfKS; dy <= halfKS; dy++) {
				for (int dx = -halfKS; dx <= halfKS; dx++) {
					if (colorInput)
						// Color diff
//						sad += sqrtf((*pL - *pR) * (*pL++ - *pR++)
//								  + (*pL - *pR) * (*pL++ - *pR++)
//								  + (*pL - *pR) * (*pL++ - *pR++));
						sad += abs(*pL++ - *pR++) + abs(*pL++ - *pR++)
								+ abs(*pL++ - *pR++);
					else
						sad += abs(*pL++ - *pR++);	// delta;

				}
				pL += (width - kernelSize) * bytesPerPixel;
				pR += (width - kernelSize) * bytesPerPixel;
			}

			if (sad < bestSAD) {
				bestSAD = sad;
				bestDisparity = currDisp;
			}
		}
		dev_disparity[idx] = abs(bestDisparity);
	}
	__syncthreads();

}
__global__ void kernelLRConsistencyCheck(float* dev_dispLeft,
		float* dev_dispRight, int width, int height, int kernelSize,
		int consistencyTreshold, bool colorInput) {
	int idx = threadIdx.x + blockIdx.x * blockDim.x;
	int imgX = idx % width;
	int imgY = idx / width;
	int imgSize = width * height;
	int halfKS = kernelSize / 2;

	bool doCalc = imgY > halfKS && imgY < height - halfKS && imgX > halfKS
			&& imgX < width - halfKS;

	if (doCalc) {
		int xR = imgX - dev_dispLeft[idx];
		if (xR < 0 || xR >= width) {
			dev_dispLeft[idx] = 0;
			dev_dispRight[idx] = 0;
		} else {
			int idxR = imgY * width + xR;
			if (abs(int(dev_dispLeft[idx] - dev_dispRight[idxR]))
					> consistencyTreshold) {
				dev_dispLeft[idx] = 0;
				dev_dispRight[idx] = 0;
			}
		}
	}
}

	.file	"tmpxft_0021bd7e_00000000-6_StereoMatchKernels.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z50__device_stub__Z20kernelStereoMatchL2RPhS_PfiiiibbPhS_Pfiiiibb
	.type	_Z50__device_stub__Z20kernelStereoMatchL2RPhS_PfiiiibbPhS_Pfiiiibb, @function
_Z50__device_stub__Z20kernelStereoMatchL2RPhS_PfiiiibbPhS_Pfiiiibb:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movl	216(%rsp), %eax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movb	%al, 8(%rsp)
	movl	224(%rsp), %eax
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movb	%al, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z20kernelStereoMatchL2RPhS_Pfiiiibb(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z50__device_stub__Z20kernelStereoMatchL2RPhS_PfiiiibbPhS_Pfiiiibb, .-_Z50__device_stub__Z20kernelStereoMatchL2RPhS_PfiiiibbPhS_Pfiiiibb
	.globl	_Z20kernelStereoMatchL2RPhS_Pfiiiibb
	.type	_Z20kernelStereoMatchL2RPhS_Pfiiiibb, @function
_Z20kernelStereoMatchL2RPhS_Pfiiiibb:
.LFB2033:
	.cfi_startproc
	endbr64
	movzbl	24(%rsp), %eax
	movl	%eax, 24(%rsp)
	movzbl	16(%rsp), %eax
	movl	%eax, 16(%rsp)
	jmp	_Z50__device_stub__Z20kernelStereoMatchL2RPhS_PfiiiibbPhS_Pfiiiibb
	.cfi_endproc
.LFE2033:
	.size	_Z20kernelStereoMatchL2RPhS_Pfiiiibb, .-_Z20kernelStereoMatchL2RPhS_Pfiiiibb
	.globl	_Z50__device_stub__Z20kernelStereoMatchR2LPhS_PfiiiibbPhS_Pfiiiibb
	.type	_Z50__device_stub__Z20kernelStereoMatchR2LPhS_PfiiiibbPhS_Pfiiiibb, @function
_Z50__device_stub__Z20kernelStereoMatchR2LPhS_PfiiiibbPhS_Pfiiiibb:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movl	216(%rsp), %eax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movb	%al, 8(%rsp)
	movl	224(%rsp), %eax
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movb	%al, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z20kernelStereoMatchR2LPhS_Pfiiiibb(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L8:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z50__device_stub__Z20kernelStereoMatchR2LPhS_PfiiiibbPhS_Pfiiiibb, .-_Z50__device_stub__Z20kernelStereoMatchR2LPhS_PfiiiibbPhS_Pfiiiibb
	.globl	_Z20kernelStereoMatchR2LPhS_Pfiiiibb
	.type	_Z20kernelStereoMatchR2LPhS_Pfiiiibb, @function
_Z20kernelStereoMatchR2LPhS_Pfiiiibb:
.LFB2035:
	.cfi_startproc
	endbr64
	movzbl	24(%rsp), %eax
	movl	%eax, 24(%rsp)
	movzbl	16(%rsp), %eax
	movl	%eax, 16(%rsp)
	jmp	_Z50__device_stub__Z20kernelStereoMatchR2LPhS_PfiiiibbPhS_Pfiiiibb
	.cfi_endproc
.LFE2035:
	.size	_Z20kernelStereoMatchR2LPhS_Pfiiiibb, .-_Z20kernelStereoMatchR2LPhS_Pfiiiibb
	.globl	_Z51__device_stub__Z24kernelLRConsistencyCheckPfS_iiiibPfS_iiiib
	.type	_Z51__device_stub__Z24kernelLRConsistencyCheckPfS_iiiibPfS_iiiib, @function
_Z51__device_stub__Z24kernelLRConsistencyCheckPfS_iiiibPfS_iiiib:
.LFB2036:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	192(%rsp), %eax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movl	%r9d, 16(%rsp)
	movb	%al, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z24kernelLRConsistencyCheckPfS_iiiib(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L13:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z51__device_stub__Z24kernelLRConsistencyCheckPfS_iiiibPfS_iiiib, .-_Z51__device_stub__Z24kernelLRConsistencyCheckPfS_iiiibPfS_iiiib
	.globl	_Z24kernelLRConsistencyCheckPfS_iiiib
	.type	_Z24kernelLRConsistencyCheckPfS_iiiib, @function
_Z24kernelLRConsistencyCheckPfS_iiiib:
.LFB2037:
	.cfi_startproc
	endbr64
	movzbl	8(%rsp), %eax
	movl	%eax, 8(%rsp)
	jmp	_Z51__device_stub__Z24kernelLRConsistencyCheckPfS_iiiibPfS_iiiib
	.cfi_endproc
.LFE2037:
	.size	_Z24kernelLRConsistencyCheckPfS_iiiib, .-_Z24kernelLRConsistencyCheckPfS_iiiib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z24kernelLRConsistencyCheckPfS_iiiib"
.LC1:
	.string	"_Z20kernelStereoMatchR2LPhS_Pfiiiibb"
.LC2:
	.string	"_Z20kernelStereoMatchL2RPhS_Pfiiiibb"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z24kernelLRConsistencyCheckPfS_iiiib(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20kernelStereoMatchR2LPhS_Pfiiiibb(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20kernelStereoMatchL2RPhS_Pfiiiibb(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#ifndef _CUDA_STEREO_MATCH_KERNELS_
#define _CUDA_STEREO_MATCH_KERNELS_

__global__ void kernelStereoMatchL2R(unsigned char* dev_leftImg,
		unsigned char* dev_rightImg, float* dev_disparity, int width,
		int height, int kernelSize, int maxDisp, bool colorInput,
		bool subPixel);
__global__ void kernelStereoMatchR2L(unsigned char* dev_leftImg,
		unsigned char* dev_rightImg, float* dev_disparity, int width,
		int height, int kernelSize, int maxDisp, bool colorInput,
		bool subPixel);
__global__ void kernelLRConsistencyCheck(float* dev_dispLeft,
		float* dev_dispRight, int width, int height, int kernelSize,
		int consistencyTreshold, bool colorInput);

#endif

	.text
	.file	"StereoMatchKernels.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
