/*
 * Device code.
 */

#ifndef _OSM_KERNEL_H_
#define _OSM_KERNEL_H_

#include <stdio.h>
#include <cuda.h>

#define SQR(x)  ((x)*(x))

__device__ __host__ float 
pnt_dist(const float4 pnt1, const float4 pnt2)
{
    return sqrt(SQR(pnt1.x-pnt2.x) + SQR(pnt1.y-pnt2.y) + SQR(pnt1.z-pnt2.z));
}

__device__ __host__ float 
overlapping(const float r1, const float r2, const float dist)
// доля от суммы радиусов
{
    float result = 0;
    if (dist < (r1+r2))    {
        float S = sqrt((r1+r2+dist)*(r2+dist-r1)*(r1+dist-r2)*(r1+r2-dist))/4;
        float h = 2 * S / dist;
        result = 2 * h / (r1 + r2);
    }
    return result;
}    

__device__ __host__ int 
is_overlapped(const float4 pnt1, const float4 pnt2, const float max_overlapping)
{
    float d = pnt_dist(pnt1, pnt2);
    float radius_sum = pnt1.w + pnt2.w;
    return (d < radius_sum && (overlapping(pnt1.w, pnt2.w, d) > max_overlapping));
}

__device__ __host__ int
slightly_overlap(const float4 pnt1, const float4 pnt2, const float max_overlapping)
{   
    float d = pnt_dist(pnt1, pnt2);
    float radius_sum = pnt1.w + pnt2.w;
    return (d < radius_sum && (overlapping(pnt1.w, pnt2.w, d) <= max_overlapping));
}

//__global__ void 
//overlap_list(float4 * spheres, float4 curr_sph, int * results, int * res_cnt, float max_overlapping, int curr_cnt)
//{
//    int idx = blockIdx.x * blockDim.x + threadIdx.x;
//    if (idx < curr_cnt)
//    {
//        float4 cmp_sph = spheres[idx];
//        if (is_overlapped(curr_sph, cmp_sph, max_overlapping))
//        {
//            int old_cnt = atomicAdd(res_cnt, 1);
//            results[old_cnt+1] = idx;
//        }
//    }
//}

__global__ void 
nei_list(float4 * spheres, float4 curr_sph, int * results, int * res_cnt, int curr_cnt)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < curr_cnt)
    {
        float4 cmp_sph = spheres[idx];
        if (pnt_dist(cmp_sph, curr_sph) < 3 * curr_sph.w)
        {
            int old_cnt = atomicAdd(res_cnt, 1);
            results[old_cnt] = idx;
        }
    }
}

__global__ void 
slight_nei_list(float4 * spheres, int curr_sph_idx, int sph_cnt, float max_overlap, int * results)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx > curr_sph_idx && idx < sph_cnt)
    {
        float4 cmp_sph = spheres[idx];
        if (slightly_overlap(cmp_sph, spheres[curr_sph_idx], max_overlap))
        {
            int old_cnt = atomicAdd(results, 1);
            results[old_cnt+1] = idx;
        }
    }
}

#endif // #ifndef _OSM_KERNEL_H_

	.file	"tmpxft_00251218_00000000-6_OSM_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8pnt_dist6float4S_
	.type	_Z8pnt_dist6float4S_, @function
_Z8pnt_dist6float4S_:
.LFB2027:
	.cfi_startproc
	endbr64
	movq	%xmm0, %rax
	movq	%xmm2, %rcx
	movq	%xmm1, %rdx
	movq	%rax, %xmm4
	shrq	$32, %rcx
	subss	%xmm2, %xmm0
	movd	%edx, %xmm2
	movd	%ecx, %xmm5
	shufps	$85, %xmm4, %xmm4
	movaps	%xmm4, %xmm1
	subss	%xmm3, %xmm2
	subss	%xmm5, %xmm1
	mulss	%xmm0, %xmm0
	mulss	%xmm2, %xmm2
	mulss	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	addss	%xmm2, %xmm0
	jmp	sqrtf@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z8pnt_dist6float4S_, .-_Z8pnt_dist6float4S_
	.globl	_Z11overlappingfff
	.type	_Z11overlappingfff, @function
_Z11overlappingfff:
.LFB2028:
	.cfi_startproc
	endbr64
	movaps	%xmm0, %xmm4
	addss	%xmm1, %xmm4
	comiss	%xmm2, %xmm4
	jbe	.L8
	movaps	%xmm0, %xmm3
	movaps	%xmm1, %xmm0
	movaps	%xmm4, %xmm5
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	addss	%xmm2, %xmm0
	addss	%xmm2, %xmm5
	movss	%xmm4, 12(%rsp)
	movss	%xmm2, 8(%rsp)
	subss	%xmm3, %xmm0
	addss	%xmm2, %xmm3
	mulss	%xmm5, %xmm0
	subss	%xmm1, %xmm3
	movaps	%xmm4, %xmm1
	subss	%xmm2, %xmm1
	mulss	%xmm3, %xmm0
	mulss	%xmm1, %xmm0
	call	sqrtf@PLT
	mulss	.LC1(%rip), %xmm0
	movss	8(%rsp), %xmm2
	movss	12(%rsp), %xmm4
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	addss	%xmm0, %xmm0
	divss	%xmm2, %xmm0
	addss	%xmm0, %xmm0
	divss	%xmm4, %xmm0
	ret
.L8:
	xorps	%xmm0, %xmm0
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11overlappingfff, .-_Z11overlappingfff
	.globl	_Z13is_overlapped6float4S_f
	.type	_Z13is_overlapped6float4S_f, @function
_Z13is_overlapped6float4S_f:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%xmm1, %rax
	movq	%xmm3, %rdx
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rax, %rcx
	movq	%rdx, %rsi
	shrq	$32, %rcx
	shrq	$32, %rsi
	movq	%rcx, %rbx
	movq	%rsi, %r14
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movss	%xmm4, 12(%rsp)
	call	_Z8pnt_dist6float4S_
	movd	%r14d, %xmm5
	xorl	%eax, %eax
	movaps	%xmm0, %xmm2
	movd	%ebx, %xmm0
	addss	%xmm5, %xmm0
	comiss	%xmm2, %xmm0
	jbe	.L15
	movd	%r14d, %xmm1
	movd	%ebx, %xmm0
	call	_Z11overlappingfff
	comiss	12(%rsp), %xmm0
	seta	%al
.L15:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	movzbl	%al, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z13is_overlapped6float4S_f, .-_Z13is_overlapped6float4S_f
	.globl	_Z16slightly_overlap6float4S_f
	.type	_Z16slightly_overlap6float4S_f, @function
_Z16slightly_overlap6float4S_f:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%xmm1, %rax
	movq	%xmm3, %rdx
	movd	%xmm4, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rax, %rcx
	movq	%rdx, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	shrq	$32, %rcx
	shrq	$32, %rsi
	movq	%rcx, %rbx
	movq	%rsi, %r14
	call	_Z8pnt_dist6float4S_
	movd	%r14d, %xmm5
	xorl	%eax, %eax
	movaps	%xmm0, %xmm2
	movd	%ebx, %xmm0
	addss	%xmm5, %xmm0
	comiss	%xmm2, %xmm0
	jbe	.L22
	movd	%r14d, %xmm1
	movd	%ebx, %xmm0
	call	_Z11overlappingfff
	movd	%r15d, %xmm6
	comiss	%xmm0, %xmm6
	setnb	%al
.L22:
	popq	%rbx
	.cfi_def_cfa_offset 24
	movzbl	%al, %eax
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z16slightly_overlap6float4S_f, .-_Z16slightly_overlap6float4S_f
	.globl	_Z41__device_stub__Z8nei_listP6float4S_PiS1_iP6float4RS_PiS2_i
	.type	_Z41__device_stub__Z8nei_listP6float4S_PiS1_iP6float4RS_PiS2_i, @function
_Z41__device_stub__Z8nei_listP6float4S_PiS1_iP6float4RS_PiS2_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rsi, 104(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8nei_listP6float4S_PiS1_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L28:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z41__device_stub__Z8nei_listP6float4S_PiS1_iP6float4RS_PiS2_i, .-_Z41__device_stub__Z8nei_listP6float4S_PiS1_iP6float4RS_PiS2_i
	.globl	_Z8nei_listP6float4S_PiS1_i
	.type	_Z8nei_listP6float4S_PiS1_i, @function
_Z8nei_listP6float4S_PiS1_i:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%ecx, %r8d
	movq	%rdx, %rcx
	movq	%rsi, %rdx
	movq	%rsp, %rax
	movq	%xmm0, (%rsp)
	movq	%rax, %rsi
	movq	%xmm1, 8(%rsp)
	call	_Z41__device_stub__Z8nei_listP6float4S_PiS1_iP6float4RS_PiS2_i
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z8nei_listP6float4S_PiS1_i, .-_Z8nei_listP6float4S_PiS1_i
	.globl	_Z46__device_stub__Z15slight_nei_listP6float4iifPiP6float4iifPi
	.type	_Z46__device_stub__Z15slight_nei_listP6float4iifPiP6float4iifPi, @function
_Z46__device_stub__Z15slight_nei_listP6float4iifPiP6float4iifPi:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	40(%rsp), %rcx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15slight_nei_listP6float4iifPi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L34:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z46__device_stub__Z15slight_nei_listP6float4iifPiP6float4iifPi, .-_Z46__device_stub__Z15slight_nei_listP6float4iifPiP6float4iifPi
	.globl	_Z15slight_nei_listP6float4iifPi
	.type	_Z15slight_nei_listP6float4iifPi, @function
_Z15slight_nei_listP6float4iifPi:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z15slight_nei_listP6float4iifPiP6float4iifPi
	.cfi_endproc
.LFE2058:
	.size	_Z15slight_nei_listP6float4iifPi, .-_Z15slight_nei_listP6float4iifPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z15slight_nei_listP6float4iifPi"
.LC3:
	.string	"_Z8nei_listP6float4S_PiS1_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15slight_nei_listP6float4iifPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8nei_listP6float4S_PiS1_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1048576000
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * Device code.
 */

#ifndef _OSM_KERNEL_H_
#define _OSM_KERNEL_H_

#include <stdio.h>
#include <hip/hip_runtime.h>

#define SQR(x)  ((x)*(x))

__device__ __host__ float 
pnt_dist(const float4 pnt1, const float4 pnt2)
{
    return sqrt(SQR(pnt1.x-pnt2.x) + SQR(pnt1.y-pnt2.y) + SQR(pnt1.z-pnt2.z));
}

__device__ __host__ float 
overlapping(const float r1, const float r2, const float dist)
// доля от суммы радиусов
{
    float result = 0;
    if (dist < (r1+r2))    {
        float S = sqrt((r1+r2+dist)*(r2+dist-r1)*(r1+dist-r2)*(r1+r2-dist))/4;
        float h = 2 * S / dist;
        result = 2 * h / (r1 + r2);
    }
    return result;
}    

__device__ __host__ int 
is_overlapped(const float4 pnt1, const float4 pnt2, const float max_overlapping)
{
    float d = pnt_dist(pnt1, pnt2);
    float radius_sum = pnt1.w + pnt2.w;
    return (d < radius_sum && (overlapping(pnt1.w, pnt2.w, d) > max_overlapping));
}

__device__ __host__ int
slightly_overlap(const float4 pnt1, const float4 pnt2, const float max_overlapping)
{   
    float d = pnt_dist(pnt1, pnt2);
    float radius_sum = pnt1.w + pnt2.w;
    return (d < radius_sum && (overlapping(pnt1.w, pnt2.w, d) <= max_overlapping));
}

//__global__ void 
//overlap_list(float4 * spheres, float4 curr_sph, int * results, int * res_cnt, float max_overlapping, int curr_cnt)
//{
//    int idx = blockIdx.x * blockDim.x + threadIdx.x;
//    if (idx < curr_cnt)
//    {
//        float4 cmp_sph = spheres[idx];
//        if (is_overlapped(curr_sph, cmp_sph, max_overlapping))
//        {
//            int old_cnt = atomicAdd(res_cnt, 1);
//            results[old_cnt+1] = idx;
//        }
//    }
//}

__global__ void 
nei_list(float4 * spheres, float4 curr_sph, int * results, int * res_cnt, int curr_cnt)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < curr_cnt)
    {
        float4 cmp_sph = spheres[idx];
        if (pnt_dist(cmp_sph, curr_sph) < 3 * curr_sph.w)
        {
            int old_cnt = atomicAdd(res_cnt, 1);
            results[old_cnt] = idx;
        }
    }
}

__global__ void 
slight_nei_list(float4 * spheres, int curr_sph_idx, int sph_cnt, float max_overlap, int * results)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx > curr_sph_idx && idx < sph_cnt)
    {
        float4 cmp_sph = spheres[idx];
        if (slightly_overlap(cmp_sph, spheres[curr_sph_idx], max_overlap))
        {
            int old_cnt = atomicAdd(results, 1);
            results[old_cnt+1] = idx;
        }
    }
}

#endif // #ifndef _OSM_KERNEL_H_

	.text
	.file	"OSM_kernel.hip"
	.globl	_Z8pnt_dist15HIP_vector_typeIfLj4EES0_ # -- Begin function _Z8pnt_dist15HIP_vector_typeIfLj4EES0_
	.type	_Z8pnt_dist15HIP_vector_typeIfLj4EES0_,@function
_Z8pnt_dist15HIP_vector_typeIfLj4EES0_: # @_Z8pnt_dist15HIP_vector_typeIfLj4EES0_
	.cfi_startproc
# %bb.0:
	movq	%xmm0, %rax
	movd	%eax, %xmm0
	movq	%xmm2, %rcx
	movd	%ecx, %xmm2
	subss	%xmm2, %xmm0
	mulss	%xmm0, %xmm0
	shrq	$32, %rax
	movd	%eax, %xmm2
	shrq	$32, %rcx
	movd	%ecx, %xmm4
	subss	%xmm4, %xmm2
	mulss	%xmm2, %xmm2
	addss	%xmm0, %xmm2
	movq	%xmm1, %rax
	movd	%eax, %xmm0
	movq	%xmm3, %rax
	movd	%eax, %xmm1
	subss	%xmm1, %xmm0
	mulss	%xmm0, %xmm0
	addss	%xmm2, %xmm0
	sqrtss	%xmm0, %xmm0
	retq
.Lfunc_end0:
	.size	_Z8pnt_dist15HIP_vector_typeIfLj4EES0_, .Lfunc_end0-_Z8pnt_dist15HIP_vector_typeIfLj4EES0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z11overlappingfff
.LCPI1_0:
	.quad	0x3fd0000000000000              # double 0.25
	.text
	.globl	_Z11overlappingfff
	.type	_Z11overlappingfff,@function
_Z11overlappingfff:                     # @_Z11overlappingfff
	.cfi_startproc
# %bb.0:
	movaps	%xmm0, %xmm4
	addss	%xmm1, %xmm4
	xorps	%xmm3, %xmm3
	ucomiss	%xmm2, %xmm4
	jbe	.LBB1_5
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movaps	%xmm4, %xmm5
	addss	%xmm2, %xmm5
	movaps	%xmm1, %xmm3
	addss	%xmm2, %xmm3
	subss	%xmm0, %xmm3
	mulss	%xmm5, %xmm3
	addss	%xmm2, %xmm0
	subss	%xmm1, %xmm0
	mulss	%xmm3, %xmm0
	movaps	%xmm4, %xmm1
	subss	%xmm2, %xmm1
	mulss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB1_3
# %bb.2:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB1_4
.LBB1_3:                                # %call.sqrt
	movss	%xmm4, 4(%rsp)                  # 4-byte Spill
	movss	%xmm2, (%rsp)                   # 4-byte Spill
	callq	sqrt
	movss	(%rsp), %xmm2                   # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	4(%rsp), %xmm4                  # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
.LBB1_4:                                # %.split
	mulsd	.LCPI1_0(%rip), %xmm0
	xorps	%xmm3, %xmm3
	cvtsd2ss	%xmm0, %xmm3
	addss	%xmm3, %xmm3
	divss	%xmm2, %xmm3
	addss	%xmm3, %xmm3
	divss	%xmm4, %xmm3
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB1_5:
	movaps	%xmm3, %xmm0
	retq
.Lfunc_end1:
	.size	_Z11overlappingfff, .Lfunc_end1-_Z11overlappingfff
	.cfi_endproc
                                        # -- End function
	.globl	_Z13is_overlapped15HIP_vector_typeIfLj4EES0_f # -- Begin function _Z13is_overlapped15HIP_vector_typeIfLj4EES0_f
	.type	_Z13is_overlapped15HIP_vector_typeIfLj4EES0_f,@function
_Z13is_overlapped15HIP_vector_typeIfLj4EES0_f: # @_Z13is_overlapped15HIP_vector_typeIfLj4EES0_f
	.cfi_startproc
# %bb.0:
	movq	%xmm0, %rax
	movd	%eax, %xmm0
	movq	%xmm2, %rcx
	movd	%ecx, %xmm2
	subss	%xmm2, %xmm0
	mulss	%xmm0, %xmm0
	shrq	$32, %rax
	movd	%eax, %xmm2
	shrq	$32, %rcx
	movd	%ecx, %xmm5
	subss	%xmm5, %xmm2
	mulss	%xmm2, %xmm2
	addss	%xmm0, %xmm2
	movq	%xmm1, %rax
	movd	%eax, %xmm0
	movq	%xmm3, %rcx
	movd	%ecx, %xmm1
	subss	%xmm1, %xmm0
	mulss	%xmm0, %xmm0
	addss	%xmm2, %xmm0
	xorps	%xmm2, %xmm2
	sqrtss	%xmm0, %xmm2
	shrq	$32, %rax
	movd	%eax, %xmm0
	shrq	$32, %rcx
	movd	%ecx, %xmm1
	movdqa	%xmm0, %xmm3
	addss	%xmm1, %xmm3
	xorl	%eax, %eax
	ucomiss	%xmm2, %xmm3
	jbe	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movss	%xmm4, 4(%rsp)                  # 4-byte Spill
	callq	_Z11overlappingfff
	xorl	%eax, %eax
	ucomiss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	seta	%al
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	_Z13is_overlapped15HIP_vector_typeIfLj4EES0_f, .Lfunc_end2-_Z13is_overlapped15HIP_vector_typeIfLj4EES0_f
	.cfi_endproc
                                        # -- End function
	.globl	_Z16slightly_overlap15HIP_vector_typeIfLj4EES0_f # -- Begin function _Z16slightly_overlap15HIP_vector_typeIfLj4EES0_f
	.type	_Z16slightly_overlap15HIP_vector_typeIfLj4EES0_f,@function
_Z16slightly_overlap15HIP_vector_typeIfLj4EES0_f: # @_Z16slightly_overlap15HIP_vector_typeIfLj4EES0_f
	.cfi_startproc
# %bb.0:
	movq	%xmm0, %rax
	movd	%eax, %xmm0
	movq	%xmm2, %rcx
	movd	%ecx, %xmm2
	subss	%xmm2, %xmm0
	mulss	%xmm0, %xmm0
	shrq	$32, %rax
	movd	%eax, %xmm2
	shrq	$32, %rcx
	movd	%ecx, %xmm5
	subss	%xmm5, %xmm2
	mulss	%xmm2, %xmm2
	addss	%xmm0, %xmm2
	movq	%xmm1, %rax
	movd	%eax, %xmm0
	movq	%xmm3, %rcx
	movd	%ecx, %xmm1
	subss	%xmm1, %xmm0
	mulss	%xmm0, %xmm0
	addss	%xmm2, %xmm0
	xorps	%xmm2, %xmm2
	sqrtss	%xmm0, %xmm2
	shrq	$32, %rax
	movd	%eax, %xmm0
	shrq	$32, %rcx
	movd	%ecx, %xmm1
	movdqa	%xmm0, %xmm3
	addss	%xmm1, %xmm3
	xorl	%eax, %eax
	ucomiss	%xmm2, %xmm3
	jbe	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movss	%xmm4, 4(%rsp)                  # 4-byte Spill
	callq	_Z11overlappingfff
	xorl	%eax, %eax
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	setae	%al
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	_Z16slightly_overlap15HIP_vector_typeIfLj4EES0_f, .Lfunc_end3-_Z16slightly_overlap15HIP_vector_typeIfLj4EES0_f
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i # -- Begin function _Z23__device_stub__nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.type	_Z23__device_stub__nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i,@function
_Z23__device_stub__nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i: # @_Z23__device_stub__nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movsd	%xmm0, (%rax)
	movsd	%xmm1, 8(%rax)
	leaq	40(%rsp), %r8
	movq	%rdi, (%r8)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	96(%rsp), %rbx
	movq	%r8, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z23__device_stub__nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i, .Lfunc_end4-_Z23__device_stub__nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__slight_nei_listP15HIP_vector_typeIfLj4EEiifPi # -- Begin function _Z30__device_stub__slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.type	_Z30__device_stub__slight_nei_listP15HIP_vector_typeIfLj4EEiifPi,@function
_Z30__device_stub__slight_nei_listP15HIP_vector_typeIfLj4EEiifPi: # @_Z30__device_stub__slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	32(%rsp), %r8
	movq	%rcx, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r8, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z30__device_stub__slight_nei_listP15HIP_vector_typeIfLj4EEiifPi, .Lfunc_end5-_Z30__device_stub__slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i,@object # @_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.section	.rodata,"a",@progbits
	.globl	_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.p2align	3, 0x0
_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i:
	.quad	_Z23__device_stub__nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.size	_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i, 8

	.type	_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi,@object # @_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.globl	_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.p2align	3, 0x0
_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi:
	.quad	_Z30__device_stub__slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.size	_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i"
	.size	.L__unnamed_1, 46

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi"
	.size	.L__unnamed_2, 50

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.addrsig_sym _Z30__device_stub__slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.addrsig_sym _Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i ; -- Begin function _Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.globl	_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
	.p2align	8
	.type	_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i,@function
_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i: ; @_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x30
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_5
; %bb.1:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 4, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b128 v[2:5], v[2:3], off
	s_waitcnt vmcnt(0)
	v_dual_subrev_f32 v0, s5, v3 :: v_dual_subrev_f32 v3, s6, v4
	v_subrev_f32_e32 v2, s4, v2
	v_mul_f32_e32 v0, v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v2, v2
	v_fmac_f32_e32 v0, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v2, 0x4f800000, v0
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v2, v0
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v3, -1, v2
	v_add_nc_u32_e32 v4, 1, v2
	v_fma_f32 v5, -v3, v2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v6, -v4, v2, v0
	v_cmp_ge_f32_e64 s2, 0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v2, v3, s2
	v_cmp_lt_f32_e64 s2, 0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v2, v4, s2
	v_mul_f32_e32 v3, 0x37800000, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	v_cndmask_b32_e32 v0, v2, v0, vcc_lo
	v_mul_f32_e64 v2, 0x40400000, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_lt_f32_e32 vcc_lo, v0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x20
	s_mov_b32 s5, exec_lo
	s_mov_b32 s4, exec_lo
	v_mbcnt_lo_u32_b32 v0, s5, 0
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_4
; %bb.3:
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s5
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v2, v2, v3, s[2:3] glc
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_readfirstlane_b32 s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s2, v0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
.LBB0_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i, .Lfunc_end0-_Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 456
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi ; -- Begin function _Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.globl	_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
	.p2align	8
	.type	_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi,@function
_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi: ; @_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
	v_cmp_lt_i32_e32 vcc_lo, s4, v4
	v_cmp_gt_i32_e64 s2, s5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_6
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v5, 31, v4
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[4:5], s[4:5], 4
	v_lshlrev_b64 v[0:1], 4, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_add_u32 s2, s2, s4
	s_addc_u32 s3, s3, s5
	global_load_b128 v[0:3], v[0:1], off
	s_load_b128 s[8:11], s[2:3], 0x0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_subrev_f32 v1, s9, v1 :: v_dual_subrev_f32 v0, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_subrev_f32 v2, s10, v2 :: v_dual_mul_f32 v1, v1, v1
	v_fmac_f32_e32 v1, v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, v2, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v1
	v_mul_f32_e32 v0, 0x4f800000, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v1, v0, vcc_lo
	v_sqrt_f32_e32 v1, v0
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v5, 1, v1
	v_add_nc_u32_e32 v2, -1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v5, v1, v0
	v_fma_f32 v6, -v2, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v6
	v_cndmask_b32_e64 v1, v1, v2, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v7
	v_cndmask_b32_e64 v1, v1, v5, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, 0x37800000, v1
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v1, v0 :: v_dual_add_f32 v0, s11, v3
	v_cmp_lt_f32_e32 vcc_lo, v1, v0
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_6
; %bb.2:                                ; %_Z11overlappingfff.exit.i
	v_add_f32_e32 v6, v3, v1
	v_add_f32_e32 v2, s11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v5, v0, v1 :: v_dual_sub_f32 v2, v2, v3
	v_subrev_f32_e32 v3, s11, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v2, v5, v2 :: v_dual_sub_f32 v5, v0, v1
	v_mul_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v5, v2
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_sqrt_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v5, -1, v3
	v_add_nc_u32_e32 v6, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v5, v3, v2
	v_fma_f32 v8, -v6, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v7
	v_cndmask_b32_e64 v3, v3, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v8
	v_cndmask_b32_e64 v3, v3, v6, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, 0x37800000, v3
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	v_mul_f32_e32 v2, 0x3e800000, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v2
	v_div_scale_f32 v3, null, v1, v1, v2
	v_div_scale_f32 v7, vcc_lo, v2, v1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v3, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v7, v5
	v_fma_f32 v8, -v3, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v8, v5
	v_fma_f32 v3, -v3, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v5, v6
	v_div_fixup_f32 v1, v3, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v1
	v_div_scale_f32 v2, null, v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v5, v3
	v_div_scale_f32 v5, vcc_lo, v1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v5, v3
	v_fma_f32 v7, -v2, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v3
	v_fma_f32 v2, -v2, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v6
	v_div_fixup_f32 v0, v2, v0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_f32_e32 vcc_lo, s6, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_6
; %bb.3:
	s_load_b64 s[0:1], s[0:1], 0x18
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v0, s3, 0
                                        ; implicit-def: $vgpr1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_5
; %bb.4:
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s3
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v1, v1, v2, s[0:1] glc
.LBB1_5:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, s2, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off offset:4
.LBB1_6:                                ; %.critedge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi, .Lfunc_end1-_Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 888
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           16
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 16
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8nei_listP15HIP_vector_typeIfLj4EES0_PiS2_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15slight_nei_listP15HIP_vector_typeIfLj4EEiifPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
