#include <iostream>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cstdlib>

#define BLOCK_SIZE 128
#define CHECK(call)                                                            \
  {                                                                            \
    const cudaError_t error = call;                                            \
    if (error != cudaSuccess) {                                                \
      fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);                   \
      fprintf(stderr, "code: %d, reason: %s\n", error,                         \
              cudaGetErrorString(error));                                      \
      exit(1);                                                                 \
    }                                                                          \
  }

using namespace std;

__global__ void getMin(float *input, int *input_idx, int offset, int len, int offset_out, float *output_val,
                       int *output_idx) {
  __shared__ float smem_val[BLOCK_SIZE];
  __shared__ int smem_idx[BLOCK_SIZE];

  int tx = threadIdx.x;

  int i = tx + blockIdx.x * BLOCK_SIZE * 8 + offset;

  float min_val = INFINITY;
  int min_idx = i;

  if (i < len) {
    float a1, a2, a3, a4, a5, a6, a7, a8;
    a1 = input[i];
    a2 = (i + BLOCK_SIZE) < len ? input[i + BLOCK_SIZE] : INFINITY;
    a3 = (i + 2 * BLOCK_SIZE) < len ? input[i + 2 * BLOCK_SIZE] : INFINITY;
    a4 = (i + 3 * BLOCK_SIZE) < len ? input[i + 3 * BLOCK_SIZE] : INFINITY;
    a5 = (i + 4 * BLOCK_SIZE) < len ? input[i + 4 * BLOCK_SIZE] : INFINITY;
    a6 = (i + 5 * BLOCK_SIZE) < len ? input[i + 5 * BLOCK_SIZE] : INFINITY;
    a7 = (i + 6 * BLOCK_SIZE) < len ? input[i + 6 * BLOCK_SIZE] : INFINITY;
    a8 = (i + 7 * BLOCK_SIZE) < len ? input[i + 7 * BLOCK_SIZE] : INFINITY;
    min_val = a1;
    min_idx = i;
    if (a2 < min_val) {
      min_val = a2;
      min_idx = i + BLOCK_SIZE;
    }
    if (a3 < min_val) {
      min_val = a3;
      min_idx = i + 2 * BLOCK_SIZE;
    }
    if (a4 < min_val) {
      min_val = a4;
      min_idx = i + 3 * BLOCK_SIZE;
    }
    if (a5 < min_val) {
      min_val = a5;
      min_idx = i + 4 * BLOCK_SIZE;
    }
    if (a6 < min_val) {
      min_val = a6;
      min_idx = i + 5 * BLOCK_SIZE;
    }
    if (a7 < min_val) {
      min_val = a7;
      min_idx = i + 6 * BLOCK_SIZE;
    }
    if (a8 < min_val) {
      min_val = a8;
      min_idx = i + 7 * BLOCK_SIZE;
    }
  }

  smem_val[tx] = min_val;
  smem_idx[tx] = min_idx;
  __syncthreads();

  // in-place reduction in shared memory
  if (blockDim.x >= 1024 && tx < 512 && smem_val[tx + 512] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 512];
    smem_idx[tx] = min_idx = smem_idx[tx + 512];
  }
  __syncthreads();

  if (blockDim.x >= 512 && tx < 256 && smem_val[tx + 256] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 256];
    smem_idx[tx] = min_idx = smem_idx[tx + 256];
  }
  __syncthreads();

  if (blockDim.x >= 256 && tx < 128 && smem_val[tx + 128] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 128];
    smem_idx[tx] = min_idx = smem_idx[tx + 128];
  }
  __syncthreads();

  if (blockDim.x >= 128 && tx < 64 && smem_val[tx + 64] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 64];
    smem_idx[tx] = min_idx = smem_idx[tx + 64];
  }
  __syncthreads();

  // unrolling warp
  if (tx < 32) {
    volatile float *vsmem_val = smem_val;
    volatile int *vsmem_idx = smem_idx;
    if (vsmem_val[tx + 32] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 32];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 32];
    }
    if (vsmem_val[tx + 16] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 16];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 16];
    }
    if (vsmem_val[tx + 8] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 8];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 8];
    }
    if (vsmem_val[tx + 4] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 4];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 4];
    }
    if (vsmem_val[tx + 2] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 2];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 2];
    }
    if (vsmem_val[tx + 1] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 1];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 1];
    }
  }

  if (tx == 0) {
    output_val[blockIdx.x + offset_out] = min_val;
    output_idx[blockIdx.x + offset_out] = (input_idx == nullptr) ? min_idx : input_idx[min_idx];
  }
}

int main(int argc, char *argv[]) {
  if (argc < 2 || argc > 2) {
    cout << "Usage: " << argv[0] << " size\n";
    return -1;
  }
  const int len = 1L << (atoi(argv[1]));
  float *h_a = (float *)malloc(len * sizeof(float));

  if (h_a == nullptr) {
    cout << "Cannot allocate memory\n";
    exit(-1);
  }
  srand(0);
  clock_t begin = clock();
  for (int i = 0; i < len; ++i) {
    h_a[i] = rand() / (float)RAND_MAX;
  }
  cout << "Create dataset elapsed time: " << double(clock() - begin) / CLOCKS_PER_SEC * 1000
       << " ms\n";

  const int n_streams = 4;
  cudaStream_t streams[n_streams];
  const int stream_size = ceil((float)len / (8 * BLOCK_SIZE * n_streams)) * (8 * BLOCK_SIZE);
  cout << "Stream size: " << stream_size << "\n";
  for (int i = 0; i < n_streams; ++i) {
    CHECK(cudaStreamCreate(&streams[i]))
  }

  int len_out = ceil((float)stream_size / (BLOCK_SIZE * 8)) * n_streams;
  int len_out1 = ceil((float)len_out / (BLOCK_SIZE * 8));
  float *h_val = (float *)malloc(sizeof(float) * len_out1);
  int *h_idx = (int *)malloc(sizeof(int) * len_out1);

  float *d_a;
  float *d_val, *d_val1;
  int *d_idx, *d_idx1;

  CHECK(cudaMalloc((void **)&d_a, sizeof(float) * len));
  CHECK(cudaMalloc((void **)&d_val, sizeof(float) * len_out));
  CHECK(cudaMalloc((void **)&d_idx, sizeof(int) * len_out));
  CHECK(cudaMalloc((void **)&d_val1, sizeof(float) * len_out1));
  CHECK(cudaMalloc((void **)&d_idx1, sizeof(int) * len_out1));

  CHECK(cudaMemcpy(d_a, h_a, sizeof(float) * len, cudaMemcpyHostToDevice));

  for (int i = 0; i < n_streams; ++i) {
    int offset = i * stream_size;
    int offset_out = i * (float)stream_size/(BLOCK_SIZE * 8);
    getMin<<<ceil((float)stream_size/(BLOCK_SIZE * 8)), BLOCK_SIZE, 0, streams[i]>>>(d_a, nullptr, offset, len, offset_out, d_val, d_idx);
  }

  CHECK(cudaDeviceSynchronize());

  getMin<<<len_out1, BLOCK_SIZE>>>(d_val, d_idx, 0, len_out, 0, d_val1, d_idx1);

  CHECK(cudaDeviceSynchronize());

  CHECK(cudaMemcpy(h_val, d_val1, sizeof(float) * len_out1,
                   cudaMemcpyDeviceToHost));
  CHECK(cudaMemcpy(h_idx, d_idx1, sizeof(int) * len_out1,
                   cudaMemcpyDeviceToHost));



  float val = h_val[0];
  int idx = h_idx[0];
  for (int i = 0; i < len_out1; ++i) {
    if (h_val[i] < val) {
      val = h_val[i];
      idx = h_idx[i];
    }
  }

  cout << "Number of elements: " << len << ", min val: " << val
       << ", min idx: " << idx << "\n";

  for (int i = 0; i < n_streams; ++i) {
    CHECK(cudaStreamDestroy(streams[i]));
  }

  // Free device
  CHECK(cudaFree(d_a));
  CHECK(cudaFree(d_val));
  CHECK(cudaFree(d_idx));
  CHECK(cudaFree(d_val1));
  CHECK(cudaFree(d_idx1));

  // Free host
  free(h_a);
  free(h_val);
  free(h_idx);
  return 0;
}

	.file	"tmpxft_00238fdb_00000000-6_reduction_gpu3.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z6getMinPfPiiiiS_S0_PfPiiiiS_S0_
	.type	_Z35__device_stub__Z6getMinPfPiiiiS_S0_PfPiiiiS_S0_, @function
_Z35__device_stub__Z6getMinPfPiiiiS_S0_PfPiiiiS_S0_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6getMinPfPiiiiS_S0_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z35__device_stub__Z6getMinPfPiiiiS_S0_PfPiiiiS_S0_, .-_Z35__device_stub__Z6getMinPfPiiiiS_S0_PfPiiiiS_S0_
	.globl	_Z6getMinPfPiiiiS_S0_
	.type	_Z6getMinPfPiiiiS_S0_, @function
_Z6getMinPfPiiiiS_S0_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z6getMinPfPiiiiS_S0_PfPiiiiS_S0_
	.cfi_endproc
.LFE3661:
	.size	_Z6getMinPfPiiiiS_S0_, .-_Z6getMinPfPiiiiS_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Usage: "
.LC1:
	.string	" size\n"
.LC2:
	.string	"Cannot allocate memory\n"
.LC4:
	.string	"Create dataset elapsed time: "
.LC7:
	.string	" ms\n"
.LC10:
	.string	"Stream size: "
.LC11:
	.string	"\n"
.LC12:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/hle46/Reduction/master/reduction_gpu3.cu"
.LC13:
	.string	"Error: %s:%d, "
.LC14:
	.string	"code: %d, reason: %s\n"
.LC17:
	.string	"Number of elements: "
.LC18:
	.string	", min val: "
.LC19:
	.string	", min idx: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L9
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	orl	$-1, %eax
	jmp	.L8
.L9:
	movq	8(%rsi), %rdi
	movl	$1, %ebx
	call	atoi@PLT
	movl	%eax, %ecx
	salq	%cl, %rbx
	movslq	%ebx, %r12
	movl	%ebx, 24(%rsp)
	salq	$2, %r12
	movq	%r12, %rdi
	call	malloc@PLT
	movq	%rax, %rbp
	testq	%rax, %rax
	jne	.L11
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC2(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	orl	$-1, %edi
	jmp	.L47
.L11:
	xorl	%edi, %edi
	xorl	%r14d, %r14d
	call	srand@PLT
	call	clock@PLT
	movq	%rax, %r13
.L12:
	cmpl	%r14d, 24(%rsp)
	jle	.L51
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%r14,4)
	incq	%r14
	jmp	.L12
.L51:
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %r14
	call	clock@PLT
	movq	%r14, %rdi
	leaq	152(%rsp), %r14
	subq	%r13, %rax
	leaq	120(%rsp), %r13
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC5(%rip), %xmm0
	mulsd	.LC6(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC8(%rip), %xmm0
	call	ceilf@PLT
	mulss	.LC9(%rip), %xmm0
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	cvttss2sil	%xmm0, %r15d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r15d, %esi
	call	_ZNSolsEi@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L15:
	movq	%r13, %rdi
	call	cudaStreamCreate@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L14
	movq	stderr(%rip), %rdi
	movl	$164, %r8d
	xorl	%eax, %eax
	leaq	.LC12(%rip), %rcx
	leaq	.LC13(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	%ebx, %ecx
	movq	%rax, %r8
.L48:
	movq	stderr(%rip), %rdi
	leaq	.LC14(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
.L47:
	call	exit@PLT
.L14:
	addq	$8, %r13
	cmpq	%r14, %r13
	jne	.L15
	cvtsi2ssl	%r15d, %xmm2
	movss	.LC15(%rip), %xmm0
	mulss	%xmm2, %xmm0
	movss	%xmm2, 32(%rsp)
	call	ceilf@PLT
	movss	%xmm0, 36(%rsp)
	mulss	.LC16(%rip), %xmm0
	cvttss2sil	%xmm0, %eax
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC15(%rip), %xmm0
	movl	%eax, 28(%rsp)
	call	ceilf@PLT
	cvttss2sil	%xmm0, %r14d
	movslq	%r14d, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	56(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	movl	$176, %r8d
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L49
	movslq	28(%rsp), %rsi
	leaq	64(%rsp), %rdi
	salq	$2, %rsi
	movq	%rsi, 40(%rsp)
	call	cudaMalloc@PLT
	movq	40(%rsp), %rsi
	movl	$177, %r8d
	testl	%eax, %eax
	movl	%eax, %r13d
	jne	.L49
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$178, %r8d
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L49
	movq	8(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$179, %r8d
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L49
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L20
	movl	$180, %r8d
.L49:
	movq	stderr(%rip), %rdi
	leaq	.LC12(%rip), %rcx
	leaq	.LC13(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%r13d, %edi
	call	cudaGetErrorString@PLT
	movl	%r13d, %ecx
	movq	%rax, %r8
	jmp	.L48
.L20:
	movq	56(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	xorl	%r13d, %r13d
	call	cudaMemcpy@PLT
	movl	$182, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L50
.L23:
	movl	$33554433, %eax
	movl	$33554433, %edx
	movq	120(%rsp,%r13,8), %r9
	xorl	%r8d, %r8d
	salq	$7, %rax
	salq	$7, %rdx
	movl	$1, %ecx
	movl	$1, 116(%rsp)
	movq	%rax, 108(%rsp)
	cvttss2siq	36(%rsp), %rax
	movl	%eax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 100(%rsp)
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	cvtsi2ssl	%r13d, %xmm0
	mulss	32(%rsp), %xmm0
	pushq	%rsi
	.cfi_def_cfa_offset 232
	movl	%r12d, %edx
	mulss	.LC15(%rip), %xmm0
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	xorl	%esi, %esi
	movq	80(%rsp), %r9
	movl	40(%rsp), %ecx
	movq	72(%rsp), %rdi
	cvttss2sil	%xmm0, %r8d
	call	_Z35__device_stub__Z6getMinPfPiiiiS_S0_PfPiiiiS_S0_
	popq	%rdi
	.cfi_def_cfa_offset 232
	popq	%r8
	.cfi_def_cfa_offset 224
.L22:
	incq	%r13
	addl	%r15d, %r12d
	cmpq	$4, %r13
	jne	.L23
	call	cudaDeviceSynchronize@PLT
	movl	$190, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L50
	movl	%r14d, 96(%rsp)
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$7, %rdx
	movl	$1, %ecx
	movl	$1, 116(%rsp)
	movq	%rax, 100(%rsp)
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	movq	%rdx, 108(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	%rax
	.cfi_def_cfa_offset 232
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	pushq	96(%rsp)
	.cfi_def_cfa_offset 240
	movq	88(%rsp), %r9
	movl	44(%rsp), %ecx
	movq	96(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z35__device_stub__Z6getMinPfPiiiiS_S0_PfPiiiiS_S0_
	popq	%rdx
	.cfi_def_cfa_offset 232
	popq	%rcx
	.cfi_def_cfa_offset 224
.L25:
	call	cudaDeviceSynchronize@PLT
	movl	$194, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L50
	movq	8(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$196, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L50
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$198, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L50
	movq	16(%rsp), %rax
	movss	(%rbx), %xmm0
	movl	(%rax), %r12d
	xorl	%eax, %eax
.L29:
	cmpl	%eax, %r14d
	jle	.L52
	movss	(%rbx,%rax,4), %xmm1
	comiss	%xmm1, %xmm0
	jbe	.L30
	movq	16(%rsp), %rcx
	movaps	%xmm1, %xmm0
	movl	(%rcx,%rax,4), %r12d
.L30:
	incq	%rax
	jmp	.L29
.L52:
	leaq	.LC17(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movss	%xmm0, 8(%rsp)
	xorl	%r13d, %r13d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	24(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC18(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	8(%rsp), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC19(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L34:
	movq	120(%rsp,%r13,8), %rdi
	call	cudaStreamDestroy@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L33
	movl	$216, %r8d
	jmp	.L50
.L33:
	incq	%r13
	cmpq	$4, %r13
	jne	.L34
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	$220, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L50
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movl	$221, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L50
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movl	$222, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L50
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	$223, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L50
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L39
	movl	$224, %r8d
.L50:
	movq	stderr(%rip), %rdi
	leaq	.LC12(%rip), %rcx
	leaq	.LC13(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%r12d, %edi
	call	cudaGetErrorString@PLT
	movl	%r12d, %ecx
	movq	%rax, %r8
	jmp	.L48
.L39:
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	xorl	%eax, %eax
.L8:
	movq	152(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC20:
	.string	"_Z6getMinPfPiiiiS_S0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6getMinPfPiiiiS_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	805306368
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.align 8
.LC6:
	.long	0
	.long	1083129856
	.section	.rodata.cst4
	.align 4
.LC8:
	.long	964689920
	.align 4
.LC9:
	.long	1149239296
	.align 4
.LC15:
	.long	981467136
	.align 4
.LC16:
	.long	1082130432
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

#include <cstdlib>

#define BLOCK_SIZE 128
#define CHECK(call)                                                            \
  {                                                                            \
    const hipError_t error = call;                                            \
    if (error != hipSuccess) {                                                \
      fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);                   \
      fprintf(stderr, "code: %d, reason: %s\n", error,                         \
              hipGetErrorString(error));                                      \
      exit(1);                                                                 \
    }                                                                          \
  }

using namespace std;

__global__ void getMin(float *input, int *input_idx, int offset, int len, int offset_out, float *output_val,
                       int *output_idx) {
  __shared__ float smem_val[BLOCK_SIZE];
  __shared__ int smem_idx[BLOCK_SIZE];

  int tx = threadIdx.x;

  int i = tx + blockIdx.x * BLOCK_SIZE * 8 + offset;

  float min_val = INFINITY;
  int min_idx = i;

  if (i < len) {
    float a1, a2, a3, a4, a5, a6, a7, a8;
    a1 = input[i];
    a2 = (i + BLOCK_SIZE) < len ? input[i + BLOCK_SIZE] : INFINITY;
    a3 = (i + 2 * BLOCK_SIZE) < len ? input[i + 2 * BLOCK_SIZE] : INFINITY;
    a4 = (i + 3 * BLOCK_SIZE) < len ? input[i + 3 * BLOCK_SIZE] : INFINITY;
    a5 = (i + 4 * BLOCK_SIZE) < len ? input[i + 4 * BLOCK_SIZE] : INFINITY;
    a6 = (i + 5 * BLOCK_SIZE) < len ? input[i + 5 * BLOCK_SIZE] : INFINITY;
    a7 = (i + 6 * BLOCK_SIZE) < len ? input[i + 6 * BLOCK_SIZE] : INFINITY;
    a8 = (i + 7 * BLOCK_SIZE) < len ? input[i + 7 * BLOCK_SIZE] : INFINITY;
    min_val = a1;
    min_idx = i;
    if (a2 < min_val) {
      min_val = a2;
      min_idx = i + BLOCK_SIZE;
    }
    if (a3 < min_val) {
      min_val = a3;
      min_idx = i + 2 * BLOCK_SIZE;
    }
    if (a4 < min_val) {
      min_val = a4;
      min_idx = i + 3 * BLOCK_SIZE;
    }
    if (a5 < min_val) {
      min_val = a5;
      min_idx = i + 4 * BLOCK_SIZE;
    }
    if (a6 < min_val) {
      min_val = a6;
      min_idx = i + 5 * BLOCK_SIZE;
    }
    if (a7 < min_val) {
      min_val = a7;
      min_idx = i + 6 * BLOCK_SIZE;
    }
    if (a8 < min_val) {
      min_val = a8;
      min_idx = i + 7 * BLOCK_SIZE;
    }
  }

  smem_val[tx] = min_val;
  smem_idx[tx] = min_idx;
  __syncthreads();

  // in-place reduction in shared memory
  if (blockDim.x >= 1024 && tx < 512 && smem_val[tx + 512] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 512];
    smem_idx[tx] = min_idx = smem_idx[tx + 512];
  }
  __syncthreads();

  if (blockDim.x >= 512 && tx < 256 && smem_val[tx + 256] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 256];
    smem_idx[tx] = min_idx = smem_idx[tx + 256];
  }
  __syncthreads();

  if (blockDim.x >= 256 && tx < 128 && smem_val[tx + 128] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 128];
    smem_idx[tx] = min_idx = smem_idx[tx + 128];
  }
  __syncthreads();

  if (blockDim.x >= 128 && tx < 64 && smem_val[tx + 64] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 64];
    smem_idx[tx] = min_idx = smem_idx[tx + 64];
  }
  __syncthreads();

  // unrolling warp
  if (tx < 32) {
    volatile float *vsmem_val = smem_val;
    volatile int *vsmem_idx = smem_idx;
    if (vsmem_val[tx + 32] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 32];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 32];
    }
    if (vsmem_val[tx + 16] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 16];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 16];
    }
    if (vsmem_val[tx + 8] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 8];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 8];
    }
    if (vsmem_val[tx + 4] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 4];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 4];
    }
    if (vsmem_val[tx + 2] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 2];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 2];
    }
    if (vsmem_val[tx + 1] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 1];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 1];
    }
  }

  if (tx == 0) {
    output_val[blockIdx.x + offset_out] = min_val;
    output_idx[blockIdx.x + offset_out] = (input_idx == nullptr) ? min_idx : input_idx[min_idx];
  }
}

int main(int argc, char *argv[]) {
  if (argc < 2 || argc > 2) {
    cout << "Usage: " << argv[0] << " size\n";
    return -1;
  }
  const int len = 1L << (atoi(argv[1]));
  float *h_a = (float *)malloc(len * sizeof(float));

  if (h_a == nullptr) {
    cout << "Cannot allocate memory\n";
    exit(-1);
  }
  srand(0);
  clock_t begin = clock();
  for (int i = 0; i < len; ++i) {
    h_a[i] = rand() / (float)RAND_MAX;
  }
  cout << "Create dataset elapsed time: " << double(clock() - begin) / CLOCKS_PER_SEC * 1000
       << " ms\n";

  const int n_streams = 4;
  hipStream_t streams[n_streams];
  const int stream_size = ceil((float)len / (8 * BLOCK_SIZE * n_streams)) * (8 * BLOCK_SIZE);
  cout << "Stream size: " << stream_size << "\n";
  for (int i = 0; i < n_streams; ++i) {
    CHECK(hipStreamCreate(&streams[i]))
  }

  int len_out = ceil((float)stream_size / (BLOCK_SIZE * 8)) * n_streams;
  int len_out1 = ceil((float)len_out / (BLOCK_SIZE * 8));
  float *h_val = (float *)malloc(sizeof(float) * len_out1);
  int *h_idx = (int *)malloc(sizeof(int) * len_out1);

  float *d_a;
  float *d_val, *d_val1;
  int *d_idx, *d_idx1;

  CHECK(hipMalloc((void **)&d_a, sizeof(float) * len));
  CHECK(hipMalloc((void **)&d_val, sizeof(float) * len_out));
  CHECK(hipMalloc((void **)&d_idx, sizeof(int) * len_out));
  CHECK(hipMalloc((void **)&d_val1, sizeof(float) * len_out1));
  CHECK(hipMalloc((void **)&d_idx1, sizeof(int) * len_out1));

  CHECK(hipMemcpy(d_a, h_a, sizeof(float) * len, hipMemcpyHostToDevice));

  for (int i = 0; i < n_streams; ++i) {
    int offset = i * stream_size;
    int offset_out = i * (float)stream_size/(BLOCK_SIZE * 8);
    getMin<<<ceil((float)stream_size/(BLOCK_SIZE * 8)), BLOCK_SIZE, 0, streams[i]>>>(d_a, nullptr, offset, len, offset_out, d_val, d_idx);
  }

  CHECK(hipDeviceSynchronize());

  getMin<<<len_out1, BLOCK_SIZE>>>(d_val, d_idx, 0, len_out, 0, d_val1, d_idx1);

  CHECK(hipDeviceSynchronize());

  CHECK(hipMemcpy(h_val, d_val1, sizeof(float) * len_out1,
                   hipMemcpyDeviceToHost));
  CHECK(hipMemcpy(h_idx, d_idx1, sizeof(int) * len_out1,
                   hipMemcpyDeviceToHost));



  float val = h_val[0];
  int idx = h_idx[0];
  for (int i = 0; i < len_out1; ++i) {
    if (h_val[i] < val) {
      val = h_val[i];
      idx = h_idx[i];
    }
  }

  cout << "Number of elements: " << len << ", min val: " << val
       << ", min idx: " << idx << "\n";

  for (int i = 0; i < n_streams; ++i) {
    CHECK(hipStreamDestroy(streams[i]));
  }

  // Free device
  CHECK(hipFree(d_a));
  CHECK(hipFree(d_val));
  CHECK(hipFree(d_idx));
  CHECK(hipFree(d_val1));
  CHECK(hipFree(d_idx1));

  // Free host
  free(h_a);
  free(h_val);
  free(h_idx);
  return 0;
}

	.text
	.file	"reduction_gpu3.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__getMinPfPiiiiS_S0_ # -- Begin function _Z21__device_stub__getMinPfPiiiiS_S0_
	.type	_Z21__device_stub__getMinPfPiiiiS_S0_,@function
_Z21__device_stub__getMinPfPiiiiS_S0_:  # @_Z21__device_stub__getMinPfPiiiiS_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6getMinPfPiiiiS_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__getMinPfPiiiiS_S0_, .Lfunc_end0-_Z21__device_stub__getMinPfPiiiiS_S0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI1_3:
	.long	0x39800000                      # float 2.44140625E-4
.LCPI1_4:
	.long	0x44800000                      # float 1024
.LCPI1_5:
	.long	0x3a800000                      # float 9.765625E-4
.LCPI1_6:
	.long	0x40800000                      # float 4
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_1:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI1_2:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	cmpl	$2, %edi
	jne	.LBB1_1
# %bb.5:
	movabsq	$4294967296, %r14               # imm = 0x100000000
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %ecx
	movl	$1, %r12d
	shlq	%cl, %r12
                                        # kill: def $cl killed $cl killed $ecx
	shlq	%cl, %r14
	sarq	$30, %r14
	movq	%r14, %rdi
	callq	malloc
	testq	%rax, %rax
	je	.LBB1_61
# %bb.6:
	movq	%rax, %r13
	movq	%r14, 120(%rsp)                 # 8-byte Spill
	xorl	%edi, %edi
	callq	srand
	callq	clock
	movq	%rax, %r14
	testl	%r12d, %r12d
	jle	.LBB1_9
# %bb.7:                                # %.lr.ph.preheader
	movl	%r12d, %ebx
	xorl	%r15d, %r15d
.LBB1_8:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%r13,%r15,4)
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB1_8
.LBB1_9:                                # %._crit_edge
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	callq	clock
	subq	%r14, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_1(%rip), %xmm0
	mulsd	.LCPI1_2(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.4, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r12d, %xmm0
	mulss	.LCPI1_3(%rip), %xmm0
	callq	ceilf@PLT
	mulss	.LCPI1_4(%rip), %xmm0
	cvttss2si	%xmm0, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movl	$.L.str.6, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%ebx, %ebx
.LBB1_10:                               # =>This Inner Loop Header: Depth=1
	leaq	(%rsp,%rbx), %rdi
	addq	$128, %rdi
	callq	hipStreamCreate
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.11:                               #   in Loop: Header=BB1_10 Depth=1
	addq	$8, %rbx
	cmpq	$32, %rbx
	jne	.LBB1_10
# %bb.12:
	movq	%r12, 88(%rsp)                  # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	mulss	.LCPI1_5(%rip), %xmm0
	callq	ceilf@PLT
	movss	.LCPI1_6(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	%xmm0, 76(%rsp)                 # 4-byte Spill
	mulss	%xmm0, %xmm1
	movaps	%xmm1, 96(%rsp)                 # 16-byte Spill
	cvttps2dq	%xmm1, %xmm0
	cvtdq2ps	%xmm0, %xmm0
	mulss	.LCPI1_5(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %eax
	movl	%eax, 72(%rsp)                  # 4-byte Spill
	movslq	%eax, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, 80(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	leaq	56(%rsp), %rdi
	movq	120(%rsp), %rbx                 # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.17:
	cvttss2si	96(%rsp), %eax          # 16-byte Folded Reload
	movl	%eax, 68(%rsp)                  # 4-byte Spill
	movslq	%eax, %r12
	shlq	$2, %r12
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.19:
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_20
# %bb.21:
	leaq	40(%rsp), %rdi
	movq	80(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_22
# %bb.23:
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.25:
	movq	56(%rsp), %rdi
	movq	%r13, 96(%rsp)                  # 8-byte Spill
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_63
# %bb.26:                               # %.preheader
	cvttss2si	76(%rsp), %rax          # 4-byte Folded Reload
	movl	%eax, %r13d
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r13
	xorl	%r14d, %r14d
	leaq	128(%rax), %r12
	xorl	%ebx, %ebx
.LBB1_27:                               # =>This Inner Loop Header: Depth=1
	movq	128(%rsp,%rbx,8), %r9
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_29
# %bb.28:                               #   in Loop: Header=BB1_27 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	mulss	20(%rsp), %xmm0                 # 4-byte Folded Reload
	mulss	.LCPI1_5(%rip), %xmm0
	cvttss2si	%xmm0, %r8d
	movq	56(%rsp), %rdi
	movq	48(%rsp), %r9
	movq	32(%rsp), %rax
	movq	%rax, (%rsp)
	xorl	%esi, %esi
	movl	%r14d, %edx
	movq	88(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z21__device_stub__getMinPfPiiiiS_S0_
.LBB1_29:                               #   in Loop: Header=BB1_27 Depth=1
	incq	%rbx
	addl	%ebp, %r14d
	cmpq	$4, %rbx
	jne	.LBB1_27
# %bb.30:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_31
# %bb.33:
	movl	72(%rsp), %ebx                  # 4-byte Reload
	movl	%ebx, %r14d
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	%r14, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	112(%rsp), %r13                 # 8-byte Reload
	jne	.LBB1_35
# %bb.34:
	movq	48(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	40(%rsp), %r9
	movq	24(%rsp), %rax
	movq	%rax, (%rsp)
	xorl	%edx, %edx
	movl	68(%rsp), %ecx                  # 4-byte Reload
	xorl	%r8d, %r8d
	callq	_Z21__device_stub__getMinPfPiiiiS_S0_
.LBB1_35:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_36
# %bb.37:
	movq	40(%rsp), %rsi
	movq	%r15, %rdi
	movq	80(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_38
# %bb.39:
	movq	24(%rsp), %rsi
	movq	%r13, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_40
# %bb.41:
	movss	(%r15), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movl	(%r13), %ebp
	testl	%ebx, %ebx
	jle	.LBB1_46
# %bb.42:                               # %.lr.ph187.preheader
	xorl	%eax, %eax
.LBB1_43:                               # %.lr.ph187
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r15,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB1_45
# %bb.44:                               #   in Loop: Header=BB1_43 Depth=1
	movl	(%r13,%rax,4), %ebp
	movaps	%xmm0, %xmm1
.LBB1_45:                               #   in Loop: Header=BB1_43 Depth=1
	incq	%rax
	cmpq	%rax, %r14
	jne	.LBB1_43
.LBB1_46:                               # %._crit_edge188
	movss	%xmm1, 20(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	88(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.11, %esi
	movl	$11, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	20(%rsp), %xmm0                 # 4-byte Folded Reload
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.12, %esi
	movl	$11, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movl	$.L.str.6, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%ebx, %ebx
.LBB1_47:                               # =>This Inner Loop Header: Depth=1
	movq	128(%rsp,%rbx,8), %rdi
	callq	hipStreamDestroy
	testl	%eax, %eax
	jne	.LBB1_62
# %bb.48:                               #   in Loop: Header=BB1_47 Depth=1
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB1_47
# %bb.49:
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_50
# %bb.51:
	movq	48(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_52
# %bb.53:
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_54
# %bb.55:
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_56
# %bb.57:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_58
# %bb.59:
	movq	96(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	xorl	%eax, %eax
	jmp	.LBB1_60
.LBB1_1:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rbx
	testq	%rbx, %rbx
	je	.LBB1_2
# %bb.3:
	movq	%rbx, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_4
.LBB1_2:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_4:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$-1, %eax
.LBB1_60:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_14:
	.cfi_def_cfa_offset 224
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$164, %ecx
.LBB1_15:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r14d, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	jmp	.LBB1_16
.LBB1_62:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$216, %ecx
.LBB1_32:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %esi
	movq	%rbx, %rdi
	movl	%ebp, %edx
.LBB1_16:
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.LBB1_61:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$-1, %edi
	callq	exit
.LBB1_13:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$176, %ecx
	jmp	.LBB1_15
.LBB1_18:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$177, %ecx
	jmp	.LBB1_15
.LBB1_20:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$178, %ecx
	jmp	.LBB1_15
.LBB1_22:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$179, %ecx
	jmp	.LBB1_15
.LBB1_24:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$180, %ecx
	jmp	.LBB1_15
.LBB1_63:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$182, %ecx
	jmp	.LBB1_15
.LBB1_31:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$190, %ecx
	jmp	.LBB1_32
.LBB1_36:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$194, %ecx
	jmp	.LBB1_32
.LBB1_38:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$197, %ecx
	jmp	.LBB1_32
.LBB1_40:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$199, %ecx
	jmp	.LBB1_32
.LBB1_50:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$220, %ecx
	jmp	.LBB1_32
.LBB1_52:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$221, %ecx
	jmp	.LBB1_32
.LBB1_54:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$222, %ecx
	jmp	.LBB1_32
.LBB1_56:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$223, %ecx
	jmp	.LBB1_32
.LBB1_58:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
	movl	$.L.str.8, %edx
	movl	$224, %ecx
	jmp	.LBB1_32
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6getMinPfPiiiiS_S0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6getMinPfPiiiiS_S0_,@object   # @_Z6getMinPfPiiiiS_S0_
	.section	.rodata,"a",@progbits
	.globl	_Z6getMinPfPiiiiS_S0_
	.p2align	3, 0x0
_Z6getMinPfPiiiiS_S0_:
	.quad	_Z21__device_stub__getMinPfPiiiiS_S0_
	.size	_Z6getMinPfPiiiiS_S0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Usage: "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" size\n"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Cannot allocate memory\n"
	.size	.L.str.2, 24

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Create dataset elapsed time: "
	.size	.L.str.3, 30

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" ms\n"
	.size	.L.str.4, 5

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Stream size: "
	.size	.L.str.5, 14

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\n"
	.size	.L.str.6, 2

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Error: %s:%d, "
	.size	.L.str.7, 15

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/hle46/Reduction/master/reduction_gpu3.hip"
	.size	.L.str.8, 104

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"code: %d, reason: %s\n"
	.size	.L.str.9, 22

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Number of elements: "
	.size	.L.str.10, 21

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	", min val: "
	.size	.L.str.11, 12

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	", min idx: "
	.size	.L.str.12, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6getMinPfPiiiiS_S0_"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__getMinPfPiiiiS_S0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6getMinPfPiiiiS_S0_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6getMinPfPiiiiS_S0_   ; -- Begin function _Z6getMinPfPiiiiS_S0_
	.globl	_Z6getMinPfPiiiiS_S0_
	.p2align	8
	.type	_Z6getMinPfPiiiiS_S0_,@function
_Z6getMinPfPiiiiS_S0_:                  ; @_Z6getMinPfPiiiiS_S0_
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_lshl_or_b32 v1, s15, 10, v0
	v_mov_b32_e32 v7, 0x7f800000
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s8, v1
	v_cmpx_gt_i32_e64 s9, v1
	s_cbranch_execz .LBB0_16
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v6, 0x80, v1
	v_mov_b32_e32 v5, 0x7f800000
	v_mov_b32_e32 v7, 0x7f800000
	s_mov_b32 s3, exec_lo
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_cmpx_gt_i32_e64 s9, v6
	s_cbranch_execz .LBB0_3
; %bb.2:
	global_load_b32 v7, v[2:3], off offset:512
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v8, 0x100, v1
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s9, v8
	s_cbranch_execz .LBB0_5
; %bb.4:
	global_load_b32 v5, v[2:3], off offset:1024
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v10, 0x180, v1
	v_mov_b32_e32 v9, 0x7f800000
	v_mov_b32_e32 v11, 0x7f800000
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_i32_e64 s9, v10
	s_cbranch_execz .LBB0_7
; %bb.6:
	global_load_b32 v11, v[2:3], off offset:1536
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v12, 0x200, v1
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s9, v12
	s_cbranch_execz .LBB0_9
; %bb.8:
	global_load_b32 v9, v[2:3], off offset:2048
.LBB0_9:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v14, 0x280, v1
	v_mov_b32_e32 v13, 0x7f800000
	v_mov_b32_e32 v15, 0x7f800000
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_i32_e64 s9, v14
	s_cbranch_execz .LBB0_11
; %bb.10:
	global_load_b32 v15, v[2:3], off offset:2560
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v16, 0x300, v1
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s9, v16
	s_cbranch_execz .LBB0_13
; %bb.12:
	global_load_b32 v13, v[2:3], off offset:3072
.LBB0_13:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v17, 0x380, v1
	v_mov_b32_e32 v18, 0x7f800000
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s9, v17
	s_cbranch_execz .LBB0_15
; %bb.14:
	global_load_b32 v18, v[2:3], off offset:3584
.LBB0_15:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v7, v4
	v_dual_cndmask_b32 v1, v1, v6 :: v_dual_cndmask_b32 v2, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v5, v2
	v_dual_cndmask_b32 v1, v1, v8 :: v_dual_cndmask_b32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v11, v2
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v2, v2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v9, v2
	v_dual_cndmask_b32 v1, v1, v12 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v15, v2
	v_dual_cndmask_b32 v1, v1, v14 :: v_dual_cndmask_b32 v2, v2, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v13, v2
	v_dual_cndmask_b32 v1, v1, v16 :: v_dual_cndmask_b32 v2, v2, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v18, v2
	v_cndmask_b32_e32 v1, v1, v17, vcc_lo
	v_cndmask_b32_e32 v7, v2, v18, vcc_lo
.LBB0_16:                               ; %Flow263
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v6, 2, v0
	v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
	ds_store_2addr_stride64_b32 v6, v1, v7 offset1:2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_load_b32 s2, s[0:1], 0x3c
	v_add_nc_u32_e32 v8, 0x200, v6
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmpk_gt_u32 s2, 0x3ff
	s_cselect_b32 s3, -1, 0
	s_and_b32 s4, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_20
; %bb.17:
	ds_load_2addr_stride64_b32 v[2:3], v8 offset1:8
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v2
	s_cbranch_execz .LBB0_19
; %bb.18:
	ds_load_b32 v1, v6 offset:2048
	v_mov_b32_e32 v7, v3
	ds_store_b32 v8, v3
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v6, v1
.LBB0_19:                               ; %Flow262
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_20:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
	s_cmpk_gt_u32 s2, 0x1ff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s3, -1, 0
	s_barrier
	s_and_b32 s4, vcc_lo, s3
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_24
; %bb.21:
	ds_load_2addr_stride64_b32 v[2:3], v8 offset1:4
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v2
	s_cbranch_execz .LBB0_23
; %bb.22:
	ds_load_b32 v1, v6 offset:1024
	v_mov_b32_e32 v7, v3
	ds_store_b32 v8, v3
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v6, v1
.LBB0_23:                               ; %Flow261
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_24:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
	s_cmpk_gt_u32 s2, 0xff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s3, -1, 0
	s_barrier
	s_and_b32 s4, vcc_lo, s3
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_28
; %bb.25:
	ds_load_2addr_stride64_b32 v[2:3], v8 offset1:2
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v2
	s_cbranch_execz .LBB0_27
; %bb.26:
	ds_store_b32 v8, v3
	ds_load_b32 v1, v6 offset:512
	v_mov_b32_e32 v7, v3
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v6, v1
.LBB0_27:                               ; %Flow260
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_28:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_u32_e32 vcc_lo, 64, v0
	s_cmpk_gt_u32 s2, 0x7f
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s2, -1, 0
	s_barrier
	s_and_b32 s3, vcc_lo, s2
	buffer_gl0_inv
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_32
; %bb.29:
	ds_load_2addr_stride64_b32 v[2:3], v8 offset1:1
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v2
	s_cbranch_execz .LBB0_31
; %bb.30:
	ds_load_b32 v1, v6 offset:256
	v_mov_b32_e32 v7, v3
	ds_store_b32 v8, v3
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v6, v1
.LBB0_31:                               ; %Flow259
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_32:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB0_46
; %bb.33:
	v_or_b32_e32 v9, 32, v0
	s_mov_b64 s[2:3], src_shared_base
	v_cmp_ne_u32_e64 s2, -1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v2, v9, 2, 0x200
	v_cndmask_b32_e64 v3, 0, s3, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v2
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cndmask_b32_e64 v2, 0, v8, s2
	s_mov_b32 s2, exec_lo
	flat_load_b32 v10, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v11, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v10, v11
	s_cbranch_execz .LBB0_35
; %bb.34:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v1, 2, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_35:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 64, v8
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v9, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v10, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v9, v10
	s_cbranch_execz .LBB0_37
; %bb.36:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 64, v6
	s_mov_b64 s[8:9], src_shared_base
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s9, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v5, 0, s9, vcc_lo
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_37:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 32, v8
	s_mov_b64 s[2:3], src_shared_base
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v9, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v10, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v9, v10
	s_cbranch_execz .LBB0_39
; %bb.38:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 32, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_39:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 16, v8
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v9, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v10, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v9, v10
	s_cbranch_execz .LBB0_41
; %bb.40:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 16, v6
	s_mov_b64 s[8:9], src_shared_base
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s9, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v5, 0, s9, vcc_lo
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_41:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 8, v8
	s_mov_b64 s[2:3], src_shared_base
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v9, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v10, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v9, v10
	s_cbranch_execz .LBB0_43
; %bb.42:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 8, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_43:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 4, v8
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v8, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v9, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v8, v9
	s_cbranch_execz .LBB0_45
; %bb.44:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 4, v6
	s_mov_b64 s[8:9], src_shared_base
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s9, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v3, 0, s9, vcc_lo
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_45:                               ; %Flow257
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_46:                               ; %Flow258
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_mov_b32 s5, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_50
; %bb.47:
	s_load_b128 s[0:3], s[0:1], 0x20
	s_add_i32 s4, s15, s10
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[4:5], s[4:5], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_cmp_eq_u64 s[6:7], 0
	global_store_b32 v0, v7, s[0:1]
	s_cbranch_scc1 .LBB0_49
; %bb.48:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
.LBB0_49:
	s_add_u32 s0, s2, s4
	s_addc_u32 s1, s3, s5
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_50:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6getMinPfPiiiiS_S0_
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6getMinPfPiiiiS_S0_, .Lfunc_end0-_Z6getMinPfPiiiiS_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2216
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6getMinPfPiiiiS_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6getMinPfPiiiiS_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
