#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <math.h>
#include <fcntl.h>

#define BUFFER_SIZE 2
#define P 1272461               // a large prime number
#define Z 32909                 // a random number from [0,P-1]

//****************************************************************
// This code may not compile, to be tested on CUDA capable devices
//****************************************************************

typedef struct
{
    long long sum = 0;
    long long weight = 0;
    long long fingerprint = 0;
} one_sparse_sampler;

__device__ float hash(int* coeff, int numCoefficients, int value) {

}

__global__ void process(one_sparse_sampler *samplers, int *buffer, int *s, int *k) {
    int row = blockIdx.x;
    int col = *buffer % (2 * (*s));
    int index = row * 2 * (*s) + col;
    int x = buffer[0];              // index of the vector following lecture notes
    int a = buffer[1];              // either 1 or -1 following lecture notes
    samplers[index].weight += a;
    samplers[index].sum += x * a;
    samplers[index].fingerprint += (a * pow((double) Z, (double) x));
}

void s_sparse_sampler(int s, int k) {
    int array_size = 2 * s * k;
    int sampler_size = sizeof(one_sparse_sampler);

    int *d_s, *d_k;
    int *d_buffer;                      // device copy of the data
    one_sparse_sampler *samplers;       // host copy of the samplers
    one_sparse_sampler *d_samplers;     // device copy of the samplers
    int *buffer;                        // host copy of the data

    // Allocate memory
    cudaMallocManaged((void**)&d_s, sizeof(int));
    cudaMallocManaged((void**)&d_k, sizeof(int));
    samplers = (one_sparse_sampler *) malloc(array_size * sampler_size);

    // Read data from file
    FILE *fdIn = fopen("10int.dat", "r");
    while ( fgets((char*) buffer, BUFFER_SIZE * sizeof(int), fdIn )) {
        // Copy data from host to device
        cudaMemcpy(d_buffer, buffer, BUFFER_SIZE * sizeof(int), cudaMemcpyHostToDevice);

        for (int i = 0; i < BUFFER_SIZE; i++) {
            // Launch the process kernel on GPU
            process<<<k,1>>>(d_samplers, d_buffer, d_s, d_k);
        }

    }

    // Copy result back to host
    cudaMemcpy(samplers, d_samplers, array_size * sampler_size, cudaMemcpyDeviceToHost);

    // Clean up
    free(samplers);
    cudaFree(d_samplers);
}

int main(void) {

    return 0;
}

	.file	"tmpxft_002c99de_00000000-6_s_sparse_sampler-old.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4hashPiii
	.type	_Z4hashPiii, @function
_Z4hashPiii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z4hashPiii, .-_Z4hashPiii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2033:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE2033:
	.size	main, .-main
	.text
	.globl	_Z53__device_stub__Z7processP18one_sparse_samplerPiS1_S1_P18one_sparse_samplerPiS1_S1_
	.type	_Z53__device_stub__Z7processP18one_sparse_samplerPiS1_S1_P18one_sparse_samplerPiS1_S1_, @function
_Z53__device_stub__Z7processP18one_sparse_samplerPiS1_S1_P18one_sparse_samplerPiS1_S1_:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7processP18one_sparse_samplerPiS1_S1_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L5:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z53__device_stub__Z7processP18one_sparse_samplerPiS1_S1_P18one_sparse_samplerPiS1_S1_, .-_Z53__device_stub__Z7processP18one_sparse_samplerPiS1_S1_P18one_sparse_samplerPiS1_S1_
	.globl	_Z7processP18one_sparse_samplerPiS1_S1_
	.type	_Z7processP18one_sparse_samplerPiS1_S1_, @function
_Z7processP18one_sparse_samplerPiS1_S1_:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z7processP18one_sparse_samplerPiS1_S1_P18one_sparse_samplerPiS1_S1_
	.cfi_endproc
.LFE2059:
	.size	_Z7processP18one_sparse_samplerPiS1_S1_, .-_Z7processP18one_sparse_samplerPiS1_S1_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"10int.dat"
	.text
	.globl	_Z16s_sparse_samplerii
	.type	_Z16s_sparse_samplerii, @function
_Z16s_sparse_samplerii:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1, %edx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movabsq	$4294967297, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	imull	%esi, %ebx
	movl	$4, %esi
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	imull	$48, %ebx, %ebx
	leaq	16(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$4, %esi
	leaq	24(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movslq	%ebx, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	leaq	.LC0(%rip), %rsi
	leaq	.LC1(%rip), %rdi
	movq	%rax, 8(%rsp)
	call	fopen@PLT
	movq	%rax, %r13
.L12:
	orq	$-1, %rsi
	xorl	%edi, %edi
	movq	%r13, %rcx
	movl	$8, %edx
	call	__fgets_chk@PLT
	testq	%rax, %rax
	je	.L19
	xorl	%edi, %edi
	movl	$1, %ecx
	movl	$8, %edx
	movl	$2, %r15d
	movq	%rdi, %rsi
	call	cudaMemcpy@PLT
.L14:
	movq	%r14, 36(%rsp)
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, 32(%rsp)
	movq	32(%rsp), %rdi
	movq	%r14, %rdx
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	xorl	%edi, %edi
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	%rdi, %rsi
	call	_Z53__device_stub__Z7processP18one_sparse_samplerPiS1_S1_P18one_sparse_samplerPiS1_S1_
.L13:
	decl	%r15d
	je	.L12
	movl	$1, %r15d
	jmp	.L14
.L19:
	xorl	%ebp, %ebp
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z16s_sparse_samplerii, .-_Z16s_sparse_samplerii
	.section	.rodata.str1.1
.LC2:
	.string	"_Z7processP18one_sparse_samplerPiS1_S1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7processP18one_sparse_samplerPiS1_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <math.h>
#include <fcntl.h>

#define BUFFER_SIZE 2
#define P 1272461               // a large prime number
#define Z 32909                 // a random number from [0,P-1]

//****************************************************************
// This code may not compile, to be tested on CUDA capable devices
//****************************************************************

typedef struct
{
    long long sum = 0;
    long long weight = 0;
    long long fingerprint = 0;
} one_sparse_sampler;

__device__ float hash(int* coeff, int numCoefficients, int value) {

}

__global__ void process(one_sparse_sampler *samplers, int *buffer, int *s, int *k) {
    int row = blockIdx.x;
    int col = *buffer % (2 * (*s));
    int index = row * 2 * (*s) + col;
    int x = buffer[0];              // index of the vector following lecture notes
    int a = buffer[1];              // either 1 or -1 following lecture notes
    samplers[index].weight += a;
    samplers[index].sum += x * a;
    samplers[index].fingerprint += (a * pow((double) Z, (double) x));
}

void s_sparse_sampler(int s, int k) {
    int array_size = 2 * s * k;
    int sampler_size = sizeof(one_sparse_sampler);

    int *d_s, *d_k;
    int *d_buffer;                      // device copy of the data
    one_sparse_sampler *samplers;       // host copy of the samplers
    one_sparse_sampler *d_samplers;     // device copy of the samplers
    int *buffer;                        // host copy of the data

    // Allocate memory
    hipMallocManaged((void**)&d_s, sizeof(int));
    hipMallocManaged((void**)&d_k, sizeof(int));
    samplers = (one_sparse_sampler *) malloc(array_size * sampler_size);

    // Read data from file
    FILE *fdIn = fopen("10int.dat", "r");
    while ( fgets((char*) buffer, BUFFER_SIZE * sizeof(int), fdIn )) {
        // Copy data from host to device
        hipMemcpy(d_buffer, buffer, BUFFER_SIZE * sizeof(int), hipMemcpyHostToDevice);

        for (int i = 0; i < BUFFER_SIZE; i++) {
            // Launch the process kernel on GPU
            process<<<k,1>>>(d_samplers, d_buffer, d_s, d_k);
        }

    }

    // Copy result back to host
    hipMemcpy(samplers, d_samplers, array_size * sampler_size, hipMemcpyDeviceToHost);

    // Clean up
    free(samplers);
    hipFree(d_samplers);
}

int main(void) {

    return 0;
}

	.text
	.file	"s_sparse_sampler-old.hip"
	.globl	_Z22__device_stub__processP18one_sparse_samplerPiS1_S1_ # -- Begin function _Z22__device_stub__processP18one_sparse_samplerPiS1_S1_
	.type	_Z22__device_stub__processP18one_sparse_samplerPiS1_S1_,@function
_Z22__device_stub__processP18one_sparse_samplerPiS1_S1_: # @_Z22__device_stub__processP18one_sparse_samplerPiS1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7processP18one_sparse_samplerPiS1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__processP18one_sparse_samplerPiS1_S1_, .Lfunc_end0-_Z22__device_stub__processP18one_sparse_samplerPiS1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z16s_sparse_samplerii          # -- Begin function _Z16s_sparse_samplerii
	.type	_Z16s_sparse_samplerii,@function
_Z16s_sparse_samplerii:                 # @_Z16s_sparse_samplerii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movl	%edi, %ebx
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$4, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	imull	%ebp, %ebx
	shll	$4, %ebx
	leal	(%rbx,%rbx,2), %eax
	movslq	%eax, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r15
	movl	$8, %esi
	movq	%rax, %rdx
	callq	fgets
	testq	%rax, %rax
	je	.LBB1_7
# %bb.1:                                # %.lr.ph
	movabsq	$4294967296, %r12               # imm = 0x100000000
	movl	%ebp, %r13d
	btsq	$32, %r13
	incq	%r12
.LBB1_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	movl	$8, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movb	$1, %bpl
.LBB1_4:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:                                #   in Loop: Header=BB1_4 Depth=2
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z22__device_stub__processP18one_sparse_samplerPiS1_S1_
.LBB1_6:                                #   in Loop: Header=BB1_4 Depth=2
	testb	$1, %bpl
	movl	$0, %ebp
	jne	.LBB1_4
# %bb.2:                                # %.loopexit
                                        #   in Loop: Header=BB1_3 Depth=1
	movl	$8, %esi
	movq	%r15, %rdx
	callq	fgets
	testq	%rax, %rax
	jne	.LBB1_3
.LBB1_7:                                # %._crit_edge
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	callq	free
	callq	hipFree
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z16s_sparse_samplerii, .Lfunc_end1-_Z16s_sparse_samplerii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7processP18one_sparse_samplerPiS1_S1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7processP18one_sparse_samplerPiS1_S1_,@object # @_Z7processP18one_sparse_samplerPiS1_S1_
	.section	.rodata,"a",@progbits
	.globl	_Z7processP18one_sparse_samplerPiS1_S1_
	.p2align	3, 0x0
_Z7processP18one_sparse_samplerPiS1_S1_:
	.quad	_Z22__device_stub__processP18one_sparse_samplerPiS1_S1_
	.size	_Z7processP18one_sparse_samplerPiS1_S1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"10int.dat"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"r"
	.size	.L.str.1, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7processP18one_sparse_samplerPiS1_S1_"
	.size	.L__unnamed_1, 40

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__processP18one_sparse_samplerPiS1_S1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7processP18one_sparse_samplerPiS1_S1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7processP18one_sparse_samplerPiS1_S1_ ; -- Begin function _Z7processP18one_sparse_samplerPiS1_S1_
	.globl	_Z7processP18one_sparse_samplerPiS1_S1_
	.p2align	8
	.type	_Z7processP18one_sparse_samplerPiS1_S1_,@function
_Z7processP18one_sparse_samplerPiS1_S1_: ; @_Z7processP18one_sparse_samplerPiS1_S1_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mov_b32 s16, 0x4222de17
	s_mov_b32 s17, 0x3fbdee67
	s_waitcnt lgkmcnt(0)
	s_load_b32 s4, s[2:3], 0x0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s5, s4, 1
	s_bfe_i32 s6, s4, 0x1001e
	s_load_b64 s[2:3], s[2:3], 0x0
	s_add_i32 s5, s5, s6
	s_mul_i32 s15, s15, s4
	s_xor_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s5
	s_sub_i32 s7, 0, s5
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s8, s2, 31
	s_mul_i32 s13, s3, s2
	s_add_i32 s9, s2, s8
	v_cvt_u32_f32_e32 v0, v0
	s_xor_b32 s9, s9, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v0
	s_mul_i32 s7, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s7, s6, s7
	s_add_i32 s6, s6, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s6, s9, s6
	s_mul_i32 s6, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s6, s9, s6
	s_sub_i32 s7, s6, s5
	s_cmp_ge_u32 s6, s5
	s_cselect_b32 s6, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s7, s6, s5
	s_cmp_ge_u32 s6, s5
	s_cselect_b32 s5, s7, s6
	s_ashr_i32 s12, s3, 31
	s_xor_b32 s4, s5, s8
	s_lshl_b32 s5, s15, 1
	s_sub_i32 s4, s4, s8
	s_mov_b32 s14, 0x968915a9
	s_add_i32 s4, s5, s4
	s_mov_b32 s15, 0x3fba6564
	s_mul_i32 s5, s4, 24
	s_mul_hi_i32 s6, s4, 24
	s_add_u32 s4, s0, s5
	s_addc_u32 s5, s1, s6
	s_mov_b32 s1, 0x3ff00000
	s_clause 0x1
	s_load_b128 s[8:11], s[4:5], 0x0
	s_load_b64 s[6:7], s[4:5], 0x10
	s_waitcnt lgkmcnt(0)
	s_add_u32 s10, s10, s3
	s_addc_u32 s11, s11, s12
	s_ashr_i32 s0, s13, 31
	s_add_u32 s12, s8, s13
	s_addc_u32 s13, s9, s0
	s_cmp_eq_u32 s2, 0
	s_mov_b32 s0, 0
	s_cselect_b32 s1, s1, 0x40e011a0
	s_mov_b32 s9, 0x3fe55555
	v_frexp_mant_f64_e32 v[0:1], s[0:1]
	s_mov_b32 s8, 0x55555555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_f64_e32 vcc_lo, s[8:9], v[0:1]
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], v2
	v_add_f64 v[2:3], v[0:1], 1.0
	v_add_f64 v[8:9], v[0:1], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	v_add_f64 v[10:11], v[2:3], -1.0
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5]
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5]
	v_mul_f64 v[6:7], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[2:3], v[6:7]
	v_fma_f64 v[2:3], v[6:7], v[2:3], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[6:7], v[0:1], v[2:3]
	v_add_f64 v[2:3], v[12:13], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[2:3]
	v_add_f64 v[12:13], v[2:3], -v[12:13]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[12:13], -v[0:1]
	v_add_f64 v[2:3], v[8:9], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_add_f64 v[0:1], v[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[4:5], v[0:1]
	v_add_f64 v[2:3], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[2:3], -v[6:7]
	v_mul_f64 v[6:7], v[2:3], v[2:3]
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[8:9], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[8:9], v[4:5]
	v_add_f64 v[8:9], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], s[16:17], s[14:15]
	s_mov_b32 s14, 0x3abe935a
	s_mov_b32 s15, 0x3fbe25e4
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	v_mul_f64 v[16:17], v[2:3], v[8:9]
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[14:15]
	s_mov_b32 s14, 0x47e6c9c2
	s_mov_b32 s15, 0x3fc110ef
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[14:15]
	s_mov_b32 s14, 0xcfa74449
	s_mov_b32 s15, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[14:15]
	s_mov_b32 s14, 0x71bf3c30
	s_mov_b32 s15, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[14:15]
	s_mov_b32 s14, 0x1c7792ce
	s_mov_b32 s15, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[14:15]
	s_mov_b32 s14, 0x924920da
	s_mov_b32 s15, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[14:15]
	s_mov_b32 s14, 0x9999999c
	s_mov_b32 s15, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[14:15]
	s_mov_b32 s14, 0x652b82fe
	s_mov_b32 s15, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[8:9], v[10:11]
	v_fma_f64 v[6:7], v[8:9], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[10:11], v[6:7]
	v_add_f64 v[10:11], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[14:15], v[10:11], s[8:9]
	v_add_f64 v[12:13], v[10:11], -v[12:13]
	s_mov_b32 s9, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[18:19], v[14:15], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_fma_f64 v[12:13], v[8:9], v[2:3], -v[16:17]
	s_mov_b32 s8, 0xd5df274d
	s_mov_b32 s9, 0x3c8543b0
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], s[8:9]
	v_fma_f64 v[8:9], v[8:9], v[0:1], v[12:13]
	v_ldexp_f64 v[0:1], v[0:1], 1
	s_mov_b32 s9, 0x3c7abc9e
	s_mov_b32 s8, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[4:5], v[4:5], v[2:3], v[8:9]
	v_ldexp_f64 v[2:3], v[2:3], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[14:15], v[6:7]
	v_add_f64 v[10:11], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[8:9]
	v_mul_f64 v[14:15], v[10:11], v[8:9]
	v_add_f64 v[16:17], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fma_f64 v[12:13], v[10:11], v[8:9], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[16:17]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
	v_frexp_exp_i32_f64_e32 v8, s[0:1]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_add_f64 v[6:7], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	v_cvt_f64_i32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[2:3], v[6:7]
	v_add_f64 v[12:13], v[6:7], -v[14:15]
	v_mul_f64 v[14:15], v[8:9], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[10:11], -v[2:3]
	v_add_f64 v[4:5], v[4:5], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], s[0:1], -v[14:15]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[2:3], v[6:7], -v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], v[0:1], v[4:5]
	v_fma_f64 v[4:5], v[8:9], s[8:9], v[12:13]
	s_mov_b32 s9, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_add_f64 v[2:3], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[10:11], v[0:1]
	v_add_f64 v[14:15], v[2:3], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[2:3], v[6:7]
	v_add_f64 v[10:11], v[6:7], -v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[8:9], -v[2:3]
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[8:9], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_add_f64 v[10:11], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	v_add_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[10:11], -v[4:5]
	v_add_f64 v[2:3], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[6:7]
	v_add_f64 v[0:1], v[0:1], -v[6:7]
	v_add_f64 v[12:13], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[6:7], v[12:13], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], v[0:1], v[4:5]
	v_cvt_f64_i32_e32 v[4:5], s2
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_add_f64 v[2:3], v[12:13], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[2:3], -v[12:13]
	v_mul_f64 v[8:9], v[2:3], v[4:5]
	v_add_f64 v[0:1], v[0:1], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[4:5], v[2:3], -v[8:9]
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x204
	v_fma_f64 v[0:1], v[4:5], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[8:9], v[0:1]
	v_dual_cndmask_b32 v5, v3, v9 :: v_dual_cndmask_b32 v4, v2, v8
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	v_cvt_f64_i32_e32 v[8:9], s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[4:5]|
	v_add_f64 v[0:1], v[0:1], -v[2:3]
	v_cvt_f64_u32_e32 v[2:3], s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0, v1, vcc_lo
	v_mul_f64 v[6:7], v[4:5], s[14:15]
	v_rndne_f64_e32 v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[6:7], s[0:1], v[4:5]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v14, v[6:7]
	v_fma_f64 v[10:11], v[6:7], s[8:9], v[10:11]
	s_mov_b32 s8, 0x6a5dcb37
	s_mov_b32 s9, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], s[8:9], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[4:5]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[4:5]
	v_ldexp_f64 v[4:5], v[8:9], 32
	v_cvt_f64_i32_e32 v[8:9], s3
	v_fma_f64 v[12:13], v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[4:5], v[2:3]
	v_fma_f64 v[6:7], v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[6:7], v[6:7], v14
	v_cndmask_b32_e64 v7, 0x7ff00000, v7, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, 0, v7, s1
	v_cndmask_b32_e32 v0, 0, v0, vcc_lo
	s_and_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], v[6:7], v[0:1], v[6:7]
	v_cmp_class_f64_e64 vcc_lo, v[6:7], 0x204
	v_dual_cndmask_b32 v1, v1, v7 :: v_dual_cndmask_b32 v0, v0, v6
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], |v[0:1]|, v[8:9], v[2:3]
	v_trunc_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[0:1], 0xffffffe0
	v_floor_f64_e32 v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]
	v_cvt_i32_f64_e32 v5, v[2:3]
	v_dual_mov_b32 v3, s11 :: v_dual_mov_b32 v2, s10
	v_cvt_u32_f64_e32 v4, v[0:1]
	v_dual_mov_b32 v0, s12 :: v_dual_mov_b32 v1, s13
	s_clause 0x1
	global_store_b128 v6, v[0:3], s[4:5]
	global_store_b64 v6, v[4:5], s[4:5] offset:16
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7processP18one_sparse_samplerPiS1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7processP18one_sparse_samplerPiS1_S1_, .Lfunc_end0-_Z7processP18one_sparse_samplerPiS1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2276
; NumSgprs: 20
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7processP18one_sparse_samplerPiS1_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z7processP18one_sparse_samplerPiS1_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
