#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <time.h>

#define TILE_SIZE 16

unsigned char *d_input;
unsigned char *d_output;
float *d_filter;

inline cudaError_t checkCuda(cudaError_t result) {
	#if defined(DEBUG) || defined(_DEBUG)
		if (result != cudaSuccess) {
			fprintf(stderr, "CUDA Runtime Error: %s\n", cudaGetErrorString(result));
			exit(-1);
		}
	#endif
		return result;
}

__global__ void gaussianBlur(unsigned char *input,
							 unsigned char *output,
							 unsigned int rows,
							 unsigned int cols,
							 float *filter,
							 int filter_width) {
	
	int x = blockIdx.x * TILE_SIZE + threadIdx.x;
	int y = blockIdx.y * TILE_SIZE + threadIdx.y;
	if (x > cols || y > rows)
		return;
	int index = y * cols + x;

	// Blur algorthm using weighted average (recommended)
	float result = 0.0;
	for (int r = -filter_width / 2; r < filter_width / 2; r++) {
		for (int c = -filter_width / 2; c < filter_width / 2; c++) {
			int cur_row = r + y; 
			int cur_col = c + x;
			//if pixel is not at the edge of the image
			if ((cur_row > -1) && (cur_row < rows) &&
				(cur_col > -1) && (cur_col < cols)) { 
				int filter_id = (r + filter_width / 2) * filter_width + (c + filter_width / 2);	
				result += input[cur_row * cols + cur_col] * filter[filter_id]; 
			}
		}
	}
	output[index] = result;
}

void imageBlur (unsigned char* h_input,
			    unsigned char* h_output,
				unsigned int rows,
			    unsigned int cols,
				float* h_filter,
				int filter_width) {

	// block and grid size
	int gridX = 1 + ((cols - 1) / TILE_SIZE);
	int gridY = 1 + ((rows - 1) / TILE_SIZE);
	dim3 dimGrid(gridX, gridY);
	dim3 dimBlock(TILE_SIZE, TILE_SIZE);

	// allocate memory and copy to GPU
	int size = rows * cols;
	checkCuda(cudaMalloc((void**)&d_input, size * sizeof(unsigned char)));
	checkCuda(cudaMalloc((void**)&d_output, size * sizeof(unsigned char)));
	checkCuda(cudaMalloc((void**)&d_filter, filter_width * filter_width * sizeof(float)));
	checkCuda(cudaMemset(d_output, 0, size * sizeof(unsigned char)));
	checkCuda(cudaMemcpy(d_input, h_input, size * sizeof(unsigned char), cudaMemcpyHostToDevice));
	checkCuda(cudaMemcpy(d_filter, h_filter, filter_width * filter_width * sizeof(float), cudaMemcpyHostToDevice));
		
	//kernel call
	gaussianBlur<<<dimGrid, dimBlock>>>(d_input, d_output, rows, cols, d_filter, filter_width);

	//copy output to host
	checkCuda(cudaMemcpy(h_output, d_output, size * sizeof(unsigned char), cudaMemcpyDeviceToHost));

	// free memory
	checkCuda(cudaFree(d_input));
	checkCuda(cudaFree(d_output));
}

	.file	"tmpxft_0037c2f9_00000000-6_image_blur.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z39__device_stub__Z12gaussianBlurPhS_jjPfiPhS_jjPfi
	.type	_Z39__device_stub__Z12gaussianBlurPhS_jjPfiPhS_jjPfi, @function
_Z39__device_stub__Z12gaussianBlurPhS_jjPfiPhS_jjPfi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12gaussianBlurPhS_jjPfi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z39__device_stub__Z12gaussianBlurPhS_jjPfiPhS_jjPfi, .-_Z39__device_stub__Z12gaussianBlurPhS_jjPfiPhS_jjPfi
	.globl	_Z12gaussianBlurPhS_jjPfi
	.type	_Z12gaussianBlurPhS_jjPfi, @function
_Z12gaussianBlurPhS_jjPfi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z12gaussianBlurPhS_jjPfiPhS_jjPfi
	.cfi_endproc
.LFE2054:
	.size	_Z12gaussianBlurPhS_jjPfi, .-_Z12gaussianBlurPhS_jjPfi
	.globl	_Z9imageBlurPhS_jjPfi
	.type	_Z9imageBlurPhS_jjPfi, @function
_Z9imageBlurPhS_jjPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leal	-1(%rcx), %eax
	movq	%rdi, %r15
	leaq	d_input(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	shrl	$4, %eax
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	incl	%eax
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r12d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	imull	%r12d, %ebp
	imull	%edx, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movslq	%ebp, %rbp
	movl	%eax, 24(%rsp)
	leal	-1(%rdx), %eax
	movslq	%ebx, %rbx
	salq	$2, %rbp
	shrl	$4, %eax
	movq	%rsi, (%rsp)
	movq	%rbx, %rsi
	incl	%eax
	movq	%r8, 8(%rsp)
	movl	%eax, 28(%rsp)
	movabsq	$68719476752, %rax
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	d_output(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbp, %rsi
	leaq	d_filter(%rip), %rdi
	call	cudaMalloc@PLT
	movq	d_output(%rip), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	call	cudaMemset@PLT
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movq	d_input(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	d_filter(%rip), %rdi
	call	cudaMemcpy@PLT
	movl	44(%rsp), %ecx
	movl	32(%rsp), %esi
	xorl	%r9d, %r9d
	movq	36(%rsp), %rdx
	movq	24(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	d_filter(%rip), %r8
	movl	%r12d, %r9d
	movl	%r14d, %ecx
	movl	%r13d, %edx
	movq	d_output(%rip), %rsi
	movq	d_input(%rip), %rdi
	call	_Z39__device_stub__Z12gaussianBlurPhS_jjPfiPhS_jjPfi
.L9:
	movq	(%rsp), %rdi
	movq	d_output(%rip), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	d_input(%rip), %rdi
	call	cudaFree@PLT
	movq	d_output(%rip), %rdi
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z9imageBlurPhS_jjPfi, .-_Z9imageBlurPhS_jjPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z12gaussianBlurPhS_jjPfi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12gaussianBlurPhS_jjPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	d_filter
	.bss
	.align 8
	.type	d_filter, @object
	.size	d_filter, 8
d_filter:
	.zero	8
	.globl	d_output
	.align 8
	.type	d_output, @object
	.size	d_output, 8
d_output:
	.zero	8
	.globl	d_input
	.align 8
	.type	d_input, @object
	.size	d_input, 8
d_input:
	.zero	8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>

#define TILE_SIZE 16

unsigned char *d_input;
unsigned char *d_output;
float *d_filter;

inline hipError_t checkCuda(hipError_t result) {
	#if defined(DEBUG) || defined(_DEBUG)
		if (result != hipSuccess) {
			fprintf(stderr, "CUDA Runtime Error: %s\n", hipGetErrorString(result));
			exit(-1);
		}
	#endif
		return result;
}

__global__ void gaussianBlur(unsigned char *input,
							 unsigned char *output,
							 unsigned int rows,
							 unsigned int cols,
							 float *filter,
							 int filter_width) {
	
	int x = blockIdx.x * TILE_SIZE + threadIdx.x;
	int y = blockIdx.y * TILE_SIZE + threadIdx.y;
	if (x > cols || y > rows)
		return;
	int index = y * cols + x;

	// Blur algorthm using weighted average (recommended)
	float result = 0.0;
	for (int r = -filter_width / 2; r < filter_width / 2; r++) {
		for (int c = -filter_width / 2; c < filter_width / 2; c++) {
			int cur_row = r + y; 
			int cur_col = c + x;
			//if pixel is not at the edge of the image
			if ((cur_row > -1) && (cur_row < rows) &&
				(cur_col > -1) && (cur_col < cols)) { 
				int filter_id = (r + filter_width / 2) * filter_width + (c + filter_width / 2);	
				result += input[cur_row * cols + cur_col] * filter[filter_id]; 
			}
		}
	}
	output[index] = result;
}

void imageBlur (unsigned char* h_input,
			    unsigned char* h_output,
				unsigned int rows,
			    unsigned int cols,
				float* h_filter,
				int filter_width) {

	// block and grid size
	int gridX = 1 + ((cols - 1) / TILE_SIZE);
	int gridY = 1 + ((rows - 1) / TILE_SIZE);
	dim3 dimGrid(gridX, gridY);
	dim3 dimBlock(TILE_SIZE, TILE_SIZE);

	// allocate memory and copy to GPU
	int size = rows * cols;
	checkCuda(hipMalloc((void**)&d_input, size * sizeof(unsigned char)));
	checkCuda(hipMalloc((void**)&d_output, size * sizeof(unsigned char)));
	checkCuda(hipMalloc((void**)&d_filter, filter_width * filter_width * sizeof(float)));
	checkCuda(hipMemset(d_output, 0, size * sizeof(unsigned char)));
	checkCuda(hipMemcpy(d_input, h_input, size * sizeof(unsigned char), hipMemcpyHostToDevice));
	checkCuda(hipMemcpy(d_filter, h_filter, filter_width * filter_width * sizeof(float), hipMemcpyHostToDevice));
		
	//kernel call
	gaussianBlur<<<dimGrid, dimBlock>>>(d_input, d_output, rows, cols, d_filter, filter_width);

	//copy output to host
	checkCuda(hipMemcpy(h_output, d_output, size * sizeof(unsigned char), hipMemcpyDeviceToHost));

	// free memory
	checkCuda(hipFree(d_input));
	checkCuda(hipFree(d_output));
}

	.text
	.file	"image_blur.hip"
	.globl	_Z27__device_stub__gaussianBlurPhS_jjPfi # -- Begin function _Z27__device_stub__gaussianBlurPhS_jjPfi
	.type	_Z27__device_stub__gaussianBlurPhS_jjPfi,@function
_Z27__device_stub__gaussianBlurPhS_jjPfi: # @_Z27__device_stub__gaussianBlurPhS_jjPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12gaussianBlurPhS_jjPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__gaussianBlurPhS_jjPfi, .Lfunc_end0-_Z27__device_stub__gaussianBlurPhS_jjPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z9imageBlurPhS_jjPfi           # -- Begin function _Z9imageBlurPhS_jjPfi
	.type	_Z9imageBlurPhS_jjPfi,@function
_Z9imageBlurPhS_jjPfi:                  # @_Z9imageBlurPhS_jjPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %r13d
	movq	%r8, 8(%rsp)                    # 8-byte Spill
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbp
	leal	-1(%r14), %eax
	shrl	$4, %eax
	leal	-1(%r15), %ecx
	shrl	$4, %ecx
	incl	%ecx
	shlq	$32, %rcx
	leaq	(%rcx,%rax), %rbx
	incq	%rbx
	movl	%r14d, %eax
	imull	%edx, %eax
	movslq	%eax, %r12
	movl	$d_input, %edi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$d_output, %edi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	%r13d, 4(%rsp)                  # 4-byte Spill
                                        # kill: def $r13d killed $r13d def $r13
	imull	%r13d, %r13d
	shlq	$2, %r13
	movl	$d_filter, %edi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	d_output(%rip), %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	callq	hipMemset
	movq	d_input(%rip), %rdi
	movq	%rbp, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	d_filter(%rip), %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	d_input(%rip), %rdi
	movq	d_output(%rip), %rsi
	movq	d_filter(%rip), %r8
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	4(%rsp), %r9d                   # 4-byte Reload
	callq	_Z27__device_stub__gaussianBlurPhS_jjPfi
.LBB1_2:
	movq	d_output(%rip), %rsi
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	d_input(%rip), %rdi
	callq	hipFree
	movq	d_output(%rip), %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end1:
	.size	_Z9imageBlurPhS_jjPfi, .Lfunc_end1-_Z9imageBlurPhS_jjPfi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12gaussianBlurPhS_jjPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_input,@object                 # @d_input
	.bss
	.globl	d_input
	.p2align	3, 0x0
d_input:
	.quad	0
	.size	d_input, 8

	.type	d_output,@object                # @d_output
	.globl	d_output
	.p2align	3, 0x0
d_output:
	.quad	0
	.size	d_output, 8

	.type	d_filter,@object                # @d_filter
	.globl	d_filter
	.p2align	3, 0x0
d_filter:
	.quad	0
	.size	d_filter, 8

	.type	_Z12gaussianBlurPhS_jjPfi,@object # @_Z12gaussianBlurPhS_jjPfi
	.section	.rodata,"a",@progbits
	.globl	_Z12gaussianBlurPhS_jjPfi
	.p2align	3, 0x0
_Z12gaussianBlurPhS_jjPfi:
	.quad	_Z27__device_stub__gaussianBlurPhS_jjPfi
	.size	_Z12gaussianBlurPhS_jjPfi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12gaussianBlurPhS_jjPfi"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__gaussianBlurPhS_jjPfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_input
	.addrsig_sym d_output
	.addrsig_sym d_filter
	.addrsig_sym _Z12gaussianBlurPhS_jjPfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12gaussianBlurPhS_jjPfi ; -- Begin function _Z12gaussianBlurPhS_jjPfi
	.globl	_Z12gaussianBlurPhS_jjPfi
	.p2align	8
	.type	_Z12gaussianBlurPhS_jjPfi,@function
_Z12gaussianBlurPhS_jjPfi:              ; @_Z12gaussianBlurPhS_jjPfi
; %bb.0:
	s_load_b64 s[8:9], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v1, v0, 10, 10
	s_lshl_b32 s15, s15, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v0, s14, 4, v2
	v_add_nc_u32_e32 v3, s15, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e32 vcc_lo, s9, v0
	v_cmp_ge_u32_e64 s2, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_12
; %bb.1:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s3, s2
	s_ashr_i32 s11, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s10, 0, s11
	s_cmp_ge_i32 s10, s11
	s_cbranch_scc1 .LBB0_11
; %bb.2:                                ; %.preheader.preheader
	s_load_b64 s[12:13], s[0:1], 0x18
	v_add3_u32 v4, s15, s10, v1
	s_add_i32 s0, s10, s11
	s_mov_b32 s15, s10
	s_mul_i32 s0, s3, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s9, v4, s[10:11]
	v_mov_b32_e32 v2, 0
	s_add_i32 s14, s11, s0
.LBB0_3:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_add_nc_u32_e32 v4, s15, v3
	s_mov_b32 s16, s10
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v4
	v_cmp_gt_u32_e64 s0, s8, v4
	v_mov_b32_e32 v4, v1
.LBB0_4:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_and_saveexec_b32 s17, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v5, s16, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s1, -1, v5
	v_cmp_gt_u32_e64 s2, s9, v5
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v5, v0, v4
	s_add_i32 s18, s14, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s19, s18, 31
	s_lshl_b64 s[18:19], s[18:19], 2
	global_load_u8 v5, v5, s[4:5]
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s12, s18
	s_addc_u32 s19, s13, s19
	s_load_b32 s2, s[18:19], 0x0
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v5, v5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v2, s2, v5
.LBB0_7:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_8:                                ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s17
	v_add_nc_u32_e32 v4, 1, v4
	s_add_i32 s16, s16, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s16, s11
	s_cbranch_scc0 .LBB0_4
; %bb.9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v1, s9, v1
	s_add_i32 s15, s15, 1
	s_add_i32 s14, s14, s3
	s_cmp_ge_i32 s15, s11
	s_cbranch_scc0 .LBB0_3
; %bb.10:                               ; %._crit_edge58.loopexit
	v_cvt_i32_f32_e32 v2, v2
.LBB0_11:                               ; %._crit_edge58
	v_mad_u64_u32 v[4:5], null, v3, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v4
	v_add_co_u32 v0, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b8 v[0:1], v2, off
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12gaussianBlurPhS_jjPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12gaussianBlurPhS_jjPfi, .Lfunc_end0-_Z12gaussianBlurPhS_jjPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 444
; NumSgprs: 22
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12gaussianBlurPhS_jjPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z12gaussianBlurPhS_jjPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
