/**
 * Copyright 1993-2012 NVIDIA Corporation.  All rights reserved.
 *
 * Please refer to the NVIDIA end user license agreement (EULA) associated
 * with this source code for terms and conditions that govern your use of
 * this software. Any use, reproduction, disclosure, or distribution of
 * this software and related documentation outside the terms of the EULA
 * is strictly prohibited.
 */
#include <stdio.h>
#include <stdlib.h>

const int N = 32;
// const int blocksize = 16;
//*/

__global__
void hello(int *a, int *b, int *c) {
	// threadinx.x 从0开始，最大值是blockDim.x 。
	//blockDim.x 限制是dimBlock（）的参数，第一个对应blockDim.x 第二个对blockDim.y 以此类推.
	//blockIdx.x 从0开始，最大值是dimGrid（）第一个参数限制 .y ,z 以此类推。
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	int j = blockIdx.x * blockDim.y + threadIdx.y;
	int k = blockIdx.x * blockDim.z + threadIdx.z;

	a[i] = i;
	b[j] = j;
	c[k] = k;

	/*	int m = blockIdx.z*blockDim.x + threadIdx.x;
	 int n = blockIdx.z*blockDim.y + threadIdx.y;*/
	/*	e[m] = m;
	 f[n] = n;*/

}
/*
__global__
void init(float *vpp, float *vss, float *density, int nx, int ny) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	int j = blockIdx.x * blockDim.y + threadIdx.y;
	int k = blockIdx.x * blockDim.z + threadIdx.z;
	vpp[i] = 2300.;
	vss[j] = 1232.;
	density[k] = 1.;
}*/
__global__
void testInit(float *vpp ){
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	vpp[i] = 1.;

}
int main() {

	int b[N] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
	int a[N] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
	int c[N] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
	int *ad;
	int *bd;
	int *cd;
	/*	int b[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int a[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int *ad;
	 int *bd;
	 int c[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int d[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int *cd;
	 int *dd;*/
	int nx = 200, ny = 200, nz = 200;
	float *vpp, *density, *vss;
	float *vppd, *densityd, *vssd;

	const int isize = N * sizeof(int);
	const int nxyz = sizeof(float) * nz * ny * nx;

	vpp = (float*) malloc(sizeof(float) * nz * ny * nx);
//	density = (float*) malloc(sizeof(float) * nz * ny * nx);
//	vss = (float*) malloc(sizeof(float) * nz * ny * nx);
	cudaMalloc((void**) &vppd, nxyz);
//	cudaMalloc((void**) &densityd, nxyz);
//	cudaMalloc((void**) &vssd, nxyz);
	cudaMemcpy(vppd, vpp, nxyz, cudaMemcpyHostToDevice);
//	cudaMemcpy(densityd, density, nxyz, cudaMemcpyHostToDevice);
//	cudaMemcpy(vssd, vss, nxyz, cudaMemcpyHostToDevice);

	cudaMalloc((void**) &ad, isize);
	cudaMalloc((void**) &bd, isize);
	cudaMemcpy(ad, a, isize, cudaMemcpyHostToDevice);
	cudaMemcpy(bd, b, isize, cudaMemcpyHostToDevice);
	cudaMalloc((void**) &cd, isize);
	cudaMemcpy(cd, c, isize, cudaMemcpyHostToDevice);
	/*	cudaMalloc( (void**)&ad, isize );
	 cudaMalloc( (void**)&bd, isize );
	 cudaMemcpy( ad, a, isize, cudaMemcpyHostToDevice );
	 cudaMemcpy( bd, b, isize, cudaMemcpyHostToDevice );
	 cudaMalloc( (void**)&cd, isize );
	 cudaMalloc( (void**)&dd, isize );
	 cudaMemcpy( cd, c, isize, cudaMemcpyHostToDevice );
	 cudaMemcpy( dd, d, isize, cudaMemcpyHostToDevice );*/

	/*	dim3 dimGrid(2, 2);
	 dim3 dimBlock(4, 2, 2);
	 hello<<<dimGrid, dimBlock>>>(ad,bd,cd,dd);*/
	dim3 dimGrid(2, 2);
	dim3 dimBlock(nx, ny, nz);
/*	init<<<3, dimBlock>>>(vppd, densityd, vssd, 200, 200);*/
	testInit<<<200,200>>>(vpp);
	dim3 dimGrid1(2, 2);
	dim3 dimBlock1(4, 4, 4);
	hello<<<2, dimBlock1>>>(ad, bd, cd);

//	cudaMemcpy(density, densityd, nxyz, cudaMemcpyDeviceToHost);
	cudaMemcpy(vpp, vppd, nxyz, cudaMemcpyDeviceToHost);
//	cudaMemcpy(vss, vssd, nxyz, cudaMemcpyDeviceToHost);
//	cudaFree(densityd);
	cudaFree(vppd);
//	cudaFree(vssd);

	cudaMemcpy(b, bd, isize, cudaMemcpyDeviceToHost);
	cudaMemcpy(a, ad, isize, cudaMemcpyDeviceToHost);
	cudaFree(bd);
	cudaFree(ad);
	cudaMemcpy(c, cd, isize, cudaMemcpyDeviceToHost);
	cudaFree(cd);
	/*	cudaMemcpy( b, bd, isize, cudaMemcpyDeviceToHost );
	 cudaMemcpy( a, ad, isize, cudaMemcpyDeviceToHost );
	 cudaFree( bd );
	 cudaFree( ad );
	 cudaMemcpy( c, cd, isize, cudaMemcpyDeviceToHost );
	 cudaMemcpy( d, dd, isize, cudaMemcpyDeviceToHost );
	 cudaFree( cd );
	 cudaFree( dd );
	 int i;*/
	/*
	 int e[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int f[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int *ed;
	 int *fd;
	 cudaMalloc( (void**)&ed, isize );
	 cudaMalloc( (void**)&fd, isize );
	 cudaMemcpy( ed, e, isize, cudaMemcpyHostToDevice );
	 cudaMemcpy( fd, f, isize, cudaMemcpyHostToDevice );
	 cudaFree( ed );
	 cudaFree( fd );
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,e[i]);
	 }
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,f[i]);
	 }
	 */

	/*
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,a[i]);
	 }
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,b[i]);
	 }
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,c[i]);
	 }
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,d[i]);
	 }
	 */
	int i = 0;
/*	for (i = 0; i < N; i++) {
		printf("%d=%f ", i, density[i]);
	}*/
	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%f ", i, vpp[i]);
	}
/*	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%f ", i, vss[i]);
	}*/
	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%d ", i, a[i]);
	}
	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%d ", i, b[i]);
	}
	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%d ", i, c[i]);
	}
	return EXIT_SUCCESS;
}

	.file	"tmpxft_00380b6b_00000000-6_TestDemo.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z28__device_stub__Z5helloPiS_S_PiS_S_
	.type	_Z28__device_stub__Z5helloPiS_S_PiS_S_, @function
_Z28__device_stub__Z5helloPiS_S_PiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z5helloPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z28__device_stub__Z5helloPiS_S_PiS_S_, .-_Z28__device_stub__Z5helloPiS_S_PiS_S_
	.globl	_Z5helloPiS_S_
	.type	_Z5helloPiS_S_, @function
_Z5helloPiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z5helloPiS_S_PiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z5helloPiS_S_, .-_Z5helloPiS_S_
	.globl	_Z27__device_stub__Z8testInitPfPf
	.type	_Z27__device_stub__Z8testInitPfPf, @function
_Z27__device_stub__Z8testInitPfPf:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z8testInitPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L8:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z27__device_stub__Z8testInitPfPf, .-_Z27__device_stub__Z8testInitPfPf
	.globl	_Z8testInitPf
	.type	_Z8testInitPf, @function
_Z8testInitPf:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z8testInitPfPf
	.cfi_endproc
.LFE2055:
	.size	_Z8testInitPf, .-_Z8testInitPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n"
.LC1:
	.string	"%d=%f "
.LC2:
	.string	"%d=%d "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$32, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$456, %rsp
	.cfi_def_cfa_offset 512
	movq	%fs:40, %rax
	movq	%rax, 440(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rdi
	leaq	184(%rsp), %r15
	leaq	56(%rsp), %r14
	leaq	312(%rsp), %r13
	rep stosl
	leaq	184(%rsp), %rdi
	movl	$32, %ecx
	rep stosl
	leaq	312(%rsp), %rdi
	movl	$32, %ecx
	rep stosl
	movl	$32000000, %edi
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$32000000, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$32000000, %edx
	call	cudaMemcpy@PLT
	movq	%rsp, %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$128, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$128, %edx
	call	cudaMemcpy@PLT
	leaq	16(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$128, %edx
	call	cudaMemcpy@PLT
	movl	$536870937, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$3, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	%rbx, %rdi
	call	_Z27__device_stub__Z8testInitPfPf
.L14:
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$4, %ecx
	addq	%rdi, %rdi
	movl	$1, %esi
	movabsq	$17179869188, %rdx
	movl	$4, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z28__device_stub__Z5helloPiS_S_PiS_S_
.L15:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%ebp, %ebp
	movl	$32000000, %edx
	leaq	.LC1(%rip), %r12
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%r14, %rdi
	movl	$128, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movq	%r15, %rdi
	movl	$128, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$128, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	movl	%ebp, %edx
	cvtss2sd	(%rbx,%rbp,4), %xmm0
	movq	%r12, %rsi
	movb	$1, %al
	movl	$2, %edi
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$32, %rbp
	jne	.L16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	leaq	.LC2(%rip), %r12
.L17:
	movl	(%r15,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$32, %rbx
	jne	.L17
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
.L18:
	movl	(%r14,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$32, %rbx
	jne	.L18
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
.L19:
	movl	0(%r13,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$32, %rbx
	jne	.L19
	movq	440(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$456, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z8testInitPf"
.LC4:
	.string	"_Z5helloPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8testInitPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5helloPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Copyright 1993-2012 NVIDIA Corporation.  All rights reserved.
 *
 * Please refer to the NVIDIA end user license agreement (EULA) associated
 * with this source code for terms and conditions that govern your use of
 * this software. Any use, reproduction, disclosure, or distribution of
 * this software and related documentation outside the terms of the EULA
 * is strictly prohibited.
 */

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

const int N = 32;
// const int blocksize = 16;
//*/

__global__
void hello(int *a, int *b, int *c) {
	// threadinx.x 从0开始，最大值是blockDim.x 。
	//blockDim.x 限制是dimBlock（）的参数，第一个对应blockDim.x 第二个对blockDim.y 以此类推.
	//blockIdx.x 从0开始，最大值是dimGrid（）第一个参数限制 .y ,z 以此类推。
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	int j = blockIdx.x * blockDim.y + threadIdx.y;
	int k = blockIdx.x * blockDim.z + threadIdx.z;

	a[i] = i;
	b[j] = j;
	c[k] = k;

	/*	int m = blockIdx.z*blockDim.x + threadIdx.x;
	 int n = blockIdx.z*blockDim.y + threadIdx.y;*/
	/*	e[m] = m;
	 f[n] = n;*/

}
/*
__global__
void init(float *vpp, float *vss, float *density, int nx, int ny) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	int j = blockIdx.x * blockDim.y + threadIdx.y;
	int k = blockIdx.x * blockDim.z + threadIdx.z;
	vpp[i] = 2300.;
	vss[j] = 1232.;
	density[k] = 1.;
}*/
__global__
void testInit(float *vpp ){
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	vpp[i] = 1.;

}
int main() {

	int b[N] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
	int a[N] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
	int c[N] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
	int *ad;
	int *bd;
	int *cd;
	/*	int b[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int a[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int *ad;
	 int *bd;
	 int c[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int d[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int *cd;
	 int *dd;*/
	int nx = 200, ny = 200, nz = 200;
	float *vpp, *density, *vss;
	float *vppd, *densityd, *vssd;

	const int isize = N * sizeof(int);
	const int nxyz = sizeof(float) * nz * ny * nx;

	vpp = (float*) malloc(sizeof(float) * nz * ny * nx);
//	density = (float*) malloc(sizeof(float) * nz * ny * nx);
//	vss = (float*) malloc(sizeof(float) * nz * ny * nx);
	hipMalloc((void**) &vppd, nxyz);
//	cudaMalloc((void**) &densityd, nxyz);
//	cudaMalloc((void**) &vssd, nxyz);
	hipMemcpy(vppd, vpp, nxyz, hipMemcpyHostToDevice);
//	cudaMemcpy(densityd, density, nxyz, cudaMemcpyHostToDevice);
//	cudaMemcpy(vssd, vss, nxyz, cudaMemcpyHostToDevice);

	hipMalloc((void**) &ad, isize);
	hipMalloc((void**) &bd, isize);
	hipMemcpy(ad, a, isize, hipMemcpyHostToDevice);
	hipMemcpy(bd, b, isize, hipMemcpyHostToDevice);
	hipMalloc((void**) &cd, isize);
	hipMemcpy(cd, c, isize, hipMemcpyHostToDevice);
	/*	cudaMalloc( (void**)&ad, isize );
	 cudaMalloc( (void**)&bd, isize );
	 cudaMemcpy( ad, a, isize, cudaMemcpyHostToDevice );
	 cudaMemcpy( bd, b, isize, cudaMemcpyHostToDevice );
	 cudaMalloc( (void**)&cd, isize );
	 cudaMalloc( (void**)&dd, isize );
	 cudaMemcpy( cd, c, isize, cudaMemcpyHostToDevice );
	 cudaMemcpy( dd, d, isize, cudaMemcpyHostToDevice );*/

	/*	dim3 dimGrid(2, 2);
	 dim3 dimBlock(4, 2, 2);
	 hello<<<dimGrid, dimBlock>>>(ad,bd,cd,dd);*/
	dim3 dimGrid(2, 2);
	dim3 dimBlock(nx, ny, nz);
/*	init<<<3, dimBlock>>>(vppd, densityd, vssd, 200, 200);*/
	testInit<<<200,200>>>(vpp);
	dim3 dimGrid1(2, 2);
	dim3 dimBlock1(4, 4, 4);
	hello<<<2, dimBlock1>>>(ad, bd, cd);

//	cudaMemcpy(density, densityd, nxyz, cudaMemcpyDeviceToHost);
	hipMemcpy(vpp, vppd, nxyz, hipMemcpyDeviceToHost);
//	cudaMemcpy(vss, vssd, nxyz, cudaMemcpyDeviceToHost);
//	cudaFree(densityd);
	hipFree(vppd);
//	cudaFree(vssd);

	hipMemcpy(b, bd, isize, hipMemcpyDeviceToHost);
	hipMemcpy(a, ad, isize, hipMemcpyDeviceToHost);
	hipFree(bd);
	hipFree(ad);
	hipMemcpy(c, cd, isize, hipMemcpyDeviceToHost);
	hipFree(cd);
	/*	cudaMemcpy( b, bd, isize, cudaMemcpyDeviceToHost );
	 cudaMemcpy( a, ad, isize, cudaMemcpyDeviceToHost );
	 cudaFree( bd );
	 cudaFree( ad );
	 cudaMemcpy( c, cd, isize, cudaMemcpyDeviceToHost );
	 cudaMemcpy( d, dd, isize, cudaMemcpyDeviceToHost );
	 cudaFree( cd );
	 cudaFree( dd );
	 int i;*/
	/*
	 int e[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int f[N] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
	 int *ed;
	 int *fd;
	 cudaMalloc( (void**)&ed, isize );
	 cudaMalloc( (void**)&fd, isize );
	 cudaMemcpy( ed, e, isize, cudaMemcpyHostToDevice );
	 cudaMemcpy( fd, f, isize, cudaMemcpyHostToDevice );
	 cudaFree( ed );
	 cudaFree( fd );
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,e[i]);
	 }
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,f[i]);
	 }
	 */

	/*
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,a[i]);
	 }
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,b[i]);
	 }
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,c[i]);
	 }
	 printf("\n");
	 for( i=0;i<N;i++){
	 printf("%d=%d ",i,d[i]);
	 }
	 */
	int i = 0;
/*	for (i = 0; i < N; i++) {
		printf("%d=%f ", i, density[i]);
	}*/
	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%f ", i, vpp[i]);
	}
/*	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%f ", i, vss[i]);
	}*/
	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%d ", i, a[i]);
	}
	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%d ", i, b[i]);
	}
	printf("\n");
	for (i = 0; i < N; i++) {
		printf("%d=%d ", i, c[i]);
	}
	return EXIT_SUCCESS;
}

	.text
	.file	"TestDemo.hip"
	.globl	_Z20__device_stub__helloPiS_S_  # -- Begin function _Z20__device_stub__helloPiS_S_
	.type	_Z20__device_stub__helloPiS_S_,@function
_Z20__device_stub__helloPiS_S_:         # @_Z20__device_stub__helloPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5helloPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z20__device_stub__helloPiS_S_, .Lfunc_end0-_Z20__device_stub__helloPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__testInitPf   # -- Begin function _Z23__device_stub__testInitPf
	.type	_Z23__device_stub__testInitPf,@function
_Z23__device_stub__testInitPf:          # @_Z23__device_stub__testInitPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8testInitPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__testInitPf, .Lfunc_end1-_Z23__device_stub__testInitPf
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$424, %rsp                      # imm = 0x1A8
	.cfi_def_cfa_offset 480
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967496, %r14               # imm = 0x1000000C8
	xorps	%xmm0, %xmm0
	leaq	288(%rsp), %r15
	movaps	%xmm0, 112(%r15)
	movaps	%xmm0, 96(%r15)
	movaps	%xmm0, 80(%r15)
	movaps	%xmm0, 64(%r15)
	movaps	%xmm0, 48(%r15)
	movaps	%xmm0, 32(%r15)
	movaps	%xmm0, 16(%r15)
	movaps	%xmm0, (%r15)
	leaq	160(%rsp), %r13
	movaps	%xmm0, 112(%r13)
	movaps	%xmm0, 96(%r13)
	movaps	%xmm0, 80(%r13)
	movaps	%xmm0, 64(%r13)
	movaps	%xmm0, 48(%r13)
	movaps	%xmm0, 32(%r13)
	movaps	%xmm0, 16(%r13)
	movaps	%xmm0, (%r13)
	leaq	32(%rsp), %r12
	movaps	%xmm0, 112(%r12)
	movaps	%xmm0, 96(%r12)
	movaps	%xmm0, 80(%r12)
	movaps	%xmm0, 64(%r12)
	movaps	%xmm0, 48(%r12)
	movaps	%xmm0, 32(%r12)
	movaps	%xmm0, 16(%r12)
	movaps	%xmm0, (%r12)
	movl	$32000000, %edi                 # imm = 0x1E84800
	callq	malloc
	movq	%rax, %rbx
	leaq	24(%rsp), %rbp
	movl	$32000000, %esi                 # imm = 0x1E84800
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$32000000, %edx                 # imm = 0x1E84800
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rbp
	movl	$128, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$128, %esi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$128, %edx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movl	$128, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %r15
	movl	$128, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$128, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_Z23__device_stub__testInitPf
.LBB2_2:
	addq	$-198, %r14
	movabsq	$17179869188, %rdx              # imm = 0x400000004
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$4, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z20__device_stub__helloPiS_S_
.LBB2_4:
	movq	24(%rsp), %rsi
	movl	$32000000, %edx                 # imm = 0x1E84800
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rsi
	leaq	288(%rsp), %rdi
	movl	$128, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	leaq	160(%rsp), %rdi
	movl	$128, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movl	$128, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%r14d, %r14d
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r14,4), %xmm0
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	$32, %r14
	jne	.LBB2_5
# %bb.6:
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%ebx, %ebx
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movl	160(%rsp,%rbx,4), %edx
	movl	$.L.str.2, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$32, %rbx
	jne	.LBB2_7
# %bb.8:
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%ebx, %ebx
.LBB2_9:                                # =>This Inner Loop Header: Depth=1
	movl	288(%rsp,%rbx,4), %edx
	movl	$.L.str.2, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$32, %rbx
	jne	.LBB2_9
# %bb.10:
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%ebx, %ebx
.LBB2_11:                               # =>This Inner Loop Header: Depth=1
	movl	32(%rsp,%rbx,4), %edx
	movl	$.L.str.2, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$32, %rbx
	jne	.LBB2_11
# %bb.12:
	xorl	%eax, %eax
	addq	$424, %rsp                      # imm = 0x1A8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5helloPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8testInitPf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z5helloPiS_S_,@object          # @_Z5helloPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z5helloPiS_S_
	.p2align	3, 0x0
_Z5helloPiS_S_:
	.quad	_Z20__device_stub__helloPiS_S_
	.size	_Z5helloPiS_S_, 8

	.type	_Z8testInitPf,@object           # @_Z8testInitPf
	.globl	_Z8testInitPf
	.p2align	3, 0x0
_Z8testInitPf:
	.quad	_Z23__device_stub__testInitPf
	.size	_Z8testInitPf, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d=%f "
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d=%d "
	.size	.L.str.2, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5helloPiS_S_"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8testInitPf"
	.size	.L__unnamed_2, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__helloPiS_S_
	.addrsig_sym _Z23__device_stub__testInitPf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5helloPiS_S_
	.addrsig_sym _Z8testInitPf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5helloPiS_S_          ; -- Begin function _Z5helloPiS_S_
	.globl	_Z5helloPiS_S_
	.p2align	8
	.type	_Z5helloPiS_S_,@function
_Z5helloPiS_S_:                         ; @_Z5helloPiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[3:4], null, s15, s2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[5:6], null, s15, s8, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	v_lshlrev_b64 v[11:12], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v8, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v10, vcc_lo
	v_add_co_u32 v10, vcc_lo, s0, v11
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v12, vcc_lo
	global_store_b32 v[6:7], v3, off
	global_store_b32 v[8:9], v5, off
	global_store_b32 v[10:11], v1, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5helloPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5helloPiS_S_, .Lfunc_end0-_Z5helloPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z8testInitPf           ; -- Begin function _Z8testInitPf
	.globl	_Z8testInitPf
	.p2align	8
	.type	_Z8testInitPf,@function
_Z8testInitPf:                          ; @_Z8testInitPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x14
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, 1.0
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8testInitPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8testInitPf, .Lfunc_end1-_Z8testInitPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 100
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5helloPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5helloPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8testInitPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8testInitPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
