/* Date:   01-03-2017
   Author: Omer Anjum
   Description:
   Copying Outer halos from host to GPU
Comments: 
Date: March 14, 2017
Omer Anjum
Very first version of code written. 
*/
#include <stdio.h>

/****************************************************************************************************************/
__global__ void copy_rows(float* d_halo, float* d_grid, int nx, int ny, int nz, int halo_depth, dim3 blocksPerGrid)
{ 
	
	const int halo_idx_x = threadIdx.x + blockIdx.x*blockDim.x; 
	const int halo_idx_y = threadIdx.y + blockIdx.y*blockDim.y;
	const int halo_idx_z = threadIdx.z + blockIdx.z*blockDim.z;

	int halo_idx = 	(halo_idx_x) + (halo_idx_y)*nx + (halo_idx_z)*(nx*(halo_depth*2)+(ny-(halo_depth*2))*(halo_depth*2));//last term 134*6+128*6

	int d_grid_idx = (halo_idx_x) + (halo_idx_y)*nx + (halo_idx_z+halo_depth)*nx*ny;
	if(halo_idx_x < nx && halo_idx_y < ny){
		d_grid[d_grid_idx] = d_halo[halo_idx];
		d_grid[d_grid_idx+(ny-halo_depth)*nx] = d_halo[halo_idx+(nx*halo_depth+(ny-(halo_depth*2))*(halo_depth*2))];
	}
}
/****************************************************************************************************************/
__global__ void copy_cols(float* d_halo, float* d_grid, int nx, int ny, int nz, int halo_depth, dim3 blocksPerGrid)
{ 
	
	const int halo_idx_x = threadIdx.x + blockIdx.x*blockDim.x; 
	const int halo_idx_y = threadIdx.y + blockIdx.y*blockDim.y;
	const int halo_idx_z = threadIdx.z + blockIdx.z*blockDim.z;

	int halo_idx = halo_depth*nx +	(halo_idx_x) + (halo_idx_y)*2*halo_depth + (halo_idx_z)*(nx*(halo_depth*2)+(ny-(halo_depth*2))*(halo_depth*2));//last term 134*6+128*6, first term taking threads to where columns data starts

	int d_grid_idx = (halo_idx_x) + (halo_idx_y+halo_depth)*nx + (halo_idx_z+halo_depth)*nx*ny;
	if(halo_idx_x < nx && halo_idx_y < ny-halo_depth){
		//printf("d_halo[%d] = %d",halo_idx, d_halo[halo_idx]);
		//printf("\n%d %d\n",d_grid_idx, halo_idx);
		//printf("\n%d %d\n",d_grid_idx+(nx-halo_depth), halo_idx+halo_depth);
		d_grid[d_grid_idx] = d_halo[halo_idx];
		d_grid[d_grid_idx+(nx-halo_depth)] = d_halo[halo_idx+halo_depth];
	}

}
/****************************************************************************************************************/
__global__ void copy_frtbk(float* d_halo, float* d_grid, int nx, int ny, int nz, int halo_depth, dim3 blocksPerGrid)
{ 
	const int halo_idx_x = threadIdx.x + blockIdx.x*blockDim.x; 
	const int halo_idx_y = threadIdx.y + blockIdx.y*blockDim.y;
	const int halo_idx_z = threadIdx.z + blockIdx.z*blockDim.z;

	int halo_idx = (halo_depth*nx*2 +(ny-(halo_depth*2))*(halo_depth*2))*(nz-2*halo_depth) + (halo_idx_x) + (halo_idx_y)*nx + (halo_idx_z)*nx*ny;//last term 134*6+128*6, first term taking threads to where columns data starts

	int d_grid_idx = (halo_idx_x) + (halo_idx_y)*nx + (halo_idx_z)*nx*ny;
	if(halo_idx_x < nx && halo_idx_y < ny && halo_idx_z < nz){
		//printf("d_halo[%d] = %d",halo_idx, d_halo[halo_idx]);
		//printf("\n%d %d\n",d_grid_idx, halo_idx);
		//printf("\n%d %d\n",d_grid_idx+(nx-halo_depth), halo_idx+halo_depth);
		d_grid[d_grid_idx] = d_halo[halo_idx];
		d_grid[d_grid_idx+nx*ny*(nz-halo_depth)] = d_halo[halo_idx+nx*ny*halo_depth];
	}
	/*__syncthreads();
	if(threadIdx.x == 0 && threadIdx.y == 0 && threadIdx.z == 0 && blockIdx.x == 0 && blockIdx.y == 0 && blockIdx.z == 0) {
		printf("Writing thread (%d,%d,%d) at block (%d,%d,%d) \n",threadIdx.x, threadIdx.y, threadIdx.z, 	 				blockIdx.x,blockIdx.y,blockIdx.z );
		for (int k=0; k < nz; k++) {
			printf("\n		-------------\n");
			for (int j=0; j < ny; j++) {
				for (int i=0; i < nx; i++) {
					int idx = i + j*nx + k*nx*ny;
					printf("	%d  ",d_grid[idx]);
				}
				printf("\n");
			}
		}	

	}*/

}
/****************************************************************************************************************/
void fillhalosindevice(float* d_halo, float* d_grid, int nx, int ny, int nz, int halo_depth)
{
	//int ELEMS_PER_THREAD_in_z = nz-(2*halo_depth);
	//TODO: Adapt for shearing-periodic case
	static dim3 blocksPerGrid, threadsPerBlock;

	//Create streams for executing the boundary copy 
	//kernels concurrently.
	static cudaStream_t per_row_stream = NULL; 
	if (per_row_stream == NULL)
		cudaStreamCreate(&per_row_stream);
	static cudaStream_t per_col_stream = NULL; 
	if (per_col_stream == NULL)
		cudaStreamCreate(&per_col_stream);
	static cudaStream_t per_frtbk_stream = NULL; 
	if (per_frtbk_stream == NULL)
		cudaStreamCreate(&per_frtbk_stream);

	//Copy the top and bottom halos around the compute grid
	threadsPerBlock.x = 4; // increase to 32
	threadsPerBlock.y = halo_depth; //do not  change
	threadsPerBlock.z = 1; // do not change
	blocksPerGrid.x = (int)ceil((double)nx / (double)threadsPerBlock.x);
	printf("\n %d, %d,",blocksPerGrid.x, threadsPerBlock.y);
	blocksPerGrid.y = 1;
	blocksPerGrid.z = nz-(2*halo_depth);
	printf(" %d block in z= %d",threadsPerBlock.z, blocksPerGrid.z);
	printf("\n----------------------\ngoing inside the kernel to copy rows\n-----------------------------\n");
	copy_rows<<<blocksPerGrid, threadsPerBlock, 0, per_row_stream>>>(d_halo, d_grid, nx, ny, nz, halo_depth, blocksPerGrid);
	cudaThreadSynchronize(); // needs to be commented out at all places after first verification of code

	//Copy the top and bottom halos around the compute grid
	threadsPerBlock.x = halo_depth; // do not change
	threadsPerBlock.y = 1; // increase to 32
	threadsPerBlock.z = 1; //do not change
	//printf("\n %d \n",threadsPerBlock.y);
	blocksPerGrid.x = 1;
	blocksPerGrid.y = (int)ceil((double)(ny-2*halo_depth) / (double)threadsPerBlock.y);
	//printf("%d blocksPerGrid.y \n", blocksPerGrid.y);
	blocksPerGrid.z = nz-(2*halo_depth);
	//printf(" %d block in z= %d",threadsPerBlock.z, blocksPerGrid.z);
	printf("\n----------------------\ngoing inside the kernel to copy cols\n-----------------------------\n");
	copy_cols<<<blocksPerGrid, threadsPerBlock, 0, per_col_stream>>>(d_halo, d_grid, nx, ny, nz, halo_depth, blocksPerGrid);
	cudaThreadSynchronize();
	
	//Copy the front and back halos around the compute grid
	threadsPerBlock.x = 4; // increase to 32
	threadsPerBlock.y = 6; // increase to 32
	threadsPerBlock.z = 1; // do not change
	//printf("\n %d \n",threadsPerBlock.y);
	blocksPerGrid.x = (int)ceil((double)(nx) / (double)threadsPerBlock.x);
	blocksPerGrid.y = (int)ceil((double)(ny) / (double)threadsPerBlock.y);
	//printf("%d blocksPerGrid.y \n", blocksPerGrid.y);
	blocksPerGrid.z = halo_depth;
	//printf(" %d block in z= %d",threadsPerBlock.z, blocksPerGrid.z);
	printf("\n----------------------\ngoing inside the kernel to copy frtbk\n-----------------------------\n");
	copy_frtbk<<<blocksPerGrid, threadsPerBlock, 0, per_frtbk_stream>>>(d_halo, d_grid, nx, ny, nz, halo_depth, blocksPerGrid);
	cudaThreadSynchronize();
	printf("\n came back after filling outer halos to device\n");

	return;
	
}
/****************************************************************************************************************/

	.file	"tmpxft_00356e04_00000000-6_copyouterhalostodevice.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z39__device_stub__Z9copy_rowsPfS_iiii4dim3PfS_iiiiR4dim3
	.type	_Z39__device_stub__Z9copy_rowsPfS_iiii4dim3PfS_iiiiR4dim3, @function
_Z39__device_stub__Z9copy_rowsPfS_iiii4dim3PfS_iiiiR4dim3:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	movq	176(%rsp), %rax
	movl	$1, 68(%rsp)
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z9copy_rowsPfS_iiii4dim3(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z39__device_stub__Z9copy_rowsPfS_iiii4dim3PfS_iiiiR4dim3, .-_Z39__device_stub__Z9copy_rowsPfS_iiii4dim3PfS_iiiiR4dim3
	.globl	_Z9copy_rowsPfS_iiii4dim3
	.type	_Z9copy_rowsPfS_iiii4dim3, @function
_Z9copy_rowsPfS_iiii4dim3:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$16, %rsp
	.cfi_def_cfa_offset 24
	leaq	24(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_Z39__device_stub__Z9copy_rowsPfS_iiii4dim3PfS_iiiiR4dim3
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z9copy_rowsPfS_iiii4dim3, .-_Z9copy_rowsPfS_iiii4dim3
	.globl	_Z39__device_stub__Z9copy_colsPfS_iiii4dim3PfS_iiiiR4dim3
	.type	_Z39__device_stub__Z9copy_colsPfS_iiii4dim3PfS_iiiiR4dim3, @function
_Z39__device_stub__Z9copy_colsPfS_iiii4dim3PfS_iiiiR4dim3:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	movq	176(%rsp), %rax
	movl	$1, 68(%rsp)
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z9copy_colsPfS_iiii4dim3(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L9:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z39__device_stub__Z9copy_colsPfS_iiii4dim3PfS_iiiiR4dim3, .-_Z39__device_stub__Z9copy_colsPfS_iiii4dim3PfS_iiiiR4dim3
	.globl	_Z9copy_colsPfS_iiii4dim3
	.type	_Z9copy_colsPfS_iiii4dim3, @function
_Z9copy_colsPfS_iiii4dim3:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$16, %rsp
	.cfi_def_cfa_offset 24
	leaq	24(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_Z39__device_stub__Z9copy_colsPfS_iiii4dim3PfS_iiiiR4dim3
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z9copy_colsPfS_iiii4dim3, .-_Z9copy_colsPfS_iiii4dim3
	.globl	_Z41__device_stub__Z10copy_frtbkPfS_iiii4dim3PfS_iiiiR4dim3
	.type	_Z41__device_stub__Z10copy_frtbkPfS_iiii4dim3PfS_iiiiR4dim3, @function
_Z41__device_stub__Z10copy_frtbkPfS_iiii4dim3PfS_iiiiR4dim3:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	movq	176(%rsp), %rax
	movl	$1, 68(%rsp)
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z10copy_frtbkPfS_iiii4dim3(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L15:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z41__device_stub__Z10copy_frtbkPfS_iiii4dim3PfS_iiiiR4dim3, .-_Z41__device_stub__Z10copy_frtbkPfS_iiii4dim3PfS_iiiiR4dim3
	.globl	_Z10copy_frtbkPfS_iiii4dim3
	.type	_Z10copy_frtbkPfS_iiii4dim3, @function
_Z10copy_frtbkPfS_iiii4dim3:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$16, %rsp
	.cfi_def_cfa_offset 24
	leaq	24(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_Z41__device_stub__Z10copy_frtbkPfS_iiii4dim3PfS_iiiiR4dim3
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z10copy_frtbkPfS_iiii4dim3, .-_Z10copy_frtbkPfS_iiii4dim3
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"\n %d, %d,"
.LC2:
	.string	" %d block in z= %d"
.LC3:
	.string	"\n----------------------\ngoing inside the kernel to copy rows\n-----------------------------\n"
.LC4:
	.string	"\n----------------------\ngoing inside the kernel to copy cols\n-----------------------------\n"
.LC6:
	.string	"\n----------------------\ngoing inside the kernel to copy frtbk\n-----------------------------\n"
.LC7:
	.string	"\n came back after filling outer halos to device\n"
	.text
	.globl	_Z17fillhalosindevicePfS_iiii
	.type	_Z17fillhalosindevicePfS_iiii, @function
_Z17fillhalosindevicePfS_iiii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r9d, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 16(%rsp)
	movq	%rsi, 24(%rsp)
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	cmpq	$0, _ZZ17fillhalosindevicePfS_iiiiE14per_row_stream(%rip)
	jne	.L22
	leaq	_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream(%rip), %rdi
	call	cudaStreamCreate@PLT
.L22:
	cmpq	$0, _ZZ17fillhalosindevicePfS_iiiiE14per_col_stream(%rip)
	jne	.L23
	leaq	_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream(%rip), %rdi
	call	cudaStreamCreate@PLT
.L23:
	cmpq	$0, _ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream(%rip)
	jne	.L24
	leaq	_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream(%rip), %rdi
	call	cudaStreamCreate@PLT
.L24:
	cvtsi2sdl	%r12d, %xmm0
	movl	%ebx, 4+_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	mulsd	.LC0(%rip), %xmm0
	leal	(%rbx,%rbx), %r15d
	movl	$4, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	movl	$1, 8+_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	call	ceil@PLT
	movl	%ebx, %ecx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	cvttsd2sil	%xmm0, %r13d
	movl	$2, %edi
	movl	%r13d, %edx
	movl	%r13d, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	call	__printf_chk@PLT
	movl	12(%rsp), %r14d
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %edx
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movl	$1, 4+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	subl	%r15d, %r14d
	movl	%r14d, %ecx
	movl	%r14d, 8+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %ecx
	xorl	%r8d, %r8d
	movq	_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream(%rip), %r9
	movq	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %rdx
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %rdi
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %rax
	movl	%ebp, %ecx
	movl	%r12d, %edx
	movq	%rax, 44(%rsp)
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %eax
	movl	%eax, 52(%rsp)
	pushq	%r9
	.cfi_def_cfa_offset 136
	movl	%ebx, %r9d
	leaq	52(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 144
	movl	28(%rsp), %r8d
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z39__device_stub__Z9copy_rowsPfS_iiii4dim3PfS_iiiiR4dim3
	popq	%r10
	.cfi_def_cfa_offset 136
	popq	%r11
	.cfi_def_cfa_offset 128
.L25:
	call	cudaThreadSynchronize@PLT
	movl	$2, %edi
	movabsq	$4294967297, %rax
	leaq	.LC4(%rip), %rsi
	movq	%rax, 4+_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	movl	%ebp, %eax
	subl	%r15d, %eax
	movl	%ebx, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	movl	%eax, 4+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	xorl	%eax, %eax
	movl	$1, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	movl	%r14d, 8+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	call	__printf_chk@PLT
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %ecx
	xorl	%r8d, %r8d
	movq	_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream(%rip), %r9
	movq	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %rdx
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %rdi
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %rax
	movl	%ebx, %r9d
	movl	%ebp, %ecx
	movl	%r12d, %edx
	movq	%rax, 44(%rsp)
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %eax
	movl	%eax, 52(%rsp)
	pushq	%rsi
	.cfi_def_cfa_offset 136
	leaq	52(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 144
	movl	28(%rsp), %r8d
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z39__device_stub__Z9copy_colsPfS_iiii4dim3PfS_iiiiR4dim3
	popq	%rdi
	.cfi_def_cfa_offset 136
	popq	%r8
	.cfi_def_cfa_offset 128
.L26:
	call	cudaThreadSynchronize@PLT
	cvtsi2sdl	%ebp, %xmm0
	movl	%r13d, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	movabsq	$25769803780, %rax
	movq	%rax, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	divsd	.LC5(%rip), %xmm0
	movl	$1, 8+_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	call	ceil@PLT
	movl	$2, %edi
	leaq	.LC6(%rip), %rsi
	movl	%ebx, 8+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	cvttsd2sil	%xmm0, %eax
	movl	%eax, 4+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %ecx
	xorl	%r8d, %r8d
	movq	_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream(%rip), %r9
	movq	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %rdx
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %rdi
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %rax
	movl	%ebp, %ecx
	movl	%r12d, %edx
	movl	%ebx, %r9d
	movq	%rax, 44(%rsp)
	movl	8+_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %eax
	movl	%eax, 52(%rsp)
	pushq	%rax
	.cfi_def_cfa_offset 136
	leaq	52(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 144
	movl	28(%rsp), %r8d
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z41__device_stub__Z10copy_frtbkPfS_iiii4dim3PfS_iiiiR4dim3
	popq	%rdx
	.cfi_def_cfa_offset 136
	popq	%rcx
	.cfi_def_cfa_offset 128
.L27:
	call	cudaThreadSynchronize@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z17fillhalosindevicePfS_iiii, .-_Z17fillhalosindevicePfS_iiii
	.section	.rodata.str1.1
.LC8:
	.string	"_Z10copy_frtbkPfS_iiii4dim3"
.LC9:
	.string	"_Z9copy_colsPfS_iiii4dim3"
.LC10:
	.string	"_Z9copy_rowsPfS_iiii4dim3"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10copy_frtbkPfS_iiii4dim3(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9copy_colsPfS_iiii4dim3(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9copy_rowsPfS_iiii4dim3(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream
	.comm	_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream,8,8
	.local	_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream
	.comm	_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream,8,8
	.local	_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream
	.comm	_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream,8,8
	.data
	.align 8
	.type	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock, @object
	.size	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock, 12
_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock:
	.long	1
	.long	1
	.long	1
	.align 8
	.type	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid, @object
	.size	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid, 12
_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid:
	.long	1
	.long	1
	.long	1
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1070596096
	.align 8
.LC5:
	.long	0
	.long	1075314688
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* Date:   01-03-2017
   Author: Omer Anjum
   Description:
   Copying Outer halos from host to GPU
Comments: 
Date: March 14, 2017
Omer Anjum
Very first version of code written. 
*/

#include <hip/hip_runtime.h>
#include <stdio.h>

/****************************************************************************************************************/
__global__ void copy_rows(float* d_halo, float* d_grid, int nx, int ny, int nz, int halo_depth, dim3 blocksPerGrid)
{ 
	
	const int halo_idx_x = threadIdx.x + blockIdx.x*blockDim.x; 
	const int halo_idx_y = threadIdx.y + blockIdx.y*blockDim.y;
	const int halo_idx_z = threadIdx.z + blockIdx.z*blockDim.z;

	int halo_idx = 	(halo_idx_x) + (halo_idx_y)*nx + (halo_idx_z)*(nx*(halo_depth*2)+(ny-(halo_depth*2))*(halo_depth*2));//last term 134*6+128*6

	int d_grid_idx = (halo_idx_x) + (halo_idx_y)*nx + (halo_idx_z+halo_depth)*nx*ny;
	if(halo_idx_x < nx && halo_idx_y < ny){
		d_grid[d_grid_idx] = d_halo[halo_idx];
		d_grid[d_grid_idx+(ny-halo_depth)*nx] = d_halo[halo_idx+(nx*halo_depth+(ny-(halo_depth*2))*(halo_depth*2))];
	}
}
/****************************************************************************************************************/
__global__ void copy_cols(float* d_halo, float* d_grid, int nx, int ny, int nz, int halo_depth, dim3 blocksPerGrid)
{ 
	
	const int halo_idx_x = threadIdx.x + blockIdx.x*blockDim.x; 
	const int halo_idx_y = threadIdx.y + blockIdx.y*blockDim.y;
	const int halo_idx_z = threadIdx.z + blockIdx.z*blockDim.z;

	int halo_idx = halo_depth*nx +	(halo_idx_x) + (halo_idx_y)*2*halo_depth + (halo_idx_z)*(nx*(halo_depth*2)+(ny-(halo_depth*2))*(halo_depth*2));//last term 134*6+128*6, first term taking threads to where columns data starts

	int d_grid_idx = (halo_idx_x) + (halo_idx_y+halo_depth)*nx + (halo_idx_z+halo_depth)*nx*ny;
	if(halo_idx_x < nx && halo_idx_y < ny-halo_depth){
		//printf("d_halo[%d] = %d",halo_idx, d_halo[halo_idx]);
		//printf("\n%d %d\n",d_grid_idx, halo_idx);
		//printf("\n%d %d\n",d_grid_idx+(nx-halo_depth), halo_idx+halo_depth);
		d_grid[d_grid_idx] = d_halo[halo_idx];
		d_grid[d_grid_idx+(nx-halo_depth)] = d_halo[halo_idx+halo_depth];
	}

}
/****************************************************************************************************************/
__global__ void copy_frtbk(float* d_halo, float* d_grid, int nx, int ny, int nz, int halo_depth, dim3 blocksPerGrid)
{ 
	const int halo_idx_x = threadIdx.x + blockIdx.x*blockDim.x; 
	const int halo_idx_y = threadIdx.y + blockIdx.y*blockDim.y;
	const int halo_idx_z = threadIdx.z + blockIdx.z*blockDim.z;

	int halo_idx = (halo_depth*nx*2 +(ny-(halo_depth*2))*(halo_depth*2))*(nz-2*halo_depth) + (halo_idx_x) + (halo_idx_y)*nx + (halo_idx_z)*nx*ny;//last term 134*6+128*6, first term taking threads to where columns data starts

	int d_grid_idx = (halo_idx_x) + (halo_idx_y)*nx + (halo_idx_z)*nx*ny;
	if(halo_idx_x < nx && halo_idx_y < ny && halo_idx_z < nz){
		//printf("d_halo[%d] = %d",halo_idx, d_halo[halo_idx]);
		//printf("\n%d %d\n",d_grid_idx, halo_idx);
		//printf("\n%d %d\n",d_grid_idx+(nx-halo_depth), halo_idx+halo_depth);
		d_grid[d_grid_idx] = d_halo[halo_idx];
		d_grid[d_grid_idx+nx*ny*(nz-halo_depth)] = d_halo[halo_idx+nx*ny*halo_depth];
	}
	/*__syncthreads();
	if(threadIdx.x == 0 && threadIdx.y == 0 && threadIdx.z == 0 && blockIdx.x == 0 && blockIdx.y == 0 && blockIdx.z == 0) {
		printf("Writing thread (%d,%d,%d) at block (%d,%d,%d) \n",threadIdx.x, threadIdx.y, threadIdx.z, 	 				blockIdx.x,blockIdx.y,blockIdx.z );
		for (int k=0; k < nz; k++) {
			printf("\n		-------------\n");
			for (int j=0; j < ny; j++) {
				for (int i=0; i < nx; i++) {
					int idx = i + j*nx + k*nx*ny;
					printf("	%d  ",d_grid[idx]);
				}
				printf("\n");
			}
		}	

	}*/

}
/****************************************************************************************************************/
void fillhalosindevice(float* d_halo, float* d_grid, int nx, int ny, int nz, int halo_depth)
{
	//int ELEMS_PER_THREAD_in_z = nz-(2*halo_depth);
	//TODO: Adapt for shearing-periodic case
	static dim3 blocksPerGrid, threadsPerBlock;

	//Create streams for executing the boundary copy 
	//kernels concurrently.
	static hipStream_t per_row_stream = NULL; 
	if (per_row_stream == NULL)
		hipStreamCreate(&per_row_stream);
	static hipStream_t per_col_stream = NULL; 
	if (per_col_stream == NULL)
		hipStreamCreate(&per_col_stream);
	static hipStream_t per_frtbk_stream = NULL; 
	if (per_frtbk_stream == NULL)
		hipStreamCreate(&per_frtbk_stream);

	//Copy the top and bottom halos around the compute grid
	threadsPerBlock.x = 4; // increase to 32
	threadsPerBlock.y = halo_depth; //do not  change
	threadsPerBlock.z = 1; // do not change
	blocksPerGrid.x = (int)ceil((double)nx / (double)threadsPerBlock.x);
	printf("\n %d, %d,",blocksPerGrid.x, threadsPerBlock.y);
	blocksPerGrid.y = 1;
	blocksPerGrid.z = nz-(2*halo_depth);
	printf(" %d block in z= %d",threadsPerBlock.z, blocksPerGrid.z);
	printf("\n----------------------\ngoing inside the kernel to copy rows\n-----------------------------\n");
	copy_rows<<<blocksPerGrid, threadsPerBlock, 0, per_row_stream>>>(d_halo, d_grid, nx, ny, nz, halo_depth, blocksPerGrid);
	hipDeviceSynchronize(); // needs to be commented out at all places after first verification of code

	//Copy the top and bottom halos around the compute grid
	threadsPerBlock.x = halo_depth; // do not change
	threadsPerBlock.y = 1; // increase to 32
	threadsPerBlock.z = 1; //do not change
	//printf("\n %d \n",threadsPerBlock.y);
	blocksPerGrid.x = 1;
	blocksPerGrid.y = (int)ceil((double)(ny-2*halo_depth) / (double)threadsPerBlock.y);
	//printf("%d blocksPerGrid.y \n", blocksPerGrid.y);
	blocksPerGrid.z = nz-(2*halo_depth);
	//printf(" %d block in z= %d",threadsPerBlock.z, blocksPerGrid.z);
	printf("\n----------------------\ngoing inside the kernel to copy cols\n-----------------------------\n");
	copy_cols<<<blocksPerGrid, threadsPerBlock, 0, per_col_stream>>>(d_halo, d_grid, nx, ny, nz, halo_depth, blocksPerGrid);
	hipDeviceSynchronize();
	
	//Copy the front and back halos around the compute grid
	threadsPerBlock.x = 4; // increase to 32
	threadsPerBlock.y = 6; // increase to 32
	threadsPerBlock.z = 1; // do not change
	//printf("\n %d \n",threadsPerBlock.y);
	blocksPerGrid.x = (int)ceil((double)(nx) / (double)threadsPerBlock.x);
	blocksPerGrid.y = (int)ceil((double)(ny) / (double)threadsPerBlock.y);
	//printf("%d blocksPerGrid.y \n", blocksPerGrid.y);
	blocksPerGrid.z = halo_depth;
	//printf(" %d block in z= %d",threadsPerBlock.z, blocksPerGrid.z);
	printf("\n----------------------\ngoing inside the kernel to copy frtbk\n-----------------------------\n");
	copy_frtbk<<<blocksPerGrid, threadsPerBlock, 0, per_frtbk_stream>>>(d_halo, d_grid, nx, ny, nz, halo_depth, blocksPerGrid);
	hipDeviceSynchronize();
	printf("\n came back after filling outer halos to device\n");

	return;
	
}
/****************************************************************************************************************/

	.text
	.file	"copyouterhalostodevice.hip"
	.globl	_Z24__device_stub__copy_rowsPfS_iiii4dim3 # -- Begin function _Z24__device_stub__copy_rowsPfS_iiii4dim3
	.type	_Z24__device_stub__copy_rowsPfS_iiii4dim3,@function
_Z24__device_stub__copy_rowsPfS_iiii4dim3: # @_Z24__device_stub__copy_rowsPfS_iiii4dim3
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9copy_rowsPfS_iiii4dim3, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__copy_rowsPfS_iiii4dim3, .Lfunc_end0-_Z24__device_stub__copy_rowsPfS_iiii4dim3
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__copy_colsPfS_iiii4dim3 # -- Begin function _Z24__device_stub__copy_colsPfS_iiii4dim3
	.type	_Z24__device_stub__copy_colsPfS_iiii4dim3,@function
_Z24__device_stub__copy_colsPfS_iiii4dim3: # @_Z24__device_stub__copy_colsPfS_iiii4dim3
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9copy_colsPfS_iiii4dim3, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__copy_colsPfS_iiii4dim3, .Lfunc_end1-_Z24__device_stub__copy_colsPfS_iiii4dim3
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__copy_frtbkPfS_iiii4dim3 # -- Begin function _Z25__device_stub__copy_frtbkPfS_iiii4dim3
	.type	_Z25__device_stub__copy_frtbkPfS_iiii4dim3,@function
_Z25__device_stub__copy_frtbkPfS_iiii4dim3: # @_Z25__device_stub__copy_frtbkPfS_iiii4dim3
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10copy_frtbkPfS_iiii4dim3, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__copy_frtbkPfS_iiii4dim3, .Lfunc_end2-_Z25__device_stub__copy_frtbkPfS_iiii4dim3
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z17fillhalosindevicePfS_iiii
.LCPI3_0:
	.quad	0x3fd0000000000000              # double 0.25
.LCPI3_1:
	.quad	0x4018000000000000              # double 6
	.text
	.globl	_Z17fillhalosindevicePfS_iiii
	.type	_Z17fillhalosindevicePfS_iiii,@function
_Z17fillhalosindevicePfS_iiii:          # @_Z17fillhalosindevicePfS_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, 4(%rsp)                   # 4-byte Spill
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	cmpq	$0, _ZZ17fillhalosindevicePfS_iiiiE14per_row_stream(%rip)
	jne	.LBB3_2
# %bb.1:
	movl	$_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream, %edi
	callq	hipStreamCreate
.LBB3_2:
	cmpq	$0, _ZZ17fillhalosindevicePfS_iiiiE14per_col_stream(%rip)
	jne	.LBB3_4
# %bb.3:
	movl	$_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream, %edi
	callq	hipStreamCreate
.LBB3_4:
	cmpq	$0, _ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream(%rip)
	jne	.LBB3_6
# %bb.5:
	movl	$_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream, %edi
	callq	hipStreamCreate
.LBB3_6:
	movl	$4, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	movl	%ebx, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock+4(%rip)
	movl	$1, %ebp
	movl	%ebp, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock+8(%rip)
	cvtsi2sd	%r15d, %xmm0
	mulsd	.LCPI3_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %r12d
	movl	%r12d, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	movl	$.L.str, %edi
	movl	%r12d, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	movl	%ebp, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+4(%rip)
	leal	(%rbx,%rbx), %r13d
	movl	4(%rsp), %ebp                   # 4-byte Reload
	subl	%r13d, %ebp
	movl	%ebp, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+8(%rip)
	movl	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock+8(%rip), %esi
	movl	$.L.str.1, %edi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %rdi
	movl	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+8(%rip), %esi
	movq	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %rdx
	movl	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock+8(%rip), %ecx
	movq	_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream(%rip), %r9
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	movl	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+8(%rip), %eax
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %r10
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movl	%ebx, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	_Z24__device_stub__copy_rowsPfS_iiii4dim3
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB3_8:
	callq	hipDeviceSynchronize
	movl	%ebx, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	movabsq	$4294967297, %rax               # imm = 0x100000001
	movq	%rax, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock+4(%rip)
	movl	$1, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	movl	%r14d, %eax
	subl	%r13d, %eax
	movl	%eax, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+4(%rip)
	movl	%ebp, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+8(%rip)
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %rdi
	movl	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+8(%rip), %esi
	movq	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %rdx
	movl	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock+8(%rip), %ecx
	movq	_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream(%rip), %r9
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_10
# %bb.9:
	movl	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+8(%rip), %eax
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %r10
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movl	%ebx, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	_Z24__device_stub__copy_colsPfS_iiii4dim3
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB3_10:
	callq	hipDeviceSynchronize
	movabsq	$25769803780, %rax              # imm = 0x600000004
	movq	%rax, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip)
	movl	$1, _ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock+8(%rip)
	movl	%r12d, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip)
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14d, %xmm0
	divsd	.LCPI3_1(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %eax
	movl	%eax, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+4(%rip)
	movl	%ebx, _ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+8(%rip)
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %rdi
	movl	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+8(%rip), %esi
	movq	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock(%rip), %rdx
	movl	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock+8(%rip), %ecx
	movq	_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream(%rip), %r9
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_12
# %bb.11:
	movl	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid+8(%rip), %eax
	movq	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid(%rip), %r10
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movl	%ebx, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__copy_frtbkPfS_iiii4dim3
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB3_12:
	callq	hipDeviceSynchronize
	movl	$.Lstr.3, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end3:
	.size	_Z17fillhalosindevicePfS_iiii, .Lfunc_end3-_Z17fillhalosindevicePfS_iiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9copy_rowsPfS_iiii4dim3, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9copy_colsPfS_iiii4dim3, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10copy_frtbkPfS_iiii4dim3, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9copy_rowsPfS_iiii4dim3,@object # @_Z9copy_rowsPfS_iiii4dim3
	.section	.rodata,"a",@progbits
	.globl	_Z9copy_rowsPfS_iiii4dim3
	.p2align	3, 0x0
_Z9copy_rowsPfS_iiii4dim3:
	.quad	_Z24__device_stub__copy_rowsPfS_iiii4dim3
	.size	_Z9copy_rowsPfS_iiii4dim3, 8

	.type	_Z9copy_colsPfS_iiii4dim3,@object # @_Z9copy_colsPfS_iiii4dim3
	.globl	_Z9copy_colsPfS_iiii4dim3
	.p2align	3, 0x0
_Z9copy_colsPfS_iiii4dim3:
	.quad	_Z24__device_stub__copy_colsPfS_iiii4dim3
	.size	_Z9copy_colsPfS_iiii4dim3, 8

	.type	_Z10copy_frtbkPfS_iiii4dim3,@object # @_Z10copy_frtbkPfS_iiii4dim3
	.globl	_Z10copy_frtbkPfS_iiii4dim3
	.p2align	3, 0x0
_Z10copy_frtbkPfS_iiii4dim3:
	.quad	_Z25__device_stub__copy_frtbkPfS_iiii4dim3
	.size	_Z10copy_frtbkPfS_iiii4dim3, 8

	.type	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid,@object # @_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid
	.data
	.p2align	3, 0x0
_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid:
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	1                               # 0x1
	.size	_ZZ17fillhalosindevicePfS_iiiiE13blocksPerGrid, 12

	.type	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock,@object # @_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock
	.p2align	3, 0x0
_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock:
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	1                               # 0x1
	.size	_ZZ17fillhalosindevicePfS_iiiiE15threadsPerBlock, 12

	.type	_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream,@object # @_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream
	.local	_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream
	.comm	_ZZ17fillhalosindevicePfS_iiiiE14per_row_stream,8,8
	.type	_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream,@object # @_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream
	.local	_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream
	.comm	_ZZ17fillhalosindevicePfS_iiiiE14per_col_stream,8,8
	.type	_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream,@object # @_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream
	.local	_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream
	.comm	_ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream,8,8
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\n %d, %d,"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" %d block in z= %d"
	.size	.L.str.1, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9copy_rowsPfS_iiii4dim3"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9copy_colsPfS_iiii4dim3"
	.size	.L__unnamed_2, 26

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10copy_frtbkPfS_iiii4dim3"
	.size	.L__unnamed_3, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n----------------------\ngoing inside the kernel to copy rows\n-----------------------------"
	.size	.Lstr, 91

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n----------------------\ngoing inside the kernel to copy cols\n-----------------------------"
	.size	.Lstr.1, 91

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\n----------------------\ngoing inside the kernel to copy frtbk\n-----------------------------"
	.size	.Lstr.2, 92

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\n came back after filling outer halos to device"
	.size	.Lstr.3, 48

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__copy_rowsPfS_iiii4dim3
	.addrsig_sym _Z24__device_stub__copy_colsPfS_iiii4dim3
	.addrsig_sym _Z25__device_stub__copy_frtbkPfS_iiii4dim3
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9copy_rowsPfS_iiii4dim3
	.addrsig_sym _Z9copy_colsPfS_iiii4dim3
	.addrsig_sym _Z10copy_frtbkPfS_iiii4dim3
	.addrsig_sym _ZZ17fillhalosindevicePfS_iiiiE14per_row_stream
	.addrsig_sym _ZZ17fillhalosindevicePfS_iiiiE14per_col_stream
	.addrsig_sym _ZZ17fillhalosindevicePfS_iiiiE16per_frtbk_stream
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9copy_rowsPfS_iiii4dim3 ; -- Begin function _Z9copy_rowsPfS_iiii4dim3
	.globl	_Z9copy_rowsPfS_iiii4dim3
	.p2align	8
	.type	_Z9copy_rowsPfS_iiii4dim3,@function
_Z9copy_rowsPfS_iiii4dim3:              ; @_Z9copy_rowsPfS_iiii4dim3
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b64 s[4:5], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_add_u32 s6, s0, 48
	s_addc_u32 s7, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s13, s2, v[3:4]
	v_mad_u64_u32 v[2:3], null, s14, s3, v[4:5]
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s5, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b32 s2, s[6:7], 0x10
	s_load_b32 s6, s[0:1], 0x1c
	v_bfe_u32 v0, v0, 20, 10
	v_mad_u64_u32 v[3:4], null, v2, s4, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_lshl_b32 s7, s6, 1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_sub_i32 s8, s5, s7
	s_load_b128 s[0:3], s[0:1], 0x0
	s_add_i32 s9, s8, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s9, s9, s7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[4:5], null, s9, v1, v[3:4]
	v_add_nc_u32_e32 v2, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_mul_i32 s0, s5, s4
	s_mul_i32 s1, s6, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s0, v2, v[3:4]
	global_load_b32 v6, v[4:5], off
	s_mul_i32 s0, s8, s7
	s_add_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_ashr_i32 s1, s0, 31
	v_ashrrev_i32_e32 v1, 31, v0
	s_lshl_b64 s[0:1], s[0:1], 2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, v4, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	s_sub_i32 s0, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, s4
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v6, off
	global_load_b32 v2, v[2:3], off
	v_add_co_u32 v0, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9copy_rowsPfS_iiii4dim3
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9copy_rowsPfS_iiii4dim3, .Lfunc_end0-_Z9copy_rowsPfS_iiii4dim3
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 412
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z9copy_colsPfS_iiii4dim3 ; -- Begin function _Z9copy_colsPfS_iiii4dim3
	.globl	_Z9copy_colsPfS_iiii4dim3
	.p2align	8
	.type	_Z9copy_colsPfS_iiii4dim3,@function
_Z9copy_colsPfS_iiii4dim3:              ; @_Z9copy_colsPfS_iiii4dim3
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b32 s6, s[0:1], 0x1c
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_add_u32 s8, s0, 48
	s_addc_u32 s9, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s13, s2, v[3:4]
	v_mad_u64_u32 v[2:3], null, s14, s3, v[4:5]
	s_sub_i32 s2, s5, s6
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s2, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b32 s2, s[8:9], 0x10
	v_bfe_u32 v0, v0, 20, 10
	s_lshl_b32 s3, s6, 1
	s_ashr_i32 s7, s6, 31
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
	s_add_i32 s2, s5, s4
	v_lshl_add_u32 v0, v2, 1, s4
	s_sub_i32 s2, s2, s3
	s_mul_i32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v0, v0, s6
	v_mul_lo_u32 v4, s2, v3
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v4, v0, v1, v4
	v_add_nc_u32_e32 v0, s6, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v0, v0, s5
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v0, v2, s6, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	s_lshl_b64 s[0:1], s[6:7], 2
	global_load_b32 v6, v[4:5], off
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, v4, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	s_sub_i32 s0, s4, s6
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v6, off
	global_load_b32 v2, v[2:3], off
	v_add_co_u32 v0, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9copy_colsPfS_iiii4dim3
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9copy_colsPfS_iiii4dim3, .Lfunc_end1-_Z9copy_colsPfS_iiii4dim3
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 428
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z10copy_frtbkPfS_iiii4dim3 ; -- Begin function _Z10copy_frtbkPfS_iiii4dim3
	.globl	_Z10copy_frtbkPfS_iiii4dim3
	.p2align	8
	.type	_Z10copy_frtbkPfS_iiii4dim3,@function
_Z10copy_frtbkPfS_iiii4dim3:            ; @_Z10copy_frtbkPfS_iiii4dim3
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s8, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_mul_i32 s8, s5, s4
	v_mul_lo_u32 v1, v1, s4
	v_mul_lo_u32 v2, s8, v2
	s_lshl_b32 s9, s7, 1
	s_mul_i32 s4, s4, s7
	s_sub_i32 s5, s5, s9
	s_lshl_b32 s4, s4, 1
	s_mul_i32 s5, s5, s9
	s_sub_i32 s9, s6, s9
	s_add_i32 s5, s5, s4
	v_add3_u32 v0, v1, v0, v2
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s5, s9, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	v_ashrrev_i32_e32 v1, 31, v0
	s_mul_i32 s0, s8, s7
	s_ashr_i32 s1, s0, 31
	global_load_b32 v5, v[3:4], off
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
	s_sub_i32 s0, s6, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, s8
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v5, off
	global_load_b32 v2, v[2:3], off
	v_add_co_u32 v0, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10copy_frtbkPfS_iiii4dim3
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10copy_frtbkPfS_iiii4dim3, .Lfunc_end2-_Z10copy_frtbkPfS_iiii4dim3
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 396
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           12
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9copy_rowsPfS_iiii4dim3
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9copy_rowsPfS_iiii4dim3.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           12
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9copy_colsPfS_iiii4dim3
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9copy_colsPfS_iiii4dim3.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           12
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10copy_frtbkPfS_iiii4dim3
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10copy_frtbkPfS_iiii4dim3.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
