#include "includes.h"
__global__ void computeExCovX(float *trans_x, float *trans_y, float *trans_z, int *valid_points, int *starting_voxel_id, int *voxel_id, int valid_points_num, double *centr_x, double *centr_y, double *centr_z, double gauss_d1, double gauss_d2, double *e_x_cov_x, double *icov00, double *icov01, double *icov02, double *icov10, double *icov11, double *icov12, double *icov20, double *icov21, double *icov22)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
int stride = blockDim.x * gridDim.x;

for (int i = id; i < valid_points_num; i += stride) {
int pid = valid_points[i];
double d_x = static_cast<double>(trans_x[pid]);
double d_y = static_cast<double>(trans_y[pid]);
double d_z = static_cast<double>(trans_z[pid]);
double t_x, t_y, t_z;


for ( int j = starting_voxel_id[i]; j < starting_voxel_id[i + 1]; j++) {
int vid = voxel_id[j];

t_x = d_x - centr_x[vid];
t_y = d_y - centr_y[vid];
t_z = d_z - centr_z[vid];

e_x_cov_x[j] =  exp(-gauss_d2 * ((t_x * icov00[vid] + t_y * icov01[vid] + t_z * icov02[vid]) * t_x
+ ((t_x * icov10[vid] + t_y * icov11[vid] + t_z * icov12[vid]) * t_y)
+ ((t_x * icov20[vid] + t_y * icov21[vid] + t_z * icov22[vid]) * t_z)) / 2.0);
}
}
}
	.file	"tmpxft_00213a9d_00000000-6_computeExCovX.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z86__device_stub__Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.type	_Z86__device_stub__Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_, @function
_Z86__device_stub__Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$440, %rsp
	.cfi_def_cfa_offset 448
	movq	456(%rsp), %rax
	movq	%rdi, 168(%rsp)
	leaq	200(%rsp), %rdi
	movq	%rsi, 160(%rsp)
	leaq	212(%rsp), %rsi
	movq	%rax, 120(%rsp)
	movq	464(%rsp), %rax
	movq	%rdx, 152(%rsp)
	leaq	184(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movq	472(%rsp), %rax
	movq	%rcx, 144(%rsp)
	leaq	192(%rsp), %rcx
	movq	%rax, 104(%rsp)
	movq	480(%rsp), %rax
	movq	%r8, 136(%rsp)
	movq	%rax, 80(%rsp)
	movq	488(%rsp), %rax
	movq	%r9, 128(%rsp)
	movq	%rax, 72(%rsp)
	movq	496(%rsp), %rax
	movsd	%xmm0, 96(%rsp)
	movq	%rax, 64(%rsp)
	movq	504(%rsp), %rax
	movsd	%xmm1, 88(%rsp)
	movq	%rax, 56(%rsp)
	movq	512(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	520(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	528(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	536(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	544(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	552(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 424(%rsp)
	xorl	%eax, %eax
	leaq	168(%rsp), %rax
	movl	$1, 208(%rsp)
	movq	%rax, 248(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	448(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 320(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 328(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 336(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 344(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 352(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 360(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 368(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 376(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 384(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 392(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 400(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 408(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 416(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 200(%rsp)
	movq	%rax, 212(%rsp)
	movl	$1, 220(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	192(%rsp)
	.cfi_def_cfa_offset 456
	leaq	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_(%rip), %rdi
	pushq	192(%rsp)
	.cfi_def_cfa_offset 464
	movq	228(%rsp), %rcx
	movl	236(%rsp), %r8d
	movq	216(%rsp), %rsi
	movl	224(%rsp), %edx
	leaq	264(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 456
	popq	%rdx
	.cfi_def_cfa_offset 448
.L2:
	movq	424(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$440, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z86__device_stub__Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_, .-_Z86__device_stub__Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.globl	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.type	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_, @function
_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z86__device_stub__Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.cfi_endproc
.LFE2033:
	.size	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_, .-_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void computeExCovX(float *trans_x, float *trans_y, float *trans_z, int *valid_points, int *starting_voxel_id, int *voxel_id, int valid_points_num, double *centr_x, double *centr_y, double *centr_z, double gauss_d1, double gauss_d2, double *e_x_cov_x, double *icov00, double *icov01, double *icov02, double *icov10, double *icov11, double *icov12, double *icov20, double *icov21, double *icov22)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
int stride = blockDim.x * gridDim.x;

for (int i = id; i < valid_points_num; i += stride) {
int pid = valid_points[i];
double d_x = static_cast<double>(trans_x[pid]);
double d_y = static_cast<double>(trans_y[pid]);
double d_z = static_cast<double>(trans_z[pid]);
double t_x, t_y, t_z;


for ( int j = starting_voxel_id[i]; j < starting_voxel_id[i + 1]; j++) {
int vid = voxel_id[j];

t_x = d_x - centr_x[vid];
t_y = d_y - centr_y[vid];
t_z = d_z - centr_z[vid];

e_x_cov_x[j] =  exp(-gauss_d2 * ((t_x * icov00[vid] + t_y * icov01[vid] + t_z * icov02[vid]) * t_x
+ ((t_x * icov10[vid] + t_y * icov11[vid] + t_z * icov12[vid]) * t_y)
+ ((t_x * icov20[vid] + t_y * icov21[vid] + t_z * icov22[vid]) * t_z)) / 2.0);
}
}
}
	.text
	.file	"computeExCovX.hip"
	.globl	_Z28__device_stub__computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_ # -- Begin function _Z28__device_stub__computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.type	_Z28__device_stub__computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_,@function
_Z28__device_stub__computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_: # @_Z28__device_stub__computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$288, %rsp                      # imm = 0x120
	.cfi_def_cfa_offset 336
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	24(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	16(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 72(%rbx)
	movq	%r9, 80(%rbx)
	movq	%r10, 88(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	384(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	392(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	400(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	408(%rsp), %rax
	movq	%rax, 136(%rbx)
	leaq	416(%rsp), %rax
	movq	%rax, 144(%rbx)
	leaq	424(%rsp), %rax
	movq	%rax, 152(%rbx)
	leaq	432(%rsp), %rax
	movq	%rax, 160(%rbx)
	leaq	440(%rsp), %rax
	movq	%rax, 168(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$304, %rsp                      # imm = 0x130
	.cfi_adjust_cfa_offset -304
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_, .Lfunc_end0-_Z28__device_stub__computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_,@object # @_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.section	.rodata,"a",@progbits
	.globl	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.p2align	3, 0x0
_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_:
	.quad	_Z28__device_stub__computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.size	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_"
	.size	.L__unnamed_1, 73

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_ ; -- Begin function _Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.globl	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.p2align	8
	.type	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_,@function
_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_: ; @_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0xbc
	s_load_b32 s33, s[0:1], 0x30
	s_add_u32 s44, s0, 0xb0
	s_addc_u32 s45, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s70, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s70, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s33, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.lr.ph85
	s_clause 0x6
	s_load_b256 s[20:27], s[0:1], 0x0
	s_load_b128 s[28:31], s[0:1], 0x20
	s_load_b128 s[36:39], s[0:1], 0x38
	s_load_b64 s[2:3], s[0:1], 0x48
	s_load_b512 s[4:19], s[0:1], 0x58
	s_load_b64 s[34:35], s[0:1], 0xa8
	s_load_b128 s[40:43], s[0:1], 0x98
	s_load_b32 s0, s[44:45], 0x0
	s_mov_b32 s44, 0x652b82fe
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0xfca7ab0c
	s_mov_b32 s52, 0x6a5dcb37
	s_mov_b32 s54, 0x623fde64
	s_mov_b32 s56, 0x7c89e6b0
	s_mov_b32 s58, 0x14761f6e
	s_mov_b32 s60, 0x1852b7b0
	s_mov_b32 s62, 0x11122322
	s_mov_b32 s64, 0x555502a1
	s_mov_b32 s66, 0x55555511
	s_mov_b32 s68, 11
	s_mov_b32 s45, 0x3ff71547
	s_mov_b32 s47, 0xbfe62e42
	s_mov_b32 s49, 0xbc7abc9e
	s_mov_b32 s51, 0x3e928af3
	s_mov_b32 s53, 0x3e5ade15
	s_mov_b32 s55, 0x3ec71dee
	s_mov_b32 s57, 0x3efa0199
	s_mov_b32 s59, 0x3f2a01a0
	s_mov_b32 s61, 0x3f56c16c
	s_mov_b32 s63, 0x3f811111
	s_mov_b32 s65, 0x3fa55555
	s_mov_b32 s67, 0x3fc55555
	s_mov_b32 s69, 0x3fe00000
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s70, s0, s70
	s_mov_b32 s71, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s72, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s28, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v5, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v2, v3
	s_cbranch_execz .LBB0_5
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v4, vcc_lo, s26, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s27, v5, vcc_lo
	v_ashrrev_i32_e32 v11, 31, v2
	v_mov_b32_e32 v10, v2
	s_mov_b32 s73, 0
	global_load_b32 v4, v[4:5], off
	v_lshlrev_b64 v[12:13], 2, v[10:11]
	v_lshlrev_b64 v[14:15], 3, v[10:11]
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v6, vcc_lo, s20, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s21, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s22, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, s23, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s24, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s25, v5, vcc_lo
	global_load_b32 v0, v[6:7], off
	global_load_b32 v6, v[8:9], off
	global_load_b32 v8, v[4:5], off
	v_add_co_u32 v10, vcc_lo, s30, v12
	v_add_co_ci_u32_e32 v11, vcc_lo, s31, v13, vcc_lo
	v_add_co_u32 v12, vcc_lo, s6, v14
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v15, vcc_lo
	s_waitcnt vmcnt(2)
	v_cvt_f64_f32_e32 v[4:5], v0
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[6:7], v6
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[8:9], v8
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v14, v[10:11], off
	v_add_nc_u32_e32 v2, 1, v2
	v_add_co_u32 v10, s1, v10, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v11, s1, 0, v11, s1
	v_cmp_ge_i32_e64 s1, v2, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 3, v[14:15]
	v_add_co_u32 v16, vcc_lo, s38, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, s39, v15, vcc_lo
	v_add_co_u32 v18, vcc_lo, s36, v14
	v_add_co_ci_u32_e32 v19, vcc_lo, s37, v15, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	v_add_co_u32 v20, vcc_lo, s16, v14
	v_add_co_ci_u32_e32 v21, vcc_lo, s17, v15, vcc_lo
	global_load_b64 v[18:19], v[18:19], off
	global_load_b64 v[20:21], v[20:21], off
	v_add_co_u32 v22, vcc_lo, s2, v14
	v_add_co_ci_u32_e32 v23, vcc_lo, s3, v15, vcc_lo
	v_add_co_u32 v24, vcc_lo, s10, v14
	v_add_co_ci_u32_e32 v25, vcc_lo, s11, v15, vcc_lo
	v_add_co_u32 v26, vcc_lo, s14, v14
	v_add_co_ci_u32_e32 v27, vcc_lo, s15, v15, vcc_lo
	global_load_b64 v[22:23], v[22:23], off
	global_load_b64 v[24:25], v[24:25], off
	global_load_b64 v[26:27], v[26:27], off
	v_add_co_u32 v28, vcc_lo, s8, v14
	v_add_co_ci_u32_e32 v29, vcc_lo, s9, v15, vcc_lo
	v_add_co_u32 v30, vcc_lo, s42, v14
	v_add_co_ci_u32_e32 v31, vcc_lo, s43, v15, vcc_lo
	v_add_co_u32 v32, vcc_lo, s18, v14
	v_add_co_ci_u32_e32 v33, vcc_lo, s19, v15, vcc_lo
	global_load_b64 v[30:31], v[30:31], off
	global_load_b64 v[28:29], v[28:29], off
	global_load_b64 v[32:33], v[32:33], off
	v_add_co_u32 v34, vcc_lo, s40, v14
	v_add_co_ci_u32_e32 v35, vcc_lo, s41, v15, vcc_lo
	v_add_co_u32 v36, vcc_lo, s12, v14
	v_add_co_ci_u32_e32 v37, vcc_lo, s13, v15, vcc_lo
	global_load_b64 v[34:35], v[34:35], off
	global_load_b64 v[36:37], v[36:37], off
	v_add_co_u32 v14, vcc_lo, s34, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s35, v15, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	s_waitcnt vmcnt(11)
	v_add_f64 v[16:17], v[6:7], -v[16:17]
	s_waitcnt vmcnt(10)
	v_add_f64 v[18:19], v[4:5], -v[18:19]
	s_waitcnt vmcnt(8)
	v_add_f64 v[22:23], v[8:9], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[16:17], v[20:21]
	s_waitcnt vmcnt(7)
	v_mul_f64 v[24:25], v[16:17], v[24:25]
	s_waitcnt vmcnt(6)
	v_fma_f64 v[20:21], v[18:19], v[26:27], v[20:21]
	s_waitcnt vmcnt(5)
	v_mul_f64 v[26:27], v[16:17], v[30:31]
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[18:19], v[28:29], v[24:25]
	s_waitcnt vmcnt(3)
	v_fma_f64 v[20:21], v[22:23], v[32:33], v[20:21]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[18:19], v[34:35], v[26:27]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[24:25], v[22:23], v[36:37], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[16:17], v[20:21]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[18:19], v[24:25], v[16:17]
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[14:15], s[4:5]
	v_mul_f64 v[14:15], v[14:15], -0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[14:15], s[44:45]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[14:15]
	v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[14:15]
	v_rndne_f64_e32 v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], s[46:47], v[14:15]
	v_cvt_i32_f64_e32 v0, v[16:17]
	v_fma_f64 v[18:19], v[16:17], s[48:49], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], s[52:53], s[50:51]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[56:57]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[60:61]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[64:65]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[68:69]
	v_fma_f64 v[20:21], v[18:19], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[18:19], v[20:21], 1.0
	v_ldexp_f64 v[16:17], v[16:17], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, 0x7ff00000, v17, vcc_lo
	s_and_b32 vcc_lo, s0, vcc_lo
	s_or_b32 s73, s1, s73
	v_cndmask_b32_e32 v14, 0, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v15, 0, v0, s0
	global_store_b64 v[12:13], v[14:15], off
	v_add_co_u32 v12, vcc_lo, v12, 8
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_and_not1_b32 exec_lo, exec_lo, s73
	s_cbranch_execnz .LBB0_4
.LBB0_5:                                ; %Flow152
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s72
	v_add_nc_u32_e32 v1, s70, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s33, v1
	s_or_b32 s71, vcc_lo, s71
	s_and_not1_b32 exec_lo, exec_lo, s71
	s_cbranch_execnz .LBB0_2
.LBB0_6:                                ; %Flow154
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 432
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 38
		.amdhsa_next_free_sgpr 74
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_, .Lfunc_end0-_Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1388
; NumSgprs: 76
; NumVgprs: 38
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 9
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 76
; NumVGPRsForWavesPerEU: 38
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
        .size:           8
        .value_kind:     by_value
      - .offset:         88
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         128
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         136
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         144
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         152
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         160
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         168
        .size:           8
        .value_kind:     global_buffer
      - .offset:         176
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         180
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         184
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         188
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         190
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         192
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         194
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         196
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         198
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         216
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         224
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         232
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         240
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 432
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     76
    .sgpr_spill_count: 0
    .symbol:         _Z13computeExCovXPfS_S_PiS0_S0_iPdS1_S1_ddS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     38
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
