#include <iostream>
#include <iomanip>
#include <cstdlib>
#include <cmath>
#include <cuda_runtime_api.h>

#define SQ(x) ((x) * (x))

static const float A = -4.0, B = 4.0;  // limites de integración
static const int N = 1 << 22;          // número de intervalos = 2^22
static const float H = (B - A) / N;    // tamaño del intervalo de integración
static const float PI(M_PI);           // π con precision simple

__device__ float h(float x) {
    return .5f + 1.5f / (1.0f + 50.0f * SQ(x));
}

float host_h(float x) {
    return .5f + 1.5f / (1.0f + 50.0f * SQ(x));
}

__device__ float f(float x) {
    int i;
    float sum = 0.0f, x0;
    for (i = 0; i < 10; ++i){
        x0 = -3.3f + i * 0.7f;
        sum += h(x - x0);
    }
    return sum/10.0f;
}

float host_f(float x) {
    int i;
    float sum = 0.0f, x0;
    for (i = 0; i < 10; ++i){
        x0 = -3.3f + i * 0.7f;
        sum += host_h(x - x0);
   }
    return sum/10.0f;
}

__device__ float g(float x) {
    float c = cosf(2.0f * PI * f(x) * x);
    return expf(-x/16.0f) * SQ(c);
}


float host_g(float x) {
    float c = cosf(2.0f * PI * host_f(x) * x);
    return expf(-x/16.0f) * SQ(c);
}

 __global__ void
clean_blocks(float subtotals[]){
    subtotals[blockIdx.x] = 0;
}

__global__ void
integrate_blocks(float subtotals[]) {
	// Inicializar variable __shared__ 
	__shared__ float partialValues[512];
	//extern __shared__ float partialValues[];

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int tx = threadIdx.x;

	// Cada thread según su id, calcula la función de g(x)
	float x = 0; 

	x = A + i * (H / 2);
	partialValues[tx] = (i % 2 == 0 ? 4 : 2) * g(x);


	 // Sincronizamos las hebras una vez que termine
	__syncthreads(); 

	// Hacer una suma por reduccion con los valores del arreglo subtotals[]
	for (int offset = blockDim.x/2; offset > 0; offset >>=1){
	        if (tx < offset)
	        {
	            //Añadimos una suma parcial con el offset
	            partialValues[tx] += partialValues[tx+offset];
	        }
	        __syncthreads();
	}
        // Escribimos el resultado del primer elemento de nuestro arreglo
        if(tx == 0)
        {
        // Resultados lo guarda por bloques y no por hebras
        subtotals[blockIdx.x] = partialValues[0];
        }
}

__global__ void
reduction(float subtotals[]) {

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int tx = threadIdx.x;


	for (int offset = blockDim.x/2; offset > 0; offset >>=1){
	        if (tx < offset)
	        {
	            subtotals[i] += subtotals[i+offset];
	        }
	        __syncthreads();
	}
        if(tx == 0)
        {
	        subtotals[blockIdx.x] = subtotals[0];
        }
}

__global__ void
final_reduction(float subtotals[]) {
    float suma;
    int n = 2 * N / blockDim.x;

    if (threadIdx.x == 0){
        for (int i = 0; i < n ; i+= blockDim.x){
            suma += subtotals[i];
	}
        suma += g(B) - g(A);
        subtotals[0] = suma;
    }

}

int main(int argc, char *argv[]) {

    // El programa recibe como parámetro el número de hebras por bloque.
    // Recuerden que este número debe ser múltiplo de 32 (tamaño del warp)
    // y puede ser a lo más 512 (limitación del hardware).

    if (argc < 2) {
        std::cerr << "Usage: " << argv[0] << " threads_per_block" << std::endl;
        std::exit(1);
    }
    int block_size = std::atoi(argv[1]);


    // Al usar N subintervalos, hay que evaluar la función en 2N + 1 puntos.
    // Para paralelizar, mejor evaluar 2N puntos y sumar el último al final.
    // Por lo tanto, necesitamos 2N hebras.
    int nr_blocks = 2 * N / block_size;
    size_t sharedMem = 512;

    // Reservar arreglos en RAM y en la GPU para guardar los resultados.
    float *subtotals_h, *subtotals_d;
    subtotals_h = new float[nr_blocks];
    cudaMalloc((void **) &subtotals_d, sizeof(float) * nr_blocks);

    // kernel para limpiar el valor del arreglo
    clean_blocks<<<nr_blocks, 1>>>(subtotals_d);

    // kernel para calcular los valores de la suma de la integral
    integrate_blocks<<<nr_blocks, block_size,sharedMem>>>(subtotals_d);

    // kernel para hacer la primera reduccion a solo un bloque
    reduction<<<nr_blocks/block_size, block_size>>>(subtotals_d);

    // kernel para realizar la ultima reduccion en un bloque y obtener la suma total.
    final_reduction<<<1,block_size>>>(subtotals_d);

    cudaMemcpy(subtotals_h, subtotals_d, sizeof(float) * nr_blocks, cudaMemcpyDeviceToHost);

    float sum = subtotals_h[0];

    float integral = sum * H / 6.0f;

    std::cout << "Integral: " << std::setprecision(5) << integral << std::endl;
    sum = 0.0;
    cudaFree(subtotals_d);
    std::free(subtotals_h);
}


	.file	"tmpxft_003b2121_00000000-6_integral.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3924:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3924:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z1hf
	.type	_Z1hf, @function
_Z1hf:
.LFB3915:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3915:
	.size	_Z1hf, .-_Z1hf
	.globl	_Z6host_hf
	.type	_Z6host_hf, @function
_Z6host_hf:
.LFB3916:
	.cfi_startproc
	endbr64
	mulss	%xmm0, %xmm0
	movss	.LC0(%rip), %xmm1
	mulss	%xmm0, %xmm1
	movss	.LC2(%rip), %xmm0
	addss	.LC1(%rip), %xmm1
	divss	%xmm1, %xmm0
	addss	.LC3(%rip), %xmm0
	ret
	.cfi_endproc
.LFE3916:
	.size	_Z6host_hf, .-_Z6host_hf
	.globl	_Z1ff
	.type	_Z1ff, @function
_Z1ff:
.LFB4601:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z1hf
	.cfi_endproc
.LFE4601:
	.size	_Z1ff, .-_Z1ff
	.globl	_Z6host_ff
	.type	_Z6host_ff, @function
_Z6host_ff:
.LFB3918:
	.cfi_startproc
	endbr64
	movss	.LC5(%rip), %xmm5
	movaps	%xmm0, %xmm3
	xorps	%xmm2, %xmm2
	xorl	%eax, %eax
	movss	.LC6(%rip), %xmm4
.L8:
	cvtsi2ssl	%eax, %xmm1
	movaps	%xmm3, %xmm0
	incl	%eax
	mulss	%xmm5, %xmm1
	subss	%xmm4, %xmm1
	subss	%xmm1, %xmm0
	call	_Z6host_hf
	addss	%xmm0, %xmm2
	cmpl	$10, %eax
	jne	.L8
	divss	.LC7(%rip), %xmm2
	movaps	%xmm2, %xmm0
	ret
	.cfi_endproc
.LFE3918:
	.size	_Z6host_ff, .-_Z6host_ff
	.globl	_Z1gf
	.type	_Z1gf, @function
_Z1gf:
.LFB4603:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z1hf
	.cfi_endproc
.LFE4603:
	.size	_Z1gf, .-_Z1gf
	.globl	_Z6host_gf
	.type	_Z6host_gf, @function
_Z6host_gf:
.LFB3920:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movss	%xmm0, 8(%rsp)
	call	_Z6host_ff
	mulss	.LC8(%rip), %xmm0
	mulss	8(%rsp), %xmm0
	call	cosf@PLT
	movss	%xmm0, 12(%rsp)
	movss	8(%rsp), %xmm0
	mulss	.LC11(%rip), %xmm0
	call	expf@PLT
	movss	12(%rsp), %xmm1
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	mulss	%xmm1, %xmm1
	mulss	%xmm1, %xmm0
	ret
	.cfi_endproc
.LFE3920:
	.size	_Z6host_gf, .-_Z6host_gf
	.globl	_Z32__device_stub__Z12clean_blocksPfPf
	.type	_Z32__device_stub__Z12clean_blocksPfPf, @function
_Z32__device_stub__Z12clean_blocksPfPf:
.LFB3946:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12clean_blocksPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L15:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3946:
	.size	_Z32__device_stub__Z12clean_blocksPfPf, .-_Z32__device_stub__Z12clean_blocksPfPf
	.globl	_Z12clean_blocksPf
	.type	_Z12clean_blocksPf, @function
_Z12clean_blocksPf:
.LFB3947:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z12clean_blocksPfPf
	.cfi_endproc
.LFE3947:
	.size	_Z12clean_blocksPf, .-_Z12clean_blocksPf
	.globl	_Z36__device_stub__Z16integrate_blocksPfPf
	.type	_Z36__device_stub__Z16integrate_blocksPfPf, @function
_Z36__device_stub__Z16integrate_blocksPfPf:
.LFB3948:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z16integrate_blocksPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L20:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3948:
	.size	_Z36__device_stub__Z16integrate_blocksPfPf, .-_Z36__device_stub__Z16integrate_blocksPfPf
	.globl	_Z16integrate_blocksPf
	.type	_Z16integrate_blocksPf, @function
_Z16integrate_blocksPf:
.LFB3949:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z16integrate_blocksPfPf
	.cfi_endproc
.LFE3949:
	.size	_Z16integrate_blocksPf, .-_Z16integrate_blocksPf
	.globl	_Z28__device_stub__Z9reductionPfPf
	.type	_Z28__device_stub__Z9reductionPfPf, @function
_Z28__device_stub__Z9reductionPfPf:
.LFB3950:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z9reductionPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L25:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3950:
	.size	_Z28__device_stub__Z9reductionPfPf, .-_Z28__device_stub__Z9reductionPfPf
	.globl	_Z9reductionPf
	.type	_Z9reductionPf, @function
_Z9reductionPf:
.LFB3951:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z9reductionPfPf
	.cfi_endproc
.LFE3951:
	.size	_Z9reductionPf, .-_Z9reductionPf
	.globl	_Z35__device_stub__Z15final_reductionPfPf
	.type	_Z35__device_stub__Z15final_reductionPfPf, @function
_Z35__device_stub__Z15final_reductionPfPf:
.LFB3952:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15final_reductionPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L30:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3952:
	.size	_Z35__device_stub__Z15final_reductionPfPf, .-_Z35__device_stub__Z15final_reductionPfPf
	.globl	_Z15final_reductionPf
	.type	_Z15final_reductionPf, @function
_Z15final_reductionPf:
.LFB3953:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z15final_reductionPfPf
	.cfi_endproc
.LFE3953:
	.size	_Z15final_reductionPf, .-_Z15final_reductionPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC12:
	.string	"Usage: "
.LC13:
	.string	" threads_per_block"
.LC16:
	.string	"Integral: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3921:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rsi, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L36
	leaq	.LC12(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L36:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %r12d
	movl	$8388608, %eax
	cltd
	idivl	%r12d
	movslq	%eax, %r13
	movabsq	$2305843009213693950, %rax
	movq	%r13, %rbx
	cmpq	%r13, %rax
	jb	.L37
	salq	$2, %r13
	movq	%r13, %rdi
	call	_Znam@PLT
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movl	%ebx, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	movl	$1, 52(%rsp)
	movq	%rdx, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	movq	%rdx, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	24(%rsp), %rdi
	call	_Z32__device_stub__Z12clean_blocksPfPf
	jmp	.L38
.L37:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L47
	call	__cxa_throw_bad_array_new_length@PLT
.L38:
	movl	%r12d, 44(%rsp)
	xorl	%r9d, %r9d
	movl	$512, %r8d
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	%rax, 36(%rsp)
	movq	44(%rsp), %rdx
	movl	%ebx, 32(%rsp)
	movl	40(%rsp), %esi
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movq	24(%rsp), %rdi
	call	_Z36__device_stub__Z16integrate_blocksPfPf
.L41:
	movl	%ebx, %eax
	movl	%r12d, 44(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rcx
	cltd
	idivl	%r12d
	movq	%rcx, 36(%rsp)
	movl	40(%rsp), %esi
	movq	%rcx, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	movl	%eax, 32(%rsp)
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movq	24(%rsp), %rdi
	call	_Z28__device_stub__Z9reductionPfPf
.L42:
	movl	%r12d, 44(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 40(%rsp)
	movq	%rdi, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	movq	%rdi, 32(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	24(%rsp), %rdi
	call	_Z35__device_stub__Z15final_reductionPfPf
.L43:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC16(%rip), %rsi
	movss	.LC14(%rip), %xmm0
	leaq	_ZSt4cout(%rip), %rdi
	mulss	0(%rbp), %xmm0
	divss	.LC15(%rip), %xmm0
	movss	%xmm0, 12(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm0
	movq	%rax, %rdi
	movq	(%rax), %rax
	cvtss2sd	%xmm0, %xmm0
	movq	-24(%rax), %rax
	movq	$5, 8(%rdi,%rax)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
.L47:
	call	__stack_chk_fail@PLT
.L44:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3921:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z15final_reductionPf"
.LC18:
	.string	"_Z9reductionPf"
.LC19:
	.string	"_Z16integrate_blocksPf"
.LC20:
	.string	"_Z12clean_blocksPf"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3955:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15final_reductionPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9reductionPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16integrate_blocksPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12clean_blocksPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3955:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1112014848
	.align 4
.LC1:
	.long	1065353216
	.align 4
.LC2:
	.long	1069547520
	.align 4
.LC3:
	.long	1056964608
	.align 4
.LC5:
	.long	1060320051
	.align 4
.LC6:
	.long	1079194419
	.align 4
.LC7:
	.long	1092616192
	.align 4
.LC8:
	.long	1086918619
	.align 4
.LC11:
	.long	-1115684864
	.align 4
.LC14:
	.long	905969664
	.align 4
.LC15:
	.long	1086324736
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <cstdlib>
#include <cmath>
#include <hip/hip_runtime_api.h>

#define SQ(x) ((x) * (x))

static const float A = -4.0, B = 4.0;  // limites de integración
static const int N = 1 << 22;          // número de intervalos = 2^22
static const float H = (B - A) / N;    // tamaño del intervalo de integración
static const float PI(M_PI);           // π con precision simple

__device__ float h(float x) {
    return .5f + 1.5f / (1.0f + 50.0f * SQ(x));
}

float host_h(float x) {
    return .5f + 1.5f / (1.0f + 50.0f * SQ(x));
}

__device__ float f(float x) {
    int i;
    float sum = 0.0f, x0;
    for (i = 0; i < 10; ++i){
        x0 = -3.3f + i * 0.7f;
        sum += h(x - x0);
    }
    return sum/10.0f;
}

float host_f(float x) {
    int i;
    float sum = 0.0f, x0;
    for (i = 0; i < 10; ++i){
        x0 = -3.3f + i * 0.7f;
        sum += host_h(x - x0);
   }
    return sum/10.0f;
}

__device__ float g(float x) {
    float c = cosf(2.0f * PI * f(x) * x);
    return expf(-x/16.0f) * SQ(c);
}


float host_g(float x) {
    float c = cosf(2.0f * PI * host_f(x) * x);
    return expf(-x/16.0f) * SQ(c);
}

 __global__ void
clean_blocks(float subtotals[]){
    subtotals[blockIdx.x] = 0;
}

__global__ void
integrate_blocks(float subtotals[]) {
	// Inicializar variable __shared__ 
	__shared__ float partialValues[512];
	//extern __shared__ float partialValues[];

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int tx = threadIdx.x;

	// Cada thread según su id, calcula la función de g(x)
	float x = 0; 

	x = A + i * (H / 2);
	partialValues[tx] = (i % 2 == 0 ? 4 : 2) * g(x);


	 // Sincronizamos las hebras una vez que termine
	__syncthreads(); 

	// Hacer una suma por reduccion con los valores del arreglo subtotals[]
	for (int offset = blockDim.x/2; offset > 0; offset >>=1){
	        if (tx < offset)
	        {
	            //Añadimos una suma parcial con el offset
	            partialValues[tx] += partialValues[tx+offset];
	        }
	        __syncthreads();
	}
        // Escribimos el resultado del primer elemento de nuestro arreglo
        if(tx == 0)
        {
        // Resultados lo guarda por bloques y no por hebras
        subtotals[blockIdx.x] = partialValues[0];
        }
}

__global__ void
reduction(float subtotals[]) {

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int tx = threadIdx.x;


	for (int offset = blockDim.x/2; offset > 0; offset >>=1){
	        if (tx < offset)
	        {
	            subtotals[i] += subtotals[i+offset];
	        }
	        __syncthreads();
	}
        if(tx == 0)
        {
	        subtotals[blockIdx.x] = subtotals[0];
        }
}

__global__ void
final_reduction(float subtotals[]) {
    float suma;
    int n = 2 * N / blockDim.x;

    if (threadIdx.x == 0){
        for (int i = 0; i < n ; i+= blockDim.x){
            suma += subtotals[i];
	}
        suma += g(B) - g(A);
        subtotals[0] = suma;
    }

}

int main(int argc, char *argv[]) {

    // El programa recibe como parámetro el número de hebras por bloque.
    // Recuerden que este número debe ser múltiplo de 32 (tamaño del warp)
    // y puede ser a lo más 512 (limitación del hardware).

    if (argc < 2) {
        std::cerr << "Usage: " << argv[0] << " threads_per_block" << std::endl;
        std::exit(1);
    }
    int block_size = std::atoi(argv[1]);


    // Al usar N subintervalos, hay que evaluar la función en 2N + 1 puntos.
    // Para paralelizar, mejor evaluar 2N puntos y sumar el último al final.
    // Por lo tanto, necesitamos 2N hebras.
    int nr_blocks = 2 * N / block_size;
    size_t sharedMem = 512;

    // Reservar arreglos en RAM y en la GPU para guardar los resultados.
    float *subtotals_h, *subtotals_d;
    subtotals_h = new float[nr_blocks];
    hipMalloc((void **) &subtotals_d, sizeof(float) * nr_blocks);

    // kernel para limpiar el valor del arreglo
    clean_blocks<<<nr_blocks, 1>>>(subtotals_d);

    // kernel para calcular los valores de la suma de la integral
    integrate_blocks<<<nr_blocks, block_size,sharedMem>>>(subtotals_d);

    // kernel para hacer la primera reduccion a solo un bloque
    reduction<<<nr_blocks/block_size, block_size>>>(subtotals_d);

    // kernel para realizar la ultima reduccion en un bloque y obtener la suma total.
    final_reduction<<<1,block_size>>>(subtotals_d);

    hipMemcpy(subtotals_h, subtotals_d, sizeof(float) * nr_blocks, hipMemcpyDeviceToHost);

    float sum = subtotals_h[0];

    float integral = sum * H / 6.0f;

    std::cout << "Integral: " << std::setprecision(5) << integral << std::endl;
    sum = 0.0;
    hipFree(subtotals_d);
    std::free(subtotals_h);
}


	.text
	.file	"integral.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6host_hf
.LCPI0_0:
	.long	0x42480000                      # float 50
.LCPI0_1:
	.long	0x3f800000                      # float 1
.LCPI0_2:
	.long	0x3fc00000                      # float 1.5
.LCPI0_3:
	.long	0x3f000000                      # float 0.5
	.text
	.globl	_Z6host_hf
	.type	_Z6host_hf,@function
_Z6host_hf:                             # @_Z6host_hf
	.cfi_startproc
# %bb.0:
	mulss	%xmm0, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	addss	.LCPI0_1(%rip), %xmm0
	movss	.LCPI0_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	addss	.LCPI0_3(%rip), %xmm1
	movaps	%xmm1, %xmm0
	retq
.Lfunc_end0:
	.size	_Z6host_hf, .Lfunc_end0-_Z6host_hf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6host_ff
.LCPI1_0:
	.long	0x3f333333                      # float 0.699999988
.LCPI1_1:
	.long	0xc0533333                      # float -3.29999995
.LCPI1_2:
	.long	0x42480000                      # float 50
.LCPI1_3:
	.long	0x3f800000                      # float 1
.LCPI1_4:
	.long	0x3fc00000                      # float 1.5
.LCPI1_5:
	.long	0x3f000000                      # float 0.5
.LCPI1_6:
	.long	0x41200000                      # float 10
	.text
	.globl	_Z6host_ff
	.type	_Z6host_ff,@function
_Z6host_ff:                             # @_Z6host_ff
	.cfi_startproc
# %bb.0:
	movaps	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
	movss	.LCPI1_0(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movss	.LCPI1_1(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	movss	.LCPI1_2(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
	movss	.LCPI1_3(%rip), %xmm5           # xmm5 = mem[0],zero,zero,zero
	movss	.LCPI1_4(%rip), %xmm6           # xmm6 = mem[0],zero,zero,zero
	movss	.LCPI1_5(%rip), %xmm7           # xmm7 = mem[0],zero,zero,zero
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm8, %xmm8
	cvtsi2ss	%eax, %xmm8
	mulss	%xmm2, %xmm8
	addss	%xmm3, %xmm8
	movaps	%xmm1, %xmm9
	subss	%xmm8, %xmm9
	mulss	%xmm9, %xmm9
	mulss	%xmm4, %xmm9
	addss	%xmm5, %xmm9
	movaps	%xmm6, %xmm8
	divss	%xmm9, %xmm8
	addss	%xmm7, %xmm8
	addss	%xmm8, %xmm0
	incl	%eax
	cmpl	$10, %eax
	jne	.LBB1_1
# %bb.2:
	divss	.LCPI1_6(%rip), %xmm0
	retq
.Lfunc_end1:
	.size	_Z6host_ff, .Lfunc_end1-_Z6host_ff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6host_gf
.LCPI2_0:
	.long	0x3f333333                      # float 0.699999988
.LCPI2_1:
	.long	0xc0533333                      # float -3.29999995
.LCPI2_2:
	.long	0x42480000                      # float 50
.LCPI2_3:
	.long	0x3f800000                      # float 1
.LCPI2_4:
	.long	0x3fc00000                      # float 1.5
.LCPI2_5:
	.long	0x3f000000                      # float 0.5
.LCPI2_6:
	.long	0x41200000                      # float 10
.LCPI2_7:
	.long	0x40c90fdb                      # float 6.28318548
.LCPI2_8:
	.long	0xbd800000                      # float -0.0625
	.text
	.globl	_Z6host_gf
	.type	_Z6host_gf,@function
_Z6host_gf:                             # @_Z6host_gf
	.cfi_startproc
# %bb.0:
	movaps	%xmm0, %xmm9
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI2_1(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movss	.LCPI2_2(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	movss	.LCPI2_3(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
	movss	.LCPI2_4(%rip), %xmm5           # xmm5 = mem[0],zero,zero,zero
	movss	.LCPI2_5(%rip), %xmm6           # xmm6 = mem[0],zero,zero,zero
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm7, %xmm7
	cvtsi2ss	%eax, %xmm7
	mulss	%xmm1, %xmm7
	addss	%xmm2, %xmm7
	movaps	%xmm9, %xmm8
	subss	%xmm7, %xmm8
	mulss	%xmm8, %xmm8
	mulss	%xmm3, %xmm8
	addss	%xmm4, %xmm8
	movaps	%xmm5, %xmm7
	divss	%xmm8, %xmm7
	addss	%xmm6, %xmm7
	addss	%xmm7, %xmm0
	incl	%eax
	cmpl	$10, %eax
	jne	.LBB2_1
# %bb.2:                                # %_Z6host_ff.exit
	pushq	%rax
	.cfi_def_cfa_offset 16
	divss	.LCPI2_6(%rip), %xmm0
	mulss	.LCPI2_7(%rip), %xmm0
	mulss	%xmm9, %xmm0
	movss	%xmm9, (%rsp)                   # 4-byte Spill
	callq	cosf
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	mulss	.LCPI2_8(%rip), %xmm0
	callq	expf
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm1
	mulss	%xmm1, %xmm0
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z6host_gf, .Lfunc_end2-_Z6host_gf
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__clean_blocksPf # -- Begin function _Z27__device_stub__clean_blocksPf
	.type	_Z27__device_stub__clean_blocksPf,@function
_Z27__device_stub__clean_blocksPf:      # @_Z27__device_stub__clean_blocksPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12clean_blocksPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z27__device_stub__clean_blocksPf, .Lfunc_end3-_Z27__device_stub__clean_blocksPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__integrate_blocksPf # -- Begin function _Z31__device_stub__integrate_blocksPf
	.type	_Z31__device_stub__integrate_blocksPf,@function
_Z31__device_stub__integrate_blocksPf:  # @_Z31__device_stub__integrate_blocksPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16integrate_blocksPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z31__device_stub__integrate_blocksPf, .Lfunc_end4-_Z31__device_stub__integrate_blocksPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__reductionPf  # -- Begin function _Z24__device_stub__reductionPf
	.type	_Z24__device_stub__reductionPf,@function
_Z24__device_stub__reductionPf:         # @_Z24__device_stub__reductionPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9reductionPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z24__device_stub__reductionPf, .Lfunc_end5-_Z24__device_stub__reductionPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__final_reductionPf # -- Begin function _Z30__device_stub__final_reductionPf
	.type	_Z30__device_stub__final_reductionPf,@function
_Z30__device_stub__final_reductionPf:   # @_Z30__device_stub__final_reductionPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15final_reductionPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z30__device_stub__final_reductionPf, .Lfunc_end6-_Z30__device_stub__final_reductionPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI7_0:
	.long	0x36000000                      # float 1.90734863E-6
.LCPI7_1:
	.long	0x40c00000                      # float 6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	cmpl	$1, %edi
	jle	.LBB7_10
# %bb.1:
	movabsq	$4294967296, %r15               # imm = 0x100000000
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	$8388608, %eax                  # imm = 0x800000
	xorl	%edx, %edx
	idivl	%ebp
	movl	%eax, %ebx
	movslq	%eax, %r14
	shlq	$2, %r14
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r14, %rdi
	callq	_Znam
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rsp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	%rbx, %r12
	btsq	$32, %r12
	leaq	1(%r15), %rdx
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_3
# %bb.2:
	movq	(%rsp), %rdi
	callq	_Z27__device_stub__clean_blocksPf
.LBB7_3:
	movl	%ebp, %r13d
	orq	%r15, %r13
	movl	$512, %r8d                      # imm = 0x200
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_5
# %bb.4:
	movq	(%rsp), %rdi
	callq	_Z31__device_stub__integrate_blocksPf
.LBB7_5:
	movl	%ebx, %eax
	cltd
	idivl	%ebp
                                        # kill: def $eax killed $eax def $rax
	orq	%r15, %rax
	movq	%rax, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_7
# %bb.6:
	movq	(%rsp), %rdi
	callq	_Z24__device_stub__reductionPf
.LBB7_7:
	incq	%r15
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_9
# %bb.8:
	movq	(%rsp), %rdi
	callq	_Z30__device_stub__final_reductionPf
.LBB7_9:
	movq	(%rsp), %rsi
	movq	16(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%r15), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	mulss	.LCPI7_0(%rip), %xmm0
	divss	.LCPI7_1(%rip), %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movq	$5, _ZSt4cout+8(%rax)
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB7_10:
	.cfi_def_cfa_offset 80
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	(%rbx), %rsi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12clean_blocksPf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16integrate_blocksPf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9reductionPf, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15final_reductionPf, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12clean_blocksPf,@object      # @_Z12clean_blocksPf
	.section	.rodata,"a",@progbits
	.globl	_Z12clean_blocksPf
	.p2align	3, 0x0
_Z12clean_blocksPf:
	.quad	_Z27__device_stub__clean_blocksPf
	.size	_Z12clean_blocksPf, 8

	.type	_Z16integrate_blocksPf,@object  # @_Z16integrate_blocksPf
	.globl	_Z16integrate_blocksPf
	.p2align	3, 0x0
_Z16integrate_blocksPf:
	.quad	_Z31__device_stub__integrate_blocksPf
	.size	_Z16integrate_blocksPf, 8

	.type	_Z9reductionPf,@object          # @_Z9reductionPf
	.globl	_Z9reductionPf
	.p2align	3, 0x0
_Z9reductionPf:
	.quad	_Z24__device_stub__reductionPf
	.size	_Z9reductionPf, 8

	.type	_Z15final_reductionPf,@object   # @_Z15final_reductionPf
	.globl	_Z15final_reductionPf
	.p2align	3, 0x0
_Z15final_reductionPf:
	.quad	_Z30__device_stub__final_reductionPf
	.size	_Z15final_reductionPf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Usage: "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" threads_per_block"
	.size	.L.str.1, 19

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Integral: "
	.size	.L.str.2, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12clean_blocksPf"
	.size	.L__unnamed_1, 19

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16integrate_blocksPf"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9reductionPf"
	.size	.L__unnamed_3, 15

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15final_reductionPf"
	.size	.L__unnamed_4, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__clean_blocksPf
	.addrsig_sym _Z31__device_stub__integrate_blocksPf
	.addrsig_sym _Z24__device_stub__reductionPf
	.addrsig_sym _Z30__device_stub__final_reductionPf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12clean_blocksPf
	.addrsig_sym _Z16integrate_blocksPf
	.addrsig_sym _Z9reductionPf
	.addrsig_sym _Z15final_reductionPf
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12clean_blocksPf      ; -- Begin function _Z12clean_blocksPf
	.globl	_Z12clean_blocksPf
	.p2align	8
	.type	_Z12clean_blocksPf,@function
_Z12clean_blocksPf:                     ; @_Z12clean_blocksPf
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_mov_b32 s3, 0
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[2:3], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v0, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12clean_blocksPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12clean_blocksPf, .Lfunc_end0-_Z12clean_blocksPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 56
; NumSgprs: 16
; NumVgprs: 1
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2align	2                               ; -- Begin function _Z1gf
	.type	_Z1gf,@function
_Z1gf:                                  ; @_Z1gf
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_mov_b32_e32 v1, 0
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0x3f333333
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f32_i32_e32 v2, s0
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s0, 10
	v_fmaak_f32 v2, s1, v2, 0xc0533333
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v0, v2
	v_mul_f32_e32 v2, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, 0x42480000, v2, 1.0
	v_div_scale_f32 v3, null, v2, v2, 0x3fc00000
	v_div_scale_f32 v6, vcc_lo, 0x3fc00000, v2, 0x3fc00000
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	v_fmac_f32_e32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v6, v4
	v_fma_f32 v7, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v7, v4
	v_fma_f32 v3, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v4, v5
	v_div_fixup_f32 v2, v3, v2, 0x3fc00000
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, 0.5, v2
	v_add_f32_e32 v1, v1, v2
	s_cbranch_scc1 .LBB1_1
; %bb.2:                                ; %_Z1ff.exit
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_scale_f32 v2, null, 0x41200000, 0x41200000, v1
	s_mov_b32 s1, exec_lo
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v2, v3, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v4, v3
	v_div_scale_f32 v4, vcc_lo, v1, 0x41200000, v1
	v_mul_f32_e32 v5, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v2, v5, v4
	v_fmac_f32_e32 v5, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v2, v5, v4
	v_div_fmas_f32 v2, v2, v3, v5
                                        ; implicit-def: $vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v1, v2, 0x41200000, v1
                                        ; implicit-def: $vgpr2
	v_mul_f32_e32 v1, 0x40c90fdb, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v1, v0
	v_cmpx_ngt_f32_e64 0x48000000, |v1|
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB1_4
; %bb.3:
	v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v9, 0x7fffffff, v1
	s_mov_b32 s0, 0x7fffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_and_or_b32 v12, v9, s0, 0x800000
	v_lshrrev_b32_e32 v9, 23, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, 0xfe5163ab, v12, 0
	v_add_nc_u32_e32 v10, 0xffffff88, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v10
	v_mad_u64_u32 v[5:6], null, 0x3c439041, v12, v[3:4]
	v_cndmask_b32_e64 v11, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v6
	v_add_nc_u32_e32 v11, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[6:7], null, 0xdb629599, v12, v[3:4]
	v_cmp_lt_u32_e64 s0, 31, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0, 0xffffffe0, s0
	v_dual_mov_b32 v3, v7 :: v_dual_cndmask_b32 v2, v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, v13, v11
	v_mad_u64_u32 v[7:8], null, 0xf534ddc0, v12, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v13
	v_mov_b32_e32 v3, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, v7, v5, vcc_lo
	v_mad_u64_u32 v[8:9], null, 0xfc2757d1, v12, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v5, v2, s0
	v_mov_b32_e32 v3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, 0x4e441529, v12, v[3:4]
	v_mov_b32_e32 v3, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, 0xa2f9836e, v12, v[3:4]
	v_cndmask_b32_e64 v3, 0, 0xffffffe0, s1
	v_dual_cndmask_b32 v4, v9, v7 :: v_dual_add_nc_u32 v3, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v10, v10, v8 :: v_dual_cndmask_b32 v9, v11, v9
	v_cndmask_b32_e32 v8, v8, v6, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, v10, v4, s0
	v_cndmask_b32_e64 v9, v9, v10, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v4, v4, v8, s0
	v_sub_nc_u32_e32 v10, 32, v3
	v_cndmask_b32_e64 v8, v8, v5, s0
	v_cndmask_b32_e64 v9, v9, v7, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, v7, v4, s1
	v_cndmask_b32_e64 v4, v4, v8, s1
	v_cndmask_b32_e64 v2, v8, v2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v11, v9, v7, v10
	v_alignbit_b32 v6, v7, v4, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v3, v11, v9, vcc_lo
	v_alignbit_b32 v9, v4, v2, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v5, v6, v7, vcc_lo
	v_bfe_u32 v6, v3, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v4, v9, v4, vcc_lo
	v_alignbit_b32 v7, v3, v5, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v8, 0, v6
	v_alignbit_b32 v5, v5, v4, 30
	v_alignbit_b32 v2, v4, v2, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v7, v7, v8
	v_xor_b32_e32 v4, v5, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v8
	v_clz_i32_u32_e32 v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v9, 32, v9
	v_sub_nc_u32_e32 v5, 31, v9
	v_lshlrev_b32_e32 v11, 23, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_alignbit_b32 v7, v7, v4, v5
	v_alignbit_b32 v2, v4, v2, v5
	v_lshrrev_b32_e32 v5, 29, v3
	v_alignbit_b32 v4, v7, v2, 9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v5, 31, v5
	v_lshrrev_b32_e32 v7, 9, v7
	v_clz_i32_u32_e32 v8, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v10, 0.5, v5
	v_min_u32_e32 v8, 32, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v10, v10, v11
	v_sub_nc_u32_e32 v12, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v2, v4, v2, v12
	v_or_b32_e32 v4, v7, v10
	v_add_lshl_u32 v7, v8, v9, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v2, 9, v2
	v_mul_f32_e32 v8, 0x3fc90fda, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v7
	v_fma_f32 v7, 0x3fc90fda, v4, -v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 0x33000000, v2
	v_fmamk_f32 v4, v4, 0x33a22168, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v2, v2, v5
	v_fmac_f32_e32 v4, 0x3fc90fda, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v8, v4
	v_lshrrev_b32_e32 v3, 30, v3
	v_add_nc_u32_e32 v3, v6, v3
.LBB1_4:                                ; %Flow
	s_and_not1_saveexec_b32 s0, s2
; %bb.5:
	v_mul_f32_e64 v2, 0x3f22f983, |v1|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v3, v2
	v_fma_f32 v2, 0xbfc90fda, v3, |v1|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v2, v3, 0xb3a22168, v2
	v_fmamk_f32 v2, v3, 0xa7c234c4, v2
	v_cvt_i32_f32_e32 v3, v3
; %bb.6:                                ; %_ZL4cosff.exit
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v0, 0xbd800000, v0 :: v_dual_mul_f32 v5, v2, v2
	s_mov_b32 s0, 0xb94c1982
	s_mov_b32 s1, 0x37d75334
	v_mul_f32_e32 v4, 0x3fb8aa3b, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v8, s0, v5, 0x3c0881c4
	v_fma_f32 v6, 0x3fb8aa3b, v0, -v4
	v_rndne_f32_e32 v7, v4
	v_fmaak_f32 v9, s1, v5, 0xbab64f3b
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmaak_f32 v8, v5, v8, 0xbe2aaa9d
	v_fmamk_f32 v6, v0, 0x32a5705f, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v4, v4, v7 :: v_dual_fmaak_f32 v9, v5, v9, 0x3d2aabf7
	v_add_f32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v6, v5, v8
	v_dual_fmaak_f32 v8, v5, v9, 0xbf000004 :: v_dual_and_b32 v9, 1, v3
	v_lshlrev_b32_e32 v3, 30, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v4, v4
	v_fma_f32 v5, v5, v8, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v9
	v_dual_fmac_f32 v2, v2, v6 :: v_dual_and_b32 v3, 0x80000000, v3
	v_cvt_i32_f32_e32 v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, -v2, v5, vcc_lo
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v4, v4, v6
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0
	v_xor_b32_e32 v2, v3, v2
	v_cndmask_b32_e32 v3, 0, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v1, 0x1f8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v1, 0x7fc00000, v2, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v0
	v_dual_mul_f32 v1, v1, v1 :: v_dual_cndmask_b32 v0, 0x7f800000, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v0, v0, v1
	s_setpc_b64 s[30:31]
.Lfunc_end1:
	.size	_Z1gf, .Lfunc_end1-_Z1gf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 1380
; NumSgprs: 34
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z16integrate_blocksPf  ; -- Begin function _Z16integrate_blocksPf
	.globl	_Z16integrate_blocksPf
	.p2align	8
	.type	_Z16integrate_blocksPf,@function
_Z16integrate_blocksPf:                 ; @_Z16integrate_blocksPf
; %bb.0:
	s_mov_b64 s[4:5], s[0:1]
	s_load_b32 s0, s[0:1], 0x14
	v_dual_mov_b32 v14, v0 :: v_dual_mov_b32 v1, -4.0
	s_mov_b32 s6, s15
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s0, 0xffff
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z1gf@rel32@lo+4
	s_addc_u32 s1, s1, _Z1gf@rel32@hi+12
	v_mad_u64_u32 v[15:16], null, s6, s3, v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v0, v15
	v_fmamk_f32 v0, v0, 0x35800000, v1
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v1, 1, v15
	s_cmp_lt_u32 s3, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	v_cndmask_b32_e64 v1, 2, 4, vcc_lo
	v_cvt_f32_ubyte0_e32 v2, v1
	v_lshlrev_b32_e32 v1, 2, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f32_e32 v0, v0, v2
	ds_store_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v14
	s_cbranch_execz .LBB2_4
; %bb.3:                                ;   in Loop: Header=BB2_1 Depth=1
	v_lshl_add_u32 v0, s0, 2, v1
	ds_load_b32 v0, v0
	ds_load_b32 v2, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v0, v0, v2
	ds_store_b32 v1, v0
.LBB2_4:                                ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB2_1
.LBB2_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v14
	s_cbranch_execz .LBB2_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_load_b64 s[0:1], s[4:5], 0x0
	s_mov_b32 s7, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[6:7], 2
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v0, v1, s[0:1]
.LBB2_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16integrate_blocksPf
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z16integrate_blocksPf, .Lfunc_end2-_Z16integrate_blocksPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 320
; NumSgprs: 35
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9reductionPf          ; -- Begin function _Z9reductionPf
	.globl	_Z9reductionPf
	.p2align	8
	.type	_Z9reductionPf,@function
_Z9reductionPf:                         ; @_Z9reductionPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x14
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s3, 2
	s_cbranch_scc1 .LBB3_5
; %bb.1:                                ; %.lr.ph
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_mov_b32 s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s4, s3, 1
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB3_4
; %bb.3:                                ;   in Loop: Header=BB3_2 Depth=1
	s_lshl_b64 s[8:9], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v4
	global_store_b32 v[1:2], v3, off
.LBB3_4:                                ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB3_2
.LBB3_5:                                ; %._crit_edge
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[2:3], s[2:3], 2
	global_load_b32 v1, v0, s[0:1]
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB3_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9reductionPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z9reductionPf, .Lfunc_end3-_Z9reductionPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15final_reductionPf   ; -- Begin function _Z15final_reductionPf
	.globl	_Z15final_reductionPf
	.p2align	8
	.type	_Z15final_reductionPf,@function
_Z15final_reductionPf:                  ; @_Z15final_reductionPf
; %bb.0:
	s_mov_b32 s2, 0
	s_mov_b32 s32, 0
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB4_4
; %bb.1:                                ; %.preheader.preheader
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x14
	s_load_b64 s[4:5], s[0:1], 0x0
                                        ; implicit-def: $vgpr15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s3
	v_rcp_iflag_f32_e32 v1, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4b000000, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v1, v1
	v_fma_f32 v2, -v1, v0, 0x4b000000
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_f32_e64 s0, |v2|, v0
	v_readfirstlane_b32 s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s0, 0
	s_addc_u32 s0, s1, 0
	s_lshl_b32 s6, s3, 2
	s_and_b32 s7, s0, 0xffffff
	s_mov_b64 s[0:1], s[4:5]
.LBB4_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b32 s8, s[0:1], 0x0
	s_add_i32 s2, s2, s3
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, 0
	s_cmp_ge_u32 s2, s7
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v15, s8, v15
	s_cbranch_scc0 .LBB4_2
; %bb.3:
	v_mov_b32_e32 v0, 4.0
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, _Z1gf@rel32@lo+4
	s_addc_u32 s7, s7, _Z1gf@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[6:7]
	v_mov_b32_e32 v14, v0
	v_mov_b32_e32 v0, -4.0
	s_swappc_b64 s[30:31], s[6:7]
	v_dual_sub_f32 v0, v14, v0 :: v_dual_mov_b32 v1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v15, v0
	global_store_b32 v1, v0, s[4:5]
.LBB4_4:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15final_reductionPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z15final_reductionPf, .Lfunc_end4-_Z15final_reductionPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 35
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12clean_blocksPf
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z12clean_blocksPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     1
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16integrate_blocksPf
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         _Z16integrate_blocksPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9reductionPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9reductionPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15final_reductionPf
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         _Z15final_reductionPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
