#include <cmath>
#include <cstdlib>
#include <cstdio>

#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "ImmersedBoundary.cuh"

#define PI 3.14159
//__device__ const double RHO_0 = 1.;
//__device__ const double C_S = 0.57735;

__device__ const double c_l[9 * 2] =		//VELOCITY COMPONENTS
{
	0.,0. ,
	1.,0. , 0.,1. , -1.,0. , 0.,-1. ,
	1.,1. , -1.,1. , -1.,-1. , 1.,-1.
};

__device__ double delta(const double & xs, const double & ys, const int & x, const int & y)
{
	double deltax(0.), deltay(0.), delta(0.);

	double dx = abs(x - xs);
	double dy = abs(y - ys);

	if (dx <= 1.5)
	{
		if (dx <= 0.5)
		{
			deltax = (1. / 3.)*(1. + sqrt(-3. * dx*dx + 1.));
		}
		else deltax = (1. / 6.)*(5. - 3. * dx - sqrt(-3. * (1. - dx)*(1. - dx) + 1.));
	}

	if (dy <= 1.5)
	{
		if (dy <= 0.5)
		{
			deltay = (1. / 3.)*(1. + sqrt(-3. * dy*dy + 1.));
		}
		else deltay = (1. / 6.)*(5. - 3. * dy - sqrt(-3. * (1. - dy)*(1. - dy) + 1.));
	}

	delta = deltax * deltay;

	return delta;
}

__global__ void interpolate(const double * rho, const double * u, const int Ns, const double * u_s, double * F_s, const double * s, const int XDIM)
{

	int i(0), j(0), k(0), x0(0), y0(0), x(0), y(0);

	double xs(0.), ys(0.);


	k = blockIdx.x*blockDim.x + threadIdx.x;


	{
		F_s[2 * k + 0] = 0.;
		F_s[2 * k + 1] = 0.;

		xs = s[k * 2 + 0];
		ys = s[k * 2 + 1];

		x0 = nearbyint(xs);
		y0 = nearbyint(ys);

		for (i = 0; i < 9; i++)
		{
			x = nearbyint(x0 + c_l[i * 2 + 0]);
			y = nearbyint(y0 + c_l[i * 2 + 1]);

			j = y*XDIM + x;

			//std::cout << delta << std::endl;

			F_s[2 * k + 0] += 2.*(1. * 1. * delta(xs, ys, x, y))*rho[j] * (u_s[2 * k + 0] - u[2 * j + 0]);
			F_s[2 * k + 1] += 2.*(1. * 1. * delta(xs, ys, x, y))*rho[j] * (u_s[2 * k + 1] - u[2 * j + 1]);
		}

	}
}

// rho[SIZE]: fluid density	u[2*size]: fluid velocity	f[9*size]: density function		Ns: No. of cilia boundary points	u_s[2*Ns]: cilia velocity	F_s[2*Ns]: cilia force	
// force[2*size]: fluid force	s[2*Ns]: cilia position	XDIM: x dimension	Q: Net flow		epsilon[Ns]: boundary point switching

__global__ void spread(const double * rho, double * u, const double * f, const int Ns, const double * u_s, const double * F_s, double * force, const double * s, const int XDIM, double * Q, const int * epsilon)
{
	int i(0), j(0), k(0), x(0), y(0);

	double xs(0.), ys(0.);

	double momentum[2] = { 0,0 };

	j = blockIdx.x*blockDim.x + threadIdx.x;


	{
		force[2 * j + 0] = 0.;
		force[2 * j + 1] = 0.;


		x = j%XDIM;
		y = (j - j%XDIM) / XDIM;

		for (k = 0; k < Ns; k++)
		{
			xs = s[k * 2 + 0];
			ys = s[k * 2 + 1];

			force[2 * j + 0] += F_s[2 * k + 0] * delta(xs, ys, x, y) * 1.*epsilon[k];
			force[2 * j + 1] += F_s[2 * k + 1] * delta(xs, ys, x, y) * 1.*epsilon[k];
		}

		momentum[0] = 0.;
		momentum[1] = 0.;

		for (i = 0; i < 9; i++)
		{
			momentum[0] += c_l[i * 2 + 0] * f[9 * j + i];
			momentum[1] += c_l[i * 2 + 1] * f[9 * j + i];
		}

		u[2 * j + 0] = (momentum[0] + 0.5*force[2 * j + 0]) / rho[j];
		u[2 * j + 1] = (momentum[1] + 0.5*force[2 * j + 1]) / rho[j];

		if (x == XDIM - 5)
		{

				Q[0] += u[2 * j + 0]/200.;

		}
	}

}



	.file	"tmpxft_0038ec50_00000000-6_ImmersedBoundary.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z5deltaRKdS0_RKiS2_
	.type	_Z5deltaRKdS0_RKiS2_, @function
_Z5deltaRKdS0_RKiS2_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z5deltaRKdS0_RKiS2_, .-_Z5deltaRKdS0_RKiS2_
	.globl	_Z45__device_stub__Z11interpolatePKdS0_iS0_PdS0_iPKdS0_iS0_PdS0_i
	.type	_Z45__device_stub__Z11interpolatePKdS0_iS0_PdS0_iPKdS0_iS0_PdS0_i, @function
_Z45__device_stub__Z11interpolatePKdS0_iS0_PdS0_iPKdS0_iS0_PdS0_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movq	%rsp, %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11interpolatePKdS0_iS0_PdS0_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L4:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z45__device_stub__Z11interpolatePKdS0_iS0_PdS0_iPKdS0_iS0_PdS0_i, .-_Z45__device_stub__Z11interpolatePKdS0_iS0_PdS0_iPKdS0_iS0_PdS0_i
	.globl	_Z11interpolatePKdS0_iS0_PdS0_i
	.type	_Z11interpolatePKdS0_iS0_PdS0_i, @function
_Z11interpolatePKdS0_iS0_PdS0_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z11interpolatePKdS0_iS0_PdS0_iPKdS0_iS0_PdS0_i
	.cfi_endproc
.LFE2053:
	.size	_Z11interpolatePKdS0_iS0_PdS0_i, .-_Z11interpolatePKdS0_iS0_PdS0_i
	.globl	_Z51__device_stub__Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKiPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.type	_Z51__device_stub__Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKiPKdPdS0_iS0_S0_S1_S0_iS1_PKi, @function
_Z51__device_stub__Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKiPKdPdS0_iS0_S0_S1_S0_iS1_PKi:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	256(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	264(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	280(%rsp), %rax
	movl	%ecx, 52(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 8(%rsp)
	movq	288(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	%rsp, %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	88(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 272
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L10:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z51__device_stub__Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKiPKdPdS0_iS0_S0_S1_S0_iS1_PKi, .-_Z51__device_stub__Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKiPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.globl	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.type	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi, @function
_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKiPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.cfi_endproc
.LFE2055:
	.size	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi, .-_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi"
.LC1:
	.string	"_Z11interpolatePKdS0_iS0_PdS0_i"
.LC2:
	.string	"c_l"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11interpolatePKdS0_iS0_PdS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movl	$144, %r9d
	leaq	_ZL3c_l(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata
	.align 32
	.type	_ZL3c_l, @object
	.size	_ZL3c_l, 144
_ZL3c_l:
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	1072693248
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	1072693248
	.long	0
	.long	-1074790400
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	-1074790400
	.long	0
	.long	1072693248
	.long	0
	.long	1072693248
	.long	0
	.long	-1074790400
	.long	0
	.long	1072693248
	.long	0
	.long	-1074790400
	.long	0
	.long	-1074790400
	.long	0
	.long	1072693248
	.long	0
	.long	-1074790400
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <cmath>
#include <cstdlib>
#include <cstdio>

#include "hip/hip_runtime.h"

#include "ImmersedBoundary.cuh"

#define PI 3.14159
//__device__ const double RHO_0 = 1.;
//__device__ const double C_S = 0.57735;

__device__ const double c_l[9 * 2] =		//VELOCITY COMPONENTS
{
	0.,0. ,
	1.,0. , 0.,1. , -1.,0. , 0.,-1. ,
	1.,1. , -1.,1. , -1.,-1. , 1.,-1.
};

__device__ double delta(const double & xs, const double & ys, const int & x, const int & y)
{
	double deltax(0.), deltay(0.), delta(0.);

	double dx = abs(x - xs);
	double dy = abs(y - ys);

	if (dx <= 1.5)
	{
		if (dx <= 0.5)
		{
			deltax = (1. / 3.)*(1. + sqrt(-3. * dx*dx + 1.));
		}
		else deltax = (1. / 6.)*(5. - 3. * dx - sqrt(-3. * (1. - dx)*(1. - dx) + 1.));
	}

	if (dy <= 1.5)
	{
		if (dy <= 0.5)
		{
			deltay = (1. / 3.)*(1. + sqrt(-3. * dy*dy + 1.));
		}
		else deltay = (1. / 6.)*(5. - 3. * dy - sqrt(-3. * (1. - dy)*(1. - dy) + 1.));
	}

	delta = deltax * deltay;

	return delta;
}

__global__ void interpolate(const double * rho, const double * u, const int Ns, const double * u_s, double * F_s, const double * s, const int XDIM)
{

	int i(0), j(0), k(0), x0(0), y0(0), x(0), y(0);

	double xs(0.), ys(0.);


	k = blockIdx.x*blockDim.x + threadIdx.x;


	{
		F_s[2 * k + 0] = 0.;
		F_s[2 * k + 1] = 0.;

		xs = s[k * 2 + 0];
		ys = s[k * 2 + 1];

		x0 = nearbyint(xs);
		y0 = nearbyint(ys);

		for (i = 0; i < 9; i++)
		{
			x = nearbyint(x0 + c_l[i * 2 + 0]);
			y = nearbyint(y0 + c_l[i * 2 + 1]);

			j = y*XDIM + x;

			//std::cout << delta << std::endl;

			F_s[2 * k + 0] += 2.*(1. * 1. * delta(xs, ys, x, y))*rho[j] * (u_s[2 * k + 0] - u[2 * j + 0]);
			F_s[2 * k + 1] += 2.*(1. * 1. * delta(xs, ys, x, y))*rho[j] * (u_s[2 * k + 1] - u[2 * j + 1]);
		}

	}
}

// rho[SIZE]: fluid density	u[2*size]: fluid velocity	f[9*size]: density function		Ns: No. of cilia boundary points	u_s[2*Ns]: cilia velocity	F_s[2*Ns]: cilia force	
// force[2*size]: fluid force	s[2*Ns]: cilia position	XDIM: x dimension	Q: Net flow		epsilon[Ns]: boundary point switching

__global__ void spread(const double * rho, double * u, const double * f, const int Ns, const double * u_s, const double * F_s, double * force, const double * s, const int XDIM, double * Q, const int * epsilon)
{
	int i(0), j(0), k(0), x(0), y(0);

	double xs(0.), ys(0.);

	double momentum[2] = { 0,0 };

	j = blockIdx.x*blockDim.x + threadIdx.x;


	{
		force[2 * j + 0] = 0.;
		force[2 * j + 1] = 0.;


		x = j%XDIM;
		y = (j - j%XDIM) / XDIM;

		for (k = 0; k < Ns; k++)
		{
			xs = s[k * 2 + 0];
			ys = s[k * 2 + 1];

			force[2 * j + 0] += F_s[2 * k + 0] * delta(xs, ys, x, y) * 1.*epsilon[k];
			force[2 * j + 1] += F_s[2 * k + 1] * delta(xs, ys, x, y) * 1.*epsilon[k];
		}

		momentum[0] = 0.;
		momentum[1] = 0.;

		for (i = 0; i < 9; i++)
		{
			momentum[0] += c_l[i * 2 + 0] * f[9 * j + i];
			momentum[1] += c_l[i * 2 + 1] * f[9 * j + i];
		}

		u[2 * j + 0] = (momentum[0] + 0.5*force[2 * j + 0]) / rho[j];
		u[2 * j + 1] = (momentum[1] + 0.5*force[2 * j + 1]) / rho[j];

		if (x == XDIM - 5)
		{

				Q[0] += u[2 * j + 0]/200.;

		}
	}

}



	.text
	.file	"ImmersedBoundary.hip"
	.globl	_Z26__device_stub__interpolatePKdS0_iS0_PdS0_i # -- Begin function _Z26__device_stub__interpolatePKdS0_iS0_PdS0_i
	.type	_Z26__device_stub__interpolatePKdS0_iS0_PdS0_i,@function
_Z26__device_stub__interpolatePKdS0_iS0_PdS0_i: # @_Z26__device_stub__interpolatePKdS0_iS0_PdS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11interpolatePKdS0_iS0_PdS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__interpolatePKdS0_iS0_PdS0_i, .Lfunc_end0-_Z26__device_stub__interpolatePKdS0_iS0_PdS0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi # -- Begin function _Z21__device_stub__spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.type	_Z21__device_stub__spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi,@function
_Z21__device_stub__spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi: # @_Z21__device_stub__spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi, .Lfunc_end1-_Z21__device_stub__spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11interpolatePKdS0_iS0_PdS0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11interpolatePKdS0_iS0_PdS0_i,@object # @_Z11interpolatePKdS0_iS0_PdS0_i
	.section	.rodata,"a",@progbits
	.globl	_Z11interpolatePKdS0_iS0_PdS0_i
	.p2align	3, 0x0
_Z11interpolatePKdS0_iS0_PdS0_i:
	.quad	_Z26__device_stub__interpolatePKdS0_iS0_PdS0_i
	.size	_Z11interpolatePKdS0_iS0_PdS0_i, 8

	.type	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi,@object # @_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.globl	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.p2align	3, 0x0
_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi:
	.quad	_Z21__device_stub__spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.size	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z11interpolatePKdS0_iS0_PdS0_i"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi"
	.size	.L__unnamed_2, 38

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__interpolatePKdS0_iS0_PdS0_i
	.addrsig_sym _Z21__device_stub__spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11interpolatePKdS0_iS0_PdS0_i
	.addrsig_sym _Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11interpolatePKdS0_iS0_PdS0_i ; -- Begin function _Z11interpolatePKdS0_iS0_PdS0_i
	.globl	_Z11interpolatePKdS0_iS0_PdS0_i
	.p2align	8
	.type	_Z11interpolatePKdS0_iS0_PdS0_i,@function
_Z11interpolatePKdS0_iS0_PdS0_i:        ; @_Z11interpolatePKdS0_iS0_PdS0_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s14, s[0:1], 0x30
	s_load_b128 s[4:7], s[0:1], 0x18
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0x55555555
	s_mov_b32 s9, 0x3fd55555
	s_mov_b64 s[10:11], 8
	s_mov_b32 s13, 0x3fc55555
	v_mov_b32_e32 v11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v17, v11 :: v_dual_mov_b32 v16, v10
	v_dual_mov_b32 v15, v11 :: v_dual_mov_b32 v14, v10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s15, s15, s2
	s_load_b64 s[2:3], s[0:1], 0x28
	v_add_lshl_u32 v1, s15, v0, 1
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[12:13], 3, v[1:2]
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_add_co_u32 v4, vcc_lo, s6, v12
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v13, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s2, v12
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v13, vcc_lo
	global_store_b128 v[4:5], v[0:3], off
	s_load_b128 s[0:3], s[0:1], 0x0
	v_add_co_u32 v12, vcc_lo, s4, v12
	global_load_b128 v[0:3], v[6:7], off
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	s_waitcnt vmcnt(0)
	v_rndne_f64_e32 v[6:7], v[0:1]
	v_rndne_f64_e32 v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v6, v[6:7]
	v_cvt_i32_f64_e32 v8, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[6:7], v6
	v_cvt_f64_i32_e32 v[8:9], v8
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, _ZL3c_l@rel32@lo-4
	s_addc_u32 s5, s5, _ZL3c_l@rel32@hi+4
	s_add_u32 s4, s10, s4
	s_addc_u32 s5, s11, s5
	v_dual_mov_b32 v31, v11 :: v_dual_mov_b32 v30, v10
	s_load_b128 s[4:7], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], s[4:5], v[6:7]
	v_rndne_f64_e32 v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v26, v[18:19]
	v_cvt_f64_i32_e32 v[18:19], v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[18:19], -v[0:1]
	v_cmp_ge_f64_e64 s4, 0x3ff80000, |v[22:23]|
	v_mul_f64 v[18:19], 0x40080000, |v[22:23]|
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB0_7
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_le_f64_e64 s12, |v[22:23]|, 0.5
                                        ; implicit-def: $vgpr30_vgpr31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s15, s12
	s_xor_b32 s12, exec_lo, s15
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -|v[22:23]|, v[18:19], 1.0
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[20:21]
	v_cndmask_b32_e64 v24, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v24, 8, v24
	v_ldexp_f64 v[20:21], v[20:21], v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[24:25], v[20:21]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[27:28], v[20:21], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	v_fma_f64 v[29:30], -v[24:25], v[27:28], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[27:28], v[27:28], v[29:30], v[27:28]
	v_fma_f64 v[24:25], v[24:25], v[29:30], v[24:25]
	v_fma_f64 v[29:30], -v[27:28], v[27:28], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[27:28], v[29:30], v[24:25], v[27:28]
	v_fma_f64 v[29:30], -v[27:28], v[27:28], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[29:30], v[24:25], v[27:28]
	v_cndmask_b32_e64 v27, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[20:21], 0x260
	v_ldexp_f64 v[24:25], v[24:25], v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v21, v25, v21 :: v_dual_cndmask_b32 v20, v24, v20
	v_add_f64 v[20:21], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[30:31], v[20:21], s[8:9]
.LBB0_4:                                ; %Flow74
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s15, s12
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_1 Depth=1
	v_add_f64 v[20:21], -|v[22:23]|, 1.0
	s_mov_b32 s12, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], 0xc0080000, v[20:21]
	v_fma_f64 v[20:21], v[20:21], v[24:25], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[20:21]
	v_cndmask_b32_e64 v24, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v24, 8, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[20:21], v[20:21], v24
	v_rsq_f64_e32 v[24:25], v[20:21]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[27:28], v[20:21], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], -v[24:25], v[27:28], 0.5
	v_fma_f64 v[27:28], v[27:28], v[29:30], v[27:28]
	v_fma_f64 v[24:25], v[24:25], v[29:30], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], -v[27:28], v[27:28], v[20:21]
	v_fma_f64 v[27:28], v[29:30], v[24:25], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], -v[27:28], v[27:28], v[20:21]
	v_fma_f64 v[24:25], v[29:30], v[24:25], v[27:28]
	v_cndmask_b32_e64 v27, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[20:21], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[24:25], v[24:25], v27
	v_add_f64 v[27:28], 0x40140000, -v[18:19]
	v_dual_cndmask_b32 v21, v25, v21 :: v_dual_cndmask_b32 v20, v24, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[27:28], -v[20:21]
	v_mul_f64 v[30:31], v[20:21], s[12:13]
.LBB0_6:                                ; %Flow75
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
.LBB0_7:                                ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s5
	v_add_f64 v[20:21], s[6:7], v[8:9]
	v_dual_mov_b32 v33, v11 :: v_dual_mov_b32 v32, v10
	v_rndne_f64_e32 v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v27, v[20:21]
	v_cvt_f64_i32_e32 v[20:21], v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[20:21], -v[2:3]
	v_cmp_ge_f64_e64 s5, 0x3ff80000, |v[24:25]|
	v_mul_f64 v[20:21], 0x40080000, |v[24:25]|
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB0_13
; %bb.8:                                ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_le_f64_e64 s7, |v[24:25]|, 0.5
                                        ; implicit-def: $vgpr32_vgpr33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s7
	s_xor_b32 s7, exec_lo, s12
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], -|v[24:25]|, v[20:21], 1.0
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[28:29]
	v_cndmask_b32_e64 v32, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v32, 8, v32
	v_ldexp_f64 v[28:29], v[28:29], v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[32:33], v[28:29]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[34:35], v[28:29], v[32:33]
	v_mul_f64 v[32:33], v[32:33], 0.5
	v_fma_f64 v[36:37], -v[32:33], v[34:35], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[32:33], v[32:33], v[36:37], v[32:33]
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], v[36:37], v[32:33], v[34:35]
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[34:35]
	v_cndmask_b32_e64 v34, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[28:29], 0x260
	v_ldexp_f64 v[32:33], v[32:33], v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v29, v33, v29 :: v_dual_cndmask_b32 v28, v32, v28
	v_add_f64 v[28:29], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[32:33], v[28:29], s[8:9]
.LBB0_10:                               ; %Flow72
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_1 Depth=1
	v_add_f64 v[28:29], -|v[24:25]|, 1.0
	s_mov_b32 s12, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], 0xc0080000, v[28:29]
	v_fma_f64 v[28:29], v[28:29], v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[28:29]
	v_cndmask_b32_e64 v32, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v32, 8, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[28:29], v[28:29], v32
	v_rsq_f64_e32 v[32:33], v[28:29]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[34:35], v[28:29], v[32:33]
	v_mul_f64 v[32:33], v[32:33], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[32:33], v[34:35], 0.5
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[32:33], v[32:33], v[36:37], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[28:29]
	v_fma_f64 v[34:35], v[36:37], v[32:33], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[28:29]
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[34:35]
	v_cndmask_b32_e64 v34, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[28:29], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[32:33], v[32:33], v34
	v_add_f64 v[34:35], 0x40140000, -v[20:21]
	v_dual_cndmask_b32 v29, v33, v29 :: v_dual_cndmask_b32 v28, v32, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	v_mul_f64 v[32:33], v[28:29], s[12:13]
.LBB0_12:                               ; %Flow73
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_13:                               ; %_Z5deltaRKdS0_RKiS2_.exit
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_mad_u64_u32 v[28:29], null, v27, s14, v[26:27]
	v_mul_f64 v[30:31], v[30:31], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 1, v28
	v_ashrrev_i32_e32 v29, 31, v28
	v_ashrrev_i32_e32 v27, 31, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[28:29], 3, v[28:29]
	v_lshlrev_b64 v[26:27], 3, v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v28, vcc_lo, s0, v28
	v_add_co_ci_u32_e32 v29, vcc_lo, s1, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v26, vcc_lo, s2, v26
	v_add_co_ci_u32_e32 v27, vcc_lo, s3, v27, vcc_lo
	global_load_b64 v[34:35], v[28:29], off
	global_load_b64 v[36:37], v[12:13], off
	global_load_b64 v[38:39], v[26:27], off
	v_add_f64 v[30:31], v[30:31], v[30:31]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], v[34:35], v[30:31]
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[36:37], -v[38:39]
	v_fma_f64 v[16:17], v[30:31], v[32:33], v[16:17]
	v_mov_b32_e32 v30, 0
	v_mov_b32_e32 v31, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v33, v31 :: v_dual_mov_b32 v32, v30
	global_store_b64 v[4:5], v[16:17], off
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB0_19
; %bb.14:                               ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_le_f64_e64 s4, |v[22:23]|, 0.5
                                        ; implicit-def: $vgpr32_vgpr33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s7, s4
	s_xor_b32 s4, exec_lo, s7
	s_cbranch_execz .LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_1 Depth=1
	v_fma_f64 v[18:19], -|v[22:23]|, v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[18:19]
	v_cndmask_b32_e64 v22, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v22, 8, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[18:19], v[18:19], v22
	v_rsq_f64_e32 v[22:23], v[18:19]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[32:33], v[18:19], v[22:23]
	v_mul_f64 v[22:23], v[22:23], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], -v[22:23], v[32:33], 0.5
	v_fma_f64 v[32:33], v[32:33], v[34:35], v[32:33]
	v_fma_f64 v[22:23], v[22:23], v[34:35], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], -v[32:33], v[32:33], v[18:19]
	v_fma_f64 v[32:33], v[34:35], v[22:23], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], -v[32:33], v[32:33], v[18:19]
	v_fma_f64 v[22:23], v[34:35], v[22:23], v[32:33]
	v_cndmask_b32_e64 v32, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[18:19], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[22:23], v[22:23], v32
	v_dual_cndmask_b32 v19, v23, v19 :: v_dual_cndmask_b32 v18, v22, v18
                                        ; implicit-def: $vgpr22_vgpr23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], 1.0
	v_mul_f64 v[32:33], v[18:19], s[8:9]
                                        ; implicit-def: $vgpr18_vgpr19
.LBB0_16:                               ; %Flow68
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_1 Depth=1
	v_add_f64 v[22:23], -|v[22:23]|, 1.0
	v_add_f64 v[18:19], 0x40140000, -v[18:19]
	s_mov_b32 s12, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], 0xc0080000, v[22:23]
	v_fma_f64 v[22:23], v[22:23], v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[22:23]
	v_cndmask_b32_e64 v32, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v32, 8, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[22:23], v[22:23], v32
	v_rsq_f64_e32 v[32:33], v[22:23]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[34:35], v[22:23], v[32:33]
	v_mul_f64 v[32:33], v[32:33], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[32:33], v[34:35], 0.5
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[32:33], v[32:33], v[36:37], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[22:23]
	v_fma_f64 v[34:35], v[36:37], v[32:33], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[22:23]
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[34:35]
	v_cndmask_b32_e64 v34, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[22:23], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[32:33], v[32:33], v34
	v_dual_cndmask_b32 v23, v33, v23 :: v_dual_cndmask_b32 v22, v32, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	v_mul_f64 v[32:33], v[18:19], s[12:13]
.LBB0_18:                               ; %Flow69
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_19:                               ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s4, s5
	s_cbranch_execz .LBB0_25
; %bb.20:                               ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_le_f64_e64 s5, |v[24:25]|, 0.5
                                        ; implicit-def: $vgpr30_vgpr31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s6, s5
	s_xor_b32 s5, exec_lo, s6
	s_cbranch_execz .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_1 Depth=1
	v_fma_f64 v[18:19], -|v[24:25]|, v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[18:19]
	v_cndmask_b32_e64 v20, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v20, 8, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[18:19], v[18:19], v20
	v_rsq_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[22:23], v[18:19], v[20:21]
	v_mul_f64 v[20:21], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 0.5
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], -v[22:23], v[22:23], v[18:19]
	v_fma_f64 v[22:23], v[24:25], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], -v[22:23], v[22:23], v[18:19]
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[22:23]
	v_cndmask_b32_e64 v22, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[18:19], 0x260
                                        ; implicit-def: $vgpr24_vgpr25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[20:21], v[20:21], v22
	v_dual_cndmask_b32 v19, v21, v19 :: v_dual_cndmask_b32 v18, v20, v18
                                        ; implicit-def: $vgpr20_vgpr21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], 1.0
	v_mul_f64 v[30:31], v[18:19], s[8:9]
.LBB0_22:                               ; %Flow
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_1 Depth=1
	v_add_f64 v[18:19], -|v[24:25]|, 1.0
	v_add_f64 v[20:21], 0x40140000, -v[20:21]
	s_mov_b32 s12, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], 0xc0080000, v[18:19]
	v_fma_f64 v[18:19], v[18:19], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[18:19]
	v_cndmask_b32_e64 v22, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v22, 8, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[18:19], v[18:19], v22
	v_rsq_f64_e32 v[22:23], v[18:19]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[24:25], v[18:19], v[22:23]
	v_mul_f64 v[22:23], v[22:23], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], -v[22:23], v[24:25], 0.5
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	v_fma_f64 v[22:23], v[22:23], v[30:31], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], -v[24:25], v[24:25], v[18:19]
	v_fma_f64 v[24:25], v[30:31], v[22:23], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], -v[24:25], v[24:25], v[18:19]
	v_fma_f64 v[22:23], v[30:31], v[22:23], v[24:25]
	v_cndmask_b32_e64 v24, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[18:19], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[22:23], v[22:23], v24
	v_dual_cndmask_b32 v19, v23, v19 :: v_dual_cndmask_b32 v18, v22, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_mul_f64 v[30:31], v[18:19], s[12:13]
.LBB0_24:                               ; %Flow66
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_25:                               ; %_Z5deltaRKdS0_RKiS2_.exit37
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	global_load_b64 v[18:19], v[28:29], off
	global_load_b64 v[20:21], v[12:13], off offset:8
	global_load_b64 v[22:23], v[26:27], off offset:8
	v_mul_f64 v[24:25], v[32:33], v[30:31]
	s_add_u32 s10, s10, 16
	s_addc_u32 s11, s11, 0
	s_cmpk_lg_i32 s10, 0x98
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[24:25], v[24:25]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[18:19], v[18:19], v[24:25]
	s_waitcnt vmcnt(0)
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[14:15], v[18:19], v[20:21], v[14:15]
	global_store_b64 v[4:5], v[14:15], off offset:8
	s_cbranch_scc1 .LBB0_1
; %bb.26:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11interpolatePKdS0_iS0_PdS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 40
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11interpolatePKdS0_iS0_PdS0_i, .Lfunc_end0-_Z11interpolatePKdS0_iS0_PdS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2716
; NumSgprs: 18
; NumVgprs: 40
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 40
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi ; -- Begin function _Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.globl	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
	.p2align	8
	.type	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi,@function
_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi:  ; @_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
; %bb.0:
	s_clause 0x2
	s_load_b32 s14, s[0:1], 0x40
	s_load_b32 s4, s[0:1], 0x64
	s_load_b128 s[8:11], s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s14, 31
	s_and_b32 s4, s4, 0xffff
	s_add_i32 s3, s14, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s2
	v_cvt_f32_u32_e32 v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, s15, s4, v[0:1]
	s_sub_i32 s4, 0, s3
	s_load_b32 s15, s[0:1], 0x18
	v_mul_lo_u32 v0, s4, v1
	s_load_b128 s[4:7], s[0:1], 0x48
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v0, v1, v0
	v_add_nc_u32_e32 v2, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v6
	v_add_nc_u32_e32 v0, v1, v0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s15, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v2, v0
	v_mul_lo_u32 v1, v0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v2, v1
	v_subrev_nc_u32_e32 v3, s3, v1
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_add_nc_u32 v2, 1, v0
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	v_xor_b32_e32 v3, s2, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	v_add_nc_u32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v0, v2 :: v_dual_lshlrev_b32 v0, 1, v5
	v_xor_b32_e32 v2, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_sub_nc_u32_e32 v4, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 3, v[0:1]
	v_mov_b32_e32 v0, 0
	v_mul_lo_u32 v11, v4, s14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v0
	v_sub_nc_u32_e32 v33, v5, v11
	global_store_b128 v[7:8], v[0:3], off
	s_cbranch_scc1 .LBB1_28
; %bb.1:                                ; %.lr.ph
	v_cvt_f64_i32_e32 v[11:12], v33
	v_cvt_f64_i32_e32 v[13:14], v4
	s_load_b64 s[2:3], s[0:1], 0x38
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b32 s10, 0x55555555
	s_mov_b32 s11, 0x3fd55555
	s_mov_b32 s13, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v20, v16 :: v_dual_mov_b32 v19, v15
	v_dual_mov_b32 v18, v16 :: v_dual_mov_b32 v17, v15
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_add_u32 s8, s8, 8
	s_addc_u32 s9, s9, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_clause 0x1
	global_load_b128 v[1:4], v0, s[2:3] offset:-8
	global_load_b64 v[25:26], v0, s[8:9] offset:-8
	v_dual_mov_b32 v28, v16 :: v_dual_mov_b32 v27, v15
	s_waitcnt vmcnt(1)
	v_add_f64 v[21:22], v[11:12], -v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ge_f64_e64 s16, 0x3ff80000, |v[21:22]|
	v_mul_f64 v[1:2], 0x40080000, |v[21:22]|
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB1_8
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_cmp_le_f64_e64 s12, |v[21:22]|, 0.5
                                        ; implicit-def: $vgpr27_vgpr28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s18, s12
	s_xor_b32 s12, exec_lo, s18
	s_cbranch_execz .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], -|v[21:22]|, v[1:2], 1.0
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[23:24]
	v_cndmask_b32_e64 v27, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v27, 8, v27
	v_ldexp_f64 v[23:24], v[23:24], v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[27:28], v[23:24]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[29:30], v[23:24], v[27:28]
	v_mul_f64 v[27:28], v[27:28], 0.5
	v_fma_f64 v[31:32], -v[27:28], v[29:30], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	v_fma_f64 v[27:28], v[27:28], v[31:32], v[27:28]
	v_fma_f64 v[31:32], -v[29:30], v[29:30], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], v[31:32], v[27:28], v[29:30]
	v_fma_f64 v[31:32], -v[29:30], v[29:30], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[27:28], v[31:32], v[27:28], v[29:30]
	v_cndmask_b32_e64 v29, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[23:24], 0x260
	v_ldexp_f64 v[27:28], v[27:28], v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v24, v28, v24 :: v_dual_cndmask_b32 v23, v27, v23
	v_add_f64 v[23:24], v[23:24], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[27:28], v[23:24], s[10:11]
.LBB1_5:                                ; %Flow146
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s18, s12
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_f64 v[23:24], -|v[21:22]|, 1.0
	s_mov_b32 s12, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[27:28], 0xc0080000, v[23:24]
	v_fma_f64 v[23:24], v[23:24], v[27:28], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[23:24]
	v_cndmask_b32_e64 v27, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v27, 8, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v27
	v_rsq_f64_e32 v[27:28], v[23:24]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[29:30], v[23:24], v[27:28]
	v_mul_f64 v[27:28], v[27:28], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[27:28], v[29:30], 0.5
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	v_fma_f64 v[27:28], v[27:28], v[31:32], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[29:30], v[29:30], v[23:24]
	v_fma_f64 v[29:30], v[31:32], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[29:30], v[29:30], v[23:24]
	v_fma_f64 v[27:28], v[31:32], v[27:28], v[29:30]
	v_cndmask_b32_e64 v29, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[23:24], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[27:28], v[27:28], v29
	v_add_f64 v[29:30], 0x40140000, -v[1:2]
	v_dual_cndmask_b32 v24, v28, v24 :: v_dual_cndmask_b32 v23, v27, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[29:30], -v[23:24]
	v_mul_f64 v[27:28], v[23:24], s[12:13]
.LBB1_7:                                ; %Flow147
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
.LBB1_8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s17
	v_add_f64 v[23:24], v[13:14], -v[3:4]
	v_dual_mov_b32 v30, v16 :: v_dual_mov_b32 v29, v15
	v_cmp_ge_f64_e64 s17, 0x3ff80000, |v[23:24]|
	v_mul_f64 v[3:4], 0x40080000, |v[23:24]|
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB1_14
; %bb.9:                                ;   in Loop: Header=BB1_2 Depth=1
	v_cmp_le_f64_e64 s12, |v[23:24]|, 0.5
                                        ; implicit-def: $vgpr29_vgpr30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s19, s12
	s_xor_b32 s12, exec_lo, s19
	s_cbranch_execz .LBB1_11
; %bb.10:                               ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], -|v[23:24]|, v[3:4], 1.0
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[29:30]
	v_cndmask_b32_e64 v31, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v31, 8, v31
	v_ldexp_f64 v[29:30], v[29:30], v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[31:32], v[29:30]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[34:35], v[29:30], v[31:32]
	v_mul_f64 v[31:32], v[31:32], 0.5
	v_fma_f64 v[36:37], -v[31:32], v[34:35], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[31:32], v[31:32], v[36:37], v[31:32]
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], v[36:37], v[31:32], v[34:35]
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[36:37], v[31:32], v[34:35]
	v_cndmask_b32_e64 v34, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[29:30], 0x260
	v_ldexp_f64 v[31:32], v[31:32], v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v30, v32, v30 :: v_dual_cndmask_b32 v29, v31, v29
	v_add_f64 v[29:30], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[29:30], v[29:30], s[10:11]
.LBB1_11:                               ; %Flow144
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s19, s12
	s_cbranch_execz .LBB1_13
; %bb.12:                               ;   in Loop: Header=BB1_2 Depth=1
	v_add_f64 v[29:30], -|v[23:24]|, 1.0
	s_mov_b32 s12, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[31:32], 0xc0080000, v[29:30]
	v_fma_f64 v[29:30], v[29:30], v[31:32], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[29:30]
	v_cndmask_b32_e64 v31, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v31, 8, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[29:30], v[29:30], v31
	v_rsq_f64_e32 v[31:32], v[29:30]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[34:35], v[29:30], v[31:32]
	v_mul_f64 v[31:32], v[31:32], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[31:32], v[34:35], 0.5
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[31:32], v[31:32], v[36:37], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[29:30]
	v_fma_f64 v[34:35], v[36:37], v[31:32], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[29:30]
	v_fma_f64 v[31:32], v[36:37], v[31:32], v[34:35]
	v_cndmask_b32_e64 v34, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[29:30], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[31:32], v[31:32], v34
	v_add_f64 v[34:35], 0x40140000, -v[3:4]
	v_dual_cndmask_b32 v30, v32, v30 :: v_dual_cndmask_b32 v29, v31, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[34:35], -v[29:30]
	v_mul_f64 v[29:30], v[29:30], s[12:13]
.LBB1_13:                               ; %Flow145
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
.LBB1_14:                               ; %_Z5deltaRKdS0_RKiS2_.exit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	v_mul_f64 v[27:28], v[27:28], v[29:30]
	s_load_b32 s12, s[6:7], 0x0
	v_mov_b32_e32 v29, 0
	v_mov_b32_e32 v30, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v32, v30 :: v_dual_mov_b32 v31, v29
	s_waitcnt vmcnt(0)
	v_mul_f64 v[27:28], v[25:26], v[27:28]
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_i32_e32 v[25:26], s12
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[17:18], v[27:28], v[25:26], v[17:18]
	global_store_b64 v[7:8], v[17:18], off
	global_load_b64 v[27:28], v0, s[8:9]
	s_and_saveexec_b32 s18, s16
	s_cbranch_execz .LBB1_20
; %bb.15:                               ;   in Loop: Header=BB1_2 Depth=1
	v_cmp_le_f64_e64 s12, |v[21:22]|, 0.5
                                        ; implicit-def: $vgpr31_vgpr32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s16, s12
	s_xor_b32 s12, exec_lo, s16
	s_cbranch_execz .LBB1_17
; %bb.16:                               ;   in Loop: Header=BB1_2 Depth=1
	v_fma_f64 v[1:2], -|v[21:22]|, v[1:2], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[1:2]
	v_cndmask_b32_e64 v21, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v21, 8, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[1:2], v[1:2], v21
	v_rsq_f64_e32 v[21:22], v[1:2]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[31:32], v[1:2], v[21:22]
	v_mul_f64 v[21:22], v[21:22], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], -v[21:22], v[31:32], 0.5
	v_fma_f64 v[31:32], v[31:32], v[34:35], v[31:32]
	v_fma_f64 v[21:22], v[21:22], v[34:35], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], -v[31:32], v[31:32], v[1:2]
	v_fma_f64 v[31:32], v[34:35], v[21:22], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], -v[31:32], v[31:32], v[1:2]
	v_fma_f64 v[21:22], v[34:35], v[21:22], v[31:32]
	v_cndmask_b32_e64 v31, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[1:2], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v31
	v_dual_cndmask_b32 v2, v22, v2 :: v_dual_cndmask_b32 v1, v21, v1
                                        ; implicit-def: $vgpr21_vgpr22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], 1.0
	v_mul_f64 v[31:32], v[1:2], s[10:11]
                                        ; implicit-def: $vgpr1_vgpr2
.LBB1_17:                               ; %Flow140
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s16, s12
	s_cbranch_execz .LBB1_19
; %bb.18:                               ;   in Loop: Header=BB1_2 Depth=1
	v_add_f64 v[21:22], -|v[21:22]|, 1.0
	v_add_f64 v[1:2], 0x40140000, -v[1:2]
	s_mov_b32 s12, s10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[31:32], 0xc0080000, v[21:22]
	v_fma_f64 v[21:22], v[21:22], v[31:32], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	v_cndmask_b32_e64 v31, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v31, 8, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v31
	v_rsq_f64_e32 v[31:32], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[34:35], v[21:22], v[31:32]
	v_mul_f64 v[31:32], v[31:32], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[31:32], v[34:35], 0.5
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[31:32], v[31:32], v[36:37], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[21:22]
	v_fma_f64 v[34:35], v[36:37], v[31:32], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[21:22]
	v_fma_f64 v[31:32], v[36:37], v[31:32], v[34:35]
	v_cndmask_b32_e64 v34, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[31:32], v[31:32], v34
	v_dual_cndmask_b32 v22, v32, v22 :: v_dual_cndmask_b32 v21, v31, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], -v[21:22]
	v_mul_f64 v[31:32], v[1:2], s[12:13]
.LBB1_19:                               ; %Flow141
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
.LBB1_20:                               ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s18
	s_and_saveexec_b32 s16, s17
	s_cbranch_execz .LBB1_26
; %bb.21:                               ;   in Loop: Header=BB1_2 Depth=1
	v_cmp_le_f64_e64 s12, |v[23:24]|, 0.5
                                        ; implicit-def: $vgpr29_vgpr30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s17, s12
	s_xor_b32 s12, exec_lo, s17
	s_cbranch_execz .LBB1_23
; %bb.22:                               ;   in Loop: Header=BB1_2 Depth=1
	v_fma_f64 v[1:2], -|v[23:24]|, v[3:4], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[1:2]
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v3, 8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[1:2], v[1:2], v3
	v_rsq_f64_e32 v[3:4], v[1:2]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[21:22], v[1:2], v[3:4]
	v_mul_f64 v[3:4], v[3:4], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], -v[3:4], v[21:22], 0.5
	v_fma_f64 v[21:22], v[21:22], v[23:24], v[21:22]
	v_fma_f64 v[3:4], v[3:4], v[23:24], v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], -v[21:22], v[21:22], v[1:2]
	v_fma_f64 v[21:22], v[23:24], v[3:4], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], -v[21:22], v[21:22], v[1:2]
	v_fma_f64 v[3:4], v[23:24], v[3:4], v[21:22]
	v_cndmask_b32_e64 v21, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[1:2], 0x260
                                        ; implicit-def: $vgpr23_vgpr24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[3:4], v[3:4], v21
	v_dual_cndmask_b32 v2, v4, v2 :: v_dual_cndmask_b32 v1, v3, v1
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], 1.0
	v_mul_f64 v[29:30], v[1:2], s[10:11]
.LBB1_23:                               ; %Flow
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s17, s12
	s_cbranch_execz .LBB1_25
; %bb.24:                               ;   in Loop: Header=BB1_2 Depth=1
	v_add_f64 v[1:2], -|v[23:24]|, 1.0
	v_add_f64 v[3:4], 0x40140000, -v[3:4]
	s_mov_b32 s12, s10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[21:22], 0xc0080000, v[1:2]
	v_fma_f64 v[1:2], v[1:2], v[21:22], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[1:2]
	v_cndmask_b32_e64 v21, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v21, 8, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[1:2], v[1:2], v21
	v_rsq_f64_e32 v[21:22], v[1:2]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[23:24], v[1:2], v[21:22]
	v_mul_f64 v[21:22], v[21:22], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], -v[21:22], v[23:24], 0.5
	v_fma_f64 v[23:24], v[23:24], v[29:30], v[23:24]
	v_fma_f64 v[21:22], v[21:22], v[29:30], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], -v[23:24], v[23:24], v[1:2]
	v_fma_f64 v[23:24], v[29:30], v[21:22], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], -v[23:24], v[23:24], v[1:2]
	v_fma_f64 v[21:22], v[29:30], v[21:22], v[23:24]
	v_cndmask_b32_e64 v23, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[1:2], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_dual_cndmask_b32 v2, v22, v2 :: v_dual_cndmask_b32 v1, v21, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], -v[1:2]
	v_mul_f64 v[29:30], v[1:2], s[12:13]
.LBB1_25:                               ; %Flow138
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
.LBB1_26:                               ; %_Z5deltaRKdS0_RKiS2_.exit68
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s16
	v_mul_f64 v[1:2], v[31:32], v[29:30]
	s_add_i32 s15, s15, -1
	s_add_u32 s2, s2, 16
	s_addc_u32 s3, s3, 0
	s_add_u32 s8, s8, 16
	s_addc_u32 s9, s9, 0
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s15, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[1:2], v[27:28], v[1:2]
	v_fma_f64 v[19:20], v[1:2], v[25:26], v[19:20]
	global_store_b64 v[7:8], v[19:20], off offset:8
	s_cbranch_scc0 .LBB1_2
; %bb.27:                               ; %.preheader.loopexit
	v_mul_f64 v[0:1], v[17:18], 0.5
	s_branch .LBB1_29
.LBB1_28:
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
.LBB1_29:                               ; %Flow148
	s_load_b64 s[6:7], s[0:1], 0x10
	v_lshl_add_u32 v2, v5, 3, v5
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[11:12], 3, v[2:3]
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v14, vcc_lo, s7, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v11, v2
	s_mov_b64 s[6:7], 8
.LBB1_30:                               ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[15:16], v[13:14], off
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, _ZL3c_l@rel32@lo-4
	s_addc_u32 s9, s9, _ZL3c_l@rel32@hi+4
	s_add_u32 s8, s6, s8
	s_addc_u32 s9, s7, s9
	v_add_co_u32 v13, vcc_lo, v13, 8
	s_load_b128 s[8:11], s[8:9], 0x0
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	s_add_u32 s6, s6, 16
	s_addc_u32 s7, s7, 0
	s_cmpk_lg_i32 s6, 0x98
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f64 v[11:12], s[8:9], v[15:16], v[11:12]
	v_fma_f64 v[2:3], v[15:16], s[10:11], v[2:3]
	s_cbranch_scc1 .LBB1_30
; %bb.31:
	v_lshlrev_b64 v[4:5], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[11:12], v[0:1]
	s_add_i32 s14, s14, -5
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b64 v[13:14], v[4:5], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[11:12], null, v[13:14], v[13:14], v[0:1]
	v_div_scale_f64 v[19:20], vcc_lo, v[0:1], v[13:14], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[15:16], v[11:12]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[17:18], -v[11:12], v[15:16], 1.0
	v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[11:12], v[15:16], 1.0
	v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[17:18], v[19:20], v[15:16]
	v_fma_f64 v[11:12], -v[11:12], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[11:12], v[11:12], v[15:16], v[17:18]
	v_add_co_u32 v9, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	v_div_fixup_f64 v[0:1], v[11:12], v[13:14], v[0:1]
	global_store_b64 v[9:10], v[0:1], off
	global_load_b64 v[6:7], v[7:8], off offset:8
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(1)
	v_fma_f64 v[2:3], v[6:7], 0.5, v[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[2:3]
	v_rcp_f64_e32 v[11:12], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[6:7], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_fma_f64 v[13:14], -v[6:7], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_div_scale_f64 v[13:14], vcc_lo, v[2:3], v[4:5], v[2:3]
	v_mul_f64 v[15:16], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[6:7], v[15:16], v[13:14]
	v_div_fmas_f64 v[6:7], v[6:7], v[11:12], v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[2:3], v[6:7], v[4:5], v[2:3]
	global_store_b64 v[9:10], v[2:3], off offset:8
	v_cmpx_eq_u32_e64 s14, v33
	s_cbranch_execz .LBB1_33
; %bb.32:
	v_div_scale_f64 v[2:3], null, 0x40690000, 0x40690000, v[0:1]
	v_mov_b32_e32 v12, 0
	global_load_b64 v[6:7], v12, s[4:5]
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	v_fma_f64 v[8:9], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	v_div_scale_f64 v[8:9], vcc_lo, v[0:1], 0x40690000, v[0:1]
	v_mul_f64 v[10:11], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], -v[2:3], v[10:11], v[8:9]
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[2:3], 0x40690000, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_f64 v[0:1], v[0:1], v[6:7]
	global_store_b64 v12, v[0:1], s[4:5]
.LBB1_33:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 38
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi, .Lfunc_end1-_Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3364
; NumSgprs: 22
; NumVgprs: 38
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 38
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	_ZL3c_l,@object                 ; @_ZL3c_l
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
_ZL3c_l:
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3ff0000000000000              ; double 1
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3ff0000000000000              ; double 1
	.quad	0xbff0000000000000              ; double -1
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0xbff0000000000000              ; double -1
	.quad	0x3ff0000000000000              ; double 1
	.quad	0x3ff0000000000000              ; double 1
	.quad	0xbff0000000000000              ; double -1
	.quad	0x3ff0000000000000              ; double 1
	.quad	0xbff0000000000000              ; double -1
	.quad	0xbff0000000000000              ; double -1
	.quad	0x3ff0000000000000              ; double 1
	.quad	0xbff0000000000000              ; double -1
	.size	_ZL3c_l, 144

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11interpolatePKdS0_iS0_PdS0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11interpolatePKdS0_iS0_PdS0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     40
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         92
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         100
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         102
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         104
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         106
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         108
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         110
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         152
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 344
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z6spreadPKdPdS0_iS0_S0_S1_S0_iS1_PKi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     38
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
