/* Derived from MLIFE exercise */

#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>

#define BORN 1
#define DIES 0

#define id(r,c) ((r)*Ncolumns+(c))

/* build board */
void init(int Nrows, int Ncolumns, int **board, int **newboard, int **c_board, int **c_newboard){

  int r,c,n;

  *board    = (int*) calloc(Nrows*Ncolumns, sizeof(int));
  *newboard = (int*) calloc(Nrows*Ncolumns, sizeof(int));

  /* death at the border */
  for(r=0;r<Nrows;++r){
    (*board)[id(r,0)] = DIES;
    (*board)[id(r,Ncolumns-1)] = DIES;

    (*newboard)[id(r,0)] = DIES;
    (*newboard)[id(r,Ncolumns-1)] = DIES;
  }
  for(c=0;c<Ncolumns;++c){
    (*board)[id(0,c)] = DIES;
    (*board)[id(Nrows-1,c)] = DIES;

    (*newboard)[id(0,c)] = DIES;
    (*newboard)[id(Nrows-1,c)] = DIES;
  }

  /* random life */
  srand48(12345);
  for(r=1;r<Nrows-1;++r){
    for(c=1;c<Ncolumns-1;++c){
      double rn = drand48();
      (*board)[id(r,c)] = BORN*(rn<0.5) + DIES*(rn>=0.5);
    }
  }

  /* EX01: allocate DEVICE arrays for c_board and c_newboard here using cudaMalloc */
  cudaMalloc(c_board,    Nrows*Ncolumns*sizeof(int));
  cudaMalloc(c_newboard, Nrows*Ncolumns*sizeof(int));

  /* EX02: copy board state from HOST board to DEVICE c_board using cudaMemcpy */
  cudaMemcpy(*c_board,    *board, Nrows*Ncolumns*sizeof(int), cudaMemcpyHostToDevice);
  cudaMemcpy(*c_newboard, *newboard, Nrows*Ncolumns*sizeof(int), cudaMemcpyHostToDevice);
}

void destroy(int *board, int *newboard){
  free(board);
  free(newboard);
}

/* EX03: convert this to a CUDA kernel */
/* EX03a: annotate to indicate a kernel */
__global__ void update(int Nrows, int Ncolumns, int *board, int *newboard){

  /* EX03b: replace double loop with 2D thread array */
  /* EX03c: convert thread indices and block indices into r,c */

  int r = 1 + threadIdx.y + blockIdx.y*blockDim.y;
  int c = 1 + threadIdx.x + blockIdx.x*blockDim.x;
  
  if(r<Nrows-1 && c<Ncolumns-1){
    /* this does not change */
    int s = 
      board[id(r-1,c-1)]+board[id(r-1,c-0)]+board[id(r-1,c+1)]+
      board[id(r+0,c-1)]+                   board[id(r+0,c+1)]+
      board[id(r+1,c-1)]+board[id(r+1,c-0)]+board[id(r+1,c+1)];
    
    newboard[id(r,c)]
      = (s<2)*DIES + (s==2)*board[id(r,c)] + (s==3)*BORN + (s>3)*DIES;
  }
}

/* EX04: add a copy from DEVICE to HOST using cudaMemcpy */
void print(int Nrows, int Ncolumns, int *board, int *c_board){

  /* EX04: put cudaMemcpy here to copy from DEVICE c_board to HOST board*/
  cudaMemcpy(board, c_board, Nrows*Ncolumns*sizeof(int), cudaMemcpyDeviceToHost);

  /* No need tochange this bit */
  system("clear");
  for(int r=0;r<Nrows;++r){
    for(int c=0;c<Ncolumns;++c){
      if(board[id(r,c)]==BORN) printf("*");
      else printf(" ");
    }
    printf("\n");
  }
}


int main(int argc, char **argv){

  if(argc<3){
    printf("usage: main [Nrows] [Ncolumns]\n");
    exit(1);
  }

  /* initialize board */
  int Nrows    = atoi(argv[1]);
  int Ncolumns = atoi(argv[2]);
  int *board, *newboard;
  int *c_board, *c_newboard;
  
  init(Nrows, Ncolumns, &board, &newboard, &c_board, &c_newboard);

  /* run some iterations */
  int Nit = 100;
  for(int it=0;it<Nit;++it){
    
    /* EX05a: define thread-block size and grid size here */
    int T = 16;
    dim3 bDim(T,T,1);
    dim3 gDim((Ncolumns-2+T-1)/T, (Nrows-2+T-1)/T,1);
    
    /* EX05b: add kernel launch syntax here */
    update <<< gDim, bDim >>> (Nrows, Ncolumns, c_board, c_newboard);

    /* EX05c: add kernel launch syntax here */
    update <<< gDim, bDim >>> (Nrows, Ncolumns, c_newboard, c_board);
    
    print(Nrows, Ncolumns, board, c_board);
  }

  destroy(board, newboard);

  exit(0);
  return 0;
}

	.file	"tmpxft_00291331_00000000-6_solution.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4initiiPPiS0_S0_S0_
	.type	_Z4initiiPPiS0_S0_S0_, @function
_Z4initiiPPiS0_S0_S0_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r8, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	imull	%esi, %ebx
	movl	$4, %esi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movslq	%ebx, %rax
	movq	%r9, 8(%rsp)
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	calloc@PLT
	movq	(%rsp), %rdi
	movl	$4, %esi
	movq	%rax, (%r12)
	call	calloc@PLT
	movslq	%r13d, %rcx
	xorl	%esi, %esi
	xorl	%edi, %edi
	movq	%rax, (%r14)
	movq	%rax, %rdx
	salq	$2, %rcx
	xorl	%eax, %eax
.L3:
	addq	%rcx, %rax
	cmpl	%ebp, %edi
	jge	.L13
	movq	(%r12), %r8
	xorl	%r9d, %r9d
	incl	%edi
	movl	%r9d, (%r8,%rsi)
	movl	%r9d, -4(%r8,%rax)
	movl	%r9d, (%rdx,%rsi)
	addq	%rcx, %rsi
	movl	%r9d, -4(%rdx,%rax)
	jmp	.L3
.L13:
	decl	%ebp
	xorl	%ecx, %ecx
	movl	%ebp, %eax
	imull	%r13d, %eax
	cltq
	salq	$2, %rax
.L5:
	cmpl	%ecx, %r13d
	jle	.L14
	movq	(%r12), %rsi
	xorl	%edi, %edi
	movl	%edi, (%rsi,%rcx,4)
	movl	%edi, (%rsi,%rax)
	movl	%edi, (%rdx,%rcx,4)
	incq	%rcx
	movl	%edi, (%rdx,%rax)
	addq	$4, %rax
	jmp	.L5
.L14:
	movl	$12345, %edi
	call	srand48@PLT
	movl	%r13d, %ecx
	movl	$1, %esi
.L7:
	cmpl	%esi, %ebp
	jle	.L9
	movslq	%ecx, %rax
	movl	$1, %ebx
	salq	$2, %rax
.L10:
	leal	-1(%r13), %edi
	addq	$4, %rax
	cmpl	%ebx, %edi
	jle	.L15
	movl	%ecx, 28(%rsp)
	movq	%rax, 16(%rsp)
	movl	%esi, 24(%rsp)
	call	drand48@PLT
	xorl	%r8d, %r8d
	movq	(%r12), %rdi
	movl	28(%rsp), %ecx
	movsd	.LC0(%rip), %xmm1
	movq	16(%rsp), %rax
	movl	24(%rsp), %esi
	comisd	%xmm0, %xmm1
	seta	%r8b
	incl	%ebx
	movl	%r8d, (%rdi,%rax)
	jmp	.L10
.L15:
	incl	%esi
	addl	%r13d, %ecx
	jmp	.L7
.L9:
	movq	(%rsp), %rbx
	movq	%r15, %rdi
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	(%r12), %rsi
	movq	(%r15), %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rax
	movq	(%r14), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	(%rax), %rdi
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z4initiiPPiS0_S0_S0_, .-_Z4initiiPPiS0_S0_S0_
	.globl	_Z7destroyPiS_
	.type	_Z7destroyPiS_, @function
_Z7destroyPiS_:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rsi, %rbx
	call	free@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z7destroyPiS_, .-_Z7destroyPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"clear"
.LC2:
	.string	"*"
.LC3:
	.string	" "
.LC4:
	.string	"\n"
	.text
	.globl	_Z5printiiPiS_
	.type	_Z5printiiPiS_, @function
_Z5printiiPiS_:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	movq	%rcx, %rsi
	movl	$2, %ecx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rdx, 8(%rsp)
	movl	%edi, %edx
	movq	8(%rsp), %rdi
	imull	%ebx, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	.LC1(%rip), %rdi
	call	system@PLT
.L19:
	cmpl	%r12d, %r14d
	jge	.L18
	movq	8(%rsp), %rcx
	movslq	%r13d, %rax
	xorl	%ebp, %ebp
	leaq	(%rcx,%rax,4), %r15
.L24:
	cmpl	%ebp, %ebx
	jle	.L27
	cmpl	$1, (%r15,%rbp,4)
	leaq	.LC2(%rip), %rsi
	je	.L26
	leaq	.LC3(%rip), %rsi
.L26:
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	jmp	.L24
.L27:
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	incl	%r14d
	addl	%ebx, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L19
.L18:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z5printiiPiS_, .-_Z5printiiPiS_
	.globl	_Z29__device_stub__Z6updateiiPiS_iiPiS_
	.type	_Z29__device_stub__Z6updateiiPiS_iiPiS_, @function
_Z29__device_stub__Z6updateiiPiS_iiPiS_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6updateiiPiS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L28:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z29__device_stub__Z6updateiiPiS_iiPiS_, .-_Z29__device_stub__Z6updateiiPiS_iiPiS_
	.globl	_Z6updateiiPiS_
	.type	_Z6updateiiPiS_, @function
_Z6updateiiPiS_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6updateiiPiS_iiPiS_
	.cfi_endproc
.LFE2056:
	.size	_Z6updateiiPiS_, .-_Z6updateiiPiS_
	.section	.rodata.str1.1
.LC5:
	.string	"usage: main [Nrows] [Ncolumns]\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	jg	.L34
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	call	__printf_chk@PLT
	movl	$1, %edi
	jmp	.L41
.L34:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	movl	$100, %r14d
	movabsq	$68719476752, %r15
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movl	%ebx, %edi
	movl	%eax, %esi
	leaq	40(%rsp), %r9
	leaq	32(%rsp), %r8
	movl	%eax, %ebp
	call	_Z4initiiPPiS0_S0_S0_
	leal	13(%rbx), %eax
	movl	$16, %ecx
	cltd
	idivl	%ecx
	movl	%eax, %r12d
	leal	13(%rbp), %eax
	cltd
	idivl	%ecx
	movl	%eax, %r13d
.L37:
	movl	%r13d, 60(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movl	%r12d, 64(%rsp)
	movq	60(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r15, 48(%rsp)
	movl	$1, 56(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z29__device_stub__Z6updateiiPiS_iiPiS_
.L35:
	movl	56(%rsp), %ecx
	movq	48(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	32(%rsp), %rcx
	movq	40(%rsp), %rdx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z29__device_stub__Z6updateiiPiS_iiPiS_
.L36:
	movq	16(%rsp), %rax
	movq	32(%rsp), %rcx
	movl	%ebp, %esi
	movl	%ebx, %edi
	movq	%rax, %rdx
	movq	%rax, 8(%rsp)
	call	_Z5printiiPiS_
	decl	%r14d
	jne	.L37
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	call	_Z7destroyPiS_
	xorl	%edi, %edi
.L41:
	call	exit@PLT
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z6updateiiPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6updateiiPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1071644672
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* Derived from MLIFE exercise */

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

#define BORN 1
#define DIES 0

#define id(r,c) ((r)*Ncolumns+(c))

/* build board */
void init(int Nrows, int Ncolumns, int **board, int **newboard, int **c_board, int **c_newboard){

  int r,c,n;

  *board    = (int*) calloc(Nrows*Ncolumns, sizeof(int));
  *newboard = (int*) calloc(Nrows*Ncolumns, sizeof(int));

  /* death at the border */
  for(r=0;r<Nrows;++r){
    (*board)[id(r,0)] = DIES;
    (*board)[id(r,Ncolumns-1)] = DIES;

    (*newboard)[id(r,0)] = DIES;
    (*newboard)[id(r,Ncolumns-1)] = DIES;
  }
  for(c=0;c<Ncolumns;++c){
    (*board)[id(0,c)] = DIES;
    (*board)[id(Nrows-1,c)] = DIES;

    (*newboard)[id(0,c)] = DIES;
    (*newboard)[id(Nrows-1,c)] = DIES;
  }

  /* random life */
  srand48(12345);
  for(r=1;r<Nrows-1;++r){
    for(c=1;c<Ncolumns-1;++c){
      double rn = drand48();
      (*board)[id(r,c)] = BORN*(rn<0.5) + DIES*(rn>=0.5);
    }
  }

  /* EX01: allocate DEVICE arrays for c_board and c_newboard here using cudaMalloc */
  hipMalloc(c_board,    Nrows*Ncolumns*sizeof(int));
  hipMalloc(c_newboard, Nrows*Ncolumns*sizeof(int));

  /* EX02: copy board state from HOST board to DEVICE c_board using cudaMemcpy */
  hipMemcpy(*c_board,    *board, Nrows*Ncolumns*sizeof(int), hipMemcpyHostToDevice);
  hipMemcpy(*c_newboard, *newboard, Nrows*Ncolumns*sizeof(int), hipMemcpyHostToDevice);
}

void destroy(int *board, int *newboard){
  free(board);
  free(newboard);
}

/* EX03: convert this to a CUDA kernel */
/* EX03a: annotate to indicate a kernel */
__global__ void update(int Nrows, int Ncolumns, int *board, int *newboard){

  /* EX03b: replace double loop with 2D thread array */
  /* EX03c: convert thread indices and block indices into r,c */

  int r = 1 + threadIdx.y + blockIdx.y*blockDim.y;
  int c = 1 + threadIdx.x + blockIdx.x*blockDim.x;
  
  if(r<Nrows-1 && c<Ncolumns-1){
    /* this does not change */
    int s = 
      board[id(r-1,c-1)]+board[id(r-1,c-0)]+board[id(r-1,c+1)]+
      board[id(r+0,c-1)]+                   board[id(r+0,c+1)]+
      board[id(r+1,c-1)]+board[id(r+1,c-0)]+board[id(r+1,c+1)];
    
    newboard[id(r,c)]
      = (s<2)*DIES + (s==2)*board[id(r,c)] + (s==3)*BORN + (s>3)*DIES;
  }
}

/* EX04: add a copy from DEVICE to HOST using cudaMemcpy */
void print(int Nrows, int Ncolumns, int *board, int *c_board){

  /* EX04: put cudaMemcpy here to copy from DEVICE c_board to HOST board*/
  hipMemcpy(board, c_board, Nrows*Ncolumns*sizeof(int), hipMemcpyDeviceToHost);

  /* No need tochange this bit */
  system("clear");
  for(int r=0;r<Nrows;++r){
    for(int c=0;c<Ncolumns;++c){
      if(board[id(r,c)]==BORN) printf("*");
      else printf(" ");
    }
    printf("\n");
  }
}


int main(int argc, char **argv){

  if(argc<3){
    printf("usage: main [Nrows] [Ncolumns]\n");
    exit(1);
  }

  /* initialize board */
  int Nrows    = atoi(argv[1]);
  int Ncolumns = atoi(argv[2]);
  int *board, *newboard;
  int *c_board, *c_newboard;
  
  init(Nrows, Ncolumns, &board, &newboard, &c_board, &c_newboard);

  /* run some iterations */
  int Nit = 100;
  for(int it=0;it<Nit;++it){
    
    /* EX05a: define thread-block size and grid size here */
    int T = 16;
    dim3 bDim(T,T,1);
    dim3 gDim((Ncolumns-2+T-1)/T, (Nrows-2+T-1)/T,1);
    
    /* EX05b: add kernel launch syntax here */
    update <<< gDim, bDim >>> (Nrows, Ncolumns, c_board, c_newboard);

    /* EX05c: add kernel launch syntax here */
    update <<< gDim, bDim >>> (Nrows, Ncolumns, c_newboard, c_board);
    
    print(Nrows, Ncolumns, board, c_board);
  }

  destroy(board, newboard);

  exit(0);
  return 0;
}

	.text
	.file	"solution.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z4initiiPPiS0_S0_S0_
.LCPI0_0:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	_Z4initiiPPiS0_S0_S0_
	.type	_Z4initiiPPiS0_S0_S0_,@function
_Z4initiiPPiS0_S0_S0_:                  # @_Z4initiiPPiS0_S0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movq	%r8, 8(%rsp)                    # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r13
	movl	%esi, %ebp
	movl	%edi, %ebx
	movl	%esi, %eax
	imull	%edi, %eax
	movslq	%eax, %r15
	movl	$4, %esi
	movq	%r15, %rdi
	callq	calloc
	movq	%rax, (%r13)
	movl	$4, %esi
	movq	%r15, 16(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	callq	calloc
	movq	%r14, 24(%rsp)                  # 8-byte Spill
	movq	%rax, (%r14)
	testl	%ebx, %ebx
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph
	movq	(%r13), %rcx
	movslq	%ebp, %rdx
	movl	%ebx, %esi
	leaq	(%rcx,%rdx,4), %rdi
	addq	$-4, %rdi
	leaq	(%rax,%rdx,4), %r8
	addq	$-4, %r8
	shlq	$2, %rdx
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB0_2:                                # =>This Inner Loop Header: Depth=1
	movl	%r9d, (%rcx,%r10)
	movl	%r9d, (%rdi,%r10)
	movl	%r9d, (%rax,%r10)
	movl	%r9d, (%r8,%r10)
	addq	%rdx, %r10
	decq	%rsi
	jne	.LBB0_2
.LBB0_3:                                # %.preheader70
	testl	%ebp, %ebp
	jle	.LBB0_4
# %bb.5:                                # %.lr.ph73
	movq	(%r13), %rcx
	leal	-1(%rbx), %r14d
	movl	%r14d, %edx
	imull	%ebp, %edx
	movslq	%edx, %rdi
	movl	%ebp, %edx
	leaq	(%rcx,%rdi,4), %rsi
	leaq	(%rax,%rdi,4), %rdi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.LBB0_6:                                # =>This Inner Loop Header: Depth=1
	movl	%r8d, (%rcx,%r9,4)
	movl	%r8d, (%rsi,%r9,4)
	movl	%r8d, (%rax,%r9,4)
	movl	%r8d, (%rdi,%r9,4)
	incq	%r9
	cmpq	%r9, %rdx
	jne	.LBB0_6
	jmp	.LBB0_7
.LBB0_4:                                # %.preheader70.._crit_edge_crit_edge
	leal	-1(%rbx), %r14d
.LBB0_7:                                # %._crit_edge
	movl	$12345, %edi                    # imm = 0x3039
	callq	srand48
	cmpl	$3, %ebx
	jl	.LBB0_13
# %bb.8:                                # %.preheader.lr.ph
	leal	-1(%rbp), %eax
	movl	%r14d, %ecx
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	decq	%rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	$1, %r12d
	movl	%ebp, %r15d
.LBB0_9:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_11 Depth 2
	movq	%rbp, %r14
	cmpl	$3, %ebp
	jl	.LBB0_12
# %bb.10:                               # %.lr.ph75
                                        #   in Loop: Header=BB0_9 Depth=1
	movl	%r15d, %ebx
	incq	%rbx
	movq	40(%rsp), %rbp                  # 8-byte Reload
.LBB0_11:                               #   Parent Loop BB0_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	drand48
	xorl	%eax, %eax
	movsd	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	seta	%al
	movq	(%r13), %rcx
	movl	%eax, (%rcx,%rbx,4)
	incq	%rbx
	decq	%rbp
	jne	.LBB0_11
.LBB0_12:                               # %._crit_edge76
                                        #   in Loop: Header=BB0_9 Depth=1
	incq	%r12
	movq	%r14, %rbp
	addl	%ebp, %r15d
	cmpq	48(%rsp), %r12                  # 8-byte Folded Reload
	jne	.LBB0_9
.LBB0_13:                               # %._crit_edge78
	movq	16(%rsp), %r14                  # 8-byte Reload
	shlq	$2, %r14
	movq	8(%rsp), %r15                   # 8-byte Reload
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	(%r13), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	24(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end0:
	.size	_Z4initiiPPiS0_S0_S0_, .Lfunc_end0-_Z4initiiPPiS0_S0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7destroyPiS_                  # -- Begin function _Z7destroyPiS_
	.type	_Z7destroyPiS_,@function
_Z7destroyPiS_:                         # @_Z7destroyPiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rsi, %rbx
	callq	free
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.Lfunc_end1:
	.size	_Z7destroyPiS_, .Lfunc_end1-_Z7destroyPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__updateiiPiS_ # -- Begin function _Z21__device_stub__updateiiPiS_
	.type	_Z21__device_stub__updateiiPiS_,@function
_Z21__device_stub__updateiiPiS_:        # @_Z21__device_stub__updateiiPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6updateiiPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z21__device_stub__updateiiPiS_, .Lfunc_end2-_Z21__device_stub__updateiiPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z5printiiPiS_                  # -- Begin function _Z5printiiPiS_
	.type	_Z5printiiPiS_,@function
_Z5printiiPiS_:                         # @_Z5printiiPiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r8
	movl	%esi, %ebp
	movl	%edi, %r14d
	movl	%esi, %eax
	imull	%edi, %eax
	movslq	%eax, %rdx
	shlq	$2, %rdx
	movq	%r8, 8(%rsp)                    # 8-byte Spill
	movq	%r8, %rdi
	movq	%rcx, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str, %edi
	callq	system
	testl	%r14d, %r14d
	jle	.LBB3_8
# %bb.1:                                # %.preheader.lr.ph
	movl	%r14d, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebp, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%ebp, %ebp
	jle	.LBB3_7
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%r12d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	xorl	%r14d, %r14d
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	$1, (%rbx,%r14,4)
	movl	$42, %edi
	je	.LBB3_6
# %bb.5:                                #   in Loop: Header=BB3_4 Depth=2
	movl	$32, %edi
.LBB3_6:                                #   in Loop: Header=BB3_4 Depth=2
	callq	putchar@PLT
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB3_4
.LBB3_7:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addl	%ebp, %r12d
	cmpq	16(%rsp), %r13                  # 8-byte Folded Reload
	jne	.LBB3_2
.LBB3_8:                                # %._crit_edge19
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z5printiiPiS_, .Lfunc_end3-_Z5printiiPiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jg	.LBB4_1
# %bb.8:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.LBB4_1:
	movq	%rsi, %r15
	movabsq	$68719476752, %rbx              # imm = 0x1000000010
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r14d
	movq	16(%r15), %rdi
	callq	atoi
	movl	%eax, %r15d
	leaq	32(%rsp), %r13
	leaq	24(%rsp), %rcx
	leaq	8(%rsp), %r8
	leaq	16(%rsp), %r9
	movl	%r14d, %edi
	movl	%eax, %esi
	movq	%r13, %rdx
	callq	_Z4initiiPPiS0_S0_S0_
	leal	13(%r15), %eax
	movl	%r15d, %ecx
	addl	$28, %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	leal	13(%r14), %eax
	movl	%r14d, %r12d
	addl	$28, %r12d
	testl	%eax, %eax
	cmovnsl	%eax, %r12d
	sarl	$4, %r12d
	shlq	$32, %r12
	orq	%rcx, %r12
	movl	$100, %ebp
	movq	(%r13), %r13
.LBB4_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.3:                                #   in Loop: Header=BB4_2 Depth=1
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rcx
	movl	%r14d, %edi
	movl	%r15d, %esi
	callq	_Z21__device_stub__updateiiPiS_
.LBB4_4:                                #   in Loop: Header=BB4_2 Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_6
# %bb.5:                                #   in Loop: Header=BB4_2 Depth=1
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	%r14d, %edi
	movl	%r15d, %esi
	callq	_Z21__device_stub__updateiiPiS_
.LBB4_6:                                #   in Loop: Header=BB4_2 Depth=1
	movq	8(%rsp), %rcx
	movl	%r14d, %edi
	movl	%r15d, %esi
	movq	%r13, %rdx
	callq	_Z5printiiPiS_
	decl	%ebp
	jne	.LBB4_2
# %bb.7:
	movq	24(%rsp), %rsi
	movq	%r13, %rdi
	callq	_Z7destroyPiS_
	xorl	%edi, %edi
	callq	exit
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6updateiiPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6updateiiPiS_,@object         # @_Z6updateiiPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z6updateiiPiS_
	.p2align	3, 0x0
_Z6updateiiPiS_:
	.quad	_Z21__device_stub__updateiiPiS_
	.size	_Z6updateiiPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"clear"
	.size	.L.str, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6updateiiPiS_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"usage: main [Nrows] [Ncolumns]"
	.size	.Lstr, 31

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__updateiiPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6updateiiPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6updateiiPiS_         ; -- Begin function _Z6updateiiPiS_
	.globl	_Z6updateiiPiS_
	.p2align	8
	.type	_Z6updateiiPiS_,@function
_Z6updateiiPiS_:                        ; @_Z6updateiiPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s2, v[4:5]
	s_add_i32 s2, s4, -1
	s_add_i32 s3, s5, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 1, v2
	v_add_nc_u32_e32 v1, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	v_cmp_gt_i32_e64 s2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mul_lo_u32 v3, v2, s5
	s_load_b128 s[0:3], s[0:1], 0x8
	v_add_nc_u32_e32 v16, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v2, v3, v0
	v_add_nc_u32_e32 v4, v3, v1
	v_add_nc_u32_e32 v17, s5, v3
	v_add_nc_u32_e32 v6, v3, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v8, v0, v17
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_nc_u32_e32 v18, s5, v17
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_nc_u32_e32 v10, v17, v16
	v_add_nc_u32_e32 v12, v0, v18
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_nc_u32_e32 v14, v18, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	v_ashrrev_i32_e32 v13, 31, v12
	s_clause 0x3
	global_load_b32 v19, v[2:3], off
	global_load_b32 v20, v[4:5], off
	global_load_b32 v21, v[6:7], off
	global_load_b32 v22, v[8:9], off
	v_add_nc_u32_e32 v4, v18, v16
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_ashrrev_i32_e32 v15, 31, v14
	v_lshlrev_b64 v[2:3], 2, v[12:13]
	v_add_nc_u32_e32 v0, v17, v1
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v6, vcc_lo, s0, v10
	v_lshlrev_b64 v[8:9], 2, v[14:15]
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v11, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_clause 0x3
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[2:3], off
	global_load_b32 v8, v[8:9], off
	global_load_b32 v4, v[4:5], off
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(7)
	v_add_nc_u32_e32 v3, v20, v19
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v3, v21, v22
	s_waitcnt vmcnt(3)
	v_add3_u32 v3, v3, v6, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v3, v8, v4
	v_cmp_eq_u32_e32 vcc_lo, 2, v3
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 3, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6updateiiPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6updateiiPiS_, .Lfunc_end0-_Z6updateiiPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 608
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6updateiiPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6updateiiPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
