#include <stdio.h>
#include <stdlib.h>
#include "cuda_runtime.h"


#define THREADS_PER_BLOCK 32
#ifndef N
#define N 10
#endif

__global__ void matmul_two(float *A, float *B, float *C);
__global__ void matmul_one(float *A, float *B, float *C, int row);
void matmul_caller_two(float *A_dev, float *B_dev, float*C_dev, float *A, float *B, float *C, int size);
void matmul_caller_one(float *A_dev, float *B_dev, float *C_dev, float *A, float *B, float *C, int size);

int main()
{
	// host copies of A, B & C
	float *A, *B, *C;
	// device copies of A, B & C
	float *A_dev, *B_dev, *C_dev;


	int size = N*N*sizeof(float);

	// allocating memories on the device for the matrices
	cudaMalloc((void**)&A_dev, size);
	cudaMalloc((void**)&B_dev, size);
	cudaMalloc((void**)&C_dev, size);

	
	// allocating memory on the host for the matrices
	A = (float*)malloc(size);
	B = (float*)malloc(size);
	C = (float*)malloc(size);

	// initialise A and B
	for (int i = 0; i < N*N; ++i)
	{
		A[i] = (float)1;
		B[i] = (float)1;
		C[i] = (float)0;
	}
	int c = 2;
	if (c == 2)
	{
		matmul_caller_two(A_dev, B_dev, C_dev, A, B, C, size);
	}
	else if (c==1)
	{
		matmul_caller_one(A_dev, B_dev, C_dev, A, B, C, size);
				
	}
	else
	{
		printf("enter correct case code [1,2]!\n");
		free(A);
		free(B);
		free(C);

		cudaFree(A_dev);
		cudaFree(B_dev);
		cudaFree(C_dev);

		return 1;
	} 

 	//for (int i=0; i<N*N; i++)
	//{
	//	printf("C[%d]=%f\n",i,C[i]);
	//}
	printf("C[last]=%f\n", C[0]);
	free(A);
	free(B);
	free(C);

	cudaFree(A_dev);
	cudaFree(B_dev);
	cudaFree(C_dev);

	return 0;

}



__global__ void matmul_one(float *A, float *B, float *C, int row)
{	
	
	__shared__ float temp[THREADS_PER_BLOCK];
	//printf("N=%d\n", N);
	//printf("row = %d\n", row);
	for (int col = 0; col<N; col++) // iteration for single row of C 
	{	
		//printf("--------------col = %d----Blockid = %d-------thread = %d----\n", col, blockIdx.x, threadIdx.x);
		int index = blockIdx.x*blockDim.x + threadIdx.x; // threads compute the product of elements in row of A and column of B
		temp[threadIdx.x] = A[index + row*N]*B[col + index*N];
		//printf("temp[%d] = A[%d + %d*%d]*B[%d + %d*%d]=%f*%f=%f\n", index, index,row, N,  col, index, N, temp[index], A[index + row*N], B[col + index*N]);
		
		__syncthreads();
		
			
		if (0 == threadIdx.x)
		{
			float sum = 0;
			for (int j = 0; j < THREADS_PER_BLOCK; j++)
			{
				sum += temp[j];
		//		printf("???? temp[%d] = %f ???? blockid = %d ??????\n",j,  temp[j], blockIdx.x);
					
			}
		//	printf("???? ddot = %f ???? blockid = %d ??????\n", sum, blockIdx.x);
			atomicAdd(&C[row*N + col], sum);
			
		}
	}

}



__global__ void matmul_two(float *A, float *B, float *C)
{
	float ddot = 0;
	int row = blockIdx.y*blockDim.y + threadIdx.y;
	int col = blockIdx.x*blockDim.x + threadIdx.x;
	if (row < N && col < N)
	{
		for (int i = 0; i < N; ++i)
		{
			ddot += A[row*N + i] * B[col + i*N];
		}
	}
	C[row * N + col] = ddot;
}


void  matmul_caller_two(float *A_dev, float *B_dev, float *C_dev, float *A, float *B, float *C, int size)
{
	cudaMemcpy(A_dev, A, size, cudaMemcpyHostToDevice);
	cudaMemcpy(B_dev, B, size, cudaMemcpyHostToDevice);
	
	// First allocate 1 block in each direction of the matrix i.e. 1 block in total
	dim3 blocksPerGrid(1,1);

	dim3 threadsPerBlock(N, N);
	
 	
	// Then check if the total number of elements in the matrix is greater than 512
	// which is the maximum allowable limit of THREADS_PER_BLOCK
	if (N*N > THREADS_PER_BLOCK*THREADS_PER_BLOCK)
	{	
		threadsPerBlock.x = THREADS_PER_BLOCK;
		threadsPerBlock.y = THREADS_PER_BLOCK;
		blocksPerGrid.x = ceil((float)N/(float)threadsPerBlock.x);
		blocksPerGrid.y = ceil((float)N/(float)threadsPerBlock.y);
	
	}
	
	matmul_two<<<blocksPerGrid, threadsPerBlock>>>(A_dev, B_dev, C_dev);
	cudaMemcpy(C, C_dev, size, cudaMemcpyDeviceToHost);
	
}

void matmul_caller_one(float *A_dev, float *B_dev, float *C_dev, float *A, float *B, float *C, int size)
{	
	cudaMemcpy(B_dev, B, size, cudaMemcpyHostToDevice);
	cudaMemcpy(A_dev, A, size, cudaMemcpyHostToDevice);
	
	int num_blocks = 1;
	int num_threads = N;
	if (N > THREADS_PER_BLOCK)
	{	
		num_threads = THREADS_PER_BLOCK;
		num_blocks = ceil((float)N/(float)THREADS_PER_BLOCK);
	}
	
	for(int i=0; i<N; i++)
	{	
		matmul_one<<<num_blocks, num_threads>>>(A_dev, B_dev, C_dev, i);
	}
	
	cudaMemcpy(C, C_dev, size, cudaMemcpyDeviceToHost);

}

	.file	"tmpxft_00247bde_00000000-6_matmul_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z10matmul_onePfS_S_iPfS_S_i
	.type	_Z35__device_stub__Z10matmul_onePfS_S_iPfS_S_i, @function
_Z35__device_stub__Z10matmul_onePfS_S_iPfS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10matmul_onePfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z35__device_stub__Z10matmul_onePfS_S_iPfS_S_i, .-_Z35__device_stub__Z10matmul_onePfS_S_iPfS_S_i
	.globl	_Z10matmul_onePfS_S_i
	.type	_Z10matmul_onePfS_S_i, @function
_Z10matmul_onePfS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10matmul_onePfS_S_iPfS_S_i
	.cfi_endproc
.LFE2055:
	.size	_Z10matmul_onePfS_S_i, .-_Z10matmul_onePfS_S_i
	.globl	_Z17matmul_caller_onePfS_S_S_S_S_i
	.type	_Z17matmul_caller_onePfS_S_S_S_S_i, @function
_Z17matmul_caller_onePfS_S_S_S_S_i:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movabsq	$4294967306, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	movq	%r8, %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	movq	%r13, %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	movl	$1, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movslq	112(%rsp), %r14
	movq	%r9, 8(%rsp)
	movq	%r14, %rdx
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	movl	$1, %ecx
	movq	%r14, %rdx
	movq	%r12, %rdi
	xorl	%ebp, %ebp
	call	cudaMemcpy@PLT
.L10:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movl	%ebp, %ecx
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	_Z35__device_stub__Z10matmul_onePfS_S_iPfS_S_i
.L9:
	incl	%ebp
	cmpl	$10, %ebp
	jne	.L10
	movq	8(%rsp), %rdi
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%r14, %rdx
	movq	%rbx, %rsi
	movl	$2, %ecx
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z17matmul_caller_onePfS_S_S_S_S_i, .-_Z17matmul_caller_onePfS_S_S_S_S_i
	.globl	_Z34__device_stub__Z10matmul_twoPfS_S_PfS_S_
	.type	_Z34__device_stub__Z10matmul_twoPfS_S_PfS_S_, @function
_Z34__device_stub__Z10matmul_twoPfS_S_PfS_S_:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10matmul_twoPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z34__device_stub__Z10matmul_twoPfS_S_PfS_S_, .-_Z34__device_stub__Z10matmul_twoPfS_S_PfS_S_
	.globl	_Z10matmul_twoPfS_S_
	.type	_Z10matmul_twoPfS_S_, @function
_Z10matmul_twoPfS_S_:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10matmul_twoPfS_S_PfS_S_
	.cfi_endproc
.LFE2057:
	.size	_Z10matmul_twoPfS_S_, .-_Z10matmul_twoPfS_S_
	.globl	_Z17matmul_caller_twoPfS_S_S_S_S_i
	.type	_Z17matmul_caller_twoPfS_S_S_S_S_i, @function
_Z17matmul_caller_twoPfS_S_S_S_S_i:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r8, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	movq	%rcx, %rsi
	movl	$1, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movslq	96(%rsp), %r14
	movq	%r14, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movq	%r14, %rdx
	movq	%r15, %rsi
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$42949672970, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_Z34__device_stub__Z10matmul_twoPfS_S_PfS_S_
.L19:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%r14, %rdx
	movq	%rbx, %rsi
	movq	%r13, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	$2, %ecx
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z17matmul_caller_twoPfS_S_S_S_S_i, .-_Z17matmul_caller_twoPfS_S_S_S_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"C[last]=%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$400, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	movl	$400, %esi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$400, %edi
	call	malloc@PLT
	movl	$400, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$400, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movss	.LC0(%rip), %xmm0
	movq	%rax, %rbx
	xorl	%eax, %eax
.L22:
	movss	%xmm0, (%r12,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	addq	$4, %rax
	cmpq	$400, %rax
	jne	.L22
	xorl	%eax, %eax
	movl	$100, %ecx
	movq	%rbx, %rdi
	movq	%rbx, %r9
	rep stosl
	pushq	%rax
	.cfi_def_cfa_offset 72
	movq	%rbp, %r8
	movq	%r12, %rcx
	pushq	$400
	.cfi_def_cfa_offset 80
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rdx
	call	_Z17matmul_caller_twoPfS_S_S_S_S_i
	popq	%rdx
	.cfi_def_cfa_offset 72
	leaq	.LC1(%rip), %rsi
	popq	%rcx
	.cfi_def_cfa_offset 64
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%rbx), %xmm0
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z10matmul_twoPfS_S_"
.LC3:
	.string	"_Z10matmul_onePfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10matmul_twoPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10matmul_onePfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include "hip/hip_runtime.h"


#define THREADS_PER_BLOCK 32
#ifndef N
#define N 10
#endif

__global__ void matmul_two(float *A, float *B, float *C);
__global__ void matmul_one(float *A, float *B, float *C, int row);
void matmul_caller_two(float *A_dev, float *B_dev, float*C_dev, float *A, float *B, float *C, int size);
void matmul_caller_one(float *A_dev, float *B_dev, float *C_dev, float *A, float *B, float *C, int size);

int main()
{
	// host copies of A, B & C
	float *A, *B, *C;
	// device copies of A, B & C
	float *A_dev, *B_dev, *C_dev;


	int size = N*N*sizeof(float);

	// allocating memories on the device for the matrices
	hipMalloc((void**)&A_dev, size);
	hipMalloc((void**)&B_dev, size);
	hipMalloc((void**)&C_dev, size);

	
	// allocating memory on the host for the matrices
	A = (float*)malloc(size);
	B = (float*)malloc(size);
	C = (float*)malloc(size);

	// initialise A and B
	for (int i = 0; i < N*N; ++i)
	{
		A[i] = (float)1;
		B[i] = (float)1;
		C[i] = (float)0;
	}
	int c = 2;
	if (c == 2)
	{
		matmul_caller_two(A_dev, B_dev, C_dev, A, B, C, size);
	}
	else if (c==1)
	{
		matmul_caller_one(A_dev, B_dev, C_dev, A, B, C, size);
				
	}
	else
	{
		printf("enter correct case code [1,2]!\n");
		free(A);
		free(B);
		free(C);

		hipFree(A_dev);
		hipFree(B_dev);
		hipFree(C_dev);

		return 1;
	} 

 	//for (int i=0; i<N*N; i++)
	//{
	//	printf("C[%d]=%f\n",i,C[i]);
	//}
	printf("C[last]=%f\n", C[0]);
	free(A);
	free(B);
	free(C);

	hipFree(A_dev);
	hipFree(B_dev);
	hipFree(C_dev);

	return 0;

}



__global__ void matmul_one(float *A, float *B, float *C, int row)
{	
	
	__shared__ float temp[THREADS_PER_BLOCK];
	//printf("N=%d\n", N);
	//printf("row = %d\n", row);
	for (int col = 0; col<N; col++) // iteration for single row of C 
	{	
		//printf("--------------col = %d----Blockid = %d-------thread = %d----\n", col, blockIdx.x, threadIdx.x);
		int index = blockIdx.x*blockDim.x + threadIdx.x; // threads compute the product of elements in row of A and column of B
		temp[threadIdx.x] = A[index + row*N]*B[col + index*N];
		//printf("temp[%d] = A[%d + %d*%d]*B[%d + %d*%d]=%f*%f=%f\n", index, index,row, N,  col, index, N, temp[index], A[index + row*N], B[col + index*N]);
		
		__syncthreads();
		
			
		if (0 == threadIdx.x)
		{
			float sum = 0;
			for (int j = 0; j < THREADS_PER_BLOCK; j++)
			{
				sum += temp[j];
		//		printf("???? temp[%d] = %f ???? blockid = %d ??????\n",j,  temp[j], blockIdx.x);
					
			}
		//	printf("???? ddot = %f ???? blockid = %d ??????\n", sum, blockIdx.x);
			atomicAdd(&C[row*N + col], sum);
			
		}
	}

}



__global__ void matmul_two(float *A, float *B, float *C)
{
	float ddot = 0;
	int row = blockIdx.y*blockDim.y + threadIdx.y;
	int col = blockIdx.x*blockDim.x + threadIdx.x;
	if (row < N && col < N)
	{
		for (int i = 0; i < N; ++i)
		{
			ddot += A[row*N + i] * B[col + i*N];
		}
	}
	C[row * N + col] = ddot;
}


void  matmul_caller_two(float *A_dev, float *B_dev, float *C_dev, float *A, float *B, float *C, int size)
{
	hipMemcpy(A_dev, A, size, hipMemcpyHostToDevice);
	hipMemcpy(B_dev, B, size, hipMemcpyHostToDevice);
	
	// First allocate 1 block in each direction of the matrix i.e. 1 block in total
	dim3 blocksPerGrid(1,1);

	dim3 threadsPerBlock(N, N);
	
 	
	// Then check if the total number of elements in the matrix is greater than 512
	// which is the maximum allowable limit of THREADS_PER_BLOCK
	if (N*N > THREADS_PER_BLOCK*THREADS_PER_BLOCK)
	{	
		threadsPerBlock.x = THREADS_PER_BLOCK;
		threadsPerBlock.y = THREADS_PER_BLOCK;
		blocksPerGrid.x = ceil((float)N/(float)threadsPerBlock.x);
		blocksPerGrid.y = ceil((float)N/(float)threadsPerBlock.y);
	
	}
	
	matmul_two<<<blocksPerGrid, threadsPerBlock>>>(A_dev, B_dev, C_dev);
	hipMemcpy(C, C_dev, size, hipMemcpyDeviceToHost);
	
}

void matmul_caller_one(float *A_dev, float *B_dev, float *C_dev, float *A, float *B, float *C, int size)
{	
	hipMemcpy(B_dev, B, size, hipMemcpyHostToDevice);
	hipMemcpy(A_dev, A, size, hipMemcpyHostToDevice);
	
	int num_blocks = 1;
	int num_threads = N;
	if (N > THREADS_PER_BLOCK)
	{	
		num_threads = THREADS_PER_BLOCK;
		num_blocks = ceil((float)N/(float)THREADS_PER_BLOCK);
	}
	
	for(int i=0; i<N; i++)
	{	
		matmul_one<<<num_blocks, num_threads>>>(A_dev, B_dev, C_dev, i);
	}
	
	hipMemcpy(C, C_dev, size, hipMemcpyDeviceToHost);

}

	.text
	.file	"matmul_cuda.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	movl	$400, %edi                      # imm = 0x190
	callq	malloc
	movq	%rax, %rbx
	movl	$400, %edi                      # imm = 0x190
	callq	malloc
	movq	%rax, %r14
	movl	$1, %edi
	movl	$400, %esi                      # imm = 0x190
	callq	calloc@PLT
	movq	%rax, %r15
	xorl	%eax, %eax
	movl	$1065353216, %ecx               # imm = 0x3F800000
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rbx,%rax,4)
	movl	%ecx, (%r14,%rax,4)
	incq	%rax
	cmpq	$100, %rax
	jne	.LBB0_1
# %bb.2:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$400, (%rsp)                    # imm = 0x190
	movq	%rbx, %rcx
	movq	%r14, %r8
	movq	%r15, %r9
	callq	_Z17matmul_caller_twoPfS_S_S_S_S_i
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z17matmul_caller_twoPfS_S_S_S_S_i # -- Begin function _Z17matmul_caller_twoPfS_S_S_S_S_i
	.type	_Z17matmul_caller_twoPfS_S_S_S_S_i,@function
_Z17matmul_caller_twoPfS_S_S_S_S_i:     # @_Z17matmul_caller_twoPfS_S_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %rbp
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %r13
	movslq	64(%rsp), %r15
	movq	%rcx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$42949672970, %rdx              # imm = 0xA0000000A
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	callq	_Z25__device_stub__matmul_twoPfS_S_
.LBB1_2:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$2, %ecx
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end1:
	.size	_Z17matmul_caller_twoPfS_S_S_S_S_i, .Lfunc_end1-_Z17matmul_caller_twoPfS_S_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z17matmul_caller_onePfS_S_S_S_S_i # -- Begin function _Z17matmul_caller_onePfS_S_S_S_S_i
	.type	_Z17matmul_caller_onePfS_S_S_S_S_i,@function
_Z17matmul_caller_onePfS_S_S_S_S_i:     # @_Z17matmul_caller_onePfS_S_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %r13
	movslq	80(%rsp), %r15
	movabsq	$4294967297, %rbp               # imm = 0x100000001
	movq	%rsi, %rdi
	movq	%r8, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r13, %rdi
	movq	%rbx, %rsi
	movq	%r15, 8(%rsp)                   # 8-byte Spill
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
	leaq	9(%rbp), %r15
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__matmul_onePfS_S_i
.LBB2_3:                                #   in Loop: Header=BB2_1 Depth=1
	incl	%ebx
	cmpl	$10, %ebx
	jne	.LBB2_1
# %bb.4:
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rsi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	$2, %ecx
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end2:
	.size	_Z17matmul_caller_onePfS_S_S_S_S_i, .Lfunc_end2-_Z17matmul_caller_onePfS_S_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__matmul_onePfS_S_i # -- Begin function _Z25__device_stub__matmul_onePfS_S_i
	.type	_Z25__device_stub__matmul_onePfS_S_i,@function
_Z25__device_stub__matmul_onePfS_S_i:   # @_Z25__device_stub__matmul_onePfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10matmul_onePfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__matmul_onePfS_S_i, .Lfunc_end3-_Z25__device_stub__matmul_onePfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__matmul_twoPfS_S_ # -- Begin function _Z25__device_stub__matmul_twoPfS_S_
	.type	_Z25__device_stub__matmul_twoPfS_S_,@function
_Z25__device_stub__matmul_twoPfS_S_:    # @_Z25__device_stub__matmul_twoPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10matmul_twoPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__matmul_twoPfS_S_, .Lfunc_end4-_Z25__device_stub__matmul_twoPfS_S_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10matmul_onePfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10matmul_twoPfS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"C[last]=%f\n"
	.size	.L.str.1, 12

	.type	_Z10matmul_onePfS_S_i,@object   # @_Z10matmul_onePfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10matmul_onePfS_S_i
	.p2align	3, 0x0
_Z10matmul_onePfS_S_i:
	.quad	_Z25__device_stub__matmul_onePfS_S_i
	.size	_Z10matmul_onePfS_S_i, 8

	.type	_Z10matmul_twoPfS_S_,@object    # @_Z10matmul_twoPfS_S_
	.globl	_Z10matmul_twoPfS_S_
	.p2align	3, 0x0
_Z10matmul_twoPfS_S_:
	.quad	_Z25__device_stub__matmul_twoPfS_S_
	.size	_Z10matmul_twoPfS_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10matmul_onePfS_S_i"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10matmul_twoPfS_S_"
	.size	.L__unnamed_2, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__matmul_onePfS_S_i
	.addrsig_sym _Z25__device_stub__matmul_twoPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10matmul_onePfS_S_i
	.addrsig_sym _Z10matmul_twoPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10matmul_onePfS_S_i   ; -- Begin function _Z10matmul_onePfS_S_i
	.globl	_Z10matmul_onePfS_S_i
	.p2align	8
	.type	_Z10matmul_onePfS_S_i,@function
_Z10matmul_onePfS_S_i:                  ; @_Z10matmul_onePfS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v4, 2, v0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_mov_b32_e32 v6, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s8, s8, 10
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, s8, v1
	v_mul_lo_u32 v5, v1, 10
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v0, s0, s4, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, s5, v3, s0
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;     Child Loop BB0_6 Depth 2
	v_add_nc_u32_e32 v2, s1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s6, v2
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	global_load_b32 v7, v[0:1], off
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, v7, v2
	ds_store_b32 v4, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.2:                                ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0
.LBB0_3:                                ; %.preheader
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v3, s0
	s_add_i32 s0, s0, 4
	s_cmpk_eq_i32 s0, 0x80
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v3, s10, 0
	v_cmp_eq_u32_e64 s0, 0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s0
	s_mov_b32 exec_lo, s0
	s_cbranch_execz .LBB0_7
; %bb.5:                                ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s4, s1, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s5, s4, 31
	s_lshl_b64 s[4:5], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s2, s4
	s_addc_u32 s5, s3, s5
	s_bcnt1_i32_b32 s0, s10
	global_load_b32 v3, v6, s[4:5]
	v_cvt_f32_ubyte0_e32 v7, s0
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v7, v2, v7
.LBB0_6:                                ; %atomicrmw.start
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, v3, v7
	global_atomic_cmpswap_b32 v2, v6, v[2:3], s[4:5] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s10, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_6
.LBB0_7:                                ; %Flow35
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_add_i32 s1, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s1, 10
	s_cbranch_scc0 .LBB0_1
; %bb.8:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10matmul_onePfS_S_i
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10matmul_onePfS_S_i, .Lfunc_end0-_Z10matmul_onePfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 440
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10matmul_twoPfS_S_    ; -- Begin function _Z10matmul_twoPfS_S_
	.globl	_Z10matmul_twoPfS_S_
	.p2align	8
	.type	_Z10matmul_twoPfS_S_,@function
_Z10matmul_twoPfS_S_:                   ; @_Z10matmul_twoPfS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[3:4], null, s15, s3, v[1:2]
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mul_lo_u32 v1, v3, 10
	v_max_i32_e32 v2, v3, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 10, v2
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.preheader.preheader
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v4, 0
	s_mov_b64 s[2:3], 0
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v3, vcc_lo
	v_mov_b32_e32 v2, v0
.LBB1_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v7, vcc_lo, v5, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v6, vcc_lo
	v_lshlrev_b64 v[9:10], 2, v[2:3]
	v_add_nc_u32_e32 v2, 10, v2
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 40
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_load_b32 v3, v[7:8], off
	global_load_b32 v7, v[9:10], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v3, v7
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %Flow37
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10matmul_twoPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10matmul_twoPfS_S_, .Lfunc_end1-_Z10matmul_twoPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10matmul_onePfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10matmul_onePfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10matmul_twoPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10matmul_twoPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
