#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>

// RG*RG*MAXN must fit within mytype

#define MAXN 100000
#define RG 10
#define USECPSEC 1000000ULL
#define nTPB 256
#define DSIZE 8192


//cuda error checking macros
#ifdef DEBUG
#define CUDA_CALL(F)  if( (F) != cudaSuccess ) \
  {printf("Error %s at %s:%d\n", cudaGetErrorString(cudaGetLastError()), \
   __FILE__,__LINE__); exit(-1);} 
#define CUDA_CHECK()  if( (cudaPeekAtLastError()) != cudaSuccess ) \
  {printf("Error %s at %s:%d\n", cudaGetErrorString(cudaGetLastError()), \
   __FILE__,__LINE__-1); exit(-1);} 
#else
#define CUDA_CALL(F) (F)
#define CUDA_CHECK() 
#endif


typedef float mytype;
// host function to compute convolution reference results
void conv(const mytype *A, const mytype *B, mytype* C, int N) {

    for (int j = 0; j < ((2*N)-1); ++j){ // iterate over columns of result
        mytype my_sum = 0;
        for (int i = 0; i < N; ++i)  // iterate down each column
          if (((j < N) && (i <= j)) || ((j >= N) && (i > (j-N)))) my_sum += A[i]*B[j-i];
        C[j] = my_sum;}
}
// host function - alternate realization
void conv2(const mytype *A, const mytype *B, mytype* C, int N) {

    for (int i = 0; i < N; ++i)
        for (int j = 0; j < N; ++j)
            C[i + j] += A[i] * B[j];
}
// timing measurement function
unsigned long long dtime_usec(unsigned long long prev){
  timeval tv1;
  gettimeofday(&tv1,0);
  return ((tv1.tv_sec * USECPSEC)+tv1.tv_usec) - prev;
}
// convolution GPU kernel
// Task 1
__global__ void conv_Kernel(const mytype * __restrict__ A, const mytype * __restrict__ B, mytype *C, const int N){
    int idx = threadIdx.x+blockDim.x*blockIdx.x;
    if (idx < (2*N)-1){
      mytype my_sum = 0;
// create a for-loop below to sum the products in a single column in Diagram 1
      for (int i = 0; i < N; i++)
        if (((idx < N) && (i <= idx)) || ((idx >= N) && (i > (idx-N)))) my_sum += A[i]*B[idx-i];
      C[idx] = my_sum;
    }
}


int main(int argc, char *argv[]){

  mytype *d_A, *A, *d_B, *B, *d_C, *C, *h_C;
  int my_N = DSIZE;
  if ((my_N < 1) || (my_N > MAXN)) {printf("N out of range\n"); return 1;}
// allocate host data
  A   = (mytype *)malloc(my_N*sizeof(mytype));
  B   = (mytype *)malloc(my_N*sizeof(mytype));
  C   = (mytype *)malloc(((2*my_N)-1)*sizeof(mytype));
  h_C = (mytype *)malloc(((2*my_N)-1)*sizeof(mytype));
// allocate device data
  CUDA_CALL(cudaMalloc(&d_A, my_N*sizeof(mytype)));
  CUDA_CALL(cudaMalloc(&d_B, my_N*sizeof(mytype)));
  CUDA_CALL(cudaMalloc(&d_C, ((2*my_N)-1)*sizeof(mytype)));
//initialize host input data
  for (int i=0; i < my_N; i++){
    A[i] = rand()%RG;
    B[i] = rand()%RG;}
//zero out host result data
  for (int i=0; i < (2*my_N)-1; i++){
    C[i]   = 0;
    h_C[i] = 0;}
//begin timing for host reference function
  unsigned long cpu_time = dtime_usec(0);
  conv(A, B, C, my_N);
  cpu_time = dtime_usec(cpu_time);
//initialize device result data
  CUDA_CALL(cudaMemset(d_C, 0, ((2*my_N)-1)*sizeof(mytype)));
//begin timing for host reference function
  unsigned long gpu_time = dtime_usec(0);
//copy host input data to device
  CUDA_CALL(cudaMemcpy(d_A, A, my_N*sizeof(mytype), cudaMemcpyHostToDevice));
  CUDA_CALL(cudaMemcpy(d_B, B, my_N*sizeof(mytype), cudaMemcpyHostToDevice));
//run convolution kernel on GPU
  conv_Kernel<<<(((2*my_N)-1)+nTPB-1)/nTPB,nTPB>>>(d_A, d_B, d_C, my_N);
  CUDA_CHECK();
//copy results from device to host
  CUDA_CALL(cudaMemcpy(h_C, d_C, ((2*my_N)-1)*sizeof(mytype), cudaMemcpyDeviceToHost));
  gpu_time = dtime_usec(gpu_time);
//check validity of results
  for (int i = 0; i < ((2*my_N)-1); i++) if (C[i] != h_C[i]) {printf("FAIL at %d, cpu: %f, gpu %f\n", i, C[i], h_C[i]); return 1;}
//print timing and speed comparison
  printf("PASS.  cpu time: %lu us, gpu time: %lu us\n", cpu_time, gpu_time);
  printf("Speedup: cpu/gpu = %f\n", cpu_time/(float)gpu_time);
//all host and device allocated data will be implicitly freed at program termination
  return 0;
}

	.file	"tmpxft_00217116_00000000-6_task1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4convPKfS0_Pfi
	.type	_Z4convPKfS0_Pfi, @function
_Z4convPKfS0_Pfi:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	leal	-1(%rcx,%rcx), %r11d
	movq	%rdi, %r8
	movq	%rsi, %r9
	movl	%eax, %edi
	cmpl	%eax, %r11d
	jg	.L17
	ret
.L17:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L8:
	movl	%eax, %ebx
	xorl	%esi, %esi
	xorps	%xmm0, %xmm0
	subl	%ecx, %ebx
.L7:
	movl	%esi, %r10d
	cmpl	%edi, %ecx
	jle	.L14
	cmpl	%esi, %edi
	jge	.L4
	cmpl	%edi, %ecx
	jg	.L6
.L14:
	cmpl	%ebx, %r10d
	jle	.L6
.L4:
	movl	%eax, %r10d
	subl	%esi, %r10d
	movslq	%r10d, %r10
	movss	(%r9,%r10,4), %xmm1
	mulss	(%r8,%rsi,4), %xmm1
	addss	%xmm1, %xmm0
.L6:
	incq	%rsi
	cmpl	%esi, %ecx
	jg	.L7
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	movl	%eax, %edi
	cmpl	%eax, %r11d
	jg	.L8
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z4convPKfS0_Pfi, .-_Z4convPKfS0_Pfi
	.globl	_Z5conv2PKfS0_Pfi
	.type	_Z5conv2PKfS0_Pfi, @function
_Z5conv2PKfS0_Pfi:
.LFB2028:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L20:
	cmpl	%eax, %ecx
	jle	.L24
	leaq	(%rdx,%rax,4), %r9
	xorl	%r8d, %r8d
.L21:
	movss	(%rdi,%rax,4), %xmm0
	mulss	(%rsi,%r8,4), %xmm0
	incq	%r8
	addq	$4, %r9
	addss	-4(%r9), %xmm0
	movss	%xmm0, -4(%r9)
	cmpl	%r8d, %ecx
	jg	.L21
	incq	%rax
	jmp	.L20
.L24:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z5conv2PKfS0_Pfi, .-_Z5conv2PKfS0_Pfi
	.globl	_Z10dtime_usecy
	.type	_Z10dtime_usecy, @function
_Z10dtime_usecy:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%esi, %esi
	movq	%rdi, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	imulq	$1000000, 8(%rsp), %rax
	addq	16(%rsp), %rax
	subq	%rbx, %rax
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10dtime_usecy, .-_Z10dtime_usecy
	.globl	_Z38__device_stub__Z11conv_KernelPKfS0_PfiPKfS0_Pfi
	.type	_Z38__device_stub__Z11conv_KernelPKfS0_PfiPKfS0_Pfi, @function
_Z38__device_stub__Z11conv_KernelPKfS0_PfiPKfS0_Pfi:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rsi, 32(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11conv_KernelPKfS0_Pfi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L28:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z38__device_stub__Z11conv_KernelPKfS0_PfiPKfS0_Pfi, .-_Z38__device_stub__Z11conv_KernelPKfS0_PfiPKfS0_Pfi
	.globl	_Z11conv_KernelPKfS0_Pfi
	.type	_Z11conv_KernelPKfS0_Pfi, @function
_Z11conv_KernelPKfS0_Pfi:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z11conv_KernelPKfS0_PfiPKfS0_Pfi
	.cfi_endproc
.LFE2056:
	.size	_Z11conv_KernelPKfS0_Pfi, .-_Z11conv_KernelPKfS0_Pfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"FAIL at %d, cpu: %f, gpu %f\n"
.LC2:
	.string	"PASS.  cpu time: %lu us, gpu time: %lu us\n"
.LC3:
	.string	"Speedup: cpu/gpu = %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$32768, %edi
	movl	$10, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$32768, %edi
	movq	%rax, %r14
	call	malloc@PLT
	movl	$65532, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$65532, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$32768, %esi
	movq	%rax, %r13
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$32768, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$65532, %esi
	call	cudaMalloc@PLT
.L34:
	call	rand@PLT
	cltd
	idivl	%r15d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r14,%rbp)
	call	rand@PLT
	cltd
	idivl	%r15d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rbx,%rbp)
	addq	$4, %rbp
	cmpq	$32768, %rbp
	jne	.L34
	xorl	%eax, %eax
	movl	$16383, %ecx
	movq	%r12, %rdi
	rep stosl
	movl	$16383, %ecx
	movq	%r13, %rdi
	rep stosl
	xorl	%edi, %edi
	call	_Z10dtime_usecy
	movl	$8192, %ecx
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movq	%rax, %rbp
	movq	%r14, %rdi
	call	_Z4convPKfS0_Pfi
	movq	%rbp, %rdi
	call	_Z10dtime_usecy
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movl	$65532, %edx
	movq	%rax, %rbp
	call	cudaMemset@PLT
	xorl	%edi, %edi
	call	_Z10dtime_usecy
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$32768, %edx
	movq	%rax, %r15
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$32768, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$67108865, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$6, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$8192, %ecx
	movq	8(%rsp), %rdi
	call	_Z38__device_stub__Z11conv_KernelPKfS0_PfiPKfS0_Pfi
.L35:
	movq	24(%rsp), %rsi
	movl	$65532, %edx
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	%r15, %rdi
	call	_Z10dtime_usecy
	xorl	%edx, %edx
	movq	%rax, %rbx
.L39:
	movss	(%r12,%rdx,4), %xmm0
	movss	0(%r13,%rdx,4), %xmm1
	ucomiss	%xmm1, %xmm0
	jp	.L45
	je	.L36
.L45:
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L33
.L36:
	incq	%rdx
	cmpq	$16383, %rdx
	jne	.L39
	xorl	%eax, %eax
	movq	%rbx, %rcx
	movq	%rbp, %rdx
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	call	__printf_chk@PLT
	testq	%rbp, %rbp
	js	.L40
	cvtsi2ssq	%rbp, %xmm0
	jmp	.L41
.L40:
	movq	%rbp, %rax
	andl	$1, %ebp
	shrq	%rax
	orq	%rbp, %rax
	cvtsi2ssq	%rax, %xmm0
	addss	%xmm0, %xmm0
.L41:
	testq	%rbx, %rbx
	js	.L42
	cvtsi2ssq	%rbx, %xmm1
	jmp	.L43
.L42:
	movq	%rbx, %rax
	andl	$1, %ebx
	shrq	%rax
	orq	%rbx, %rax
	cvtsi2ssq	%rax, %xmm1
	addss	%xmm1, %xmm1
.L43:
	divss	%xmm1, %xmm0
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L33:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z11conv_KernelPKfS0_Pfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11conv_KernelPKfS0_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>

// RG*RG*MAXN must fit within mytype

#define MAXN 100000
#define RG 10
#define USECPSEC 1000000ULL
#define nTPB 256
#define DSIZE 8192


//cuda error checking macros
#ifdef DEBUG
#define CUDA_CALL(F)  if( (F) != hipSuccess ) \
  {printf("Error %s at %s:%d\n", hipGetErrorString(hipGetLastError()), \
   __FILE__,__LINE__); exit(-1);} 
#define CUDA_CHECK()  if( (hipPeekAtLastError()) != hipSuccess ) \
  {printf("Error %s at %s:%d\n", hipGetErrorString(hipGetLastError()), \
   __FILE__,__LINE__-1); exit(-1);} 
#else
#define CUDA_CALL(F) (F)
#define CUDA_CHECK() 
#endif


typedef float mytype;
// host function to compute convolution reference results
void conv(const mytype *A, const mytype *B, mytype* C, int N) {

    for (int j = 0; j < ((2*N)-1); ++j){ // iterate over columns of result
        mytype my_sum = 0;
        for (int i = 0; i < N; ++i)  // iterate down each column
          if (((j < N) && (i <= j)) || ((j >= N) && (i > (j-N)))) my_sum += A[i]*B[j-i];
        C[j] = my_sum;}
}
// host function - alternate realization
void conv2(const mytype *A, const mytype *B, mytype* C, int N) {

    for (int i = 0; i < N; ++i)
        for (int j = 0; j < N; ++j)
            C[i + j] += A[i] * B[j];
}
// timing measurement function
unsigned long long dtime_usec(unsigned long long prev){
  timeval tv1;
  gettimeofday(&tv1,0);
  return ((tv1.tv_sec * USECPSEC)+tv1.tv_usec) - prev;
}
// convolution GPU kernel
// Task 1
__global__ void conv_Kernel(const mytype * __restrict__ A, const mytype * __restrict__ B, mytype *C, const int N){
    int idx = threadIdx.x+blockDim.x*blockIdx.x;
    if (idx < (2*N)-1){
      mytype my_sum = 0;
// create a for-loop below to sum the products in a single column in Diagram 1
      for (int i = 0; i < N; i++)
        if (((idx < N) && (i <= idx)) || ((idx >= N) && (i > (idx-N)))) my_sum += A[i]*B[idx-i];
      C[idx] = my_sum;
    }
}


int main(int argc, char *argv[]){

  mytype *d_A, *A, *d_B, *B, *d_C, *C, *h_C;
  int my_N = DSIZE;
  if ((my_N < 1) || (my_N > MAXN)) {printf("N out of range\n"); return 1;}
// allocate host data
  A   = (mytype *)malloc(my_N*sizeof(mytype));
  B   = (mytype *)malloc(my_N*sizeof(mytype));
  C   = (mytype *)malloc(((2*my_N)-1)*sizeof(mytype));
  h_C = (mytype *)malloc(((2*my_N)-1)*sizeof(mytype));
// allocate device data
  CUDA_CALL(hipMalloc(&d_A, my_N*sizeof(mytype)));
  CUDA_CALL(hipMalloc(&d_B, my_N*sizeof(mytype)));
  CUDA_CALL(hipMalloc(&d_C, ((2*my_N)-1)*sizeof(mytype)));
//initialize host input data
  for (int i=0; i < my_N; i++){
    A[i] = rand()%RG;
    B[i] = rand()%RG;}
//zero out host result data
  for (int i=0; i < (2*my_N)-1; i++){
    C[i]   = 0;
    h_C[i] = 0;}
//begin timing for host reference function
  unsigned long cpu_time = dtime_usec(0);
  conv(A, B, C, my_N);
  cpu_time = dtime_usec(cpu_time);
//initialize device result data
  CUDA_CALL(hipMemset(d_C, 0, ((2*my_N)-1)*sizeof(mytype)));
//begin timing for host reference function
  unsigned long gpu_time = dtime_usec(0);
//copy host input data to device
  CUDA_CALL(hipMemcpy(d_A, A, my_N*sizeof(mytype), hipMemcpyHostToDevice));
  CUDA_CALL(hipMemcpy(d_B, B, my_N*sizeof(mytype), hipMemcpyHostToDevice));
//run convolution kernel on GPU
  conv_Kernel<<<(((2*my_N)-1)+nTPB-1)/nTPB,nTPB>>>(d_A, d_B, d_C, my_N);
  CUDA_CHECK();
//copy results from device to host
  CUDA_CALL(hipMemcpy(h_C, d_C, ((2*my_N)-1)*sizeof(mytype), hipMemcpyDeviceToHost));
  gpu_time = dtime_usec(gpu_time);
//check validity of results
  for (int i = 0; i < ((2*my_N)-1); i++) if (C[i] != h_C[i]) {printf("FAIL at %d, cpu: %f, gpu %f\n", i, C[i], h_C[i]); return 1;}
//print timing and speed comparison
  printf("PASS.  cpu time: %lu us, gpu time: %lu us\n", cpu_time, gpu_time);
  printf("Speedup: cpu/gpu = %f\n", cpu_time/(float)gpu_time);
//all host and device allocated data will be implicitly freed at program termination
  return 0;
}

	.text
	.file	"task1.hip"
	.globl	_Z4convPKfS0_Pfi                # -- Begin function _Z4convPKfS0_Pfi
	.type	_Z4convPKfS0_Pfi,@function
_Z4convPKfS0_Pfi:                       # @_Z4convPKfS0_Pfi
	.cfi_startproc
# %bb.0:
                                        # kill: def $ecx killed $ecx def $rcx
	testl	%ecx, %ecx
	jle	.LBB0_8
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	leal	-1(,%rcx,2), %r8d
	movl	%ecx, %eax
	cmpl	$2, %r8d
	movl	$1, %ecx
	cmovgel	%r8d, %ecx
	xorl	%r8d, %r8d
.LBB0_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	movq	%r8, %r9
	subq	%rax, %r9
	xorps	%xmm0, %xmm0
	movq	%rsi, %r10
	xorl	%r11d, %r11d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%ebx, %ebx
	cmpq	%r8, %r11
	setbe	%bl
	xorl	%ebp, %ebp
	cmpq	%r9, %r11
	setg	%bpl
	cmpq	%rax, %r8
	cmovbl	%ebx, %ebp
	cmpb	$1, %bpl
	jne	.LBB0_5
# %bb.4:                                #   in Loop: Header=BB0_3 Depth=2
	movss	(%rdi,%r11,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r10), %xmm1
	addss	%xmm1, %xmm0
.LBB0_5:                                #   in Loop: Header=BB0_3 Depth=2
	incq	%r11
	addq	$-4, %r10
	cmpq	%r11, %rax
	jne	.LBB0_3
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movss	%xmm0, (%rdx,%r8,4)
	incq	%r8
	addq	$4, %rsi
	cmpq	%rcx, %r8
	jne	.LBB0_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %rbp
.LBB0_8:                                # %._crit_edge32
	retq
.Lfunc_end0:
	.size	_Z4convPKfS0_Pfi, .Lfunc_end0-_Z4convPKfS0_Pfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z5conv2PKfS0_Pfi               # -- Begin function _Z5conv2PKfS0_Pfi
	.type	_Z5conv2PKfS0_Pfi,@function
_Z5conv2PKfS0_Pfi:                      # @_Z5conv2PKfS0_Pfi
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB1_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%ecx, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	xorl	%r8d, %r8d
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	(%rsi,%r8,4), %xmm0
	addss	(%rdx,%r8,4), %xmm0
	movss	%xmm0, (%rdx,%r8,4)
	incq	%r8
	cmpq	%r8, %rax
	jne	.LBB1_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%rcx
	addq	$4, %rdx
	cmpq	%rax, %rcx
	jne	.LBB1_2
.LBB1_5:                                # %._crit_edge16
	retq
.Lfunc_end1:
	.size	_Z5conv2PKfS0_Pfi, .Lfunc_end1-_Z5conv2PKfS0_Pfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10dtime_usecy                 # -- Begin function _Z10dtime_usecy
	.type	_Z10dtime_usecy,@function
_Z10dtime_usecy:                        # @_Z10dtime_usecy
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	imulq	$1000000, (%r14), %rcx          # imm = 0xF4240
	movq	8(%r14), %rax
	subq	%rbx, %rax
	addq	%rcx, %rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10dtime_usecy, .Lfunc_end2-_Z10dtime_usecy
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__conv_KernelPKfS0_Pfi # -- Begin function _Z26__device_stub__conv_KernelPKfS0_Pfi
	.type	_Z26__device_stub__conv_KernelPKfS0_Pfi,@function
_Z26__device_stub__conv_KernelPKfS0_Pfi: # @_Z26__device_stub__conv_KernelPKfS0_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11conv_KernelPKfS0_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__conv_KernelPKfS0_Pfi, .Lfunc_end3-_Z26__device_stub__conv_KernelPKfS0_Pfi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$32768, %edi                    # imm = 0x8000
	callq	malloc
	movq	%rax, %r12
	movl	$32768, %edi                    # imm = 0x8000
	callq	malloc
	movq	%rax, %r15
	movl	$65532, %edi                    # imm = 0xFFFC
	callq	malloc
	movq	%rax, %rbx
	movl	$65532, %edi                    # imm = 0xFFFC
	callq	malloc
	movq	%rax, %r14
	leaq	32(%rsp), %rdi
	movl	$32768, %esi                    # imm = 0x8000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$32768, %esi                    # imm = 0x8000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$65532, %esi                    # imm = 0xFFFC
	callq	hipMalloc
	xorl	%r13d, %r13d
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r12,%r13,4)
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r15,%r13,4)
	incq	%r13
	cmpq	$8192, %r13                     # imm = 0x2000
	jne	.LBB4_1
# %bb.2:                                # %.preheader.preheader
	xorl	%ebp, %ebp
	movl	$65532, %edx                    # imm = 0xFFFC
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$65532, %edx                    # imm = 0xFFFC
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r13), %rax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movq	8(%r13), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%r15, %rax
.LBB4_3:                                # %.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	leaq	-8192(%rbp), %rcx
	xorps	%xmm0, %xmm0
	movq	%rax, %rdx
	xorl	%esi, %esi
.LBB4_4:                                #   Parent Loop BB4_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%edi, %edi
	cmpq	%rbp, %rsi
	setbe	%dil
	xorl	%r8d, %r8d
	cmpq	%rcx, %rsi
	setg	%r8b
	cmpq	$8192, %rbp                     # imm = 0x2000
	cmovbl	%edi, %r8d
	cmpb	$1, %r8b
	jne	.LBB4_6
# %bb.5:                                #   in Loop: Header=BB4_4 Depth=2
	movss	(%r12,%rsi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdx), %xmm1
	addss	%xmm1, %xmm0
.LBB4_6:                                #   in Loop: Header=BB4_4 Depth=2
	incq	%rsi
	addq	$-4, %rdx
	cmpq	$8192, %rsi                     # imm = 0x2000
	jne	.LBB4_4
# %bb.7:                                # %._crit_edge.i
                                        #   in Loop: Header=BB4_3 Depth=1
	movss	%xmm0, (%rbx,%rbp,4)
	incq	%rbp
	addq	$4, %rax
	cmpq	$16383, %rbp                    # imm = 0x3FFF
	jne	.LBB4_3
# %bb.8:                                # %_Z4convPKfS0_Pfi.exit
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r13), %rax
	subq	(%rsp), %rax                    # 8-byte Folded Reload
	movq	8(%r13), %r13
	subq	8(%rsp), %r13                   # 8-byte Folded Reload
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	movq	%rax, (%rsp)                    # 8-byte Spill
	movq	16(%rsp), %rdi
	movl	$65532, %edx                    # imm = 0xFFFC
	xorl	%esi, %esi
	callq	hipMemset
	leaq	40(%rsp), %rbp
	movq	%rbp, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	8(%rbp), %rbp
	movq	32(%rsp), %rdi
	movl	$32768, %edx                    # imm = 0x8000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movl	$32768, %edx                    # imm = 0x8000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967360, %rdi               # imm = 0x100000040
	leaq	192(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_10
# %bb.9:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$8192, %ecx                     # imm = 0x2000
	callq	_Z26__device_stub__conv_KernelPKfS0_Pfi
.LBB4_10:
	addq	(%rsp), %r13                    # 8-byte Folded Reload
	movq	16(%rsp), %rsi
	movl	$65532, %edx                    # imm = 0xFFFC
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r12d, %r12d
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r15), %rax
	subq	8(%rsp), %rax                   # 8-byte Folded Reload
	movq	8(%r15), %rcx
	subq	%rbp, %rcx
	imulq	$1000000, %rax, %r15            # imm = 0xF4240
	addq	%rcx, %r15
.LBB4_11:                               # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%r12,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%r14,%r12,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jne	.LBB4_21
	jp	.LBB4_21
# %bb.12:                               #   in Loop: Header=BB4_11 Depth=1
	incq	%r12
	cmpq	$16383, %r12                    # imm = 0x3FFF
	jne	.LBB4_11
# %bb.13:
	xorl	%ebx, %ebx
	movl	$.L.str.2, %edi
	movq	%r13, %rsi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	printf
	testq	%r13, %r13
	js	.LBB4_14
# %bb.15:
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r13, %xmm0
	jmp	.LBB4_16
.LBB4_21:
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.1, %edi
	movl	%r12d, %esi
	movb	$2, %al
	callq	printf
	movl	$1, %ebx
	jmp	.LBB4_20
.LBB4_14:
	movq	%r13, %rax
	shrq	%rax
	andl	$1, %r13d
	orq	%rax, %r13
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r13, %xmm0
	addss	%xmm0, %xmm0
.LBB4_16:
	testq	%r15, %r15
	js	.LBB4_17
# %bb.18:
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r15, %xmm1
	jmp	.LBB4_19
.LBB4_17:
	movq	%r15, %rax
	shrq	%rax
	andl	$1, %r15d
	orq	%rax, %r15
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r15, %xmm1
	addss	%xmm1, %xmm1
.LBB4_19:
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
.LBB4_20:
	movl	%ebx, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11conv_KernelPKfS0_Pfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11conv_KernelPKfS0_Pfi,@object # @_Z11conv_KernelPKfS0_Pfi
	.section	.rodata,"a",@progbits
	.globl	_Z11conv_KernelPKfS0_Pfi
	.p2align	3, 0x0
_Z11conv_KernelPKfS0_Pfi:
	.quad	_Z26__device_stub__conv_KernelPKfS0_Pfi
	.size	_Z11conv_KernelPKfS0_Pfi, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"FAIL at %d, cpu: %f, gpu %f\n"
	.size	.L.str.1, 29

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"PASS.  cpu time: %lu us, gpu time: %lu us\n"
	.size	.L.str.2, 43

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Speedup: cpu/gpu = %f\n"
	.size	.L.str.3, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11conv_KernelPKfS0_Pfi"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__conv_KernelPKfS0_Pfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11conv_KernelPKfS0_Pfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11conv_KernelPKfS0_Pfi ; -- Begin function _Z11conv_KernelPKfS0_Pfi
	.globl	_Z11conv_KernelPKfS0_Pfi
	.p2align	8
	.type	_Z11conv_KernelPKfS0_Pfi,@function
_Z11conv_KernelPKfS0_Pfi:               ; @_Z11conv_KernelPKfS0_Pfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_lshl_b32 s2, s3, 1
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.1:                                ; %.preheader
	v_ashrrev_i32_e32 v2, 31, v1
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB0_6
; %bb.2:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	v_subrev_nc_u32_e32 v5, s3, v1
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, s2, s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s7, v4, s2
	s_mov_b32 s6, 0
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s2, s6, v1
	s_mov_b32 s7, exec_lo
	v_cndmask_b32_e64 v6, 0, 1, s2
	v_cmp_gt_i32_e64 s2, s6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 0, 1, s2
	v_cndmask_b32_e32 v6, v7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, 1, v6
	v_cmpx_eq_u32_e32 1, v6
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	global_load_b32 v6, v[3:4], off
	s_load_b32 s2, s[4:5], 0x0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s2, v6
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	v_add_co_u32 v3, s2, v3, -4
	s_add_i32 s6, s6, 1
	v_add_co_ci_u32_e64 v4, s2, -1, v4, s2
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s3, s6
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_7
.LBB0_6:
	v_mov_b32_e32 v0, 0
.LBB0_7:                                ; %Flow40
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11conv_KernelPKfS0_Pfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11conv_KernelPKfS0_Pfi, .Lfunc_end0-_Z11conv_KernelPKfS0_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .actual_access:  read_only
        .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11conv_KernelPKfS0_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11conv_KernelPKfS0_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
