#include <float.h>

extern "C"
__global__ void getClusterCentroids(int n, double *xs, int *cluster_index, double *c, int k, int d){
 //xs indicates datapoints, c indicates initial centroids, k indicates no. of clusters; d - dimensions
        
        int index = blockIdx.x * blockDim.x + threadIdx.x;
        if (index<n){
                double dist;
                double prevBest = DBL_MAX;
                int centroidIndex = 0;
                
                for (int clust = 0; clust < k; clust++) {
                    dist = 0.0;
                    for (int dim=0; dim<d; dim++){
                            dist += ((xs[index*d + dim]) - (c[clust*d+dim])) * ((xs[index*d + dim]) - (c[clust*d+dim]));
            }
                  
            if (dist<prevBest) {
                  prevBest = dist; centroidIndex = clust; 
            }
        }

        cluster_index[index] = centroidIndex;
    }
}

extern "C"
__global__ void getClusterCentroidsMod(int n, double *xs, double *norm, int *cluster_index, double *local_means, double *c_norm, int k, int d){
 //xs indicates datapoints, c indicates initial centroids, k indicates no. of clusters; d - dimensions

        int index = blockIdx.x * blockDim.x + threadIdx.x;
        if (index<n){
                double dist;
                double prevBest = DBL_MAX;
                int centroidIndex = 0;
                double lowerBoundOfSqDist = 0;

                for (int clust = 0; clust < k; clust++) {
                    dist = 0.0; 
                    lowerBoundOfSqDist = c_norm[clust] - norm[index];
                    lowerBoundOfSqDist = lowerBoundOfSqDist * lowerBoundOfSqDist;
                    if (lowerBoundOfSqDist < prevBest) {
                        for (int dim=0; dim<d; dim++){
                                dist += ((xs[index*d + dim]) - (local_means[clust*d+dim])) * ((xs[index*d + dim]) - (local_means[clust*d+dim]));
                        }

                        if (dist<prevBest) {
                              prevBest = dist; centroidIndex = clust;
                        }
                    } 
                }

                cluster_index[index] = centroidIndex;
        }
}

extern "C"
__global__ void calculateIntermediates(int n, double *xs, int *cluster_index, 
   int *intermediates0, double *intermediates1, double *intermediates2, int k, int d){


    int blocksize = n / 450 + 1;
    int start = blockIdx.x * blocksize;
    int end1 = start + blocksize;
    int end;
    if (end1>n) end = n;
    else end = end1;

        if (end > n ) return;
        // loop for every K 
        for (int clust = threadIdx.y; clust < k; clust+= blockDim.y){
            // loop for every dimension(features)
            for (int dim = threadIdx.x; dim < d; dim+= blockDim.x) {

                // Calculate intermediate S0
                // for counts we don't have dimensions
                if (dim ==0) {
                    int count = 0;
                    for(int z=start; z<end; z++)
                    {
                        if(cluster_index[z] == clust) {
                        count ++;
                        }
                    }
                    intermediates0[blockIdx.x*k+clust] = count;
                }

                // Calculate intermediate S1 and S2
                double sum1 = 0.0;
                double sum2 = 0.0;
                                int idx ;
                for (int z=start; z<end; z++) {
                    if(cluster_index[z] == clust) {
			idx = z * d + dim;
                        sum1 += xs[idx];
                        sum2 += xs[idx] * xs[idx];

                    }
                }
                int index = (blockIdx.x*k*d + clust*d + dim);
	        intermediates1[index] = sum1;
                intermediates2[index] = sum2;
            }
    }
}

extern "C"
__global__ void calculateFinal(int n, int *intermediates0, double *intermediates1, 
    double *intermediates2, int *s0, double *s1, double *s2, int k, int d){

   if (blockIdx.x > 0) return;

    // Only block is invoked.        
    // loop for every K 
    for (int clust = threadIdx.y; clust < k; clust+= blockDim.y){
        // loop for every dimension(features)
        for (int dim = threadIdx.x; dim < d; dim+= blockDim.x) {

            // Calculate  S0
            // for counts we don't have dimensions
            if (dim == 0) {
                //count = 0;
                for(int z = clust; z < 450*k; z+=k){
                    {
                        s0[clust] += intermediates0[z];
                    }
                }
            }    

            // Calculate S1 and S2
	    int start = clust * d + dim;
	    int kd    = k * d;
	    double *s1end = &intermediates1[450 * kd];
	    double *s1cur = &intermediates1[start];
	    double *s2cur = &intermediates2[start];

	    for (; s1cur < s1end; s1cur += kd, s2cur += kd)
	    {
	       s1[start] += *s1cur;
	       s2[start] += *s2cur;
            }
        }
    }
}        

	.file	"tmpxft_00388d86_00000000-6_SparkGPUKmeans.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z46__device_stub__Z19getClusterCentroidsiPdPiS_iiiPdPiS_ii
	.type	_Z46__device_stub__Z19getClusterCentroidsiPdPiS_iiiPdPiS_ii, @function
_Z46__device_stub__Z19getClusterCentroidsiPdPiS_iiiPdPiS_ii:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 40(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	getClusterCentroids(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z46__device_stub__Z19getClusterCentroidsiPdPiS_iiiPdPiS_ii, .-_Z46__device_stub__Z19getClusterCentroidsiPdPiS_iiiPdPiS_ii
	.globl	getClusterCentroids
	.type	getClusterCentroids, @function
getClusterCentroids:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z19getClusterCentroidsiPdPiS_iiiPdPiS_ii
	.cfi_endproc
.LFE2033:
	.size	getClusterCentroids, .-getClusterCentroids
	.globl	_Z53__device_stub__Z22getClusterCentroidsModiPdS_PiS_S_iiiPdS_PiS_S_ii
	.type	_Z53__device_stub__Z22getClusterCentroidsModiPdS_PiS_S_iiiPdS_PiS_S_ii, @function
_Z53__device_stub__Z22getClusterCentroidsModiPdS_PiS_S_iiiPdS_PiS_S_ii:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	getClusterCentroidsMod(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L8:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z53__device_stub__Z22getClusterCentroidsModiPdS_PiS_S_iiiPdS_PiS_S_ii, .-_Z53__device_stub__Z22getClusterCentroidsModiPdS_PiS_S_iiiPdS_PiS_S_ii
	.globl	getClusterCentroidsMod
	.type	getClusterCentroidsMod, @function
getClusterCentroidsMod:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z22getClusterCentroidsModiPdS_PiS_S_iiiPdS_PiS_S_ii
	.cfi_endproc
.LFE2035:
	.size	getClusterCentroidsMod, .-getClusterCentroidsMod
	.globl	_Z54__device_stub__Z22calculateIntermediatesiPdPiS0_S_S_iiiPdPiS0_S_S_ii
	.type	_Z54__device_stub__Z22calculateIntermediatesiPdPiS0_S_S_iiiPdPiS0_S_S_ii, @function
_Z54__device_stub__Z22calculateIntermediatesiPdPiS0_S_S_iiiPdPiS0_S_S_ii:
.LFB2036:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	calculateIntermediates(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L13:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z54__device_stub__Z22calculateIntermediatesiPdPiS0_S_S_iiiPdPiS0_S_S_ii, .-_Z54__device_stub__Z22calculateIntermediatesiPdPiS0_S_S_iiiPdPiS0_S_S_ii
	.globl	calculateIntermediates
	.type	calculateIntermediates, @function
calculateIntermediates:
.LFB2037:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z22calculateIntermediatesiPdPiS0_S_S_iiiPdPiS0_S_S_ii
	.cfi_endproc
.LFE2037:
	.size	calculateIntermediates, .-calculateIntermediates
	.globl	_Z50__device_stub__Z14calculateFinaliPiPdS0_S_S0_S0_iiiPiPdS0_S_S0_S0_ii
	.type	_Z50__device_stub__Z14calculateFinaliPiPdS0_S_S0_S0_iiiPiPdS0_S_S0_S0_ii, @function
_Z50__device_stub__Z14calculateFinaliPiPdS0_S_S0_S0_iiiPiPdS0_S_S0_S0_ii:
.LFB2038:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	calculateFinal(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L18:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2038:
	.size	_Z50__device_stub__Z14calculateFinaliPiPdS0_S_S0_S0_iiiPiPdS0_S_S0_S0_ii, .-_Z50__device_stub__Z14calculateFinaliPiPdS0_S_S0_S0_iiiPiPdS0_S_S0_S0_ii
	.globl	calculateFinal
	.type	calculateFinal, @function
calculateFinal:
.LFB2039:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z14calculateFinaliPiPdS0_S_S0_S0_iiiPiPdS0_S_S0_S0_ii
	.cfi_endproc
.LFE2039:
	.size	calculateFinal, .-calculateFinal
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"calculateFinal"
.LC1:
	.string	"calculateIntermediates"
.LC2:
	.string	"getClusterCentroidsMod"
.LC3:
	.string	"getClusterCentroids"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	calculateFinal(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	calculateIntermediates(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	getClusterCentroidsMod(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	getClusterCentroids(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2041:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <float.h>

extern "C"
__global__ void getClusterCentroids(int n, double *xs, int *cluster_index, double *c, int k, int d){
 //xs indicates datapoints, c indicates initial centroids, k indicates no. of clusters; d - dimensions
        
        int index = blockIdx.x * blockDim.x + threadIdx.x;
        if (index<n){
                double dist;
                double prevBest = DBL_MAX;
                int centroidIndex = 0;
                
                for (int clust = 0; clust < k; clust++) {
                    dist = 0.0;
                    for (int dim=0; dim<d; dim++){
                            dist += ((xs[index*d + dim]) - (c[clust*d+dim])) * ((xs[index*d + dim]) - (c[clust*d+dim]));
            }
                  
            if (dist<prevBest) {
                  prevBest = dist; centroidIndex = clust; 
            }
        }

        cluster_index[index] = centroidIndex;
    }
}

extern "C"
__global__ void getClusterCentroidsMod(int n, double *xs, double *norm, int *cluster_index, double *local_means, double *c_norm, int k, int d){
 //xs indicates datapoints, c indicates initial centroids, k indicates no. of clusters; d - dimensions

        int index = blockIdx.x * blockDim.x + threadIdx.x;
        if (index<n){
                double dist;
                double prevBest = DBL_MAX;
                int centroidIndex = 0;
                double lowerBoundOfSqDist = 0;

                for (int clust = 0; clust < k; clust++) {
                    dist = 0.0; 
                    lowerBoundOfSqDist = c_norm[clust] - norm[index];
                    lowerBoundOfSqDist = lowerBoundOfSqDist * lowerBoundOfSqDist;
                    if (lowerBoundOfSqDist < prevBest) {
                        for (int dim=0; dim<d; dim++){
                                dist += ((xs[index*d + dim]) - (local_means[clust*d+dim])) * ((xs[index*d + dim]) - (local_means[clust*d+dim]));
                        }

                        if (dist<prevBest) {
                              prevBest = dist; centroidIndex = clust;
                        }
                    } 
                }

                cluster_index[index] = centroidIndex;
        }
}

extern "C"
__global__ void calculateIntermediates(int n, double *xs, int *cluster_index, 
   int *intermediates0, double *intermediates1, double *intermediates2, int k, int d){


    int blocksize = n / 450 + 1;
    int start = blockIdx.x * blocksize;
    int end1 = start + blocksize;
    int end;
    if (end1>n) end = n;
    else end = end1;

        if (end > n ) return;
        // loop for every K 
        for (int clust = threadIdx.y; clust < k; clust+= blockDim.y){
            // loop for every dimension(features)
            for (int dim = threadIdx.x; dim < d; dim+= blockDim.x) {

                // Calculate intermediate S0
                // for counts we don't have dimensions
                if (dim ==0) {
                    int count = 0;
                    for(int z=start; z<end; z++)
                    {
                        if(cluster_index[z] == clust) {
                        count ++;
                        }
                    }
                    intermediates0[blockIdx.x*k+clust] = count;
                }

                // Calculate intermediate S1 and S2
                double sum1 = 0.0;
                double sum2 = 0.0;
                                int idx ;
                for (int z=start; z<end; z++) {
                    if(cluster_index[z] == clust) {
			idx = z * d + dim;
                        sum1 += xs[idx];
                        sum2 += xs[idx] * xs[idx];

                    }
                }
                int index = (blockIdx.x*k*d + clust*d + dim);
	        intermediates1[index] = sum1;
                intermediates2[index] = sum2;
            }
    }
}

extern "C"
__global__ void calculateFinal(int n, int *intermediates0, double *intermediates1, 
    double *intermediates2, int *s0, double *s1, double *s2, int k, int d){

   if (blockIdx.x > 0) return;

    // Only block is invoked.        
    // loop for every K 
    for (int clust = threadIdx.y; clust < k; clust+= blockDim.y){
        // loop for every dimension(features)
        for (int dim = threadIdx.x; dim < d; dim+= blockDim.x) {

            // Calculate  S0
            // for counts we don't have dimensions
            if (dim == 0) {
                //count = 0;
                for(int z = clust; z < 450*k; z+=k){
                    {
                        s0[clust] += intermediates0[z];
                    }
                }
            }    

            // Calculate S1 and S2
	    int start = clust * d + dim;
	    int kd    = k * d;
	    double *s1end = &intermediates1[450 * kd];
	    double *s1cur = &intermediates1[start];
	    double *s2cur = &intermediates2[start];

	    for (; s1cur < s1end; s1cur += kd, s2cur += kd)
	    {
	       s1[start] += *s1cur;
	       s2[start] += *s2cur;
            }
        }
    }
}        

	.text
	.file	"SparkGPUKmeans.hip"
	.globl	__device_stub__getClusterCentroids # -- Begin function __device_stub__getClusterCentroids
	.type	__device_stub__getClusterCentroids,@function
__device_stub__getClusterCentroids:     # @__device_stub__getClusterCentroids
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$getClusterCentroids, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__getClusterCentroids, .Lfunc_end0-__device_stub__getClusterCentroids
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__getClusterCentroidsMod # -- Begin function __device_stub__getClusterCentroidsMod
	.type	__device_stub__getClusterCentroidsMod,@function
__device_stub__getClusterCentroidsMod:  # @__device_stub__getClusterCentroidsMod
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$getClusterCentroidsMod, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	__device_stub__getClusterCentroidsMod, .Lfunc_end1-__device_stub__getClusterCentroidsMod
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__calculateIntermediates # -- Begin function __device_stub__calculateIntermediates
	.type	__device_stub__calculateIntermediates,@function
__device_stub__calculateIntermediates:  # @__device_stub__calculateIntermediates
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$calculateIntermediates, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	__device_stub__calculateIntermediates, .Lfunc_end2-__device_stub__calculateIntermediates
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__calculateFinal   # -- Begin function __device_stub__calculateFinal
	.type	__device_stub__calculateFinal,@function
__device_stub__calculateFinal:          # @__device_stub__calculateFinal
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$calculateFinal, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	__device_stub__calculateFinal, .Lfunc_end3-__device_stub__calculateFinal
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$getClusterCentroids, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$getClusterCentroidsMod, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$calculateIntermediates, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$calculateFinal, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	getClusterCentroids,@object     # @getClusterCentroids
	.section	.rodata,"a",@progbits
	.globl	getClusterCentroids
	.p2align	3, 0x0
getClusterCentroids:
	.quad	__device_stub__getClusterCentroids
	.size	getClusterCentroids, 8

	.type	getClusterCentroidsMod,@object  # @getClusterCentroidsMod
	.globl	getClusterCentroidsMod
	.p2align	3, 0x0
getClusterCentroidsMod:
	.quad	__device_stub__getClusterCentroidsMod
	.size	getClusterCentroidsMod, 8

	.type	calculateIntermediates,@object  # @calculateIntermediates
	.globl	calculateIntermediates
	.p2align	3, 0x0
calculateIntermediates:
	.quad	__device_stub__calculateIntermediates
	.size	calculateIntermediates, 8

	.type	calculateFinal,@object          # @calculateFinal
	.globl	calculateFinal
	.p2align	3, 0x0
calculateFinal:
	.quad	__device_stub__calculateFinal
	.size	calculateFinal, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"getClusterCentroids"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"getClusterCentroidsMod"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"calculateIntermediates"
	.size	.L__unnamed_3, 23

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"calculateFinal"
	.size	.L__unnamed_4, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__getClusterCentroids
	.addrsig_sym __device_stub__getClusterCentroidsMod
	.addrsig_sym __device_stub__calculateIntermediates
	.addrsig_sym __device_stub__calculateFinal
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym getClusterCentroids
	.addrsig_sym getClusterCentroidsMod
	.addrsig_sym calculateIntermediates
	.addrsig_sym calculateFinal
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	getClusterCentroids     ; -- Begin function getClusterCentroids
	.globl	getClusterCentroids
	.p2align	8
	.type	getClusterCentroids,@function
getClusterCentroids:                    ; @getClusterCentroids
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_10
; %bb.1:                                ; %.preheader41
	s_load_b256 s[0:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_8
; %bb.2:                                ; %.preheader.lr.ph
	v_mul_lo_u32 v2, v1, s7
	s_mov_b32 s10, -1
	s_mov_b32 s11, 0x7fefffff
	v_mov_b32_e32 v0, 0
	s_mov_b32 s9, 0
	s_cmp_gt_i32 s7, 0
	s_mov_b32 s8, s9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[4:5], 3, v[2:3]
	v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
	s_cselect_b32 s10, -1, 0
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB0_3:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB0_6
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v9, v5
	s_lshl_b64 s[0:1], s[8:9], 3
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v8, v4
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_mov_b32 s12, s7
.LBB0_5:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b64 v[10:11], v[8:9], off
	s_load_b64 s[14:15], s[0:1], 0x0
	v_add_co_u32 v8, vcc_lo, v8, 8
	s_add_i32 s12, s12, -1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s12, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[10:11], v[10:11], -s[14:15]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[10:11], v[6:7]
	s_cbranch_scc0 .LBB0_5
	s_branch .LBB0_7
.LBB0_6:                                ;   in Loop: Header=BB0_3 Depth=1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
.LBB0_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_cmp_lt_f64_e32 vcc_lo, v[6:7], v[2:3]
	s_add_i32 s8, s8, s7
	v_dual_cndmask_b32 v3, v3, v7 :: v_dual_cndmask_b32 v2, v2, v6
	v_cndmask_b32_e64 v0, v0, s11, vcc_lo
	s_add_i32 s11, s11, 1
	s_cmp_eq_u32 s11, s6
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_9
.LBB0_8:
	v_mov_b32_e32 v0, 0
.LBB0_9:                                ; %._crit_edge47
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel getClusterCentroids
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	getClusterCentroids, .Lfunc_end0-getClusterCentroids
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 392
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	getClusterCentroidsMod  ; -- Begin function getClusterCentroidsMod
	.globl	getClusterCentroidsMod
	.p2align	8
	.type	getClusterCentroidsMod,@function
getClusterCentroidsMod:                 ; @getClusterCentroidsMod
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_14
; %bb.1:                                ; %.preheader51
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x28
	s_load_b256 s[0:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s10, 1
	s_cbranch_scc1 .LBB1_12
; %bb.2:                                ; %.lr.ph57
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_mul_lo_u32 v5, v1, s11
	s_cmp_gt_i32 s11, 0
	s_cselect_b32 s14, -1, 0
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	v_ashrrev_i32_e32 v6, 31, v5
	s_mov_b32 s3, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mov_b32 s2, s3
	global_load_b64 v[3:4], v[3:4], off
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_mov_b32 s0, -1
	s_mov_b32 s1, 0x7fefffff
	v_mov_b32_e32 v0, 0
	v_dual_mov_b32 v8, s1 :: v_dual_mov_b32 v7, s0
	s_mov_b32 s0, s3
.LBB1_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_6 Depth 2
	s_lshl_b64 s[12:13], s[2:3], 3
	s_mov_b32 s15, exec_lo
	s_add_u32 s12, s8, s12
	s_addc_u32 s13, s9, s13
	s_load_b64 s[12:13], s[12:13], 0x0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[9:10], s[12:13], -v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[9:10], v[9:10]
	v_cmpx_lt_f64_e32 v[9:10], v[7:8]
	s_cbranch_execz .LBB1_11
; %bb.4:                                ; %.preheader
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB1_7
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_mov_b32 s1, s3
	v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v12, v6
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, v5
	s_lshl_b64 s[12:13], s[0:1], 3
	s_mov_b32 s1, s11
	s_add_u32 s12, s6, s12
	s_addc_u32 s13, s7, s13
.LBB1_6:                                ;   Parent Loop BB1_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b64 v[13:14], v[11:12], off
	s_load_b64 s[16:17], s[12:13], 0x0
	v_add_co_u32 v11, vcc_lo, v11, 8
	s_add_i32 s1, s1, -1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_add_u32 s12, s12, 8
	s_addc_u32 s13, s13, 0
	s_cmp_eq_u32 s1, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[13:14], v[13:14], -s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[9:10], v[13:14], v[13:14], v[9:10]
	s_cbranch_scc0 .LBB1_6
	s_branch .LBB1_8
.LBB1_7:                                ;   in Loop: Header=BB1_3 Depth=1
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
.LBB1_8:                                ; %Flow91
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_f64_e32 v[9:10], v[7:8]
; %bb.9:                                ;   in Loop: Header=BB1_3 Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v7, v9
	v_mov_b32_e32 v8, v10
; %bb.10:                               ; %Flow
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_11:                               ; %Flow92
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s15
	s_add_i32 s2, s2, 1
	s_add_i32 s0, s0, s11
	s_cmp_eq_u32 s2, s10
	s_cbranch_scc0 .LBB1_3
	s_branch .LBB1_13
.LBB1_12:
	v_mov_b32_e32 v0, 0
.LBB1_13:                               ; %Flow94
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB1_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel getClusterCentroidsMod
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	getClusterCentroidsMod, .Lfunc_end1-getClusterCentroidsMod
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 504
; NumSgprs: 20
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	calculateIntermediates  ; -- Begin function calculateIntermediates
	.globl	calculateIntermediates
	.p2align	8
	.type	calculateIntermediates,@function
calculateIntermediates:                 ; @calculateIntermediates
; %bb.0:
	s_load_b64 s[12:13], s[0:1], 0x30
	v_bfe_u32 v12, v0, 10, 10
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v12
	s_cbranch_execz .LBB2_16
; %bb.1:                                ; %.lr.ph92
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x0
	s_load_b64 s[16:17], s[0:1], 0x28
	s_load_b32 s22, s[0:1], 0x44
	s_load_b256 s[4:11], s[0:1], 0x8
	v_and_b32_e32 v0, 0x3ff, v0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_mul_hi_i32 s3, s2, 0x91a2b3c5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s2
	s_lshr_b32 s14, s3, 31
	s_ashr_i32 s3, s3, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s14
	s_add_i32 s18, s3, 1
	s_mul_i32 s3, s15, s12
	s_mul_i32 s14, s18, s15
	s_mul_i32 s15, s15, s13
	s_add_i32 s19, s14, s18
	v_mad_u64_u32 v[3:4], null, s15, s18, v[0:1]
	s_min_i32 s20, s19, s2
	v_cmp_gt_i32_e64 s2, s13, v0
	s_cmp_lt_i32 s14, s20
	s_cselect_b32 s21, -1, 0
	s_add_u32 s18, s0, 56
	s_addc_u32 s19, s1, 0
	s_ashr_i32 s15, s14, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[14:15], 2
	s_lshr_b32 s15, s22, 16
	s_add_u32 s6, s6, s0
	s_addc_u32 s7, s7, s1
	s_mov_b32 s22, 0
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
                                        ;       Child Loop BB2_7 Depth 3
                                        ;       Child Loop BB2_11 Depth 3
	s_and_saveexec_b32 s23, s2
	s_cbranch_execz .LBB2_15
; %bb.3:                                ; %.lr.ph88
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_load_b32 s0, s[18:19], 0xc
	v_dual_mov_b32 v14, v0 :: v_dual_add_nc_u32 v1, s3, v12
	v_mov_b32_e32 v13, v3
	s_mov_b32 s25, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_mul_lo_u32 v1, v1, s13
	v_add_co_u32 v4, vcc_lo, s8, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s24, s0, 0xffff
.LBB2_4:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_7 Depth 3
                                        ;       Child Loop BB2_11 Depth 3
	s_mov_b32 s26, exec_lo
	v_cmpx_eq_u32_e32 0, v14
	s_cbranch_execz .LBB2_9
; %bb.5:                                ; %.preheader
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_mov_b32_e32 v6, 0
	s_and_not1_b32 vcc_lo, exec_lo, s21
	s_cbranch_vccnz .LBB2_8
; %bb.6:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[0:1], s[6:7]
	s_mov_b32 s27, s14
.LBB2_7:                                ; %.lr.ph
                                        ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v7, v2, s[0:1]
	s_add_i32 s27, s27, 1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_ge_i32 s27, s20
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v7, v12
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_cbranch_scc0 .LBB2_7
.LBB2_8:                                ; %._crit_edge
                                        ;   in Loop: Header=BB2_4 Depth=2
	global_store_b32 v[4:5], v6, off
.LBB2_9:                                ; %Flow125
                                        ;   in Loop: Header=BB2_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s26
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 vcc_lo, exec_lo, s21
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_cbranch_vccnz .LBB2_14
; %bb.10:                               ; %.lr.ph82.preheader
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v10, v13
	s_mov_b64 s[0:1], s[6:7]
	s_mov_b32 s26, s14
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
.LBB2_11:                               ; %.lr.ph82
                                        ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v11, v2, s[0:1]
	s_mov_b32 s27, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e64 v11, v12
	s_cbranch_execz .LBB2_13
; %bb.12:                               ;   in Loop: Header=BB2_11 Depth=3
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 3, v[10:11]
	v_add_co_u32 v15, vcc_lo, s4, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
	global_load_b64 v[15:16], v[15:16], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], v[8:9], v[15:16]
	v_fma_f64 v[6:7], v[15:16], v[15:16], v[6:7]
.LBB2_13:                               ;   in Loop: Header=BB2_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s27
	s_add_i32 s26, s26, 1
	v_add_nc_u32_e32 v10, s13, v10
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_ge_i32 s26, s20
	s_cbranch_scc0 .LBB2_11
.LBB2_14:                               ; %._crit_edge83
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_add_nc_u32_e32 v10, v14, v1
	v_add_nc_u32_e32 v14, s24, v14
	v_add_nc_u32_e32 v13, s24, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v11, 31, v10
	v_cmp_le_i32_e32 vcc_lo, s13, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	s_or_b32 s25, vcc_lo, s25
	v_add_co_u32 v15, s0, s10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s0, s11, v11, s0
	v_add_co_u32 v10, s0, s16, v10
	v_add_co_ci_u32_e64 v11, s0, s17, v11, s0
	global_store_b64 v[15:16], v[8:9], off
	global_store_b64 v[10:11], v[6:7], off
	s_and_not1_b32 exec_lo, exec_lo, s25
	s_cbranch_execnz .LBB2_4
.LBB2_15:                               ; %Flow127
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	v_add_nc_u32_e32 v12, s15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s12, v12
	s_or_b32 s22, vcc_lo, s22
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB2_2
.LBB2_16:                               ; %._crit_edge93
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel calculateIntermediates
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	calculateIntermediates, .Lfunc_end2-calculateIntermediates
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 692
; NumSgprs: 30
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	calculateFinal          ; -- Begin function calculateFinal
	.globl	calculateFinal
	.p2align	8
	.type	calculateFinal,@function
calculateFinal:                         ; @calculateFinal
; %bb.0:
	s_cmp_lg_u32 s15, 0
	s_cbranch_scc1 .LBB3_13
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x38
	v_bfe_u32 v1, v0, 10, 10
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB3_13
; %bb.2:                                ; %.lr.ph62
	s_clause 0x2
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b32 s25, s[0:1], 0x4c
	s_load_b128 s[12:15], s[0:1], 0x28
	s_mul_i32 s22, s3, s2
	v_and_b32_e32 v0, 0x3ff, v0
	s_mul_i32 s16, s22, 0x1c2
	s_mov_b32 s24, s2
	s_ashr_i32 s17, s16, 31
	s_mul_i32 s26, s2, 0x1c2
	s_lshl_b64 s[18:19], s[16:17], 3
	v_mad_u64_u32 v[3:4], null, v1, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	s_mov_b32 s28, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, s18
	s_addc_u32 s19, s7, s19
	s_ashr_i32 s23, s22, 31
	s_add_u32 s20, s0, 64
	s_addc_u32 s21, s1, 0
	s_lshr_b32 s17, s25, 16
	s_ashr_i32 s25, s2, 31
	s_lshl_b64 s[22:23], s[22:23], 3
	s_lshl_b64 s[24:25], s[24:25], 2
	s_mul_i32 s27, s3, s17
.LBB3_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_5 Depth 2
                                        ;       Child Loop BB3_7 Depth 3
                                        ;       Child Loop BB3_10 Depth 3
	s_and_saveexec_b32 s29, vcc_lo
	s_cbranch_execz .LBB3_12
; %bb.4:                                ; %.lr.ph58
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_load_b32 s31, s[20:21], 0xc
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmp_le_i32_e64 s0, s26, v1
	v_mov_b32_e32 v4, v3
	v_mov_b32_e32 v16, v0
	s_mov_b32 s30, 0
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_mul_lo_u32 v2, v1, s3
	s_xor_b32 s33, s0, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s1, s4, v8
	v_add_co_ci_u32_e64 v7, s1, s5, v9, s1
	v_add_co_u32 v8, s1, s10, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s1, s11, v9, s1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s31, s31, 0xffff
.LBB3_5:                                ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_7 Depth 3
                                        ;       Child Loop BB3_10 Depth 3
	v_cmp_eq_u32_e64 s0, 0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s33
	s_and_saveexec_b32 s34, s0
	s_cbranch_execz .LBB3_8
; %bb.6:                                ; %.lr.ph
                                        ;   in Loop: Header=BB3_5 Depth=2
	global_load_b32 v5, v[8:9], off
	v_dual_mov_b32 v11, v7 :: v_dual_mov_b32 v10, v6
	v_mov_b32_e32 v12, v1
	s_mov_b32 s35, 0
.LBB3_7:                                ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v13, v[10:11], off
	v_add_nc_u32_e32 v12, s2, v12
	v_add_co_u32 v10, s0, v10, s24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v11, s0, s25, v11, s0
	v_cmp_le_i32_e64 s1, s26, v12
	s_delay_alu instid0(VALU_DEP_1)
	s_or_b32 s35, s1, s35
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v5, v13
	global_store_b32 v[8:9], v5, off
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB3_7
.LBB3_8:                                ; %Flow98
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s34
	v_add_nc_u32_e32 v10, v16, v2
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s16, v10
	s_cbranch_execz .LBB3_11
; %bb.9:                                ; %.lr.ph55
                                        ;   in Loop: Header=BB3_5 Depth=2
	v_ashrrev_i32_e32 v11, 31, v10
	v_ashrrev_i32_e32 v5, 31, v4
	s_mov_b32 s34, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[14:15], 3, v[10:11]
	v_lshlrev_b64 v[10:11], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v12, s0, s12, v14
	v_add_co_ci_u32_e64 v13, s0, s13, v15, s0
	v_add_co_u32 v14, s0, s14, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v15, s0, s15, v15, s0
.LBB3_10:                               ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_co_u32 v17, s0, s6, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, s0, s7, v11, s0
	global_load_b64 v[19:20], v[12:13], off
	global_load_b64 v[17:18], v[17:18], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[17:18], v[17:18], v[19:20]
	v_add_co_u32 v19, s0, s8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, s0, s9, v11, s0
	v_add_co_u32 v10, s0, v10, s22
	v_add_co_ci_u32_e64 v11, s0, s23, v11, s0
	global_store_b64 v[12:13], v[17:18], off
	global_load_b64 v[17:18], v[19:20], off
	global_load_b64 v[19:20], v[14:15], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[17:18], v[17:18], v[19:20]
	v_add_co_u32 v19, s0, s6, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, s0, s7, v11, s0
	v_cmp_le_u64_e64 s0, s[18:19], v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	s_or_b32 s34, s0, s34
	global_store_b64 v[14:15], v[17:18], off
	s_and_not1_b32 exec_lo, exec_lo, s34
	s_cbranch_execnz .LBB3_10
.LBB3_11:                               ; %Flow96
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v16, s31, v16
	v_add_nc_u32_e32 v4, s31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s3, v16
	s_or_b32 s30, s0, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB3_5
.LBB3_12:                               ; %Flow100
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s29
	v_add_nc_u32_e32 v1, s17, v1
	v_add_nc_u32_e32 v3, s27, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s28, s0, s28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB3_3
.LBB3_13:                               ; %.loopexit51
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel calculateFinal
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 36
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	calculateFinal, .Lfunc_end3-calculateFinal
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 772
; NumSgprs: 38
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 38
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
