#include<stdio.h>
#include<stdlib.h>
#include<math.h>
#include<cuda.h>
#include<cuda_runtime.h>
#define X 300  //X dimession of the data 
#define Y 2		//Y dimesnion of the data //TODO NEED TO KNOW THE DATA SIZE BEFORE IMPORTING
#define K 3		//NUMBER OF CLUSTERS TO DIVIDE THE DATA INTO
#define MAX_ITERS 1  //NUMBER OF ITERATIONS

double *num=NULL;
double *centroids_c=NULL;
int *idx=NULL;

__global__
void findclosestcentroids(double* num, double* centroids_c, int* idx){

	int index=blockIdx.x*blockDim.x+threadIdx.x;
	int stride=blockDim.x*gridDim.x;
	int offset=0; //offset keeps track if the same thread (number enters the loop the next time, as the thread id will be same)
	for(int i=index; i<X*Y; i+=stride){
		
		int x=index+offset*stride;
		int j, l, min_ind; 
		double sum, dist[K],min_dist;
		
		for (j=0;j<K;j++){
			
			sum=0;
			for (l=0;l<Y;l++){

					sum=sum+(*(num+x*Y+l)-*(centroids_c+j*Y+l))*(*(num+x*Y+l)-*(centroids_c+j*Y+l));

			}
			dist[j]=sqrt(sum);
			printf("Distance of %d %e\n", index, sum);
		}
		min_dist=dist[0];
		min_ind=0;
		for (j=0; j<K; j++){
			
			if (dist[j]<min_dist) {

				min_dist=dist[j];
				min_ind=j;

			}
		}
		*(idx+x)=min_ind;
		offset++;
	}
	
}


void computeCentroids(double* num, int* idx, double* centroids){

	int i,j, l, m, count;
	double sum[Y];
	for(i=0;i<Y;i++) sum[i]=0.0;

	for (i=0;i<K;i++){

		count=0;
		for(m=0;m<Y;m++) sum[m]=0.0;

		for(j =0; j<X; j++){

			if(idx[j]==i){

					count++;
					for (l=0;l<Y;l++){

						sum[l]=sum[l]+ *(num+j*Y+l);
					
					}
			
			}

		}
		printf("COunts is %d \n", count);
		for (l=0;l<Y;l++){

			*(centroids+i*Y+l)=sum[l]/count;					
		}
	} 

}

int main(){

	FILE *fp;

	//initialization TODO make it random
	double centroids[K][Y]={{3,3},{6,2},{8,5}};

	double num1;
	int i, j, n_blocks, no_of_threads;
	
	no_of_threads=32;
	if (no_of_threads==(X*Y))
        n_blocks = (X*Y)/no_of_threads; //calculation of number of blocks baseds on threadscounts and world size
    else 
        n_blocks = (X*Y)/no_of_threads+1;;

	//Initializing CUDA memory 
	cudaMallocManaged(&num, sizeof(double)*X*Y);
	cudaMallocManaged(&centroids_c, sizeof(double)*K*Y);
	cudaMallocManaged(&idx, sizeof(int)*X);

	//Opening file and loading data into CUDA memory.
	fp=fopen("data.txt","r");
	if(fp==NULL) {
		printf("Exiting no file with such name \n");
		exit(-1);
	}
	//Loading the 2-dimensional data into a 1D VECTOR for CUDA. 
	for (i=0;i<X;i++){
		for (j=0;j<Y;j++){
			fscanf(fp,"%lf", &num1);
			num[i*Y+j]=num1;
			//printf(" %.15lf ", num1);  //Just for debugging
		}
		//printf("\n");
	}
	fclose(fp);

	//Loading the 2-dimensional centroid Initialization data into a 1D VECTOR for CUDA. 
	for (i=0;i<K;i++){
		for (j=0;j<Y;j++){
			centroids_c[i*Y+j]=centroids[i][j];
			//printf(" %.15lf ", centroids_c[i*Y+j]);  //Just for debugging
		}
		//printf("\n");
	}
	for (i=0;i<MAX_ITERS;i++){

		findclosestcentroids<<< n_blocks, no_of_threads>>>(num, &centroids_c[0], &idx[0]);
		cudaDeviceSynchronize();
		computeCentroids(num, &idx[0], &centroids_c[0]);

	}
	
	for (i=0;i<X;i++){

		printf("%d===%d \n",i+1, idx[i]+1);
	}
	return 0;

}

	.file	"tmpxft_002aa081_00000000-6_K_means_iter.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"COunts is %d \n"
	.text
	.globl	_Z16computeCentroidsPdPiS_
	.type	_Z16computeCentroidsPdPiS_, @function
_Z16computeCentroidsPdPiS_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC2(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L3:
	xorps	%xmm1, %xmm1
	movq	%rbp, %rdx
	xorl	%eax, %eax
	xorl	%r13d, %r13d
	movaps	%xmm1, %xmm0
.L5:
	cmpl	%r14d, (%r15,%rax,4)
	jne	.L4
	addsd	(%rdx), %xmm0
	addsd	8(%rdx), %xmm1
	incl	%r13d
.L4:
	incq	%rax
	addq	$16, %rdx
	cmpq	$300, %rax
	jne	.L5
	movl	%r13d, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movsd	%xmm0, 8(%rsp)
	incl	%r14d
	addq	$16, %rbx
	movsd	%xmm1, (%rsp)
	call	__printf_chk@PLT
	cvtsi2sdl	%r13d, %xmm2
	movsd	8(%rsp), %xmm0
	movsd	(%rsp), %xmm1
	divsd	%xmm2, %xmm0
	divsd	%xmm2, %xmm1
	movsd	%xmm0, -16(%rbx)
	movsd	%xmm1, -8(%rbx)
	cmpl	$3, %r14d
	jne	.L3
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z16computeCentroidsPdPiS_, .-_Z16computeCentroidsPdPiS_
	.globl	_Z44__device_stub__Z20findclosestcentroidsPdS_PiPdS_Pi
	.type	_Z44__device_stub__Z20findclosestcentroidsPdS_PiPdS_Pi, @function
_Z44__device_stub__Z20findclosestcentroidsPdS_PiPdS_Pi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z20findclosestcentroidsPdS_Pi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z44__device_stub__Z20findclosestcentroidsPdS_PiPdS_Pi, .-_Z44__device_stub__Z20findclosestcentroidsPdS_PiPdS_Pi
	.globl	_Z20findclosestcentroidsPdS_Pi
	.type	_Z20findclosestcentroidsPdS_Pi, @function
_Z20findclosestcentroidsPdS_Pi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z20findclosestcentroidsPdS_PiPdS_Pi
	.cfi_endproc
.LFE2054:
	.size	_Z20findclosestcentroidsPdS_Pi, .-_Z20findclosestcentroidsPdS_Pi
	.section	.rodata.str1.1
.LC3:
	.string	"r"
.LC4:
	.string	"data.txt"
.LC5:
	.string	"Exiting no file with such name \n"
.LC6:
	.string	"%lf"
.LC12:
	.string	"%d===%d \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1, %edx
	movl	$4800, %esi
	leaq	num(%rip), %rdi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$48, %esi
	leaq	centroids_c(%rip), %rdi
	call	cudaMallocManaged@PLT
	movl	$1200, %esi
	movl	$1, %edx
	leaq	idx(%rip), %rdi
	call	cudaMallocManaged@PLT
	leaq	.LC3(%rip), %rsi
	leaq	.LC4(%rip), %rdi
	call	fopen@PLT
	testq	%rax, %rax
	jne	.L24
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L24:
	movq	%rax, %rbx
	xorl	%ebp, %ebp
	leaq	.LC6(%rip), %r12
.L16:
	leaq	8(%rsp), %r13
	movq	%r12, %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	movq	%r13, %rdx
	call	__isoc23_fscanf@PLT
	movq	%r13, %rdx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	movsd	8(%rsp), %xmm0
	movq	num(%rip), %rax
	movsd	%xmm0, (%rax,%rbp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movsd	8(%rsp), %xmm0
	movq	num(%rip), %rax
	movsd	%xmm0, 8(%rax,%rbp)
	addq	$16, %rbp
	cmpq	$4800, %rbp
	jne	.L16
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	centroids_c(%rip), %rax
	xorl	%r9d, %r9d
	movq	.LC8(%rip), %rcx
	movq	.LC11(%rip), %rbx
	movl	$134217729, %edx
	movsd	.LC7(%rip), %xmm0
	movabsq	$4294967315, %rdi
	movq	%rcx, 16(%rax)
	salq	$5, %rdx
	xorl	%r8d, %r8d
	movl	$1, %esi
	movq	.LC9(%rip), %rcx
	movq	%rbx, 40(%rax)
	movsd	%xmm0, (%rax)
	movq	%rcx, 24(%rax)
	movq	.LC10(%rip), %rcx
	movsd	%xmm0, 8(%rax)
	movq	%rcx, 32(%rax)
	movl	$1, %ecx
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	idx(%rip), %rdx
	movq	centroids_c(%rip), %rsi
	movq	num(%rip), %rdi
	call	_Z44__device_stub__Z20findclosestcentroidsPdS_PiPdS_Pi
.L17:
	call	cudaDeviceSynchronize@PLT
	movq	centroids_c(%rip), %rdx
	movq	idx(%rip), %rsi
	xorl	%ebx, %ebx
	movq	num(%rip), %rdi
	leaq	.LC12(%rip), %rbp
	call	_Z16computeCentroidsPdPiS_
.L18:
	movq	idx(%rip), %rax
	leal	1(%rbx), %edx
	movq	%rbp, %rsi
	movl	$2, %edi
	movl	(%rax,%rbx,4), %ecx
	xorl	%eax, %eax
	incq	%rbx
	incl	%ecx
	call	__printf_chk@PLT
	cmpq	$300, %rbx
	jne	.L18
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z20findclosestcentroidsPdS_Pi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z20findclosestcentroidsPdS_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	idx
	.bss
	.align 8
	.type	idx, @object
	.size	idx, 8
idx:
	.zero	8
	.globl	centroids_c
	.align 8
	.type	centroids_c, @object
	.size	centroids_c, 8
centroids_c:
	.zero	8
	.globl	num
	.align 8
	.type	num, @object
	.size	num, 8
num:
	.zero	8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1074266112
	.align 8
.LC8:
	.long	0
	.long	1075314688
	.align 8
.LC9:
	.long	0
	.long	1073741824
	.align 8
.LC10:
	.long	0
	.long	1075838976
	.align 8
.LC11:
	.long	0
	.long	1075052544
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<stdio.h>
#include<stdlib.h>
#include<math.h>
#include<hip/hip_runtime.h>

#define X 300  //X dimession of the data 
#define Y 2		//Y dimesnion of the data //TODO NEED TO KNOW THE DATA SIZE BEFORE IMPORTING
#define K 3		//NUMBER OF CLUSTERS TO DIVIDE THE DATA INTO
#define MAX_ITERS 1  //NUMBER OF ITERATIONS

double *num=NULL;
double *centroids_c=NULL;
int *idx=NULL;

__global__
void findclosestcentroids(double* num, double* centroids_c, int* idx){

	int index=blockIdx.x*blockDim.x+threadIdx.x;
	int stride=blockDim.x*gridDim.x;
	int offset=0; //offset keeps track if the same thread (number enters the loop the next time, as the thread id will be same)
	for(int i=index; i<X*Y; i+=stride){
		
		int x=index+offset*stride;
		int j, l, min_ind; 
		double sum, dist[K],min_dist;
		
		for (j=0;j<K;j++){
			
			sum=0;
			for (l=0;l<Y;l++){

					sum=sum+(*(num+x*Y+l)-*(centroids_c+j*Y+l))*(*(num+x*Y+l)-*(centroids_c+j*Y+l));

			}
			dist[j]=sqrt(sum);
			printf("Distance of %d %e\n", index, sum);
		}
		min_dist=dist[0];
		min_ind=0;
		for (j=0; j<K; j++){
			
			if (dist[j]<min_dist) {

				min_dist=dist[j];
				min_ind=j;

			}
		}
		*(idx+x)=min_ind;
		offset++;
	}
	
}


void computeCentroids(double* num, int* idx, double* centroids){

	int i,j, l, m, count;
	double sum[Y];
	for(i=0;i<Y;i++) sum[i]=0.0;

	for (i=0;i<K;i++){

		count=0;
		for(m=0;m<Y;m++) sum[m]=0.0;

		for(j =0; j<X; j++){

			if(idx[j]==i){

					count++;
					for (l=0;l<Y;l++){

						sum[l]=sum[l]+ *(num+j*Y+l);
					
					}
			
			}

		}
		printf("COunts is %d \n", count);
		for (l=0;l<Y;l++){

			*(centroids+i*Y+l)=sum[l]/count;					
		}
	} 

}

int main(){

	FILE *fp;

	//initialization TODO make it random
	double centroids[K][Y]={{3,3},{6,2},{8,5}};

	double num1;
	int i, j, n_blocks, no_of_threads;
	
	no_of_threads=32;
	if (no_of_threads==(X*Y))
        n_blocks = (X*Y)/no_of_threads; //calculation of number of blocks baseds on threadscounts and world size
    else 
        n_blocks = (X*Y)/no_of_threads+1;;

	//Initializing CUDA memory 
	hipMallocManaged(&num, sizeof(double)*X*Y);
	hipMallocManaged(&centroids_c, sizeof(double)*K*Y);
	hipMallocManaged(&idx, sizeof(int)*X);

	//Opening file and loading data into CUDA memory.
	fp=fopen("data.txt","r");
	if(fp==NULL) {
		printf("Exiting no file with such name \n");
		exit(-1);
	}
	//Loading the 2-dimensional data into a 1D VECTOR for CUDA. 
	for (i=0;i<X;i++){
		for (j=0;j<Y;j++){
			fscanf(fp,"%lf", &num1);
			num[i*Y+j]=num1;
			//printf(" %.15lf ", num1);  //Just for debugging
		}
		//printf("\n");
	}
	fclose(fp);

	//Loading the 2-dimensional centroid Initialization data into a 1D VECTOR for CUDA. 
	for (i=0;i<K;i++){
		for (j=0;j<Y;j++){
			centroids_c[i*Y+j]=centroids[i][j];
			//printf(" %.15lf ", centroids_c[i*Y+j]);  //Just for debugging
		}
		//printf("\n");
	}
	for (i=0;i<MAX_ITERS;i++){

		findclosestcentroids<<< n_blocks, no_of_threads>>>(num, &centroids_c[0], &idx[0]);
		hipDeviceSynchronize();
		computeCentroids(num, &idx[0], &centroids_c[0]);

	}
	
	for (i=0;i<X;i++){

		printf("%d===%d \n",i+1, idx[i]+1);
	}
	return 0;

}

	.text
	.file	"K_means_iter.hip"
	.globl	_Z35__device_stub__findclosestcentroidsPdS_Pi # -- Begin function _Z35__device_stub__findclosestcentroidsPdS_Pi
	.type	_Z35__device_stub__findclosestcentroidsPdS_Pi,@function
_Z35__device_stub__findclosestcentroidsPdS_Pi: # @_Z35__device_stub__findclosestcentroidsPdS_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20findclosestcentroidsPdS_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__findclosestcentroidsPdS_Pi, .Lfunc_end0-_Z35__device_stub__findclosestcentroidsPdS_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z16computeCentroidsPdPiS_      # -- Begin function _Z16computeCentroidsPdPiS_
	.type	_Z16computeCentroidsPdPiS_,@function
_Z16computeCentroidsPdPiS_:             # @_Z16computeCentroidsPdPiS_
	.cfi_startproc
# %bb.0:                                # %.preheader34.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	xorl	%r12d, %r12d
.LBB1_1:                                # %.preheader34
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorpd	%xmm0, %xmm0
	xorl	%eax, %eax
	xorpd	%xmm1, %xmm1
	xorl	%ebp, %ebp
.LBB1_2:                                # %.preheader
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%rax), %ecx
	cmpq	%rcx, %r12
	jne	.LBB1_4
# %bb.3:                                # %.loopexit.loopexit.critedge
                                        #   in Loop: Header=BB1_2 Depth=2
	addsd	(%r15,%rax,4), %xmm0
	addsd	8(%r15,%rax,4), %xmm1
	incl	%ebp
.LBB1_4:                                # %.loopexit
                                        #   in Loop: Header=BB1_2 Depth=2
	addq	$4, %rax
	cmpq	$1200, %rax                     # imm = 0x4B0
	jne	.LBB1_2
# %bb.5:                                # %.critedge
                                        #   in Loop: Header=BB1_1 Depth=1
	movl	$.L.str, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	callq	printf
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	movq	%r12, %rax
	shlq	$4, %rax
	movsd	(%rsp), %xmm1                   # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, (%rbx,%rax)
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rbx,%rax)
	incq	%r12
	cmpq	$3, %r12
	jne	.LBB1_1
# %bb.6:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z16computeCentroidsPdPiS_, .Lfunc_end1-_Z16computeCentroidsPdPiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movabsq	$4613937818241073152, %rax      # imm = 0x4008000000000000
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	movabsq	$4618441417868443648, %rax      # imm = 0x4018000000000000
	movq	%rax, 32(%rsp)
	movabsq	$4611686018427387904, %rax      # imm = 0x4000000000000000
	movq	%rax, 40(%rsp)
	movabsq	$4620693217682128896, %rax      # imm = 0x4020000000000000
	movq	%rax, 48(%rsp)
	movabsq	$4617315517961601024, %rax      # imm = 0x4014000000000000
	movq	%rax, 56(%rsp)
	movl	$num, %edi
	movl	$4800, %esi                     # imm = 0x12C0
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$centroids_c, %edi
	movl	$48, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$idx, %edi
	movl	$1200, %esi                     # imm = 0x4B0
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB2_10
# %bb.1:                                # %.preheader36.preheader
	movq	%rax, %rbx
	leaq	8(%rsp), %r14
	xorl	%r15d, %r15d
.LBB2_2:                                # %.preheader36
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.4, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movsd	8(%rsp), %xmm0                  # xmm0 = mem[0],zero
	movq	num(%rip), %rax
	movsd	%xmm0, (%rax,%r15)
	movl	$.L.str.4, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movsd	8(%rsp), %xmm0                  # xmm0 = mem[0],zero
	movq	num(%rip), %rax
	movsd	%xmm0, 8(%rax,%r15)
	addq	$16, %r15
	cmpq	$4800, %r15                     # imm = 0x12C0
	jne	.LBB2_2
# %bb.3:
	movq	%rbx, %rdi
	callq	fclose
	xorl	%eax, %eax
	movq	centroids_c(%rip), %rcx
.LBB2_4:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movups	16(%rsp,%rax), %xmm0
	movups	%xmm0, (%rcx,%rax)
	addq	$16, %rax
	cmpq	$48, %rax
	jne	.LBB2_4
# %bb.5:
	movabsq	$4294967315, %rdi               # imm = 0x100000013
	leaq	13(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.6:
	movq	num(%rip), %rdi
	movq	centroids_c(%rip), %rsi
	movq	idx(%rip), %rdx
	callq	_Z35__device_stub__findclosestcentroidsPdS_Pi
.LBB2_7:                                # %.critedge
	callq	hipDeviceSynchronize
	movq	num(%rip), %rdi
	movq	idx(%rip), %rsi
	movq	centroids_c(%rip), %rdx
	callq	_Z16computeCentroidsPdPiS_
	xorl	%ebx, %ebx
.LBB2_8:                                # =>This Inner Loop Header: Depth=1
	movq	idx(%rip), %rax
	movl	(%rax,%rbx,4), %edx
	incq	%rbx
	incl	%edx
	movl	$.L.str.5, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	cmpq	$300, %rbx                      # imm = 0x12C
	jne	.LBB2_8
# %bb.9:
	xorl	%eax, %eax
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_10:
	.cfi_def_cfa_offset 96
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$-1, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20findclosestcentroidsPdS_Pi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	num,@object                     # @num
	.bss
	.globl	num
	.p2align	3, 0x0
num:
	.quad	0
	.size	num, 8

	.type	centroids_c,@object             # @centroids_c
	.globl	centroids_c
	.p2align	3, 0x0
centroids_c:
	.quad	0
	.size	centroids_c, 8

	.type	idx,@object                     # @idx
	.globl	idx
	.p2align	3, 0x0
idx:
	.quad	0
	.size	idx, 8

	.type	_Z20findclosestcentroidsPdS_Pi,@object # @_Z20findclosestcentroidsPdS_Pi
	.section	.rodata,"a",@progbits
	.globl	_Z20findclosestcentroidsPdS_Pi
	.p2align	3, 0x0
_Z20findclosestcentroidsPdS_Pi:
	.quad	_Z35__device_stub__findclosestcentroidsPdS_Pi
	.size	_Z20findclosestcentroidsPdS_Pi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"COunts is %d \n"
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"data.txt"
	.size	.L.str.1, 9

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%lf"
	.size	.L.str.4, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d===%d \n"
	.size	.L.str.5, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20findclosestcentroidsPdS_Pi"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Exiting no file with such name "
	.size	.Lstr, 32

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__findclosestcentroidsPdS_Pi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym num
	.addrsig_sym centroids_c
	.addrsig_sym idx
	.addrsig_sym _Z20findclosestcentroidsPdS_Pi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20findclosestcentroidsPdS_Pi ; -- Begin function _Z20findclosestcentroidsPdS_Pi
	.globl	_Z20findclosestcentroidsPdS_Pi
	.p2align	8
	.type	_Z20findclosestcentroidsPdS_Pi,@function
_Z20findclosestcentroidsPdS_Pi:         ; @_Z20findclosestcentroidsPdS_Pi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_add_u32 s8, s0, 24
	s_addc_u32 s9, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[39:40], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x258, v39
	s_cbranch_execz .LBB0_205
; %bb.1:                                ; %.lr.ph
	s_load_b32 s23, s[8:9], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b64 s[12:13], s[8:9], 0x50
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v11, 2
	v_mbcnt_lo_u32_b32 v43, -1, 0
	v_mov_b32_e32 v12, 1
	v_mov_b32_e32 v6, 33
	v_mov_b32_e32 v44, v39
	v_mov_b32_e32 v40, v8
	s_mov_b32 s8, 0
	s_mov_b32 s22, 0
	s_mov_b32 s24, 0
                                        ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s23, s23, s10
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_4 Depth 3
                                        ;       Child Loop BB0_8 Depth 3
                                        ;       Child Loop BB0_16 Depth 3
                                        ;       Child Loop BB0_22 Depth 3
                                        ;       Child Loop BB0_31 Depth 3
                                        ;       Child Loop BB0_34 Depth 3
                                        ;         Child Loop BB0_37 Depth 4
                                        ;         Child Loop BB0_45 Depth 4
                                        ;         Child Loop BB0_53 Depth 4
                                        ;         Child Loop BB0_61 Depth 4
                                        ;         Child Loop BB0_69 Depth 4
                                        ;         Child Loop BB0_77 Depth 4
                                        ;         Child Loop BB0_85 Depth 4
                                        ;         Child Loop BB0_93 Depth 4
                                        ;         Child Loop BB0_101 Depth 4
                                        ;         Child Loop BB0_107 Depth 4
                                        ;         Child Loop BB0_116 Depth 4
                                        ;       Child Loop BB0_124 Depth 3
                                        ;       Child Loop BB0_132 Depth 3
                                        ;       Child Loop BB0_138 Depth 3
                                        ;       Child Loop BB0_147 Depth 3
                                        ;       Child Loop BB0_152 Depth 3
                                        ;       Child Loop BB0_160 Depth 3
                                        ;       Child Loop BB0_166 Depth 3
                                        ;       Child Loop BB0_175 Depth 3
                                        ;       Child Loop BB0_179 Depth 3
                                        ;       Child Loop BB0_187 Depth 3
                                        ;       Child Loop BB0_193 Depth 3
                                        ;       Child Loop BB0_202 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[41:42], null, s24, s23, v[39:40]
	s_mov_b32 s25, s8
	v_lshlrev_b32_e32 v9, 1, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v42, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v45, vcc_lo, s5, v10, vcc_lo
.LBB0_3:                                ; %.preheader71
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_4 Depth 3
                                        ;       Child Loop BB0_8 Depth 3
                                        ;       Child Loop BB0_16 Depth 3
                                        ;       Child Loop BB0_22 Depth 3
                                        ;       Child Loop BB0_31 Depth 3
                                        ;       Child Loop BB0_34 Depth 3
                                        ;         Child Loop BB0_37 Depth 4
                                        ;         Child Loop BB0_45 Depth 4
                                        ;         Child Loop BB0_53 Depth 4
                                        ;         Child Loop BB0_61 Depth 4
                                        ;         Child Loop BB0_69 Depth 4
                                        ;         Child Loop BB0_77 Depth 4
                                        ;         Child Loop BB0_85 Depth 4
                                        ;         Child Loop BB0_93 Depth 4
                                        ;         Child Loop BB0_101 Depth 4
                                        ;         Child Loop BB0_107 Depth 4
                                        ;         Child Loop BB0_116 Depth 4
                                        ;       Child Loop BB0_124 Depth 3
                                        ;       Child Loop BB0_132 Depth 3
                                        ;       Child Loop BB0_138 Depth 3
                                        ;       Child Loop BB0_147 Depth 3
                                        ;       Child Loop BB0_152 Depth 3
                                        ;       Child Loop BB0_160 Depth 3
                                        ;       Child Loop BB0_166 Depth 3
                                        ;       Child Loop BB0_175 Depth 3
                                        ;       Child Loop BB0_179 Depth 3
                                        ;       Child Loop BB0_187 Depth 3
                                        ;       Child Loop BB0_193 Depth 3
                                        ;       Child Loop BB0_202 Depth 3
	s_lshl_b32 s0, s25, 1
	s_mov_b32 s1, s8
	v_mov_b32_e32 v15, 0
	s_lshl_b64 s[0:1], s[0:1], 3
	v_mov_b32_e32 v16, 0
	s_add_u32 s9, s6, s0
	s_addc_u32 s10, s7, s1
	s_mov_b64 s[0:1], 0
	s_mov_b32 s11, -1
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_lshl_b64 s[0:1], s[0:1], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v9, vcc_lo, v42, s0
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v45, vcc_lo
	s_add_u32 s0, s9, s0
	s_addc_u32 s1, s10, s1
	global_load_b64 v[13:14], v8, s[0:1]
	global_load_b64 v[9:10], v[9:10], off
	s_mov_b64 s[0:1], 1
	s_and_b32 vcc_lo, exec_lo, s11
	s_mov_b32 s11, 0
	s_waitcnt vmcnt(0)
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[15:16], v[9:10], v[9:10], v[15:16]
	s_cbranch_vccnz .LBB0_4
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=2
	v_mov_b32_e32 v7, v43
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v7
	v_cmp_eq_u32_e64 s0, s0, v7
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_11
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[19:20], v8, s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[13:14], v8, s[12:13]
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v20
	v_and_b32_e32 v9, v9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v17, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v17, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v13, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v14, v10, vcc_lo
	global_load_b64 v[17:18], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[17:20], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[19:20]
	s_cbranch_execz .LBB0_10
; %bb.7:                                ; %.preheader3.i.i.i.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s10, 0
.LBB0_8:                                ; %.preheader3.i.i.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	global_load_b64 v[17:18], v8, s[12:13]
	v_dual_mov_b32 v20, v10 :: v_dual_mov_b32 v19, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v13, v13, v19
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v13, 24, v[17:18]
	v_and_b32_e32 v17, v14, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[13:14], null, v17, 24, v[10:11]
	v_mov_b32_e32 v10, v13
	global_load_b64 v[17:18], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[17:20], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[19:20]
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_8
; %bb.9:                                ; %Flow483
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_10:                               ; %Flow485
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_11:                               ; %.loopexit4.i.i.i
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	global_load_b128 v[17:20], v8, s[12:13]
	v_readfirstlane_b32 s14, v9
	v_readfirstlane_b32 s15, v10
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s10, v13
	v_readfirstlane_b32 s11, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[14:15], s[10:11]
	s_mul_i32 s1, s11, 24
	s_mul_hi_u32 s16, s10, 24
	s_mul_i32 s17, s10, 24
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_3 Depth=2
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, v8
	s_add_i32 s9, s16, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, vcc_lo, v17, s17
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v18, vcc_lo
	global_store_b128 v[13:14], v[9:12], off offset:8
.LBB0_13:                               ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	s_lshl_b64 s[10:11], s[10:11], 12
	v_lshlrev_b64 v[9:10], 6, v[7:8]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v7, vcc_lo, v19, s10
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v20, vcc_lo
	s_mov_b32 s11, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v7, v9
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v14, vcc_lo, v14, v10, vcc_lo
	v_dual_mov_b32 v7, v8 :: v_dual_mov_b32 v22, s11
	v_dual_mov_b32 v9, v8 :: v_dual_mov_b32 v20, s9
	v_mov_b32_e32 v21, s10
	v_mov_b32_e32 v19, s8
	s_clause 0x3
	global_store_b128 v[13:14], v[6:9], off
	global_store_b128 v[13:14], v[19:22], off offset:16
	global_store_b128 v[13:14], v[19:22], off offset:32
	global_store_b128 v[13:14], v[19:22], off offset:48
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB0_21
; %bb.14:                               ;   in Loop: Header=BB0_3 Depth=2
	s_clause 0x1
	global_load_b64 v[23:24], v8, s[12:13] offset:32 glc
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	v_dual_mov_b32 v21, s14 :: v_dual_mov_b32 v22, s15
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v9
	v_readfirstlane_b32 s11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[10:11], s[14:15]
	s_mul_i32 s11, s11, 24
	s_mul_hi_u32 s18, s10, 24
	s_mul_i32 s10, s10, 24
	s_add_i32 s18, s18, s11
	v_add_co_u32 v9, vcc_lo, v17, s10
	v_add_co_ci_u32_e32 v10, vcc_lo, s18, v18, vcc_lo
	s_mov_b32 s10, exec_lo
	global_store_b64 v[9:10], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[21:22], v8, v[21:24], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[21:22], v[23:24]
	s_cbranch_execz .LBB0_17
; %bb.15:                               ; %.preheader1.i.i.i.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s11, 0
.LBB0_16:                               ; %.preheader1.i.i.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v19, s14 :: v_dual_mov_b32 v20, s15
	s_sleep 1
	global_store_b64 v[9:10], v[21:22], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[19:20], v8, v[19:22], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[19:20], v[21:22]
	v_dual_mov_b32 v22, v20 :: v_dual_mov_b32 v21, v19
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_16
.LBB0_17:                               ; %Flow481
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	global_load_b64 v[9:10], v8, s[12:13] offset:16
	s_mov_b32 s11, exec_lo
	s_mov_b32 s10, exec_lo
	v_mbcnt_lo_u32_b32 v7, s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB0_19
; %bb.18:                               ;   in Loop: Header=BB0_3 Depth=2
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[9:10], v[7:8], off offset:8
.LBB0_19:                               ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	s_waitcnt vmcnt(0)
	global_load_b64 v[19:20], v[9:10], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[19:20]
	s_cbranch_vccnz .LBB0_21
; %bb.20:                               ;   in Loop: Header=BB0_3 Depth=2
	global_load_b32 v7, v[9:10], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v7
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[19:20], v[7:8], off
	s_and_b32 m0, s10, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_21:                               ; %Flow482
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_add_i32 s16, s16, s1
	v_add_co_u32 v7, vcc_lo, v17, s17
	v_add_co_ci_u32_e32 v10, vcc_lo, s16, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v7, 20
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
.LBB0_22:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v7, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_22 Depth=3
	global_load_b32 v7, v[9:10], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v7, 1, v7
.LBB0_24:                               ;   in Loop: Header=BB0_22 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v7
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_22 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_27
.LBB0_26:                               ;   in Loop: Header=BB0_22 Depth=3
	s_mov_b32 s1, -1
.LBB0_27:                               ; %Flow476
                                        ;   in Loop: Header=BB0_22 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_22
; %bb.28:                               ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[17:18], v[13:14], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_32
; %bb.29:                               ;   in Loop: Header=BB0_3 Depth=2
	s_clause 0x2
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[13:14], v8, s[12:13] offset:24 glc
	global_load_b64 v[21:22], v8, s[12:13]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v7, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v19, vcc_lo, v7, s14
	v_add_co_ci_u32_e32 v20, vcc_lo, s15, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[19:20]
	v_cndmask_b32_e32 v19, v19, v7, vcc_lo
	v_dual_cndmask_b32 v20, v20, v23 :: v_dual_and_b32 v9, v19, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v7, v20, v10
	v_mul_hi_u32 v10, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v7, v7, 24
	v_mul_lo_u32 v9, v9, 24
	v_add_nc_u32_e32 v7, v10, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v21, v9
	v_mov_b32_e32 v21, v13
	v_add_co_ci_u32_e32 v10, vcc_lo, v22, v7, vcc_lo
	v_mov_b32_e32 v22, v14
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[21:22], v8, v[19:22], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[21:22], v[13:14]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_32
; %bb.30:                               ; %.preheader.i.i.i.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s0, 0
.LBB0_31:                               ; %.preheader.i.i.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[9:10], v[21:22], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[13:14], v8, v[19:22], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[21:22]
	v_dual_mov_b32 v22, v14 :: v_dual_mov_b32 v21, v13
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_31
.LBB0_32:                               ; %__ockl_printf_begin.exit
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, .str@rel32@lo+4
	s_addc_u32 s11, s11, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[10:11], 0
	s_cbranch_scc0 .LBB0_119
; %bb.33:                               ;   in Loop: Header=BB0_3 Depth=2
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v46, 2, v17
	v_dual_mov_b32 v20, v18 :: v_dual_and_b32 v19, -3, v17
	s_mov_b64 s[14:15], 19
.LBB0_34:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_37 Depth 4
                                        ;         Child Loop BB0_45 Depth 4
                                        ;         Child Loop BB0_53 Depth 4
                                        ;         Child Loop BB0_61 Depth 4
                                        ;         Child Loop BB0_69 Depth 4
                                        ;         Child Loop BB0_77 Depth 4
                                        ;         Child Loop BB0_85 Depth 4
                                        ;         Child Loop BB0_93 Depth 4
                                        ;         Child Loop BB0_101 Depth 4
                                        ;         Child Loop BB0_107 Depth 4
                                        ;         Child Loop BB0_116 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u64_e64 s0, s[14:15], 56
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s16, s14, 56
	s_cselect_b32 s17, s15, 0
	s_cmp_gt_u32 s16, 7
	s_cbranch_scc1 .LBB0_39
; %bb.35:                               ;   in Loop: Header=BB0_34 Depth=3
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_cmp_eq_u32 s16, 0
	s_cbranch_scc1 .LBB0_38
; %bb.36:                               ; %.preheader31.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_lshl_b64 s[0:1], s[16:17], 3
	s_mov_b64 s[18:19], 0
	s_mov_b64 s[20:21], s[10:11]
.LBB0_37:                               ; %.preheader31.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	global_load_u8 v7, v8, s[20:21]
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], s18, v[7:8]
	s_add_u32 s18, s18, 8
	s_addc_u32 s19, s19, 0
	s_add_u32 s20, s20, 1
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s0, s18
	v_or_b32_e32 v21, v9, v21
	v_or_b32_e32 v22, v10, v22
	s_cbranch_scc1 .LBB0_37
.LBB0_38:                               ; %Flow452
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s0, 0
	s_mov_b32 s9, 0
	s_branch .LBB0_40
.LBB0_39:                               ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr21_vgpr22
                                        ; implicit-def: $sgpr9
.LBB0_40:                               ; %Flow454
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_mov_b64 s[0:1], s[10:11]
	s_cbranch_vccnz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_34 Depth=3
	global_load_b64 v[21:22], v8, s[10:11]
	s_add_i32 s9, s16, -8
	s_add_u32 s0, s10, 8
	s_addc_u32 s1, s11, 0
.LBB0_42:                               ; %.loopexit32.i
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_cmp_gt_u32 s9, 7
	s_cbranch_scc1 .LBB0_47
; %bb.43:                               ;   in Loop: Header=BB0_34 Depth=3
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_cmp_eq_u32 s9, 0
	s_cbranch_scc1 .LBB0_46
; %bb.44:                               ; %.preheader29.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b64 s[18:19], 0
	s_mov_b64 s[20:21], 0
.LBB0_45:                               ; %.preheader29.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s26, s0, s20
	s_addc_u32 s27, s1, s21
	s_add_u32 s20, s20, 1
	global_load_u8 v7, v8, s[26:27]
	s_addc_u32 s21, s21, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], s18, v[7:8]
	s_add_u32 s18, s18, 8
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s9, s20
	v_or_b32_e32 v23, v9, v23
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v24, v10, v24
	s_cbranch_scc1 .LBB0_45
.LBB0_46:                               ; %Flow447
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, 0
	s_mov_b32 s26, 0
	s_branch .LBB0_48
.LBB0_47:                               ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, -1
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $sgpr26
.LBB0_48:                               ; %Flow449
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_50
; %bb.49:                               ;   in Loop: Header=BB0_34 Depth=3
	global_load_b64 v[23:24], v8, s[0:1]
	s_add_i32 s26, s9, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_50:                               ; %.loopexit30.i
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_cmp_gt_u32 s26, 7
	s_cbranch_scc1 .LBB0_55
; %bb.51:                               ;   in Loop: Header=BB0_34 Depth=3
	v_mov_b32_e32 v25, 0
	v_mov_b32_e32 v26, 0
	s_cmp_eq_u32 s26, 0
	s_cbranch_scc1 .LBB0_54
; %bb.52:                               ; %.preheader27.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b64 s[18:19], 0
	s_mov_b64 s[20:21], 0
.LBB0_53:                               ; %.preheader27.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s28, s0, s20
	s_addc_u32 s29, s1, s21
	s_add_u32 s20, s20, 1
	global_load_u8 v7, v8, s[28:29]
	s_addc_u32 s21, s21, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], s18, v[7:8]
	s_add_u32 s18, s18, 8
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s26, s20
	v_or_b32_e32 v25, v9, v25
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v26, v10, v26
	s_cbranch_scc1 .LBB0_53
.LBB0_54:                               ; %Flow442
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, 0
	s_mov_b32 s9, 0
	s_branch .LBB0_56
.LBB0_55:                               ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr9
.LBB0_56:                               ; %Flow444
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_58
; %bb.57:                               ;   in Loop: Header=BB0_34 Depth=3
	global_load_b64 v[25:26], v8, s[0:1]
	s_add_i32 s9, s26, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_58:                               ; %.loopexit28.i
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_cmp_gt_u32 s9, 7
	s_cbranch_scc1 .LBB0_63
; %bb.59:                               ;   in Loop: Header=BB0_34 Depth=3
	v_mov_b32_e32 v27, 0
	v_mov_b32_e32 v28, 0
	s_cmp_eq_u32 s9, 0
	s_cbranch_scc1 .LBB0_62
; %bb.60:                               ; %.preheader25.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b64 s[18:19], 0
	s_mov_b64 s[20:21], 0
.LBB0_61:                               ; %.preheader25.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s26, s0, s20
	s_addc_u32 s27, s1, s21
	s_add_u32 s20, s20, 1
	global_load_u8 v7, v8, s[26:27]
	s_addc_u32 s21, s21, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], s18, v[7:8]
	s_add_u32 s18, s18, 8
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s9, s20
	v_or_b32_e32 v27, v9, v27
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v28, v10, v28
	s_cbranch_scc1 .LBB0_61
.LBB0_62:                               ; %Flow437
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, 0
	s_mov_b32 s26, 0
	s_branch .LBB0_64
.LBB0_63:                               ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, -1
                                        ; implicit-def: $vgpr27_vgpr28
                                        ; implicit-def: $sgpr26
.LBB0_64:                               ; %Flow439
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_66
; %bb.65:                               ;   in Loop: Header=BB0_34 Depth=3
	global_load_b64 v[27:28], v8, s[0:1]
	s_add_i32 s26, s9, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_66:                               ; %.loopexit26.i
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_cmp_gt_u32 s26, 7
	s_cbranch_scc1 .LBB0_71
; %bb.67:                               ;   in Loop: Header=BB0_34 Depth=3
	v_mov_b32_e32 v29, 0
	v_mov_b32_e32 v30, 0
	s_cmp_eq_u32 s26, 0
	s_cbranch_scc1 .LBB0_70
; %bb.68:                               ; %.preheader23.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b64 s[18:19], 0
	s_mov_b64 s[20:21], 0
.LBB0_69:                               ; %.preheader23.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s28, s0, s20
	s_addc_u32 s29, s1, s21
	s_add_u32 s20, s20, 1
	global_load_u8 v7, v8, s[28:29]
	s_addc_u32 s21, s21, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], s18, v[7:8]
	s_add_u32 s18, s18, 8
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s26, s20
	v_or_b32_e32 v29, v9, v29
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v30, v10, v30
	s_cbranch_scc1 .LBB0_69
.LBB0_70:                               ; %Flow432
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, 0
	s_mov_b32 s9, 0
	s_branch .LBB0_72
.LBB0_71:                               ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr9
.LBB0_72:                               ; %Flow434
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_74
; %bb.73:                               ;   in Loop: Header=BB0_34 Depth=3
	global_load_b64 v[29:30], v8, s[0:1]
	s_add_i32 s9, s26, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_74:                               ; %.loopexit24.i
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_cmp_gt_u32 s9, 7
	s_cbranch_scc1 .LBB0_79
; %bb.75:                               ;   in Loop: Header=BB0_34 Depth=3
	v_mov_b32_e32 v31, 0
	v_mov_b32_e32 v32, 0
	s_cmp_eq_u32 s9, 0
	s_cbranch_scc1 .LBB0_78
; %bb.76:                               ; %.preheader21.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b64 s[18:19], 0
	s_mov_b64 s[20:21], 0
.LBB0_77:                               ; %.preheader21.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s26, s0, s20
	s_addc_u32 s27, s1, s21
	s_add_u32 s20, s20, 1
	global_load_u8 v7, v8, s[26:27]
	s_addc_u32 s21, s21, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], s18, v[7:8]
	s_add_u32 s18, s18, 8
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s9, s20
	v_or_b32_e32 v31, v9, v31
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v32, v10, v32
	s_cbranch_scc1 .LBB0_77
.LBB0_78:                               ; %Flow427
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, 0
	s_mov_b32 s26, 0
	s_branch .LBB0_80
.LBB0_79:                               ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, -1
                                        ; implicit-def: $vgpr31_vgpr32
                                        ; implicit-def: $sgpr26
.LBB0_80:                               ; %Flow429
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_82
; %bb.81:                               ;   in Loop: Header=BB0_34 Depth=3
	global_load_b64 v[31:32], v8, s[0:1]
	s_add_i32 s26, s9, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_82:                               ; %.loopexit22.i
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_cmp_gt_u32 s26, 7
	s_cbranch_scc1 .LBB0_87
; %bb.83:                               ;   in Loop: Header=BB0_34 Depth=3
	v_mov_b32_e32 v33, 0
	v_mov_b32_e32 v34, 0
	s_cmp_eq_u32 s26, 0
	s_cbranch_scc1 .LBB0_86
; %bb.84:                               ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b64 s[18:19], 0
	s_mov_b64 s[20:21], s[0:1]
.LBB0_85:                               ; %.preheader.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	global_load_u8 v7, v8, s[20:21]
	s_add_i32 s26, s26, -1
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], s18, v[7:8]
	s_add_u32 s18, s18, 8
	s_addc_u32 s19, s19, 0
	s_add_u32 s20, s20, 1
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s26, 0
	v_or_b32_e32 v33, v9, v33
	v_or_b32_e32 v34, v10, v34
	s_cbranch_scc1 .LBB0_85
.LBB0_86:                               ; %Flow422
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s9, 0
	s_branch .LBB0_88
.LBB0_87:                               ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s9, -1
.LBB0_88:                               ; %Flow424
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB0_90
; %bb.89:                               ;   in Loop: Header=BB0_34 Depth=3
	global_load_b64 v[33:34], v8, s[0:1]
.LBB0_90:                               ; %.loopexit.i
                                        ;   in Loop: Header=BB0_34 Depth=3
	v_mov_b32_e32 v7, v43
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v7
	v_cmp_eq_u32_e64 s0, s0, v7
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_96
; %bb.91:                               ;   in Loop: Header=BB0_34 Depth=3
	global_load_b64 v[37:38], v8, s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[13:14], v8, s[12:13]
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v38
	v_and_b32_e32 v9, v9, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v35, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v35, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v13, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v14, v10, vcc_lo
	global_load_b64 v[35:36], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[35:38], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[37:38]
	s_cbranch_execz .LBB0_95
; %bb.92:                               ; %.preheader3.i.i19.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s18, 0
.LBB0_93:                               ; %.preheader3.i.i19.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	global_load_b64 v[35:36], v8, s[12:13]
	v_dual_mov_b32 v38, v10 :: v_dual_mov_b32 v37, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v13, v13, v37
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v13, 24, v[35:36]
	v_and_b32_e32 v35, v14, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[13:14], null, v35, 24, v[10:11]
	v_mov_b32_e32 v10, v13
	global_load_b64 v[35:36], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[35:38], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[37:38]
	s_or_b32 s18, vcc_lo, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB0_93
; %bb.94:                               ; %Flow417
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_or_b32 exec_lo, exec_lo, s18
.LBB0_95:                               ; %Flow419
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_96:                               ; %.loopexit4.i.i14.i
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	global_load_b128 v[35:38], v8, s[12:13]
	v_readfirstlane_b32 s18, v9
	v_readfirstlane_b32 s19, v10
	s_mov_b32 s27, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s20, v13
	v_readfirstlane_b32 s21, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[20:21], s[18:19], s[20:21]
	s_mul_i32 s1, s21, 24
	s_mul_hi_u32 s9, s20, 24
	s_mul_i32 s26, s20, 24
	s_and_saveexec_b32 s28, s0
	s_cbranch_execz .LBB0_98
; %bb.97:                               ;   in Loop: Header=BB0_34 Depth=3
	v_dual_mov_b32 v9, s27 :: v_dual_mov_b32 v10, v8
	s_add_i32 s27, s9, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, vcc_lo, v35, s26
	v_add_co_ci_u32_e32 v14, vcc_lo, s27, v36, vcc_lo
	global_store_b128 v[13:14], v[9:12], off offset:8
.LBB0_98:                               ;   in Loop: Header=BB0_34 Depth=3
	s_or_b32 exec_lo, exec_lo, s28
	v_cmp_gt_u64_e64 vcc_lo, s[14:15], 56
	v_or_b32_e32 v9, 0, v20
	v_or_b32_e32 v10, v19, v46
	s_lshl_b64 s[20:21], s[20:21], 12
	s_lshl_b32 s27, s16, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s27, s27, 28
	v_dual_cndmask_b32 v20, v9, v20 :: v_dual_cndmask_b32 v13, v10, v19
	v_lshlrev_b64 v[9:10], 6, v[7:8]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v7, vcc_lo, v37, s20
	v_add_co_ci_u32_e32 v14, vcc_lo, s21, v38, vcc_lo
	s_and_b32 s27, s27, 0x1e0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v7, v9
	v_and_or_b32 v19, 0xffffff1f, v13, s27
	v_add_co_ci_u32_e32 v10, vcc_lo, v14, v10, vcc_lo
	s_clause 0x3
	global_store_b128 v[9:10], v[19:22], off
	global_store_b128 v[9:10], v[23:26], off offset:16
	global_store_b128 v[9:10], v[27:30], off offset:32
	global_store_b128 v[9:10], v[31:34], off offset:48
	s_and_saveexec_b32 s20, s0
	s_cbranch_execz .LBB0_106
; %bb.99:                               ;   in Loop: Header=BB0_34 Depth=3
	s_clause 0x1
	global_load_b64 v[23:24], v8, s[12:13] offset:32 glc
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	v_dual_mov_b32 v21, s18 :: v_dual_mov_b32 v22, s19
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s28, v13
	v_readfirstlane_b32 s29, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[28:29], s[28:29], s[18:19]
	s_mul_i32 s21, s29, 24
	s_mul_hi_u32 s27, s28, 24
	s_mul_i32 s28, s28, 24
	s_add_i32 s27, s27, s21
	v_add_co_u32 v13, vcc_lo, v35, s28
	v_add_co_ci_u32_e32 v14, vcc_lo, s27, v36, vcc_lo
	s_mov_b32 s21, exec_lo
	global_store_b64 v[13:14], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[21:22], v8, v[21:24], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[21:22], v[23:24]
	s_cbranch_execz .LBB0_102
; %bb.100:                              ; %.preheader1.i.i17.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s27, 0
.LBB0_101:                              ; %.preheader1.i.i17.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_dual_mov_b32 v19, s18 :: v_dual_mov_b32 v20, s19
	s_sleep 1
	global_store_b64 v[13:14], v[21:22], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[19:20], v8, v[19:22], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[19:20], v[21:22]
	v_dual_mov_b32 v22, v20 :: v_dual_mov_b32 v21, v19
	s_or_b32 s27, vcc_lo, s27
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB0_101
.LBB0_102:                              ; %Flow415
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	global_load_b64 v[13:14], v8, s[12:13] offset:16
	s_mov_b32 s27, exec_lo
	s_mov_b32 s21, exec_lo
	v_mbcnt_lo_u32_b32 v7, s27, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB0_104
; %bb.103:                              ;   in Loop: Header=BB0_34 Depth=3
	s_bcnt1_i32_b32 s27, s27
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s27
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[13:14], v[7:8], off offset:8
.LBB0_104:                              ;   in Loop: Header=BB0_34 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	global_load_b64 v[19:20], v[13:14], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[19:20]
	s_cbranch_vccnz .LBB0_106
; %bb.105:                              ;   in Loop: Header=BB0_34 Depth=3
	global_load_b32 v7, v[13:14], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s21, v7
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[19:20], v[7:8], off
	s_and_b32 m0, s21, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_106:                              ; %Flow416
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	s_add_i32 s9, s9, s1
	v_add_co_u32 v7, vcc_lo, v35, s26
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v36, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v7, 20
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
.LBB0_107:                              ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_mov_b32_e32 v7, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_107 Depth=4
	global_load_b32 v7, v[13:14], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v7, 1, v7
.LBB0_109:                              ;   in Loop: Header=BB0_107 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v7
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_111
; %bb.110:                              ;   in Loop: Header=BB0_107 Depth=4
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_112
.LBB0_111:                              ;   in Loop: Header=BB0_107 Depth=4
	s_mov_b32 s1, -1
.LBB0_112:                              ; %Flow410
                                        ;   in Loop: Header=BB0_107 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_107
; %bb.113:                              ;   in Loop: Header=BB0_34 Depth=3
	global_load_b128 v[19:22], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_117
; %bb.114:                              ;   in Loop: Header=BB0_34 Depth=3
	s_clause 0x2
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[13:14], v8, s[12:13] offset:24 glc
	global_load_b64 v[23:24], v8, s[12:13]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v7, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v21, vcc_lo, v7, s18
	v_add_co_ci_u32_e32 v22, vcc_lo, s19, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v25 :: v_dual_cndmask_b32 v21, v21, v7
	v_and_b32_e32 v7, v22, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v9, v21, v9
	v_mul_lo_u32 v7, v7, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v9, 24
	v_mul_lo_u32 v9, v9, 24
	v_add_nc_u32_e32 v7, v10, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v23, v9
	v_mov_b32_e32 v23, v13
	v_add_co_ci_u32_e32 v10, vcc_lo, v24, v7, vcc_lo
	v_mov_b32_e32 v24, v14
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v8, v[21:24], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[13:14]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_117
; %bb.115:                              ; %.preheader.i.i16.i.preheader
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_mov_b32 s0, 0
.LBB0_116:                              ; %.preheader.i.i16.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_34 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	global_store_b64 v[9:10], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[13:14], v8, v[21:24], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[23:24]
	v_dual_mov_b32 v24, v14 :: v_dual_mov_b32 v23, v13
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_116
.LBB0_117:                              ; %__ockl_hostcall_preview.exit20.i
                                        ;   in Loop: Header=BB0_34 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_sub_u32 s14, s14, s16
	s_subb_u32 s15, s15, s17
	s_add_u32 s10, s10, s16
	s_addc_u32 s11, s11, s17
	s_cmp_lg_u64 s[14:15], 0
	s_cbranch_scc1 .LBB0_34
; %bb.118:                              ; %Flow455
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s0, 0
	s_branch .LBB0_120
.LBB0_119:                              ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr19_vgpr20
.LBB0_120:                              ; %Flow470
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_149
; %bb.121:                              ;   in Loop: Header=BB0_3 Depth=2
	v_mov_b32_e32 v7, v43
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v7
	v_cmp_eq_u32_e64 s0, s0, v7
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_127
; %bb.122:                              ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[21:22], v8, s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[13:14], v8, s[12:13]
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v22
	v_and_b32_e32 v9, v9, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v19, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v19, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v13, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v14, v10, vcc_lo
	global_load_b64 v[19:20], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[19:22], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[21:22]
	s_cbranch_execz .LBB0_126
; %bb.123:                              ; %.preheader3.i.i.i54.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s10, 0
.LBB0_124:                              ; %.preheader3.i.i.i54
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	global_load_b64 v[19:20], v8, s[12:13]
	v_dual_mov_b32 v22, v10 :: v_dual_mov_b32 v21, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v13, v13, v21
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v13, 24, v[19:20]
	v_and_b32_e32 v19, v14, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[13:14], null, v19, 24, v[10:11]
	v_mov_b32_e32 v10, v13
	global_load_b64 v[19:20], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[19:22], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[21:22]
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_124
; %bb.125:                              ; %Flow467
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_126:                              ; %Flow469
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_127:                              ; %.loopexit4.i.i.i49
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	global_load_b128 v[21:24], v8, s[12:13]
	v_readfirstlane_b32 s14, v9
	v_readfirstlane_b32 s15, v10
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s10, v13
	v_readfirstlane_b32 s11, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[14:15], s[10:11]
	s_mul_i32 s1, s11, 24
	s_mul_hi_u32 s16, s10, 24
	s_mul_i32 s17, s10, 24
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB0_129
; %bb.128:                              ;   in Loop: Header=BB0_3 Depth=2
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, v8
	s_add_i32 s9, s16, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, vcc_lo, v21, s17
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v22, vcc_lo
	global_store_b128 v[13:14], v[9:12], off offset:8
.LBB0_129:                              ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	s_lshl_b64 s[10:11], s[10:11], 12
	v_lshlrev_b64 v[9:10], 6, v[7:8]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v7, vcc_lo, v23, s10
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v24, vcc_lo
	s_mov_b32 s11, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v7, v9
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_and_or_b32 v17, 0xffffff1f, v17, 32
	v_add_co_ci_u32_e32 v10, vcc_lo, v13, v10, vcc_lo
	v_dual_mov_b32 v19, v8 :: v_dual_mov_b32 v26, s11
	v_dual_mov_b32 v20, v8 :: v_dual_mov_b32 v25, s10
	v_dual_mov_b32 v24, s9 :: v_dual_mov_b32 v23, s8
	s_clause 0x3
	global_store_b128 v[9:10], v[17:20], off
	global_store_b128 v[9:10], v[23:26], off offset:16
	global_store_b128 v[9:10], v[23:26], off offset:32
	global_store_b128 v[9:10], v[23:26], off offset:48
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB0_137
; %bb.130:                              ;   in Loop: Header=BB0_3 Depth=2
	s_clause 0x1
	global_load_b64 v[25:26], v8, s[12:13] offset:32 glc
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	v_dual_mov_b32 v23, s14 :: v_dual_mov_b32 v24, s15
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v13
	v_readfirstlane_b32 s11, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[10:11], s[14:15]
	s_mul_i32 s11, s11, 24
	s_mul_hi_u32 s18, s10, 24
	s_mul_i32 s10, s10, 24
	s_add_i32 s18, s18, s11
	v_add_co_u32 v13, vcc_lo, v21, s10
	v_add_co_ci_u32_e32 v14, vcc_lo, s18, v22, vcc_lo
	s_mov_b32 s10, exec_lo
	global_store_b64 v[13:14], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[19:20], v8, v[23:26], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[19:20], v[25:26]
	s_cbranch_execz .LBB0_133
; %bb.131:                              ; %.preheader1.i.i.i52.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s11, 0
.LBB0_132:                              ; %.preheader1.i.i.i52
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v17, s14 :: v_dual_mov_b32 v18, s15
	s_sleep 1
	global_store_b64 v[13:14], v[19:20], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[17:18], v8, v[17:20], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[17:18], v[19:20]
	v_dual_mov_b32 v20, v18 :: v_dual_mov_b32 v19, v17
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_132
.LBB0_133:                              ; %Flow465
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	global_load_b64 v[13:14], v8, s[12:13] offset:16
	s_mov_b32 s11, exec_lo
	s_mov_b32 s10, exec_lo
	v_mbcnt_lo_u32_b32 v7, s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB0_135
; %bb.134:                              ;   in Loop: Header=BB0_3 Depth=2
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[13:14], v[7:8], off offset:8
.LBB0_135:                              ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	s_waitcnt vmcnt(0)
	global_load_b64 v[17:18], v[13:14], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[17:18]
	s_cbranch_vccnz .LBB0_137
; %bb.136:                              ;   in Loop: Header=BB0_3 Depth=2
	global_load_b32 v7, v[13:14], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v7
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[17:18], v[7:8], off
	s_and_b32 m0, s10, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_137:                              ; %Flow466
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_add_i32 s16, s16, s1
	v_add_co_u32 v7, vcc_lo, v21, s17
	v_add_co_ci_u32_e32 v14, vcc_lo, s16, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v7, 20
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
.LBB0_138:                              ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v7, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_140
; %bb.139:                              ;   in Loop: Header=BB0_138 Depth=3
	global_load_b32 v7, v[13:14], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v7, 1, v7
.LBB0_140:                              ;   in Loop: Header=BB0_138 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v7
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_142
; %bb.141:                              ;   in Loop: Header=BB0_138 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_143
.LBB0_142:                              ;   in Loop: Header=BB0_138 Depth=3
	s_mov_b32 s1, -1
.LBB0_143:                              ; %Flow460
                                        ;   in Loop: Header=BB0_138 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_138
; %bb.144:                              ;   in Loop: Header=BB0_3 Depth=2
	global_load_b128 v[19:22], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_148
; %bb.145:                              ;   in Loop: Header=BB0_3 Depth=2
	s_clause 0x2
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[13:14], v8, s[12:13] offset:24 glc
	global_load_b64 v[17:18], v8, s[12:13]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v7, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v10, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v24, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v21, vcc_lo, v7, s14
	v_add_co_ci_u32_e32 v22, vcc_lo, s15, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_cndmask_b32_e32 v21, v21, v7, vcc_lo
	v_dual_cndmask_b32 v22, v22, v23 :: v_dual_mov_b32 v23, v13
	v_and_b32_e32 v9, v21, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v7, v22, v10
	v_mul_hi_u32 v10, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v7, v7, 24
	v_mul_lo_u32 v9, v9, 24
	v_add_nc_u32_e32 v7, v10, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v17, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, v18, v7, vcc_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v8, v[21:24], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[13:14]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_148
; %bb.146:                              ; %.preheader.i.i.i51.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s0, 0
.LBB0_147:                              ; %.preheader.i.i.i51
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[9:10], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[13:14], v8, v[21:24], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[23:24]
	v_dual_mov_b32 v24, v14 :: v_dual_mov_b32 v23, v13
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_147
.LBB0_148:                              ; %__ockl_hostcall_preview.exit.i
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_149:                              ; %__ockl_printf_append_string_n.exit
                                        ;   in Loop: Header=BB0_3 Depth=2
	v_mov_b32_e32 v7, v43
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v7
	v_cmp_eq_u32_e64 s0, s0, v7
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_155
; %bb.150:                              ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[23:24], v8, s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[13:14], v8, s[12:13]
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v24
	v_and_b32_e32 v9, v9, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v17, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v17, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v13, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v14, v10, vcc_lo
	global_load_b64 v[21:22], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[21:24], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[23:24]
	s_cbranch_execz .LBB0_154
; %bb.151:                              ; %.preheader3.i.i.i61.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s10, 0
.LBB0_152:                              ; %.preheader3.i.i.i61
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	global_load_b64 v[17:18], v8, s[12:13]
	v_dual_mov_b32 v24, v10 :: v_dual_mov_b32 v23, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v13, v13, v23
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v13, 24, v[17:18]
	v_and_b32_e32 v17, v14, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[13:14], null, v17, 24, v[10:11]
	v_mov_b32_e32 v10, v13
	global_load_b64 v[21:22], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[21:24], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[23:24]
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_152
; %bb.153:                              ; %Flow403
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_154:                              ; %Flow405
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_155:                              ; %.loopexit4.i.i.i55
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	global_load_b128 v[23:26], v8, s[12:13]
	v_readfirstlane_b32 s14, v9
	v_readfirstlane_b32 s15, v10
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s10, v13
	v_readfirstlane_b32 s11, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[14:15], s[10:11]
	s_mul_i32 s1, s11, 24
	s_mul_hi_u32 s16, s10, 24
	s_mul_i32 s17, s10, 24
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB0_157
; %bb.156:                              ;   in Loop: Header=BB0_3 Depth=2
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, v8
	s_add_i32 s9, s16, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, vcc_lo, v23, s17
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v24, vcc_lo
	global_store_b128 v[13:14], v[9:12], off offset:8
.LBB0_157:                              ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	s_lshl_b64 s[10:11], s[10:11], 12
	v_lshlrev_b64 v[9:10], 6, v[7:8]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v7, vcc_lo, v25, s10
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v26, vcc_lo
	s_mov_b32 s11, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v7, v9
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_and_or_b32 v19, 0xffffff1f, v19, 32
	v_add_co_ci_u32_e32 v10, vcc_lo, v13, v10, vcc_lo
	v_dual_mov_b32 v21, v39 :: v_dual_mov_b32 v22, v40
	v_dual_mov_b32 v28, s11 :: v_dual_mov_b32 v27, s10
	v_dual_mov_b32 v26, s9 :: v_dual_mov_b32 v25, s8
	s_clause 0x3
	global_store_b128 v[9:10], v[19:22], off
	global_store_b128 v[9:10], v[25:28], off offset:16
	global_store_b128 v[9:10], v[25:28], off offset:32
	global_store_b128 v[9:10], v[25:28], off offset:48
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB0_165
; %bb.158:                              ;   in Loop: Header=BB0_3 Depth=2
	s_clause 0x1
	global_load_b64 v[21:22], v8, s[12:13] offset:32 glc
	global_load_b64 v[13:14], v8, s[12:13] offset:40
	v_dual_mov_b32 v19, s14 :: v_dual_mov_b32 v20, s15
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v13
	v_readfirstlane_b32 s11, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[10:11], s[14:15]
	s_mul_i32 s11, s11, 24
	s_mul_hi_u32 s18, s10, 24
	s_mul_i32 s10, s10, 24
	s_add_i32 s18, s18, s11
	v_add_co_u32 v13, vcc_lo, v23, s10
	v_add_co_ci_u32_e32 v14, vcc_lo, s18, v24, vcc_lo
	s_mov_b32 s10, exec_lo
	global_store_b64 v[13:14], v[21:22], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[19:20], v8, v[19:22], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[19:20], v[21:22]
	s_cbranch_execz .LBB0_161
; %bb.159:                              ; %.preheader1.i.i.i59.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s11, 0
.LBB0_160:                              ; %.preheader1.i.i.i59
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v17, s14 :: v_dual_mov_b32 v18, s15
	s_sleep 1
	global_store_b64 v[13:14], v[19:20], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[17:18], v8, v[17:20], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[17:18], v[19:20]
	v_dual_mov_b32 v20, v18 :: v_dual_mov_b32 v19, v17
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_160
.LBB0_161:                              ; %Flow401
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	global_load_b64 v[13:14], v8, s[12:13] offset:16
	s_mov_b32 s11, exec_lo
	s_mov_b32 s10, exec_lo
	v_mbcnt_lo_u32_b32 v7, s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB0_163
; %bb.162:                              ;   in Loop: Header=BB0_3 Depth=2
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[13:14], v[7:8], off offset:8
.LBB0_163:                              ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	s_waitcnt vmcnt(0)
	global_load_b64 v[17:18], v[13:14], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[17:18]
	s_cbranch_vccnz .LBB0_165
; %bb.164:                              ;   in Loop: Header=BB0_3 Depth=2
	global_load_b32 v7, v[13:14], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v7
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[17:18], v[7:8], off
	s_and_b32 m0, s10, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_165:                              ; %Flow402
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_add_i32 s16, s16, s1
	v_add_co_u32 v7, vcc_lo, v23, s17
	v_add_co_ci_u32_e32 v14, vcc_lo, s16, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v7, 20
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
.LBB0_166:                              ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v7, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_168
; %bb.167:                              ;   in Loop: Header=BB0_166 Depth=3
	global_load_b32 v7, v[13:14], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v7, 1, v7
.LBB0_168:                              ;   in Loop: Header=BB0_166 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v7
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_170
; %bb.169:                              ;   in Loop: Header=BB0_166 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_171
.LBB0_170:                              ;   in Loop: Header=BB0_166 Depth=3
	s_mov_b32 s1, -1
.LBB0_171:                              ; %Flow396
                                        ;   in Loop: Header=BB0_166 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_166
; %bb.172:                              ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[13:14], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_176
; %bb.173:                              ;   in Loop: Header=BB0_3 Depth=2
	s_clause 0x2
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[21:22], v8, s[12:13] offset:24 glc
	global_load_b64 v[19:20], v8, s[12:13]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v7, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v17, vcc_lo, v7, s14
	v_add_co_ci_u32_e32 v18, vcc_lo, s15, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[17:18]
	v_cndmask_b32_e32 v17, v17, v7, vcc_lo
	v_dual_cndmask_b32 v18, v18, v23 :: v_dual_and_b32 v9, v17, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v7, v18, v10
	v_mul_hi_u32 v10, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v7, v7, 24
	v_mul_lo_u32 v9, v9, 24
	v_add_nc_u32_e32 v7, v10, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v19, v9
	v_mov_b32_e32 v19, v21
	v_add_co_ci_u32_e32 v10, vcc_lo, v20, v7, vcc_lo
	v_mov_b32_e32 v20, v22
	global_store_b64 v[9:10], v[21:22], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[19:20], v8, v[17:20], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[19:20], v[21:22]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_176
; %bb.174:                              ; %.preheader.i.i.i58.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s0, 0
.LBB0_175:                              ; %.preheader.i.i.i58
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[9:10], v[19:20], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[21:22], v8, v[17:20], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[21:22], v[19:20]
	v_dual_mov_b32 v19, v21 :: v_dual_mov_b32 v20, v22
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_175
.LBB0_176:                              ; %__ockl_printf_append_args.exit
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v7, v43
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v7
	v_cmp_eq_u32_e64 s0, s0, v7
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_182
; %bb.177:                              ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[19:20], v8, s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[17:18], v8, s[12:13]
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v20
	v_and_b32_e32 v9, v9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v21, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v21, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v17, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v18, v10, vcc_lo
	global_load_b64 v[17:18], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[17:20], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[19:20]
	s_cbranch_execz .LBB0_181
; %bb.178:                              ; %.preheader3.i.i.i68.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s10, 0
.LBB0_179:                              ; %.preheader3.i.i.i68
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[17:18], v8, s[12:13] offset:40
	global_load_b64 v[21:22], v8, s[12:13]
	v_dual_mov_b32 v20, v10 :: v_dual_mov_b32 v19, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v17, v17, v19
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v17, 24, v[21:22]
	v_and_b32_e32 v21, v18, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[17:18], null, v21, 24, v[10:11]
	v_mov_b32_e32 v10, v17
	global_load_b64 v[17:18], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v8, v[17:20], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[19:20]
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_179
; %bb.180:                              ; %Flow389
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_181:                              ; %Flow391
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_182:                              ; %.loopexit4.i.i.i62
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[21:22], v8, s[12:13] offset:40
	global_load_b128 v[17:20], v8, s[12:13]
	v_readfirstlane_b32 s14, v9
	v_readfirstlane_b32 s15, v10
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s10, v21
	v_readfirstlane_b32 s11, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[14:15], s[10:11]
	s_mul_i32 s1, s11, 24
	s_mul_hi_u32 s16, s10, 24
	s_mul_i32 s17, s10, 24
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB0_184
; %bb.183:                              ;   in Loop: Header=BB0_3 Depth=2
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, v8
	s_add_i32 s9, s16, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v21, vcc_lo, v17, s17
	v_add_co_ci_u32_e32 v22, vcc_lo, s9, v18, vcc_lo
	global_store_b128 v[21:22], v[9:12], off offset:8
.LBB0_184:                              ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	s_lshl_b64 s[10:11], s[10:11], 12
	v_lshlrev_b64 v[9:10], 6, v[7:8]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v19, vcc_lo, v19, s10
	v_add_co_ci_u32_e32 v20, vcc_lo, s11, v20, vcc_lo
	s_mov_b32 s11, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v19, v9
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_and_or_b32 v13, 0xffffff1d, v13, 34
	v_add_co_ci_u32_e32 v10, vcc_lo, v20, v10, vcc_lo
	v_dual_mov_b32 v22, s11 :: v_dual_mov_b32 v21, s10
	v_dual_mov_b32 v20, s9 :: v_dual_mov_b32 v19, s8
	s_clause 0x3
	global_store_b128 v[9:10], v[13:16], off
	global_store_b128 v[9:10], v[19:22], off offset:16
	global_store_b128 v[9:10], v[19:22], off offset:32
	global_store_b128 v[9:10], v[19:22], off offset:48
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB0_192
; %bb.185:                              ;   in Loop: Header=BB0_3 Depth=2
	s_clause 0x1
	global_load_b64 v[23:24], v8, s[12:13] offset:32 glc
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	v_dual_mov_b32 v21, s14 :: v_dual_mov_b32 v22, s15
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v9
	v_readfirstlane_b32 s11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[10:11], s[10:11], s[14:15]
	s_mul_i32 s11, s11, 24
	s_mul_hi_u32 s18, s10, 24
	s_mul_i32 s10, s10, 24
	s_add_i32 s18, s18, s11
	v_add_co_u32 v9, vcc_lo, v17, s10
	v_add_co_ci_u32_e32 v10, vcc_lo, s18, v18, vcc_lo
	s_mov_b32 s10, exec_lo
	global_store_b64 v[9:10], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[21:22], v8, v[21:24], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[21:22], v[23:24]
	s_cbranch_execz .LBB0_188
; %bb.186:                              ; %.preheader1.i.i.i66.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s11, 0
.LBB0_187:                              ; %.preheader1.i.i.i66
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v19, s14 :: v_dual_mov_b32 v20, s15
	s_sleep 1
	global_store_b64 v[9:10], v[21:22], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[13:14], v8, v[19:22], s[12:13] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[21:22]
	v_dual_mov_b32 v22, v14 :: v_dual_mov_b32 v21, v13
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_187
.LBB0_188:                              ; %Flow387
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	global_load_b64 v[9:10], v8, s[12:13] offset:16
	s_mov_b32 s11, exec_lo
	s_mov_b32 s10, exec_lo
	v_mbcnt_lo_u32_b32 v7, s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB0_190
; %bb.189:                              ;   in Loop: Header=BB0_3 Depth=2
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[9:10], v[7:8], off offset:8
.LBB0_190:                              ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	s_waitcnt vmcnt(0)
	global_load_b64 v[13:14], v[9:10], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14]
	s_cbranch_vccnz .LBB0_192
; %bb.191:                              ;   in Loop: Header=BB0_3 Depth=2
	global_load_b32 v7, v[9:10], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v7
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[13:14], v[7:8], off
	s_and_b32 m0, s10, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_192:                              ; %Flow388
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_add_i32 s16, s16, s1
	v_add_co_u32 v7, vcc_lo, v17, s17
	v_add_co_ci_u32_e32 v10, vcc_lo, s16, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v7, 20
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
.LBB0_193:                              ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v7, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_195
; %bb.194:                              ;   in Loop: Header=BB0_193 Depth=3
	global_load_b32 v7, v[9:10], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v7, 1, v7
.LBB0_195:                              ;   in Loop: Header=BB0_193 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v7
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_197
; %bb.196:                              ;   in Loop: Header=BB0_193 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_198
.LBB0_197:                              ;   in Loop: Header=BB0_193 Depth=3
	s_mov_b32 s1, -1
.LBB0_198:                              ; %Flow382
                                        ;   in Loop: Header=BB0_193 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_193
; %bb.199:                              ;   in Loop: Header=BB0_3 Depth=2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_203
; %bb.200:                              ;   in Loop: Header=BB0_3 Depth=2
	s_clause 0x2
	global_load_b64 v[9:10], v8, s[12:13] offset:40
	global_load_b64 v[13:14], v8, s[12:13] offset:24 glc
	global_load_b64 v[19:20], v8, s[12:13]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v7, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v17, vcc_lo, v7, s14
	v_add_co_ci_u32_e32 v18, vcc_lo, s15, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[17:18]
	v_dual_cndmask_b32 v18, v18, v21 :: v_dual_cndmask_b32 v17, v17, v7
	v_and_b32_e32 v7, v18, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v9, v17, v9
	v_mul_lo_u32 v7, v7, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v9, 24
	v_mul_lo_u32 v9, v9, 24
	v_add_nc_u32_e32 v7, v10, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v19, v9
	v_mov_b32_e32 v19, v13
	v_add_co_ci_u32_e32 v10, vcc_lo, v20, v7, vcc_lo
	v_mov_b32_e32 v20, v14
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[19:20], v8, v[17:20], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[19:20], v[13:14]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_203
; %bb.201:                              ; %.preheader.i.i.i65.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s0, 0
.LBB0_202:                              ; %.preheader.i.i.i65
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[9:10], v[19:20], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[13:14], v8, v[17:20], s[12:13] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[19:20]
	v_dual_mov_b32 v20, v14 :: v_dual_mov_b32 v19, v13
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_202
.LBB0_203:                              ; %__ockl_printf_append_args.exit69
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[15:16]
	s_cmp_eq_u32 s25, 2
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[9:10], v[15:16], v7
	v_cndmask_b32_e64 v7, 0, 0xffffff80, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[13:14], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[15:16], v[9:10], v[13:14]
	v_mul_f64 v[13:14], v[13:14], 0.5
	v_fma_f64 v[17:18], -v[13:14], v[15:16], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
	v_fma_f64 v[13:14], v[13:14], v[17:18], v[13:14]
	v_fma_f64 v[17:18], -v[15:16], v[15:16], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], v[17:18], v[13:14], v[15:16]
	v_fma_f64 v[17:18], -v[15:16], v[15:16], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[17:18], v[13:14], v[15:16]
	v_ldexp_f64 v[13:14], v[13:14], v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v13, v9, vcc_lo
	v_cndmask_b32_e32 v9, v14, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s25, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s25, 0
	v_cndmask_b32_e32 v5, v5, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v3, v3, v9, s0
	v_cndmask_b32_e32 v0, v0, v7, vcc_lo
	v_cndmask_b32_e64 v2, v2, v7, s0
	v_cndmask_b32_e32 v1, v1, v9, vcc_lo
	s_add_i32 s25, s25, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s25, 3
	s_cbranch_scc1 .LBB0_3
; %bb.204:                              ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_add_nc_u32_e32 v44, s23, v44
	v_ashrrev_i32_e32 v42, 31, v41
	s_add_i32 s24, s24, 1
	v_lshlrev_b64 v[13:14], 2, v[41:42]
	v_dual_cndmask_b32 v9, v0, v2 :: v_dual_cndmask_b32 v10, v1, v3
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, 0x257, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_nlt_f64_e64 s0, v[4:5], v[9:10]
	s_or_b32 s22, vcc_lo, s22
	v_cndmask_b32_e64 v7, 2, v7, s0
	v_add_co_u32 v9, s0, s2, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s0, s3, v14, s0
	global_store_b32 v[9:10], v7, off
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB0_2
.LBB0_205:                              ; %Flow489
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20findclosestcentroidsPdS_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 47
		.amdhsa_next_free_sgpr 30
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20findclosestcentroidsPdS_Pi, .Lfunc_end0-_Z20findclosestcentroidsPdS_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 8524
; NumSgprs: 32
; NumVgprs: 47
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 32
; NumVGPRsForWavesPerEU: 47
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"Distance of %d %e\n"
	.size	.str, 19

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         104
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20findclosestcentroidsPdS_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     32
    .sgpr_spill_count: 0
    .symbol:         _Z20findclosestcentroidsPdS_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     47
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
