#include "includes.h"


/* Program Parameters */
#define MAXN 15000  /* Max value of N */
#define TILE_WIDTH 32  /* Width of each block */
int N;  /* Matrix size */

/* Matrices */
float overall;
char buffer[10000];
char *pbuff;
int *classIdArray = (int *)malloc(sizeof(int)*26);
int *groupIdArray = (int *)malloc(sizeof(int)*26);
int *roomIdArray =(int *) malloc(sizeof(int)*26);
int *roomSizeAsArray = (int *)malloc(sizeof(int)*5);
int *groupSizeAsArray = (int *)malloc(sizeof(int)*11);
int *timeSlotIdArray = (int *)malloc(sizeof(int)*26);
int *profIdArray = (int *)malloc(sizeof(int)*26);
int *clashes=(int *)calloc(26*26,sizeof(int));

int   *dclassIdArray,*dgroupIdArray,*droomIdArray,*droomSizeAsArray,*dgroupSizeAsArray,*dtimeSlotIdArray,*dprofIdArray,*dclashes;

/* junk */
#define randm() 4|2[uid]&3


/* returns a seed for srand based on the time */
__global__ void calculateFitness(int *classIds, int *roomIds, int *roomCapacities, int *groupIds, int *groupSizes, int *timeSlotIds, int *profIds, int *clashes)
{
int i = threadIdx.x;
int j = blockIdx.x ;

if(classIds[i]==classIds[j] && roomCapacities[classIds[i]]<groupSizes[groupIds[classIds[i]]])
clashes[i*j+i]++;

if (roomIds[classIds[j]] == roomIds[classIds[i]] && timeSlotIds[classIds[i]] == timeSlotIds[classIds[j]]
&& classIds[i] != classIds[j]) {
clashes[i*j+i]++;
}

if (profIds[classIds[j]] == profIds[classIds[j]] && timeSlotIds[classIds[i]] == timeSlotIds[classIds[j]]
&& classIds[i] != classIds[j]) {
clashes[i*j+i]++;
}
}
	.file	"tmpxft_0034ca07_00000000-6_calculateFitness.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z50__device_stub__Z16calculateFitnessPiS_S_S_S_S_S_S_PiS_S_S_S_S_S_S_
	.type	_Z50__device_stub__Z16calculateFitnessPiS_S_S_S_S_S_S_PiS_S_S_S_S_S_S_, @function
_Z50__device_stub__Z16calculateFitnessPiS_S_S_S_S_S_S_PiS_S_S_S_S_S_S_:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 8(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	%rsp, %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z16calculateFitnessPiS_S_S_S_S_S_S_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L2:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z50__device_stub__Z16calculateFitnessPiS_S_S_S_S_S_S_PiS_S_S_S_S_S_S_, .-_Z50__device_stub__Z16calculateFitnessPiS_S_S_S_S_S_S_PiS_S_S_S_S_S_S_
	.globl	_Z16calculateFitnessPiS_S_S_S_S_S_S_
	.type	_Z16calculateFitnessPiS_S_S_S_S_S_S_, @function
_Z16calculateFitnessPiS_S_S_S_S_S_S_:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z16calculateFitnessPiS_S_S_S_S_S_S_PiS_S_S_S_S_S_S_
	.cfi_endproc
.LFE2033:
	.size	_Z16calculateFitnessPiS_S_S_S_S_S_S_, .-_Z16calculateFitnessPiS_S_S_S_S_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z16calculateFitnessPiS_S_S_S_S_S_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16calculateFitnessPiS_S_S_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text.startup
	.type	_GLOBAL__sub_I_N, @function
_GLOBAL__sub_I_N:
.LFB2152:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$104, %edi
	call	malloc@PLT
	movl	$104, %edi
	movq	%rax, classIdArray(%rip)
	call	malloc@PLT
	movl	$104, %edi
	movq	%rax, groupIdArray(%rip)
	call	malloc@PLT
	movl	$20, %edi
	movq	%rax, roomIdArray(%rip)
	call	malloc@PLT
	movl	$44, %edi
	movq	%rax, roomSizeAsArray(%rip)
	call	malloc@PLT
	movl	$104, %edi
	movq	%rax, groupSizeAsArray(%rip)
	call	malloc@PLT
	movl	$104, %edi
	movq	%rax, timeSlotIdArray(%rip)
	call	malloc@PLT
	movl	$4, %esi
	movl	$676, %edi
	movq	%rax, profIdArray(%rip)
	call	calloc@PLT
	movq	%rax, clashes(%rip)
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2152:
	.size	_GLOBAL__sub_I_N, .-_GLOBAL__sub_I_N
	.section	.init_array
	.align 8
	.quad	_GLOBAL__sub_I_N
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	dclashes
	.bss
	.align 8
	.type	dclashes, @object
	.size	dclashes, 8
dclashes:
	.zero	8
	.globl	dprofIdArray
	.align 8
	.type	dprofIdArray, @object
	.size	dprofIdArray, 8
dprofIdArray:
	.zero	8
	.globl	dtimeSlotIdArray
	.align 8
	.type	dtimeSlotIdArray, @object
	.size	dtimeSlotIdArray, 8
dtimeSlotIdArray:
	.zero	8
	.globl	dgroupSizeAsArray
	.align 8
	.type	dgroupSizeAsArray, @object
	.size	dgroupSizeAsArray, 8
dgroupSizeAsArray:
	.zero	8
	.globl	droomSizeAsArray
	.align 8
	.type	droomSizeAsArray, @object
	.size	droomSizeAsArray, 8
droomSizeAsArray:
	.zero	8
	.globl	droomIdArray
	.align 8
	.type	droomIdArray, @object
	.size	droomIdArray, 8
droomIdArray:
	.zero	8
	.globl	dgroupIdArray
	.align 8
	.type	dgroupIdArray, @object
	.size	dgroupIdArray, 8
dgroupIdArray:
	.zero	8
	.globl	dclassIdArray
	.align 8
	.type	dclassIdArray, @object
	.size	dclassIdArray, 8
dclassIdArray:
	.zero	8
	.globl	clashes
	.align 8
	.type	clashes, @object
	.size	clashes, 8
clashes:
	.zero	8
	.globl	profIdArray
	.align 8
	.type	profIdArray, @object
	.size	profIdArray, 8
profIdArray:
	.zero	8
	.globl	timeSlotIdArray
	.align 8
	.type	timeSlotIdArray, @object
	.size	timeSlotIdArray, 8
timeSlotIdArray:
	.zero	8
	.globl	groupSizeAsArray
	.align 8
	.type	groupSizeAsArray, @object
	.size	groupSizeAsArray, 8
groupSizeAsArray:
	.zero	8
	.globl	roomSizeAsArray
	.align 8
	.type	roomSizeAsArray, @object
	.size	roomSizeAsArray, 8
roomSizeAsArray:
	.zero	8
	.globl	roomIdArray
	.align 8
	.type	roomIdArray, @object
	.size	roomIdArray, 8
roomIdArray:
	.zero	8
	.globl	groupIdArray
	.align 8
	.type	groupIdArray, @object
	.size	groupIdArray, 8
groupIdArray:
	.zero	8
	.globl	classIdArray
	.align 8
	.type	classIdArray, @object
	.size	classIdArray, 8
classIdArray:
	.zero	8
	.globl	pbuff
	.align 8
	.type	pbuff, @object
	.size	pbuff, 8
pbuff:
	.zero	8
	.globl	buffer
	.align 32
	.type	buffer, @object
	.size	buffer, 10000
buffer:
	.zero	10000
	.globl	overall
	.align 4
	.type	overall, @object
	.size	overall, 4
overall:
	.zero	4
	.globl	N
	.align 4
	.type	N, @object
	.size	N, 4
N:
	.zero	4
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"


/* Program Parameters */
#define MAXN 15000  /* Max value of N */
#define TILE_WIDTH 32  /* Width of each block */
int N;  /* Matrix size */

/* Matrices */
float overall;
char buffer[10000];
char *pbuff;
int *classIdArray = (int *)malloc(sizeof(int)*26);
int *groupIdArray = (int *)malloc(sizeof(int)*26);
int *roomIdArray =(int *) malloc(sizeof(int)*26);
int *roomSizeAsArray = (int *)malloc(sizeof(int)*5);
int *groupSizeAsArray = (int *)malloc(sizeof(int)*11);
int *timeSlotIdArray = (int *)malloc(sizeof(int)*26);
int *profIdArray = (int *)malloc(sizeof(int)*26);
int *clashes=(int *)calloc(26*26,sizeof(int));

int   *dclassIdArray,*dgroupIdArray,*droomIdArray,*droomSizeAsArray,*dgroupSizeAsArray,*dtimeSlotIdArray,*dprofIdArray,*dclashes;

/* junk */
#define randm() 4|2[uid]&3


/* returns a seed for srand based on the time */
__global__ void calculateFitness(int *classIds, int *roomIds, int *roomCapacities, int *groupIds, int *groupSizes, int *timeSlotIds, int *profIds, int *clashes)
{
int i = threadIdx.x;
int j = blockIdx.x ;

if(classIds[i]==classIds[j] && roomCapacities[classIds[i]]<groupSizes[groupIds[classIds[i]]])
clashes[i*j+i]++;

if (roomIds[classIds[j]] == roomIds[classIds[i]] && timeSlotIds[classIds[i]] == timeSlotIds[classIds[j]]
&& classIds[i] != classIds[j]) {
clashes[i*j+i]++;
}

if (profIds[classIds[j]] == profIds[classIds[j]] && timeSlotIds[classIds[i]] == timeSlotIds[classIds[j]]
&& classIds[i] != classIds[j]) {
clashes[i*j+i]++;
}
}
	.text
	.file	"calculateFitness.hip"
	.globl	_Z31__device_stub__calculateFitnessPiS_S_S_S_S_S_S_ # -- Begin function _Z31__device_stub__calculateFitnessPiS_S_S_S_S_S_S_
	.type	_Z31__device_stub__calculateFitnessPiS_S_S_S_S_S_S_,@function
_Z31__device_stub__calculateFitnessPiS_S_S_S_S_S_S_: # @_Z31__device_stub__calculateFitnessPiS_S_S_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16calculateFitnessPiS_S_S_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__calculateFitnessPiS_S_S_S_S_S_S_, .Lfunc_end0-_Z31__device_stub__calculateFitnessPiS_S_S_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.text.startup,"ax",@progbits
	.type	_GLOBAL__sub_I_calculateFitness.hip,@function # -- Begin function _GLOBAL__sub_I_calculateFitness.hip
_GLOBAL__sub_I_calculateFitness.hip:    # @_GLOBAL__sub_I_calculateFitness.hip
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$104, %edi
	callq	malloc
	movq	%rax, classIdArray(%rip)
	movl	$104, %edi
	callq	malloc
	movq	%rax, groupIdArray(%rip)
	movl	$104, %edi
	callq	malloc
	movq	%rax, roomIdArray(%rip)
	movl	$20, %edi
	callq	malloc
	movq	%rax, roomSizeAsArray(%rip)
	movl	$44, %edi
	callq	malloc
	movq	%rax, groupSizeAsArray(%rip)
	movl	$104, %edi
	callq	malloc
	movq	%rax, timeSlotIdArray(%rip)
	movl	$104, %edi
	callq	malloc
	movq	%rax, profIdArray(%rip)
	movl	$676, %edi                      # imm = 0x2A4
	movl	$4, %esi
	callq	calloc
	movq	%rax, clashes(%rip)
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_GLOBAL__sub_I_calculateFitness.hip, .Lfunc_end1-_GLOBAL__sub_I_calculateFitness.hip
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16calculateFitnessPiS_S_S_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	N,@object                       # @N
	.bss
	.globl	N
	.p2align	2, 0x0
N:
	.long	0                               # 0x0
	.size	N, 4

	.type	overall,@object                 # @overall
	.globl	overall
	.p2align	2, 0x0
overall:
	.long	0x00000000                      # float 0
	.size	overall, 4

	.type	buffer,@object                  # @buffer
	.globl	buffer
	.p2align	4, 0x0
buffer:
	.zero	10000
	.size	buffer, 10000

	.type	pbuff,@object                   # @pbuff
	.globl	pbuff
	.p2align	3, 0x0
pbuff:
	.quad	0
	.size	pbuff, 8

	.type	classIdArray,@object            # @classIdArray
	.globl	classIdArray
	.p2align	3, 0x0
classIdArray:
	.quad	0
	.size	classIdArray, 8

	.type	groupIdArray,@object            # @groupIdArray
	.globl	groupIdArray
	.p2align	3, 0x0
groupIdArray:
	.quad	0
	.size	groupIdArray, 8

	.type	roomIdArray,@object             # @roomIdArray
	.globl	roomIdArray
	.p2align	3, 0x0
roomIdArray:
	.quad	0
	.size	roomIdArray, 8

	.type	roomSizeAsArray,@object         # @roomSizeAsArray
	.globl	roomSizeAsArray
	.p2align	3, 0x0
roomSizeAsArray:
	.quad	0
	.size	roomSizeAsArray, 8

	.type	groupSizeAsArray,@object        # @groupSizeAsArray
	.globl	groupSizeAsArray
	.p2align	3, 0x0
groupSizeAsArray:
	.quad	0
	.size	groupSizeAsArray, 8

	.type	timeSlotIdArray,@object         # @timeSlotIdArray
	.globl	timeSlotIdArray
	.p2align	3, 0x0
timeSlotIdArray:
	.quad	0
	.size	timeSlotIdArray, 8

	.type	profIdArray,@object             # @profIdArray
	.globl	profIdArray
	.p2align	3, 0x0
profIdArray:
	.quad	0
	.size	profIdArray, 8

	.type	clashes,@object                 # @clashes
	.globl	clashes
	.p2align	3, 0x0
clashes:
	.quad	0
	.size	clashes, 8

	.type	dclassIdArray,@object           # @dclassIdArray
	.globl	dclassIdArray
	.p2align	3, 0x0
dclassIdArray:
	.quad	0
	.size	dclassIdArray, 8

	.type	dgroupIdArray,@object           # @dgroupIdArray
	.globl	dgroupIdArray
	.p2align	3, 0x0
dgroupIdArray:
	.quad	0
	.size	dgroupIdArray, 8

	.type	droomIdArray,@object            # @droomIdArray
	.globl	droomIdArray
	.p2align	3, 0x0
droomIdArray:
	.quad	0
	.size	droomIdArray, 8

	.type	droomSizeAsArray,@object        # @droomSizeAsArray
	.globl	droomSizeAsArray
	.p2align	3, 0x0
droomSizeAsArray:
	.quad	0
	.size	droomSizeAsArray, 8

	.type	dgroupSizeAsArray,@object       # @dgroupSizeAsArray
	.globl	dgroupSizeAsArray
	.p2align	3, 0x0
dgroupSizeAsArray:
	.quad	0
	.size	dgroupSizeAsArray, 8

	.type	dtimeSlotIdArray,@object        # @dtimeSlotIdArray
	.globl	dtimeSlotIdArray
	.p2align	3, 0x0
dtimeSlotIdArray:
	.quad	0
	.size	dtimeSlotIdArray, 8

	.type	dprofIdArray,@object            # @dprofIdArray
	.globl	dprofIdArray
	.p2align	3, 0x0
dprofIdArray:
	.quad	0
	.size	dprofIdArray, 8

	.type	dclashes,@object                # @dclashes
	.globl	dclashes
	.p2align	3, 0x0
dclashes:
	.quad	0
	.size	dclashes, 8

	.type	_Z16calculateFitnessPiS_S_S_S_S_S_S_,@object # @_Z16calculateFitnessPiS_S_S_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z16calculateFitnessPiS_S_S_S_S_S_S_
	.p2align	3, 0x0
_Z16calculateFitnessPiS_S_S_S_S_S_S_:
	.quad	_Z31__device_stub__calculateFitnessPiS_S_S_S_S_S_S_
	.size	_Z16calculateFitnessPiS_S_S_S_S_S_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16calculateFitnessPiS_S_S_S_S_S_S_"
	.size	.L__unnamed_1, 37

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	_GLOBAL__sub_I_calculateFitness.hip
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__calculateFitnessPiS_S_S_S_S_S_S_
	.addrsig_sym _GLOBAL__sub_I_calculateFitness.hip
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16calculateFitnessPiS_S_S_S_S_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16calculateFitnessPiS_S_S_S_S_S_S_ ; -- Begin function _Z16calculateFitnessPiS_S_S_S_S_S_S_
	.globl	_Z16calculateFitnessPiS_S_S_S_S_S_S_
	.p2align	8
	.type	_Z16calculateFitnessPiS_S_S_S_S_S_S_,@function
_Z16calculateFitnessPiS_S_S_S_S_S_S_:   ; @_Z16calculateFitnessPiS_S_S_S_S_S_S_
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_lshlrev_b32_e32 v2, 2, v0
	s_mov_b32 s2, s15
	s_ashr_i32 s3, s15, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v2, s[4:5]
	s_add_u32 s18, s4, s12
	s_addc_u32 s19, s5, s13
	s_load_b32 s3, s[18:19], 0x0
	s_clause 0x1
	s_load_b128 s[12:15], s[0:1], 0x20
	s_load_b64 s[16:17], s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v5, s3
	v_add_co_u32 v3, s0, s4, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, null, s5, 0, s0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e64 s3, v1
	s_cbranch_execz .LBB0_4
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_co_u32 v7, vcc_lo, s10, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, s12, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v8, vcc_lo
	global_load_b32 v2, v[5:6], off
	global_load_b32 v5, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v5
	v_mov_b32_e32 v2, v1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_mad_u64_u32 v[1:2], null, v0, s2, v[0:1]
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s16, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s17, v2, vcc_lo
	global_load_b32 v5, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, 1, v5
	global_store_b32 v[1:2], v5, off
	s_clause 0x1
	global_load_b32 v1, v6, s[18:19]
	global_load_b32 v2, v[3:4], off
.LBB0_3:                                ; %Flow89
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v5, v1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v1, v2
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v14, vcc_lo, s7, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v11, v[11:12], off
	global_load_b32 v12, v[13:14], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e64 v11, v12
	s_cbranch_execz .LBB0_8
; %bb.5:
	v_add_co_u32 v9, vcc_lo, s14, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s15, v10, vcc_lo
	v_add_co_u32 v7, vcc_lo, s14, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s15, v8, vcc_lo
	v_cmp_ne_u32_e64 s0, v1, v5
	s_clause 0x1
	global_load_b32 v9, v[9:10], off
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v9, v7
	s_and_b32 s3, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_mad_u64_u32 v[1:2], null, v0, s2, v[0:1]
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s16, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s17, v2, vcc_lo
	global_load_b32 v5, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, 1, v5
	global_store_b32 v[1:2], v5, off
	s_clause 0x1
	global_load_b32 v1, v[3:4], off
	global_load_b32 v5, v6, s[18:19]
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v5
.LBB0_7:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_8:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s1
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_cmp_ne_u32_e64 s0, v1, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s14, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_mad_u64_u32 v[1:2], null, v0, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, 1, v2
	global_store_b32 v[0:1], v2, off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16calculateFitnessPiS_S_S_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 64
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16calculateFitnessPiS_S_S_S_S_S_S_, .Lfunc_end0-_Z16calculateFitnessPiS_S_S_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 832
; NumSgprs: 22
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 64
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16calculateFitnessPiS_S_S_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z16calculateFitnessPiS_S_S_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
