#include <cuda_runtime.h>
#include <iostream>
#include <cstdlib>
using namespace std;

__global__ void
cuda_saxpy(float alpha, float* x, float*y, size_t size) {
  size_t i = threadIdx.x;
  if (i < size) y[i] += alpha * x[i];
}

__global__ void
cuda_sscal(float alpha, float* x, size_t size) {
  size_t i = threadIdx.x;
  if (i < size) x[i] *= alpha;
}

template <typename Dtype>
class CudaTensor {
public:
  Dtype* ddata = nullptr; // data on device
  size_t shape = 0;

  CudaTensor(size_t length) {
    shape = length;
    cudaMalloc((void**)&ddata, sizeof(Dtype)*length);
  }

  void take(Dtype* src, size_t sz) {
    cudaMemcpy(ddata, src, sizeof(Dtype)*sz,
      cudaMemcpyHostToDevice);
  }

  void give(Dtype* dest, size_t sz) {
    cudaMemcpy(dest, ddata, sizeof(Dtype)*sz,
      cudaMemcpyDeviceToHost);
  }

  void dump(void) {
    Dtype* data = (Dtype*)malloc(sizeof(Dtype)*shape);
    give(data, shape);
    for (size_t i = 0; i < shape; i++)
      cout << data[i];
    free(data);
  }

  void scal_(Dtype c) {
    cuda_sscal<<<1,10>>>(c, ddata, shape);
  }

};

int
main(void)
{
  float* a_h = (float*)malloc(sizeof(float)*10);
  for (size_t i = 0; i < 10; i++) a_h[i] = 2.;
  float* b_h = (float*)malloc(sizeof(float)*10);

  for (size_t i = 0; i < 10; i++) cout << a_h[i] << endl;
  cout << endl;

  float* a_d = nullptr;
  cudaMalloc((void**)&a_d, sizeof(float)*10);
  cudaMemcpy(a_d, a_h, sizeof(float)*10, cudaMemcpyHostToDevice);
  
  cuda_saxpy<<<1, 256>>>(1., a_d, a_d, 10);

  cudaMemcpy(b_h, a_d, sizeof(float)*10, cudaMemcpyDeviceToHost);

  
  for (size_t i = 0; i < 10; i++) cout << b_h[i] << endl;
  cout << endl;

  cudaFree(a_d);
  free(a_h); free(b_h);

  cout << "cudatensor" << endl;

  CudaTensor<float> x (10);
  x.dump();
  x.scal_(0.5);
  x.dump();

  return 0;
}

	.file	"tmpxft_002e98a6_00000000-6_cudatensor.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3643:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3643:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4307:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4307:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z34__device_stub__Z10cuda_saxpyfPfS_mfPfS_m
	.type	_Z34__device_stub__Z10cuda_saxpyfPfS_mfPfS_m, @function
_Z34__device_stub__Z10cuda_saxpyfPfS_mfPfS_m:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 16(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 28(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10cuda_saxpyfPfS_m(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z34__device_stub__Z10cuda_saxpyfPfS_mfPfS_m, .-_Z34__device_stub__Z10cuda_saxpyfPfS_mfPfS_m
	.globl	_Z10cuda_saxpyfPfS_m
	.type	_Z10cuda_saxpyfPfS_m, @function
_Z10cuda_saxpyfPfS_m:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10cuda_saxpyfPfS_mfPfS_m
	.cfi_endproc
.LFE3666:
	.size	_Z10cuda_saxpyfPfS_m, .-_Z10cuda_saxpyfPfS_m
	.globl	_Z32__device_stub__Z10cuda_sscalfPfmfPfm
	.type	_Z32__device_stub__Z10cuda_sscalfPfmfPfm, @function
_Z32__device_stub__Z10cuda_sscalfPfmfPfm:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 16(%rsp)
	leaq	40(%rsp), %rcx
	leaq	32(%rsp), %rdx
	movq	%rsi, 8(%rsp)
	leaq	48(%rsp), %rdi
	leaq	60(%rsp), %rsi
	movss	%xmm0, 28(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10cuda_sscalfPfm(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L9:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z32__device_stub__Z10cuda_sscalfPfmfPfm, .-_Z32__device_stub__Z10cuda_sscalfPfmfPfm
	.globl	_Z10cuda_sscalfPfm
	.type	_Z10cuda_sscalfPfm, @function
_Z10cuda_sscalfPfm:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10cuda_sscalfPfmfPfm
	.cfi_endproc
.LFE3668:
	.size	_Z10cuda_sscalfPfm, .-_Z10cuda_sscalfPfm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10cuda_sscalfPfm"
.LC1:
	.string	"_Z10cuda_saxpyfPfS_m"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3670:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10cuda_sscalfPfm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10cuda_saxpyfPfS_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3670:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZN10CudaTensorIfE4dumpEv,"axG",@progbits,_ZN10CudaTensorIfE4dumpEv,comdat
	.align 2
	.weak	_ZN10CudaTensorIfE4dumpEv
	.type	_ZN10CudaTensorIfE4dumpEv, @function
_ZN10CudaTensorIfE4dumpEv:
.LFB3977:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	_ZSt4cout(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
	movq	8(%rdi), %rax
	leaq	0(,%rax,4), %r12
	movq	%r12, %rdi
	call	malloc@PLT
	movq	0(%rbp), %rsi
	movq	%r12, %rdx
	movl	$2, %ecx
	movq	%rax, %rdi
	movq	%rax, %rbx
	xorl	%r12d, %r12d
	call	cudaMemcpy@PLT
.L17:
	cmpq	8(%rbp), %r12
	jnb	.L20
	movq	%r13, %rdi
	cvtss2sd	(%rbx,%r12,4), %xmm0
	incq	%r12
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	jmp	.L17
.L20:
	popq	%rax
	.cfi_def_cfa_offset 40
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE3977:
	.size	_ZN10CudaTensorIfE4dumpEv, .-_ZN10CudaTensorIfE4dumpEv
	.section	.rodata.str1.1
.LC4:
	.string	"cudatensor"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$40, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movss	.LC2(%rip), %xmm0
	movq	%rax, %rbx
	xorl	%eax, %eax
.L22:
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$10, %rax
	jne	.L22
	movl	$40, %edi
	xorl	%r13d, %r13d
	leaq	_ZSt4cout(%rip), %rbp
	call	malloc@PLT
	movq	%rax, %r12
.L23:
	movq	%rbp, %rdi
	cvtss2sd	(%rbx,%r13,4), %xmm0
	incq	%r13
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	$10, %r13
	jne	.L23
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%edx, %edx
	leaq	8(%rsp), %rdi
	movl	$40, %esi
	movq	%rdx, 8(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$40, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rdi, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	8(%rsp), %rdi
	movss	.LC3(%rip), %xmm0
	movl	$10, %edx
	movq	%rdi, %rsi
	call	_Z34__device_stub__Z10cuda_saxpyfPfS_mfPfS_m
.L24:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	xorl	%r13d, %r13d
	movl	$40, %edx
	call	cudaMemcpy@PLT
.L25:
	movq	%rbp, %rdi
	cvtss2sd	(%r12,%r13,4), %xmm0
	incq	%r13
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	$10, %r13
	jne	.L25
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	leaq	40(%rsp), %rbx
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
	movl	$40, %esi
	movq	%rbx, %rdi
	movq	%rax, 40(%rsp)
	movq	$10, 48(%rsp)
	call	cudaMalloc@PLT
	movq	%rbx, %rdi
	call	_ZN10CudaTensorIfE4dumpEv
	movl	$2147483653, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdx, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	movss	.LC5(%rip), %xmm0
	call	_Z32__device_stub__Z10cuda_sscalfPfmfPfm
.L26:
	movq	%rbx, %rdi
	call	_ZN10CudaTensorIfE4dumpEv
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1073741824
	.align 4
.LC3:
	.long	1065353216
	.align 4
.LC5:
	.long	1056964608
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
using namespace std;

__global__ void
cuda_saxpy(float alpha, float* x, float*y, size_t size) {
  size_t i = threadIdx.x;
  if (i < size) y[i] += alpha * x[i];
}

__global__ void
cuda_sscal(float alpha, float* x, size_t size) {
  size_t i = threadIdx.x;
  if (i < size) x[i] *= alpha;
}

template <typename Dtype>
class CudaTensor {
public:
  Dtype* ddata = nullptr; // data on device
  size_t shape = 0;

  CudaTensor(size_t length) {
    shape = length;
    hipMalloc((void**)&ddata, sizeof(Dtype)*length);
  }

  void take(Dtype* src, size_t sz) {
    hipMemcpy(ddata, src, sizeof(Dtype)*sz,
      hipMemcpyHostToDevice);
  }

  void give(Dtype* dest, size_t sz) {
    hipMemcpy(dest, ddata, sizeof(Dtype)*sz,
      hipMemcpyDeviceToHost);
  }

  void dump(void) {
    Dtype* data = (Dtype*)malloc(sizeof(Dtype)*shape);
    give(data, shape);
    for (size_t i = 0; i < shape; i++)
      cout << data[i];
    free(data);
  }

  void scal_(Dtype c) {
    cuda_sscal<<<1,10>>>(c, ddata, shape);
  }

};

int
main(void)
{
  float* a_h = (float*)malloc(sizeof(float)*10);
  for (size_t i = 0; i < 10; i++) a_h[i] = 2.;
  float* b_h = (float*)malloc(sizeof(float)*10);

  for (size_t i = 0; i < 10; i++) cout << a_h[i] << endl;
  cout << endl;

  float* a_d = nullptr;
  hipMalloc((void**)&a_d, sizeof(float)*10);
  hipMemcpy(a_d, a_h, sizeof(float)*10, hipMemcpyHostToDevice);
  
  cuda_saxpy<<<1, 256>>>(1., a_d, a_d, 10);

  hipMemcpy(b_h, a_d, sizeof(float)*10, hipMemcpyDeviceToHost);

  
  for (size_t i = 0; i < 10; i++) cout << b_h[i] << endl;
  cout << endl;

  hipFree(a_d);
  free(a_h); free(b_h);

  cout << "cudatensor" << endl;

  CudaTensor<float> x (10);
  x.dump();
  x.scal_(0.5);
  x.dump();

  return 0;
}

	.text
	.file	"cudatensor.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__cuda_saxpyfPfS_m # -- Begin function _Z25__device_stub__cuda_saxpyfPfS_m
	.type	_Z25__device_stub__cuda_saxpyfPfS_m,@function
_Z25__device_stub__cuda_saxpyfPfS_m:    # @_Z25__device_stub__cuda_saxpyfPfS_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movss	%xmm0, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10cuda_saxpyfPfS_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__cuda_saxpyfPfS_m, .Lfunc_end0-_Z25__device_stub__cuda_saxpyfPfS_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__cuda_sscalfPfm # -- Begin function _Z25__device_stub__cuda_sscalfPfm
	.type	_Z25__device_stub__cuda_sscalfPfm,@function
_Z25__device_stub__cuda_sscalfPfm:      # @_Z25__device_stub__cuda_sscalfPfm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movss	%xmm0, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10cuda_sscalfPfm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__cuda_sscalfPfm, .Lfunc_end1-_Z25__device_stub__cuda_sscalfPfm
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3f800000                      # float 1
.LCPI2_1:
	.long	0x3f000000                      # float 0.5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$40, %edi
	callq	malloc
	movq	%rax, %rbx
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1073741824, (%rbx,%rax,4)      # imm = 0x40000000
	incq	%rax
	cmpq	$10, %rax
	jne	.LBB2_1
# %bb.2:
	movl	$40, %edi
	callq	malloc
	movq	%rax, %r14
	xorl	%r12d, %r12d
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB2_3
# %bb.4:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rsp, %r15
	movq	$0, (%r15)
	movl	$40, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$40, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	(%rsp), %rdi
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$10, %edx
	movq	%rdi, %rsi
	callq	_Z25__device_stub__cuda_saxpyfPfS_m
.LBB2_6:
	movq	(%rsp), %rsi
	movl	$40, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r12d, %r12d
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB2_7
# %bb.8:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %r15d
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	8(%rsp), %rbx
	movq	$0, (%rbx)
	movq	$10, 8(%rbx)
	movl	$40, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	%rbx, %rdi
	callq	_ZN10CudaTensorIfE4dumpEv
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movq	%rbx, %rdi
	callq	_ZN10CudaTensorIfE5scal_Ef
	movq	%rbx, %rdi
	callq	_ZN10CudaTensorIfE4dumpEv
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN10CudaTensorIfE4dumpEv,"axG",@progbits,_ZN10CudaTensorIfE4dumpEv,comdat
	.weak	_ZN10CudaTensorIfE4dumpEv       # -- Begin function _ZN10CudaTensorIfE4dumpEv
	.p2align	1, 0x90
	.type	_ZN10CudaTensorIfE4dumpEv,@function
_ZN10CudaTensorIfE4dumpEv:              # @_ZN10CudaTensorIfE4dumpEv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movq	8(%rdi), %r15
	shlq	$2, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	(%rbx), %rsi
	movq	%rax, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cmpq	$0, 8(%rbx)
	je	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	incq	%r15
	cmpq	8(%rbx), %r15
	jb	.LBB3_2
.LBB3_3:                                # %._crit_edge
	movq	%r14, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.Lfunc_end3:
	.size	_ZN10CudaTensorIfE4dumpEv, .Lfunc_end3-_ZN10CudaTensorIfE4dumpEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN10CudaTensorIfE5scal_Ef,"axG",@progbits,_ZN10CudaTensorIfE5scal_Ef,comdat
	.weak	_ZN10CudaTensorIfE5scal_Ef      # -- Begin function _ZN10CudaTensorIfE5scal_Ef
	.p2align	1, 0x90
	.type	_ZN10CudaTensorIfE5scal_Ef,@function
_ZN10CudaTensorIfE5scal_Ef:             # @_ZN10CudaTensorIfE5scal_Ef
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rdi, %rbx
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	9(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB4_2
# %bb.1:
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB4_2:
	.cfi_def_cfa_offset 32
	movq	(%rbx), %rdi
	movq	8(%rbx), %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_Z25__device_stub__cuda_sscalfPfm # TAILCALL
.Lfunc_end4:
	.size	_ZN10CudaTensorIfE5scal_Ef, .Lfunc_end4-_ZN10CudaTensorIfE5scal_Ef
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10cuda_saxpyfPfS_m, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10cuda_sscalfPfm, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10cuda_saxpyfPfS_m,@object    # @_Z10cuda_saxpyfPfS_m
	.section	.rodata,"a",@progbits
	.globl	_Z10cuda_saxpyfPfS_m
	.p2align	3, 0x0
_Z10cuda_saxpyfPfS_m:
	.quad	_Z25__device_stub__cuda_saxpyfPfS_m
	.size	_Z10cuda_saxpyfPfS_m, 8

	.type	_Z10cuda_sscalfPfm,@object      # @_Z10cuda_sscalfPfm
	.globl	_Z10cuda_sscalfPfm
	.p2align	3, 0x0
_Z10cuda_sscalfPfm:
	.quad	_Z25__device_stub__cuda_sscalfPfm
	.size	_Z10cuda_sscalfPfm, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"cudatensor"
	.size	.L.str, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10cuda_saxpyfPfS_m"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10cuda_sscalfPfm"
	.size	.L__unnamed_2, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__cuda_saxpyfPfS_m
	.addrsig_sym _Z25__device_stub__cuda_sscalfPfm
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10cuda_saxpyfPfS_m
	.addrsig_sym _Z10cuda_sscalfPfm
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10cuda_saxpyfPfS_m    ; -- Begin function _Z10cuda_saxpyfPfS_m
	.globl	_Z10cuda_saxpyfPfS_m
	.p2align	8
	.type	_Z10cuda_saxpyfPfS_m,@function
_Z10cuda_saxpyfPfS_m:                   ; @_Z10cuda_saxpyfPfS_m
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x18
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[0:1]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x8
	v_lshlrev_b32_e32 v0, 2, v0
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5]
	global_load_b32 v2, v0, s[6:7]
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, s0, v1
	global_store_b32 v0, v2, s[6:7]
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10cuda_saxpyfPfS_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10cuda_saxpyfPfS_m, .Lfunc_end0-_Z10cuda_saxpyfPfS_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 104
; NumSgprs: 10
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10cuda_sscalfPfm      ; -- Begin function _Z10cuda_sscalfPfm
	.globl	_Z10cuda_sscalfPfm
	.p2align	8
	.type	_Z10cuda_sscalfPfm,@function
_Z10cuda_sscalfPfm:                     ; @_Z10cuda_sscalfPfm
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x8
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u64_e64 s[6:7], v[0:1]
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b32 s0, s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	global_load_b32 v1, v0, s[4:5]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v1, s0, v1
	global_store_b32 v0, v1, s[4:5]
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10cuda_sscalfPfm
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10cuda_sscalfPfm, .Lfunc_end1-_Z10cuda_sscalfPfm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 84
; NumSgprs: 8
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10cuda_saxpyfPfS_m
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z10cuda_saxpyfPfS_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10cuda_sscalfPfm
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z10cuda_sscalfPfm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
