#include <iostream>
#include <math.h>
#include <cuda.h>
using namespace std;
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with variable coefficient                         !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void DivCPU(double* Dn, double* Phi, double* U, double* V, int row, int col,double delX,double delY){


for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){
      int k    = i*col+j;
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ee  = 0.5*(UE*PhiE+UP*PhiP);
   double Ew  = 0.5*(UW*PhiW+UP*PhiP);
   double Fn  = 0.5*(VN*PhiN+VP*PhiP);
   double Fs  = 0.5*(VS*PhiS+VP*PhiP);
   Dn[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
      }
   }
}



__global__ void Div(double* Dn, double* Phi, double* U, double* V, int row, int col,double delX,double delY){

   // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int n  = (row-1)*(col-1);
    // Do for only inner points
    if (k >0 && k<n) {

   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ee  = 0.5*(UE*PhiE+UP*PhiP);
   double Ew  = 0.5*(UW*PhiW+UP*PhiP);
   double Fn  = 0.5*(VN*PhiN+VP*PhiP);
   double Fs  = 0.5*(VS*PhiS+VP*PhiP);
   Dn[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
      }
   }

//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with No coefficient                               !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!

__global__ void Divergence(double* Dn, double* U, double* V,int row, int col, double delX, double delY){

   // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int n  = (row-1)*(col-1);
    // Do for only inner points
    if (k >0 && k<n) {

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
  // double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ue = 0.5*(UE+UP);
   double Uw = 0.5*(UW+UP);
   //double Un = 0.5*(UN+UP);
   //double Us = 0.5*(US+UP);

  // double Ve = 0.5*(VE+VP);
  // double Vw = 0.5*(VW+VP);
   double Vn = 0.5*(VN+VP);
   double Vs = 0.5*(VS+VP);

  Dn[k] = (Ue-Uw)*delY+(Vn-Vs)*delX;
   
 }
}

 void DivergenceCPU(double* Dn, double* U, double* V,int row, int col, double delX, double delY){

for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){
    int k = i*col+j;
   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
  // double VE = V[k+1];
  // double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ue = 0.5*(UE+UP);
   double Uw = 0.5*(UW+UP);
   //double Un = 0.5*(UN+UP);
   //double Us = 0.5*(US+UP);

  // double Ve = 0.5*(VE+VP);
   //double Vw = 0.5*(VW+VP);
   double Vn = 0.5*(VN+VP);
   double Vs = 0.5*(VS+VP);

  Dn[k] = (Ue-Uw)*delY+(Vn-Vs)*delX;
   }
 }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Laplacian of a Scalar                                                    !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void LaplacianCPU(double* Ln, double *Phi, int row, int col, double delX, double delY){
for(int i = 1; i<(row-1); i++){
 for(int j =1; j<(col-1); j++){
   int k = i*col+j;
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double Ee  = (PhiE-PhiP)/delX;
   double Ew  = (PhiP-PhiW)/delX;
   double Fn  = (PhiN-PhiP)/delY;
   double Fs  = (PhiP-PhiS)/delY;
   Ln[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
     }
  }
}

__global__ void Laplacian(double* Ln, double *Phi, int row, int col, double delX, double delY){
   // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int n  = (row-1)*(col-1);
    // Do for only inner points
    if (k >0 && k<n) {

   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double Ee  = (PhiE-PhiP)/delX;
   double Ew  = (PhiP-PhiW)/delX;
   double Fn  = (PhiN-PhiP)/delY;
   double Fs  = (PhiP-PhiS)/delY;
   Ln[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
}

}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Gradient Computation using Finite Volume                                 !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void gradient(double* gradxPhi,double* gradyPhi,
              double* vfacePhi,double* hfacePhi,
			        int cellRow, int cellCol, double delX, double delY,
              int vfaceCol, int hfaceCol){
for(int i = 1; i<(cellRow-1); ++i){
 for(int j =1; j<(cellCol-1); ++j){


   double Phie = vfacePhi[i*vfaceCol+(j+1)];
   double Phiw = vfacePhi[i*vfaceCol+j];
   double Phin = hfacePhi[i*hfaceCol+j];
   double Phis = hfacePhi[(i+1)*hfaceCol+j];

   gradxPhi[i*cellCol+j] = (Phie-Phiw)/delX;
   gradyPhi[i*cellCol+j] = (Phin-Phis)/delY;
    }
  }
}


//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Gradient Computation using Finite Difference                             !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
__global__ void gradient(double* gradxPhi,double* gradyPhi,double* Phi,
                        int row, int col, double delX, double delY){
   // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int n  = (row-1)*(col-1);
    // Do for only inner points
    if (k >0 && k<n) {

   double Phie = Phi[k+1];
   double Phiw = Phi[k-1];
   double Phin = Phi[k-col];
   double Phis = Phi[k+col];

   gradxPhi[k] = (Phie-Phiw)/(2*delX);
   gradyPhi[k] = (Phin-Phis)/(2*delY);
    
  }
}

void gradientCPU(double* gradxPhi,double* gradyPhi,double* Phi,
                        int row, int col, double delX, double delY){
for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){

   int k = i*col+j;
   double Phie = Phi[k+1];
   double Phiw = Phi[k-1];
   double Phin = Phi[k-col];
   double Phis = Phi[k+col];

   gradxPhi[k] = (Phie-Phiw)/(2*delX);
   gradyPhi[k] = (Phin-Phis)/(2*delY);
    }
  }
}

//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Interpolation of Vertex Values                                           !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!

void vertexInterpolate(double* vertPhi, double* cellPhi, int vertRow, int vertCol, int cellCol){
// Inner Points
for(int i = 1; i<(vertRow-1); ++i){
 for(int j =1; j<(vertCol-1); ++j){

double Ta = cellPhi[(i-1)*cellCol+(j-1)]; // NW
double Tb = cellPhi[(i-1)*cellCol+j];    // NE
double Tc = cellPhi[(i*cellCol)+(j-1)];      // SW
double Td = cellPhi[i*cellCol+j];      //SE

vertPhi[i*vertCol+j]=0.25*(Ta+Tb+Tc+Td);
   }
 }
//Boundary points - Set it to Boundary Cell points
//North Boundary
    for (int i = 0; i<vertCol; i++){
        vertPhi[i]= cellPhi[i+vertCol];
    }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Interpolation of Vertical FaceCenter Interpolation                       !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void vfaceInterpolate(double* vfacePhi, double* vertPhi,
                      double* cellPhi, int vfaceRow, int vfaceCol,
                      int vertCol, int cellCol){

for(int i = 1; i<(vfaceRow-1); ++i){
 for(int j =1; j<(vfaceCol-1); ++j){

double Ta = cellPhi[i*cellCol+(j-1)]; // West cell
double Tb = cellPhi[i*cellCol+j];     // East cell
double Tc = vertPhi[i*vertCol+j];     // North Vertex
double Td = vertPhi[(i+1)*vertCol+j]; //South Vertex

vfacePhi[i*vfaceCol+j]=0.25*(Ta+Tb+Tc+Td);
  }
}

}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Interpolation of Horizontal FaceCenter Interpolation                     !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void hfaceInterpolate(double* hfacePhi, double* vertPhi,
                      double* cellPhi, int hfaceRow, int hfaceCol,
                      int vertCol, int cellCol){
for(int i = 1; i<(hfaceRow-1); ++i){
 for(int j =1; j<(hfaceCol-1); ++j){

double Ta = vertPhi[i*vertCol+j]; // West vertex
double Tb = vertPhi[i*vertCol+(j+1)];     // East vertex
double Tc = cellPhi[(i-1)*cellCol+j];     // North cell
double Td = cellPhi[i*cellCol+j]; //South cell

hfacePhi[i*hfaceCol+j]=0.25*(Ta+Tb+Tc+Td);
 }
}
}



	.file	"tmpxft_0035c3d1_00000000-6_finiteVolumeOperators.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3645:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3645:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z6DivCPUPdS_S_S_iidd
	.type	_Z6DivCPUPdS_S_S_iidd, @function
_Z6DivCPUPdS_S_S_iidd:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movsd	.LC0(%rip), %xmm3
	movq	%rcx, %r10
	movaps	%xmm0, %xmm4
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	decl	%r8d
	movslq	%r9d, %r14
	leal	-1(%r9), %r15d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$1, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	movq	%rdx, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
.L3:
	cmpl	%r13d, %r8d
	jle	.L2
	movslq	%r12d, %rax
	movl	$1, %ebx
	movq	%rax, %rcx
	leaq	0(,%rax,8), %rdx
	addq	%r14, %rax
	subq	%r14, %rcx
	salq	$3, %rax
	movq	%rdx, %r11
	salq	$3, %rcx
.L6:
	addq	$8, %rdx
	addq	$8, %rcx
	addq	$8, %rax
	addq	$8, %r11
	cmpl	%ebx, %r15d
	jle	.L9
	movsd	(%rsi,%rdx), %xmm5
	movsd	(%rdi,%rdx), %xmm6
	incl	%ebx
	movsd	(%rsi,%rcx), %xmm0
	movsd	(%rsi,%rax), %xmm2
	mulsd	%xmm5, %xmm6
	mulsd	(%r10,%rcx), %xmm0
	mulsd	(%r10,%r11), %xmm5
	mulsd	(%r10,%rax), %xmm2
	addsd	%xmm5, %xmm0
	addsd	%xmm5, %xmm2
	movsd	-8(%rsi,%rdx), %xmm5
	mulsd	-8(%rdi,%rdx), %xmm5
	mulsd	%xmm3, %xmm0
	mulsd	%xmm3, %xmm2
	addsd	%xmm6, %xmm5
	subsd	%xmm2, %xmm0
	movsd	8(%rsi,%rdx), %xmm2
	mulsd	8(%rdi,%rdx), %xmm2
	mulsd	%xmm3, %xmm5
	mulsd	%xmm4, %xmm0
	addsd	%xmm6, %xmm2
	mulsd	%xmm3, %xmm2
	subsd	%xmm5, %xmm2
	mulsd	%xmm1, %xmm2
	addsd	%xmm2, %xmm0
	movsd	%xmm0, 0(%rbp,%r11)
	jmp	.L6
.L9:
	incl	%r13d
	addl	%r9d, %r12d
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z6DivCPUPdS_S_S_iidd, .-_Z6DivCPUPdS_S_S_iidd
	.globl	_Z13DivergenceCPUPdS_S_iidd
	.type	_Z13DivergenceCPUPdS_S_iidd, @function
_Z13DivergenceCPUPdS_S_iidd:
.LFB3636:
	.cfi_startproc
	endbr64
	movslq	%r8d, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movsd	.LC0(%rip), %xmm4
	movq	%rdi, %r10
	imulq	$-8, %rax, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	movaps	%xmm0, %xmm5
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%r8d, %edi
	movl	$1, %r9d
	leal	-1(%rcx), %r11d
	leal	-1(%r8), %r12d
	leaq	(%rdx,%rax), %rbx
	subq	%rax, %rbp
.L11:
	cmpl	%r9d, %r11d
	jle	.L10
	movslq	%edi, %rax
	movl	$1, %ecx
	salq	$3, %rax
.L14:
	addq	$8, %rax
	cmpl	%ecx, %r12d
	jle	.L16
	movsd	(%rsi,%rax), %xmm2
	movsd	8(%rsi,%rax), %xmm0
	incl	%ecx
	movsd	(%rdx,%rax), %xmm3
	addsd	%xmm2, %xmm0
	addsd	-8(%rsi,%rax), %xmm2
	mulsd	%xmm4, %xmm0
	mulsd	%xmm4, %xmm2
	subsd	%xmm2, %xmm0
	movsd	(%rbx,%rax), %xmm2
	addsd	%xmm3, %xmm2
	addsd	0(%rbp,%rax), %xmm3
	mulsd	%xmm1, %xmm0
	mulsd	%xmm4, %xmm2
	mulsd	%xmm4, %xmm3
	subsd	%xmm3, %xmm2
	mulsd	%xmm5, %xmm2
	addsd	%xmm2, %xmm0
	movsd	%xmm0, (%r10,%rax)
	jmp	.L14
.L16:
	incl	%r9d
	addl	%r8d, %edi
	jmp	.L11
.L10:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z13DivergenceCPUPdS_S_iidd, .-_Z13DivergenceCPUPdS_S_iidd
	.globl	_Z12LaplacianCPUPdS_iidd
	.type	_Z12LaplacianCPUPdS_iidd, @function
_Z12LaplacianCPUPdS_iidd:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r8
	movaps	%xmm0, %xmm4
	movl	%ecx, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	$1, %r10d
	leal	-1(%rdx), %r11d
	leal	-1(%rcx), %r12d
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movslq	%ecx, %rbx
	imulq	$-8, %rbx, %rbp
.L18:
	cmpl	%r10d, %r11d
	jle	.L17
	movslq	%r9d, %rdx
	xorl	%esi, %esi
	salq	$3, %rdx
	leaq	(%r8,%rdx), %rax
	addq	%rdi, %rdx
.L21:
	incq	%rsi
	addq	$8, %rax
	cmpl	%esi, %r12d
	jle	.L23
	movsd	(%rax), %xmm3
	movsd	(%rax,%rbp), %xmm0
	movaps	%xmm3, %xmm2
	subsd	%xmm3, %xmm0
	subsd	(%rax,%rbx,8), %xmm2
	divsd	%xmm1, %xmm0
	divsd	%xmm1, %xmm2
	subsd	%xmm2, %xmm0
	movsd	8(%rax), %xmm2
	subsd	%xmm3, %xmm2
	subsd	-8(%rax), %xmm3
	mulsd	%xmm4, %xmm0
	divsd	%xmm4, %xmm2
	divsd	%xmm4, %xmm3
	subsd	%xmm3, %xmm2
	mulsd	%xmm1, %xmm2
	addsd	%xmm2, %xmm0
	movsd	%xmm0, (%rdx,%rsi,8)
	jmp	.L21
.L23:
	incl	%r10d
	addl	%ecx, %r9d
	jmp	.L18
.L17:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z12LaplacianCPUPdS_iidd, .-_Z12LaplacianCPUPdS_iidd
	.globl	_Z8gradientPdS_S_S_iiddii
	.type	_Z8gradientPdS_S_S_iiddii, @function
_Z8gradientPdS_S_S_iiddii:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leal	-1(%r8), %eax
	movq	%rdx, %r11
	movl	%r9d, %r10d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leal	-1(%r9), %r15d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$1, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	64(%rsp), %esi
	movl	56(%rsp), %ebx
	movl	%eax, -4(%rsp)
.L25:
	cmpl	%r13d, -4(%rsp)
	jle	.L24
	movslq	%esi, %rdx
	movslq	%ebx, %rax
	addl	64(%rsp), %esi
	leaq	(%r11,%rax,8), %rdi
	leaq	(%rcx,%rdx,8), %r14
	movslq	%r10d, %rax
	movslq	%esi, %rdx
	leaq	(%rcx,%rdx,8), %r8
	salq	$3, %rax
	xorl	%edx, %edx
.L28:
	incq	%rdx
	addq	$8, %rdi
	addq	$8, %rax
	cmpl	%edx, %r15d
	jle	.L30
	movsd	(%r14,%rdx,8), %xmm2
	movsd	(%r8,%rdx,8), %xmm4
	movsd	8(%rdi), %xmm3
	subsd	(%rdi), %xmm3
	subsd	%xmm4, %xmm2
	divsd	%xmm0, %xmm3
	divsd	%xmm1, %xmm2
	movsd	%xmm3, 0(%rbp,%rax)
	movsd	%xmm2, (%r12,%rax)
	jmp	.L28
.L30:
	incl	%r13d
	addl	56(%rsp), %ebx
	addl	%r9d, %r10d
	jmp	.L25
.L24:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z8gradientPdS_S_S_iiddii, .-_Z8gradientPdS_S_S_iiddii
	.globl	_Z11gradientCPUPdS_S_iidd
	.type	_Z11gradientCPUPdS_S_iidd, @function
_Z11gradientCPUPdS_S_iidd:
.LFB3639:
	.cfi_startproc
	endbr64
	movslq	%r8d, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r9
	movq	%rsi, %r10
	imulq	$-8, %rax, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	movl	%r8d, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	$1, %edi
	leal	-1(%rcx), %r11d
	leal	-1(%r8), %r12d
	leaq	(%rdx,%rax), %rbx
	subq	%rax, %rbp
.L32:
	cmpl	%edi, %r11d
	jle	.L31
	movslq	%esi, %rax
	movl	$1, %ecx
	salq	$3, %rax
.L35:
	addq	$8, %rax
	cmpl	%ecx, %r12d
	jle	.L37
	movaps	%xmm0, %xmm5
	movsd	8(%rdx,%rax), %xmm3
	movsd	(%rbx,%rax), %xmm2
	incl	%ecx
	subsd	-8(%rdx,%rax), %xmm3
	addsd	%xmm0, %xmm5
	movsd	0(%rbp,%rax), %xmm4
	subsd	%xmm4, %xmm2
	divsd	%xmm5, %xmm3
	movsd	%xmm3, (%r9,%rax)
	movaps	%xmm1, %xmm3
	addsd	%xmm1, %xmm3
	divsd	%xmm3, %xmm2
	movsd	%xmm2, (%r10,%rax)
	jmp	.L35
.L37:
	incl	%edi
	addl	%r8d, %esi
	jmp	.L32
.L31:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z11gradientCPUPdS_S_iidd, .-_Z11gradientCPUPdS_S_iidd
	.globl	_Z17vertexInterpolatePdS_iii
	.type	_Z17vertexInterpolatePdS_iii, @function
_Z17vertexInterpolatePdS_iii:
.LFB3640:
	.cfi_startproc
	endbr64
	movsd	.LC1(%rip), %xmm1
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%ecx, %eax
	movl	%ecx, %r11d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	xorl	%r9d, %r9d
	leal	-1(%rcx), %r13d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leal	-1(%rdx), %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	$1, %ebx
.L39:
	cmpl	%ebx, %ebp
	jg	.L41
	movslq	%eax, %rdx
	leaq	(%rsi,%rdx,8), %rcx
	xorl	%edx, %edx
	jmp	.L42
.L41:
	movslq	%r9d, %rdx
	addl	%r8d, %r9d
	leaq	(%rsi,%rdx,8), %r10
	movslq	%r9d, %rdx
	leaq	(%rsi,%rdx,8), %rcx
	movslq	%r11d, %rdx
	leaq	(%rdi,%rdx,8), %r12
	xorl	%edx, %edx
.L43:
	incq	%rdx
	addq	$8, %r10
	addq	$8, %rcx
	cmpl	%edx, %r13d
	jle	.L46
	movsd	-8(%r10), %xmm0
	addsd	(%r10), %xmm0
	addsd	-8(%rcx), %xmm0
	addsd	(%rcx), %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%r12,%rdx,8)
	jmp	.L43
.L46:
	incl	%ebx
	addl	%eax, %r11d
	jmp	.L39
.L42:
	cmpl	%edx, %eax
	jle	.L47
	movsd	(%rcx,%rdx,8), %xmm0
	movsd	%xmm0, (%rdi,%rdx,8)
	incq	%rdx
	jmp	.L42
.L47:
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	_Z17vertexInterpolatePdS_iii, .-_Z17vertexInterpolatePdS_iii
	.globl	_Z16vfaceInterpolatePdS_S_iiii
	.type	_Z16vfaceInterpolatePdS_S_iiii, @function
_Z16vfaceInterpolatePdS_S_iiii:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leal	-1(%rcx), %eax
	movsd	.LC1(%rip), %xmm1
	movq	%rdx, %r11
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r10d
	movl	%r9d, %edx
	leal	-1(%r8), %r15d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	$1, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	56(%rsp), %ebx
	movl	%eax, -4(%rsp)
.L49:
	cmpl	%ebp, -4(%rsp)
	jle	.L48
	movslq	%edx, %rax
	addl	%r9d, %edx
	movslq	%ebx, %rcx
	leaq	(%rsi,%rax,8), %r14
	movslq	%edx, %rax
	leaq	(%r11,%rcx,8), %rcx
	leaq	(%rsi,%rax,8), %r13
	movslq	%r10d, %rax
	leaq	(%rdi,%rax,8), %r12
	xorl	%eax, %eax
.L52:
	incq	%rax
	addq	$8, %rcx
	cmpl	%eax, %r15d
	jle	.L54
	movsd	-8(%rcx), %xmm0
	addsd	(%rcx), %xmm0
	addsd	(%r14,%rax,8), %xmm0
	addsd	0(%r13,%rax,8), %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%r12,%rax,8)
	jmp	.L52
.L54:
	incl	%ebp
	addl	56(%rsp), %ebx
	addl	%r8d, %r10d
	jmp	.L49
.L48:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3641:
	.size	_Z16vfaceInterpolatePdS_S_iiii, .-_Z16vfaceInterpolatePdS_S_iiii
	.globl	_Z16hfaceInterpolatePdS_S_iiii
	.type	_Z16hfaceInterpolatePdS_S_iiii, @function
_Z16hfaceInterpolatePdS_S_iiii:
.LFB3642:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %eax
	movsd	.LC1(%rip), %xmm1
	movq	%rsi, %r11
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	decl	%eax
	movl	%r8d, %r10d
	xorl	%ecx, %ecx
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leal	-1(%r8), %r15d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	$1, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r9d, %ebx
	movl	%eax, -4(%rsp)
.L56:
	cmpl	%ebp, -4(%rsp)
	jle	.L55
	movslq	%ecx, %rax
	addl	56(%rsp), %ecx
	movslq	%ebx, %rsi
	leaq	(%rdx,%rax,8), %r14
	movslq	%ecx, %rax
	leaq	(%r11,%rsi,8), %rsi
	leaq	(%rdx,%rax,8), %r13
	movslq	%r10d, %rax
	leaq	(%rdi,%rax,8), %r12
	xorl	%eax, %eax
.L59:
	incq	%rax
	addq	$8, %rsi
	cmpl	%eax, %r15d
	jle	.L61
	movsd	(%rsi), %xmm0
	addsd	8(%rsi), %xmm0
	addsd	(%r14,%rax,8), %xmm0
	addsd	0(%r13,%rax,8), %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%r12,%rax,8)
	jmp	.L59
.L61:
	incl	%ebp
	addl	%r9d, %ebx
	addl	%r8d, %r10d
	jmp	.L56
.L55:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3642:
	.size	_Z16hfaceInterpolatePdS_S_iiii, .-_Z16hfaceInterpolatePdS_S_iiii
	.globl	_Z32__device_stub__Z3DivPdS_S_S_iiddPdS_S_S_iidd
	.type	_Z32__device_stub__Z3DivPdS_S_S_iiddPdS_S_S_iidd, @function
_Z32__device_stub__Z3DivPdS_S_S_iiddPdS_S_S_iidd:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movl	%r8d, 28(%rsp)
	movl	%r9d, 24(%rsp)
	movsd	%xmm0, 16(%rsp)
	movsd	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z3DivPdS_S_S_iidd(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L62:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z32__device_stub__Z3DivPdS_S_S_iiddPdS_S_S_iidd, .-_Z32__device_stub__Z3DivPdS_S_S_iiddPdS_S_S_iidd
	.globl	_Z3DivPdS_S_S_iidd
	.type	_Z3DivPdS_S_S_iidd, @function
_Z3DivPdS_S_S_iidd:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z3DivPdS_S_S_iiddPdS_S_S_iidd
	.cfi_endproc
.LFE3668:
	.size	_Z3DivPdS_S_S_iidd, .-_Z3DivPdS_S_S_iidd
	.globl	_Z38__device_stub__Z10DivergencePdS_S_iiddPdS_S_iidd
	.type	_Z38__device_stub__Z10DivergencePdS_S_iiddPdS_S_iidd, @function
_Z38__device_stub__Z10DivergencePdS_S_iiddPdS_S_iidd:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10DivergencePdS_S_iidd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L67:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L69
	call	__stack_chk_fail@PLT
.L69:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z38__device_stub__Z10DivergencePdS_S_iiddPdS_S_iidd, .-_Z38__device_stub__Z10DivergencePdS_S_iiddPdS_S_iidd
	.globl	_Z10DivergencePdS_S_iidd
	.type	_Z10DivergencePdS_S_iidd, @function
_Z10DivergencePdS_S_iidd:
.LFB3670:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z10DivergencePdS_S_iiddPdS_S_iidd
	.cfi_endproc
.LFE3670:
	.size	_Z10DivergencePdS_S_iidd, .-_Z10DivergencePdS_S_iidd
	.globl	_Z34__device_stub__Z9LaplacianPdS_iiddPdS_iidd
	.type	_Z34__device_stub__Z9LaplacianPdS_iiddPdS_iidd, @function
_Z34__device_stub__Z9LaplacianPdS_iiddPdS_iidd:
.LFB3671:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movsd	%xmm0, 16(%rsp)
	movsd	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L72
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9LaplacianPdS_iidd(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L72:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L74
	call	__stack_chk_fail@PLT
.L74:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3671:
	.size	_Z34__device_stub__Z9LaplacianPdS_iiddPdS_iidd, .-_Z34__device_stub__Z9LaplacianPdS_iiddPdS_iidd
	.globl	_Z9LaplacianPdS_iidd
	.type	_Z9LaplacianPdS_iidd, @function
_Z9LaplacianPdS_iidd:
.LFB3672:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9LaplacianPdS_iiddPdS_iidd
	.cfi_endproc
.LFE3672:
	.size	_Z9LaplacianPdS_iidd, .-_Z9LaplacianPdS_iidd
	.globl	_Z35__device_stub__Z8gradientPdS_S_iiddPdS_S_iidd
	.type	_Z35__device_stub__Z8gradientPdS_S_iiddPdS_S_iidd, @function
_Z35__device_stub__Z8gradientPdS_S_iiddPdS_S_iidd:
.LFB3673:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L77
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8gradientPdS_S_iidd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L77:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L79
	call	__stack_chk_fail@PLT
.L79:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3673:
	.size	_Z35__device_stub__Z8gradientPdS_S_iiddPdS_S_iidd, .-_Z35__device_stub__Z8gradientPdS_S_iiddPdS_S_iidd
	.globl	_Z8gradientPdS_S_iidd
	.type	_Z8gradientPdS_S_iidd, @function
_Z8gradientPdS_S_iidd:
.LFB3674:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z8gradientPdS_S_iiddPdS_S_iidd
	.cfi_endproc
.LFE3674:
	.size	_Z8gradientPdS_S_iidd, .-_Z8gradientPdS_S_iidd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z8gradientPdS_S_iidd"
.LC3:
	.string	"_Z9LaplacianPdS_iidd"
.LC4:
	.string	"_Z10DivergencePdS_S_iidd"
.LC5:
	.string	"_Z3DivPdS_S_S_iidd"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3676:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8gradientPdS_S_iidd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9LaplacianPdS_iidd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10DivergencePdS_S_iidd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3DivPdS_S_S_iidd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3676:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1071644672
	.align 8
.LC1:
	.long	0
	.long	1070596096
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <math.h>
#include <hip/hip_runtime.h>
using namespace std;
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with variable coefficient                         !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void DivCPU(double* Dn, double* Phi, double* U, double* V, int row, int col,double delX,double delY){


for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){
      int k    = i*col+j;
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ee  = 0.5*(UE*PhiE+UP*PhiP);
   double Ew  = 0.5*(UW*PhiW+UP*PhiP);
   double Fn  = 0.5*(VN*PhiN+VP*PhiP);
   double Fs  = 0.5*(VS*PhiS+VP*PhiP);
   Dn[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
      }
   }
}



__global__ void Div(double* Dn, double* Phi, double* U, double* V, int row, int col,double delX,double delY){

   // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int n  = (row-1)*(col-1);
    // Do for only inner points
    if (k >0 && k<n) {

   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
   //double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ee  = 0.5*(UE*PhiE+UP*PhiP);
   double Ew  = 0.5*(UW*PhiW+UP*PhiP);
   double Fn  = 0.5*(VN*PhiN+VP*PhiP);
   double Fs  = 0.5*(VS*PhiS+VP*PhiP);
   Dn[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
      }
   }

//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Divergence of a Vector with No coefficient                               !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!

__global__ void Divergence(double* Dn, double* U, double* V,int row, int col, double delX, double delY){

   // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int n  = (row-1)*(col-1);
    // Do for only inner points
    if (k >0 && k<n) {

   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
  // double VE = V[k+1];
   //double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ue = 0.5*(UE+UP);
   double Uw = 0.5*(UW+UP);
   //double Un = 0.5*(UN+UP);
   //double Us = 0.5*(US+UP);

  // double Ve = 0.5*(VE+VP);
  // double Vw = 0.5*(VW+VP);
   double Vn = 0.5*(VN+VP);
   double Vs = 0.5*(VS+VP);

  Dn[k] = (Ue-Uw)*delY+(Vn-Vs)*delX;
   
 }
}

 void DivergenceCPU(double* Dn, double* U, double* V,int row, int col, double delX, double delY){

for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){
    int k = i*col+j;
   double UP = U[k];
   double UE = U[k+1];
   double UW = U[k-1];
   //double UN = U[k-col];
   //double US = U[k+col];

   double VP = V[k];
  // double VE = V[k+1];
  // double VW = V[k-1];
   double VN = V[k-col];
   double VS = V[k+col];

   double Ue = 0.5*(UE+UP);
   double Uw = 0.5*(UW+UP);
   //double Un = 0.5*(UN+UP);
   //double Us = 0.5*(US+UP);

  // double Ve = 0.5*(VE+VP);
   //double Vw = 0.5*(VW+VP);
   double Vn = 0.5*(VN+VP);
   double Vs = 0.5*(VS+VP);

  Dn[k] = (Ue-Uw)*delY+(Vn-Vs)*delX;
   }
 }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Laplacian of a Scalar                                                    !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void LaplacianCPU(double* Ln, double *Phi, int row, int col, double delX, double delY){
for(int i = 1; i<(row-1); i++){
 for(int j =1; j<(col-1); j++){
   int k = i*col+j;
   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double Ee  = (PhiE-PhiP)/delX;
   double Ew  = (PhiP-PhiW)/delX;
   double Fn  = (PhiN-PhiP)/delY;
   double Fs  = (PhiP-PhiS)/delY;
   Ln[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
     }
  }
}

__global__ void Laplacian(double* Ln, double *Phi, int row, int col, double delX, double delY){
   // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int n  = (row-1)*(col-1);
    // Do for only inner points
    if (k >0 && k<n) {

   double PhiP = Phi[k];
   double PhiE = Phi[k+1];
   double PhiW = Phi[k-1];
   double PhiN = Phi[k-col];
   double PhiS = Phi[k+col];

   double Ee  = (PhiE-PhiP)/delX;
   double Ew  = (PhiP-PhiW)/delX;
   double Fn  = (PhiN-PhiP)/delY;
   double Fs  = (PhiP-PhiS)/delY;
   Ln[k]      = delX*(Fn-Fs)+delY*(Ee-Ew);
}

}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Gradient Computation using Finite Volume                                 !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void gradient(double* gradxPhi,double* gradyPhi,
              double* vfacePhi,double* hfacePhi,
			        int cellRow, int cellCol, double delX, double delY,
              int vfaceCol, int hfaceCol){
for(int i = 1; i<(cellRow-1); ++i){
 for(int j =1; j<(cellCol-1); ++j){


   double Phie = vfacePhi[i*vfaceCol+(j+1)];
   double Phiw = vfacePhi[i*vfaceCol+j];
   double Phin = hfacePhi[i*hfaceCol+j];
   double Phis = hfacePhi[(i+1)*hfaceCol+j];

   gradxPhi[i*cellCol+j] = (Phie-Phiw)/delX;
   gradyPhi[i*cellCol+j] = (Phin-Phis)/delY;
    }
  }
}


//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Gradient Computation using Finite Difference                             !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
__global__ void gradient(double* gradxPhi,double* gradyPhi,double* Phi,
                        int row, int col, double delX, double delY){
   // Get global thread ID
  int k = blockIdx.x*blockDim.x+threadIdx.x;
  int n  = (row-1)*(col-1);
    // Do for only inner points
    if (k >0 && k<n) {

   double Phie = Phi[k+1];
   double Phiw = Phi[k-1];
   double Phin = Phi[k-col];
   double Phis = Phi[k+col];

   gradxPhi[k] = (Phie-Phiw)/(2*delX);
   gradyPhi[k] = (Phin-Phis)/(2*delY);
    
  }
}

void gradientCPU(double* gradxPhi,double* gradyPhi,double* Phi,
                        int row, int col, double delX, double delY){
for(int i = 1; i<(row-1); ++i){
 for(int j =1; j<(col-1); ++j){

   int k = i*col+j;
   double Phie = Phi[k+1];
   double Phiw = Phi[k-1];
   double Phin = Phi[k-col];
   double Phis = Phi[k+col];

   gradxPhi[k] = (Phie-Phiw)/(2*delX);
   gradyPhi[k] = (Phin-Phis)/(2*delY);
    }
  }
}

//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Interpolation of Vertex Values                                           !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!

void vertexInterpolate(double* vertPhi, double* cellPhi, int vertRow, int vertCol, int cellCol){
// Inner Points
for(int i = 1; i<(vertRow-1); ++i){
 for(int j =1; j<(vertCol-1); ++j){

double Ta = cellPhi[(i-1)*cellCol+(j-1)]; // NW
double Tb = cellPhi[(i-1)*cellCol+j];    // NE
double Tc = cellPhi[(i*cellCol)+(j-1)];      // SW
double Td = cellPhi[i*cellCol+j];      //SE

vertPhi[i*vertCol+j]=0.25*(Ta+Tb+Tc+Td);
   }
 }
//Boundary points - Set it to Boundary Cell points
//North Boundary
    for (int i = 0; i<vertCol; i++){
        vertPhi[i]= cellPhi[i+vertCol];
    }
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Interpolation of Vertical FaceCenter Interpolation                       !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void vfaceInterpolate(double* vfacePhi, double* vertPhi,
                      double* cellPhi, int vfaceRow, int vfaceCol,
                      int vertCol, int cellCol){

for(int i = 1; i<(vfaceRow-1); ++i){
 for(int j =1; j<(vfaceCol-1); ++j){

double Ta = cellPhi[i*cellCol+(j-1)]; // West cell
double Tb = cellPhi[i*cellCol+j];     // East cell
double Tc = vertPhi[i*vertCol+j];     // North Vertex
double Td = vertPhi[(i+1)*vertCol+j]; //South Vertex

vfacePhi[i*vfaceCol+j]=0.25*(Ta+Tb+Tc+Td);
  }
}

}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
// Interpolation of Horizontal FaceCenter Interpolation                     !
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++!
void hfaceInterpolate(double* hfacePhi, double* vertPhi,
                      double* cellPhi, int hfaceRow, int hfaceCol,
                      int vertCol, int cellCol){
for(int i = 1; i<(hfaceRow-1); ++i){
 for(int j =1; j<(hfaceCol-1); ++j){

double Ta = vertPhi[i*vertCol+j]; // West vertex
double Tb = vertPhi[i*vertCol+(j+1)];     // East vertex
double Tc = cellPhi[(i-1)*cellCol+j];     // North cell
double Td = cellPhi[i*cellCol+j]; //South cell

hfacePhi[i*hfaceCol+j]=0.25*(Ta+Tb+Tc+Td);
 }
}
}



	.text
	.file	"finiteVolumeOperators.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z6DivCPUPdS_S_S_iidd
.LCPI0_0:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	_Z6DivCPUPdS_S_S_iidd
	.type	_Z6DivCPUPdS_S_S_iidd,@function
_Z6DivCPUPdS_S_S_iidd:                  # @_Z6DivCPUPdS_S_S_iidd
	.cfi_startproc
# %bb.0:
                                        # kill: def $r9d killed $r9d def $r9
                                        # kill: def $r8d killed $r8d def $r8
	cmpl	$3, %r8d
	jl	.LBB0_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	decl	%r8d
	leal	-1(%r9), %r15d
	movslq	%r9d, %r14
	leaq	(,%r14,8), %rax
	leaq	(%rdi,%r14,8), %rdi
	addq	$8, %rdi
	leaq	(%rcx,%r14,8), %r10
	addq	$8, %r10
	leaq	(%rdx,%r14,8), %rdx
	addq	$16, %rdx
	leaq	(%rsi,%r14,8), %r11
	addq	$16, %r11
	shlq	$4, %r14
	leaq	(%rcx,%r14), %rbx
	addq	$8, %rbx
	addq	$8, %rcx
	addq	%rsi, %r14
	addq	$8, %r14
	leaq	-8(,%r15,8), %r15
	movl	$1, %r12d
	movsd	.LCPI0_0(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	cmpl	$3, %r9d
	jl	.LBB0_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	xorl	%r13d, %r13d
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-16(%r11,%r13), %xmm7           # xmm7 = mem[0],zero
	movsd	-8(%r11,%r13), %xmm6            # xmm6 = mem[0],zero
	movsd	(%r11,%r13), %xmm3              # xmm3 = mem[0],zero
	movsd	8(%rsi,%r13), %xmm4             # xmm4 = mem[0],zero
	movsd	(%r14,%r13), %xmm5              # xmm5 = mem[0],zero
	mulsd	(%rdx,%r13), %xmm3
	movsd	-8(%rdx,%r13), %xmm8            # xmm8 = mem[0],zero
	mulsd	%xmm6, %xmm8
	addsd	%xmm8, %xmm3
	mulsd	%xmm2, %xmm3
	mulsd	-16(%rdx,%r13), %xmm7
	addsd	%xmm8, %xmm7
	mulsd	%xmm2, %xmm7
	mulsd	(%rcx,%r13), %xmm4
	subsd	%xmm7, %xmm3
	mulsd	(%r10,%r13), %xmm6
	addsd	%xmm6, %xmm4
	mulsd	%xmm2, %xmm4
	mulsd	(%rbx,%r13), %xmm5
	addsd	%xmm6, %xmm5
	mulsd	%xmm2, %xmm5
	subsd	%xmm5, %xmm4
	mulsd	%xmm0, %xmm4
	mulsd	%xmm1, %xmm3
	addsd	%xmm4, %xmm3
	movsd	%xmm3, (%rdi,%r13)
	addq	$8, %r13
	cmpq	%r13, %r15
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r12
	addq	%rax, %rdi
	addq	%rax, %r10
	addq	%rax, %rdx
	addq	%rax, %r11
	addq	%rax, %rsi
	addq	%rax, %rcx
	addq	%rax, %rbx
	addq	%rax, %r14
	cmpq	%r8, %r12
	jne	.LBB0_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_7:                                # %._crit_edge61
	retq
.Lfunc_end0:
	.size	_Z6DivCPUPdS_S_S_iidd, .Lfunc_end0-_Z6DivCPUPdS_S_S_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__DivPdS_S_S_iidd # -- Begin function _Z18__device_stub__DivPdS_S_S_iidd
	.type	_Z18__device_stub__DivPdS_S_S_iidd,@function
_Z18__device_stub__DivPdS_S_S_iidd:     # @_Z18__device_stub__DivPdS_S_S_iidd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	40(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	32(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3DivPdS_S_S_iidd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18__device_stub__DivPdS_S_S_iidd, .Lfunc_end1-_Z18__device_stub__DivPdS_S_S_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__DivergencePdS_S_iidd # -- Begin function _Z25__device_stub__DivergencePdS_S_iidd
	.type	_Z25__device_stub__DivergencePdS_S_iidd,@function
_Z25__device_stub__DivergencePdS_S_iidd: # @_Z25__device_stub__DivergencePdS_S_iidd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	24(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10DivergencePdS_S_iidd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__DivergencePdS_S_iidd, .Lfunc_end2-_Z25__device_stub__DivergencePdS_S_iidd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13DivergenceCPUPdS_S_iidd
.LCPI3_0:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	_Z13DivergenceCPUPdS_S_iidd
	.type	_Z13DivergenceCPUPdS_S_iidd,@function
_Z13DivergenceCPUPdS_S_iidd:            # @_Z13DivergenceCPUPdS_S_iidd
	.cfi_startproc
# %bb.0:
                                        # kill: def $r8d killed $r8d def $r8
                                        # kill: def $ecx killed $ecx def $rcx
	cmpl	$3, %ecx
	jl	.LBB3_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	decl	%ecx
	leal	-1(%r8), %r11d
	movslq	%r8d, %r10
	leaq	(,%r10,8), %rax
	leaq	(%rdi,%r10,8), %rdi
	addq	$8, %rdi
	leaq	(%rdx,%r10,8), %r9
	addq	$8, %r9
	leaq	(%rsi,%r10,8), %rsi
	addq	$16, %rsi
	shlq	$4, %r10
	addq	%rdx, %r10
	addq	$8, %r10
	addq	$8, %rdx
	leaq	-8(,%r11,8), %r11
	movl	$1, %ebx
	movsd	.LCPI3_0(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	cmpl	$3, %r8d
	jl	.LBB3_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	xorl	%r14d, %r14d
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-8(%rsi,%r14), %xmm3            # xmm3 = mem[0],zero
	movsd	(%r9,%r14), %xmm4               # xmm4 = mem[0],zero
	movsd	(%rsi,%r14), %xmm5              # xmm5 = mem[0],zero
	addsd	%xmm3, %xmm5
	addsd	-16(%rsi,%r14), %xmm3
	mulsd	%xmm2, %xmm5
	mulsd	%xmm2, %xmm3
	subsd	%xmm3, %xmm5
	movsd	(%rdx,%r14), %xmm3              # xmm3 = mem[0],zero
	addsd	%xmm4, %xmm3
	mulsd	%xmm2, %xmm3
	addsd	(%r10,%r14), %xmm4
	mulsd	%xmm2, %xmm4
	subsd	%xmm4, %xmm3
	mulsd	%xmm1, %xmm5
	mulsd	%xmm0, %xmm3
	addsd	%xmm5, %xmm3
	movsd	%xmm3, (%rdi,%r14)
	addq	$8, %r14
	cmpq	%r14, %r11
	jne	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%rbx
	addq	%rax, %r10
	addq	%rax, %rdi
	addq	%rax, %r9
	addq	%rax, %rsi
	addq	%rax, %rdx
	cmpq	%rcx, %rbx
	jne	.LBB3_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB3_7:                                # %._crit_edge41
	retq
.Lfunc_end3:
	.size	_Z13DivergenceCPUPdS_S_iidd, .Lfunc_end3-_Z13DivergenceCPUPdS_S_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z12LaplacianCPUPdS_iidd        # -- Begin function _Z12LaplacianCPUPdS_iidd
	.type	_Z12LaplacianCPUPdS_iidd,@function
_Z12LaplacianCPUPdS_iidd:               # @_Z12LaplacianCPUPdS_iidd
	.cfi_startproc
# %bb.0:
                                        # kill: def $ecx killed $ecx def $rcx
                                        # kill: def $edx killed $edx def $rdx
	cmpl	$3, %edx
	jl	.LBB4_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	decl	%edx
	leal	-1(%rcx), %r10d
	movslq	%ecx, %r9
	leaq	(,%r9,8), %rax
	leaq	(%rdi,%r9,8), %rdi
	addq	$8, %rdi
	leaq	(%rsi,%r9,8), %r8
	addq	$16, %r8
	shlq	$4, %r9
	addq	%rsi, %r9
	addq	$8, %r9
	leaq	-8(,%r10,8), %r10
	movl	$1, %r11d
.LBB4_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	cmpl	$3, %ecx
	jl	.LBB4_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB4_2 Depth=1
	xorl	%ebx, %ebx
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-8(%r8,%rbx), %xmm2             # xmm2 = mem[0],zero
	movsd	(%r8,%rbx), %xmm3               # xmm3 = mem[0],zero
	movsd	8(%rsi,%rbx), %xmm4             # xmm4 = mem[0],zero
	subsd	%xmm2, %xmm3
	divsd	%xmm0, %xmm3
	movapd	%xmm2, %xmm5
	subsd	-16(%r8,%rbx), %xmm5
	divsd	%xmm0, %xmm5
	subsd	%xmm5, %xmm3
	subsd	%xmm2, %xmm4
	divsd	%xmm1, %xmm4
	subsd	(%r9,%rbx), %xmm2
	divsd	%xmm1, %xmm2
	subsd	%xmm2, %xmm4
	mulsd	%xmm0, %xmm4
	mulsd	%xmm1, %xmm3
	addsd	%xmm4, %xmm3
	movsd	%xmm3, (%rdi,%rbx)
	addq	$8, %rbx
	cmpq	%rbx, %r10
	jne	.LBB4_4
.LBB4_5:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%r11
	addq	%rax, %r9
	addq	%rax, %rdi
	addq	%rax, %r8
	addq	%rax, %rsi
	cmpq	%rdx, %r11
	jne	.LBB4_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB4_7:                                # %._crit_edge43
	retq
.Lfunc_end4:
	.size	_Z12LaplacianCPUPdS_iidd, .Lfunc_end4-_Z12LaplacianCPUPdS_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__LaplacianPdS_iidd # -- Begin function _Z24__device_stub__LaplacianPdS_iidd
	.type	_Z24__device_stub__LaplacianPdS_iidd,@function
_Z24__device_stub__LaplacianPdS_iidd:   # @_Z24__device_stub__LaplacianPdS_iidd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	32(%rsp), %r8
	movsd	%xmm1, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9LaplacianPdS_iidd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z24__device_stub__LaplacianPdS_iidd, .Lfunc_end5-_Z24__device_stub__LaplacianPdS_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z8gradientPdS_S_S_iiddii       # -- Begin function _Z8gradientPdS_S_S_iiddii
	.type	_Z8gradientPdS_S_S_iiddii,@function
_Z8gradientPdS_S_S_iiddii:              # @_Z8gradientPdS_S_S_iiddii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
                                        # kill: def $r8d killed $r8d def $r8
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	cmpl	$3, %r8d
	jl	.LBB6_5
# %bb.1:                                # %.preheader.lr.ph
	decl	%r8d
	leal	-1(%r9), %eax
	movslq	56(%rsp), %rsi
	movslq	64(%rsp), %r10
	movslq	%r9d, %r11
	addq	$8, %rcx
	shlq	$3, %r10
	addq	$16, -8(%rsp)                   # 8-byte Folded Spill
	shlq	$3, %rsi
	addq	$8, -16(%rsp)                   # 8-byte Folded Spill
	shlq	$3, %r11
	addq	$8, %rdi
	leaq	-8(,%rax,8), %rbx
	movl	$1, %r14d
.LBB6_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_7 Depth 2
	cmpl	$2, %r9d
	jle	.LBB6_3
# %bb.6:                                # %.lr.ph
                                        #   in Loop: Header=BB6_2 Depth=1
	leaq	1(%r14), %r15
	movq	%r10, %r12
	imulq	%r15, %r12
	addq	%rcx, %r12
	movq	%r10, %r13
	imulq	%r14, %r13
	addq	%rcx, %r13
	movq	%rsi, %rbp
	imulq	%r14, %rbp
	addq	-8(%rsp), %rbp                  # 8-byte Folded Reload
	imulq	%r11, %r14
	movq	-16(%rsp), %rax                 # 8-byte Reload
	addq	%r14, %rax
	addq	%rdi, %r14
	xorl	%edx, %edx
.LBB6_7:                                #   Parent Loop BB6_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rbp,%rdx), %xmm2              # xmm2 = mem[0],zero
	movsd	(%r13,%rdx), %xmm3              # xmm3 = mem[0],zero
	subsd	-8(%rbp,%rdx), %xmm2
	divsd	%xmm0, %xmm2
	subsd	(%r12,%rdx), %xmm3
	movsd	%xmm2, (%r14,%rdx)
	divsd	%xmm1, %xmm3
	movsd	%xmm3, (%rax,%rdx)
	addq	$8, %rdx
	cmpq	%rdx, %rbx
	jne	.LBB6_7
# %bb.8:                                #   in Loop: Header=BB6_2 Depth=1
	movq	%r15, %r14
	jmp	.LBB6_4
.LBB6_3:                                # %.preheader.._crit_edge_crit_edge
                                        #   in Loop: Header=BB6_2 Depth=1
	incq	%r14
	movq	%r14, %r15
.LBB6_4:                                # %._crit_edge
                                        #   in Loop: Header=BB6_2 Depth=1
	cmpq	%r8, %r15
	jne	.LBB6_2
.LBB6_5:                                # %._crit_edge38
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z8gradientPdS_S_S_iiddii, .Lfunc_end6-_Z8gradientPdS_S_S_iiddii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__gradientPdS_S_iidd # -- Begin function _Z23__device_stub__gradientPdS_S_iidd
	.type	_Z23__device_stub__gradientPdS_S_iidd,@function
_Z23__device_stub__gradientPdS_S_iidd:  # @_Z23__device_stub__gradientPdS_S_iidd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	24(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8gradientPdS_S_iidd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z23__device_stub__gradientPdS_S_iidd, .Lfunc_end7-_Z23__device_stub__gradientPdS_S_iidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z11gradientCPUPdS_S_iidd       # -- Begin function _Z11gradientCPUPdS_S_iidd
	.type	_Z11gradientCPUPdS_S_iidd,@function
_Z11gradientCPUPdS_S_iidd:              # @_Z11gradientCPUPdS_S_iidd
	.cfi_startproc
# %bb.0:
                                        # kill: def $r8d killed $r8d def $r8
                                        # kill: def $ecx killed $ecx def $rcx
	cmpl	$3, %ecx
	jl	.LBB8_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	decl	%ecx
	leal	-1(%r8), %r11d
	addsd	%xmm0, %xmm0
	addsd	%xmm1, %xmm1
	movslq	%r8d, %r10
	leaq	(,%r10,8), %rax
	leaq	(%rdi,%r10,8), %rdi
	addq	$8, %rdi
	leaq	(%rsi,%r10,8), %rsi
	addq	$8, %rsi
	leaq	(%rdx,%r10,8), %r9
	addq	$16, %r9
	shlq	$4, %r10
	addq	%rdx, %r10
	addq	$8, %r10
	leaq	-8(,%r11,8), %r11
	movl	$1, %ebx
.LBB8_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_4 Depth 2
	cmpl	$3, %r8d
	jl	.LBB8_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB8_2 Depth=1
	xorl	%r14d, %r14d
.LBB8_4:                                #   Parent Loop BB8_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r9,%r14), %xmm2               # xmm2 = mem[0],zero
	movsd	8(%rdx,%r14), %xmm3             # xmm3 = mem[0],zero
	subsd	-16(%r9,%r14), %xmm2
	divsd	%xmm0, %xmm2
	subsd	(%r10,%r14), %xmm3
	divsd	%xmm1, %xmm3
	movsd	%xmm2, (%rdi,%r14)
	movsd	%xmm3, (%rsi,%r14)
	addq	$8, %r14
	cmpq	%r14, %r11
	jne	.LBB8_4
.LBB8_5:                                # %._crit_edge
                                        #   in Loop: Header=BB8_2 Depth=1
	incq	%rbx
	addq	%rax, %r10
	addq	%rax, %rdi
	addq	%rax, %rsi
	addq	%rax, %r9
	addq	%rax, %rdx
	cmpq	%rcx, %rbx
	jne	.LBB8_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB8_7:                                # %._crit_edge31
	retq
.Lfunc_end8:
	.size	_Z11gradientCPUPdS_S_iidd, .Lfunc_end8-_Z11gradientCPUPdS_S_iidd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z17vertexInterpolatePdS_iii
.LCPI9_0:
	.quad	0x3fd0000000000000              # double 0.25
	.text
	.globl	_Z17vertexInterpolatePdS_iii
	.type	_Z17vertexInterpolatePdS_iii,@function
_Z17vertexInterpolatePdS_iii:           # @_Z17vertexInterpolatePdS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
                                        # kill: def $ecx killed $ecx def $rcx
                                        # kill: def $edx killed $edx def $rdx
	cmpl	$3, %edx
	jl	.LBB9_6
# %bb.1:                                # %.preheader40.lr.ph
	decl	%edx
	leal	-1(%rcx), %eax
	movslq	%r8d, %r8
	movslq	%ecx, %r9
	leaq	(%rdi,%r9,8), %r10
	shlq	$3, %r9
	leaq	(%rsi,%r8,8), %r11
	shlq	$3, %r8
	movl	$1, %ebx
	movsd	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movq	%rsi, %r14
.LBB9_2:                                # %.preheader40
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_4 Depth 2
	cmpl	$3, %ecx
	jl	.LBB9_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB9_2 Depth=1
	movl	$1, %r15d
.LBB9_4:                                #   Parent Loop BB9_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-8(%r14,%r15,8), %xmm1          # xmm1 = mem[0],zero
	addsd	(%r14,%r15,8), %xmm1
	addsd	-8(%r11,%r15,8), %xmm1
	addsd	(%r11,%r15,8), %xmm1
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, (%r10,%r15,8)
	incq	%r15
	cmpq	%r15, %rax
	jne	.LBB9_4
.LBB9_5:                                # %._crit_edge
                                        #   in Loop: Header=BB9_2 Depth=1
	incq	%rbx
	addq	%r9, %r10
	addq	%r8, %r11
	addq	%r8, %r14
	cmpq	%rdx, %rbx
	jne	.LBB9_2
.LBB9_6:                                # %.preheader
	testl	%ecx, %ecx
	jle	.LBB9_9
# %bb.7:                                # %.lr.ph44.preheader
	movl	%ecx, %eax
	leaq	(%rsi,%rax,8), %rcx
	xorl	%edx, %edx
.LBB9_8:                                # %.lr.ph44
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%rcx,%rdx,8), %xmm0            # xmm0 = mem[0],zero
	movsd	%xmm0, (%rdi,%rdx,8)
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB9_8
.LBB9_9:                                # %._crit_edge45
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z17vertexInterpolatePdS_iii, .Lfunc_end9-_Z17vertexInterpolatePdS_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z16vfaceInterpolatePdS_S_iiii
.LCPI10_0:
	.quad	0x3fd0000000000000              # double 0.25
	.text
	.globl	_Z16vfaceInterpolatePdS_S_iiii
	.type	_Z16vfaceInterpolatePdS_S_iiii,@function
_Z16vfaceInterpolatePdS_S_iiii:         # @_Z16vfaceInterpolatePdS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r8d killed $r8d def $r8
                                        # kill: def $ecx killed $ecx def $rcx
	movq	%rdi, -8(%rsp)                  # 8-byte Spill
	cmpl	$3, %ecx
	jl	.LBB10_5
# %bb.1:                                # %.preheader.lr.ph
	decl	%ecx
	leal	-1(%r8), %eax
	movslq	56(%rsp), %rdi
	movslq	%r9d, %r9
	movslq	%r8d, %r10
	movq	%r10, -24(%rsp)                 # 8-byte Spill
	movq	%rdi, -16(%rsp)                 # 8-byte Spill
	shlq	$32, %rdi
	movq	%rdi, -32(%rsp)                 # 8-byte Spill
	movl	$1, %r12d
	movsd	.LCPI10_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movabsq	$4294967296, %r14               # imm = 0x100000000
.LBB10_2:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB10_7 Depth 2
	cmpl	$2, %r8d
	jle	.LBB10_3
# %bb.6:                                # %.lr.ph
                                        #   in Loop: Header=BB10_2 Depth=1
	movq	%r12, %rdi
	imulq	-16(%rsp), %rdi                 # 8-byte Folded Reload
	movq	%r12, %r10
	imulq	%r9, %r10
	leaq	1(%r12), %rbx
	movq	%rbx, %r15
	imulq	%r9, %r15
	movq	-32(%rsp), %r13                 # 8-byte Reload
	imulq	%r12, %r13
	imulq	-24(%rsp), %r12                 # 8-byte Folded Reload
	leaq	(%rdx,%rdi,8), %rbp
	leaq	(%rsi,%r10,8), %r11
	leaq	(%rsi,%r15,8), %rdi
	movq	-8(%rsp), %r10                  # 8-byte Reload
	leaq	(%r10,%r12,8), %r12
	movl	$1, %r10d
.LBB10_7:                               #   Parent Loop BB10_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r13, %r15
	sarq	$29, %r15
	movsd	(%rdx,%r15), %xmm1              # xmm1 = mem[0],zero
	addsd	(%rbp,%r10,8), %xmm1
	addsd	(%r11,%r10,8), %xmm1
	addsd	(%rdi,%r10,8), %xmm1
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, (%r12,%r10,8)
	incq	%r10
	addq	%r14, %r13
	cmpq	%r10, %rax
	jne	.LBB10_7
# %bb.8:                                #   in Loop: Header=BB10_2 Depth=1
	movq	%rbx, %r12
	jmp	.LBB10_4
.LBB10_3:                               # %.preheader.._crit_edge_crit_edge
                                        #   in Loop: Header=BB10_2 Depth=1
	incq	%r12
	movq	%r12, %rbx
.LBB10_4:                               # %._crit_edge
                                        #   in Loop: Header=BB10_2 Depth=1
	cmpq	%rcx, %rbx
	jne	.LBB10_2
.LBB10_5:                               # %._crit_edge32
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z16vfaceInterpolatePdS_S_iiii, .Lfunc_end10-_Z16vfaceInterpolatePdS_S_iiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z16hfaceInterpolatePdS_S_iiii
.LCPI11_0:
	.quad	0x3fd0000000000000              # double 0.25
	.text
	.globl	_Z16hfaceInterpolatePdS_S_iiii
	.type	_Z16hfaceInterpolatePdS_S_iiii,@function
_Z16hfaceInterpolatePdS_S_iiii:         # @_Z16hfaceInterpolatePdS_S_iiii
	.cfi_startproc
# %bb.0:
                                        # kill: def $r8d killed $r8d def $r8
                                        # kill: def $ecx killed $ecx def $rcx
	cmpl	$3, %ecx
	jl	.LBB11_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	decl	%ecx
	leal	-1(%r8), %ebx
	movslq	32(%rsp), %rax
	movslq	%r9d, %r9
	movslq	%r8d, %r10
	leaq	(%rdi,%r10,8), %rdi
	addq	$8, %rdi
	shlq	$3, %r10
	leaq	(%rdx,%rax,8), %r11
	addq	$8, %r11
	shlq	$3, %rax
	addq	$8, %rdx
	leaq	(%rsi,%r9,8), %rsi
	addq	$16, %rsi
	shlq	$3, %r9
	leaq	-8(,%rbx,8), %rbx
	movl	$1, %r14d
	movsd	.LCPI11_0(%rip), %xmm0          # xmm0 = mem[0],zero
.LBB11_2:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_4 Depth 2
	cmpl	$3, %r8d
	jl	.LBB11_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB11_2 Depth=1
	xorl	%r15d, %r15d
.LBB11_4:                               #   Parent Loop BB11_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-8(%rsi,%r15), %xmm1            # xmm1 = mem[0],zero
	addsd	(%rsi,%r15), %xmm1
	addsd	(%rdx,%r15), %xmm1
	addsd	(%r11,%r15), %xmm1
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, (%rdi,%r15)
	addq	$8, %r15
	cmpq	%r15, %rbx
	jne	.LBB11_4
.LBB11_5:                               # %._crit_edge
                                        #   in Loop: Header=BB11_2 Depth=1
	incq	%r14
	addq	%r10, %rdi
	addq	%rax, %r11
	addq	%rax, %rdx
	addq	%r9, %rsi
	cmpq	%rcx, %r14
	jne	.LBB11_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB11_7:                               # %._crit_edge32
	retq
.Lfunc_end11:
	.size	_Z16hfaceInterpolatePdS_S_iiii, .Lfunc_end11-_Z16hfaceInterpolatePdS_S_iiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB12_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB12_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3DivPdS_S_S_iidd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10DivergencePdS_S_iidd, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9LaplacianPdS_iidd, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8gradientPdS_S_iidd, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end12:
	.size	__hip_module_ctor, .Lfunc_end12-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB13_2:
	retq
.Lfunc_end13:
	.size	__hip_module_dtor, .Lfunc_end13-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3DivPdS_S_S_iidd,@object      # @_Z3DivPdS_S_S_iidd
	.section	.rodata,"a",@progbits
	.globl	_Z3DivPdS_S_S_iidd
	.p2align	3, 0x0
_Z3DivPdS_S_S_iidd:
	.quad	_Z18__device_stub__DivPdS_S_S_iidd
	.size	_Z3DivPdS_S_S_iidd, 8

	.type	_Z10DivergencePdS_S_iidd,@object # @_Z10DivergencePdS_S_iidd
	.globl	_Z10DivergencePdS_S_iidd
	.p2align	3, 0x0
_Z10DivergencePdS_S_iidd:
	.quad	_Z25__device_stub__DivergencePdS_S_iidd
	.size	_Z10DivergencePdS_S_iidd, 8

	.type	_Z9LaplacianPdS_iidd,@object    # @_Z9LaplacianPdS_iidd
	.globl	_Z9LaplacianPdS_iidd
	.p2align	3, 0x0
_Z9LaplacianPdS_iidd:
	.quad	_Z24__device_stub__LaplacianPdS_iidd
	.size	_Z9LaplacianPdS_iidd, 8

	.type	_Z8gradientPdS_S_iidd,@object   # @_Z8gradientPdS_S_iidd
	.globl	_Z8gradientPdS_S_iidd
	.p2align	3, 0x0
_Z8gradientPdS_S_iidd:
	.quad	_Z23__device_stub__gradientPdS_S_iidd
	.size	_Z8gradientPdS_S_iidd, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z3DivPdS_S_S_iidd"
	.size	.L__unnamed_1, 19

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10DivergencePdS_S_iidd"
	.size	.L__unnamed_2, 25

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9LaplacianPdS_iidd"
	.size	.L__unnamed_3, 21

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z8gradientPdS_S_iidd"
	.size	.L__unnamed_4, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__DivPdS_S_S_iidd
	.addrsig_sym _Z25__device_stub__DivergencePdS_S_iidd
	.addrsig_sym _Z24__device_stub__LaplacianPdS_iidd
	.addrsig_sym _Z23__device_stub__gradientPdS_S_iidd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3DivPdS_S_S_iidd
	.addrsig_sym _Z10DivergencePdS_S_iidd
	.addrsig_sym _Z9LaplacianPdS_iidd
	.addrsig_sym _Z8gradientPdS_S_iidd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3DivPdS_S_S_iidd      ; -- Begin function _Z3DivPdS_S_S_iidd
	.globl	_Z3DivPdS_S_S_iidd
	.p2align	8
	.type	_Z3DivPdS_S_S_iidd,@function
_Z3DivPdS_S_S_iidd:                     ; @_Z3DivPdS_S_S_iidd
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x44
	s_load_b64 s[2:3], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_add_i32 s2, s2, -1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_add_i32 s4, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mul_i32 s4, s4, s2
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s6, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v12, vcc_lo
	v_add_co_u32 v7, vcc_lo, s10, v11
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v12, vcc_lo
	global_load_b128 v[3:6], v[3:4], off
	global_load_b64 v[13:14], v[7:8], off
	v_add_nc_u32_e32 v7, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	v_add_co_u32 v15, vcc_lo, s8, v11
	v_add_co_ci_u32_e32 v16, vcc_lo, s9, v12, vcc_lo
	global_load_b64 v[17:18], v[9:10], off
	global_load_b64 v[19:20], v[7:8], off
	global_load_b128 v[7:10], v[15:16], off
	v_subrev_nc_u32_e32 v15, s3, v1
	v_add_nc_u32_e32 v1, -1, v1
	s_load_b128 s[0:3], s[0:1], 0x28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v16, 31, v15
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 3, v[15:16]
	v_add_co_u32 v21, vcc_lo, s6, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v22, vcc_lo, s7, v16, vcc_lo
	v_add_co_u32 v15, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
	v_add_co_u32 v23, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v24, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_load_b64 v[21:22], v[21:22], off
	global_load_b64 v[15:16], v[15:16], off
	global_load_b64 v[23:24], v[23:24], off
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(7)
	v_mul_f64 v[13:14], v[3:4], v[13:14]
	s_waitcnt vmcnt(4)
	v_mul_f64 v[2:3], v[3:4], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[13:14]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[7:8], v[21:22], v[15:16], v[13:14]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[0:1], v[23:24], v[0:1], v[2:3]
	v_fma_f64 v[2:3], v[5:6], v[9:10], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[13:14], v[17:18], 0.5
	v_mul_f64 v[0:1], v[0:1], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[7:8], 0.5, -v[13:14]
	v_fma_f64 v[0:1], v[2:3], 0.5, -v[0:1]
	v_add_co_u32 v2, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], s[0:1]
	v_fma_f64 v[0:1], v[0:1], s[2:3], v[4:5]
	global_store_b64 v[2:3], v[0:1], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3DivPdS_S_S_iidd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3DivPdS_S_S_iidd, .Lfunc_end0-_Z3DivPdS_S_S_iidd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 532
; NumSgprs: 18
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10DivergencePdS_S_iidd ; -- Begin function _Z10DivergencePdS_S_iidd
	.globl	_Z10DivergencePdS_S_iidd
	.p2align	8
	.type	_Z10DivergencePdS_S_iidd,@function
_Z10DivergencePdS_S_iidd:               ; @_Z10DivergencePdS_S_iidd
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_add_i32 s2, s2, -1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_add_i32 s4, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mul_i32 s4, s4, s2
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s3, v1
	v_subrev_nc_u32_e32 v0, s3, v1
	s_load_b128 s[0:3], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v11, vcc_lo, s6, v5
	s_clause 0x1
	global_load_b64 v[7:8], v[7:8], off
	global_load_b64 v[9:10], v[2:3], off
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v13, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v1, vcc_lo
	global_load_b128 v[0:3], v[11:12], off offset:-8
	global_load_b64 v[13:14], v[13:14], off
	global_load_b64 v[11:12], v[11:12], off offset:8
	s_waitcnt vmcnt(3)
	v_add_f64 v[9:10], v[7:8], v[9:10]
	s_waitcnt vmcnt(2)
	v_add_f64 v[0:1], v[2:3], v[0:1]
	s_waitcnt vmcnt(1)
	v_add_f64 v[7:8], v[7:8], v[13:14]
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[9:10], v[9:10], 0.5
	v_mul_f64 v[0:1], v[0:1], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[7:8], v[7:8], 0.5, -v[9:10]
	v_fma_f64 v[0:1], v[2:3], 0.5, -v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[7:8], s[0:1]
	v_fma_f64 v[0:1], v[0:1], s[2:3], v[2:3]
	v_add_co_u32 v2, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v6, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10DivergencePdS_S_iidd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10DivergencePdS_S_iidd, .Lfunc_end1-_Z10DivergencePdS_S_iidd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9LaplacianPdS_iidd    ; -- Begin function _Z9LaplacianPdS_iidd
	.globl	_Z9LaplacianPdS_iidd
	.p2align	8
	.type	_Z9LaplacianPdS_iidd,@function
_Z9LaplacianPdS_iidd:                   ; @_Z9LaplacianPdS_iidd
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_add_i32 s2, s2, -1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_add_i32 s4, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mul_i32 s4, s4, s2
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x18
	v_subrev_nc_u32_e32 v3, s3, v1
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 3, v[1:2]
	v_lshlrev_b64 v[0:1], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 3, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v9, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_clause 0x1
	global_load_b64 v[11:12], v[2:3], off offset:8
	global_load_b128 v[0:3], v[2:3], off offset:-8
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	s_clause 0x1
	global_load_b64 v[9:10], v[9:10], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[11:12], v[11:12], -v[2:3]
	v_add_f64 v[0:1], v[2:3], -v[0:1]
	s_waitcnt vmcnt(1)
	v_add_f64 v[9:10], v[9:10], -v[2:3]
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[4:5], null, s[8:9], s[8:9], v[11:12]
	v_div_scale_f64 v[13:14], null, s[8:9], s[8:9], v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[15:16], null, s[10:11], s[10:11], v[9:10]
	v_div_scale_f64 v[17:18], null, s[10:11], s[10:11], v[2:3]
	v_div_scale_f64 v[35:36], vcc_lo, v[11:12], s[8:9], v[11:12]
	v_rcp_f64_e32 v[19:20], v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[21:22], v[13:14]
	v_rcp_f64_e32 v[23:24], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(TRANS32_DEP_3)
	v_rcp_f64_e32 v[25:26], v[17:18]
	v_fma_f64 v[27:28], -v[4:5], v[19:20], 1.0
	v_fma_f64 v[29:30], -v[13:14], v[21:22], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[31:32], -v[15:16], v[23:24], 1.0
	v_fma_f64 v[33:34], -v[17:18], v[25:26], 1.0
	v_fma_f64 v[19:20], v[19:20], v[27:28], v[19:20]
	v_fma_f64 v[21:22], v[21:22], v[29:30], v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[23:24], v[23:24], v[31:32], v[23:24]
	v_fma_f64 v[25:26], v[25:26], v[33:34], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[27:28], -v[4:5], v[19:20], 1.0
	v_fma_f64 v[29:30], -v[13:14], v[21:22], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[31:32], -v[15:16], v[23:24], 1.0
	v_fma_f64 v[33:34], -v[17:18], v[25:26], 1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[19:20], v[19:20], v[27:28], v[19:20]
	v_div_scale_f64 v[27:28], s0, v[0:1], s[8:9], v[0:1]
	v_fma_f64 v[21:22], v[21:22], v[29:30], v[21:22]
	v_div_scale_f64 v[29:30], s1, v[9:10], s[10:11], v[9:10]
	v_fma_f64 v[23:24], v[23:24], v[31:32], v[23:24]
	v_div_scale_f64 v[31:32], s2, v[2:3], s[10:11], v[2:3]
	v_fma_f64 v[25:26], v[25:26], v[33:34], v[25:26]
	v_mul_f64 v[33:34], v[35:36], v[19:20]
	v_mul_f64 v[37:38], v[27:28], v[21:22]
	v_mul_f64 v[39:40], v[29:30], v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[41:42], v[31:32], v[25:26]
	v_fma_f64 v[4:5], -v[4:5], v[33:34], v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[13:14], -v[13:14], v[37:38], v[27:28]
	v_fma_f64 v[15:16], -v[15:16], v[39:40], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], -v[17:18], v[41:42], v[31:32]
	v_div_fmas_f64 v[4:5], v[4:5], v[19:20], v[33:34]
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_fmas_f64 v[13:14], v[13:14], v[21:22], v[37:38]
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f64 v[15:16], v[15:16], v[23:24], v[39:40]
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fmas_f64 v[17:18], v[17:18], v[25:26], v[41:42]
	v_div_fixup_f64 v[4:5], v[4:5], s[8:9], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fixup_f64 v[0:1], v[13:14], s[8:9], v[0:1]
	v_div_fixup_f64 v[9:10], v[15:16], s[10:11], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[2:3], v[17:18], s[10:11], v[2:3]
	v_add_f64 v[0:1], v[4:5], -v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[9:10], -v[2:3]
	v_mul_f64 v[2:3], v[2:3], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[0:1], s[10:11], v[2:3]
	v_add_co_u32 v2, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v8, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9LaplacianPdS_iidd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 43
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9LaplacianPdS_iidd, .Lfunc_end2-_Z9LaplacianPdS_iidd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 772
; NumSgprs: 18
; NumVgprs: 43
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 43
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8gradientPdS_S_iidd   ; -- Begin function _Z8gradientPdS_S_iidd
	.globl	_Z8gradientPdS_S_iidd
	.p2align	8
	.type	_Z8gradientPdS_S_iidd,@function
_Z8gradientPdS_S_iidd:                  ; @_Z8gradientPdS_S_iidd
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_add_i32 s2, s2, -1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_add_i32 s4, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mul_i32 s4, s4, s2
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x10
	v_subrev_nc_u32_e32 v3, s3, v1
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	s_clause 0x3
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	global_load_b64 v[8:9], v[6:7], off offset:8
	global_load_b64 v[6:7], v[6:7], off offset:-8
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[10:11], s[4:5], s[4:5]
	s_waitcnt vmcnt(2)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	v_add_f64 v[8:9], s[6:7], s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[4:5], null, v[10:11], v[10:11], v[6:7]
	v_div_scale_f64 v[12:13], null, v[8:9], v[8:9], v[2:3]
	v_div_scale_f64 v[22:23], vcc_lo, v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[14:15], v[4:5]
	v_rcp_f64_e32 v[16:17], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[4:5], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], -v[4:5], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_div_scale_f64 v[18:19], s2, v[2:3], v[8:9], v[2:3]
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[22:23], v[14:15]
	v_mul_f64 v[24:25], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], -v[4:5], v[20:21], v[22:23]
	v_fma_f64 v[12:13], -v[12:13], v[24:25], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[4:5], v[4:5], v[14:15], v[20:21]
	s_mov_b32 vcc_lo, s2
	s_load_b128 s[0:3], s[0:1], 0x0
	v_div_fmas_f64 v[12:13], v[12:13], v[16:17], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[4:5], v[4:5], v[10:11], v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s0, v0
	v_div_fixup_f64 v[2:3], v[12:13], v[8:9], v[2:3]
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[6:7], v[4:5], off
	global_store_b64 v[0:1], v[2:3], off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8gradientPdS_S_iidd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z8gradientPdS_S_iidd, .Lfunc_end3-_Z8gradientPdS_S_iidd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 560
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           8
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
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amdhsa.version:
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...

	.end_amdgpu_metadata
