#include <iostream>
#include <cuda.h>

using namespace std;

__global__ void hillis_steele(float *g_odata, float *g_idata, float *blocksum, int n) {
    	extern volatile __shared__  float temp[]; // allocated on invocation
    	int pout = 0, pin = 1;
	int idx  = blockIdx.x*blockDim.x + threadIdx.x;
    	int thid = threadIdx.x;
	int m = blockDim.x;
	temp[thid] = (idx == 0 || idx >= n) ? 0: g_idata[idx-1];
	__syncthreads();
        for( int offset = 1; offset<m; offset *= 2 ) {
	        pout = 1 - pout; // swap double buffer indices
	        pin  = 1 - pout;
	        if (thid >= offset)
	            temp[pout*m+thid] = temp[pin*m+thid] + temp[pin*m+thid - offset];
		else
		    temp[pout*m+thid] = temp[pin*m+thid];
	        __syncthreads(); // I need this here before I start next iteration 
	}
	g_odata[idx] = temp[pout*m+thid]; // write output
	if(thid == blockDim.x -1 || idx == n-1) 
		blocksum[blockIdx.x] = temp[pout*m+thid];
}

__global__ void sum_kernel(float *g_odata, float *blocksum, int n) {
	int idx  = blockIdx.x*blockDim.x + threadIdx.x;
	if(idx < n) {
		g_odata[idx] += blocksum[blockIdx.x];
	}
}
__host__ void scan(const float* in, float* out, unsigned int n, unsigned int threads_per_block) {
	float *g_idata, *g_odata;
	float *blocksum_in, *blocksum_out, *dummy;
	unsigned int m = threads_per_block;
	size_t shared_array_size = 2*m*sizeof(float);
	int blockdim = (n + m-1)/m;
	//float *blocksum = new float[blockdim];
	
	cudaMalloc((void **)&g_idata, n*sizeof(float));
	cudaMalloc((void **)&g_odata, n*sizeof(float));
	cudaMallocManaged((void **)&blocksum_in, blockdim*sizeof(float));
	//cudaMalloc((void **)&blocksum_out, blockdim*sizeof(float));
	cudaMallocManaged((void **)&blocksum_out, blockdim*sizeof(float));
	cudaMallocManaged((void **)&dummy, 1*sizeof(float));
	cudaMemcpy(g_idata, in, n*sizeof(float), cudaMemcpyHostToDevice);
	cudaMemset(g_odata, 0, n*sizeof(float));
		
	hillis_steele<<<blockdim, m, shared_array_size>>>(g_odata, g_idata, blocksum_in, n);
	cudaDeviceSynchronize();

	hillis_steele<<<1, m, shared_array_size>>>(blocksum_out, blocksum_in, dummy, blockdim);
	cudaDeviceSynchronize();
	
	sum_kernel<<<blockdim, m>>>(g_odata, blocksum_out, n);
	cudaDeviceSynchronize();

	cudaMemcpy(out, g_odata, n*sizeof(float), cudaMemcpyDeviceToHost);
	cudaDeviceSynchronize();

	cudaFree(g_idata);
	cudaFree(g_odata);
}

	.file	"tmpxft_0022bd62_00000000-6_scan.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z13hillis_steelePfS_S_iPfS_S_i
	.type	_Z38__device_stub__Z13hillis_steelePfS_S_iPfS_S_i, @function
_Z38__device_stub__Z13hillis_steelePfS_S_iPfS_S_i:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13hillis_steelePfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z38__device_stub__Z13hillis_steelePfS_S_iPfS_S_i, .-_Z38__device_stub__Z13hillis_steelePfS_S_iPfS_S_i
	.globl	_Z13hillis_steelePfS_S_i
	.type	_Z13hillis_steelePfS_S_i, @function
_Z13hillis_steelePfS_S_i:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z13hillis_steelePfS_S_iPfS_S_i
	.cfi_endproc
.LFE3661:
	.size	_Z13hillis_steelePfS_S_i, .-_Z13hillis_steelePfS_S_i
	.globl	_Z33__device_stub__Z10sum_kernelPfS_iPfS_i
	.type	_Z33__device_stub__Z10sum_kernelPfS_iPfS_i, @function
_Z33__device_stub__Z10sum_kernelPfS_iPfS_i:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10sum_kernelPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z33__device_stub__Z10sum_kernelPfS_iPfS_i, .-_Z33__device_stub__Z10sum_kernelPfS_iPfS_i
	.globl	_Z10sum_kernelPfS_i
	.type	_Z10sum_kernelPfS_i, @function
_Z10sum_kernelPfS_i:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10sum_kernelPfS_iPfS_i
	.cfi_endproc
.LFE3663:
	.size	_Z10sum_kernelPfS_i, .-_Z10sum_kernelPfS_i
	.globl	_Z4scanPKfPfjj
	.type	_Z4scanPKfPfjj, @function
_Z4scanPKfPfjj:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leal	(%rcx,%rcx), %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	salq	$2, %r13
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leal	-1(%rdx,%rcx), %eax
	xorl	%edx, %edx
	leaq	24(%rsp), %rdi
	divl	%ecx
	movl	%eax, %ebp
	movl	%r12d, %eax
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	%ebp, %rsi
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	salq	$2, %rsi
	movq	%rsi, 8(%rsp)
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	leaq	56(%rsp), %rdi
	movl	$1, %edx
	movl	$4, %esi
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rdx
	movq	24(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%ebx, 76(%rsp)
	xorl	%r9d, %r9d
	movq	%r13, %r8
	movabsq	$4294967297, %rax
	movl	%ebp, 64(%rsp)
	movq	%rax, 80(%rsp)
	movl	84(%rsp), %ecx
	movq	%rax, 68(%rsp)
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	%r12d, %ecx
	movq	32(%rsp), %rdi
	call	_Z38__device_stub__Z13hillis_steelePfS_S_iPfS_S_i
.L14:
	call	cudaDeviceSynchronize@PLT
	movl	%ebx, 76(%rsp)
	xorl	%r9d, %r9d
	movq	%r13, %r8
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movl	$1, 72(%rsp)
	movq	%rdi, 80(%rsp)
	movl	84(%rsp), %ecx
	movq	76(%rsp), %rdx
	movq	%rdi, 64(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	56(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	%ebp, %ecx
	movq	48(%rsp), %rdi
	call	_Z38__device_stub__Z13hillis_steelePfS_S_iPfS_S_i
.L15:
	call	cudaDeviceSynchronize@PLT
	movl	%ebx, 76(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebp, 64(%rsp)
	movq	%rax, 80(%rsp)
	movl	84(%rsp), %ecx
	movq	%rax, 68(%rsp)
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%r12d, %edx
	call	_Z33__device_stub__Z10sum_kernelPfS_iPfS_i
.L16:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z4scanPKfPfjj, .-_Z4scanPKfPfjj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10sum_kernelPfS_i"
.LC1:
	.string	"_Z13hillis_steelePfS_S_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10sum_kernelPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13hillis_steelePfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

using namespace std;

__global__ void hillis_steele(float *g_odata, float *g_idata, float *blocksum, int n) {
    	extern volatile __shared__  float temp[]; // allocated on invocation
    	int pout = 0, pin = 1;
	int idx  = blockIdx.x*blockDim.x + threadIdx.x;
    	int thid = threadIdx.x;
	int m = blockDim.x;
	temp[thid] = (idx == 0 || idx >= n) ? 0: g_idata[idx-1];
	__syncthreads();
        for( int offset = 1; offset<m; offset *= 2 ) {
	        pout = 1 - pout; // swap double buffer indices
	        pin  = 1 - pout;
	        if (thid >= offset)
	            temp[pout*m+thid] = temp[pin*m+thid] + temp[pin*m+thid - offset];
		else
		    temp[pout*m+thid] = temp[pin*m+thid];
	        __syncthreads(); // I need this here before I start next iteration 
	}
	g_odata[idx] = temp[pout*m+thid]; // write output
	if(thid == blockDim.x -1 || idx == n-1) 
		blocksum[blockIdx.x] = temp[pout*m+thid];
}

__global__ void sum_kernel(float *g_odata, float *blocksum, int n) {
	int idx  = blockIdx.x*blockDim.x + threadIdx.x;
	if(idx < n) {
		g_odata[idx] += blocksum[blockIdx.x];
	}
}
__host__ void scan(const float* in, float* out, unsigned int n, unsigned int threads_per_block) {
	float *g_idata, *g_odata;
	float *blocksum_in, *blocksum_out, *dummy;
	unsigned int m = threads_per_block;
	size_t shared_array_size = 2*m*sizeof(float);
	int blockdim = (n + m-1)/m;
	//float *blocksum = new float[blockdim];
	
	hipMalloc((void **)&g_idata, n*sizeof(float));
	hipMalloc((void **)&g_odata, n*sizeof(float));
	hipMallocManaged((void **)&blocksum_in, blockdim*sizeof(float));
	//cudaMalloc((void **)&blocksum_out, blockdim*sizeof(float));
	hipMallocManaged((void **)&blocksum_out, blockdim*sizeof(float));
	hipMallocManaged((void **)&dummy, 1*sizeof(float));
	hipMemcpy(g_idata, in, n*sizeof(float), hipMemcpyHostToDevice);
	hipMemset(g_odata, 0, n*sizeof(float));
		
	hillis_steele<<<blockdim, m, shared_array_size>>>(g_odata, g_idata, blocksum_in, n);
	hipDeviceSynchronize();

	hillis_steele<<<1, m, shared_array_size>>>(blocksum_out, blocksum_in, dummy, blockdim);
	hipDeviceSynchronize();
	
	sum_kernel<<<blockdim, m>>>(g_odata, blocksum_out, n);
	hipDeviceSynchronize();

	hipMemcpy(out, g_odata, n*sizeof(float), hipMemcpyDeviceToHost);
	hipDeviceSynchronize();

	hipFree(g_idata);
	hipFree(g_odata);
}

	.text
	.file	"scan.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__hillis_steelePfS_S_i # -- Begin function _Z28__device_stub__hillis_steelePfS_S_i
	.type	_Z28__device_stub__hillis_steelePfS_S_i,@function
_Z28__device_stub__hillis_steelePfS_S_i: # @_Z28__device_stub__hillis_steelePfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13hillis_steelePfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__hillis_steelePfS_S_i, .Lfunc_end0-_Z28__device_stub__hillis_steelePfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__sum_kernelPfS_i # -- Begin function _Z25__device_stub__sum_kernelPfS_i
	.type	_Z25__device_stub__sum_kernelPfS_i,@function
_Z25__device_stub__sum_kernelPfS_i:     # @_Z25__device_stub__sum_kernelPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10sum_kernelPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__sum_kernelPfS_i, .Lfunc_end1-_Z25__device_stub__sum_kernelPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z4scanPKfPfjj                  # -- Begin function _Z4scanPKfPfjj
	.type	_Z4scanPKfPfjj,@function
_Z4scanPKfPfjj:                         # @_Z4scanPKfPfjj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movl	%edx, %ecx
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	leal	(%rbx,%rbx), %r13d
	shlq	$2, %r13
	leal	(%rcx,%rbx), %eax
	decl	%eax
	xorl	%edx, %edx
	divl	%ebx
	movl	%eax, %r12d
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	movl	%ecx, %r15d
	shlq	$2, %r15
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movslq	%r12d, %r14
	shlq	$2, %r14
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r12, %r14
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	64(%rsp), %rdi
	movl	$4, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	movq	%r15, %rdx
	callq	hipMemset
	btsq	$32, %r12
	movl	%ebx, %ebx
	btsq	$32, %rbx
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r13, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z28__device_stub__hillis_steelePfS_S_i
.LBB2_2:
	callq	hipDeviceSynchronize
	incq	%rbp
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r13, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	32(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	64(%rsp), %rdx
	movl	%r14d, %ecx
	callq	_Z28__device_stub__hillis_steelePfS_S_i
.LBB2_4:
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z25__device_stub__sum_kernelPfS_i
.LBB2_6:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z4scanPKfPfjj, .Lfunc_end2-_Z4scanPKfPfjj
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13hillis_steelePfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10sum_kernelPfS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13hillis_steelePfS_S_i,@object # @_Z13hillis_steelePfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z13hillis_steelePfS_S_i
	.p2align	3, 0x0
_Z13hillis_steelePfS_S_i:
	.quad	_Z28__device_stub__hillis_steelePfS_S_i
	.size	_Z13hillis_steelePfS_S_i, 8

	.type	_Z10sum_kernelPfS_i,@object     # @_Z10sum_kernelPfS_i
	.globl	_Z10sum_kernelPfS_i
	.p2align	3, 0x0
_Z10sum_kernelPfS_i:
	.quad	_Z25__device_stub__sum_kernelPfS_i
	.size	_Z10sum_kernelPfS_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13hillis_steelePfS_S_i"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10sum_kernelPfS_i"
	.size	.L__unnamed_2, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__hillis_steelePfS_S_i
	.addrsig_sym _Z25__device_stub__sum_kernelPfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13hillis_steelePfS_S_i
	.addrsig_sym _Z10sum_kernelPfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13hillis_steelePfS_S_i ; -- Begin function _Z13hillis_steelePfS_S_i
	.globl	_Z13hillis_steelePfS_S_i
	.p2align	8
	.type	_Z13hillis_steelePfS_S_i,@function
_Z13hillis_steelePfS_S_i:               ; @_Z13hillis_steelePfS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s10, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_mov_b32 s2, s15
	v_mov_b32_e32 v4, 0
	s_mov_b32 s11, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s10, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s10, v[0:1]
	v_cmp_ne_u32_e32 vcc_lo, 0, v1
	v_cmp_gt_i32_e64 s0, s3, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s0
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v4, v[3:4], off offset:-4
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_lshl_add_u32 v3, v0, 2, 0
	s_mov_b64 s[0:1], src_shared_base
	s_cmp_lt_u32 s10, 2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	v_cndmask_b32_e32 v5, 0, v3, vcc_lo
	v_cndmask_b32_e64 v6, 0, s1, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b32 v[5:6], v4 dlc
	s_waitcnt_vscnt null, 0x0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.3:                                ; %.lr.ph.preheader
	s_mov_b32 s0, 1
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_mul_i32 s7, s11, s10
	s_mov_b32 s6, exec_lo
	v_lshl_add_u32 v4, s7, 2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s1, vcc_lo
	flat_load_b32 v4, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cmpx_le_u32_e64 s0, v0
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_add_nc_u32_e32 v5, s7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v5, s0, v5
	v_lshl_add_u32 v5, v5, 2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v5
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cndmask_b32_e64 v6, 0, s1, vcc_lo
	flat_load_b32 v5, v[5:6] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v4, v4, v5
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_sub_i32 s11, 1, s11
	s_lshl_b32 s0, s0, 1
	s_mul_i32 s6, s11, s10
	s_cmp_ge_u32 s0, s10
	v_lshl_add_u32 v5, s6, 2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v5
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cndmask_b32_e64 v6, 0, s1, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[5:6], v4 dlc
	s_waitcnt_vscnt null, 0x0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_4
.LBB0_7:                                ; %Flow67
	s_mul_i32 s0, s11, s10
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_lshl_add_u32 v3, s0, 2, v3
	s_mov_b64 s[0:1], src_shared_base
	s_add_i32 s10, s10, -1
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_eq_u32_e64 s0, s3, v1
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	s_mov_b32 s3, 0
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cndmask_b32_e64 v4, 0, s1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s10, v0
	v_add_co_u32 v0, s1, s4, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s1, s5, v6, s1
	flat_load_b32 v7, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	s_or_b32 s0, vcc_lo, s0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v7, off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_9
; %bb.8:
	flat_load_b32 v0, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	s_lshl_b64 s[0:1], s[2:3], 2
	v_mov_b32_e32 v1, 0
	s_add_u32 s0, s8, s0
	s_addc_u32 s1, s9, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[0:1]
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13hillis_steelePfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13hillis_steelePfS_S_i, .Lfunc_end0-_Z13hillis_steelePfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 596
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10sum_kernelPfS_i     ; -- Begin function _Z10sum_kernelPfS_i
	.globl	_Z10sum_kernelPfS_i
	.p2align	8
	.type	_Z10sum_kernelPfS_i,@function
_Z10sum_kernelPfS_i:                    ; @_Z10sum_kernelPfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[0:1], s[2:3], 2
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	s_load_b32 s0, s[0:1], 0x0
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v2, s0, v2
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10sum_kernelPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10sum_kernelPfS_i, .Lfunc_end1-_Z10sum_kernelPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 168
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym temp
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13hillis_steelePfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13hillis_steelePfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10sum_kernelPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10sum_kernelPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
