#include <sstream>
#include <iostream>
#include <cuda_runtime.h>
#include <stdio.h>
#include <curand_kernel.h>

using namespace std;

__device__ float getElement(float *A, int row, int col, int height, int width)
{
    return A[row * width + col];
}


__device__ void setElement(float *A, int row, int col, float value, int height, int width)
{
    A[row * width + col] = value;
}


__device__ float gDeterm3(
    float a0, float a1, float a2, 
    float a3, float a4, float a5, 
    float a6, float a7, float a8
)
{
    float sum1, sum2;
    sum1=a2*a3*a7+a1*a5*a6+a0*a4*a8;
    sum2=a8*a1*a3+a7*a5*a0+a2*a4*a6;
    return sum1-sum2;
}


__device__ bool gFittingPlane(float *x, float *y, float *z, int n, float &a, float &b, float &c)
{
    int i;
    float x1, x2, y1, y2, z1, xz, yz, xy, r;
 
    x1 = x2 = y1 = y2 = z1 = xz = yz = xy = 0.0f;
    for(i=0; i<n; ++i)
    {
        x1 += x[i];
        x2 += x[i]*x[i];
        xz += x[i]*z[i];
 
        y1 += y[i];
        y2 += y[i]*y[i];
        yz += y[i]*z[i];
 
        z1 += z[i];
        xy += x[i]*y[i];
    }
 
    r = gDeterm3(x2, xy, x1, xy, y2, y1, x1, y1, n) + 1e-5;
    // if(r == 0) return false;
 
    a = gDeterm3(xz, xy, x1, yz, y2, y1, z1, y1, n) / r;
    b = gDeterm3(x2, xz, x1, xy, yz, y1, x1, z1, n) / r;
    c = gDeterm3(x2, xy, xz, xy, y2, yz, x1, y1, z1) / r;
 
    return true;
}


__device__ void RANSAC_FitPlane(float *X, float *Y, float *Disp, float *coef, int samples, int *r_samples, int r_iter, int r_sample_num, float sigma)
{
    int max_inliers = 0; 
    float best_dx = 0.0;
    float best_dy = 0.0;
    float best_d  = 0.0;
    for (int iter = 0; iter < r_iter; ++iter)
    {
        float dx = 0.0;
        float dy = 0.0;
        float d  = 0.0;
        
        // ----------- At least square regression for a window ------------- //
        float x1, x2, y1, y2, z1, xz, yz, xy, r;
        x1 = x2 = y1 = y2 = z1 = xz = yz = xy = 0.0f;
        for(int i=0; i<r_sample_num; ++i)
        {
            int index = r_samples[i+iter*r_sample_num];
            x1 += X[index];
            x2 += X[index]*X[index];
            xz += X[index]*Disp[index];
     
            y1 += Y[index];
            y2 += Y[index]*Y[index];
            yz += Y[index]*Disp[index];
     
            z1 += Disp[index];
            xy += X[index]*Y[index];

            // dbug[index] = ceil(Y[index]);
        }
        r  = gDeterm3(x2, xy, x1, xy, y2, y1, x1, y1, r_sample_num) + 1e-15;
        dx = gDeterm3(xz, xy, x1, yz, y2, y1, z1, y1, r_sample_num) / r;
        dy = gDeterm3(x2, xz, x1, xy, yz, y1, x1, z1, r_sample_num) / r;
        d  = gDeterm3(x2, xy, xz, xy, y2, yz, x1, y1, z1) / r;
        // *********** At least square regression for a window *********** //


        int inliers = 0;
        for (int i = 0; i < samples; ++i)  // get inliers number of a window
        {
            float err = dx * X[i] + dy * Y[i] + d - Disp[i];  //cal regression error of a pixel
            float abs_err;

            if (err < 0)
                abs_err = 0 - err;
            else
                abs_err = err;  // abs(err)

            if (abs_err < sigma)
                inliers++;
        }
        if (inliers >= max_inliers)  // update the best plane params
        {
            max_inliers = inliers;
            best_dx = dx;
            best_dy = dy;
            best_d = d;
        }
    }
    coef[0] = best_dx;
    coef[1] = best_dy;
    coef[2] = best_d;
}

__global__ void triMatOp(float *X, float *Y, float *Disp, float *coef, int pixels, int samples, 
    int *r_samples, int r_iter, int r_sample_num, float sigma)
{
    // cudaError_t error = cudaGetLastError();
    // if (error != cudaSuccess) {
    //  throw std::runtime_error(cudaGetErrorString(error));
    // }
    unsigned int row = threadIdx.x + blockIdx.x * blockDim.x;
    int stride = blockDim.x * gridDim.x;
    for (int r = row; r < pixels; r += stride)
    {
        // dbug[samples*r] = r;
        RANSAC_FitPlane(X, Y, &Disp[samples*r], &coef[3*r], samples, r_samples, r_iter, r_sample_num, sigma);
    }
}


void run_array_op_kernel
(float *X, float *Y, float *Disp, float *coef, int pixels, int samples, 
    int *r_samples, int r_iter, int r_sample_num, 
    float sigma, int dim_block)
{
//   cudaError_t error = cudaGetLastError();
//   if (error != cudaSuccess) {
//       std::stringstream strstr;
//       strstr << cudaGetErrorString(error);
//       throw strstr.str();
//     }
  dim3 dimBlock(dim_block, 1, 1);
//   std::cout << "dimBlock.x: " << dimBlock.x << std::endl;
  dim3 dimGrid(ceil((float)pixels / dimBlock.x));
  triMatOp<<<dimGrid, dimBlock>>>(X, Y, Disp, coef, pixels, samples, r_samples, r_iter, r_sample_num, sigma);

  cudaError_t error = cudaGetLastError();
  if (error != cudaSuccess) {
    std::stringstream strstr;
    strstr << "run_array_op_kernel launch failed" << std::endl;
    strstr << "dimBlock: " << dimBlock.x << ", " << dimBlock.y << std::endl;
    strstr << "dimGrid: " << dimGrid.x << ", " << dimGrid.y << std::endl;
    strstr << cudaGetErrorString(error);
    throw strstr.str();
  }
}

	.file	"tmpxft_002cbed1_00000000-6_array_op.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3915:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3915:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10getElementPfiiii
	.type	_Z10getElementPfiiii, @function
_Z10getElementPfiiii:
.LFB3907:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3907:
	.size	_Z10getElementPfiiii, .-_Z10getElementPfiiii
	.globl	_Z10setElementPfiifii
	.type	_Z10setElementPfiifii, @function
_Z10setElementPfiifii:
.LFB3908:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3908:
	.size	_Z10setElementPfiifii, .-_Z10setElementPfiifii
	.globl	_Z8gDeterm3fffffffff
	.type	_Z8gDeterm3fffffffff, @function
_Z8gDeterm3fffffffff:
.LFB3909:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3909:
	.size	_Z8gDeterm3fffffffff, .-_Z8gDeterm3fffffffff
	.globl	_Z13gFittingPlanePfS_S_iRfS0_S0_
	.type	_Z13gFittingPlanePfS_S_iRfS0_S0_, @function
_Z13gFittingPlanePfS_S_iRfS0_S0_:
.LFB3910:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3910:
	.size	_Z13gFittingPlanePfS_S_iRfS0_S0_, .-_Z13gFittingPlanePfS_S_iRfS0_S0_
	.globl	_Z15RANSAC_FitPlanePfS_S_S_iPiiif
	.type	_Z15RANSAC_FitPlanePfS_S_S_iPiiif, @function
_Z15RANSAC_FitPlanePfS_S_S_iPiiif:
.LFB3911:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3911:
	.size	_Z15RANSAC_FitPlanePfS_S_S_iPiiif, .-_Z15RANSAC_FitPlanePfS_S_S_iPiiif
	.globl	_Z40__device_stub__Z8triMatOpPfS_S_S_iiPiiifPfS_S_S_iiPiiif
	.type	_Z40__device_stub__Z8triMatOpPfS_S_S_iiPiiifPfS_S_S_iiPiiif, @function
_Z40__device_stub__Z8triMatOpPfS_S_S_iiPiiifPfS_S_S_iiPiiif:
.LFB3937:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movl	%r8d, 28(%rsp)
	movl	%r9d, 24(%rsp)
	movq	%rax, 16(%rsp)
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z8triMatOpPfS_S_S_iiPiiif(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L12:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3937:
	.size	_Z40__device_stub__Z8triMatOpPfS_S_S_iiPiiifPfS_S_S_iiPiiif, .-_Z40__device_stub__Z8triMatOpPfS_S_S_iiPiiifPfS_S_S_iiPiiif
	.globl	_Z8triMatOpPfS_S_S_iiPiiif
	.type	_Z8triMatOpPfS_S_S_iiPiiif, @function
_Z8triMatOpPfS_S_S_iiPiiif:
.LFB3938:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z8triMatOpPfS_S_S_iiPiiifPfS_S_S_iiPiiif
	.cfi_endproc
.LFE3938:
	.size	_Z8triMatOpPfS_S_S_iiPiiif, .-_Z8triMatOpPfS_S_S_iiPiiif
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z8triMatOpPfS_S_S_iiPiiif"
.LC1:
	.string	"precalc_xorwow_matrix"
.LC2:
	.string	"precalc_xorwow_offset_matrix"
.LC3:
	.string	"mrg32k3aM1"
.LC4:
	.string	"mrg32k3aM2"
.LC5:
	.string	"mrg32k3aM1SubSeq"
.LC6:
	.string	"mrg32k3aM2SubSeq"
.LC7:
	.string	"mrg32k3aM1Seq"
.LC8:
	.string	"mrg32k3aM2Seq"
.LC9:
	.string	"__cr_lgamma_table"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3940:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8triMatOpPfS_S_S_iiPiiif(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3940:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC10:
	.string	"run_array_op_kernel launch failed"
.LC11:
	.string	"dimBlock: "
.LC12:
	.string	", "
.LC13:
	.string	"dimGrid: "
	.text
	.globl	_Z19run_array_op_kernelPfS_S_S_iiPiiifi
	.type	_Z19run_array_op_kernelPfS_S_S_iiPiiifi, @function
_Z19run_array_op_kernelPfS_S_S_iiPiiifi:
.LFB3912:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3912
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$472, %rsp
	.cfi_def_cfa_offset 528
	movl	552(%rsp), %r14d
	movss	%xmm0, 28(%rsp)
	cvtsi2ssl	%r8d, %xmm0
	movq	528(%rsp), %r12
	movq	%rsi, (%rsp)
	cvtsi2ssq	%r14, %xmm1
	movq	%rdx, 8(%rsp)
	movq	%rcx, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 456(%rsp)
	xorl	%eax, %eax
	divss	%xmm1, %xmm0
	call	ceilf@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	cvttss2siq	%xmm0, %rbx
	movl	552(%rsp), %eax
	movl	$1, 56(%rsp)
	movl	%eax, 40(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 44(%rsp)
	movl	48(%rsp), %ecx
	movl	%ebx, 52(%rsp)
	movq	40(%rsp), %rdx
	movq	52(%rsp), %rdi
.LEHB0:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	%rax
	.cfi_def_cfa_offset 536
	movl	552(%rsp), %eax
	movl	%r13d, %r9d
	movl	%ebp, %r8d
	movq	%r15, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 544
	movl	552(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 552
	pushq	%r12
	.cfi_def_cfa_offset 560
	movss	60(%rsp), %xmm0
	movq	48(%rsp), %rcx
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	call	_Z40__device_stub__Z8triMatOpPfS_S_S_iiPiiifPfS_S_S_iiPiiif
	addq	$32, %rsp
	.cfi_def_cfa_offset 528
.L23:
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L20
	leaq	64(%rsp), %rbp
	leaq	80(%rsp), %r12
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev@PLT
.LEHE0:
	leaq	.LC10(%rip), %rsi
	movq	%r12, %rdi
.LEHB1:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC11(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r14, %rsi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC12(%rip), %r14
	movq	%rax, %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$1, %esi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC13(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebx, %esi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$1, %esi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	%r13d, %edi
	call	cudaGetErrorString@PLT
	movq	%rax, %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.LEHE1:
	movl	$32, %edi
	call	__cxa_allocate_exception@PLT
	leaq	88(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB2:
	call	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@PLT
.LEHE2:
	movq	456(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L34
	movq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE(%rip), %rsi
	movq	%r12, %rdi
.LEHB3:
	call	__cxa_throw@PLT
.LEHE3:
.L31:
	endbr64
	movq	%rax, %rbx
.L26:
	movq	%r12, %rdi
	call	__cxa_free_exception@PLT
	jmp	.L27
.L30:
	endbr64
	movq	%rax, %rbx
.L27:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	movq	456(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L34
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L20:
	movq	456(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
.L34:
	call	__stack_chk_fail@PLT
.L29:
	addq	$472, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3912:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3912:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3912-.LLSDACSB3912
.LLSDACSB3912:
	.uleb128 .LEHB0-.LFB3912
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3912
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L30-.LFB3912
	.uleb128 0
	.uleb128 .LEHB2-.LFB3912
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L31-.LFB3912
	.uleb128 0
	.uleb128 .LEHB3-.LFB3912
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L30-.LFB3912
	.uleb128 0
	.uleb128 .LEHB4-.LFB3912
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE3912:
	.text
	.size	_Z19run_array_op_kernelPfS_S_S_iiPiiifi, .-_Z19run_array_op_kernelPfS_S_S_iiPiiifi
	.weak	_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.section	.rodata._ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.align 32
	.type	_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, @object
	.size	_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, 53
_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
	.string	"NSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE"
	.weak	_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.section	.data.rel.ro._ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"awG",@progbits,_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.align 8
	.type	_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, @object
	.size	_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, 16
_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <sstream>
#include <iostream>
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <hiprand/hiprand_kernel.h>

using namespace std;

__device__ float getElement(float *A, int row, int col, int height, int width)
{
    return A[row * width + col];
}


__device__ void setElement(float *A, int row, int col, float value, int height, int width)
{
    A[row * width + col] = value;
}


__device__ float gDeterm3(
    float a0, float a1, float a2, 
    float a3, float a4, float a5, 
    float a6, float a7, float a8
)
{
    float sum1, sum2;
    sum1=a2*a3*a7+a1*a5*a6+a0*a4*a8;
    sum2=a8*a1*a3+a7*a5*a0+a2*a4*a6;
    return sum1-sum2;
}


__device__ bool gFittingPlane(float *x, float *y, float *z, int n, float &a, float &b, float &c)
{
    int i;
    float x1, x2, y1, y2, z1, xz, yz, xy, r;
 
    x1 = x2 = y1 = y2 = z1 = xz = yz = xy = 0.0f;
    for(i=0; i<n; ++i)
    {
        x1 += x[i];
        x2 += x[i]*x[i];
        xz += x[i]*z[i];
 
        y1 += y[i];
        y2 += y[i]*y[i];
        yz += y[i]*z[i];
 
        z1 += z[i];
        xy += x[i]*y[i];
    }
 
    r = gDeterm3(x2, xy, x1, xy, y2, y1, x1, y1, n) + 1e-5;
    // if(r == 0) return false;
 
    a = gDeterm3(xz, xy, x1, yz, y2, y1, z1, y1, n) / r;
    b = gDeterm3(x2, xz, x1, xy, yz, y1, x1, z1, n) / r;
    c = gDeterm3(x2, xy, xz, xy, y2, yz, x1, y1, z1) / r;
 
    return true;
}


__device__ void RANSAC_FitPlane(float *X, float *Y, float *Disp, float *coef, int samples, int *r_samples, int r_iter, int r_sample_num, float sigma)
{
    int max_inliers = 0; 
    float best_dx = 0.0;
    float best_dy = 0.0;
    float best_d  = 0.0;
    for (int iter = 0; iter < r_iter; ++iter)
    {
        float dx = 0.0;
        float dy = 0.0;
        float d  = 0.0;
        
        // ----------- At least square regression for a window ------------- //
        float x1, x2, y1, y2, z1, xz, yz, xy, r;
        x1 = x2 = y1 = y2 = z1 = xz = yz = xy = 0.0f;
        for(int i=0; i<r_sample_num; ++i)
        {
            int index = r_samples[i+iter*r_sample_num];
            x1 += X[index];
            x2 += X[index]*X[index];
            xz += X[index]*Disp[index];
     
            y1 += Y[index];
            y2 += Y[index]*Y[index];
            yz += Y[index]*Disp[index];
     
            z1 += Disp[index];
            xy += X[index]*Y[index];

            // dbug[index] = ceil(Y[index]);
        }
        r  = gDeterm3(x2, xy, x1, xy, y2, y1, x1, y1, r_sample_num) + 1e-15;
        dx = gDeterm3(xz, xy, x1, yz, y2, y1, z1, y1, r_sample_num) / r;
        dy = gDeterm3(x2, xz, x1, xy, yz, y1, x1, z1, r_sample_num) / r;
        d  = gDeterm3(x2, xy, xz, xy, y2, yz, x1, y1, z1) / r;
        // *********** At least square regression for a window *********** //


        int inliers = 0;
        for (int i = 0; i < samples; ++i)  // get inliers number of a window
        {
            float err = dx * X[i] + dy * Y[i] + d - Disp[i];  //cal regression error of a pixel
            float abs_err;

            if (err < 0)
                abs_err = 0 - err;
            else
                abs_err = err;  // abs(err)

            if (abs_err < sigma)
                inliers++;
        }
        if (inliers >= max_inliers)  // update the best plane params
        {
            max_inliers = inliers;
            best_dx = dx;
            best_dy = dy;
            best_d = d;
        }
    }
    coef[0] = best_dx;
    coef[1] = best_dy;
    coef[2] = best_d;
}

__global__ void triMatOp(float *X, float *Y, float *Disp, float *coef, int pixels, int samples, 
    int *r_samples, int r_iter, int r_sample_num, float sigma)
{
    // cudaError_t error = cudaGetLastError();
    // if (error != cudaSuccess) {
    //  throw std::runtime_error(cudaGetErrorString(error));
    // }
    unsigned int row = threadIdx.x + blockIdx.x * blockDim.x;
    int stride = blockDim.x * gridDim.x;
    for (int r = row; r < pixels; r += stride)
    {
        // dbug[samples*r] = r;
        RANSAC_FitPlane(X, Y, &Disp[samples*r], &coef[3*r], samples, r_samples, r_iter, r_sample_num, sigma);
    }
}


void run_array_op_kernel
(float *X, float *Y, float *Disp, float *coef, int pixels, int samples, 
    int *r_samples, int r_iter, int r_sample_num, 
    float sigma, int dim_block)
{
//   cudaError_t error = cudaGetLastError();
//   if (error != cudaSuccess) {
//       std::stringstream strstr;
//       strstr << cudaGetErrorString(error);
//       throw strstr.str();
//     }
  dim3 dimBlock(dim_block, 1, 1);
//   std::cout << "dimBlock.x: " << dimBlock.x << std::endl;
  dim3 dimGrid(ceil((float)pixels / dimBlock.x));
  triMatOp<<<dimGrid, dimBlock>>>(X, Y, Disp, coef, pixels, samples, r_samples, r_iter, r_sample_num, sigma);

  hipError_t error = hipGetLastError();
  if (error != hipSuccess) {
    std::stringstream strstr;
    strstr << "run_array_op_kernel launch failed" << std::endl;
    strstr << "dimBlock: " << dimBlock.x << ", " << dimBlock.y << std::endl;
    strstr << "dimGrid: " << dimGrid.x << ", " << dimGrid.y << std::endl;
    strstr << hipGetErrorString(error);
    throw strstr.str();
  }
}

	.text
	.file	"array_op.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z23__device_stub__triMatOpPfS_S_S_iiPiiif # -- Begin function _Z23__device_stub__triMatOpPfS_S_S_iiPiiif
	.type	_Z23__device_stub__triMatOpPfS_S_S_iiPiiif,@function
_Z23__device_stub__triMatOpPfS_S_S_iiPiiif: # @_Z23__device_stub__triMatOpPfS_S_S_iiPiiif
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	4(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	movq	%r9, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8triMatOpPfS_S_S_iiPiiif, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__triMatOpPfS_S_S_iiPiiif, .Lfunc_end0-_Z23__device_stub__triMatOpPfS_S_S_iiPiiif
	.cfi_endproc
                                        # -- End function
	.globl	_Z19run_array_op_kernelPfS_S_S_iiPiiifi # -- Begin function _Z19run_array_op_kernelPfS_S_S_iiPiiifi
	.type	_Z19run_array_op_kernelPfS_S_S_iiPiiifi,@function
_Z19run_array_op_kernelPfS_S_S_iiPiiifi: # @_Z19run_array_op_kernelPfS_S_S_iiPiiifi
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$408, %rsp                      # imm = 0x198
	.cfi_def_cfa_offset 464
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%r9d, (%rsp)                    # 4-byte Spill
	movl	%r8d, %r14d
	movq	%rcx, %r12
	movq	%rdx, %r13
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	488(%rsp), %eax
	movq	%rax, %rbp
	btsq	$32, %rbp
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r8d, %xmm0
	cvtsi2ss	%rax, %xmm1
	divss	%xmm1, %xmm0
	.cfi_escape 0x2e, 0x00
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %edi
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	btsq	$32, %rdi
	.cfi_escape 0x2e, 0x00
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movl	480(%rsp), %eax
	movl	472(%rsp), %r10d
	.cfi_escape 0x2e, 0x20
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movq	%r12, %rcx
	movl	%r14d, %r8d
	movl	8(%rsp), %r9d                   # 4-byte Reload
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	488(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z23__device_stub__triMatOpPfS_S_S_iiPiiif
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_2:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.22:
	addq	$408, %rsp                      # imm = 0x198
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 464
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	callq	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev
	leaq	32(%rsp), %r14
.Ltmp0:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %esi
	movl	$33, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp1:
# %bb.4:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp2:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp3:
# %bb.5:                                # %_ZNSolsEPFRSoS_E.exit
.Ltmp4:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.1, %esi
	movl	$10, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp5:
# %bb.6:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit25
.Ltmp6:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	movl	488(%rsp), %esi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp7:
# %bb.7:                                # %_ZNSolsEj.exit
.Ltmp8:
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp9:
# %bb.8:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit26
.Ltmp10:
	.cfi_escape 0x2e, 0x00
	movl	$1, %esi
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp11:
# %bb.9:                                # %_ZNSolsEj.exit27
.Ltmp12:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp13:
# %bb.10:                               # %_ZNSolsEPFRSoS_E.exit28
.Ltmp14:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp15:
# %bb.11:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit29
.Ltmp16:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp17:
# %bb.12:                               # %_ZNSolsEj.exit30
.Ltmp18:
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp19:
# %bb.13:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit31
.Ltmp20:
	.cfi_escape 0x2e, 0x00
	movl	$1, %esi
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp21:
# %bb.14:                               # %_ZNSolsEj.exit32
.Ltmp22:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp23:
# %bb.15:                               # %_ZNSolsEPFRSoS_E.exit33
.Ltmp24:
	.cfi_escape 0x2e, 0x00
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp25:
# %bb.16:
.Ltmp26:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp27:
# %bb.17:
	.cfi_escape 0x2e, 0x00
	movl	$32, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
	leaq	40(%rsp), %rsi
.Ltmp28:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv
.Ltmp29:
# %bb.18:                               # %_ZNKSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv.exit
.Ltmp31:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, %esi
	movl	$_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev, %edx
	movq	%r14, %rdi
	callq	__cxa_throw
.Ltmp32:
# %bb.23:
.LBB1_20:
.Ltmp30:
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	__cxa_free_exception
	jmp	.LBB1_21
.LBB1_19:
.Ltmp33:
	movq	%rax, %rbx
.LBB1_21:
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	144(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt8ios_baseD2Ev
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	_Z19run_array_op_kernelPfS_S_S_iiPiiifi, .Lfunc_end1-_Z19run_array_op_kernelPfS_S_S_iiPiiifi
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp27-.Ltmp0                 #   Call between .Ltmp0 and .Ltmp27
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp28-.Ltmp27                #   Call between .Ltmp27 and .Ltmp28
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp28-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp29-.Ltmp28                #   Call between .Ltmp28 and .Ltmp29
	.uleb128 .Ltmp30-.Lfunc_begin0          #     jumps to .Ltmp30
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp31-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp32-.Ltmp31                #   Call between .Ltmp31 and .Ltmp32
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Lfunc_end1-.Ltmp32            #   Call between .Ltmp32 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8triMatOpPfS_S_S_iiPiiif, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8triMatOpPfS_S_S_iiPiiif,@object # @_Z8triMatOpPfS_S_S_iiPiiif
	.section	.rodata,"a",@progbits
	.globl	_Z8triMatOpPfS_S_S_iiPiiif
	.p2align	3, 0x0
_Z8triMatOpPfS_S_S_iiPiiif:
	.quad	_Z23__device_stub__triMatOpPfS_S_S_iiPiiif
	.size	_Z8triMatOpPfS_S_S_iiPiiif, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"run_array_op_kernel launch failed"
	.size	.L.str, 34

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"dimBlock: "
	.size	.L.str.1, 11

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	", "
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"dimGrid: "
	.size	.L.str.3, 10

	.type	_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@object # @_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.section	.rodata._ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.weak	_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
	.asciz	"NSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE"
	.size	_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, 53

	.type	_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@object # @_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.section	.rodata._ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.weak	_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.p2align	3, 0x0
_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.size	_ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, 16

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z8triMatOpPfS_S_S_iiPiiif"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__triMatOpPfS_S_S_iiPiiif
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z8triMatOpPfS_S_S_iiPiiif
	.addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE
	.addrsig_sym _ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.addrsig_sym _ZTINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8triMatOpPfS_S_S_iiPiiif ; -- Begin function _Z8triMatOpPfS_S_S_iiPiiif
	.globl	_Z8triMatOpPfS_S_S_iiPiiif
	.p2align	8
	.type	_Z8triMatOpPfS_S_S_iiPiiif,@function
_Z8triMatOpPfS_S_S_iiPiiif:             ; @_Z8triMatOpPfS_S_S_iiPiiif
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x4c
	s_load_b64 s[2:3], s[0:1], 0x20
	s_add_u32 s4, s0, 64
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s20, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[3:4], null, s15, s20, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v3
	s_cbranch_execz .LBB0_14
; %bb.1:                                ; %.lr.ph
	s_load_b32 s21, s[4:5], 0x0
	s_clause 0x2
	s_load_b128 s[12:15], s[0:1], 0x30
	s_load_b64 s[16:17], s[0:1], 0x28
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mul_lo_u32 v4, s3, v3
	v_mov_b32_e32 v9, 0
	s_mov_b32 s18, 0x9ee75616
	s_mov_b32 s19, 0x3cd203af
	s_mov_b32 s28, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s15, s21, s20
	s_cmp_gt_i32 s12, 0
	v_cvt_f32_i32_e32 v10, s13
	s_cselect_b32 s24, -1, 0
	s_cmp_gt_i32 s13, 0
	s_mov_b32 s21, 0
	s_cselect_b32 s25, -1, 0
	s_cmp_gt_i32 s3, 0
	s_mul_i32 s27, s15, s3
	s_cselect_b32 s26, -1, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;       Child Loop BB0_9 Depth 3
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, 0
	s_and_not1_b32 vcc_lo, exec_lo, s24
	s_cbranch_vccnz .LBB0_13
; %bb.3:                                ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mul_lo_u32 v6, v3, s3
	v_ashrrev_i32_e32 v5, 31, v4
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v0, 0
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 2, v[4:5]
	v_mov_b32_e32 v1, v11
	v_ashrrev_i32_e32 v7, 31, v6
	v_mov_b32_e32 v2, v11
	s_mov_b32 s29, s20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s8, v12
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v8, vcc_lo
.LBB0_4:                                ; %.preheader.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;       Child Loop BB0_9 Depth 3
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v17, 0
	v_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v18, 0
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v16, 0
	v_dual_mov_b32 v19, 0 :: v_dual_mov_b32 v14, 0
	s_and_not1_b32 vcc_lo, exec_lo, s25
	s_cbranch_vccnz .LBB0_7
; %bb.5:                                ; %.lr.ph.i
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_lshl_b64 s[0:1], s[20:21], 2
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v17, 0
	v_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v18, 0
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v16, 0
	v_dual_mov_b32 v19, 0 :: v_dual_mov_b32 v14, 0
	s_add_u32 s0, s16, s0
	s_addc_u32 s1, s17, s1
	s_mov_b32 s22, s13
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_load_b32 s30, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s31, s30, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[30:31], s[30:31], 2
	v_add_co_u32 v20, vcc_lo, v12, s30
	v_add_co_ci_u32_e32 v21, vcc_lo, s31, v13, vcc_lo
	s_add_u32 s34, s4, s30
	s_addc_u32 s35, s5, s31
	s_add_u32 s30, s6, s30
	s_addc_u32 s31, s7, s31
	global_load_b32 v22, v9, s[34:35]
	global_load_b32 v20, v[20:21], off
	global_load_b32 v21, v9, s[30:31]
	s_add_i32 s22, s22, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s22, 0
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v14, v14, v22 :: v_dual_fmac_f32 v19, v21, v21
	v_dual_fmac_f32 v16, v22, v22 :: v_dual_fmac_f32 v17, v20, v21
	v_fmac_f32_e32 v15, v22, v20
	v_dual_add_f32 v18, v18, v21 :: v_dual_add_f32 v7, v7, v20
	v_fmac_f32_e32 v8, v22, v21
	s_cbranch_scc0 .LBB0_6
.LBB0_7:                                ; %._crit_edge.i
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v22, v14, v8 :: v_dual_mul_f32 v23, v8, v10
	v_mul_f32_e32 v24, v18, v8
	v_dual_mul_f32 v25, v18, v18 :: v_dual_mul_f32 v26, v16, v19
	v_dual_mul_f32 v28, v18, v15 :: v_dual_mul_f32 v33, v17, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v21, v8, v23 :: v_dual_mul_f32 v20, v18, v22
	v_dual_mul_f32 v31, v18, v7 :: v_dual_mul_f32 v34, v7, v8
	v_mul_f32_e32 v35, v18, v17
	v_dual_fmac_f32 v21, v16, v25 :: v_dual_fmac_f32 v20, v14, v24
	v_dual_mul_f32 v24, v7, v24 :: v_dual_mul_f32 v29, v16, v17
	v_mul_f32_e32 v30, v15, v10
	v_mul_f32_e32 v32, v15, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v20, v26, v10
	v_dual_mul_f32 v27, v14, v19 :: v_dual_mul_f32 v22, v7, v22
	v_mul_f32_e32 v19, v19, v15
	v_fmac_f32_e32 v21, v14, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v20, v20, v21
	v_cvt_f64_f32_e32 v[20:21], v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[20:21], s[18:19]
	v_cvt_f32_f64_e32 v20, v[20:21]
	v_mul_f32_e32 v21, v14, v17
	v_mul_f32_e32 v17, v17, v23
	v_dual_mul_f32 v23, v30, v8 :: v_dual_mul_f32 v8, v8, v34
	v_mul_f32_e32 v30, v18, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v24, v18, v21 :: v_dual_fmac_f32 v17, v25, v15
	v_dual_fmac_f32 v23, v16, v31 :: v_dual_fmac_f32 v22, v14, v28
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v8, v16, v35
	v_fmac_f32_e32 v17, v27, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v23, v14, v21 :: v_dual_fmac_f32 v22, v29, v10
	v_fmac_f32_e32 v24, v19, v10
	v_fmac_f32_e32 v8, v14, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v15, v22, v23
	v_div_scale_f32 v16, null, v20, v20, v15
	v_div_scale_f32 v23, s0, v15, v20, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v19, v16
	s_waitcnt_depctr 0xfff
	v_fma_f32 v25, -v16, v19, 1.0
	v_dual_fmac_f32 v30, v14, v33 :: v_dual_fmac_f32 v19, v25, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v30, v26, v7 :: v_dual_sub_f32 v7, v24, v17
	v_dual_mul_f32 v25, v23, v19 :: v_dual_sub_f32 v8, v30, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f32 v14, null, v20, v20, v7
	v_div_scale_f32 v22, vcc_lo, v7, v20, v7
	v_div_scale_f32 v17, null, v20, v20, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v18, v14
	v_div_scale_f32 v27, s1, v8, v20, v8
	v_rcp_f32_e32 v21, v17
	v_fma_f32 v29, -v16, v25, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v25, v29, v19
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v14, v18, 1.0
	v_fma_f32 v26, -v17, v21, 1.0
	v_fma_f32 v16, -v16, v25, v23
	v_dual_fmac_f32 v18, v24, v18 :: v_dual_fmac_f32 v21, v26, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v24, v22, v18
	v_mul_f32_e32 v26, v27, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v28, -v14, v24, v22
	v_fma_f32 v30, -v17, v26, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v24, v28, v18
	v_fmac_f32_e32 v26, v30, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v14, -v14, v24, v22
	v_fma_f32 v17, -v17, v26, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v14, v14, v18, v24
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f32 v16, v16, v19, v25
	s_mov_b32 vcc_lo, s1
	v_div_fixup_f32 v14, v14, v20, v7
	v_div_fmas_f32 v17, v17, v21, v26
	s_and_not1_b32 vcc_lo, exec_lo, s26
	v_div_fixup_f32 v15, v16, v20, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f32 v16, v17, v20, v8
	v_mov_b32_e32 v17, 0
	s_cbranch_vccnz .LBB0_10
; %bb.8:                                ; %.lr.ph155.i.preheader
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_mov_b64 s[0:1], s[6:7]
	s_mov_b64 s[22:23], s[4:5]
	s_mov_b32 s30, s3
.LBB0_9:                                ; %.lr.ph155.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_clause 0x1
	global_load_b32 v18, v9, s[0:1]
	global_load_b32 v19, v9, s[22:23]
	global_load_b32 v20, v[7:8], off
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_add_i32 s30, s30, -1
	s_add_u32 s22, s22, 4
	s_addc_u32 s23, s23, 0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s30, 0
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v18, v15, v18
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v18, v14, v19
	v_add_f32_e32 v18, v16, v18
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v18, v18, v20
	v_sub_f32_e32 v19, 0, v18
	v_cmp_gt_f32_e32 vcc_lo, 0, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v18, v18, v19, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, s14, v18
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	s_cbranch_scc0 .LBB0_9
.LBB0_10:                               ; %Flow114
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ge_i32_e64 v17, v11
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=2
	v_dual_mov_b32 v2, v16 :: v_dual_mov_b32 v1, v15
	v_dual_mov_b32 v0, v14 :: v_dual_mov_b32 v11, v17
; %bb.12:                               ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s29, s29, 1
	s_add_i32 s20, s20, s13
	s_cmp_lg_u32 s29, s12
	s_cbranch_scc1 .LBB0_4
.LBB0_13:                               ; %_Z15RANSAC_FitPlanePfS_S_S_iPiiif.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v5, v3, 1, v3
	v_add_nc_u32_e32 v3, s15, v3
	v_add_nc_u32_e32 v4, s27, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	v_cmp_le_i32_e32 vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_or_b32 s28, vcc_lo, s28
	v_add_co_u32 v5, s0, s10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s11, v6, s0
	global_store_b96 v[5:6], v[0:2], off
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB0_2
.LBB0_14:                               ; %Flow120
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8triMatOpPfS_S_S_iiPiiif
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 36
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8triMatOpPfS_S_S_iiPiiif, .Lfunc_end0-_Z8triMatOpPfS_S_S_iiPiiif
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1320
; NumSgprs: 38
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 38
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8triMatOpPfS_S_S_iiPiiif
    .private_segment_fixed_size: 0
    .sgpr_count:     38
    .sgpr_spill_count: 0
    .symbol:         _Z8triMatOpPfS_S_S_iiPiiif.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     36
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
