#include <stdio.h>

#define MAX_SECRET 8000000
#define KEY_SIZE 8
#define BUFFER 512

__global__
void exor(const int size, const char *secret, char *key)
{
    char temp[KEY_SIZE];

    temp[0] = blockIdx.x/10 + 48;
    temp[1] = blockIdx.x%10 + 48;
    temp[2] = blockIdx.y/10 + 48;
    temp[3] = blockIdx.y%10 + 48;
    temp[4] = blockIdx.z + 48;
    temp[5] = threadIdx.x + 48;
    temp[6] = threadIdx.y + 48;
    temp[7] = threadIdx.z + 48;

    for(int i = 0; i < size; i++)
    {
        switch(secret[i] ^ temp[i % KEY_SIZE])
        {
        case '|':
        case '~':
        case '^':
        case '*':
        case '+':
        case '_':
        case '{':
        case '}':
        case '\\':
        case '#':
            return;
        }
    }

    for(int i = 0; i < KEY_SIZE; i++)
        key[i] = temp[i];
}

int
main()
{
    char secret[MAX_SECRET], key[KEY_SIZE+1];
    char *p = secret;

    while (int n = fread((void *) p, 1, (p - secret + BUFFER < MAX_SECRET) ? BUFFER : secret + MAX_SECRET - p, stdin))
        p += n;

    int size = p - secret;

    char *d_secret, *d_key;
    cudaMalloc((void **) &d_secret, size);
    cudaMalloc((void **) &d_key, KEY_SIZE);

    cudaMemcpy(d_secret, secret, size, cudaMemcpyHostToDevice);

    dim3 blocksPerGrid(100, 100, 10);
    dim3 threadsPerBlock(10, 10, 10);

    exor<<<blocksPerGrid, threadsPerBlock>>>(size, d_secret, d_key);

    cudaMemcpy(key, d_key, KEY_SIZE, cudaMemcpyDeviceToHost);

    cudaFree(d_secret);
    cudaFree(d_key);
    cudaDeviceReset();

    cudaError_t error = cudaGetLastError();
    if(error != cudaSuccess)
    {
	fprintf(stderr, "CUDA error: %s\n", cudaGetErrorString(error));
	return -1;
    }

    for(int i = 0; i < size; i++)
        secret[i] ^= key[i % KEY_SIZE];

    secret[size] = '\0';
    key[KEY_SIZE] = '\0';
    printf("%s\nKey: %s\n", secret, key);

    fprintf(stderr, "Done\n");
    return 0;
}

	.file	"tmpxft_002d3c1d_00000000-6_exor.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z27__device_stub__Z4exoriPKcPciPKcPc
	.type	_Z27__device_stub__Z4exoriPKcPciPKcPc, @function
_Z27__device_stub__Z4exoriPKcPciPKcPc:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z4exoriPKcPc(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z27__device_stub__Z4exoriPKcPciPKcPc, .-_Z27__device_stub__Z4exoriPKcPciPKcPc
	.globl	_Z4exoriPKcPc
	.type	_Z4exoriPKcPc, @function
_Z4exoriPKcPc:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z4exoriPKcPciPKcPc
	.cfi_endproc
.LFE2053:
	.size	_Z4exoriPKcPc, .-_Z4exoriPKcPc
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: %s\n"
.LC1:
	.string	"%s\nKey: %s\n"
.LC2:
	.string	"Done\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-7999488(%rsp), %r11
	.cfi_def_cfa 11, 7999544
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$584, %rsp
	.cfi_def_cfa_offset 8000128
	movl	$8000000, %ebx
	movq	%fs:40, %rax
	movq	%rax, 8000056(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %r13
	movq	%r13, %rbp
.L11:
	movq	%r13, %r15
	movq	stdin(%rip), %r8
	movl	$512, %ecx
	subq	%rbp, %r15
	cmpq	$7999487, %r15
	jle	.L9
	leaq	8000056(%rsp), %rcx
	subq	%r13, %rcx
.L9:
	movl	$1, %edx
	movq	%rbx, %rsi
	movq	%r13, %rdi
	call	__fread_chk@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L10
	movl	$8000000, %edx
	cltq
	cmpq	%rdx, %rbx
	cmovnb	%rbx, %rdx
	leaq	(%rax,%rdx), %rsi
	movq	%rsi, %rcx
	subq	%rbx, %rcx
	cmpq	%rdx, %rcx
	cmovb	%rdx, %rcx
	subq	%rsi, %rbx
	addq	%rax, %r13
	addq	%rcx, %rbx
	jmp	.L11
.L10:
	movl	%r15d, %r14d
	movslq	%r15d, %r15
	movq	%rsp, %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$8, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movq	%r15, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$10, %ecx
	movabsq	$429496729700, %rdi
	movl	$10, %esi
	movabsq	$42949672970, %rdx
	movl	$10, 28(%rsp)
	movq	%rdi, 20(%rsp)
	movq	%rdx, 32(%rsp)
	movl	$10, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	movl	%r14d, %edi
	call	_Z27__device_stub__Z4exoriPKcPciPKcPc
.L12:
	movq	8(%rsp), %rsi
	leaq	47(%rsp), %r13
	movl	$8, %edx
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaDeviceReset@PLT
	call	cudaGetLastError@PLT
	xorl	%edx, %edx
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L13
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rdx
	movl	$2, %esi
	movq	%rax, %rcx
	xorl	%eax, %eax
	orl	$-1, %r12d
	call	__fprintf_chk@PLT
	jmp	.L8
.L13:
	cmpl	%edx, %r14d
	jle	.L22
	movq	%rdx, %rax
	andl	$7, %eax
	movb	47(%rsp,%rax), %al
	xorb	%al, 0(%rbp,%rdx)
	incq	%rdx
	jmp	.L13
.L22:
	movq	%rbp, %rdx
	leaq	.LC1(%rip), %rsi
	movq	%r13, %rcx
	xorl	%eax, %eax
	movl	$2, %edi
	movb	$0, 56(%rsp,%r15)
	movb	$0, 55(%rsp)
	call	__printf_chk@PLT
	movq	stderr(%rip), %rdi
	leaq	.LC2(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
.L8:
	movq	8000056(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$8000072, %rsp
	.cfi_def_cfa_offset 56
	movl	%r12d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z4exoriPKcPc"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4exoriPKcPc(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

#define MAX_SECRET 8000000
#define KEY_SIZE 8
#define BUFFER 512

__global__
void exor(const int size, const char *secret, char *key)
{
    char temp[KEY_SIZE];

    temp[0] = blockIdx.x/10 + 48;
    temp[1] = blockIdx.x%10 + 48;
    temp[2] = blockIdx.y/10 + 48;
    temp[3] = blockIdx.y%10 + 48;
    temp[4] = blockIdx.z + 48;
    temp[5] = threadIdx.x + 48;
    temp[6] = threadIdx.y + 48;
    temp[7] = threadIdx.z + 48;

    for(int i = 0; i < size; i++)
    {
        switch(secret[i] ^ temp[i % KEY_SIZE])
        {
        case '|':
        case '~':
        case '^':
        case '*':
        case '+':
        case '_':
        case '{':
        case '}':
        case '\\':
        case '#':
            return;
        }
    }

    for(int i = 0; i < KEY_SIZE; i++)
        key[i] = temp[i];
}

int
main()
{
    char secret[MAX_SECRET], key[KEY_SIZE+1];
    char *p = secret;

    while (int n = fread((void *) p, 1, (p - secret + BUFFER < MAX_SECRET) ? BUFFER : secret + MAX_SECRET - p, stdin))
        p += n;

    int size = p - secret;

    char *d_secret, *d_key;
    hipMalloc((void **) &d_secret, size);
    hipMalloc((void **) &d_key, KEY_SIZE);

    hipMemcpy(d_secret, secret, size, hipMemcpyHostToDevice);

    dim3 blocksPerGrid(100, 100, 10);
    dim3 threadsPerBlock(10, 10, 10);

    exor<<<blocksPerGrid, threadsPerBlock>>>(size, d_secret, d_key);

    hipMemcpy(key, d_key, KEY_SIZE, hipMemcpyDeviceToHost);

    hipFree(d_secret);
    hipFree(d_key);
    hipDeviceReset();

    hipError_t error = hipGetLastError();
    if(error != hipSuccess)
    {
	fprintf(stderr, "CUDA error: %s\n", hipGetErrorString(error));
	return -1;
    }

    for(int i = 0; i < size; i++)
        secret[i] ^= key[i % KEY_SIZE];

    secret[size] = '\0';
    key[KEY_SIZE] = '\0';
    printf("%s\nKey: %s\n", secret, key);

    fprintf(stderr, "Done\n");
    return 0;
}

	.text
	.file	"exor.hip"
	.globl	_Z19__device_stub__exoriPKcPc   # -- Begin function _Z19__device_stub__exoriPKcPc
	.type	_Z19__device_stub__exoriPKcPc,@function
_Z19__device_stub__exoriPKcPc:          # @_Z19__device_stub__exoriPKcPc
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4exoriPKcPc, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__exoriPKcPc, .Lfunc_end0-_Z19__device_stub__exoriPKcPc
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$8000032, %rsp                  # imm = 0x7A1220
	.cfi_def_cfa_offset 8000080
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rsp), %r15
	leaq	8000032(%rsp), %r12
	movl	$512, %r13d                     # imm = 0x200
	movq	%r15, %r14
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rbx
	subq	%r15, %rbx
	movq	%r12, %rdx
	subq	%r14, %rdx
	cmpq	$7999488, %rbx                  # imm = 0x7A1000
	cmovlq	%r13, %rdx
	movq	stdin(%rip), %rcx
	movl	$1, %esi
	movq	%r14, %rdi
	callq	fread
	cltq
	addq	%rax, %r14
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.2:
	movslq	%ebx, %r14
	leaq	8(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$8, %esi
	callq	hipMalloc
	movq	(%r15), %rdi
	leaq	32(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$429496729700, %rdi             # imm = 0x6400000064
	movabsq	$42949672970, %rdx              # imm = 0xA0000000A
	movl	$10, %esi
	movl	$10, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	%ebx, %edi
	callq	_Z19__device_stub__exoriPKcPc
.LBB1_4:
	movq	(%rsp), %rsi
	leaq	23(%rsp), %rdi
	movl	$8, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	callq	hipDeviceReset
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.5:                                # %.preheader
	testl	%ebx, %ebx
	jle	.LBB1_8
# %bb.6:                                # %.lr.ph.preheader
	movl	%ebx, %eax
	xorl	%ecx, %ecx
.LBB1_7:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%ecx, %edx
	andl	$7, %edx
	movb	23(%rsp,%rdx), %dl
	xorb	%dl, 32(%rsp,%rcx)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_7
.LBB1_8:                                # %._crit_edge
	xorl	%ebx, %ebx
	movb	%bl, 32(%rsp,%r14)
	leaq	23(%rsp), %rdx
	movb	%bl, 8(%rdx)
	leaq	32(%rsp), %rsi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movq	stderr(%rip), %rcx
	movl	$.L.str.2, %edi
	movl	$5, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB1_10
.LBB1_9:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %ebx
.LBB1_10:
	movl	%ebx, %eax
	addq	$8000032, %rsp                  # imm = 0x7A1220
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4exoriPKcPc, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4exoriPKcPc,@object           # @_Z4exoriPKcPc
	.section	.rodata,"a",@progbits
	.globl	_Z4exoriPKcPc
	.p2align	3, 0x0
_Z4exoriPKcPc:
	.quad	_Z19__device_stub__exoriPKcPc
	.size	_Z4exoriPKcPc, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: %s\n"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%s\nKey: %s\n"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Done\n"
	.size	.L.str.2, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4exoriPKcPc"
	.size	.L__unnamed_1, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__exoriPKcPc
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4exoriPKcPc
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4exoriPKcPc           ; -- Begin function _Z4exoriPKcPc
	.globl	_Z4exoriPKcPc
	.p2align	8
	.type	_Z4exoriPKcPc,@function
_Z4exoriPKcPc:                          ; @_Z4exoriPKcPc
; %bb.0:
	s_mul_hi_u32 s4, s13, 0xcccccccd
	s_mul_hi_u32 s5, s14, 0xcccccccd
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x0
	s_load_b128 s[0:3], s[0:1], 0x8
	s_lshr_b32 s4, s4, 3
	s_lshr_b32 s5, s5, 3
	v_bfe_u32 v2, v0, 10, 10
	s_mul_i32 s7, s4, 10
	s_mul_i32 s8, s5, 10
	s_sub_i32 s7, s13, s7
	s_sub_i32 s8, s14, s8
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 20, 10
	v_add_nc_u16 v3, v2, 48
	v_and_b32_e64 v2, 0xff, s4
	v_or_b32_e64 v4, s7, 48
	v_and_b32_e64 v5, 0xff, s5
	v_or_b32_e64 v6, s8, 48
	v_and_b32_e64 v7, 0xff, s15
	v_add_nc_u16 v1, v1, 48
	v_add_nc_u16 v0, v0, 48
	v_add_nc_u16 v2, v2, 48
	v_and_b32_e32 v8, 0xff, v4
	v_add_nc_u16 v5, v5, 48
	v_and_b32_e32 v6, 0xff, v6
	v_add_nc_u16 v7, v7, 48
	v_and_b32_e32 v4, 0xff, v2
	v_lshlrev_b16 v8, 8, v8
	v_and_b32_e32 v5, 0xff, v5
	v_lshlrev_b16 v9, 8, v6
	v_and_b32_e32 v2, 0xff, v7
	v_lshlrev_b16 v6, 8, v1
	v_and_b32_e32 v3, 0xff, v3
	v_lshlrev_b16 v7, 8, v0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_22
; %bb.1:                                ; %.lr.ph.preheader
	v_or_b32_e32 v0, v4, v8
	v_or_b32_e32 v1, v5, v9
	v_or_b32_e32 v10, v2, v6
	v_or_b32_e32 v11, v3, v7
	s_mov_b64 s[4:5], 0
	v_and_b32_e32 v0, 0xffff, v0
	v_lshlrev_b32_e32 v1, 16, v1
	v_and_b32_e32 v12, 0xffff, v10
	v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v11, 16, v11
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v0, v0, v1
                                        ; implicit-def: $sgpr7
	v_or_b32_e32 v1, v12, v11
.LBB0_2:                                ; %NodeBlock50
                                        ; =>This Inner Loop Header: Depth=1
	s_add_u32 s10, s0, s4
	s_addc_u32 s11, s1, s5
	s_and_b32 s9, s4, 7
	global_load_u8 v13, v10, s[10:11]
	s_lshl_b32 s9, s9, 3
	s_mov_b32 s11, 0
	v_lshrrev_b64 v[11:12], s9, v[0:1]
	s_mov_b32 s10, exec_lo
                                        ; implicit-def: $sgpr9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v11, 0xff, v11
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i16_e32 0x5b, v11
	s_xor_b32 s10, exec_lo, s10
	s_cbranch_execz .LBB0_12
; %bb.3:                                ; %NodeBlock48
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s12, 0
	s_mov_b32 s9, exec_lo
                                        ; implicit-def: $sgpr11
	v_cmpx_lt_i16_e32 0x5d, v11
	s_xor_b32 s9, exec_lo, s9
	s_cbranch_execz .LBB0_9
; %bb.4:                                ; %NodeBlock46
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s13, exec_lo
                                        ; implicit-def: $sgpr11
	v_cmpx_lt_i16_e32 0x7a, v11
	s_xor_b32 s13, exec_lo, s13
; %bb.5:                                ; %LeafBlock44
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_lt_i16_e32 vcc_lo, 0x7e, v11
	s_mov_b32 s11, -1
                                        ; implicit-def: $vgpr11
	s_and_b32 s12, vcc_lo, exec_lo
; %bb.6:                                ; %Flow54
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s13, s13
; %bb.7:                                ; %LeafBlock42
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_lt_i16_e32 vcc_lo, 0x5f, v11
	s_and_not1_b32 s12, s12, exec_lo
	s_or_b32 s11, s11, exec_lo
	s_and_b32 s14, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s14
; %bb.8:                                ; %Flow55
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s11, s11, exec_lo
	s_and_b32 s12, s12, exec_lo
                                        ; implicit-def: $vgpr11
.LBB0_9:                                ; %Flow53
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s9, s9
; %bb.10:                               ; %LeafBlock40
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_ne_u16_e32 vcc_lo, 0x5c, v11
	s_and_not1_b32 s12, s12, exec_lo
	s_or_b32 s11, s11, exec_lo
	s_and_b32 s13, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s13
; %bb.11:                               ; %Flow56
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s9, s11, exec_lo
	s_and_b32 s11, s12, exec_lo
                                        ; implicit-def: $vgpr11
.LBB0_12:                               ; %Flow52
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s10, s10
	s_cbranch_execz .LBB0_18
; %bb.13:                               ; %NodeBlock
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s12, s11
	s_mov_b32 s14, exec_lo
                                        ; implicit-def: $sgpr13
	v_cmpx_lt_i16_e32 41, v11
	s_xor_b32 s14, exec_lo, s14
; %bb.14:                               ; %LeafBlock38
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_lt_i16_e32 vcc_lo, 43, v11
	s_and_not1_b32 s12, s11, exec_lo
	s_mov_b32 s13, -1
                                        ; implicit-def: $vgpr11
	s_and_b32 s15, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s15
; %bb.15:                               ; %Flow58
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s14, s14
; %bb.16:                               ; %LeafBlock
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_ne_u16_e32 vcc_lo, 35, v11
	s_and_not1_b32 s12, s12, exec_lo
	s_or_b32 s13, s13, exec_lo
	s_and_b32 s15, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s15
; %bb.17:                               ; %Flow59
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s9, s9, exec_lo
	s_and_b32 s13, s13, exec_lo
	s_and_not1_b32 s11, s11, exec_lo
	s_and_b32 s12, s12, exec_lo
	s_or_b32 s9, s9, s13
	s_or_b32 s11, s11, s12
.LBB0_18:                               ; %Flow57
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_mov_b32 s12, -1
	s_and_saveexec_b32 s10, s11
; %bb.19:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s6, s4
	s_cselect_b32 s11, -1, 0
	s_and_not1_b32 s9, s9, exec_lo
	s_or_not1_b32 s12, s11, exec_lo
; %bb.20:                               ; %Flow60
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_xor_b32 s9, s9, -1
	s_and_b32 s10, exec_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s8, s10, s8
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s9, s9, exec_lo
	s_or_b32 s7, s7, s9
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_2
; %bb.21:                               ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s8
	s_branch .LBB0_23
.LBB0_22:
	s_mov_b32 s7, -1
.LBB0_23:                               ; %Flow61
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB0_26
; %bb.24:                               ; %.critedge.preheader
	v_or_b32_e32 v0, v4, v8
	v_or_b32_e32 v1, v5, v9
	v_or_b32_e32 v2, v2, v6
	v_or_b32_e32 v3, v3, v7
	s_mov_b64 s[0:1], 0
	v_and_b32_e32 v0, 0xffff, v0
	v_lshlrev_b32_e32 v1, 16, v1
	v_and_b32_e32 v2, 0xffff, v2
	v_lshlrev_b32_e32 v3, 16, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v0, v0, v1
	v_or_b32_e32 v1, v2, v3
	v_mov_b32_e32 v2, 0
.LBB0_25:                               ; %.critedge
                                        ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s5, s0, 3
	s_add_u32 s4, s2, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b64 v[3:4], s5, v[0:1]
	s_addc_u32 s5, s3, s1
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	global_store_b8 v2, v3, s[4:5]
	s_cbranch_scc1 .LBB0_25
.LBB0_26:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4exoriPKcPc
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4exoriPKcPc, .Lfunc_end0-_Z4exoriPKcPc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 900
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4exoriPKcPc
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4exoriPKcPc.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
