#include <stdio.h>
#include <math.h>

#include <cuda.h>
#include <cuda_runtime.h>

#include <time.h>

__global__ void calculations_inv(float *d_array, float *ans,int *n, long *iter)
{
	int id = blockIdx.x * blockDim.x + threadIdx.x;

	float *d_ptr_array = d_array;

	int i;
	//obliczanie sumy
	//ustawienie wskaznika na odpowiedni wiersz tablicy 

	if(id < *iter)
	{

		float add = 0.0;
		float mult = 1.0;

		d_ptr_array = d_ptr_array + id; // przejscie do wiersza "id"
		for(i = 0 ; i < *n; i++)
		{
			add += *d_ptr_array * *d_ptr_array;
			d_ptr_array++;
		}

		//ustawienie wskaznika ponownie na poczatek tablicy 
		d_ptr_array = d_array + id;
		
		mult = cos(*d_ptr_array);
		d_ptr_array++;

		for(i = 1 ; i < *n; i++)
		{
			mult = mult * cos(*d_ptr_array/(i+1));
			d_ptr_array++;
		}

		ans[id] = 1 / 40 * add + 1 - mult;
	}
}

int main(int argc, char const *argv[])
{
	if(argc == 5)
	{

		clock_t start, end;
		double used_time;

		start = clock();

		int i; 									 // iterator
		int j;								     // iterator

		//zmienne z lini argumentów wywołania programu
		const int n 					= atoi(argv[1]); // wymiar zadania
		const int I 					= atoi(argv[2]); // liczba iteracji - > obliczenia przeprowadzane sa na wartosci I^n
		const double iter 				= pow(I, n);
		const int Blocks 				= atoi(argv[3]); // liczba bloków GPU
		const int Threads 				= atoi(argv[4]); // liczba watków dla jednego bloku GPU

		//const float x_min 				= -20.0; // minimalna warotsc dziedziny zadania
		const float x_max 				= 20.0; // maksymalna wartosc dziedziny zadania
		const float rand_max 			= RAND_MAX / 40.0; //ograniczenie przedzialu losowania zmiennych

		float *h_random_array = (float* ) malloc(sizeof(float) * n * iter); //do operacji na danych stosowana jest tablica jednowymiarowa ze wzgledu na alokacje pamieci w GPU
		float *h_ptr_iterator = h_random_array;

		float *ans = (float* ) malloc(sizeof(float) * iter);

		//losowanie wartosci i umieszczenie ich w tablicy
		for(i = 0 ; i < iter; i++)
		{
			for(j = 0 ; j < n ; j++)
			{
				*h_ptr_iterator = rand() / rand_max - x_max;
				h_ptr_iterator += 1;
			}
		}

		float *d_random_array; //tablica zmiennych wylosowanych w pamieci GPU
		float *d_ans;  //tablica wynikow
		int *d_n; // wymiar 
		long *d_iter; //ilosc iteratcji

		cudaMalloc((void **)&d_random_array, sizeof(float) * n * iter);
		cudaMalloc((void **)&d_ans, sizeof(float) * iter);
		cudaMalloc((void **)&d_n, sizeof(int));
		cudaMalloc((void **)&d_iter, sizeof(long));

		cudaMemcpy(d_random_array, h_random_array, sizeof(float) * n * iter, cudaMemcpyHostToDevice);
		cudaMemcpy(d_ans, ans, sizeof(float) * iter, cudaMemcpyHostToDevice);
		cudaMemcpy(d_n, &n, sizeof(int), cudaMemcpyHostToDevice);
		cudaMemcpy(d_iter, &iter, sizeof(long) , cudaMemcpyHostToDevice);

		printf("Liczba blocków : n [%d] Liczba iteracji [%f] , bloki [%d] watki : [%d]", n , iter, Blocks , Threads);

		calculations_inv<<<Blocks, Threads>>>(d_random_array, d_ans, d_n, d_iter);

		cudaMemcpy(ans, d_ans, sizeof(float) * iter , cudaMemcpyDeviceToHost);

		//szukanie minimum

		float y_min  = ans[0];
		for(i = 0 ; i < iter; i++)
		{
			if(ans[i] < y_min) y_min = ans[i];
		}

		end = clock();
		used_time = ((double) (end - start) / CLOCKS_PER_SEC);

		printf("szukane minimum : %f - czas : %f  \n " , y_min, used_time);

		cudaFree(d_random_array);
		cudaFree(d_ans);
		cudaFree(d_n);
		cudaFree(d_iter);

		free(h_random_array);
		free(ans);
	}
	else
	{
		printf("Invalid program parameters plese type /main2 N I Blocks Threads where \n");
		printf("N - is problem dimension\n");
		printf("I - is number of iteratios\n");
		printf("Blocks - is number of used GPU blocks...max is %d\n", 0);
		printf("Threads- is number of used GPU threads per one block  ... max is %d \n", 0);

		return 0;
	}	

	return 0;
}
	.file	"tmpxft_0033509e_00000000-6_main3.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z42__device_stub__Z16calculations_invPfS_PiPlPfS_PiPl
	.type	_Z42__device_stub__Z16calculations_invPfS_PiPlPfS_PiPl, @function
_Z42__device_stub__Z16calculations_invPfS_PiPlPfS_PiPl:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16calculations_invPfS_PiPl(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z42__device_stub__Z16calculations_invPfS_PiPlPfS_PiPl, .-_Z42__device_stub__Z16calculations_invPfS_PiPlPfS_PiPl
	.globl	_Z16calculations_invPfS_PiPl
	.type	_Z16calculations_invPfS_PiPl, @function
_Z16calculations_invPfS_PiPl:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z16calculations_invPfS_PiPlPfS_PiPl
	.cfi_endproc
.LFE2053:
	.size	_Z16calculations_invPfS_PiPl, .-_Z16calculations_invPfS_PiPl
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"Liczba block\303\263w : n [%d] Liczba iteracji [%f] , bloki [%d] watki : [%d]"
.LC6:
	.string	"szukane minimum : %f - czas : %f  \n "
.LC7:
	.string	"Invalid program parameters plese type /main2 N I Blocks Threads where \n"
.LC8:
	.string	"N - is problem dimension\n"
.LC9:
	.string	"I - is number of iteratios\n"
.LC10:
	.string	"Blocks - is number of used GPU blocks...max is %d\n"
.LC11:
	.string	"Threads- is number of used GPU threads per one block  ... max is %d \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	cmpl	$5, %edi
	jne	.L9
	movq	%rsi, %r12
	call	clock@PLT
	movq	8(%r12), %rdi
	movq	%rax, %r13
	call	atoi@PLT
	movq	16(%r12), %rdi
	movslq	%eax, %rbx
	movl	%ebx, 20(%rsp)
	call	atoi@PLT
	cvtsi2sdl	%ebx, %xmm1
	cvtsi2sdl	%eax, %xmm0
	call	pow@PLT
	movq	24(%r12), %rdi
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm0, 24(%rsp)
	call	atoi@PLT
	movq	32(%r12), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	salq	$2, %rbx
	movl	%eax, %r12d
	js	.L10
	cvtsi2sdq	%rbx, %xmm0
	jmp	.L11
.L10:
	shrq	%rbx
	cvtsi2sdq	%rbx, %xmm0
	addsd	%xmm0, %xmm0
.L11:
	mulsd	8(%rsp), %xmm0
	comisd	.LC0(%rip), %xmm0
	jnb	.L12
	cvttsd2siq	%xmm0, %rdi
	jmp	.L13
.L12:
	subsd	.LC0(%rip), %xmm0
	cvttsd2siq	%xmm0, %rdi
	btcq	$63, %rdi
.L13:
	call	malloc@PLT
	movsd	.LC1(%rip), %xmm0
	mulsd	8(%rsp), %xmm0
	comisd	.LC0(%rip), %xmm0
	movq	%rax, (%rsp)
	jnb	.L14
	cvttsd2siq	%xmm0, %rdi
	jmp	.L15
.L14:
	subsd	.LC0(%rip), %xmm0
	cvttsd2siq	%xmm0, %rdi
	btcq	$63, %rdi
.L15:
	call	malloc@PLT
	movq	(%rsp), %r14
	xorl	%r15d, %r15d
	movq	%rax, %rbx
.L16:
	cvtsi2sdl	%r15d, %xmm0
	movsd	24(%rsp), %xmm1
	comisd	%xmm0, %xmm1
	jbe	.L41
	xorl	%ecx, %ecx
.L18:
	cmpl	%ecx, 20(%rsp)
	jle	.L42
	movl	%ecx, 8(%rsp)
	addq	$4, %r14
	call	rand@PLT
	movl	8(%rsp), %ecx
	cvtsi2ssl	%eax, %xmm0
	divss	.LC2(%rip), %xmm0
	subss	.LC3(%rip), %xmm0
	incl	%ecx
	movss	%xmm0, -4(%r14)
	jmp	.L18
.L42:
	incl	%r15d
	jmp	.L16
.L41:
	movslq	20(%rsp), %rax
	salq	$2, %rax
	js	.L19
	cvtsi2sdq	%rax, %xmm0
	jmp	.L20
.L19:
	shrq	%rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L20:
	mulsd	%xmm1, %xmm0
	comisd	.LC0(%rip), %xmm0
	jnb	.L21
	cvttsd2siq	%xmm0, %rsi
	jmp	.L22
.L21:
	subsd	.LC0(%rip), %xmm0
	cvttsd2siq	%xmm0, %rsi
	btcq	$63, %rsi
.L22:
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movsd	.LC1(%rip), %xmm0
	mulsd	24(%rsp), %xmm0
	comisd	.LC0(%rip), %xmm0
	jnb	.L23
	cvttsd2siq	%xmm0, %rsi
	jmp	.L24
.L23:
	subsd	.LC0(%rip), %xmm0
	cvttsd2siq	%xmm0, %rsi
	btcq	$63, %rsi
.L24:
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$8, %esi
	call	cudaMalloc@PLT
	movslq	20(%rsp), %rax
	salq	$2, %rax
	js	.L25
	cvtsi2sdq	%rax, %xmm0
	jmp	.L26
.L25:
	shrq	%rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L26:
	mulsd	24(%rsp), %xmm0
	comisd	.LC0(%rip), %xmm0
	jnb	.L27
	cvttsd2siq	%xmm0, %rdx
	jmp	.L28
.L27:
	subsd	.LC0(%rip), %xmm0
	cvttsd2siq	%xmm0, %rdx
	btcq	$63, %rdx
.L28:
	movq	(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movsd	.LC1(%rip), %xmm0
	mulsd	24(%rsp), %xmm0
	comisd	.LC0(%rip), %xmm0
	jnb	.L29
	cvttsd2siq	%xmm0, %rdx
	jmp	.L30
.L29:
	subsd	.LC0(%rip), %xmm0
	cvttsd2siq	%xmm0, %rdx
	btcq	$63, %rdx
.L30:
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	leaq	20(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	leaq	24(%rsp), %rsi
	movl	$1, %ecx
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movl	20(%rsp), %edx
	movl	%r12d, %r8d
	movl	%ebp, %ecx
	movsd	24(%rsp), %xmm0
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movl	%r12d, 76(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebp, 64(%rsp)
	movq	%rax, 80(%rsp)
	movl	84(%rsp), %ecx
	movq	%rax, 68(%rsp)
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z42__device_stub__Z16calculations_invPfS_PiPlPfS_PiPl
.L31:
	movsd	.LC1(%rip), %xmm0
	mulsd	24(%rsp), %xmm0
	comisd	.LC0(%rip), %xmm0
	jnb	.L32
	cvttsd2siq	%xmm0, %rdx
	jmp	.L33
.L32:
	subsd	.LC0(%rip), %xmm0
	cvttsd2siq	%xmm0, %rdx
	btcq	$63, %rdx
.L33:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movss	(%rbx), %xmm0
	movsd	24(%rsp), %xmm2
	xorl	%eax, %eax
.L34:
	cvtsi2sdl	%eax, %xmm1
	comisd	%xmm1, %xmm2
	jbe	.L43
	movss	(%rbx,%rax,4), %xmm1
	incq	%rax
	minss	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	jmp	.L34
.L43:
	movss	%xmm0, 8(%rsp)
	call	clock@PLT
	movss	8(%rsp), %xmm0
	movl	$2, %edi
	leaq	.LC6(%rip), %rsi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm1
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	divsd	.LC5(%rip), %xmm1
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	jmp	.L37
.L9:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edx, %edx
	leaq	.LC10(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%edx, %edx
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L37:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z16calculations_invPfS_PiPl"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16calculations_invPfS_PiPl(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1138753536
	.align 8
.LC1:
	.long	0
	.long	1074790400
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1280101581
	.align 4
.LC3:
	.long	1101004800
	.section	.rodata.cst8
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <math.h>

#include <hip/hip_runtime.h>


#include <time.h>

__global__ void calculations_inv(float *d_array, float *ans,int *n, long *iter)
{
	int id = blockIdx.x * blockDim.x + threadIdx.x;

	float *d_ptr_array = d_array;

	int i;
	//obliczanie sumy
	//ustawienie wskaznika na odpowiedni wiersz tablicy 

	if(id < *iter)
	{

		float add = 0.0;
		float mult = 1.0;

		d_ptr_array = d_ptr_array + id; // przejscie do wiersza "id"
		for(i = 0 ; i < *n; i++)
		{
			add += *d_ptr_array * *d_ptr_array;
			d_ptr_array++;
		}

		//ustawienie wskaznika ponownie na poczatek tablicy 
		d_ptr_array = d_array + id;
		
		mult = cos(*d_ptr_array);
		d_ptr_array++;

		for(i = 1 ; i < *n; i++)
		{
			mult = mult * cos(*d_ptr_array/(i+1));
			d_ptr_array++;
		}

		ans[id] = 1 / 40 * add + 1 - mult;
	}
}

int main(int argc, char const *argv[])
{
	if(argc == 5)
	{

		clock_t start, end;
		double used_time;

		start = clock();

		int i; 									 // iterator
		int j;								     // iterator

		//zmienne z lini argumentów wywołania programu
		const int n 					= atoi(argv[1]); // wymiar zadania
		const int I 					= atoi(argv[2]); // liczba iteracji - > obliczenia przeprowadzane sa na wartosci I^n
		const double iter 				= pow(I, n);
		const int Blocks 				= atoi(argv[3]); // liczba bloków GPU
		const int Threads 				= atoi(argv[4]); // liczba watków dla jednego bloku GPU

		//const float x_min 				= -20.0; // minimalna warotsc dziedziny zadania
		const float x_max 				= 20.0; // maksymalna wartosc dziedziny zadania
		const float rand_max 			= RAND_MAX / 40.0; //ograniczenie przedzialu losowania zmiennych

		float *h_random_array = (float* ) malloc(sizeof(float) * n * iter); //do operacji na danych stosowana jest tablica jednowymiarowa ze wzgledu na alokacje pamieci w GPU
		float *h_ptr_iterator = h_random_array;

		float *ans = (float* ) malloc(sizeof(float) * iter);

		//losowanie wartosci i umieszczenie ich w tablicy
		for(i = 0 ; i < iter; i++)
		{
			for(j = 0 ; j < n ; j++)
			{
				*h_ptr_iterator = rand() / rand_max - x_max;
				h_ptr_iterator += 1;
			}
		}

		float *d_random_array; //tablica zmiennych wylosowanych w pamieci GPU
		float *d_ans;  //tablica wynikow
		int *d_n; // wymiar 
		long *d_iter; //ilosc iteratcji

		hipMalloc((void **)&d_random_array, sizeof(float) * n * iter);
		hipMalloc((void **)&d_ans, sizeof(float) * iter);
		hipMalloc((void **)&d_n, sizeof(int));
		hipMalloc((void **)&d_iter, sizeof(long));

		hipMemcpy(d_random_array, h_random_array, sizeof(float) * n * iter, hipMemcpyHostToDevice);
		hipMemcpy(d_ans, ans, sizeof(float) * iter, hipMemcpyHostToDevice);
		hipMemcpy(d_n, &n, sizeof(int), hipMemcpyHostToDevice);
		hipMemcpy(d_iter, &iter, sizeof(long) , hipMemcpyHostToDevice);

		printf("Liczba blocków : n [%d] Liczba iteracji [%f] , bloki [%d] watki : [%d]", n , iter, Blocks , Threads);

		calculations_inv<<<Blocks, Threads>>>(d_random_array, d_ans, d_n, d_iter);

		hipMemcpy(ans, d_ans, sizeof(float) * iter , hipMemcpyDeviceToHost);

		//szukanie minimum

		float y_min  = ans[0];
		for(i = 0 ; i < iter; i++)
		{
			if(ans[i] < y_min) y_min = ans[i];
		}

		end = clock();
		used_time = ((double) (end - start) / CLOCKS_PER_SEC);

		printf("szukane minimum : %f - czas : %f  \n " , y_min, used_time);

		hipFree(d_random_array);
		hipFree(d_ans);
		hipFree(d_n);
		hipFree(d_iter);

		free(h_random_array);
		free(ans);
	}
	else
	{
		printf("Invalid program parameters plese type /main2 N I Blocks Threads where \n");
		printf("N - is problem dimension\n");
		printf("I - is number of iteratios\n");
		printf("Blocks - is number of used GPU blocks...max is %d\n", 0);
		printf("Threads- is number of used GPU threads per one block  ... max is %d \n", 0);

		return 0;
	}	

	return 0;
}
	.text
	.file	"main3.hip"
	.globl	_Z31__device_stub__calculations_invPfS_PiPl # -- Begin function _Z31__device_stub__calculations_invPfS_PiPl
	.type	_Z31__device_stub__calculations_invPfS_PiPl,@function
_Z31__device_stub__calculations_invPfS_PiPl: # @_Z31__device_stub__calculations_invPfS_PiPl
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16calculations_invPfS_PiPl, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__calculations_invPfS_PiPl, .Lfunc_end0-_Z31__device_stub__calculations_invPfS_PiPl
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI1_1:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_2:
	.quad	0x43e0000000000000              # double 9.2233720368547758E+18
.LCPI1_3:
	.quad	0x4010000000000000              # double 4
.LCPI1_6:
	.quad	0x412e848000000000              # double 1.0E+6
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI1_4:
	.long	0x4c4ccccd                      # float 53687092
.LCPI1_5:
	.long	0xc1a00000                      # float -20
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$5, %edi
	jne	.LBB1_14
# %bb.1:
	movq	%rsi, %rbx
	callq	clock
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r14d
	movl	%eax, 44(%rsp)
	movq	16(%rbx), %rdi
	callq	atoi
	cvtsi2sd	%eax, %xmm0
	cvtsi2sd	%r14d, %xmm1
	callq	pow
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movsd	%xmm0, 24(%rsp)
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, 40(%rsp)                  # 4-byte Spill
	movq	32(%rbx), %rdi
	callq	atoi
	movl	%eax, 36(%rsp)                  # 4-byte Spill
	movslq	%r14d, %rax
	shlq	$2, %rax
	movq	%rax, %xmm0
	punpckldq	.LCPI1_0(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI1_1(%rip), %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	mulsd	(%rsp), %xmm1                   # 8-byte Folded Reload
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI1_2(%rip), %xmm1
	cvttsd2si	%xmm1, %rdi
	andq	%rcx, %rdi
	orq	%rax, %rdi
	movq	%rdi, 80(%rsp)                  # 8-byte Spill
	callq	malloc
	movsd	.LCPI1_3(%rip), %xmm0           # xmm0 = mem[0],zero
	mulsd	(%rsp), %xmm0                   # 8-byte Folded Reload
	cvttsd2si	%xmm0, %rcx
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%rcx, %rax
	sarq	$63, %rax
	subsd	.LCPI1_2(%rip), %xmm0
	cvttsd2si	%xmm0, %rbx
	andq	%rax, %rbx
	orq	%rcx, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	xorpd	%xmm0, %xmm0
	movsd	(%rsp), %xmm1                   # 8-byte Reload
                                        # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	jbe	.LBB1_7
# %bb.2:                                # %.preheader.lr.ph
	xorl	%ebp, %ebp
	movq	56(%rsp), %r12                  # 8-byte Reload
.LBB1_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
	testl	%r14d, %r14d
	jle	.LBB1_6
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	movl	%r14d, %r13d
.LBB1_5:                                # %.lr.ph
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI1_5(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movss	.LCPI1_4(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	%xmm1, %xmm0
	addss	%xmm2, %xmm0
	movss	%xmm0, (%r12)
	addq	$4, %r12
	decl	%r13d
	jne	.LBB1_5
.LBB1_6:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=1
	incl	%ebp
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	movsd	(%rsp), %xmm1                   # 8-byte Reload
                                        # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	ja	.LBB1_3
.LBB1_7:                                # %._crit_edge52
	leaq	72(%rsp), %r12
	movq	%r12, %rdi
	movq	80(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rbp
	movl	$4, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	56(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	leaq	44(%rsp), %rbx
	movl	$4, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	leaq	24(%rsp), %r14
	movl	$8, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%rbx), %esi
	movsd	(%r14), %xmm0                   # xmm0 = mem[0],zero
	movl	$.L.str, %edi
	movl	40(%rsp), %ebx                  # 4-byte Reload
	movl	%ebx, %edx
	movl	36(%rsp), %ebp                  # 4-byte Reload
	movl	%ebp, %ecx
	movb	$1, %al
	callq	printf
	movl	%ebx, %edi
	btsq	$32, %rdi
	movl	%ebp, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:
	movq	72(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z31__device_stub__calculations_invPfS_PiPl
.LBB1_9:
	movq	16(%rsp), %rsi
	movsd	24(%rsp), %xmm0                 # xmm0 = mem[0],zero
	mulsd	.LCPI1_3(%rip), %xmm0
	cvttsd2si	%xmm0, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI1_2(%rip), %xmm0
	cvttsd2si	%xmm0, %rdx
	andq	%rcx, %rdx
	orq	%rax, %rdx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%r15), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movsd	24(%rsp), %xmm0                 # xmm0 = mem[0],zero
	xorps	%xmm2, %xmm2
	ucomisd	%xmm2, %xmm0
	jbe	.LBB1_10
# %bb.11:                               # %.lr.ph57.preheader
	xorl	%eax, %eax
	movq	48(%rsp), %rbx                  # 8-byte Reload
.LBB1_12:                               # %.lr.ph57
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r15,%rax,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	incq	%rax
	xorps	%xmm2, %xmm2
	cvtsi2sd	%eax, %xmm2
	minss	%xmm1, %xmm3
	ucomisd	%xmm2, %xmm0
	movaps	%xmm3, %xmm1
	ja	.LBB1_12
	jmp	.LBB1_13
.LBB1_14:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.L.str.5, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_15
.LBB1_10:
	movaps	%xmm1, %xmm3
	movq	48(%rsp), %rbx                  # 8-byte Reload
.LBB1_13:                               # %._crit_edge58
	movss	%xmm3, (%rsp)                   # 4-byte Spill
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	divsd	.LCPI1_6(%rip), %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movl	$.L.str.1, %edi
	movb	$2, %al
	callq	printf
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r12, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
.LBB1_15:
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16calculations_invPfS_PiPl, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16calculations_invPfS_PiPl,@object # @_Z16calculations_invPfS_PiPl
	.section	.rodata,"a",@progbits
	.globl	_Z16calculations_invPfS_PiPl
	.p2align	3, 0x0
_Z16calculations_invPfS_PiPl:
	.quad	_Z31__device_stub__calculations_invPfS_PiPl
	.size	_Z16calculations_invPfS_PiPl, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Liczba block\303\263w : n [%d] Liczba iteracji [%f] , bloki [%d] watki : [%d]"
	.size	.L.str, 72

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"szukane minimum : %f - czas : %f  \n "
	.size	.L.str.1, 37

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Blocks - is number of used GPU blocks...max is %d\n"
	.size	.L.str.5, 51

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Threads- is number of used GPU threads per one block  ... max is %d \n"
	.size	.L.str.6, 70

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16calculations_invPfS_PiPl"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Invalid program parameters plese type /main2 N I Blocks Threads where "
	.size	.Lstr, 71

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"N - is problem dimension"
	.size	.Lstr.1, 25

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"I - is number of iteratios"
	.size	.Lstr.2, 27

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__calculations_invPfS_PiPl
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16calculations_invPfS_PiPl
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16calculations_invPfS_PiPl ; -- Begin function _Z16calculations_invPfS_PiPl
	.globl	_Z16calculations_invPfS_PiPl
	.p2align	8
	.type	_Z16calculations_invPfS_PiPl,@function
_Z16calculations_invPfS_PiPl:           ; @_Z16calculations_invPfS_PiPl
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[0:1], s[10:11], 0x0
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i64_e32 vcc_lo, s[0:1], v[1:2]
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_18
; %bb.1:
	s_load_b32 s2, s[8:9], 0x0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_5
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v5, v3
	v_mov_b32_e32 v4, v2
	s_mov_b32 s0, s2
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s0, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v7, v7
	s_cbranch_scc1 .LBB0_3
; %bb.4:                                ; %._crit_edge.loopexit
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v6, v6, 0, 1.0
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v6, 1.0
.LBB0_6:                                ; %._crit_edge
	global_load_b32 v2, v[2:3], off
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr3
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ngt_f32_e64 0x48000000, |v2|
	s_xor_b32 s3, exec_lo, s1
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_and_b32_e32 v11, 0x7fffffff, v2
	s_mov_b32 s0, 0x7fffff
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v14, v11, s0, 0x800000
	v_mad_u64_u32 v[3:4], null, 0xfe5163ab, v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, 0x3c439041, v14, v[4:5]
	v_mov_b32_e32 v4, v8
	v_lshrrev_b32_e32 v11, 23, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, 0xdb629599, v14, v[4:5]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[9:10], null, 0xf534ddc0, v14, v[4:5]
	v_add_nc_u32_e32 v12, 0xffffff88, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_lt_u32_e32 vcc_lo, 63, v12
	v_cndmask_b32_e64 v13, 0, 0xffffffc0, vcc_lo
	v_dual_mov_b32 v4, v10 :: v_dual_cndmask_b32 v7, v9, v7
	v_cndmask_b32_e32 v3, v8, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v13, v13, v12
	v_mad_u64_u32 v[10:11], null, 0xfc2757d1, v14, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s0, 31, v13
	v_mov_b32_e32 v4, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, 0, 0xffffffe0, s0
	v_cndmask_b32_e64 v3, v7, v3, s0
	v_mad_u64_u32 v[11:12], null, 0x4e441529, v14, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v15, v15, v13
	v_cmp_lt_u32_e64 s1, 31, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v12
	v_mad_u64_u32 v[12:13], null, 0xa2f9836e, v14, v[4:5]
	v_cndmask_b32_e32 v5, v11, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v4, 0, 0xffffffe0, s1
	v_dual_cndmask_b32 v12, v12, v10 :: v_dual_cndmask_b32 v11, v13, v11
	v_cndmask_b32_e32 v10, v10, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, v12, v5, s0
	v_cndmask_b32_e64 v11, v11, v12, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v10, s0
	v_cndmask_b32_e64 v10, v10, v7, s0
	v_cndmask_b32_e64 v11, v11, v9, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, v9, v5, s1
	v_cndmask_b32_e64 v5, v5, v10, s1
	v_add_nc_u32_e32 v4, v4, v15
	v_cndmask_b32_e64 v3, v10, v3, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v12, 32, v4
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	v_alignbit_b32 v13, v11, v9, v12
	v_alignbit_b32 v8, v9, v5, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v13, v11 :: v_dual_cndmask_b32 v7, v8, v9
	v_alignbit_b32 v11, v5, v3, v12
	v_bfe_u32 v8, v4, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v9, v4, v7, 30
	v_cndmask_b32_e32 v5, v11, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v10, 0, v8
	v_alignbit_b32 v7, v7, v5, 30
	v_alignbit_b32 v3, v5, v3, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v9, v9, v10
	v_xor_b32_e32 v5, v7, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v3, v3, v10
	v_clz_i32_u32_e32 v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v11, 32, v11
	v_sub_nc_u32_e32 v7, 31, v11
	v_lshlrev_b32_e32 v13, 23, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_alignbit_b32 v9, v9, v5, v7
	v_alignbit_b32 v3, v5, v3, v7
	v_lshrrev_b32_e32 v7, 29, v4
	v_lshrrev_b32_e32 v4, 30, v4
	v_alignbit_b32 v5, v9, v3, 9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b32_e32 v7, 31, v7
	v_lshrrev_b32_e32 v9, 9, v9
	v_add_nc_u32_e32 v4, v8, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_clz_i32_u32_e32 v10, v5
	v_or_b32_e32 v12, 0.5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_u32_e32 v10, 32, v10
	v_sub_nc_u32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v14, 31, v10
	v_alignbit_b32 v3, v5, v3, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v5, v9, v12
	v_add_lshl_u32 v9, v10, v11, 23
	v_lshrrev_b32_e32 v3, 9, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v10, 0x3fc90fda, v5
	v_sub_nc_u32_e32 v3, v3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v9, 0x3fc90fda, v5, -v10
	v_add_nc_u32_e32 v3, 0x33000000, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmamk_f32 v5, v5, 0x33a22168, v9
	v_or_b32_e32 v3, v3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, 0x3fc90fda, v3
	v_add_f32_e32 v3, v10, v5
.LBB0_8:                                ; %Flow78
	s_and_not1_saveexec_b32 s0, s3
; %bb.9:
	v_mul_f32_e64 v3, 0x3f22f983, |v2|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v4, v3
	v_fma_f32 v3, 0xbfc90fda, v4, |v2|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v3, v4, 0xb3a22168, v3
	v_fmamk_f32 v3, v4, 0xa7c234c4, v3
	v_cvt_i32_f32_e32 v4, v4
; %bb.10:                               ; %_ZL3cosf.exit
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v5, v3, v3
	s_mov_b32 s3, 0xb94c1982
	v_and_b32_e32 v9, 1, v4
	v_lshlrev_b32_e32 v4, 30, v4
	s_mov_b32 s8, 0x37d75334
	v_fmaak_f32 v7, s3, v5, 0x3c0881c4
	s_cmp_lt_i32 s2, 2
	v_cmp_eq_u32_e32 vcc_lo, 0, v9
	v_and_b32_e32 v4, 0x80000000, v4
	s_mov_b32 s9, 1
	v_fmaak_f32 v7, v5, v7, 0xbe2aaa9d
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v8, s8, v5, 0xbab64f3b :: v_dual_mul_f32 v7, v5, v7
	v_dual_fmaak_f32 v8, v5, v8, 0x3d2aabf7 :: v_dual_fmac_f32 v3, v3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v8, v5, v8, 0xbf000004
	v_fma_f32 v5, v5, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, -v3, v5, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x1f8
	v_xor_b32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v7, 0x7fc00000, v3, vcc_lo
	s_cbranch_scc1 .LBB0_17
; %bb.11:                               ; %.lr.ph51.preheader
	v_add_co_u32 v2, vcc_lo, v0, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_mov_b32 s4, 0x7fffff
.LBB0_12:                               ; %.lr.ph51
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[2:3], off
	s_add_i32 s9, s9, 1
	s_mov_b32 s1, exec_lo
	v_cvt_f32_i32_e32 v8, s9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v9, null, v8, v8, v4
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v10
	v_div_scale_f32 v11, vcc_lo, v4, v8, v4
	v_mul_f32_e32 v12, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, -v9, v12, v11
	v_fmac_f32_e32 v12, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v9, v12, v11
	v_div_fmas_f32 v9, v9, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v8, v9, v8, v4
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr4
	v_cmpx_ngt_f32_e64 0x48000000, |v8|
	s_xor_b32 s5, exec_lo, s1
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=1
	v_and_b32_e32 v14, 0x7fffffff, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_or_b32 v17, v14, s4, 0x800000
	v_lshrrev_b32_e32 v14, 23, v14
	v_mad_u64_u32 v[9:10], null, 0xfe5163ab, v17, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v15, 0xffffff88, v14
	v_cmp_lt_u32_e32 vcc_lo, 63, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v10
	v_cndmask_b32_e64 v16, 0, 0xffffffc0, vcc_lo
	v_mad_u64_u32 v[10:11], null, 0x3c439041, v17, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v16, v16, v15
	v_mov_b32_e32 v4, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s0, 31, v16
	v_mad_u64_u32 v[11:12], null, 0xdb629599, v17, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v18, 0, 0xffffffe0, s0
	v_add_nc_u32_e32 v18, v18, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v4, v12 :: v_dual_cndmask_b32 v9, v11, v9
	v_cmp_lt_u32_e64 s1, 31, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, 0xf534ddc0, v17, v[4:5]
	v_mov_b32_e32 v4, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v10, v12, v10, vcc_lo
	v_mad_u64_u32 v[13:14], null, 0xfc2757d1, v17, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v9, v10, v9, s0
	v_mov_b32_e32 v4, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[14:15], null, 0x4e441529, v17, v[4:5]
	v_mov_b32_e32 v4, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, 0xa2f9836e, v17, v[4:5]
	v_cndmask_b32_e64 v4, 0, 0xffffffe0, s1
	v_dual_cndmask_b32 v17, v14, v12 :: v_dual_add_nc_u32 v4, v4, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v15, v15, v13 :: v_dual_cndmask_b32 v14, v16, v14
	v_cndmask_b32_e32 v13, v13, v11, vcc_lo
	v_sub_nc_u32_e32 v16, 32, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v12, v15, v17, s0
	v_cndmask_b32_e64 v14, v14, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v15, v17, v13, s0
	v_cndmask_b32_e64 v13, v13, v10, s0
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	v_cndmask_b32_e64 v14, v14, v12, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v12, v12, v15, s1
	v_cndmask_b32_e64 v15, v15, v13, s1
	v_cndmask_b32_e64 v9, v13, v9, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v17, v14, v12, v16
	v_alignbit_b32 v11, v12, v15, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v17, v14, vcc_lo
	v_cndmask_b32_e32 v10, v11, v12, vcc_lo
	v_alignbit_b32 v14, v15, v9, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfe_u32 v11, v4, 29, 1
	v_alignbit_b32 v12, v4, v10, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v14, v14, v15, vcc_lo
	v_sub_nc_u32_e32 v13, 0, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v10, v10, v14, 30
	v_alignbit_b32 v9, v14, v9, 30
	v_xor_b32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v10, v10, v13
	v_xor_b32_e32 v9, v9, v13
	v_lshrrev_b32_e32 v13, 29, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_clz_i32_u32_e32 v15, v12
	v_lshlrev_b32_e32 v13, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_u32_e32 v15, 32, v15
	v_or_b32_e32 v16, 0.5, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v14, 31, v15
	v_lshlrev_b32_e32 v17, 23, v15
	v_alignbit_b32 v12, v12, v10, v14
	v_alignbit_b32 v9, v10, v9, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v16, v16, v17
	v_alignbit_b32 v10, v12, v9, 9
	v_lshrrev_b32_e32 v12, 9, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v14, v10
	v_min_u32_e32 v14, 32, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v18, 31, v14
	v_alignbit_b32 v9, v10, v9, v18
	v_or_b32_e32 v10, v12, v16
	v_add_lshl_u32 v12, v14, v15, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v9, 9, v9
	v_mul_f32_e32 v14, 0x3fc90fda, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v9, v9, v12
	v_fma_f32 v12, 0x3fc90fda, v10, -v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v9, 0x33000000, v9
	v_fmac_f32_e32 v12, 0x33a22168, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v9, v9, v13
	v_fmac_f32_e32 v12, 0x3fc90fda, v9
	v_lshrrev_b32_e32 v9, 30, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v4, v14, v12 :: v_dual_add_nc_u32 v9, v11, v9
.LBB0_14:                               ; %Flow
                                        ;   in Loop: Header=BB0_12 Depth=1
	s_and_not1_saveexec_b32 s0, s5
; %bb.15:                               ;   in Loop: Header=BB0_12 Depth=1
	v_mul_f32_e64 v4, 0x3f22f983, |v8|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v9, v4
	v_fma_f32 v4, 0xbfc90fda, v9, |v8|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, 0xb3a22168, v9
	v_fmac_f32_e32 v4, 0xa7c234c4, v9
	v_cvt_i32_f32_e32 v9, v9
; %bb.16:                               ; %_ZL3cosf.exit40
                                        ;   in Loop: Header=BB0_12 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v10, v4, v4 :: v_dual_and_b32 v13, 1, v9
	s_cmp_lg_u32 s2, s9
	v_lshlrev_b32_e32 v9, 30, v9
	v_fmaak_f32 v11, s3, v10, 0x3c0881c4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v13
	v_and_b32_e32 v9, 0x80000000, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v11, v10, v11, 0xbe2aaa9d
	v_dual_fmaak_f32 v12, s8, v10, 0xbab64f3b :: v_dual_mul_f32 v11, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v12, v10, v12, 0x3d2aabf7
	v_fmac_f32_e32 v4, v4, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v12, v10, v12, 0xbf000004
	v_fma_f32 v10, v10, v12, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, -v4, v10, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v8, 0x1f8
	v_xor_b32_e32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v4, 0x7fc00000, v4, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_mul_f32_e32 v7, v7, v4
	s_cbranch_scc1 .LBB0_12
.LBB0_17:                               ; %._crit_edge52
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_f32_e32 v2, v6, v7
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_18:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16calculations_invPfS_PiPl
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16calculations_invPfS_PiPl, .Lfunc_end0-_Z16calculations_invPfS_PiPl
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2288
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16calculations_invPfS_PiPl
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16calculations_invPfS_PiPl.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
