#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <time.h>
#include "math.h"

#define TIMER_CREATE(t)               \
  cudaEvent_t t##_start, t##_end;     \
  cudaEventCreate(&t##_start);        \
  cudaEventCreate(&t##_end);               
 
 
#define TIMER_START(t)                \
  cudaEventRecord(t##_start);         \
  cudaEventSynchronize(t##_start);    \
 
 
#define TIMER_END(t)                             \
  cudaEventRecord(t##_end);                      \
  cudaEventSynchronize(t##_end);                 \
  cudaEventElapsedTime(&t, t##_start, t##_end);  \
  cudaEventDestroy(t##_start);                   \
  cudaEventDestroy(t##_end);     
  
#define TILE_SIZE 16
#define CUDA_TIMING

unsigned char *input_gpu;
unsigned long long int *hist_gpu;

/*******************************************************/
/*                 CUDA Error Function                 */
/*******************************************************/
inline cudaError_t checkCuda(cudaError_t result) {
    #if defined(DEBUG) || defined(_DEBUG)
    if (result != cudaSuccess) {
        fprintf(stderr, "CUDA Runtime Error: %s\n", cudaGetErrorString(result));
        exit(-1);
    }
    #endif
    return result;
}
                
// GPU kernel and functions
__global__ void kernel(unsigned char *input,
                       unsigned int height,
                       unsigned int width,
                       unsigned long long int *hist,
                       int low_thresh,
                       int high_thresh){
        
    int x = blockIdx.x*TILE_SIZE+threadIdx.x;
    int y = blockIdx.y*TILE_SIZE+threadIdx.y;


    if ( x < width && y < height){
        int val = input[x*height+y]; // Access image pixels
if (val <= high_thresh && val >= low_thresh) { // Setting user thresholds



        atomicAdd(&hist[val],1); // Histogram Algorithm
}
    }
}

void transpose_img(unsigned char *in_mat,
                   unsigned int height, 
                   unsigned int width,
                   unsigned long long int *hist,
                   int low_thresh,
                   int high_thresh){
                         
    int gridXSize = 1 + (( width - 1) / TILE_SIZE);
    int gridYSize = 1 + ((height - 1) / TILE_SIZE);
    
    int XSize = gridXSize*TILE_SIZE;
    int YSize = gridYSize*TILE_SIZE;
    
    // Both are the same size (CPU/GPU).
    int size = XSize*YSize;
    
    // Allocate arrays in GPU memory
    checkCuda(cudaMalloc((void**)&input_gpu    , size*sizeof(unsigned char)));
    checkCuda(cudaMalloc((void**)&hist_gpu  , 256*sizeof(unsigned long long int)));
    
    checkCuda(cudaMemset(hist_gpu , 0 , 256*sizeof(unsigned long long int)));
                
    // Copy data to GPU
    checkCuda(cudaMemcpy(input_gpu, 
                        in_mat, 
                        height*width*sizeof(char), 
                        cudaMemcpyHostToDevice));

    checkCuda(cudaDeviceSynchronize());
    
    // Execute algorithm
    dim3 dimGrid(gridXSize, gridYSize);
    dim3 dimBlock(TILE_SIZE, TILE_SIZE);

    #if defined(CUDA_TIMING)
        float Ktime;
        TIMER_CREATE(Ktime);
        TIMER_START(Ktime);
    #endif
    
    // Kernel Call
    kernel<<<dimGrid, dimBlock>>>(input_gpu, height, width, hist_gpu, low_thresh, high_thresh);
    
    checkCuda(cudaDeviceSynchronize());



    #if defined(CUDA_TIMING)
        TIMER_END(Ktime);
        printf("Kernel Execution Time: %f ms\n", Ktime);
    #endif
        
    // Retrieve results from the GPU
    checkCuda(cudaMemcpy(hist,
                        hist_gpu,
                        256*sizeof(unsigned long long int),
                        cudaMemcpyDeviceToHost));
                        
    // Free resources and end the program
    checkCuda(cudaFree(hist_gpu));
    checkCuda(cudaFree(input_gpu));

}
	.file	"tmpxft_002ddbfc_00000000-6_histo.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z31__device_stub__Z6kernelPhjjPyiiPhjjPyii
	.type	_Z31__device_stub__Z6kernelPhjjPyiiPhjjPyii, @function
_Z31__device_stub__Z6kernelPhjjPyiiPhjjPyii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z6kernelPhjjPyii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z31__device_stub__Z6kernelPhjjPyiiPhjjPyii, .-_Z31__device_stub__Z6kernelPhjjPyiiPhjjPyii
	.globl	_Z6kernelPhjjPyii
	.type	_Z6kernelPhjjPyii, @function
_Z6kernelPhjjPyii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z6kernelPhjjPyiiPhjjPyii
	.cfi_endproc
.LFE2054:
	.size	_Z6kernelPhjjPyii, .-_Z6kernelPhjjPyii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Kernel Execution Time: %f ms\n"
	.text
	.globl	_Z13transpose_imgPhjjPyii
	.type	_Z13transpose_imgPhjjPyii, @function
_Z13transpose_imgPhjjPyii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	leaq	input_gpu(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r9d, %r14d
	leal	-1(%rdx), %r9d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	shrl	$4, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leal	1(%r9), %r13d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movl	%r8d, 12(%rsp)
	leal	-1(%rsi), %r8d
	movl	%r13d, %esi
	shrl	$4, %r8d
	movq	%rcx, (%rsp)
	leal	1(%r8), %r12d
	imull	%r12d, %esi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	sall	$8, %esi
	movslq	%esi, %rsi
	call	cudaMalloc@PLT
	movl	$2048, %esi
	leaq	hist_gpu(%rip), %rdi
	call	cudaMalloc@PLT
	movq	hist_gpu(%rip), %rdi
	xorl	%esi, %esi
	movl	$2048, %edx
	call	cudaMemset@PLT
	movl	%ebp, %edx
	movl	$1, %ecx
	movq	%r15, %rsi
	imull	%ebx, %edx
	movq	input_gpu(%rip), %rdi
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	leaq	32(%rsp), %rdi
	movabsq	$68719476752, %rax
	movl	%r13d, 48(%rsp)
	movl	%r12d, 52(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movl	12(%rsp), %r8d
	movq	hist_gpu(%rip), %rcx
	movl	%ebp, %edx
	movl	%ebx, %esi
	movq	input_gpu(%rip), %rdi
	movl	%r14d, %r9d
	call	_Z31__device_stub__Z6kernelPhjjPyiiPhjjPyii
.L9:
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	28(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	movq	hist_gpu(%rip), %rsi
	movl	$2, %ecx
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	movq	hist_gpu(%rip), %rdi
	call	cudaFree@PLT
	movq	input_gpu(%rip), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z13transpose_imgPhjjPyii, .-_Z13transpose_imgPhjjPyii
	.section	.rodata.str1.1
.LC1:
	.string	"_Z6kernelPhjjPyii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPhjjPyii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	hist_gpu
	.bss
	.align 8
	.type	hist_gpu, @object
	.size	hist_gpu, 8
hist_gpu:
	.zero	8
	.globl	input_gpu
	.align 8
	.type	input_gpu, @object
	.size	input_gpu, 8
input_gpu:
	.zero	8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include "math.h"

#define TIMER_CREATE(t)               \
  hipEvent_t t##_start, t##_end;     \
  hipEventCreate(&t##_start);        \
  hipEventCreate(&t##_end);               
 
 
#define TIMER_START(t)                \
  hipEventRecord(t##_start);         \
  hipEventSynchronize(t##_start);    \
 
 
#define TIMER_END(t)                             \
  hipEventRecord(t##_end);                      \
  hipEventSynchronize(t##_end);                 \
  hipEventElapsedTime(&t, t##_start, t##_end);  \
  hipEventDestroy(t##_start);                   \
  hipEventDestroy(t##_end);     
  
#define TILE_SIZE 16
#define CUDA_TIMING

unsigned char *input_gpu;
unsigned long long int *hist_gpu;

/*******************************************************/
/*                 CUDA Error Function                 */
/*******************************************************/
inline hipError_t checkCuda(hipError_t result) {
    #if defined(DEBUG) || defined(_DEBUG)
    if (result != hipSuccess) {
        fprintf(stderr, "CUDA Runtime Error: %s\n", hipGetErrorString(result));
        exit(-1);
    }
    #endif
    return result;
}
                
// GPU kernel and functions
__global__ void kernel(unsigned char *input,
                       unsigned int height,
                       unsigned int width,
                       unsigned long long int *hist,
                       int low_thresh,
                       int high_thresh){
        
    int x = blockIdx.x*TILE_SIZE+threadIdx.x;
    int y = blockIdx.y*TILE_SIZE+threadIdx.y;


    if ( x < width && y < height){
        int val = input[x*height+y]; // Access image pixels
if (val <= high_thresh && val >= low_thresh) { // Setting user thresholds



        atomicAdd(&hist[val],1); // Histogram Algorithm
}
    }
}

void transpose_img(unsigned char *in_mat,
                   unsigned int height, 
                   unsigned int width,
                   unsigned long long int *hist,
                   int low_thresh,
                   int high_thresh){
                         
    int gridXSize = 1 + (( width - 1) / TILE_SIZE);
    int gridYSize = 1 + ((height - 1) / TILE_SIZE);
    
    int XSize = gridXSize*TILE_SIZE;
    int YSize = gridYSize*TILE_SIZE;
    
    // Both are the same size (CPU/GPU).
    int size = XSize*YSize;
    
    // Allocate arrays in GPU memory
    checkCuda(hipMalloc((void**)&input_gpu    , size*sizeof(unsigned char)));
    checkCuda(hipMalloc((void**)&hist_gpu  , 256*sizeof(unsigned long long int)));
    
    checkCuda(hipMemset(hist_gpu , 0 , 256*sizeof(unsigned long long int)));
                
    // Copy data to GPU
    checkCuda(hipMemcpy(input_gpu, 
                        in_mat, 
                        height*width*sizeof(char), 
                        hipMemcpyHostToDevice));

    checkCuda(hipDeviceSynchronize());
    
    // Execute algorithm
    dim3 dimGrid(gridXSize, gridYSize);
    dim3 dimBlock(TILE_SIZE, TILE_SIZE);

    #if defined(CUDA_TIMING)
        float Ktime;
        TIMER_CREATE(Ktime);
        TIMER_START(Ktime);
    #endif
    
    // Kernel Call
    kernel<<<dimGrid, dimBlock>>>(input_gpu, height, width, hist_gpu, low_thresh, high_thresh);
    
    checkCuda(hipDeviceSynchronize());



    #if defined(CUDA_TIMING)
        TIMER_END(Ktime);
        printf("Kernel Execution Time: %f ms\n", Ktime);
    #endif
        
    // Retrieve results from the GPU
    checkCuda(hipMemcpy(hist,
                        hist_gpu,
                        256*sizeof(unsigned long long int),
                        hipMemcpyDeviceToHost));
                        
    // Free resources and end the program
    checkCuda(hipFree(hist_gpu));
    checkCuda(hipFree(input_gpu));

}
	.text
	.file	"histo.hip"
	.globl	_Z21__device_stub__kernelPhjjPyii # -- Begin function _Z21__device_stub__kernelPhjjPyii
	.type	_Z21__device_stub__kernelPhjjPyii,@function
_Z21__device_stub__kernelPhjjPyii:      # @_Z21__device_stub__kernelPhjjPyii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPhjjPyii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPhjjPyii, .Lfunc_end0-_Z21__device_stub__kernelPhjjPyii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13transpose_imgPhjjPyii       # -- Begin function _Z13transpose_imgPhjjPyii
	.type	_Z13transpose_imgPhjjPyii,@function
_Z13transpose_imgPhjjPyii:              # @_Z13transpose_imgPhjjPyii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movl	%r8d, 16(%rsp)                  # 4-byte Spill
	movq	%rcx, %rbx
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %rbp
	leal	-1(%r15), %r14d
	shrl	$4, %r14d
	incl	%r14d
	leal	-1(%r12), %r13d
	shrl	$4, %r13d
	incl	%r13d
	movl	%r13d, %esi
	imull	%r14d, %esi
	shll	$8, %esi
	movl	$input_gpu, %edi
	callq	hipMalloc
	movl	$hist_gpu, %edi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	movq	hist_gpu(%rip), %rdi
	movl	$2048, %edx                     # imm = 0x800
	xorl	%esi, %esi
	callq	hipMemset
	movq	input_gpu(%rip), %rdi
	movl	%r15d, %edx
	imull	%r12d, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	shlq	$32, %r13
	orq	%r14, %r13
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbp), %rdi
	callq	hipEventSynchronize
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	input_gpu(%rip), %rdi
	movq	hist_gpu(%rip), %rcx
	movl	%r12d, %esi
	movl	%r15d, %edx
	movl	16(%rsp), %r8d                  # 4-byte Reload
	movl	20(%rsp), %r9d                  # 4-byte Reload
	callq	_Z21__device_stub__kernelPhjjPyii
.LBB1_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	36(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	hist_gpu(%rip), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	hist_gpu(%rip), %rdi
	callq	hipFree
	movq	input_gpu(%rip), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z13transpose_imgPhjjPyii, .Lfunc_end1-_Z13transpose_imgPhjjPyii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPhjjPyii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	input_gpu,@object               # @input_gpu
	.bss
	.globl	input_gpu
	.p2align	3, 0x0
input_gpu:
	.quad	0
	.size	input_gpu, 8

	.type	hist_gpu,@object                # @hist_gpu
	.globl	hist_gpu
	.p2align	3, 0x0
hist_gpu:
	.quad	0
	.size	hist_gpu, 8

	.type	_Z6kernelPhjjPyii,@object       # @_Z6kernelPhjjPyii
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPhjjPyii
	.p2align	3, 0x0
_Z6kernelPhjjPyii:
	.quad	_Z21__device_stub__kernelPhjjPyii
	.size	_Z6kernelPhjjPyii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Kernel Execution Time: %f ms\n"
	.size	.L.str, 30

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPhjjPyii"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPhjjPyii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym input_gpu
	.addrsig_sym hist_gpu
	.addrsig_sym _Z6kernelPhjjPyii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPhjjPyii       ; -- Begin function _Z6kernelPhjjPyii
	.globl	_Z6kernelPhjjPyii
	.p2align	8
	.type	_Z6kernelPhjjPyii,@function
_Z6kernelPhjjPyii:                      ; @_Z6kernelPhjjPyii
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x8
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v1, s14, 4, v1
	v_lshl_add_u32 v0, s15, 4, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, s5, v1
	v_cmp_gt_u32_e64 s2, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_load_b64 s[4:5], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	global_load_u8 v0, v2, s[2:3]
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v0, 0xff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, s5, v0
	v_cmp_le_i32_e64 s2, s4, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 1 :: v_dual_lshlrev_b32 v0, 3, v0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u64 v0, v[1:2], s[0:1]
.LBB0_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPhjjPyii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPhjjPyii, .Lfunc_end0-_Z6kernelPhjjPyii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPhjjPyii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPhjjPyii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
