#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>

// =========== GLOBALS =========================
const int m = 50; // number of elements in array
const int n = 10; // number of elements in array
const int k = 10; // number of elements in array
const int sizeZ = 64; // number of threads in z direction. NEEDS TO BE CONST GLOBAL

// GPU Kernel
__global__ void matmul(int *a, int *b, int *result){

    // init the thread ids
    int tidx, tidy, tidz, cacheIndex;
    tidx = blockIdx.x * blockDim.x + threadIdx.x;
    tidy = blockIdx.y * blockDim.y + threadIdx.y;
    tidz = threadIdx.z;
    cacheIndex = threadIdx.z;

    // set up the shared memory for each block
    __shared__ int cache[sizeZ];

    while (tidz < n){
        cache[cacheIndex] += a[tidx * n + tidz] * b[tidz * k + tidy];
        tidz += blockDim.z;
    }

    // make sure all threads are finished
    __syncthreads();

    // reduction
    int i = blockDim.z/2;
    while(i != 0){
        if(cacheIndex < i){
            cache[cacheIndex] += cache[cacheIndex + i];
        }

        // make sure all threads are caught up.
        __syncthreads();

        i /= 2; // iterate i
    }

    // "master" thread sets value of result
    if(cacheIndex == 0){
        result[tidx * k + tidy] = cache[0];
        if(sizeZ % 2 == 1){
            result[tidx * k + tidy] += cache[sizeZ-1];
        }
    }

    __syncthreads();
}

int main(void){
    // initialize pointers
    int *a, *b, *res;       // host
    int *d_a, *d_b, *d_res; // device

    // allocate cpu memory (host)
    a = (int*)malloc(m * k * sizeof(int));
    b = (int*)malloc(n * k * sizeof(int));
    res = (int*)malloc(m * k * sizeof(int));

    // allocate memory on GPU
    cudaMalloc(&d_a, m * n * sizeof(int));
    cudaMalloc(&d_b, n * k * sizeof(int));
    cudaMalloc(&d_res, m * k * sizeof(int));

    // set up rng
    srand(time(NULL));

    // fill in "a" array
    for (int i=0; i<m * n; i++){
        a[i] = rand() % 100; // some number less than 100
//        a[i] = 1;
    }
    // fill in "b" array
    for (int i=0; i<n * k; i++){
        b[i] = rand() % 100; // some number less than 100
//        b[i] = 1;
    }

    // copy from host to device
    printf("m * n: %d\n",m * n);
    printf("n * k: %d\n",k * n);

    cudaMemcpy(d_a, a, m * n * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, b, n * k * sizeof(int), cudaMemcpyHostToDevice);

    const dim3 threadsPerBlock(1, 1, sizeZ);

    printf("threadsPerBlock.z: %d\n", threadsPerBlock.z);

    // Calculate number of blocks needed
    const dim3 blocksPerGrid(m, k);
    printf("blocksPerGrid.x: %d\n", m);

    // run kernel
    matmul<<<blocksPerGrid,threadsPerBlock>>>(d_a, d_b, d_res);

    // copy memory from gpu to cpu
    cudaMemcpy(res, d_res, m * k * sizeof(int), cudaMemcpyDeviceToHost);

    // print reslut
    printf("Top Left of Result:\n[[%d %d %d . . .\n [%d %d %d . . .]\n [%d %d %d . . .]\n  . . . . . .]]\n",
           res[0], res[1], res[2],
           res[k], res[k + 1], res[k + 2],
           res[2 * k], res[2 * k + 1], res[2 * k + 2]);

    // clean up
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_res);
}

	.file	"tmpxft_0036e33a_00000000-6_mat_mult_reduction.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z6matmulPiS_S_PiS_S_
	.type	_Z29__device_stub__Z6matmulPiS_S_PiS_S_, @function
_Z29__device_stub__Z6matmulPiS_S_PiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6matmulPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z6matmulPiS_S_PiS_S_, .-_Z29__device_stub__Z6matmulPiS_S_PiS_S_
	.globl	_Z6matmulPiS_S_
	.type	_Z6matmulPiS_S_, @function
_Z6matmulPiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6matmulPiS_S_PiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z6matmulPiS_S_, .-_Z6matmulPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"m * n: %d\n"
.LC1:
	.string	"n * k: %d\n"
.LC2:
	.string	"threadsPerBlock.z: %d\n"
.LC3:
	.string	"blocksPerGrid.x: %d\n"
.LC4:
	.string	"Top Left of Result:\n[[%d %d %d . . .\n [%d %d %d . . .]\n [%d %d %d . . .]\n  . . . . . .]]\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$2000, %edi
	movl	$100, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$400, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$2000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$2000, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	movl	$2000, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L9:
	call	rand@PLT
	cltd
	idivl	%r14d
	movl	%edx, (%r12,%r13,4)
	incq	%r13
	cmpq	$500, %r13
	jne	.L9
	xorl	%r13d, %r13d
	movl	$100, %r14d
.L10:
	call	rand@PLT
	cltd
	idivl	%r14d
	movl	%edx, 0(%rbp,%r13,4)
	incq	%r13
	cmpq	$100, %r13
	jne	.L10
	movl	$500, %edx
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$100, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$2000, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$400, %edx
	call	cudaMemcpy@PLT
	movl	$64, %edx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$50, %edx
	movabsq	$42949673010, %rax
	leaq	.LC3(%rip), %rsi
	movq	%rax, 44(%rsp)
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$1, 52(%rsp)
	call	__printf_chk@PLT
	movq	44(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	52(%rsp), %esi
	movl	$64, %ecx
	movabsq	$4294967297, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z29__device_stub__Z6matmulPiS_S_PiS_S_
.L11:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$2000, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	4(%rbx), %ecx
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	88(%rbx), %eax
	pushq	%rax
	.cfi_def_cfa_offset 128
	movl	84(%rbx), %eax
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	80(%rbx), %eax
	pushq	%rax
	.cfi_def_cfa_offset 144
	movl	48(%rbx), %eax
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	44(%rbx), %eax
	pushq	%rax
	.cfi_def_cfa_offset 160
	movl	40(%rbx), %r9d
	xorl	%eax, %eax
	movl	8(%rbx), %r8d
	movl	(%rbx), %edx
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	addq	$48, %rsp
	.cfi_def_cfa_offset 112
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z6matmulPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6matmulPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>

// =========== GLOBALS =========================
const int m = 50; // number of elements in array
const int n = 10; // number of elements in array
const int k = 10; // number of elements in array
const int sizeZ = 64; // number of threads in z direction. NEEDS TO BE CONST GLOBAL

// GPU Kernel
__global__ void matmul(int *a, int *b, int *result){

    // init the thread ids
    int tidx, tidy, tidz, cacheIndex;
    tidx = blockIdx.x * blockDim.x + threadIdx.x;
    tidy = blockIdx.y * blockDim.y + threadIdx.y;
    tidz = threadIdx.z;
    cacheIndex = threadIdx.z;

    // set up the shared memory for each block
    __shared__ int cache[sizeZ];

    while (tidz < n){
        cache[cacheIndex] += a[tidx * n + tidz] * b[tidz * k + tidy];
        tidz += blockDim.z;
    }

    // make sure all threads are finished
    __syncthreads();

    // reduction
    int i = blockDim.z/2;
    while(i != 0){
        if(cacheIndex < i){
            cache[cacheIndex] += cache[cacheIndex + i];
        }

        // make sure all threads are caught up.
        __syncthreads();

        i /= 2; // iterate i
    }

    // "master" thread sets value of result
    if(cacheIndex == 0){
        result[tidx * k + tidy] = cache[0];
        if(sizeZ % 2 == 1){
            result[tidx * k + tidy] += cache[sizeZ-1];
        }
    }

    __syncthreads();
}

int main(void){
    // initialize pointers
    int *a, *b, *res;       // host
    int *d_a, *d_b, *d_res; // device

    // allocate cpu memory (host)
    a = (int*)malloc(m * k * sizeof(int));
    b = (int*)malloc(n * k * sizeof(int));
    res = (int*)malloc(m * k * sizeof(int));

    // allocate memory on GPU
    hipMalloc(&d_a, m * n * sizeof(int));
    hipMalloc(&d_b, n * k * sizeof(int));
    hipMalloc(&d_res, m * k * sizeof(int));

    // set up rng
    srand(time(NULL));

    // fill in "a" array
    for (int i=0; i<m * n; i++){
        a[i] = rand() % 100; // some number less than 100
//        a[i] = 1;
    }
    // fill in "b" array
    for (int i=0; i<n * k; i++){
        b[i] = rand() % 100; // some number less than 100
//        b[i] = 1;
    }

    // copy from host to device
    printf("m * n: %d\n",m * n);
    printf("n * k: %d\n",k * n);

    hipMemcpy(d_a, a, m * n * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_b, b, n * k * sizeof(int), hipMemcpyHostToDevice);

    const dim3 threadsPerBlock(1, 1, sizeZ);

    printf("threadsPerBlock.z: %d\n", threadsPerBlock.z);

    // Calculate number of blocks needed
    const dim3 blocksPerGrid(m, k);
    printf("blocksPerGrid.x: %d\n", m);

    // run kernel
    matmul<<<blocksPerGrid,threadsPerBlock>>>(d_a, d_b, d_res);

    // copy memory from gpu to cpu
    hipMemcpy(res, d_res, m * k * sizeof(int), hipMemcpyDeviceToHost);

    // print reslut
    printf("Top Left of Result:\n[[%d %d %d . . .\n [%d %d %d . . .]\n [%d %d %d . . .]\n  . . . . . .]]\n",
           res[0], res[1], res[2],
           res[k], res[k + 1], res[k + 2],
           res[2 * k], res[2 * k + 1], res[2 * k + 2]);

    // clean up
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_res);
}

	.text
	.file	"mat_mult_reduction.hip"
	.globl	_Z21__device_stub__matmulPiS_S_ # -- Begin function _Z21__device_stub__matmulPiS_S_
	.type	_Z21__device_stub__matmulPiS_S_,@function
_Z21__device_stub__matmulPiS_S_:        # @_Z21__device_stub__matmulPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6matmulPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__matmulPiS_S_, .Lfunc_end0-_Z21__device_stub__matmulPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$2000, %edi                     # imm = 0x7D0
	callq	malloc
	movq	%rax, %r15
	movl	$400, %edi                      # imm = 0x190
	callq	malloc
	movq	%rax, %r14
	movl	$2000, %edi                     # imm = 0x7D0
	callq	malloc
	movq	%rax, %rbx
	leaq	16(%rsp), %rdi
	movl	$2000, %esi                     # imm = 0x7D0
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$2000, %esi                     # imm = 0x7D0
	callq	hipMalloc
	xorl	%r12d, %r12d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r15,%r12,4)
	incq	%r12
	cmpq	$500, %r12                      # imm = 0x1F4
	jne	.LBB1_1
# %bb.2:                                # %.preheader.preheader
	xorl	%r12d, %r12d
.LBB1_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r14,%r12,4)
	incq	%r12
	cmpq	$100, %r12
	jne	.LBB1_3
# %bb.4:
	movl	$.L.str, %edi
	movl	$500, %esi                      # imm = 0x1F4
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$100, %esi
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	movl	$2000, %edx                     # imm = 0x7D0
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$400, %edx                      # imm = 0x190
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.2, %edi
	movl	$64, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	$50, %esi
	xorl	%eax, %eax
	callq	printf
	movabsq	$42949673010, %rdi              # imm = 0xA00000032
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %esi
	movl	$64, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z21__device_stub__matmulPiS_S_
.LBB1_6:
	movq	(%rsp), %rsi
	movl	$2000, %edx                     # imm = 0x7D0
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%rbx), %esi
	movl	4(%rbx), %edx
	movl	8(%rbx), %ecx
	movl	40(%rbx), %r8d
	movl	44(%rbx), %r9d
	movl	48(%rbx), %r10d
	movl	80(%rbx), %r11d
	movl	84(%rbx), %r14d
	movl	88(%rbx), %ebx
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	printf
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6matmulPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6matmulPiS_S_,@object         # @_Z6matmulPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6matmulPiS_S_
	.p2align	3, 0x0
_Z6matmulPiS_S_:
	.quad	_Z21__device_stub__matmulPiS_S_
	.size	_Z6matmulPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"m * n: %d\n"
	.size	.L.str, 11

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"n * k: %d\n"
	.size	.L.str.1, 11

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"threadsPerBlock.z: %d\n"
	.size	.L.str.2, 23

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"blocksPerGrid.x: %d\n"
	.size	.L.str.3, 21

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Top Left of Result:\n[[%d %d %d . . .\n [%d %d %d . . .]\n [%d %d %d . . .]\n  . . . . . .]]\n"
	.size	.L.str.4, 90

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6matmulPiS_S_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__matmulPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6matmulPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6matmulPiS_S_         ; -- Begin function _Z6matmulPiS_S_
	.globl	_Z6matmulPiS_S_
	.p2align	8
	.type	_Z6matmulPiS_S_,@function
_Z6matmulPiS_S_:                        ; @_Z6matmulPiS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 20, 10
	v_bfe_u32 v4, v0, 10, 10
	s_add_u32 s0, s0, 24
	s_addc_u32 s1, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s8, 16
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s8, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s9, v[4:5]
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $sgpr9
	v_cmpx_lt_u32_e32 9, v3
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_2
; %bb.1:                                ; %._crit_edge33
	s_load_b32 s9, s[0:1], 0x10
.LBB0_2:                                ; %Flow48
	s_or_saveexec_b32 s8, s8
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v2, s9
	v_lshlrev_b32_e32 v10, 2, v3
	s_xor_b32 exec_lo, exec_lo, s8
	s_cbranch_execz .LBB0_6
; %bb.3:                                ; %.lr.ph
	v_mad_u64_u32 v[4:5], null, v0, 10, v[3:4]
	s_load_b32 s1, s[0:1], 0x10
	ds_load_b32 v2, v10
	v_mov_b32_e32 v11, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_mad_u32_u24 v4, v3, 10, v1
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s1, 0xffff
	s_mov_b32 s5, 0
	s_mul_i32 s4, s9, 10
	s_lshl_b32 s10, s9, 2
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	v_add_nc_u32_e32 v4, s4, v4
	v_add_co_u32 v8, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	global_load_b32 v5, v[6:7], off
	global_load_b32 v12, v[8:9], off
	v_add_co_u32 v6, vcc_lo, v6, s10
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[8:9], null, v12, v5, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_add_nc_u32 v11, s9, v11
	v_cmp_lt_u32_e64 s0, 9, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s0, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_4
; %bb.5:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v2, s1
	ds_store_b32 v10, v8
.LBB0_6:                                ; %Flow49
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u16_e32 1, v2
	s_cbranch_execz .LBB0_11
; %bb.7:                                ; %.lr.ph31
	v_lshrrev_b16 v2, 1, v2
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, 0xffff, v2
.LBB0_8:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v3, v2
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	v_lshl_add_u32 v4, v2, 2, v10
	ds_load_b32 v4, v4
	ds_load_b32 v5, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	ds_store_b32 v10, v4
.LBB0_10:                               ;   in Loop: Header=BB0_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_lshrrev_b32_e32 v4, 1, v2
	v_cmp_gt_u32_e32 vcc_lo, 2, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_mov_b32_e32 v2, v4
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_8
.LBB0_11:                               ; %Flow47
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_mad_u64_u32 v[2:3], null, v0, 10, v[1:2]
	v_mov_b32_e32 v0, 0
	ds_load_b32 v4, v0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v4, off
.LBB0_13:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6matmulPiS_S_
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6matmulPiS_S_, .Lfunc_end0-_Z6matmulPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 640
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 256
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6matmulPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6matmulPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
