#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>

#define CUDA_SAFE_CALL( call) {                                    \
    cudaError err = call;                                                    \
    if( cudaSuccess != err) {                                                \
        fprintf(stderr, "Cuda error in file '%s' in line %i : %s.\n",        \
                __FILE__, __LINE__, cudaGetErrorString( err) );              \
        exit(EXIT_FAILURE);                                                  \
    } }

#define DRIVER_API_CALL(apiFuncCall)                                           \
do {                                                                           \
    CUresult _status = apiFuncCall;                                            \
    if (_status != CUDA_SUCCESS) {                                             \
        fprintf(stderr, "%s:%d: error: function %s failed with error %d.\n",   \
                __FILE__, __LINE__, #apiFuncCall, _status);                    \
        exit(-1);                                                              \
    }                                                                          \
} while (0)

#define DATA_TYPE 0 // 0-SP, 1-DP

#define ALIGN_SIZE (8)
#define ALIGN_BUFFER(buffer, align)                                            \
  (((uintptr_t) (buffer) & ((align)-1)) ? ((buffer) + (align) - ((uintptr_t) (buffer) & ((align)-1))) : (buffer))

#define KERNEL_CALLS 1

#define COMP_ITERATIONS (1024)
#define THREADS (1024)
#define BLOCKS (32768)
#define STRIDE (64*1024)

#define REGBLOCK_SIZE (4)
#define UNROLL_ITERATIONS (32)

#define deviceNum (0)

//CODE
__global__ void warmup(short* cd){

	short r0 = 1.0,
	  r1 = r0+(short)(31),
	  r2 = r0+(short)(37),
	  r3 = r0+(short)(41);

	for(int j=0; j<COMP_ITERATIONS; j+=UNROLL_ITERATIONS){
		#pragma unroll
		for(int i=0; i<UNROLL_ITERATIONS; i++){
			// Each iteration maps to floating point 8 operations (4 multiplies + 4 additions)
			r0 = r0 * r0 + r1;//r0;
			r1 = r1 * r1 + r2;//r1;
			r2 = r2 * r2 + r3;//r2;
			r3 = r3 * r3 + r0;//r3;
		}
	}
	cd[blockIdx.x * 256 + threadIdx.x] = r0;
}

template <class T>
__global__ void benchmark( T* cdin,  T* cdout, int compute_iters){

	const long ite=blockIdx.x * THREADS + threadIdx.x;
	// const int ite = threadIdx.x+(BLOCKS-blockIdx.x)%BLOCKS*32+threadIdx.x/(int)32*32;
	T r0;
	// printf("(%d/%d) - %d\n", blockIdx.x,threadIdx.x,ite);
	for(int j=0; j<compute_iters; j+=UNROLL_ITERATIONS){
		#pragma unroll
		for(int i=0; i<UNROLL_ITERATIONS; i++){
			r0=cdin[ite+STRIDE*i];
			cdout[ite+STRIDE*i]=r0;
		}
	}

}

void initializeEvents(cudaEvent_t *start, cudaEvent_t *stop){
	CUDA_SAFE_CALL( cudaEventCreate(start) );
	CUDA_SAFE_CALL( cudaEventCreate(stop) );
	CUDA_SAFE_CALL( cudaEventRecord(*start, 0) );
}

float finalizeEvents(cudaEvent_t start, cudaEvent_t stop){
	CUDA_SAFE_CALL( cudaGetLastError() );
	CUDA_SAFE_CALL( cudaEventRecord(stop, 0) );
	CUDA_SAFE_CALL( cudaEventSynchronize(stop) );
	float kernel_time;
	CUDA_SAFE_CALL( cudaEventElapsedTime(&kernel_time, start, stop) );
	CUDA_SAFE_CALL( cudaEventDestroy(start) );
	CUDA_SAFE_CALL( cudaEventDestroy(stop) );
	return kernel_time;
}

void runbench_warmup(short* cd){
	const int BLOCK_SIZE = 512;
	const int TOTAL_REDUCED_BLOCKS = 512;

	dim3 dimBlock(BLOCK_SIZE, 1, 1);
	dim3 dimReducedGrid(TOTAL_REDUCED_BLOCKS, 1, 1);

	warmup<<< dimReducedGrid, dimBlock >>>(cd);
	CUDA_SAFE_CALL( cudaGetLastError() );
	CUDA_SAFE_CALL( cudaThreadSynchronize() );
}

void runbench(double* kernel_time, double* bandw,double* cdin,double* cdout,int L2size, int compute_iters){

	cudaEvent_t start, stop;
    int type = DATA_TYPE;
    dim3 dimBlock(THREADS, 1, 1);
    dim3 dimGrid(BLOCKS, 1, 1);
	initializeEvents(&start, &stop);
	if (type==0){
		benchmark<float><<< dimGrid, dimBlock >>>((float*)cdin,(float*)cdout, compute_iters);
	}else{
		benchmark<double><<< dimGrid, dimBlock >>>(cdin,cdout, compute_iters);
	}

	long long shared_access = 2*(long long)(compute_iters)*THREADS*BLOCKS;

	cudaDeviceSynchronize();

	double time = finalizeEvents(start, stop);
	double result;
	if (type==0)
		result = ((double)shared_access)*4/(double)time*1000./(double)(1024*1024*1024);
	else
		result = ((double)shared_access)*8/(double)time*1000./(double)(1024*1024*1024);

	*kernel_time = time;
	*bandw=result;

}

int main(int argc, char *argv[]){
    CUdevice device = 0;
    int deviceCount;
	char deviceName[32];

    int kernel_calls=KERNEL_CALLS, compute_iters=COMP_ITERATIONS;
    cudaDeviceProp deviceProp;

    if (argc > 3 || argc == 2) {
        printf("\nError: Wrong number of arguments.\n\n");
        printf("Usage:\n\t %s [inner_iterations] [kernel_calls]\n\t %s\n", argv[0], argv[0]);

        return -1;
    }

    if (argc == 3) {
        kernel_calls = atoi(argv[2]);
        compute_iters = atoi(argv[1]);
    }

    printf("Number of kernel launches: %d\n", kernel_calls);
    printf("Number of compute iterations: %d\n", compute_iters);

	cudaSetDevice(deviceNum);

	double time[kernel_calls][2],value[kernel_calls][4];
	int L2size;
	int size = (THREADS*BLOCKS+32*STRIDE)*sizeof(double);
	size_t freeCUDAMem, totalCUDAMem;
	cudaMemGetInfo(&freeCUDAMem, &totalCUDAMem);
	printf("Total GPU memory %lu, free %lu\n", totalCUDAMem, freeCUDAMem);
	printf("Buffer size: %dMB\n", size*sizeof(double)/(1024*1024));

	//Initialize Global Memory
	double *cdin;
	double *cdout;
	// init = (int*)malloc(size);
	CUDA_SAFE_CALL(cudaMalloc((void**)&cdin, size));
	CUDA_SAFE_CALL(cudaMalloc((void**)&cdout, size));

	// Copy data to device memory
	CUDA_SAFE_CALL(cudaMemset(cdin, 0, size));  // initialize to zeros
	CUDA_SAFE_CALL(cudaMemset(cdout, 0, size));  // initialize to zeros
	// Synchronize in order to wait for memory operations to finish
	CUDA_SAFE_CALL(cudaThreadSynchronize());
	// make sure activity is enabled before any CUDA API

	DRIVER_API_CALL(cuDeviceGetCount(&deviceCount));
	if (deviceCount == 0) {
		printf("There is no device supporting CUDA.\n");
       return -2;
	}

	printf("CUDA Device Number: %d\n", deviceNum);

	DRIVER_API_CALL(cuDeviceGet(&device, deviceNum));
	CUDA_SAFE_CALL(cudaGetDeviceProperties(&deviceProp, device));
	DRIVER_API_CALL(cuDeviceGetName(deviceName, 32, device));

	int i;
	class type;

	for (i=0;i<10;i++){
		runbench_warmup((short*)cdin);
	}

    for (i=0;i<kernel_calls;i++){
    	runbench(&time[0][0],&value[0][0],cdin,cdout,L2size,compute_iters);
    	printf("Registered time: %f ms\n",time[0][0]);
	}

    CUDA_SAFE_CALL( cudaDeviceReset());
    printf("-----------------------------------------------------------------------\n");
	return 0;
}

	.file	"tmpxft_00234f6c_00000000-6_dram.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL37__device_stub__Z9benchmarkIfEvPT_S1_iPfS_i, @function
_ZL37__device_stub__Z9benchmarkIfEvPT_S1_iPfS_i:
.LFB2060:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9benchmarkIfEvPT_S1_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_ZL37__device_stub__Z9benchmarkIfEvPT_S1_iPfS_i, .-_ZL37__device_stub__Z9benchmarkIfEvPT_S1_iPfS_i
	.section	.text._Z9benchmarkIfEvPT_S1_i,"axG",@progbits,_Z9benchmarkIfEvPT_S1_i,comdat
	.weak	_Z9benchmarkIfEvPT_S1_i
	.type	_Z9benchmarkIfEvPT_S1_i, @function
_Z9benchmarkIfEvPT_S1_i:
.LFB2111:
	.cfi_startproc
	endbr64
	jmp	_ZL37__device_stub__Z9benchmarkIfEvPT_S1_iPfS_i
	.cfi_endproc
.LFE2111:
	.size	_Z9benchmarkIfEvPT_S1_i, .-_Z9benchmarkIfEvPT_S1_i
	.section	.text._Z9benchmarkIdEvPT_S1_i,"axG",@progbits,_Z9benchmarkIdEvPT_S1_i,comdat
	.weak	_Z9benchmarkIdEvPT_S1_i
	.type	_Z9benchmarkIdEvPT_S1_i, @function
_Z9benchmarkIdEvPT_S1_i:
.LFB2112:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rax
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	leaq	32(%rsp), %rdx
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9benchmarkIdEvPT_S1_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2112:
	.size	_Z9benchmarkIdEvPT_S1_i, .-_Z9benchmarkIdEvPT_S1_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/hpc-ulisboa/gpupowermodel/master/v2.0_TPDS2019/microbenchmarks/DRAM/dram.cu"
.LC1:
	.string	"Cuda error in file '%s' in line %i : %s.\n"
	.text
	.globl	_Z16initializeEventsPP10CUevent_stS1_
	.type	_Z16initializeEventsPP10CUevent_stS1_, @function
_Z16initializeEventsPP10CUevent_stS1_:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	cudaEventCreate@PLT
	testl	%eax, %eax
	je	.L13
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$80, %r8d
	movq	%rax, %r9
	jmp	.L17
.L13:
	movq	%rbp, %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L14
	call	cudaGetErrorString@PLT
	movl	$81, %r8d
	movq	%rax, %r9
.L17:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L14:
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L12
	call	cudaGetErrorString@PLT
	movl	$82, %r8d
	movq	%rax, %r9
	jmp	.L17
.L12:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z16initializeEventsPP10CUevent_stS1_, .-_Z16initializeEventsPP10CUevent_stS1_
	.globl	_Z14finalizeEventsP10CUevent_stS0_
	.type	_Z14finalizeEventsP10CUevent_stS0_, @function
_Z14finalizeEventsP10CUevent_stS0_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L19
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$86, %r8d
	movq	%rax, %r9
	jmp	.L27
.L19:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L20
	call	cudaGetErrorString@PLT
	movl	$87, %r8d
	movq	%rax, %r9
.L27:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L20:
	movq	%rbx, %rdi
	call	cudaEventSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L21
	call	cudaGetErrorString@PLT
	movl	$88, %r8d
	movq	%rax, %r9
	jmp	.L27
.L21:
	leaq	4(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	call	cudaEventElapsedTime@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L22
	call	cudaGetErrorString@PLT
	movl	$90, %r8d
	movq	%rax, %r9
	jmp	.L27
.L22:
	movq	%rbp, %rdi
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L23
	call	cudaGetErrorString@PLT
	movl	$91, %r8d
	movq	%rax, %r9
	jmp	.L27
.L23:
	movq	%rbx, %rdi
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L24
	call	cudaGetErrorString@PLT
	movl	$92, %r8d
	movq	%rax, %r9
	jmp	.L27
.L24:
	movss	4(%rsp), %xmm0
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z14finalizeEventsP10CUevent_stS0_, .-_Z14finalizeEventsP10CUevent_stS0_
	.globl	_Z8runbenchPdS_S_S_ii
	.type	_Z8runbenchPdS_S_S_ii, @function
_Z8runbenchPdS_S_S_ii:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movslq	%r9d, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	movabsq	$4294968320, %rax
	leaq	8(%rsp), %rsi
	movq	%rsp, %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	addq	$31744, %rax
	movq	%rax, 28(%rsp)
	call	_Z16initializeEventsPP10CUevent_stS1_
	movl	24(%rsp), %ecx
	movl	36(%rsp), %esi
	xorl	%r9d, %r9d
	movq	16(%rsp), %rdx
	movq	28(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movl	%ebp, %edx
	movq	%r14, %rsi
	movq	%r13, %rdi
	call	_ZL37__device_stub__Z9benchmarkIfEvPT_S1_iPfS_i
.L29:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	salq	$26, %rbp
	call	_Z14finalizeEventsP10CUevent_stS0_
	cvtss2sd	%xmm0, %xmm1
	cvtsi2sdq	%rbp, %xmm0
	movsd	%xmm1, (%r12)
	mulsd	.LC2(%rip), %xmm0
	divsd	%xmm1, %xmm0
	mulsd	.LC3(%rip), %xmm0
	mulsd	.LC4(%rip), %xmm0
	movsd	%xmm0, (%rbx)
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z8runbenchPdS_S_S_ii, .-_Z8runbenchPdS_S_S_ii
	.globl	_Z25__device_stub__Z6warmupPsPs
	.type	_Z25__device_stub__Z6warmupPsPs, @function
_Z25__device_stub__Z6warmupPsPs:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z6warmupPs(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L32:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z25__device_stub__Z6warmupPsPs, .-_Z25__device_stub__Z6warmupPsPs
	.globl	_Z6warmupPs
	.type	_Z6warmupPs, @function
_Z6warmupPs:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z6warmupPsPs
	.cfi_endproc
.LFE2059:
	.size	_Z6warmupPs, .-_Z6warmupPs
	.globl	_Z15runbench_warmupPs
	.type	_Z15runbench_warmupPs, @function
_Z15runbench_warmupPs:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movl	$8388609, %edi
	xorl	%r9d, %r9d
	salq	$9, %rdi
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdi, %rdx
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	%rbx, %rdi
	call	_Z25__device_stub__Z6warmupPsPs
.L38:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L39
	call	cudaGetErrorString@PLT
	movl	$104, %r8d
	movq	%rax, %r9
	jmp	.L42
.L39:
	call	cudaThreadSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L37
	call	cudaGetErrorString@PLT
	movl	$105, %r8d
	movq	%rax, %r9
.L42:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L37:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z15runbench_warmupPs, .-_Z15runbench_warmupPs
	.section	.rodata.str1.1
.LC5:
	.string	"\nError: Wrong number of arguments.\n\n"
.LC6:
	.string	"Usage:\n\t %s [inner_iterations] [kernel_calls]\n\t %s\n"
.LC7:
	.string	"Number of kernel launches: %d\n"
.LC8:
	.string	"Number of compute iterations: %d\n"
.LC9:
	.string	"Total GPU memory %lu, free %lu\n"
.LC10:
	.string	"Buffer size: %dMB\n"
.LC11:
	.string	"cuDeviceGetCount(&deviceCount)"
.LC12:
	.string	"%s:%d: error: function %s failed with error %d.\n"
.LC13:
	.string	"There is no device supporting CUDA.\n"
.LC14:
	.string	"CUDA Device Number: %d\n"
.LC15:
	.string	"cuDeviceGet(&device, deviceNum)"
.LC16:
	.string	"cuDeviceGetName(deviceName, 32, device)"
.LC17:
	.string	"Registered time: %f ms\n"
.LC18:
	.string	"-----------------------------------------------------------------------\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%r8d, %r8d
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movq	%rsi, %r12
	pushq	%rbx
	subq	$1144, %rsp
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movl	%r8d, -1160(%rbp)
	cmpl	$3, %edi
	jg	.L70
	cmpl	$2, %edi
	jne	.L44
.L70:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%r12), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	movq	%rdx, %rcx
	call	__printf_chk@PLT
	orl	$-1, %eax
	jmp	.L43
.L44:
	cmpl	$3, %edi
	jne	.L68
	movq	16(%rsi), %rdi
	call	atoi@PLT
	movq	8(%r12), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%eax, %r12d
	jmp	.L47
.L68:
	movl	$1024, %r12d
	movl	$1, %ebx
.L47:
	movl	%ebx, %edx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC8(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movslq	%ebx, %rax
	movq	%rsp, %rcx
	movq	%rax, %rdx
	salq	$4, %rdx
	movq	%rdx, %rsi
	andq	$-4096, %rsi
	subq	%rsi, %rcx
.L48:
	cmpq	%rcx, %rsp
	je	.L49
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L48
.L49:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L50
	orq	$0, -8(%rsp,%rdx)
.L50:
	salq	$5, %rax
	movq	%rsp, %rdx
	movq	%rsp, %r13
	movq	%rax, %rcx
	andq	$-4096, %rcx
	subq	%rcx, %rdx
.L51:
	cmpq	%rdx, %rsp
	je	.L52
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L51
.L52:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L53
	orq	$0, -8(%rsp,%rax)
.L53:
	leaq	-1144(%rbp), %rsi
	leaq	-1152(%rbp), %rdi
	movq	%rsp, -1176(%rbp)
	call	cudaMemGetInfo@PLT
	movq	-1152(%rbp), %rcx
	movl	$2, %edi
	xorl	%eax, %eax
	movq	-1144(%rbp), %rdx
	leaq	.LC9(%rip), %rsi
	call	__printf_chk@PLT
	movl	$2176, %edx
	leaq	.LC10(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	-1136(%rbp), %rdi
	movl	$285212672, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L54
	call	cudaGetErrorString@PLT
	movl	$174, %r8d
	movq	%rax, %r9
	jmp	.L81
.L54:
	leaq	-1128(%rbp), %rdi
	movl	$285212672, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L55
	call	cudaGetErrorString@PLT
	movl	$175, %r8d
	movq	%rax, %r9
.L81:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L55:
	movq	-1136(%rbp), %rdi
	movl	$285212672, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L56
	call	cudaGetErrorString@PLT
	movl	$178, %r8d
	movq	%rax, %r9
	jmp	.L81
.L56:
	movq	-1128(%rbp), %rdi
	movl	$285212672, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L57
	call	cudaGetErrorString@PLT
	movl	$179, %r8d
	movq	%rax, %r9
	jmp	.L81
.L57:
	call	cudaThreadSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L58
	call	cudaGetErrorString@PLT
	movl	$181, %r8d
	movq	%rax, %r9
	jmp	.L81
.L58:
	leaq	-1156(%rbp), %rdi
	call	cuDeviceGetCount@PLT
	testl	%eax, %eax
	je	.L59
	leaq	.LC11(%rip), %r9
	pushq	%rsi
	movl	$184, %r8d
	pushq	%rax
	jmp	.L82
.L59:
	cmpl	$0, -1156(%rbp)
	jne	.L60
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$-2, %eax
	jmp	.L43
.L60:
	xorl	%edx, %edx
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%esi, %esi
	leaq	-1160(%rbp), %rdi
	call	cuDeviceGet@PLT
	testl	%eax, %eax
	je	.L61
	leaq	.LC15(%rip), %r9
	pushq	%rcx
	movl	$192, %r8d
	pushq	%rax
	jmp	.L82
.L61:
	movl	-1160(%rbp), %esi
	leaq	-1120(%rbp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L62
	call	cudaGetErrorString@PLT
	movl	$193, %r8d
	movq	%rax, %r9
	jmp	.L81
.L62:
	movl	-1160(%rbp), %edx
	leaq	-88(%rbp), %rdi
	movl	$32, %esi
	movl	$10, %r14d
	call	cuDeviceGetName@PLT
	testl	%eax, %eax
	je	.L63
	pushq	%rdx
	leaq	.LC16(%rip), %r9
	movl	$194, %r8d
	pushq	%rax
.L82:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC12(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L63:
	movq	-1136(%rbp), %rdi
	call	_Z15runbench_warmupPs
	decl	%r14d
	jne	.L63
	xorl	%r15d, %r15d
	leaq	.LC17(%rip), %r14
.L64:
	cmpl	%r15d, %ebx
	jle	.L83
	movq	-1128(%rbp), %rcx
	movl	%r12d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdi
	movq	-1136(%rbp), %rdx
	movq	-1176(%rbp), %rsi
	incl	%r15d
	call	_Z8runbenchPdS_S_S_ii
	movsd	0(%r13), %xmm0
	movq	%r14, %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L64
.L83:
	call	cudaDeviceReset@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L66
	call	cudaGetErrorString@PLT
	movl	$208, %r8d
	movq	%rax, %r9
	jmp	.L81
.L66:
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L43:
	movq	-56(%rbp), %rdx
	subq	%fs:40, %rdx
	je	.L67
	call	__stack_chk_fail@PLT
.L67:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2033:
	.size	main, .-main
	.section	.rodata.str1.1
.LC19:
	.string	"_Z9benchmarkIdEvPT_S1_i"
.LC20:
	.string	"_Z9benchmarkIfEvPT_S1_i"
.LC21:
	.string	"_Z6warmupPs"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9benchmarkIdEvPT_S1_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9benchmarkIfEvPT_S1_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6warmupPs(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	0
	.long	1074790400
	.align 8
.LC3:
	.long	0
	.long	1083129856
	.align 8
.LC4:
	.long	0
	.long	1041235968
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

#define CUDA_SAFE_CALL( call) {                                    \
    hipError_t err = call;                                                    \
    if( hipSuccess != err) {                                                \
        fprintf(stderr, "Cuda error in file '%s' in line %i : %s.\n",        \
                __FILE__, __LINE__, hipGetErrorString( err) );              \
        exit(EXIT_FAILURE);                                                  \
    } }

#define DRIVER_API_CALL(apiFuncCall)                                           \
do {                                                                           \
    hipError_t _status = apiFuncCall;                                            \
    if (_status != hipSuccess) {                                             \
        fprintf(stderr, "%s:%d: error: function %s failed with error %d.\n",   \
                __FILE__, __LINE__, #apiFuncCall, _status);                    \
        exit(-1);                                                              \
    }                                                                          \
} while (0)

#define DATA_TYPE 0 // 0-SP, 1-DP

#define ALIGN_SIZE (8)
#define ALIGN_BUFFER(buffer, align)                                            \
  (((uintptr_t) (buffer) & ((align)-1)) ? ((buffer) + (align) - ((uintptr_t) (buffer) & ((align)-1))) : (buffer))

#define KERNEL_CALLS 1

#define COMP_ITERATIONS (1024)
#define THREADS (1024)
#define BLOCKS (32768)
#define STRIDE (64*1024)

#define REGBLOCK_SIZE (4)
#define UNROLL_ITERATIONS (32)

#define deviceNum (0)

//CODE
__global__ void warmup(short* cd){

	short r0 = 1.0,
	  r1 = r0+(short)(31),
	  r2 = r0+(short)(37),
	  r3 = r0+(short)(41);

	for(int j=0; j<COMP_ITERATIONS; j+=UNROLL_ITERATIONS){
		#pragma unroll
		for(int i=0; i<UNROLL_ITERATIONS; i++){
			// Each iteration maps to floating point 8 operations (4 multiplies + 4 additions)
			r0 = r0 * r0 + r1;//r0;
			r1 = r1 * r1 + r2;//r1;
			r2 = r2 * r2 + r3;//r2;
			r3 = r3 * r3 + r0;//r3;
		}
	}
	cd[blockIdx.x * 256 + threadIdx.x] = r0;
}

template <class T>
__global__ void benchmark( T* cdin,  T* cdout, int compute_iters){

	const long ite=blockIdx.x * THREADS + threadIdx.x;
	// const int ite = threadIdx.x+(BLOCKS-blockIdx.x)%BLOCKS*32+threadIdx.x/(int)32*32;
	T r0;
	// printf("(%d/%d) - %d\n", blockIdx.x,threadIdx.x,ite);
	for(int j=0; j<compute_iters; j+=UNROLL_ITERATIONS){
		#pragma unroll
		for(int i=0; i<UNROLL_ITERATIONS; i++){
			r0=cdin[ite+STRIDE*i];
			cdout[ite+STRIDE*i]=r0;
		}
	}

}

void initializeEvents(hipEvent_t *start, hipEvent_t *stop){
	CUDA_SAFE_CALL( hipEventCreate(start) );
	CUDA_SAFE_CALL( hipEventCreate(stop) );
	CUDA_SAFE_CALL( hipEventRecord(*start, 0) );
}

float finalizeEvents(hipEvent_t start, hipEvent_t stop){
	CUDA_SAFE_CALL( hipGetLastError() );
	CUDA_SAFE_CALL( hipEventRecord(stop, 0) );
	CUDA_SAFE_CALL( hipEventSynchronize(stop) );
	float kernel_time;
	CUDA_SAFE_CALL( hipEventElapsedTime(&kernel_time, start, stop) );
	CUDA_SAFE_CALL( hipEventDestroy(start) );
	CUDA_SAFE_CALL( hipEventDestroy(stop) );
	return kernel_time;
}

void runbench_warmup(short* cd){
	const int BLOCK_SIZE = 512;
	const int TOTAL_REDUCED_BLOCKS = 512;

	dim3 dimBlock(BLOCK_SIZE, 1, 1);
	dim3 dimReducedGrid(TOTAL_REDUCED_BLOCKS, 1, 1);

	warmup<<< dimReducedGrid, dimBlock >>>(cd);
	CUDA_SAFE_CALL( hipGetLastError() );
	CUDA_SAFE_CALL( hipDeviceSynchronize() );
}

void runbench(double* kernel_time, double* bandw,double* cdin,double* cdout,int L2size, int compute_iters){

	hipEvent_t start, stop;
    int type = DATA_TYPE;
    dim3 dimBlock(THREADS, 1, 1);
    dim3 dimGrid(BLOCKS, 1, 1);
	initializeEvents(&start, &stop);
	if (type==0){
		benchmark<float><<< dimGrid, dimBlock >>>((float*)cdin,(float*)cdout, compute_iters);
	}else{
		benchmark<double><<< dimGrid, dimBlock >>>(cdin,cdout, compute_iters);
	}

	long long shared_access = 2*(long long)(compute_iters)*THREADS*BLOCKS;

	hipDeviceSynchronize();

	double time = finalizeEvents(start, stop);
	double result;
	if (type==0)
		result = ((double)shared_access)*4/(double)time*1000./(double)(1024*1024*1024);
	else
		result = ((double)shared_access)*8/(double)time*1000./(double)(1024*1024*1024);

	*kernel_time = time;
	*bandw=result;

}

int main(int argc, char *argv[]){
    hipDevice_t device = 0;
    int deviceCount;
	char deviceName[32];

    int kernel_calls=KERNEL_CALLS, compute_iters=COMP_ITERATIONS;
    hipDeviceProp_t deviceProp;

    if (argc > 3 || argc == 2) {
        printf("\nError: Wrong number of arguments.\n\n");
        printf("Usage:\n\t %s [inner_iterations] [kernel_calls]\n\t %s\n", argv[0], argv[0]);

        return -1;
    }

    if (argc == 3) {
        kernel_calls = atoi(argv[2]);
        compute_iters = atoi(argv[1]);
    }

    printf("Number of kernel launches: %d\n", kernel_calls);
    printf("Number of compute iterations: %d\n", compute_iters);

	hipSetDevice(deviceNum);

	double time[kernel_calls][2],value[kernel_calls][4];
	int L2size;
	int size = (THREADS*BLOCKS+32*STRIDE)*sizeof(double);
	size_t freeCUDAMem, totalCUDAMem;
	hipMemGetInfo(&freeCUDAMem, &totalCUDAMem);
	printf("Total GPU memory %lu, free %lu\n", totalCUDAMem, freeCUDAMem);
	printf("Buffer size: %dMB\n", size*sizeof(double)/(1024*1024));

	//Initialize Global Memory
	double *cdin;
	double *cdout;
	// init = (int*)malloc(size);
	CUDA_SAFE_CALL(hipMalloc((void**)&cdin, size));
	CUDA_SAFE_CALL(hipMalloc((void**)&cdout, size));

	// Copy data to device memory
	CUDA_SAFE_CALL(hipMemset(cdin, 0, size));  // initialize to zeros
	CUDA_SAFE_CALL(hipMemset(cdout, 0, size));  // initialize to zeros
	// Synchronize in order to wait for memory operations to finish
	CUDA_SAFE_CALL(hipDeviceSynchronize());
	// make sure activity is enabled before any CUDA API

	DRIVER_API_CALL(hipGetDeviceCount(&deviceCount));
	if (deviceCount == 0) {
		printf("There is no device supporting CUDA.\n");
       return -2;
	}

	printf("CUDA Device Number: %d\n", deviceNum);

	DRIVER_API_CALL(hipDeviceGet(&device, deviceNum));
	CUDA_SAFE_CALL(hipGetDeviceProperties(&deviceProp, device));
	DRIVER_API_CALL(hipDeviceGetName(deviceName, 32, device));

	int i;
	class type;

	for (i=0;i<10;i++){
		runbench_warmup((short*)cdin);
	}

    for (i=0;i<kernel_calls;i++){
    	runbench(&time[0][0],&value[0][0],cdin,cdout,L2size,compute_iters);
    	printf("Registered time: %f ms\n",time[0][0]);
	}

    CUDA_SAFE_CALL( hipDeviceReset());
    printf("-----------------------------------------------------------------------\n");
	return 0;
}

	.text
	.file	"dram.hip"
	.globl	_Z21__device_stub__warmupPs     # -- Begin function _Z21__device_stub__warmupPs
	.type	_Z21__device_stub__warmupPs,@function
_Z21__device_stub__warmupPs:            # @_Z21__device_stub__warmupPs
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6warmupPs, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__warmupPs, .Lfunc_end0-_Z21__device_stub__warmupPs
	.cfi_endproc
                                        # -- End function
	.globl	_Z16initializeEventsPP11ihipEvent_tS1_ # -- Begin function _Z16initializeEventsPP11ihipEvent_tS1_
	.type	_Z16initializeEventsPP11ihipEvent_tS1_,@function
_Z16initializeEventsPP11ihipEvent_tS1_: # @_Z16initializeEventsPP11ihipEvent_tS1_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.3:
	movq	%r14, %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.5:
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$80, %ecx
	jmp	.LBB1_2
.LBB1_4:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$81, %ecx
	jmp	.LBB1_2
.LBB1_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$82, %ecx
.LBB1_2:
	movq	%rax, %r8
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z16initializeEventsPP11ihipEvent_tS1_, .Lfunc_end1-_Z16initializeEventsPP11ihipEvent_tS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14finalizeEventsP11ihipEvent_tS0_ # -- Begin function _Z14finalizeEventsP11ihipEvent_tS0_
	.type	_Z14finalizeEventsP11ihipEvent_tS0_,@function
_Z14finalizeEventsP11ihipEvent_tS0_:    # @_Z14finalizeEventsP11ihipEvent_tS0_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.3:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.5:
	movq	%rbx, %rdi
	callq	hipEventSynchronize
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.7:
	leaq	4(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.9:
	movq	%r14, %rdi
	callq	hipEventDestroy
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.11:
	movq	%rbx, %rdi
	callq	hipEventDestroy
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.13:
	movss	4(%rsp), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$86, %ecx
	jmp	.LBB2_2
.LBB2_4:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$87, %ecx
	jmp	.LBB2_2
.LBB2_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$88, %ecx
	jmp	.LBB2_2
.LBB2_8:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$90, %ecx
	jmp	.LBB2_2
.LBB2_10:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$91, %ecx
	jmp	.LBB2_2
.LBB2_12:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$92, %ecx
.LBB2_2:
	movq	%rax, %r8
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z14finalizeEventsP11ihipEvent_tS0_, .Lfunc_end2-_Z14finalizeEventsP11ihipEvent_tS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z15runbench_warmupPs           # -- Begin function _Z15runbench_warmupPs
	.type	_Z15runbench_warmupPs,@function
_Z15runbench_warmupPs:                  # @_Z15runbench_warmupPs
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movabsq	$4294967808, %rdi               # imm = 0x100000200
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_Z21__device_stub__warmupPs
.LBB3_2:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_3
# %bb.5:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB3_3:
	.cfi_def_cfa_offset 16
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$104, %ecx
	jmp	.LBB3_4
.LBB3_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$105, %ecx
.LBB3_4:
	movq	%rax, %r8
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z15runbench_warmupPs, .Lfunc_end3-_Z15runbench_warmupPs
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8runbenchPdS_S_S_ii
.LCPI4_0:
	.quad	0x4010000000000000              # double 4
.LCPI4_1:
	.quad	0x408f400000000000              # double 1000
.LCPI4_2:
	.quad	0x3e10000000000000              # double 9.3132257461547852E-10
	.text
	.globl	_Z8runbenchPdS_S_S_ii
	.type	_Z8runbenchPdS_S_S_ii,@function
_Z8runbenchPdS_S_S_ii:                  # @_Z8runbenchPdS_S_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebp
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %rbx
	movq	%rdi, %r14
	leaq	8(%rsp), %rdi
	movq	%rsp, %rsi
	callq	_Z16initializeEventsPP11ihipEvent_tS1_
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	leaq	31744(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movl	%ebp, %edx
	callq	_Z24__device_stub__benchmarkIfEvPT_S1_i
.LBB4_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z14finalizeEventsP11ihipEvent_tS0_
	movslq	%ebp, %rax
	shlq	$26, %rax
	cvtsi2sd	%rax, %xmm1
	mulsd	.LCPI4_0(%rip), %xmm1
	cvtss2sd	%xmm0, %xmm0
	divsd	%xmm0, %xmm1
	mulsd	.LCPI4_1(%rip), %xmm1
	mulsd	.LCPI4_2(%rip), %xmm1
	movsd	%xmm0, (%r14)
	movsd	%xmm1, (%rbx)
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z8runbenchPdS_S_S_ii, .Lfunc_end4-_Z8runbenchPdS_S_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z24__device_stub__benchmarkIfEvPT_S1_i,"axG",@progbits,_Z24__device_stub__benchmarkIfEvPT_S1_i,comdat
	.weak	_Z24__device_stub__benchmarkIfEvPT_S1_i # -- Begin function _Z24__device_stub__benchmarkIfEvPT_S1_i
	.type	_Z24__device_stub__benchmarkIfEvPT_S1_i,@function
_Z24__device_stub__benchmarkIfEvPT_S1_i: # @_Z24__device_stub__benchmarkIfEvPT_S1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9benchmarkIfEvPT_S1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z24__device_stub__benchmarkIfEvPT_S1_i, .Lfunc_end5-_Z24__device_stub__benchmarkIfEvPT_S1_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z24__device_stub__benchmarkIdEvPT_S1_i,"axG",@progbits,_Z24__device_stub__benchmarkIdEvPT_S1_i,comdat
	.weak	_Z24__device_stub__benchmarkIdEvPT_S1_i # -- Begin function _Z24__device_stub__benchmarkIdEvPT_S1_i
	.type	_Z24__device_stub__benchmarkIdEvPT_S1_i,@function
_Z24__device_stub__benchmarkIdEvPT_S1_i: # @_Z24__device_stub__benchmarkIdEvPT_S1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9benchmarkIdEvPT_S1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z24__device_stub__benchmarkIdEvPT_S1_i, .Lfunc_end6-_Z24__device_stub__benchmarkIdEvPT_S1_i
	.cfi_endproc
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$1560, %rsp                     # imm = 0x618
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movl	$0, -44(%rbp)
	cmpl	$3, %edi
	jg	.LBB7_2
# %bb.1:
	cmpl	$2, %edi
	je	.LBB7_2
# %bb.3:
	cmpl	$3, %edi
	jne	.LBB7_4
# %bb.5:
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %r14d
	jmp	.LBB7_6
.LBB7_2:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	(%r14), %rdx
	movl	$.L.str.3, %edi
	movq	%rdx, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %ebx
	jmp	.LBB7_34
.LBB7_4:
	movl	$1, %ebx
	movl	$1024, %r14d                    # imm = 0x400
.LBB7_6:
	movl	$.L.str.4, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.5, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	%rsp, -80(%rbp)                 # 8-byte Spill
	movl	%ebx, %eax
	movq	%rsp, %r15
	movq	%rax, %rcx
	shlq	$4, %rcx
	subq	%rcx, %r15
	movq	%r15, %rsp
	movq	%rsp, %r12
	shlq	$5, %rax
	subq	%rax, %r12
	movq	%r12, %rsp
	leaq	-88(%rbp), %rdi
	leaq	-96(%rbp), %r13
	movq	%r13, %rsi
	callq	hipMemGetInfo
	movq	(%r13), %rsi
	leaq	-88(%rbp), %rax
	movq	(%rax), %rdx
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.7, %edi
	movl	$2176, %esi                     # imm = 0x880
	xorl	%eax, %eax
	callq	printf
	leaq	-56(%rbp), %rdi
	movl	$285212672, %esi                # imm = 0x11000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_7
# %bb.9:
	leaq	-72(%rbp), %rdi
	movl	$285212672, %esi                # imm = 0x11000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_10
# %bb.11:
	movq	-56(%rbp), %rdi
	movl	$285212672, %edx                # imm = 0x11000000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB7_12
# %bb.13:
	movq	-72(%rbp), %rdi
	movl	$285212672, %edx                # imm = 0x11000000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB7_14
# %bb.15:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB7_16
# %bb.17:
	leaq	-60(%rbp), %rdi
	callq	hipGetDeviceCount
	testl	%eax, %eax
	jne	.LBB7_18
# %bb.20:
	cmpl	$0, -60(%rbp)
	je	.LBB7_21
# %bb.22:
	movl	$.L.str.11, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
	leaq	-44(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipDeviceGet
	testl	%eax, %eax
	jne	.LBB7_23
# %bb.24:
	movl	-44(%rbp), %esi
	leaq	-1600(%rbp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB7_25
# %bb.26:
	movl	-44(%rbp), %edx
	leaq	-128(%rbp), %rdi
	movl	$32, %esi
	callq	hipDeviceGetName
	testl	%eax, %eax
	jne	.LBB7_36
# %bb.27:                               # %.preheader71.preheader
	movl	$10, %r13d
.LBB7_28:                               # %.preheader71
                                        # =>This Inner Loop Header: Depth=1
	movq	-56(%rbp), %rdi
	callq	_Z15runbench_warmupPs
	decl	%r13d
	jne	.LBB7_28
# %bb.29:                               # %.preheader
	testl	%ebx, %ebx
	jle	.LBB7_31
.LBB7_30:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	-56(%rbp), %rdx
	movq	-72(%rbp), %rcx
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	%r14d, %r9d
	callq	_Z8runbenchPdS_S_S_ii
	movsd	(%r15), %xmm0                   # xmm0 = mem[0],zero
	movl	$.L.str.14, %edi
	movb	$1, %al
	callq	printf
	decl	%ebx
	jne	.LBB7_30
.LBB7_31:                               # %._crit_edge
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB7_35
# %bb.32:
	xorl	%ebx, %ebx
	movl	$.Lstr, %edi
	jmp	.LBB7_33
.LBB7_21:
	movl	$-2, %ebx
	movl	$.Lstr.1, %edi
.LBB7_33:
	callq	puts@PLT
	movq	-80(%rbp), %rsp                 # 8-byte Reload
.LBB7_34:
	movl	%ebx, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.LBB7_7:
	.cfi_def_cfa %rbp, 16
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$174, %ecx
	jmp	.LBB7_8
.LBB7_10:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$175, %ecx
	jmp	.LBB7_8
.LBB7_12:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$178, %ecx
	jmp	.LBB7_8
.LBB7_14:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$179, %ecx
	jmp	.LBB7_8
.LBB7_16:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$181, %ecx
	jmp	.LBB7_8
.LBB7_18:
	movq	stderr(%rip), %rdi
	movl	$.L.str.8, %esi
	movl	$.L.str.1, %edx
	movl	$.L.str.9, %r8d
	movl	$184, %ecx
	jmp	.LBB7_19
.LBB7_23:
	movq	stderr(%rip), %rdi
	movl	$.L.str.8, %esi
	movl	$.L.str.1, %edx
	movl	$.L.str.12, %r8d
	movl	$192, %ecx
	jmp	.LBB7_19
.LBB7_25:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$193, %ecx
	jmp	.LBB7_8
.LBB7_36:
	movq	stderr(%rip), %rdi
	movl	$.L.str.8, %esi
	movl	$.L.str.1, %edx
	movl	$.L.str.13, %r8d
	movl	$194, %ecx
.LBB7_19:
	movl	%eax, %r9d
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.LBB7_35:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$208, %ecx
.LBB7_8:
	movq	%rax, %r8
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6warmupPs, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9benchmarkIfEvPT_S1_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9benchmarkIdEvPT_S1_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6warmupPs,@object             # @_Z6warmupPs
	.section	.rodata,"a",@progbits
	.globl	_Z6warmupPs
	.p2align	3, 0x0
_Z6warmupPs:
	.quad	_Z21__device_stub__warmupPs
	.size	_Z6warmupPs, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Cuda error in file '%s' in line %i : %s.\n"
	.size	.L.str, 42

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/hpc-ulisboa/gpupowermodel/master/v2.0_TPDS2019/microbenchmarks/DRAM/dram.hip"
	.size	.L.str.1, 139

	.type	_Z9benchmarkIfEvPT_S1_i,@object # @_Z9benchmarkIfEvPT_S1_i
	.section	.rodata._Z9benchmarkIfEvPT_S1_i,"aG",@progbits,_Z9benchmarkIfEvPT_S1_i,comdat
	.weak	_Z9benchmarkIfEvPT_S1_i
	.p2align	3, 0x0
_Z9benchmarkIfEvPT_S1_i:
	.quad	_Z24__device_stub__benchmarkIfEvPT_S1_i
	.size	_Z9benchmarkIfEvPT_S1_i, 8

	.type	_Z9benchmarkIdEvPT_S1_i,@object # @_Z9benchmarkIdEvPT_S1_i
	.section	.rodata._Z9benchmarkIdEvPT_S1_i,"aG",@progbits,_Z9benchmarkIdEvPT_S1_i,comdat
	.weak	_Z9benchmarkIdEvPT_S1_i
	.p2align	3, 0x0
_Z9benchmarkIdEvPT_S1_i:
	.quad	_Z24__device_stub__benchmarkIdEvPT_S1_i
	.size	_Z9benchmarkIdEvPT_S1_i, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"Usage:\n\t %s [inner_iterations] [kernel_calls]\n\t %s\n"
	.size	.L.str.3, 52

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Number of kernel launches: %d\n"
	.size	.L.str.4, 31

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Number of compute iterations: %d\n"
	.size	.L.str.5, 34

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Total GPU memory %lu, free %lu\n"
	.size	.L.str.6, 32

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Buffer size: %dMB\n"
	.size	.L.str.7, 19

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%s:%d: error: function %s failed with error %d.\n"
	.size	.L.str.8, 49

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"hipGetDeviceCount(&deviceCount)"
	.size	.L.str.9, 32

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"CUDA Device Number: %d\n"
	.size	.L.str.11, 24

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"hipDeviceGet(&device, deviceNum)"
	.size	.L.str.12, 33

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"hipDeviceGetName(deviceName, 32, device)"
	.size	.L.str.13, 41

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Registered time: %f ms\n"
	.size	.L.str.14, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6warmupPs"
	.size	.L__unnamed_1, 12

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9benchmarkIfEvPT_S1_i"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9benchmarkIdEvPT_S1_i"
	.size	.L__unnamed_3, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"-----------------------------------------------------------------------"
	.size	.Lstr, 72

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"There is no device supporting CUDA."
	.size	.Lstr.1, 36

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\nError: Wrong number of arguments.\n"
	.size	.Lstr.2, 36

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__warmupPs
	.addrsig_sym _Z24__device_stub__benchmarkIfEvPT_S1_i
	.addrsig_sym _Z24__device_stub__benchmarkIdEvPT_S1_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6warmupPs
	.addrsig_sym _Z9benchmarkIfEvPT_S1_i
	.addrsig_sym _Z9benchmarkIdEvPT_S1_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6warmupPs             ; -- Begin function _Z6warmupPs
	.globl	_Z6warmupPs
	.p2align	8
	.type	_Z6warmupPs,@function
_Z6warmupPs:                            ; @_Z6warmupPs
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0xffff8b56
	v_lshl_add_u32 v0, s15, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 1, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b16 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6warmupPs
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6warmupPs, .Lfunc_end0-_Z6warmupPs
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 80
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z9benchmarkIfEvPT_S1_i,"axG",@progbits,_Z9benchmarkIfEvPT_S1_i,comdat
	.protected	_Z9benchmarkIfEvPT_S1_i ; -- Begin function _Z9benchmarkIfEvPT_S1_i
	.globl	_Z9benchmarkIfEvPT_S1_i
	.p2align	8
	.type	_Z9benchmarkIfEvPT_S1_i,@function
_Z9benchmarkIfEvPT_S1_i:                ; @_Z9benchmarkIfEvPT_S1_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.preheader.preheader
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshl_or_b32 v0, s15, 10, v0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x40000, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0x40000, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, 0x80000, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x80000, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0xc0000, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0xc0000, v2
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0x100000, v0
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v18, vcc_lo, 0x100000, v2
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v20, vcc_lo, 0x140000, v0
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v22, vcc_lo, 0x140000, v2
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v24, vcc_lo, 0x180000, v0
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v26, vcc_lo, 0x180000, v2
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v28, vcc_lo, 0x1c0000, v0
	v_add_co_ci_u32_e32 v29, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v30, vcc_lo, 0x1c0000, v2
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v32, vcc_lo, 0x200000, v0
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v34, vcc_lo, 0x200000, v2
	v_add_co_ci_u32_e32 v35, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v36, vcc_lo, 0x240000, v0
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v38, vcc_lo, 0x240000, v2
	v_add_co_ci_u32_e32 v39, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v40, vcc_lo, 0x280000, v0
	v_add_co_ci_u32_e32 v41, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v42, vcc_lo, 0x280000, v2
	v_add_co_ci_u32_e32 v43, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v44, vcc_lo, 0x2c0000, v0
	v_add_co_ci_u32_e32 v45, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v46, vcc_lo, 0x2c0000, v2
	v_add_co_ci_u32_e32 v47, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v48, vcc_lo, 0x300000, v0
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v50, vcc_lo, 0x300000, v2
	v_add_co_ci_u32_e32 v51, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v52, vcc_lo, 0x340000, v0
	v_add_co_ci_u32_e32 v53, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v54, vcc_lo, 0x340000, v2
	v_add_co_ci_u32_e32 v55, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v56, vcc_lo, 0x380000, v0
	v_add_co_ci_u32_e32 v57, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v58, vcc_lo, 0x380000, v2
	v_add_co_ci_u32_e32 v59, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v60, vcc_lo, 0x3c0000, v0
	v_add_co_ci_u32_e32 v61, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v62, vcc_lo, 0x3c0000, v2
	v_add_co_ci_u32_e32 v63, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v64, vcc_lo, 0x400000, v0
	v_add_co_ci_u32_e32 v65, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v66, vcc_lo, 0x400000, v2
	v_add_co_ci_u32_e32 v67, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v68, vcc_lo, 0x440000, v0
	v_add_co_ci_u32_e32 v69, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v70, vcc_lo, 0x440000, v2
	v_add_co_ci_u32_e32 v71, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v72, vcc_lo, 0x480000, v0
	v_add_co_ci_u32_e32 v73, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v74, vcc_lo, 0x480000, v2
	v_add_co_ci_u32_e32 v75, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v76, vcc_lo, 0x4c0000, v0
	v_add_co_ci_u32_e32 v77, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v78, vcc_lo, 0x4c0000, v2
	v_add_co_ci_u32_e32 v79, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v80, vcc_lo, 0x500000, v0
	v_add_co_ci_u32_e32 v81, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v82, vcc_lo, 0x500000, v2
	v_add_co_ci_u32_e32 v83, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v84, vcc_lo, 0x540000, v0
	v_add_co_ci_u32_e32 v85, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v86, vcc_lo, 0x540000, v2
	v_add_co_ci_u32_e32 v87, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v88, vcc_lo, 0x580000, v0
	v_add_co_ci_u32_e32 v89, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v90, vcc_lo, 0x580000, v2
	v_add_co_ci_u32_e32 v91, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v92, vcc_lo, 0x5c0000, v0
	v_add_co_ci_u32_e32 v93, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v94, vcc_lo, 0x5c0000, v2
	v_add_co_ci_u32_e32 v95, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v96, vcc_lo, 0x600000, v0
	v_add_co_ci_u32_e32 v97, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v98, vcc_lo, 0x600000, v2
	v_add_co_ci_u32_e32 v99, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v100, vcc_lo, 0x640000, v0
	v_add_co_ci_u32_e32 v101, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v102, vcc_lo, 0x640000, v2
	v_add_co_ci_u32_e32 v103, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v104, vcc_lo, 0x680000, v0
	v_add_co_ci_u32_e32 v105, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v106, vcc_lo, 0x680000, v2
	v_add_co_ci_u32_e32 v107, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v108, vcc_lo, 0x6c0000, v0
	v_add_co_ci_u32_e32 v109, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v110, vcc_lo, 0x6c0000, v2
	v_add_co_ci_u32_e32 v111, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v112, vcc_lo, 0x700000, v0
	v_add_co_ci_u32_e32 v113, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v114, vcc_lo, 0x700000, v2
	v_add_co_ci_u32_e32 v115, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v116, vcc_lo, 0x740000, v0
	v_add_co_ci_u32_e32 v117, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v118, vcc_lo, 0x740000, v2
	v_add_co_ci_u32_e32 v119, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v120, vcc_lo, 0x780000, v0
	v_add_co_ci_u32_e32 v121, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v122, vcc_lo, 0x780000, v2
	v_add_co_ci_u32_e32 v123, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v124, vcc_lo, 0x7c0000, v0
	v_add_co_ci_u32_e32 v125, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v126, vcc_lo, 0x7c0000, v2
	v_add_co_ci_u32_e32 v127, vcc_lo, 0, v3, vcc_lo
.LBB1_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v128, v[0:1], off
	s_add_i32 s0, s0, 32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s0, s2
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v128, off
	global_load_b32 v128, v[4:5], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v128, off
	global_load_b32 v128, v[8:9], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[10:11], v128, off
	global_load_b32 v128, v[12:13], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[14:15], v128, off
	global_load_b32 v128, v[16:17], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[18:19], v128, off
	global_load_b32 v128, v[20:21], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[22:23], v128, off
	global_load_b32 v128, v[24:25], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[26:27], v128, off
	global_load_b32 v128, v[28:29], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[30:31], v128, off
	global_load_b32 v128, v[32:33], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[34:35], v128, off
	global_load_b32 v128, v[36:37], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[38:39], v128, off
	global_load_b32 v128, v[40:41], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[42:43], v128, off
	global_load_b32 v128, v[44:45], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[46:47], v128, off
	global_load_b32 v128, v[48:49], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[50:51], v128, off
	global_load_b32 v128, v[52:53], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[54:55], v128, off
	global_load_b32 v128, v[56:57], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[58:59], v128, off
	global_load_b32 v128, v[60:61], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[62:63], v128, off
	global_load_b32 v128, v[64:65], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[66:67], v128, off
	global_load_b32 v128, v[68:69], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[70:71], v128, off
	global_load_b32 v128, v[72:73], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[74:75], v128, off
	global_load_b32 v128, v[76:77], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[78:79], v128, off
	global_load_b32 v128, v[80:81], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[82:83], v128, off
	global_load_b32 v128, v[84:85], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[86:87], v128, off
	global_load_b32 v128, v[88:89], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[90:91], v128, off
	global_load_b32 v128, v[92:93], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[94:95], v128, off
	global_load_b32 v128, v[96:97], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[98:99], v128, off
	global_load_b32 v128, v[100:101], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[102:103], v128, off
	global_load_b32 v128, v[104:105], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[106:107], v128, off
	global_load_b32 v128, v[108:109], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[110:111], v128, off
	global_load_b32 v128, v[112:113], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[114:115], v128, off
	global_load_b32 v128, v[116:117], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[118:119], v128, off
	global_load_b32 v128, v[120:121], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[122:123], v128, off
	global_load_b32 v128, v[124:125], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[126:127], v128, off
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9benchmarkIfEvPT_S1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 129
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z9benchmarkIfEvPT_S1_i,"axG",@progbits,_Z9benchmarkIfEvPT_S1_i,comdat
.Lfunc_end1:
	.size	_Z9benchmarkIfEvPT_S1_i, .Lfunc_end1-_Z9benchmarkIfEvPT_S1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1756
; NumSgprs: 18
; NumVgprs: 129
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 129
; Occupancy: 10
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z9benchmarkIdEvPT_S1_i,"axG",@progbits,_Z9benchmarkIdEvPT_S1_i,comdat
	.protected	_Z9benchmarkIdEvPT_S1_i ; -- Begin function _Z9benchmarkIdEvPT_S1_i
	.globl	_Z9benchmarkIdEvPT_S1_i
	.p2align	8
	.type	_Z9benchmarkIdEvPT_S1_i,@function
_Z9benchmarkIdEvPT_S1_i:                ; @_Z9benchmarkIdEvPT_S1_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB2_3
; %bb.1:                                ; %.preheader.preheader
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshl_or_b32 v0, s15, 10, v0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x80000, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0x80000, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, 0x100000, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x100000, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x180000, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x180000, v2
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0x200000, v0
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v18, vcc_lo, 0x200000, v2
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v20, vcc_lo, 0x280000, v0
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v22, vcc_lo, 0x280000, v2
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v24, vcc_lo, 0x300000, v0
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v26, vcc_lo, 0x300000, v2
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v28, vcc_lo, 0x380000, v0
	v_add_co_ci_u32_e32 v29, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v30, vcc_lo, 0x380000, v2
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v32, vcc_lo, 0x400000, v0
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v34, vcc_lo, 0x400000, v2
	v_add_co_ci_u32_e32 v35, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v36, vcc_lo, 0x480000, v0
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v38, vcc_lo, 0x480000, v2
	v_add_co_ci_u32_e32 v39, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v40, vcc_lo, 0x500000, v0
	v_add_co_ci_u32_e32 v41, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v42, vcc_lo, 0x500000, v2
	v_add_co_ci_u32_e32 v43, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v44, vcc_lo, 0x580000, v0
	v_add_co_ci_u32_e32 v45, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v46, vcc_lo, 0x580000, v2
	v_add_co_ci_u32_e32 v47, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v48, vcc_lo, 0x600000, v0
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v50, vcc_lo, 0x600000, v2
	v_add_co_ci_u32_e32 v51, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v52, vcc_lo, 0x680000, v0
	v_add_co_ci_u32_e32 v53, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v54, vcc_lo, 0x680000, v2
	v_add_co_ci_u32_e32 v55, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v56, vcc_lo, 0x700000, v0
	v_add_co_ci_u32_e32 v57, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v58, vcc_lo, 0x700000, v2
	v_add_co_ci_u32_e32 v59, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v60, vcc_lo, 0x780000, v0
	v_add_co_ci_u32_e32 v61, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v62, vcc_lo, 0x780000, v2
	v_add_co_ci_u32_e32 v63, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v64, vcc_lo, 0x800000, v0
	v_add_co_ci_u32_e32 v65, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v66, vcc_lo, 0x800000, v2
	v_add_co_ci_u32_e32 v67, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v68, vcc_lo, 0x880000, v0
	v_add_co_ci_u32_e32 v69, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v70, vcc_lo, 0x880000, v2
	v_add_co_ci_u32_e32 v71, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v72, vcc_lo, 0x900000, v0
	v_add_co_ci_u32_e32 v73, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v74, vcc_lo, 0x900000, v2
	v_add_co_ci_u32_e32 v75, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v76, vcc_lo, 0x980000, v0
	v_add_co_ci_u32_e32 v77, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v78, vcc_lo, 0x980000, v2
	v_add_co_ci_u32_e32 v79, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v80, vcc_lo, 0xa00000, v0
	v_add_co_ci_u32_e32 v81, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v82, vcc_lo, 0xa00000, v2
	v_add_co_ci_u32_e32 v83, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v84, vcc_lo, 0xa80000, v0
	v_add_co_ci_u32_e32 v85, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v86, vcc_lo, 0xa80000, v2
	v_add_co_ci_u32_e32 v87, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v88, vcc_lo, 0xb00000, v0
	v_add_co_ci_u32_e32 v89, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v90, vcc_lo, 0xb00000, v2
	v_add_co_ci_u32_e32 v91, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v92, vcc_lo, 0xb80000, v0
	v_add_co_ci_u32_e32 v93, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v94, vcc_lo, 0xb80000, v2
	v_add_co_ci_u32_e32 v95, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v96, vcc_lo, 0xc00000, v0
	v_add_co_ci_u32_e32 v97, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v98, vcc_lo, 0xc00000, v2
	v_add_co_ci_u32_e32 v99, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v100, vcc_lo, 0xc80000, v0
	v_add_co_ci_u32_e32 v101, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v102, vcc_lo, 0xc80000, v2
	v_add_co_ci_u32_e32 v103, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v104, vcc_lo, 0xd00000, v0
	v_add_co_ci_u32_e32 v105, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v106, vcc_lo, 0xd00000, v2
	v_add_co_ci_u32_e32 v107, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v108, vcc_lo, 0xd80000, v0
	v_add_co_ci_u32_e32 v109, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v110, vcc_lo, 0xd80000, v2
	v_add_co_ci_u32_e32 v111, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v112, vcc_lo, 0xe00000, v0
	v_add_co_ci_u32_e32 v113, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v114, vcc_lo, 0xe00000, v2
	v_add_co_ci_u32_e32 v115, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v116, vcc_lo, 0xe80000, v0
	v_add_co_ci_u32_e32 v117, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v118, vcc_lo, 0xe80000, v2
	v_add_co_ci_u32_e32 v119, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v120, vcc_lo, 0xf00000, v0
	v_add_co_ci_u32_e32 v121, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v122, vcc_lo, 0xf00000, v2
	v_add_co_ci_u32_e32 v123, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v124, vcc_lo, 0xf80000, v0
	v_add_co_ci_u32_e32 v125, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v126, vcc_lo, 0xf80000, v2
	v_add_co_ci_u32_e32 v127, vcc_lo, 0, v3, vcc_lo
.LBB2_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[128:129], v[0:1], off
	s_add_i32 s0, s0, 32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s0, s2
	s_waitcnt vmcnt(0)
	global_store_b64 v[2:3], v[128:129], off
	global_load_b64 v[128:129], v[4:5], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[6:7], v[128:129], off
	global_load_b64 v[128:129], v[8:9], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[10:11], v[128:129], off
	global_load_b64 v[128:129], v[12:13], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[14:15], v[128:129], off
	global_load_b64 v[128:129], v[16:17], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[18:19], v[128:129], off
	global_load_b64 v[128:129], v[20:21], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[22:23], v[128:129], off
	global_load_b64 v[128:129], v[24:25], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[26:27], v[128:129], off
	global_load_b64 v[128:129], v[28:29], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[30:31], v[128:129], off
	global_load_b64 v[128:129], v[32:33], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[34:35], v[128:129], off
	global_load_b64 v[128:129], v[36:37], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[38:39], v[128:129], off
	global_load_b64 v[128:129], v[40:41], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[42:43], v[128:129], off
	global_load_b64 v[128:129], v[44:45], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[46:47], v[128:129], off
	global_load_b64 v[128:129], v[48:49], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[50:51], v[128:129], off
	global_load_b64 v[128:129], v[52:53], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[54:55], v[128:129], off
	global_load_b64 v[128:129], v[56:57], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[58:59], v[128:129], off
	global_load_b64 v[128:129], v[60:61], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[62:63], v[128:129], off
	global_load_b64 v[128:129], v[64:65], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[66:67], v[128:129], off
	global_load_b64 v[128:129], v[68:69], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[70:71], v[128:129], off
	global_load_b64 v[128:129], v[72:73], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[74:75], v[128:129], off
	global_load_b64 v[128:129], v[76:77], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[78:79], v[128:129], off
	global_load_b64 v[128:129], v[80:81], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[82:83], v[128:129], off
	global_load_b64 v[128:129], v[84:85], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[86:87], v[128:129], off
	global_load_b64 v[128:129], v[88:89], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[90:91], v[128:129], off
	global_load_b64 v[128:129], v[92:93], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[94:95], v[128:129], off
	global_load_b64 v[128:129], v[96:97], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[98:99], v[128:129], off
	global_load_b64 v[128:129], v[100:101], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[102:103], v[128:129], off
	global_load_b64 v[128:129], v[104:105], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[106:107], v[128:129], off
	global_load_b64 v[128:129], v[108:109], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[110:111], v[128:129], off
	global_load_b64 v[128:129], v[112:113], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[114:115], v[128:129], off
	global_load_b64 v[128:129], v[116:117], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[118:119], v[128:129], off
	global_load_b64 v[128:129], v[120:121], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[122:123], v[128:129], off
	global_load_b64 v[128:129], v[124:125], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[126:127], v[128:129], off
	s_cbranch_scc1 .LBB2_2
.LBB2_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9benchmarkIdEvPT_S1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 130
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z9benchmarkIdEvPT_S1_i,"axG",@progbits,_Z9benchmarkIdEvPT_S1_i,comdat
.Lfunc_end2:
	.size	_Z9benchmarkIdEvPT_S1_i, .Lfunc_end2-_Z9benchmarkIdEvPT_S1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1756
; NumSgprs: 18
; NumVgprs: 130
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 130
; Occupancy: 10
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6warmupPs
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6warmupPs.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9benchmarkIfEvPT_S1_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9benchmarkIfEvPT_S1_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     129
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9benchmarkIdEvPT_S1_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9benchmarkIdEvPT_S1_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     130
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
