#include <stdio.h>
#include <math.h>
#include <stdlib.h>
#include <string.h>
#include <png.h>
#include <cufft.h>
#include <cuda_runtime.h>
#include <unistd.h>
#include <chrono>
#include <iomanip>

// Convention: Matrix dimension on the front, then input , output on the back
// Convention: Scalar arguments always at the very end
// Convention: All arrays are of size mxn

// When psf is created, it is normalized so a png image can be constructed. Hence this is to adjust back the psf
const int adjust_coefficient = 3;
// Number of iterations
const int num_iters = 12;
// Some constants for the algorithm
const float mu1 = 1e-6;
const float mu2 = 1e-5;
const float mu3 = 4e-5;
const float tau = 0.0001;

// Complex addition
static __device__ __host__ inline float2 ComplexAdd(float2 a, float2 b) {
    float2 c;
    c.x = a.x + b.x;
    c.y = a.y + b.y;
    return c;
}

// Complex addition
static __device__ __host__ inline float2 ComplexSub(float2 a, float2 b) {
    float2 c;
    c.x = a.x - b.x;
    c.y = a.y - b.y;
    return c;
}

// Complex scale
static __device__ __host__ inline float2 ComplexScale(float2 a, float s) {
    float2 c;
    c.x = s * a.x;
    c.y = s * a.y;
    return c;
}
  
// Complex multiplication
static __device__ __host__ inline float2 ComplexMul(float2 a, float2 b) {
    float2 c;
    c.x = a.x * b.x - a.y * b.y;
    c.y = a.x * b.y + a.y * b.x;
    return c;
}

// Complex maximum
static __device__ __host__ inline float2 ComplexSquareMax(float2 a, float2 b) {
    float2 num1;
    float2 num2;
    num1 = ComplexMul(a, a);
    num2 = ComplexMul(b, b);
    if (num1.x < num2.x)
    {
        return b;
    } else
    {
        return a;
    }
}

// Complex square root
static __device__ __host__ inline float ComplexAbs(float2 a) {
    float c;
    c = a.x * a.x + a.y * a.y;
    return sqrtf(c);
}

// Complex conjugate of a number
static __device__ __host__ inline float2 ComplexConj(float2 a) {
    float2 c;
    c.x = a.x;
    c.y = a.y * (-1.0f);
    return c;
}

// Complex conjugate of a number
static __device__ __host__ inline float thresholding(float a, float tau) {
    if (a > 0)
    {
        return fmaxf(a - tau, 0);
    } else
    {
        return 0.0f - fmaxf(0.0f - a - tau, 0);
    }
}

// Complex conjugate of a number
static __device__ __host__ inline float2 ComplexThres(float2 a, float tau) {
    float2 c;
    c.x = thresholding(a.x, tau);
    c.y = thresholding(a.y, tau);
    return c;
}

__global__
void copy_array(int m, int n, float* x, float* y)
{
    // y = x
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            y[i*n+j] = x[i*n+j];
        }
    }
}

__global__
void copy_array_complex(int m, int n, float2 *x, float2 *y)
{
    // y = x
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            y[i*n+j].x = x[i*n+j].x;
            y[i*n+j].y = x[i*n+j].y;
        }
    }
}

__global__
void copy_array_padded(int m, int n, float* x, float* y)
{
    // y is padded, while x is the original input
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index_x = i + (m / 2);
            y[(i+(m/2))*2*n+(j+(n/2))] = x[i*n+j];
        }
    }
}

__global__
void multiply_kernel(int m, int n, float2* x, float2* y, float scale)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            x[i*n+j] = ComplexScale(ComplexMul(x[i*n+j], y[i*n+j]), scale);
        }
    }
}

__global__
void matrix_minus(int m, int n, float2* x, float2* y)
{
    // x = x - y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            x[i*n+j] = ComplexSub(x[i*n+j], y[i*n+j]);
        }
    }
}

__global__
void matrix_scale(int m, int n, float2 *x, float k)
{
    // x = kx
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            x[i*n+j] = ComplexScale(x[i*n+j], k);
        }
    }
}

__global__
void matrix_pad(int m, int n, float2 *image, float2 *signal)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            signal[(i+(m/2))*2*n+(j+(n/2))].x = image[i*n+j].x;
            signal[(i+(m/2))*2*n+(j+(n/2))].y = image[i*n+j].y;
        }
    }
}

__global__
void circshift(int m, int n, float2 *x, float2 *y)
{
    // Put circshifted x into y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            if (i < (m/2))
            {
                if (j < (n/2))
                {
                    y[(i+(m-m/2))*n + (j+(n-n/2))] = x[i*n+j];
                } else
                {
                    y[(i+(m-m/2))*n + (j-(n/2))] = x[i*n+j];
                }
            } else
            {
                if (j < (n/2))
                {
                    y[(i-(m/2))*n + (j+(n-n/2))] = x[i*n+j];
                } else
                {
                    y[(i-(m/2))*n + (j-(n/2))] = x[i*n+j];
                }
            }
        }
    }
}

__global__
void circshift_reverse(int m, int n, float2 *x, float2 *y)
{
    // Put reverse circshifted x into y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            if (i < (m/2))
            {
                if (j < (n/2))
                {
                    y[i*n+j] = x[(i+(m-m/2))*n + (j+(n-n/2))];
                } else
                {
                    y[i*n+j] = x[(i+(m-m/2))*n + (j-(n/2))];
                }
            } else
            {
                if (j < (n/2))
                {
                    y[i*n+j] = x[(i-(m/2))*n + (j+(n-n/2))];
                } else
                {
                    y[i*n+j] = x[(i-(m/2))*n + (j-(n/2))];
                }
            }
        }
    }
}

__global__
void circshift_reverse_and_real(int m, int n, float2 *x, float2 *y)
{
    // Put reverse circshifted x into y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            if (i < (m/2))
            {
                if (j < (n/2))
                {
                    y[i*n+j].x = x[(i+(m-m/2))*n + (j+(n-n/2))].x;
                    y[i*n+j].y = 0;
                } else
                {
                    y[i*n+j].x = x[(i+(m-m/2))*n + (j-(n/2))].x;
                    y[i*n+j].y = 0;
                }
            } else
            {
                if (j < (n/2))
                {
                    y[i*n+j].x = x[(i-(m/2))*n + (j+(n-n/2))].x;
                    y[i*n+j].y = 0;
                } else
                {
                    y[i*n+j].x = x[(i-(m/2))*n + (j-(n/2))].x;
                    y[i*n+j].y = 0;
                }
            }
        }
    }
}

__global__
void reverse(int m, int n, float2* x, float2* y)
{
    // x = y reversed
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            // x[i*n+j] = y[(m*n-1)-(i*n+j)];
            x[i*n+j] = ComplexConj(y[i*n+j]);
        }
    }
}

__global__
void normalize(int m, int n, float2* x, float factor)
{
    // x = factor * x
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            // x[i*n+j] = y[(m*n-1)-(i*n+j)];
            x[i*n+j] = ComplexScale(x[i*n+j], factor);
        }
    }
}

__global__
void clear_padding_and_restore(int m, int n, float2 *x)
{
    // x = y reversed
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            if ((i < m / 4) || (i >= ((m + 1) * 3 / 4)) || (j < n / 4) || (j >= ((n + 1) * 3 / 4)))
            {
                x[i*n+j].x = 0.0f;
            } else
            {
                x[i*n+j].x = 4.0f * x[i*n+j].x;
            }
            x[i*n+j].y = 0.0f;
        }
    }
}

__global__
void compute_X_divmat(int m, int n, float *x)
{
    // x = y reversed
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            float denominator = mu1;
            if ((i >= m / 4) && (i < ((m + 1) * 3 / 4)) && (j >= n / 4) && (j < ((n + 1) * 3 / 4)))
            {
                denominator += 1.0f;
            }
            x[i*n+j] = 1.0f / denominator;
        }
    }
}

__global__
void compute_V_divmat(int m, int n, float2 *filter_shifted, float2 *psiTpsi, float2 *V_divmat)
{
    // x = y reversed
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            float MTM = mu1 * (ComplexAbs(ComplexMul(ComplexConj(filter_shifted[index]), filter_shifted[index])));
            float pTp = mu2 * ComplexAbs(psiTpsi[index]);
            V_divmat[index].x = 1.0f / (MTM + pTp + mu3);
            V_divmat[index].y = 0.0f;
        }
    }
}

__global__
void soft_thresh_specialized(int m, int n, float2 *x)
{
    // Here, we are soft-thresholding x.
    // X is actually an mxnx2 matrices. Each entry is two floating-point numbers
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            x[index].x = thresholding(x[index].x, tau);
            x[index].y = thresholding(x[index].y, tau);
        }
    }
}

__global__
void U_update(int m, int n, float2 *psi_V, float2 *eta, float2 *U)
{
    // Here, we are soft-thresholding x.
    // X is actually an mxnx2 matrices. Each entry is two floating-point numbers
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            U[index].x = psi_V[index].x + (eta[index].x / mu2);
            U[index].y = psi_V[index].y + (eta[index].y / mu2);
            U[index] = ComplexThres(U[index], tau / mu2);
        }
    }
}

__global__
void X_update(int m, int n, float *X_divmat, float2 *xi, float2 *V, float2 *b, float2 *X)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            X[index].x = X_divmat[index] * (xi[index].x + mu1 * V[index].x + b[index].x);
            X[index].y = 0.0f;
        }
    }
}

void V_update(cufftHandle plan, int m, int n, float2 *V_divmat, float2 *r_calc, float2 *draft1, float2 *draft2, float2 *V, dim3 numBlocks, dim3 threads)
{
    circshift<<<numBlocks, threads>>>(m, n, r_calc, draft1);
    cudaDeviceSynchronize();
    cufftExecC2C(plan, draft1, draft1, CUFFT_FORWARD);
    cudaDeviceSynchronize();
    // Possible Error: float too small
    multiply_kernel<<<numBlocks, threads>>>(m, n, draft1, V_divmat, 1.0f);
    cudaDeviceSynchronize();
    cufftExecC2C(plan, draft1, draft1, CUFFT_INVERSE);
    cudaDeviceSynchronize();
    normalize<<<numBlocks, threads>>>(m, n, draft1, (1.0f / (m * n)));
    cudaDeviceSynchronize();
    circshift_reverse_and_real<<<numBlocks, threads>>>(m, n, draft1, V);
    cudaDeviceSynchronize();
}

__global__
void W_update(int m, int n, float2 *rho, float2 *V, float2 *W)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            float curr = rho[index].x / mu3 + V[index].x;
            W[index].x = fmaxf(curr, 0.0f);
            W[index].y = 0.0f;
        }
    }
}

__global__
void Xi_update(int m, int n, float2 *draft1, float2 *X, float2 *xi)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            // draft1[index] = ComplexSub(draft1[index], X[index]);
            // draft1[index] = ComplexScale(draft1[index], mu1);
            draft1[index].x = mu1 * (draft1[index].x - X[index].x);
            xi[index].x = xi[index].x + draft1[index].x;
            xi[index].y = 0;
        }
    }
}

__global__
void Eta_update(int m, int n, float2 *psi_V, float2 *U, float2 *eta)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            eta[index].x = eta[index].x + mu2 * (psi_V[index].x - U[index].x);
            eta[index].y = eta[index].y + mu2 * (psi_V[index].y - U[index].y);
        }
    }
}

__global__
void Rho_update(int m, int n, float2 *V, float2 *W, float2 *rho)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            rho[index].x = rho[index].x + mu3 * (V[index].x - W[index].x);
            rho[index].y = 0.0f;
        }
    }
}

__global__
void r_calculation(int m, int n, float2 *r_calc, float2 *draft1, float2 *draft2)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            r_calc[index] = ComplexAdd(r_calc[index], ComplexAdd(draft1[index], draft2[index]));
        }
    }
}

__global__
void calc_psi_V(int m, int n, float2 *V, float2 *psi_V)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            float rowNext = i == 0 ? V[(m-1)*n+j].x : V[(i-1)*n+j].x;
            float colNext = j == 0 ? V[i*n+(n-1)].x : V[i*n+(j-1)].x;
            float curr = V[i*n+j].x;
            psi_V[i*n+j].x = rowNext - curr;
            psi_V[i*n+j].y = colNext - curr;
        }
    }
}

__global__
void psi_adjoint(int m, int n, float2 *draft2, float2 *draft1)
{
    // Store psi-adjoint-translated draft2 into draft1
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            float rowNext = i == (m-1) ? draft2[j].x : draft2[(i+1)*n+j].x;
            float colNext = j == (n-1) ? draft2[i*n].y : draft2[i*n+(j+1)].y;
            draft1[index].x = (rowNext - draft2[index].x) + (colNext - draft2[index].y);
            draft1[index].y = 0;
        }
    }
}

__global__
void matrix_dot_product(int m, int n, float2* x, float2* y)
{
    // y = x dot y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            y[index] = ComplexMul(x[index], y[index]);
        }
    }
}

__global__
void matrix_scale_and_minus(int m, int n, float2 *x, float2 *y, float k, float2 *draft)
{
    // x = kx - y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            draft[index].x = x[index].x;
            draft[index].y = x[index].y;
            draft[index] = ComplexSub(ComplexScale(draft[index], k), y[index]);
        }
    }
}

float** read_image(const char* name, int* info, png_bytep other)
{
    char header[8];
    png_structp png_ptr;
    png_infop info_ptr;
    int width, height;
    png_byte color_type;
    png_byte bit_depth;
    png_bytep *row_pointers;
    png_bytep *psf_row;

    FILE *fp = fopen(name, "rb");
    fread(header, 1, 8, fp);
    if (png_sig_cmp((png_const_bytep)header, 0, 8))
    {
        printf("That's not an png file\n");
        exit(0);
    }

    png_ptr = png_create_read_struct(PNG_LIBPNG_VER_STRING, NULL, NULL, NULL);
    info_ptr = png_create_info_struct(png_ptr);
    setjmp(png_jmpbuf(png_ptr));
    png_init_io(png_ptr, fp);
    png_set_sig_bytes(png_ptr, 8);
    png_read_info(png_ptr, info_ptr);
    width = png_get_image_width(png_ptr, info_ptr);
    height = png_get_image_height(png_ptr, info_ptr);
    info[0] = width;
    info[1] = height;
    color_type = png_get_color_type(png_ptr, info_ptr);
    bit_depth = png_get_bit_depth(png_ptr, info_ptr);
    other[0] = color_type;
    other[1] = bit_depth;
    printf("This image have width %d and height %d\n", width, height);
    row_pointers = (png_bytep*) malloc(sizeof(png_bytep) * height);
    float **ret_arr = (float**) malloc(sizeof(float*) * height);
    for (int i = 0; i < height; i++)
    {
        size_t num = png_get_rowbytes(png_ptr, info_ptr);
        row_pointers[i] = (png_bytep) malloc(num);
        ret_arr[i] = (float*) malloc(sizeof(float) * width);
    }
    png_read_image(png_ptr, row_pointers);
    for (int i = 0; i < height; i++)
    {
        for (int j = 0; j < width; j++)
        {
            ret_arr[i][j] = 0.0 + row_pointers[i][j];
        }
        free(row_pointers[i]);
    }
    free(row_pointers);
    fclose(fp);
    return ret_arr;
}

void write_image(const char *name, png_bytep *image, int width, int height, png_byte color_type, png_byte bit_depth)
{
    printf("Writing file %s...\n", name);
    FILE *fp = fopen(name, "wb");
    if (!fp)
    {
        printf("Can't even open file pointer\n");
        exit(0);
    }
    png_structp png_ptr = png_create_write_struct(PNG_LIBPNG_VER_STRING, NULL, NULL, NULL);
    png_infop info_ptr = png_create_info_struct(png_ptr);
    if (!png_ptr || !info_ptr)
    {
        printf("Stuck at pointer creation\n");
        exit(0);
    }
    setjmp(png_jmpbuf(png_ptr));
    png_init_io(png_ptr, fp);
    setjmp(png_jmpbuf(png_ptr));
    png_set_IHDR(png_ptr, info_ptr, width, height,
        bit_depth, color_type, PNG_INTERLACE_NONE,
        PNG_COMPRESSION_TYPE_BASE, PNG_FILTER_TYPE_BASE);
    png_write_info(png_ptr, info_ptr);
    if (setjmp(png_jmpbuf(png_ptr)))
    {
        printf("Error writing bytes\n");
        exit(0);
    }
    png_write_image(png_ptr, image);
    if (setjmp(png_jmpbuf(png_ptr)))
    {
        printf("Error during end of write\n");
        exit(0);
    }
    png_write_end(png_ptr, NULL);
    fclose(fp);
}

void write_test_result(int numTests, double *record, char *filename)
{
    printf("Creating %s.csv file\n",filename);
    FILE *fp;

    // printf("Creating filename\n");

    // filename = strcat(filename, ".csv");
    // filename = strcat("../test/CUDA_Result/", filename);

    printf("Creating file pointer\n");
    fp = fopen(filename,"w+");

    fprintf(fp,"Num_Iterations, Time(s)\n");

    printf("Starting to write actual file\n");

    for(int i = 0; i < numTests; i++)
    {
        fprintf(fp, "%d,%.10g\n", i+1, record[i]);
    }

    fclose(fp);

    printf("%s.csv file created\n",filename);
}

void copy_image(int m, int n, float **image, float **psf, float2 *signal, float2 *filter)
{
    for (int i = 0; i < m; i++)
    {
        for (int j = 0; j < n; j++)
        {
            signal[i*n+j].x = image[i][j];
            signal[i*n+j].y = 0.0f;
            filter[i*n+j].x = (psf[i][j] * 1.0f) / (1500 * adjust_coefficient * adjust_coefficient);
            filter[i*n+j].y = 0.0f;
        }
    }
}

void write_back_image_padded(int m, int n, png_bytep *new_image, float2 *signal)
{
    // The signal is padded in this case
    for (int i = 0; i < m; i++)
    {
        for (int j = 0; j < n; j++)
        {
            new_image[i][j] = (png_byte)fminf(fabsf(signal[(i+(m/2))*2*n+(j+(n/2))].x), 255.0);
            if ((i == m / 2) && (j < n / 2)) printf("%d ", new_image[i][j]);
        }
    }
}

void fourier(cufftHandle plan, int m, int n, float2 *signal, float2 *filter_shifted, dim3 numBlocks, dim3 threads)
{
    cufftExecC2C(plan, signal, signal, CUFFT_FORWARD);
    // cufftExecC2C(plan, filter_shifted, filter_shifted, CUFFT_FORWARD);
    cudaDeviceSynchronize();
    multiply_kernel<<<numBlocks, threads>>>(m, n, signal, filter_shifted, (1.0f / (m * n)));
    cudaDeviceSynchronize();
    cufftExecC2C(plan, signal, signal, CUFFT_INVERSE);
    // cufftExecC2C(plan, filter_shifted, filter_shifted, CUFFT_INVERSE);
    cudaDeviceSynchronize();
    // normalize<<<numBlocks, threads>>>(m, n, signal, (1.0f / (m * n)));
    // cudaDeviceSynchronize();
    // normalize<<<numBlocks, threads>>>(m, n, filter_shifted);
    // cudaDeviceSynchronize();
}

void printSlice(int m, int n, float2 *mat, int start, const char* title)
{
    printf("%s:\n", title);
    for (int i = start; i < start + 8; i++)
    {
        for (int j = start; j < start + 8; j++)
        {
            float curr = mat[i*n+j].x;
            printf("%6.3f ", curr);
        }
        printf("\n");
    }
}

void printSliceReal(int m, int n, float *mat, int start, const char* title)
{
    printf("%s:\n", title);
    for (int i = start - 4; i < start + 4; i++)
    {
        for (int j = start - 4; j < start + 4; j++)
        {
            printf("%6.3f ", mat[i*n+j]);
        }
        printf("\n");
    }
}

void printSliceScientific(int m, int n, float2 *mat, int start, const char* title)
{
    printf("%s:\n", title);
    for (int i = start; i < start + 8; i++)
    {
        for (int j = start; j < start + 8; j++)
        {
            float curr = mat[i*n+j].x;
            printf("%6.3e ", curr);
        }
        printf("\n");
    }
}

void load_and_pad(int *image_info, int *psf_info, png_bytep other1, png_bytep other2, float2 **pad_signal, float2 **pad_filter)
{
    float **image;
    float **psf;
    png_bytep *new_image;
    image = read_image("../image/cameraman.png", image_info, other1);
    psf = read_image("../psf/psf_gaussian_3.png", psf_info, other2);
    int width = image_info[0];
    int height = image_info[1];
    int pad_height = 2 * height;
    int pad_width = 2 * width;
    int pad_size = pad_height * pad_width * sizeof(float2);
    float2 *signal, *filter, *filter_shifted;
    int size = image_info[0] * image_info[1] * sizeof(float2);
    // The signal (image)
    cudaMallocManaged(reinterpret_cast<void **>(&signal), size);
    // The filter (psf)
    cudaMallocManaged(reinterpret_cast<void **>(&filter), size);
    // Shifted psf
    cudaMallocManaged(reinterpret_cast<void **>(&filter_shifted), size);
    cudaMallocManaged(reinterpret_cast<void **>(pad_signal), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(pad_filter), pad_size);
    cudaDeviceSynchronize();
    cudaMemset(reinterpret_cast<void **>(pad_signal), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(pad_filter), 0, pad_size);
    cudaDeviceSynchronize();
    // Copy the image over, do the conversion from real to complex at the same time
    copy_image(image_info[1], image_info[0], image, psf, signal, filter);
    cudaDeviceSynchronize();
    dim3 threads(16, 16);
    dim3 numBlocks(image_info[1] / 16, image_info[0] / 16);
    circshift<<<numBlocks, threads>>>(image_info[1], image_info[0], filter, filter_shifted);
    cudaDeviceSynchronize();
    // Create cufft plan
    cufftHandle plan;
    cufftPlan2d(&plan, image_info[0], image_info[1], CUFFT_C2C);
    // Pre-transform the two filters
    cufftExecC2C(plan, filter_shifted, filter_shifted, CUFFT_FORWARD);
    // Now blur the image
    fourier(plan, image_info[1], image_info[0], signal, filter_shifted, numBlocks, threads);
    matrix_pad<<<numBlocks, threads>>>(height, width, signal, *pad_signal);
    cudaDeviceSynchronize();
    matrix_pad<<<numBlocks, threads>>>(height, width, filter, *pad_filter);
    cudaDeviceSynchronize();
    // printSlice(pad_height, pad_width, *pad_signal, height / 2, "pad_signal_original");
    cudaFree(signal);
    cudaFree(filter);
    cudaFree(filter_shifted);
    cufftDestroy(plan);
}

double* run_admm_image(int numIters)
{
    png_bytep *new_image;
    // Variables used in algorithm
    float2 *X, *U, *V, *W, *xi, *eta, *rho;
    // Intermediate or draft matrices
    float2 *r_calc, *draft1, *draft2;
    // Images and filters
    float2 *pad_signal, *pad_filter, *filter_shifted, *filter_reversed;
    printf("Start to load image\n");
    int *image_info, *psf_info;
    png_bytep other1, other2;
    image_info = (int*) malloc(2 * sizeof(int));
    psf_info = (int*) malloc(2 * sizeof(int));
    other1 = (png_bytep) malloc(2 * sizeof(png_byte));
    other2 = (png_bytep) malloc(2 * sizeof(png_byte));
    load_and_pad(image_info, psf_info, other1, other2, &pad_signal, &pad_filter);
    int size = image_info[0] * image_info[1] * sizeof(float2);
    int width = image_info[0];
    int height = image_info[1];
    int m = height;
    int n = width;
    int pad_height = 2 * height;
    int pad_width = 2 * width;
    int pad_size = pad_height * pad_width * sizeof(float2);
    printf("Finished loading images\n");
    // printSlice(pad_height, pad_width, pad_signal, height / 2, "pad_signal_original");
    printf("Started Allocation\n");
    printf("One array is of size %d\n", pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&X), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&U), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&V), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&W), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&xi), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&eta), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&rho), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&r_calc), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&draft1), pad_size);
    cudaMallocManaged(reinterpret_cast<void **>(&draft2), pad_size);
    // Shifted psf
    cudaMallocManaged(reinterpret_cast<void **>(&filter_shifted), pad_size);
    // Used for fourier adjoint
    cudaMallocManaged(reinterpret_cast<void **>(&filter_reversed), pad_size);
    cudaDeviceSynchronize();
    printf("Finished Allocation\n");
    cudaMemset(reinterpret_cast<void **>(&X), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(&U), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(&V), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(&W), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(&xi), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(&eta), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(&rho), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(&r_calc), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(&draft1), 0, pad_size);
    cudaMemset(reinterpret_cast<void **>(&draft2), 0, pad_size);
    cudaDeviceSynchronize();
    printf("Finished setting memory\n");
    dim3 threads(16, 16);
    dim3 numBlocks(pad_height / 16, pad_width / 16);
    circshift<<<numBlocks, threads>>>(pad_height, pad_width, pad_filter, filter_shifted);
    cudaDeviceSynchronize();
    reverse<<<numBlocks, threads>>>(pad_height, pad_width, filter_reversed, filter_shifted);
    cudaDeviceSynchronize();
    printf("Transformation matrices ready\n");
    // Create cufft plan
    cufftHandle plan;
    cufftPlan2d(&plan, pad_height, pad_width, CUFFT_C2C);
    // Pre-transform the two filters
    cufftExecC2C(plan, filter_shifted, filter_shifted, CUFFT_FORWARD);
    cufftExecC2C(plan, filter_reversed, filter_reversed, CUFFT_FORWARD);
    // Copy the image back
    new_image = (png_bytep*) malloc(image_info[1] * sizeof(png_bytep));
    for (int i = 0; i < image_info[1]; i++) new_image[i] = (png_bytep) malloc(image_info[0] * sizeof(png_byte));
    write_back_image_padded(image_info[1], image_info[0], new_image, pad_signal);
    cudaDeviceSynchronize();
    write_image("../test/blurred/blurred3.png", new_image, image_info[0], image_info[1], other1[0], other1[1]);
    float *X_divmat;
    float2 *psiTpsi, *psi_V, *V_divmat;
    cudaMallocManaged(reinterpret_cast<void **>(&X_divmat), pad_height * pad_width * sizeof(float));
    cudaMallocManaged(reinterpret_cast<void **>(&V_divmat), pad_height * pad_width * sizeof(float2));
    cudaMallocManaged(reinterpret_cast<void **>(&psiTpsi), pad_height * pad_width * sizeof(float2));
    cudaMallocManaged(reinterpret_cast<void **>(&psi_V), pad_height * pad_width * sizeof(float2));
    cudaDeviceSynchronize();
    // Now, first we calculate the X_divmat
    compute_X_divmat<<<numBlocks, threads>>>(pad_height, pad_width, X_divmat);
    cudaDeviceSynchronize();
    // printSliceReal(pad_height, pad_width, X_divmat, height / 2, "X_divmat");
    cudaMemset(reinterpret_cast<void **>(&psiTpsi), 0, pad_size);
    cudaDeviceSynchronize();
    // Below is the construction of the psiTpsi matrix. Move to a function later
    psiTpsi[0].x = 4.0f;
    psiTpsi[1].x = -1.0f;
    psiTpsi[pad_width - 1].x = -1.0f;
    psiTpsi[pad_width].x = -1.0f;
    psiTpsi[(pad_height - 1) * pad_width].x = -1.0f;
    cufftExecC2C(plan, psiTpsi, psiTpsi, CUFFT_FORWARD);
    cudaDeviceSynchronize();
    // Now we move on to the V_divmat calculation. There is a lot of element wise calculation, hence
    // It can be done in terms of a kernel function. The filter is pre-shifted
    compute_V_divmat<<<numBlocks, threads>>>(pad_height, pad_width, filter_shifted, psiTpsi, V_divmat);
    cudaDeviceSynchronize();
    // printSlice(pad_height, pad_width, V_divmat, height / 2, "V_divmat");
    double *record = (double *) malloc(numIters * sizeof(double));
    auto runStart = std::chrono::system_clock::now();
    // ADMM iterations starts here
    for (int i = 0; i < numIters; i++)
    {
        // printf("Iteration %d\n", i);
        // U-update
        // Here, as we just calculated psi_V, there is no need to calculate that again
        U_update<<<numBlocks, threads>>>(pad_height, pad_width, psi_V, eta, U);
        cudaDeviceSynchronize();
        // printSlice(pad_height, pad_width, U, height / 2, "U");
        // X-update
        copy_array_complex<<<numBlocks, threads>>>(pad_height, pad_width, V, draft1);
        cudaDeviceSynchronize();
        fourier(plan, pad_height, pad_width, draft1, filter_shifted, numBlocks, threads);
        X_update<<<numBlocks, threads>>>(pad_height, pad_width, X_divmat, xi, draft1, pad_signal, X);
        cudaDeviceSynchronize();
        // printSlice(pad_height, pad_width, pad_signal, height / 2, "pad_signal");
        // printSlice(pad_height, pad_width, X, height / 2, "X");
        // R-calculation
        matrix_scale_and_minus<<<numBlocks, threads>>>(pad_height, pad_width, W, rho, mu3, r_calc);
        cudaDeviceSynchronize();
        matrix_scale_and_minus<<<numBlocks, threads>>>(pad_height, pad_width, U, eta, mu2, draft2);
        cudaDeviceSynchronize();
        psi_adjoint<<<numBlocks, threads>>>(pad_height, pad_width, draft2, draft1);
        cudaDeviceSynchronize();
        matrix_scale_and_minus<<<numBlocks, threads>>>(pad_height, pad_width, X, xi, mu1, draft2);
        cudaDeviceSynchronize();
        fourier(plan, pad_height, pad_width, draft2, filter_reversed, numBlocks, threads);
        r_calculation<<<numBlocks, threads>>>(pad_height, pad_width, r_calc, draft1, draft2);
        cudaDeviceSynchronize();
        // printSlice(pad_height, pad_width, r_calc, height / 2, "r_calc");
        // V-update
        V_update(plan, pad_height, pad_width, V_divmat, r_calc, draft1, draft2, V, numBlocks, threads);
        // printSlice(pad_height, pad_width, V, height / 2, "V");
        // W-update
        W_update<<<numBlocks, threads>>>(pad_height, pad_width, rho, V, W);
        cudaDeviceSynchronize();
        // printSlice(pad_height, pad_width, W, height, "W");
        // Xi-update
        copy_array_complex<<<numBlocks, threads>>>(pad_height, pad_width, V, draft1);
        cudaDeviceSynchronize();
        fourier(plan, pad_height, pad_width, draft1, filter_shifted, numBlocks, threads);
        Xi_update<<<numBlocks, threads>>>(pad_height, pad_width, draft1, X, xi);
        cudaDeviceSynchronize();
        // printSliceScientific(pad_height, pad_width, xi, height, "xi");
        // Eta-update
        calc_psi_V<<<numBlocks, threads>>>(pad_height, pad_width, V, psi_V);
        cudaDeviceSynchronize();
        Eta_update<<<numBlocks, threads>>>(pad_height, pad_width, psi_V, U, eta);
        cudaDeviceSynchronize();
        // printSliceScientific(pad_height, pad_width, eta, height, "eta");
        // Rho-update
        Rho_update<<<numBlocks, threads>>>(pad_height, pad_width, V, W, rho);
        cudaDeviceSynchronize();
        // printSliceScientific(pad_height, pad_width, rho, height, "rho");
        auto currEnd = std::chrono::system_clock::now();
        std::chrono::duration<double> currDuration = currEnd - runStart;
        record[i] = currDuration.count();
    }
    write_back_image_padded(image_info[1], image_info[0], new_image, V);
    cudaDeviceSynchronize();
    write_image("../test/recovered/ADMM_recovered3.png", new_image, image_info[0], image_info[1], other1[0], other1[1]);
    cudaFree(X);
    cudaFree(U);
    cudaFree(V);
    cudaFree(W);
    cudaFree(xi);
    cudaFree(eta);
    cudaFree(rho);
    cudaFree(r_calc);
    cudaFree(draft1);
    cudaFree(draft2);
    cudaFree(pad_signal);
    cudaFree(pad_filter);
    cudaFree(X_divmat);
    cudaFree(V_divmat);
    cudaFree(psiTpsi);
    cudaFree(psi_V);
    free(image_info);
    free(psf_info);
    free(other1);
    free(other2);
    free(new_image);
    cufftDestroy(plan);
    return record;
}

// Padding needed: psf, blurred image, image of all ones

int main(void)
{
    int numTests = 200;
    double *record = run_admm_image(numTests);
    // for (int i = 0; i < numTests; i++)
    // {
    //     printf("Test %d\n", i + 1);
    //     record[i] = run_ista_image(i+1);
    // }
    char *filename = "../test/CUDA_Result/ADMM_0_200_single.csv";
    write_test_result(numTests, record, filename);
    free(record);
}
	.file	"tmpxft_00241589_00000000-6_ADMM.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4078:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4078:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB4841:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE4841:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"rb"
.LC1:
	.string	"That's not an png file\n"
.LC2:
	.string	"1.6.43"
.LC3:
	.string	"This image have width %d and height %d\n"
	.text
	.globl	_Z10read_imagePKcPiPh
	.type	_Z10read_imagePKcPiPh, @function
_Z10read_imagePKcPiPh:
.LFB4060:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rsi, 32(%rsp)
	leaq	.LC0(%rip), %rsi
	leaq	48(%rsp), %rbx
	movq	%rdx, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	movl	$1, %edx
	movl	$8, %esi
	movq	%rbx, %rdi
	movq	%rax, %r8
	movl	$8, %ecx
	movq	%rax, 24(%rsp)
	call	__fread_chk@PLT
	xorl	%esi, %esi
	movl	$8, %edx
	movq	%rbx, %rdi
	call	png_sig_cmp@PLT
	testl	%eax, %eax
	je	.L4
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L4:
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	leaq	.LC2(%rip), %rdi
	xorl	%esi, %esi
	call	png_create_read_struct@PLT
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	png_create_info_struct@PLT
	movq	8(%rsp), %rdi
	movl	$200, %edx
	movq	__longjmp_chk@GOTPCREL(%rip), %rsi
	movq	%rax, 16(%rsp)
	call	png_set_longjmp_fn@PLT
	movq	%rax, %rdi
	call	_setjmp@PLT
	endbr64
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	xorl	%r14d, %r14d
	call	png_init_io@PLT
	movq	8(%rsp), %rdi
	movl	$8, %esi
	call	png_set_sig_bytes@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	png_read_info@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	png_get_image_width@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movslq	%eax, %r15
	call	png_get_image_height@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movq	%r15, %r12
	movslq	%eax, %r13
	movq	32(%rsp), %rax
	movq	%r13, %rbx
	movl	%r15d, (%rax)
	movl	%r13d, 4(%rax)
	call	png_get_color_type@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	%eax, %ebp
	call	png_get_bit_depth@PLT
	movq	40(%rsp), %rcx
	movl	%r15d, %edx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	salq	$2, %r15
	movb	%bpl, (%rcx)
	movb	%al, 1(%rcx)
	movl	%r13d, %ecx
	xorl	%eax, %eax
	salq	$3, %r13
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rax, %r13
.L6:
	cmpl	%r14d, %ebx
	jle	.L16
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	png_get_rowbytes@PLT
	movq	%rax, %rdi
	call	malloc@PLT
	movq	%r15, %rdi
	movq	%rax, 0(%rbp,%r14,8)
	call	malloc@PLT
	movq	%rax, 0(%r13,%r14,8)
	incq	%r14
	jmp	.L6
.L16:
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	xorl	%r14d, %r14d
	call	png_read_image@PLT
.L8:
	cmpl	%r14d, %ebx
	jle	.L10
	movq	0(%rbp,%r14,8), %rdi
	xorl	%eax, %eax
.L11:
	cmpl	%eax, %r12d
	jle	.L17
	movzbl	(%rdi,%rax), %ecx
	movq	0(%r13,%r14,8), %rdx
	cvtsi2ssl	%ecx, %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L11
.L17:
	call	free@PLT
	incq	%r14
	jmp	.L8
.L10:
	movq	%rbp, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	fclose@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%r13, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4060:
	.size	_Z10read_imagePKcPiPh, .-_Z10read_imagePKcPiPh
	.section	.rodata.str1.1
.LC4:
	.string	"Writing file %s...\n"
.LC5:
	.string	"wb"
.LC6:
	.string	"Can't even open file pointer\n"
.LC7:
	.string	"Stuck at pointer creation\n"
.LC8:
	.string	"Error writing bytes\n"
.LC9:
	.string	"Error during end of write\n"
	.text
	.globl	_Z11write_imagePKcPPhiihh
	.type	_Z11write_imagePKcPPhiihh, @function
_Z11write_imagePKcPPhiihh:
.LFB4061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%eax, %eax
	movq	%rdi, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	movq	%rsi, 24(%rsp)
	leaq	.LC4(%rip), %rsi
	movl	%edx, 32(%rsp)
	movq	%rdi, %rdx
	movl	$2, %edi
	movl	%ecx, 36(%rsp)
	movl	%r8d, 40(%rsp)
	movl	%r9d, 44(%rsp)
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rbx, %rdi
	call	fopen@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movq	%rax, 8(%rsp)
	testq	%rax, %rax
	je	.L27
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	leaq	.LC2(%rip), %rdi
	xorl	%esi, %esi
	call	png_create_write_struct@PLT
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	png_create_info_struct@PLT
	cmpq	$0, (%rsp)
	movq	%rax, 16(%rsp)
	je	.L25
	testq	%rax, %rax
	jne	.L20
.L25:
	leaq	.LC7(%rip), %rsi
.L28:
	movl	$2, %edi
	xorl	%eax, %eax
.L27:
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L20:
	movq	(%rsp), %rdi
	movq	__longjmp_chk@GOTPCREL(%rip), %rsi
	movl	$200, %edx
	call	png_set_longjmp_fn@PLT
	movq	%rax, %rdi
	call	_setjmp@PLT
	endbr64
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	png_init_io@PLT
	movq	(%rsp), %rdi
	movl	$200, %edx
	movq	__longjmp_chk@GOTPCREL(%rip), %rsi
	call	png_set_longjmp_fn@PLT
	movq	%rax, %rdi
	call	_setjmp@PLT
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 72
	pushq	$0
	.cfi_def_cfa_offset 80
	pushq	$0
	.cfi_def_cfa_offset 88
	pushq	$0
	.cfi_def_cfa_offset 96
	movzbl	72(%rsp), %r9d
	movzbl	76(%rsp), %r8d
	movl	68(%rsp), %ecx
	movl	64(%rsp), %edx
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	png_set_IHDR@PLT
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 64
	call	png_write_info@PLT
	movq	(%rsp), %rdi
	movl	$200, %edx
	movq	__longjmp_chk@GOTPCREL(%rip), %rsi
	call	png_set_longjmp_fn@PLT
	movq	%rax, %rdi
	call	_setjmp@PLT
	endbr64
	leaq	.LC8(%rip), %rsi
	testl	%eax, %eax
	jne	.L28
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdi
	call	png_write_image@PLT
	movq	(%rsp), %rdi
	movl	$200, %edx
	movq	__longjmp_chk@GOTPCREL(%rip), %rsi
	call	png_set_longjmp_fn@PLT
	movq	%rax, %rdi
	call	_setjmp@PLT
	endbr64
	leaq	.LC9(%rip), %rsi
	testl	%eax, %eax
	jne	.L28
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	call	png_write_end@PLT
	movq	8(%rsp), %rdi
	call	fclose@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4061:
	.size	_Z11write_imagePKcPPhiihh, .-_Z11write_imagePKcPPhiihh
	.section	.rodata.str1.1
.LC10:
	.string	"Creating %s.csv file\n"
.LC11:
	.string	"Creating file pointer\n"
.LC12:
	.string	"w+"
.LC13:
	.string	"Num_Iterations, Time(s)\n"
.LC14:
	.string	"Starting to write actual file\n"
.LC15:
	.string	"%d,%.10g\n"
.LC16:
	.string	"%s.csv file created\n"
	.text
	.globl	_Z17write_test_resultiPdPc
	.type	_Z17write_test_resultiPdPc, @function
_Z17write_test_resultiPdPc:
.LFB4062:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	leaq	.LC15(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	leaq	.LC10(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edi, %r13d
	movl	$2, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	pushq	%r8
	.cfi_def_cfa_offset 64
	call	__printf_chk@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %rsi
	movq	%rbx, %rdi
	call	fopen@PLT
	leaq	.LC13(%rip), %rdx
	movl	$2, %esi
	movq	%rax, %rdi
	movq	%rax, %rbp
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L30:
	cmpl	%r12d, %r13d
	jle	.L33
	movsd	(%r14,%r12,8), %xmm0
	leal	1(%r12), %ecx
	movq	%r15, %rdx
	movb	$1, %al
	movl	$2, %esi
	movq	%rbp, %rdi
	incq	%r12
	call	__fprintf_chk@PLT
	jmp	.L30
.L33:
	movq	%rbp, %rdi
	call	fclose@PLT
	popq	%rcx
	.cfi_def_cfa_offset 56
	movq	%rbx, %rdx
	leaq	.LC16(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE4062:
	.size	_Z17write_test_resultiPdPc, .-_Z17write_test_resultiPdPc
	.globl	_Z10copy_imageiiPPfS0_P6float2S2_
	.type	_Z10copy_imageiiPPfS0_P6float2S2_, @function
_Z10copy_imageiiPPfS0_P6float2S2_:
.LFB4063:
	.cfi_startproc
	endbr64
	movss	.LC18(%rip), %xmm1
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edi, %r10d
	movq	%rdx, %r11
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	xorl	%edi, %edi
	movq	%rcx, %rbx
	xorl	%ecx, %ecx
.L35:
	cmpl	%ecx, %r10d
	jle	.L34
	movslq	%edi, %rax
	xorl	%edx, %edx
	salq	$3, %rax
.L38:
	cmpl	%edx, %esi
	jle	.L40
	movq	(%r11,%rcx,8), %rbp
	movss	0(%rbp,%rdx,4), %xmm0
	movq	(%rbx,%rcx,8), %rbp
	movl	$0x00000000, 4(%r8,%rax)
	movss	%xmm0, (%r8,%rax)
	movss	0(%rbp,%rdx,4), %xmm0
	incq	%rdx
	movl	$0x00000000, 4(%r9,%rax)
	divss	%xmm1, %xmm0
	movss	%xmm0, (%r9,%rax)
	addq	$8, %rax
	jmp	.L38
.L40:
	incq	%rcx
	addl	%esi, %edi
	jmp	.L35
.L34:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4063:
	.size	_Z10copy_imageiiPPfS0_P6float2S2_, .-_Z10copy_imageiiPPfS0_P6float2S2_
	.section	.rodata.str1.1
.LC21:
	.string	"%d "
	.text
	.globl	_Z23write_back_image_paddediiPPhP6float2
	.type	_Z23write_back_image_paddediiPPhP6float2, @function
_Z23write_back_image_paddediiPPhP6float2:
.LFB4064:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	sarl	%eax
	leal	(%rsi,%rsi), %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	%eax, 4(%rsp)
	movl	%esi, %eax
	sarl	%eax
	movl	%edi, 16(%rsp)
	movl	%eax, 8(%rsp)
	movl	4(%rsp), %eax
	movq	%rcx, 24(%rsp)
	imull	%r14d, %eax
	movl	%eax, 12(%rsp)
.L42:
	cmpl	%r13d, 16(%rsp)
	jle	.L41
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rdx
	cmpl	%r13d, 4(%rsp)
	movq	24(%rsp), %rdi
	sete	23(%rsp)
	addq	%rdx, %rax
	xorl	%ebp, %ebp
	leaq	(%rdi,%rax,8), %r15
.L46:
	cmpl	%ebp, %ebx
	jle	.L54
	movss	(%r15,%rbp,8), %xmm0
	movss	.LC20(%rip), %xmm1
	andps	.LC19(%rip), %xmm0
	call	fminf@PLT
	movq	(%r12,%r13,8), %rax
	cvttss2sil	%xmm0, %edx
	movb	%dl, (%rax,%rbp)
	cmpl	%ebp, 8(%rsp)
	jle	.L43
	cmpb	$0, 23(%rsp)
	je	.L43
	movq	(%r12,%r13,8), %rax
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	movzbl	(%rax,%rbp), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L43:
	incq	%rbp
	jmp	.L46
.L54:
	addl	%r14d, 12(%rsp)
	incq	%r13
	jmp	.L42
.L41:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4064:
	.size	_Z23write_back_image_paddediiPPhP6float2, .-_Z23write_back_image_paddediiPPhP6float2
	.section	.rodata.str1.1
.LC22:
	.string	"%s:\n"
.LC23:
	.string	"%6.3f "
.LC24:
	.string	"\n"
	.text
	.globl	_Z10printSliceiiP6float2iPKc
	.type	_Z10printSliceiiP6float2iPKc, @function
_Z10printSliceiiP6float2iPKc:
.LFB4066:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	movq	%r8, %rdx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	leaq	.LC22(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	movl	%ebx, %r13d
	leal	7(%rbx), %r15d
	movl	%ebx, %r14d
	imull	%ebp, %r13d
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
.L56:
	movslq	%r13d, %rax
	movslq	%ebx, %rdx
	leaq	(%r12,%rax,8), %rcx
.L59:
	cmpl	%edx, %r15d
	jl	.L61
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%rcx,%rdx,8), %xmm0
	leaq	.LC23(%rip), %rsi
	movq	%rcx, 8(%rsp)
	movq	%rdx, (%rsp)
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
	incq	%rdx
	jmp	.L59
.L61:
	leaq	.LC24(%rip), %rsi
	xorl	%eax, %eax
	incl	%r14d
	addl	%ebp, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	%r15d, %r14d
	jle	.L56
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4066:
	.size	_Z10printSliceiiP6float2iPKc, .-_Z10printSliceiiP6float2iPKc
	.globl	_Z14printSliceRealiiPfiPKc
	.type	_Z14printSliceRealiiPfiPKc, @function
_Z14printSliceRealiiPfiPKc:
.LFB4067:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	movq	%r8, %rdx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leal	-4(%rbp), %r14d
	movl	%esi, %ebx
	leaq	.LC22(%rip), %rsi
	movl	%r14d, %r13d
	movl	%r14d, %r15d
	imull	%ebx, %r13d
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	call	__printf_chk@PLT
.L63:
	leal	3(%rbp), %ecx
	cmpl	%r15d, %ecx
	jl	.L62
	movslq	%r13d, %rax
	movslq	%r14d, %rdx
	leaq	(%r12,%rax,4), %r8
.L66:
	cmpl	%edx, %ecx
	jl	.L68
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movl	%ecx, 28(%rsp)
	cvtss2sd	(%r8,%rdx,4), %xmm0
	movq	%r8, 16(%rsp)
	movq	%rdx, 8(%rsp)
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	movl	28(%rsp), %ecx
	movq	16(%rsp), %r8
	incq	%rdx
	jmp	.L66
.L68:
	leaq	.LC24(%rip), %rsi
	xorl	%eax, %eax
	incl	%r15d
	addl	%ebx, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L63
.L62:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4067:
	.size	_Z14printSliceRealiiPfiPKc, .-_Z14printSliceRealiiPfiPKc
	.section	.rodata.str1.1
.LC25:
	.string	"%6.3e "
	.text
	.globl	_Z20printSliceScientificiiP6float2iPKc
	.type	_Z20printSliceScientificiiP6float2iPKc, @function
_Z20printSliceScientificiiP6float2iPKc:
.LFB4068:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	movq	%r8, %rdx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	leaq	.LC22(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	movl	%ebx, %r13d
	leal	7(%rbx), %r15d
	movl	%ebx, %r14d
	imull	%ebp, %r13d
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
.L70:
	movslq	%r13d, %rax
	movslq	%ebx, %rdx
	leaq	(%r12,%rax,8), %rcx
.L73:
	cmpl	%edx, %r15d
	jl	.L75
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%rcx,%rdx,8), %xmm0
	leaq	.LC25(%rip), %rsi
	movq	%rcx, 8(%rsp)
	movq	%rdx, (%rsp)
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
	incq	%rdx
	jmp	.L73
.L75:
	leaq	.LC24(%rip), %rsi
	xorl	%eax, %eax
	incl	%r14d
	addl	%ebp, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	%r15d, %r14d
	jle	.L70
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4068:
	.size	_Z20printSliceScientificiiP6float2iPKc, .-_Z20printSliceScientificiiP6float2iPKc
	.globl	_Z34__device_stub__Z10copy_arrayiiPfS_iiPfS_
	.type	_Z34__device_stub__Z10copy_arrayiiPfS_iiPfS_, @function
_Z34__device_stub__Z10copy_arrayiiPfS_iiPfS_:
.LFB4100:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L76
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10copy_arrayiiPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L76:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L78
	call	__stack_chk_fail@PLT
.L78:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4100:
	.size	_Z34__device_stub__Z10copy_arrayiiPfS_iiPfS_, .-_Z34__device_stub__Z10copy_arrayiiPfS_iiPfS_
	.globl	_Z10copy_arrayiiPfS_
	.type	_Z10copy_arrayiiPfS_, @function
_Z10copy_arrayiiPfS_:
.LFB4101:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10copy_arrayiiPfS_iiPfS_
	.cfi_endproc
.LFE4101:
	.size	_Z10copy_arrayiiPfS_, .-_Z10copy_arrayiiPfS_
	.globl	_Z49__device_stub__Z18copy_array_complexiiP6float2S0_iiP6float2S0_
	.type	_Z49__device_stub__Z18copy_array_complexiiP6float2S0_iiP6float2S0_, @function
_Z49__device_stub__Z18copy_array_complexiiP6float2S0_iiP6float2S0_:
.LFB4102:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L81
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18copy_array_complexiiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L81:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L83
	call	__stack_chk_fail@PLT
.L83:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4102:
	.size	_Z49__device_stub__Z18copy_array_complexiiP6float2S0_iiP6float2S0_, .-_Z49__device_stub__Z18copy_array_complexiiP6float2S0_iiP6float2S0_
	.globl	_Z18copy_array_complexiiP6float2S0_
	.type	_Z18copy_array_complexiiP6float2S0_, @function
_Z18copy_array_complexiiP6float2S0_:
.LFB4103:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z18copy_array_complexiiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4103:
	.size	_Z18copy_array_complexiiP6float2S0_, .-_Z18copy_array_complexiiP6float2S0_
	.globl	_Z41__device_stub__Z17copy_array_paddediiPfS_iiPfS_
	.type	_Z41__device_stub__Z17copy_array_paddediiPfS_iiPfS_, @function
_Z41__device_stub__Z17copy_array_paddediiPfS_iiPfS_:
.LFB4104:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17copy_array_paddediiPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L86:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L88
	call	__stack_chk_fail@PLT
.L88:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4104:
	.size	_Z41__device_stub__Z17copy_array_paddediiPfS_iiPfS_, .-_Z41__device_stub__Z17copy_array_paddediiPfS_iiPfS_
	.globl	_Z17copy_array_paddediiPfS_
	.type	_Z17copy_array_paddediiPfS_, @function
_Z17copy_array_paddediiPfS_:
.LFB4105:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z17copy_array_paddediiPfS_iiPfS_
	.cfi_endproc
.LFE4105:
	.size	_Z17copy_array_paddediiPfS_, .-_Z17copy_array_paddediiPfS_
	.globl	_Z47__device_stub__Z15multiply_kerneliiP6float2S0_fiiP6float2S0_f
	.type	_Z47__device_stub__Z15multiply_kerneliiP6float2S0_fiiP6float2S0_f, @function
_Z47__device_stub__Z15multiply_kerneliiP6float2S0_fiiP6float2S0_f:
.LFB4106:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L91
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15multiply_kerneliiP6float2S0_f(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L91:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L93
	call	__stack_chk_fail@PLT
.L93:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4106:
	.size	_Z47__device_stub__Z15multiply_kerneliiP6float2S0_fiiP6float2S0_f, .-_Z47__device_stub__Z15multiply_kerneliiP6float2S0_fiiP6float2S0_f
	.globl	_Z15multiply_kerneliiP6float2S0_f
	.type	_Z15multiply_kerneliiP6float2S0_f, @function
_Z15multiply_kerneliiP6float2S0_f:
.LFB4107:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z15multiply_kerneliiP6float2S0_fiiP6float2S0_f
	.cfi_endproc
.LFE4107:
	.size	_Z15multiply_kerneliiP6float2S0_f, .-_Z15multiply_kerneliiP6float2S0_f
	.globl	_Z7fourieriiiP6float2S0_4dim3S1_
	.type	_Z7fourieriiiP6float2S0_4dim3S1_, @function
_Z7fourieriiiP6float2S0_4dim3S1_:
.LFB4065:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	orl	$-1, %ecx
	movq	%rbx, %rdx
	movq	%rbx, %rsi
	call	cufftExecC2C@PLT
	call	cudaDeviceSynchronize@PLT
	movl	72(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L97
	movl	%r12d, %eax
	movq	%r14, %rcx
	movq	%rbx, %rdx
	movl	%r13d, %esi
	imull	%r13d, %eax
	movss	.LC26(%rip), %xmm0
	movl	%r12d, %edi
	cvtsi2ssl	%eax, %xmm1
	divss	%xmm1, %xmm0
	call	_Z47__device_stub__Z15multiply_kerneliiP6float2S0_fiiP6float2S0_f
.L97:
	call	cudaDeviceSynchronize@PLT
	movq	%rbx, %rdx
	movq	%rbx, %rsi
	movl	%ebp, %edi
	movl	$1, %ecx
	call	cufftExecC2C@PLT
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE4065:
	.size	_Z7fourieriiiP6float2S0_4dim3S1_, .-_Z7fourieriiiP6float2S0_4dim3S1_
	.globl	_Z43__device_stub__Z12matrix_minusiiP6float2S0_iiP6float2S0_
	.type	_Z43__device_stub__Z12matrix_minusiiP6float2S0_iiP6float2S0_, @function
_Z43__device_stub__Z12matrix_minusiiP6float2S0_iiP6float2S0_:
.LFB4108:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L99
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12matrix_minusiiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L99:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L101
	call	__stack_chk_fail@PLT
.L101:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4108:
	.size	_Z43__device_stub__Z12matrix_minusiiP6float2S0_iiP6float2S0_, .-_Z43__device_stub__Z12matrix_minusiiP6float2S0_iiP6float2S0_
	.globl	_Z12matrix_minusiiP6float2S0_
	.type	_Z12matrix_minusiiP6float2S0_, @function
_Z12matrix_minusiiP6float2S0_:
.LFB4109:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z12matrix_minusiiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4109:
	.size	_Z12matrix_minusiiP6float2S0_, .-_Z12matrix_minusiiP6float2S0_
	.globl	_Z41__device_stub__Z12matrix_scaleiiP6float2fiiP6float2f
	.type	_Z41__device_stub__Z12matrix_scaleiiP6float2fiiP6float2f, @function
_Z41__device_stub__Z12matrix_scaleiiP6float2fiiP6float2f:
.LFB4110:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L104
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12matrix_scaleiiP6float2f(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L104:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L106
	call	__stack_chk_fail@PLT
.L106:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4110:
	.size	_Z41__device_stub__Z12matrix_scaleiiP6float2fiiP6float2f, .-_Z41__device_stub__Z12matrix_scaleiiP6float2fiiP6float2f
	.globl	_Z12matrix_scaleiiP6float2f
	.type	_Z12matrix_scaleiiP6float2f, @function
_Z12matrix_scaleiiP6float2f:
.LFB4111:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z12matrix_scaleiiP6float2fiiP6float2f
	.cfi_endproc
.LFE4111:
	.size	_Z12matrix_scaleiiP6float2f, .-_Z12matrix_scaleiiP6float2f
	.globl	_Z41__device_stub__Z10matrix_padiiP6float2S0_iiP6float2S0_
	.type	_Z41__device_stub__Z10matrix_padiiP6float2S0_iiP6float2S0_, @function
_Z41__device_stub__Z10matrix_padiiP6float2S0_iiP6float2S0_:
.LFB4112:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L109
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10matrix_padiiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L109:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L111
	call	__stack_chk_fail@PLT
.L111:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4112:
	.size	_Z41__device_stub__Z10matrix_padiiP6float2S0_iiP6float2S0_, .-_Z41__device_stub__Z10matrix_padiiP6float2S0_iiP6float2S0_
	.globl	_Z10matrix_padiiP6float2S0_
	.type	_Z10matrix_padiiP6float2S0_, @function
_Z10matrix_padiiP6float2S0_:
.LFB4113:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z10matrix_padiiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4113:
	.size	_Z10matrix_padiiP6float2S0_, .-_Z10matrix_padiiP6float2S0_
	.globl	_Z39__device_stub__Z9circshiftiiP6float2S0_iiP6float2S0_
	.type	_Z39__device_stub__Z9circshiftiiP6float2S0_iiP6float2S0_, @function
_Z39__device_stub__Z9circshiftiiP6float2S0_iiP6float2S0_:
.LFB4114:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L114
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9circshiftiiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L114:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L116
	call	__stack_chk_fail@PLT
.L116:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4114:
	.size	_Z39__device_stub__Z9circshiftiiP6float2S0_iiP6float2S0_, .-_Z39__device_stub__Z9circshiftiiP6float2S0_iiP6float2S0_
	.globl	_Z9circshiftiiP6float2S0_
	.type	_Z9circshiftiiP6float2S0_, @function
_Z9circshiftiiP6float2S0_:
.LFB4115:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z9circshiftiiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4115:
	.size	_Z9circshiftiiP6float2S0_, .-_Z9circshiftiiP6float2S0_
	.section	.rodata.str1.1
.LC27:
	.string	"../image/cameraman.png"
.LC28:
	.string	"../psf/psf_gaussian_3.png"
	.text
	.globl	_Z12load_and_padPiS_PhS0_PP6float2S3_
	.type	_Z12load_and_padPiS_PhS0_PP6float2S3_, @function
_Z12load_and_padPiS_PhS0_PP6float2S3_:
.LFB4069:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r9, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	movq	%rdi, %rsi
	leaq	.LC27(%rip), %rdi
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	_Z10read_imagePKcPiPh
	movq	%r13, %rdx
	movq	%rbx, %rsi
	leaq	.LC28(%rip), %rdi
	movq	%rax, 8(%rsp)
	call	_Z10read_imagePKcPiPh
	movl	(%r15), %r14d
	movl	4(%r15), %r13d
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movq	%rax, 24(%rsp)
	movl	%r14d, %r8d
	imull	%r13d, %r8d
	leal	0(,%r8,8), %ebx
	movl	%r8d, 20(%rsp)
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	movq	%rbx, %rsi
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	movq	%rbx, %rsi
	leaq	56(%rsp), %rdi
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	movl	20(%rsp), %r8d
	movl	$1, %edx
	movq	%r12, %rdi
	sall	$5, %r8d
	movslq	%r8d, %rbx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	cudaMallocManaged@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%esi, %esi
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemset@PLT
	xorl	%esi, %esi
	movq	%rbx, %rdx
	movq	%rbp, %rdi
	call	cudaMemset@PLT
	call	cudaDeviceSynchronize@PLT
	movl	4(%r15), %edi
	movq	48(%rsp), %r9
	movq	40(%rsp), %r8
	movq	24(%rsp), %rcx
	movq	8(%rsp), %rdx
	movl	(%r15), %esi
	call	_Z10copy_imageiiPPfS0_P6float2S2_
	call	cudaDeviceSynchronize@PLT
	movl	(%r15), %eax
	movl	$16, %esi
	xorl	%r9d, %r9d
	movabsq	$68719476752, %rdi
	xorl	%r8d, %r8d
	movl	$1, 72(%rsp)
	cltd
	movq	%rdi, 64(%rsp)
	idivl	%esi
	movl	$1, 84(%rsp)
	movl	%eax, %ecx
	movl	4(%r15), %eax
	movl	%ecx, 80(%rsp)
	movl	$1, %ecx
	cltd
	idivl	%esi
	movq	%rdi, %rdx
	movl	$1, %esi
	movl	%eax, 76(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L120
	movl	4(%r15), %edi
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movl	(%r15), %esi
	call	_Z39__device_stub__Z9circshiftiiP6float2S0_iiP6float2S0_
.L120:
	call	cudaDeviceSynchronize@PLT
	movl	4(%r15), %edx
	movl	(%r15), %esi
	leaq	36(%rsp), %rdi
	movl	$41, %ecx
	call	cufftPlan2d@PLT
	movq	56(%rsp), %rsi
	movl	36(%rsp), %edi
	orl	$-1, %ecx
	movq	%rsi, %rdx
	call	cufftExecC2C@PLT
	subq	$32, %rsp
	.cfi_def_cfa_offset 192
	movl	4(%r15), %esi
	movq	96(%rsp), %rax
	movq	88(%rsp), %r8
	movq	72(%rsp), %rcx
	movl	68(%rsp), %edi
	movq	%rax, 16(%rsp)
	movl	104(%rsp), %eax
	movl	%eax, 24(%rsp)
	movq	108(%rsp), %rax
	movq	%rax, (%rsp)
	movl	116(%rsp), %eax
	movl	%eax, 8(%rsp)
	movl	(%r15), %edx
	call	_Z7fourieriiiP6float2S0_4dim3S1_
	movl	104(%rsp), %ecx
	movl	116(%rsp), %esi
	xorl	%r9d, %r9d
	movq	96(%rsp), %rdx
	movq	108(%rsp), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 160
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L121
	movq	(%r12), %rcx
	movq	40(%rsp), %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z41__device_stub__Z10matrix_padiiP6float2S0_iiP6float2S0_
.L121:
	call	cudaDeviceSynchronize@PLT
	movl	72(%rsp), %ecx
	movl	84(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	76(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L122
	movq	0(%rbp), %rcx
	movq	48(%rsp), %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z41__device_stub__Z10matrix_padiiP6float2S0_iiP6float2S0_
.L122:
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	36(%rsp), %edi
	call	cufftDestroy@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L123
	call	__stack_chk_fail@PLT
.L123:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4069:
	.size	_Z12load_and_padPiS_PhS0_PP6float2S3_, .-_Z12load_and_padPiS_PhS0_PP6float2S3_
	.globl	_Z48__device_stub__Z17circshift_reverseiiP6float2S0_iiP6float2S0_
	.type	_Z48__device_stub__Z17circshift_reverseiiP6float2S0_iiP6float2S0_, @function
_Z48__device_stub__Z17circshift_reverseiiP6float2S0_iiP6float2S0_:
.LFB4116:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L125
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17circshift_reverseiiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L125:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L127
	call	__stack_chk_fail@PLT
.L127:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4116:
	.size	_Z48__device_stub__Z17circshift_reverseiiP6float2S0_iiP6float2S0_, .-_Z48__device_stub__Z17circshift_reverseiiP6float2S0_iiP6float2S0_
	.globl	_Z17circshift_reverseiiP6float2S0_
	.type	_Z17circshift_reverseiiP6float2S0_, @function
_Z17circshift_reverseiiP6float2S0_:
.LFB4117:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z17circshift_reverseiiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4117:
	.size	_Z17circshift_reverseiiP6float2S0_, .-_Z17circshift_reverseiiP6float2S0_
	.globl	_Z57__device_stub__Z26circshift_reverse_and_realiiP6float2S0_iiP6float2S0_
	.type	_Z57__device_stub__Z26circshift_reverse_and_realiiP6float2S0_iiP6float2S0_, @function
_Z57__device_stub__Z26circshift_reverse_and_realiiP6float2S0_iiP6float2S0_:
.LFB4118:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L130
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z26circshift_reverse_and_realiiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L130:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L132
	call	__stack_chk_fail@PLT
.L132:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4118:
	.size	_Z57__device_stub__Z26circshift_reverse_and_realiiP6float2S0_iiP6float2S0_, .-_Z57__device_stub__Z26circshift_reverse_and_realiiP6float2S0_iiP6float2S0_
	.globl	_Z26circshift_reverse_and_realiiP6float2S0_
	.type	_Z26circshift_reverse_and_realiiP6float2S0_, @function
_Z26circshift_reverse_and_realiiP6float2S0_:
.LFB4119:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z26circshift_reverse_and_realiiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4119:
	.size	_Z26circshift_reverse_and_realiiP6float2S0_, .-_Z26circshift_reverse_and_realiiP6float2S0_
	.globl	_Z37__device_stub__Z7reverseiiP6float2S0_iiP6float2S0_
	.type	_Z37__device_stub__Z7reverseiiP6float2S0_iiP6float2S0_, @function
_Z37__device_stub__Z7reverseiiP6float2S0_iiP6float2S0_:
.LFB4120:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L135
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reverseiiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L135:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L137
	call	__stack_chk_fail@PLT
.L137:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4120:
	.size	_Z37__device_stub__Z7reverseiiP6float2S0_iiP6float2S0_, .-_Z37__device_stub__Z7reverseiiP6float2S0_iiP6float2S0_
	.globl	_Z7reverseiiP6float2S0_
	.type	_Z7reverseiiP6float2S0_, @function
_Z7reverseiiP6float2S0_:
.LFB4121:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z7reverseiiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4121:
	.size	_Z7reverseiiP6float2S0_, .-_Z7reverseiiP6float2S0_
	.globl	_Z37__device_stub__Z9normalizeiiP6float2fiiP6float2f
	.type	_Z37__device_stub__Z9normalizeiiP6float2fiiP6float2f, @function
_Z37__device_stub__Z9normalizeiiP6float2fiiP6float2f:
.LFB4122:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L140
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9normalizeiiP6float2f(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L140:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L142
	call	__stack_chk_fail@PLT
.L142:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4122:
	.size	_Z37__device_stub__Z9normalizeiiP6float2fiiP6float2f, .-_Z37__device_stub__Z9normalizeiiP6float2fiiP6float2f
	.globl	_Z9normalizeiiP6float2f
	.type	_Z9normalizeiiP6float2f, @function
_Z9normalizeiiP6float2f:
.LFB4123:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z9normalizeiiP6float2fiiP6float2f
	.cfi_endproc
.LFE4123:
	.size	_Z9normalizeiiP6float2f, .-_Z9normalizeiiP6float2f
	.globl	_Z8V_updateiiiP6float2S0_S0_S0_S0_4dim3S1_
	.type	_Z8V_updateiiiP6float2S0_S0_S0_S0_4dim3S1_, @function
_Z8V_updateiiiP6float2S0_S0_S0_S0_4dim3S1_:
.LFB4059:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	120(%rsp), %ecx
	movq	112(%rsp), %rdx
	movq	%r9, 8(%rsp)
	xorl	%r9d, %r9d
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	movq	88(%rsp), %r15
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L146
	movq	8(%rsp), %rcx
	movq	%r14, %rdx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z39__device_stub__Z9circshiftiiP6float2S0_iiP6float2S0_
.L146:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdx
	orl	$-1, %ecx
	movl	%r12d, %edi
	movq	%rdx, %rsi
	call	cufftExecC2C@PLT
	call	cudaDeviceSynchronize@PLT
	movl	120(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	112(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L147
	movss	.LC26(%rip), %xmm0
	movq	%r13, %rcx
	movl	%ebp, %esi
	movl	%ebx, %edi
	movq	8(%rsp), %rdx
	call	_Z47__device_stub__Z15multiply_kerneliiP6float2S0_fiiP6float2S0_f
.L147:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movl	%r12d, %edi
	movq	%rdx, %rsi
	call	cufftExecC2C@PLT
	call	cudaDeviceSynchronize@PLT
	movl	120(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	112(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L148
	movl	%ebx, %eax
	movss	.LC26(%rip), %xmm0
	movl	%ebp, %esi
	movl	%ebx, %edi
	imull	%ebp, %eax
	movq	8(%rsp), %rdx
	cvtsi2ssl	%eax, %xmm1
	divss	%xmm1, %xmm0
	call	_Z37__device_stub__Z9normalizeiiP6float2fiiP6float2f
.L148:
	call	cudaDeviceSynchronize@PLT
	movl	120(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	112(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L149
	movq	8(%rsp), %rdx
	movq	%r15, %rcx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z57__device_stub__Z26circshift_reverse_and_realiiP6float2S0_iiP6float2S0_
.L149:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE4059:
	.size	_Z8V_updateiiiP6float2S0_S0_S0_S0_4dim3S1_, .-_Z8V_updateiiiP6float2S0_S0_S0_S0_4dim3S1_
	.globl	_Z53__device_stub__Z25clear_padding_and_restoreiiP6float2iiP6float2
	.type	_Z53__device_stub__Z25clear_padding_and_restoreiiP6float2iiP6float2, @function
_Z53__device_stub__Z25clear_padding_and_restoreiiP6float2iiP6float2:
.LFB4124:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movl	%edi, 12(%rsp)
	leaq	32(%rsp), %rcx
	leaq	40(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L151
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z25clear_padding_and_restoreiiP6float2(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L151:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L153
	call	__stack_chk_fail@PLT
.L153:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4124:
	.size	_Z53__device_stub__Z25clear_padding_and_restoreiiP6float2iiP6float2, .-_Z53__device_stub__Z25clear_padding_and_restoreiiP6float2iiP6float2
	.globl	_Z25clear_padding_and_restoreiiP6float2
	.type	_Z25clear_padding_and_restoreiiP6float2, @function
_Z25clear_padding_and_restoreiiP6float2:
.LFB4125:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z25clear_padding_and_restoreiiP6float2iiP6float2
	.cfi_endproc
.LFE4125:
	.size	_Z25clear_padding_and_restoreiiP6float2, .-_Z25clear_padding_and_restoreiiP6float2
	.globl	_Z38__device_stub__Z16compute_X_divmatiiPfiiPf
	.type	_Z38__device_stub__Z16compute_X_divmatiiPfiiPf, @function
_Z38__device_stub__Z16compute_X_divmatiiPfiiPf:
.LFB4126:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movl	%edi, 12(%rsp)
	leaq	32(%rsp), %rcx
	leaq	40(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L156
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z16compute_X_divmatiiPf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L156:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L158
	call	__stack_chk_fail@PLT
.L158:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4126:
	.size	_Z38__device_stub__Z16compute_X_divmatiiPfiiPf, .-_Z38__device_stub__Z16compute_X_divmatiiPfiiPf
	.globl	_Z16compute_X_divmatiiPf
	.type	_Z16compute_X_divmatiiPf, @function
_Z16compute_X_divmatiiPf:
.LFB4127:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z16compute_X_divmatiiPfiiPf
	.cfi_endproc
.LFE4127:
	.size	_Z16compute_X_divmatiiPf, .-_Z16compute_X_divmatiiPf
	.globl	_Z50__device_stub__Z16compute_V_divmatiiP6float2S0_S0_iiP6float2S0_S0_
	.type	_Z50__device_stub__Z16compute_V_divmatiiP6float2S0_S0_iiP6float2S0_S0_, @function
_Z50__device_stub__Z16compute_V_divmatiiP6float2S0_S0_iiP6float2S0_S0_:
.LFB4128:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L161
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16compute_V_divmatiiP6float2S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L161:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L163
	call	__stack_chk_fail@PLT
.L163:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4128:
	.size	_Z50__device_stub__Z16compute_V_divmatiiP6float2S0_S0_iiP6float2S0_S0_, .-_Z50__device_stub__Z16compute_V_divmatiiP6float2S0_S0_iiP6float2S0_S0_
	.globl	_Z16compute_V_divmatiiP6float2S0_S0_
	.type	_Z16compute_V_divmatiiP6float2S0_S0_, @function
_Z16compute_V_divmatiiP6float2S0_S0_:
.LFB4129:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z16compute_V_divmatiiP6float2S0_S0_iiP6float2S0_S0_
	.cfi_endproc
.LFE4129:
	.size	_Z16compute_V_divmatiiP6float2S0_S0_, .-_Z16compute_V_divmatiiP6float2S0_S0_
	.globl	_Z51__device_stub__Z23soft_thresh_specializediiP6float2iiP6float2
	.type	_Z51__device_stub__Z23soft_thresh_specializediiP6float2iiP6float2, @function
_Z51__device_stub__Z23soft_thresh_specializediiP6float2iiP6float2:
.LFB4130:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movl	%edi, 12(%rsp)
	leaq	32(%rsp), %rcx
	leaq	40(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L166
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z23soft_thresh_specializediiP6float2(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L166:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L168
	call	__stack_chk_fail@PLT
.L168:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4130:
	.size	_Z51__device_stub__Z23soft_thresh_specializediiP6float2iiP6float2, .-_Z51__device_stub__Z23soft_thresh_specializediiP6float2iiP6float2
	.globl	_Z23soft_thresh_specializediiP6float2
	.type	_Z23soft_thresh_specializediiP6float2, @function
_Z23soft_thresh_specializediiP6float2:
.LFB4131:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z23soft_thresh_specializediiP6float2iiP6float2
	.cfi_endproc
.LFE4131:
	.size	_Z23soft_thresh_specializediiP6float2, .-_Z23soft_thresh_specializediiP6float2
	.globl	_Z41__device_stub__Z8U_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.type	_Z41__device_stub__Z8U_updateiiP6float2S0_S0_iiP6float2S0_S0_, @function
_Z41__device_stub__Z8U_updateiiP6float2S0_S0_iiP6float2S0_S0_:
.LFB4132:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L171
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8U_updateiiP6float2S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L171:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L173
	call	__stack_chk_fail@PLT
.L173:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4132:
	.size	_Z41__device_stub__Z8U_updateiiP6float2S0_S0_iiP6float2S0_S0_, .-_Z41__device_stub__Z8U_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.globl	_Z8U_updateiiP6float2S0_S0_
	.type	_Z8U_updateiiP6float2S0_S0_, @function
_Z8U_updateiiP6float2S0_S0_:
.LFB4133:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z8U_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.cfi_endproc
.LFE4133:
	.size	_Z8U_updateiiP6float2S0_S0_, .-_Z8U_updateiiP6float2S0_S0_
	.globl	_Z46__device_stub__Z8X_updateiiPfP6float2S1_S1_S1_iiPfP6float2S1_S1_S1_
	.type	_Z46__device_stub__Z8X_updateiiPfP6float2S1_S1_S1_iiPfP6float2S1_S1_S1_, @function
_Z46__device_stub__Z8X_updateiiPfP6float2S1_S1_S1_iiPfP6float2S1_S1_S1_:
.LFB4134:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	176(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L176
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z8X_updateiiPfP6float2S1_S1_S1_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L176:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L178
	call	__stack_chk_fail@PLT
.L178:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4134:
	.size	_Z46__device_stub__Z8X_updateiiPfP6float2S1_S1_S1_iiPfP6float2S1_S1_S1_, .-_Z46__device_stub__Z8X_updateiiPfP6float2S1_S1_S1_iiPfP6float2S1_S1_S1_
	.globl	_Z8X_updateiiPfP6float2S1_S1_S1_
	.type	_Z8X_updateiiPfP6float2S1_S1_S1_, @function
_Z8X_updateiiPfP6float2S1_S1_S1_:
.LFB4135:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z8X_updateiiPfP6float2S1_S1_S1_iiPfP6float2S1_S1_S1_
	.cfi_endproc
.LFE4135:
	.size	_Z8X_updateiiPfP6float2S1_S1_S1_, .-_Z8X_updateiiPfP6float2S1_S1_S1_
	.globl	_Z41__device_stub__Z8W_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.type	_Z41__device_stub__Z8W_updateiiP6float2S0_S0_iiP6float2S0_S0_, @function
_Z41__device_stub__Z8W_updateiiP6float2S0_S0_iiP6float2S0_S0_:
.LFB4136:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L181
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8W_updateiiP6float2S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L181:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L183
	call	__stack_chk_fail@PLT
.L183:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4136:
	.size	_Z41__device_stub__Z8W_updateiiP6float2S0_S0_iiP6float2S0_S0_, .-_Z41__device_stub__Z8W_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.globl	_Z8W_updateiiP6float2S0_S0_
	.type	_Z8W_updateiiP6float2S0_S0_, @function
_Z8W_updateiiP6float2S0_S0_:
.LFB4137:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z8W_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.cfi_endproc
.LFE4137:
	.size	_Z8W_updateiiP6float2S0_S0_, .-_Z8W_updateiiP6float2S0_S0_
	.globl	_Z42__device_stub__Z9Xi_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.type	_Z42__device_stub__Z9Xi_updateiiP6float2S0_S0_iiP6float2S0_S0_, @function
_Z42__device_stub__Z9Xi_updateiiP6float2S0_S0_iiP6float2S0_S0_:
.LFB4138:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L186
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9Xi_updateiiP6float2S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L186:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L188
	call	__stack_chk_fail@PLT
.L188:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4138:
	.size	_Z42__device_stub__Z9Xi_updateiiP6float2S0_S0_iiP6float2S0_S0_, .-_Z42__device_stub__Z9Xi_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.globl	_Z9Xi_updateiiP6float2S0_S0_
	.type	_Z9Xi_updateiiP6float2S0_S0_, @function
_Z9Xi_updateiiP6float2S0_S0_:
.LFB4139:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z9Xi_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.cfi_endproc
.LFE4139:
	.size	_Z9Xi_updateiiP6float2S0_S0_, .-_Z9Xi_updateiiP6float2S0_S0_
	.globl	_Z44__device_stub__Z10Eta_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.type	_Z44__device_stub__Z10Eta_updateiiP6float2S0_S0_iiP6float2S0_S0_, @function
_Z44__device_stub__Z10Eta_updateiiP6float2S0_S0_iiP6float2S0_S0_:
.LFB4140:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L191
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10Eta_updateiiP6float2S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L191:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L193
	call	__stack_chk_fail@PLT
.L193:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4140:
	.size	_Z44__device_stub__Z10Eta_updateiiP6float2S0_S0_iiP6float2S0_S0_, .-_Z44__device_stub__Z10Eta_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.globl	_Z10Eta_updateiiP6float2S0_S0_
	.type	_Z10Eta_updateiiP6float2S0_S0_, @function
_Z10Eta_updateiiP6float2S0_S0_:
.LFB4141:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z10Eta_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.cfi_endproc
.LFE4141:
	.size	_Z10Eta_updateiiP6float2S0_S0_, .-_Z10Eta_updateiiP6float2S0_S0_
	.globl	_Z44__device_stub__Z10Rho_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.type	_Z44__device_stub__Z10Rho_updateiiP6float2S0_S0_iiP6float2S0_S0_, @function
_Z44__device_stub__Z10Rho_updateiiP6float2S0_S0_iiP6float2S0_S0_:
.LFB4142:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L196
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10Rho_updateiiP6float2S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L196:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L198
	call	__stack_chk_fail@PLT
.L198:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4142:
	.size	_Z44__device_stub__Z10Rho_updateiiP6float2S0_S0_iiP6float2S0_S0_, .-_Z44__device_stub__Z10Rho_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.globl	_Z10Rho_updateiiP6float2S0_S0_
	.type	_Z10Rho_updateiiP6float2S0_S0_, @function
_Z10Rho_updateiiP6float2S0_S0_:
.LFB4143:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z10Rho_updateiiP6float2S0_S0_iiP6float2S0_S0_
	.cfi_endproc
.LFE4143:
	.size	_Z10Rho_updateiiP6float2S0_S0_, .-_Z10Rho_updateiiP6float2S0_S0_
	.globl	_Z47__device_stub__Z13r_calculationiiP6float2S0_S0_iiP6float2S0_S0_
	.type	_Z47__device_stub__Z13r_calculationiiP6float2S0_S0_iiP6float2S0_S0_, @function
_Z47__device_stub__Z13r_calculationiiP6float2S0_S0_iiP6float2S0_S0_:
.LFB4144:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L201
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13r_calculationiiP6float2S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L201:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L203
	call	__stack_chk_fail@PLT
.L203:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4144:
	.size	_Z47__device_stub__Z13r_calculationiiP6float2S0_S0_iiP6float2S0_S0_, .-_Z47__device_stub__Z13r_calculationiiP6float2S0_S0_iiP6float2S0_S0_
	.globl	_Z13r_calculationiiP6float2S0_S0_
	.type	_Z13r_calculationiiP6float2S0_S0_, @function
_Z13r_calculationiiP6float2S0_S0_:
.LFB4145:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z13r_calculationiiP6float2S0_S0_iiP6float2S0_S0_
	.cfi_endproc
.LFE4145:
	.size	_Z13r_calculationiiP6float2S0_S0_, .-_Z13r_calculationiiP6float2S0_S0_
	.globl	_Z41__device_stub__Z10calc_psi_ViiP6float2S0_iiP6float2S0_
	.type	_Z41__device_stub__Z10calc_psi_ViiP6float2S0_iiP6float2S0_, @function
_Z41__device_stub__Z10calc_psi_ViiP6float2S0_iiP6float2S0_:
.LFB4146:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L206
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10calc_psi_ViiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L206:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L208
	call	__stack_chk_fail@PLT
.L208:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4146:
	.size	_Z41__device_stub__Z10calc_psi_ViiP6float2S0_iiP6float2S0_, .-_Z41__device_stub__Z10calc_psi_ViiP6float2S0_iiP6float2S0_
	.globl	_Z10calc_psi_ViiP6float2S0_
	.type	_Z10calc_psi_ViiP6float2S0_, @function
_Z10calc_psi_ViiP6float2S0_:
.LFB4147:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z10calc_psi_ViiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4147:
	.size	_Z10calc_psi_ViiP6float2S0_, .-_Z10calc_psi_ViiP6float2S0_
	.globl	_Z42__device_stub__Z11psi_adjointiiP6float2S0_iiP6float2S0_
	.type	_Z42__device_stub__Z11psi_adjointiiP6float2S0_iiP6float2S0_, @function
_Z42__device_stub__Z11psi_adjointiiP6float2S0_iiP6float2S0_:
.LFB4148:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L211
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11psi_adjointiiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L211:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L213
	call	__stack_chk_fail@PLT
.L213:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4148:
	.size	_Z42__device_stub__Z11psi_adjointiiP6float2S0_iiP6float2S0_, .-_Z42__device_stub__Z11psi_adjointiiP6float2S0_iiP6float2S0_
	.globl	_Z11psi_adjointiiP6float2S0_
	.type	_Z11psi_adjointiiP6float2S0_, @function
_Z11psi_adjointiiP6float2S0_:
.LFB4149:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z11psi_adjointiiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4149:
	.size	_Z11psi_adjointiiP6float2S0_, .-_Z11psi_adjointiiP6float2S0_
	.globl	_Z49__device_stub__Z18matrix_dot_productiiP6float2S0_iiP6float2S0_
	.type	_Z49__device_stub__Z18matrix_dot_productiiP6float2S0_iiP6float2S0_, @function
_Z49__device_stub__Z18matrix_dot_productiiP6float2S0_iiP6float2S0_:
.LFB4150:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L216
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18matrix_dot_productiiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L216:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L218
	call	__stack_chk_fail@PLT
.L218:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4150:
	.size	_Z49__device_stub__Z18matrix_dot_productiiP6float2S0_iiP6float2S0_, .-_Z49__device_stub__Z18matrix_dot_productiiP6float2S0_iiP6float2S0_
	.globl	_Z18matrix_dot_productiiP6float2S0_
	.type	_Z18matrix_dot_productiiP6float2S0_, @function
_Z18matrix_dot_productiiP6float2S0_:
.LFB4151:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z18matrix_dot_productiiP6float2S0_iiP6float2S0_
	.cfi_endproc
.LFE4151:
	.size	_Z18matrix_dot_productiiP6float2S0_, .-_Z18matrix_dot_productiiP6float2S0_
	.globl	_Z57__device_stub__Z22matrix_scale_and_minusiiP6float2S0_fS0_iiP6float2S0_fS0_
	.type	_Z57__device_stub__Z22matrix_scale_and_minusiiP6float2S0_fS0_iiP6float2S0_fS0_, @function
_Z57__device_stub__Z22matrix_scale_and_minusiiP6float2S0_fS0_iiP6float2S0_fS0_:
.LFB4152:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movss	%xmm0, 20(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L221
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z22matrix_scale_and_minusiiP6float2S0_fS0_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L221:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L223
	call	__stack_chk_fail@PLT
.L223:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4152:
	.size	_Z57__device_stub__Z22matrix_scale_and_minusiiP6float2S0_fS0_iiP6float2S0_fS0_, .-_Z57__device_stub__Z22matrix_scale_and_minusiiP6float2S0_fS0_iiP6float2S0_fS0_
	.globl	_Z22matrix_scale_and_minusiiP6float2S0_fS0_
	.type	_Z22matrix_scale_and_minusiiP6float2S0_fS0_, @function
_Z22matrix_scale_and_minusiiP6float2S0_fS0_:
.LFB4153:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z22matrix_scale_and_minusiiP6float2S0_fS0_iiP6float2S0_fS0_
	.cfi_endproc
.LFE4153:
	.size	_Z22matrix_scale_and_minusiiP6float2S0_fS0_, .-_Z22matrix_scale_and_minusiiP6float2S0_fS0_
	.section	.rodata.str1.1
.LC29:
	.string	"Start to load image\n"
.LC30:
	.string	"Finished loading images\n"
.LC31:
	.string	"Started Allocation\n"
.LC32:
	.string	"One array is of size %d\n"
.LC33:
	.string	"Finished Allocation\n"
.LC34:
	.string	"Finished setting memory\n"
.LC35:
	.string	"Transformation matrices ready\n"
.LC36:
	.string	"../test/blurred/blurred3.png"
.LC43:
	.string	"../test/recovered/ADMM_recovered3.png"
	.text
	.globl	_Z14run_admm_imagei
	.type	_Z14run_admm_imagei, @function
_Z14run_admm_imagei:
.LFB4070:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC29(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$312, %rsp
	.cfi_def_cfa_offset 368
	movl	%edi, 60(%rsp)
	movl	$2, %edi
	leaq	128(%rsp), %r15
	leaq	192(%rsp), %r13
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$8, %edi
	call	malloc@PLT
	movl	$8, %edi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movl	$2, %edi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movl	$2, %edi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	216(%rsp), %r9
	movq	16(%rsp), %rdi
	movq	%rax, %rcx
	movq	%rax, 48(%rsp)
	leaq	208(%rsp), %r8
	call	_Z12load_and_padPiS_PhS0_PP6float2S3_
	movq	16(%rsp), %rax
	movl	$2, %edi
	leaq	.LC30(%rip), %rsi
	movl	(%rax), %eax
	movl	%eax, 56(%rsp)
	movq	16(%rsp), %rax
	movl	4(%rax), %eax
	movl	%eax, 12(%rsp)
	addl	%eax, %eax
	movl	%eax, 8(%rsp)
	movl	56(%rsp), %eax
	movl	8(%rsp), %ebx
	leal	(%rax,%rax), %r14d
	xorl	%eax, %eax
	call	__printf_chk@PLT
	imull	%r14d, %ebx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC31(%rip), %rsi
	call	__printf_chk@PLT
	leaq	.LC32(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leal	0(,%rbx,8), %r12d
	movslq	%ebx, %rbp
	movl	%r12d, %edx
	call	__printf_chk@PLT
	movslq	%r12d, %rax
	movl	$1, %edx
	movq	%r15, %rdi
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	leaq	200(%rsp), %r12
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	leaq	136(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	leaq	144(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 64(%rsp)
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	leaq	152(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 72(%rsp)
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	leaq	160(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 80(%rsp)
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	leaq	168(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 88(%rsp)
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	leaq	176(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 96(%rsp)
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	leaq	184(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 104(%rsp)
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	movq	%r13, %rdi
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	movq	%r12, %rdi
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	leaq	224(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rsi
	movl	$1, %edx
	leaq	232(%rsp), %rdi
	call	cudaMallocManaged@PLT
	call	cudaDeviceSynchronize@PLT
	leaq	.LC33(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	xorl	%esi, %esi
	movq	%r15, %rdi
	call	cudaMemset@PLT
	movq	(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	(%rsp), %rdx
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	(%rsp), %rdx
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	(%rsp), %rdx
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	(%rsp), %rdx
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	(%rsp), %rdx
	xorl	%esi, %esi
	movq	%r13, %rdi
	call	cudaMemset@PLT
	movq	(%rsp), %rdx
	xorl	%esi, %esi
	movq	%r12, %rdi
	call	cudaMemset@PLT
	call	cudaDeviceSynchronize@PLT
	leaq	.LC34(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	8(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$68719476752, %rsi
	movl	$16, %ecx
	movl	$1, 280(%rsp)
	cltd
	movq	%rsi, 272(%rsp)
	idivl	%ecx
	movl	$1, 292(%rsp)
	movl	%eax, 284(%rsp)
	movl	%r14d, %eax
	cltd
	idivl	%ecx
	movq	%rsi, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	%eax, 288(%rsp)
	movq	284(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L227
	movq	224(%rsp), %rcx
	movq	216(%rsp), %rdx
	movl	%r14d, %esi
	movl	8(%rsp), %edi
	call	_Z39__device_stub__Z9circshiftiiP6float2S0_iiP6float2S0_
.L227:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L228
	movq	224(%rsp), %rcx
	movq	232(%rsp), %rdx
	movl	%r14d, %esi
	movl	8(%rsp), %edi
	call	_Z37__device_stub__Z7reverseiiP6float2S0_iiP6float2S0_
.L228:
	call	cudaDeviceSynchronize@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r13d, %r13d
	leaq	.LC35(%rip), %rsi
	call	__printf_chk@PLT
	movl	8(%rsp), %esi
	leaq	124(%rsp), %rdi
	movl	%r14d, %edx
	movl	$41, %ecx
	call	cufftPlan2d@PLT
	movq	224(%rsp), %rsi
	movl	124(%rsp), %edi
	orl	$-1, %ecx
	movq	%rsi, %rdx
	call	cufftExecC2C@PLT
	movq	232(%rsp), %rsi
	movl	124(%rsp), %edi
	orl	$-1, %ecx
	movq	%rsi, %rdx
	call	cufftExecC2C@PLT
	movslq	12(%rsp), %rdi
	salq	$3, %rdi
	call	malloc@PLT
	movslq	56(%rsp), %r12
	movq	%rax, %r15
.L229:
	cmpl	%r13d, 12(%rsp)
	jle	.L251
	movq	%r12, %rdi
	call	malloc@PLT
	movq	%rax, (%r15,%r13,8)
	incq	%r13
	jmp	.L229
.L251:
	movq	208(%rsp), %rcx
	movl	56(%rsp), %esi
	movq	%r15, %rdx
	movl	12(%rsp), %edi
	call	_Z23write_back_image_paddediiPPhP6float2
	call	cudaDeviceSynchronize@PLT
	movl	12(%rsp), %ecx
	movl	56(%rsp), %edx
	movq	%r15, %rsi
	movq	24(%rsp), %rax
	leaq	.LC36(%rip), %rdi
	movzbl	1(%rax), %r13d
	movzbl	(%rax), %eax
	movl	%r13d, %r9d
	movl	%eax, %r8d
	movl	%eax, 32(%rsp)
	call	_Z11write_imagePKcPPhiihh
	leaq	0(,%rbp,4), %rsi
	movl	$1, %edx
	salq	$3, %rbp
	leaq	240(%rsp), %rdi
	call	cudaMallocManaged@PLT
	leaq	264(%rsp), %rdi
	movl	$1, %edx
	movq	%rbp, %rsi
	call	cudaMallocManaged@PLT
	leaq	248(%rsp), %rdi
	movl	$1, %edx
	movq	%rbp, %rsi
	call	cudaMallocManaged@PLT
	leaq	256(%rsp), %rdi
	movl	$1, %edx
	movq	%rbp, %rsi
	call	cudaMallocManaged@PLT
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L231
	movq	240(%rsp), %rdx
	movl	8(%rsp), %edi
	movl	%r14d, %esi
	call	_Z38__device_stub__Z16compute_X_divmatiiPfiiPf
.L231:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rdx
	xorl	%esi, %esi
	subl	%r14d, %ebx
	leaq	248(%rsp), %rdi
	movslq	%ebx, %rbx
	call	cudaMemset@PLT
	call	cudaDeviceSynchronize@PLT
	movl	124(%rsp), %edi
	movslq	%r14d, %rax
	orl	$-1, %ecx
	movq	248(%rsp), %rsi
	movss	.LC38(%rip), %xmm0
	movl	$0x40800000, (%rsi)
	movq	%rsi, %rdx
	movss	%xmm0, 8(%rsi)
	movss	%xmm0, -8(%rsi,%rax,8)
	movss	%xmm0, (%rsi,%rax,8)
	movss	%xmm0, (%rsi,%rbx,8)
	call	cufftExecC2C@PLT
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L232
	movq	264(%rsp), %r8
	movq	248(%rsp), %rcx
	movl	%r14d, %esi
	movq	224(%rsp), %rdx
	movl	8(%rsp), %edi
	call	_Z50__device_stub__Z16compute_V_divmatiiP6float2S0_S0_iiP6float2S0_S0_
.L232:
	call	cudaDeviceSynchronize@PLT
	movslq	60(%rsp), %rdi
	xorl	%ebp, %ebp
	salq	$3, %rdi
	call	malloc@PLT
	movq	%rax, %rbx
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%rax, %r12
.L233:
	cmpl	%ebp, 60(%rsp)
	jle	.L252
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L234
	movq	136(%rsp), %r8
	movq	168(%rsp), %rcx
	movl	%r14d, %esi
	movq	256(%rsp), %rdx
	movl	8(%rsp), %edi
	call	_Z41__device_stub__Z8U_updateiiP6float2S0_S0_iiP6float2S0_S0_
.L234:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L235
	movq	192(%rsp), %rcx
	movq	144(%rsp), %rdx
	movl	%r14d, %esi
	movl	8(%rsp), %edi
	call	_Z49__device_stub__Z18copy_array_complexiiP6float2S0_iiP6float2S0_
.L235:
	call	cudaDeviceSynchronize@PLT
	subq	$32, %rsp
	.cfi_def_cfa_offset 400
	movl	%r14d, %edx
	movq	304(%rsp), %rax
	movq	256(%rsp), %r8
	movq	224(%rsp), %rcx
	movl	40(%rsp), %esi
	movq	%rax, 16(%rsp)
	movl	312(%rsp), %eax
	movl	156(%rsp), %edi
	movl	%eax, 24(%rsp)
	movq	316(%rsp), %rax
	movq	%rax, (%rsp)
	movl	324(%rsp), %eax
	movl	%eax, 8(%rsp)
	call	_Z7fourieriiiP6float2S0_4dim3S1_
	movl	312(%rsp), %ecx
	addq	$32, %rsp
	.cfi_def_cfa_offset 368
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L236
	pushq	%rax
	.cfi_def_cfa_offset 376
	movl	%r14d, %esi
	pushq	136(%rsp)
	.cfi_def_cfa_offset 384
	movq	224(%rsp), %r9
	movq	208(%rsp), %r8
	movq	176(%rsp), %rcx
	movq	256(%rsp), %rdx
	movl	24(%rsp), %edi
	call	_Z46__device_stub__Z8X_updateiiPfP6float2S1_S1_S1_iiPfP6float2S1_S1_S1_
	popq	%rdx
	.cfi_def_cfa_offset 376
	popq	%rcx
	.cfi_def_cfa_offset 368
.L236:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L237
	movq	184(%rsp), %r8
	movl	8(%rsp), %edi
	movl	%r14d, %esi
	movss	.LC39(%rip), %xmm0
	movq	176(%rsp), %rcx
	movq	152(%rsp), %rdx
	call	_Z57__device_stub__Z22matrix_scale_and_minusiiP6float2S0_fS0_iiP6float2S0_fS0_
.L237:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L238
	movq	200(%rsp), %r8
	movl	8(%rsp), %edi
	movl	%r14d, %esi
	movss	.LC40(%rip), %xmm0
	movq	168(%rsp), %rcx
	movq	136(%rsp), %rdx
	call	_Z57__device_stub__Z22matrix_scale_and_minusiiP6float2S0_fS0_iiP6float2S0_fS0_
.L238:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L239
	movq	192(%rsp), %rcx
	movq	200(%rsp), %rdx
	movl	%r14d, %esi
	movl	8(%rsp), %edi
	call	_Z42__device_stub__Z11psi_adjointiiP6float2S0_iiP6float2S0_
.L239:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L240
	movq	200(%rsp), %r8
	movl	8(%rsp), %edi
	movl	%r14d, %esi
	movss	.LC41(%rip), %xmm0
	movq	160(%rsp), %rcx
	movq	128(%rsp), %rdx
	call	_Z57__device_stub__Z22matrix_scale_and_minusiiP6float2S0_fS0_iiP6float2S0_fS0_
.L240:
	call	cudaDeviceSynchronize@PLT
	subq	$32, %rsp
	.cfi_def_cfa_offset 400
	movl	%r14d, %edx
	movq	304(%rsp), %rax
	movq	264(%rsp), %r8
	movq	232(%rsp), %rcx
	movl	40(%rsp), %esi
	movq	%rax, 16(%rsp)
	movl	312(%rsp), %eax
	movl	156(%rsp), %edi
	movl	%eax, 24(%rsp)
	movq	316(%rsp), %rax
	movq	%rax, (%rsp)
	movl	324(%rsp), %eax
	movl	%eax, 8(%rsp)
	call	_Z7fourieriiiP6float2S0_4dim3S1_
	movl	312(%rsp), %ecx
	addq	$32, %rsp
	.cfi_def_cfa_offset 368
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L241
	movq	200(%rsp), %r8
	movq	192(%rsp), %rcx
	movl	%r14d, %esi
	movq	184(%rsp), %rdx
	movl	8(%rsp), %edi
	call	_Z47__device_stub__Z13r_calculationiiP6float2S0_S0_iiP6float2S0_S0_
.L241:
	call	cudaDeviceSynchronize@PLT
	subq	$32, %rsp
	.cfi_def_cfa_offset 400
	movl	%r14d, %edx
	movq	304(%rsp), %rax
	movq	%rax, 16(%rsp)
	movl	312(%rsp), %eax
	movl	%eax, 24(%rsp)
	movq	316(%rsp), %rax
	movq	%rax, (%rsp)
	movl	324(%rsp), %eax
	movl	%eax, 8(%rsp)
	pushq	176(%rsp)
	.cfi_def_cfa_offset 408
	pushq	240(%rsp)
	.cfi_def_cfa_offset 416
	movq	240(%rsp), %r9
	movq	232(%rsp), %r8
	movq	312(%rsp), %rcx
	movl	56(%rsp), %esi
	movl	172(%rsp), %edi
	call	_Z8V_updateiiiP6float2S0_S0_S0_S0_4dim3S1_
	movl	328(%rsp), %ecx
	addq	$48, %rsp
	.cfi_def_cfa_offset 368
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L242
	movq	152(%rsp), %r8
	movq	144(%rsp), %rcx
	movl	%r14d, %esi
	movq	176(%rsp), %rdx
	movl	8(%rsp), %edi
	call	_Z41__device_stub__Z8W_updateiiP6float2S0_S0_iiP6float2S0_S0_
.L242:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L243
	movq	192(%rsp), %rcx
	movq	144(%rsp), %rdx
	movl	%r14d, %esi
	movl	8(%rsp), %edi
	call	_Z49__device_stub__Z18copy_array_complexiiP6float2S0_iiP6float2S0_
.L243:
	call	cudaDeviceSynchronize@PLT
	subq	$32, %rsp
	.cfi_def_cfa_offset 400
	movl	%r14d, %edx
	movq	304(%rsp), %rax
	movq	256(%rsp), %r8
	movq	224(%rsp), %rcx
	movl	40(%rsp), %esi
	movq	%rax, 16(%rsp)
	movl	312(%rsp), %eax
	movl	156(%rsp), %edi
	movl	%eax, 24(%rsp)
	movq	316(%rsp), %rax
	movq	%rax, (%rsp)
	movl	324(%rsp), %eax
	movl	%eax, 8(%rsp)
	call	_Z7fourieriiiP6float2S0_4dim3S1_
	movl	312(%rsp), %ecx
	addq	$32, %rsp
	.cfi_def_cfa_offset 368
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L244
	movq	160(%rsp), %r8
	movq	128(%rsp), %rcx
	movl	%r14d, %esi
	movq	192(%rsp), %rdx
	movl	8(%rsp), %edi
	call	_Z42__device_stub__Z9Xi_updateiiP6float2S0_S0_iiP6float2S0_S0_
.L244:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L245
	movq	256(%rsp), %rcx
	movq	144(%rsp), %rdx
	movl	%r14d, %esi
	movl	8(%rsp), %edi
	call	_Z41__device_stub__Z10calc_psi_ViiP6float2S0_iiP6float2S0_
.L245:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L246
	movq	168(%rsp), %r8
	movq	136(%rsp), %rcx
	movl	%r14d, %esi
	movq	256(%rsp), %rdx
	movl	8(%rsp), %edi
	call	_Z44__device_stub__Z10Eta_updateiiP6float2S0_S0_iiP6float2S0_S0_
.L246:
	call	cudaDeviceSynchronize@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L247
	movq	176(%rsp), %r8
	movq	152(%rsp), %rcx
	movl	%r14d, %esi
	movq	144(%rsp), %rdx
	movl	8(%rsp), %edi
	call	_Z44__device_stub__Z10Rho_updateiiP6float2S0_S0_iiP6float2S0_S0_
.L247:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	subq	%r12, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC42(%rip), %xmm0
	movsd	%xmm0, (%rbx,%rbp,8)
	incq	%rbp
	jmp	.L233
.L252:
	movq	144(%rsp), %rcx
	movl	56(%rsp), %esi
	movq	%r15, %rdx
	movl	12(%rsp), %edi
	call	_Z23write_back_image_paddediiPPhP6float2
	call	cudaDeviceSynchronize@PLT
	movl	32(%rsp), %r8d
	movl	%r13d, %r9d
	movq	%r15, %rsi
	movl	12(%rsp), %ecx
	movl	56(%rsp), %edx
	leaq	.LC43(%rip), %rdi
	call	_Z11write_imagePKcPPhiihh
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movq	160(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rdi
	call	cudaFree@PLT
	movq	176(%rsp), %rdi
	call	cudaFree@PLT
	movq	184(%rsp), %rdi
	call	cudaFree@PLT
	movq	192(%rsp), %rdi
	call	cudaFree@PLT
	movq	200(%rsp), %rdi
	call	cudaFree@PLT
	movq	208(%rsp), %rdi
	call	cudaFree@PLT
	movq	216(%rsp), %rdi
	call	cudaFree@PLT
	movq	240(%rsp), %rdi
	call	cudaFree@PLT
	movq	264(%rsp), %rdi
	call	cudaFree@PLT
	movq	248(%rsp), %rdi
	call	cudaFree@PLT
	movq	256(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movl	124(%rsp), %edi
	call	cufftDestroy@PLT
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L249
	call	__stack_chk_fail@PLT
.L249:
	addq	$312, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4070:
	.size	_Z14run_admm_imagei, .-_Z14run_admm_imagei
	.section	.rodata.str1.1
.LC44:
	.string	"../test/CUDA_Result/ADMM_0_200_single.csv"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4075:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	$200, %edi
	call	_Z14run_admm_imagei
	leaq	.LC44(%rip), %rdx
	movl	$200, %edi
	movq	%rax, %rbx
	movq	%rax, %rsi
	call	_Z17write_test_resultiPdPc
	movq	%rbx, %rdi
	call	free@PLT
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4075:
	.size	main, .-main
	.section	.rodata.str1.1
.LC45:
	.string	"_Z22matrix_scale_and_minusiiP6float2S0_fS0_"
.LC46:
	.string	"_Z18matrix_dot_productiiP6float2S0_"
.LC47:
	.string	"_Z11psi_adjointiiP6float2S0_"
.LC48:
	.string	"_Z10calc_psi_ViiP6float2S0_"
.LC49:
	.string	"_Z13r_calculationiiP6float2S0_S0_"
.LC50:
	.string	"_Z10Rho_updateiiP6float2S0_S0_"
.LC51:
	.string	"_Z10Eta_updateiiP6float2S0_S0_"
.LC52:
	.string	"_Z9Xi_updateiiP6float2S0_S0_"
.LC53:
	.string	"_Z8W_updateiiP6float2S0_S0_"
.LC54:
	.string	"_Z8X_updateiiPfP6float2S1_S1_S1_"
.LC55:
	.string	"_Z8U_updateiiP6float2S0_S0_"
.LC56:
	.string	"_Z23soft_thresh_specializediiP6float2"
.LC57:
	.string	"_Z16compute_V_divmatiiP6float2S0_S0_"
.LC58:
	.string	"_Z16compute_X_divmatiiPf"
.LC59:
	.string	"_Z25clear_padding_and_restoreiiP6float2"
.LC60:
	.string	"_Z9normalizeiiP6float2f"
.LC61:
	.string	"_Z7reverseiiP6float2S0_"
.LC62:
	.string	"_Z26circshift_reverse_and_realiiP6float2S0_"
.LC63:
	.string	"_Z17circshift_reverseiiP6float2S0_"
.LC64:
	.string	"_Z9circshiftiiP6float2S0_"
.LC65:
	.string	"_Z10matrix_padiiP6float2S0_"
.LC66:
	.string	"_Z12matrix_scaleiiP6float2f"
.LC67:
	.string	"_Z12matrix_minusiiP6float2S0_"
.LC68:
	.string	"_Z15multiply_kerneliiP6float2S0_f"
.LC69:
	.string	"_Z17copy_array_paddediiPfS_"
.LC70:
	.string	"_Z18copy_array_complexiiP6float2S0_"
.LC71:
	.string	"_Z10copy_arrayiiPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4155:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC45(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z22matrix_scale_and_minusiiP6float2S0_fS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC46(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18matrix_dot_productiiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC47(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11psi_adjointiiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC48(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10calc_psi_ViiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC49(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13r_calculationiiP6float2S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC50(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10Rho_updateiiP6float2S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC51(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10Eta_updateiiP6float2S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC52(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9Xi_updateiiP6float2S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC53(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z8W_updateiiP6float2S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC54(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8X_updateiiPfP6float2S1_S1_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC55(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8U_updateiiP6float2S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC56(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z23soft_thresh_specializediiP6float2(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC57(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16compute_V_divmatiiP6float2S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC58(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16compute_X_divmatiiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC59(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z25clear_padding_and_restoreiiP6float2(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC60(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9normalizeiiP6float2f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC61(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z7reverseiiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC62(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z26circshift_reverse_and_realiiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC63(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17circshift_reverseiiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC64(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9circshiftiiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC65(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10matrix_padiiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC66(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12matrix_scaleiiP6float2f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC67(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12matrix_minusiiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC68(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15multiply_kerneliiP6float2S0_f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC69(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z17copy_array_paddediiPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC70(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18copy_array_complexiiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC71(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10copy_arrayiiPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4155:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC18:
	.long	1179840512
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC19:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4
	.align 4
.LC20:
	.long	1132396544
	.align 4
.LC26:
	.long	1065353216
	.align 4
.LC38:
	.long	-1082130432
	.align 4
.LC39:
	.long	942130604
	.align 4
.LC40:
	.long	925353388
	.align 4
.LC41:
	.long	897988541
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC42:
	.long	0
	.long	1104006501
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <math.h>
#include <stdlib.h>
#include <string.h>
#include <png.h>
#include <hipfft/hipfft.h>
#include <hip/hip_runtime.h>
#include <unistd.h>
#include <chrono>
#include <iomanip>

// Convention: Matrix dimension on the front, then input , output on the back
// Convention: Scalar arguments always at the very end
// Convention: All arrays are of size mxn

// When psf is created, it is normalized so a png image can be constructed. Hence this is to adjust back the psf
const int adjust_coefficient = 3;
// Number of iterations
const int num_iters = 12;
// Some constants for the algorithm
const float mu1 = 1e-6;
const float mu2 = 1e-5;
const float mu3 = 4e-5;
const float tau = 0.0001;

// Complex addition
static __device__ __host__ inline float2 ComplexAdd(float2 a, float2 b) {
    float2 c;
    c.x = a.x + b.x;
    c.y = a.y + b.y;
    return c;
}

// Complex addition
static __device__ __host__ inline float2 ComplexSub(float2 a, float2 b) {
    float2 c;
    c.x = a.x - b.x;
    c.y = a.y - b.y;
    return c;
}

// Complex scale
static __device__ __host__ inline float2 ComplexScale(float2 a, float s) {
    float2 c;
    c.x = s * a.x;
    c.y = s * a.y;
    return c;
}
  
// Complex multiplication
static __device__ __host__ inline float2 ComplexMul(float2 a, float2 b) {
    float2 c;
    c.x = a.x * b.x - a.y * b.y;
    c.y = a.x * b.y + a.y * b.x;
    return c;
}

// Complex maximum
static __device__ __host__ inline float2 ComplexSquareMax(float2 a, float2 b) {
    float2 num1;
    float2 num2;
    num1 = ComplexMul(a, a);
    num2 = ComplexMul(b, b);
    if (num1.x < num2.x)
    {
        return b;
    } else
    {
        return a;
    }
}

// Complex square root
static __device__ __host__ inline float ComplexAbs(float2 a) {
    float c;
    c = a.x * a.x + a.y * a.y;
    return sqrtf(c);
}

// Complex conjugate of a number
static __device__ __host__ inline float2 ComplexConj(float2 a) {
    float2 c;
    c.x = a.x;
    c.y = a.y * (-1.0f);
    return c;
}

// Complex conjugate of a number
static __device__ __host__ inline float thresholding(float a, float tau) {
    if (a > 0)
    {
        return fmaxf(a - tau, 0);
    } else
    {
        return 0.0f - fmaxf(0.0f - a - tau, 0);
    }
}

// Complex conjugate of a number
static __device__ __host__ inline float2 ComplexThres(float2 a, float tau) {
    float2 c;
    c.x = thresholding(a.x, tau);
    c.y = thresholding(a.y, tau);
    return c;
}

__global__
void copy_array(int m, int n, float* x, float* y)
{
    // y = x
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            y[i*n+j] = x[i*n+j];
        }
    }
}

__global__
void copy_array_complex(int m, int n, float2 *x, float2 *y)
{
    // y = x
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            y[i*n+j].x = x[i*n+j].x;
            y[i*n+j].y = x[i*n+j].y;
        }
    }
}

__global__
void copy_array_padded(int m, int n, float* x, float* y)
{
    // y is padded, while x is the original input
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index_x = i + (m / 2);
            y[(i+(m/2))*2*n+(j+(n/2))] = x[i*n+j];
        }
    }
}

__global__
void multiply_kernel(int m, int n, float2* x, float2* y, float scale)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            x[i*n+j] = ComplexScale(ComplexMul(x[i*n+j], y[i*n+j]), scale);
        }
    }
}

__global__
void matrix_minus(int m, int n, float2* x, float2* y)
{
    // x = x - y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            x[i*n+j] = ComplexSub(x[i*n+j], y[i*n+j]);
        }
    }
}

__global__
void matrix_scale(int m, int n, float2 *x, float k)
{
    // x = kx
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            x[i*n+j] = ComplexScale(x[i*n+j], k);
        }
    }
}

__global__
void matrix_pad(int m, int n, float2 *image, float2 *signal)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            signal[(i+(m/2))*2*n+(j+(n/2))].x = image[i*n+j].x;
            signal[(i+(m/2))*2*n+(j+(n/2))].y = image[i*n+j].y;
        }
    }
}

__global__
void circshift(int m, int n, float2 *x, float2 *y)
{
    // Put circshifted x into y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            if (i < (m/2))
            {
                if (j < (n/2))
                {
                    y[(i+(m-m/2))*n + (j+(n-n/2))] = x[i*n+j];
                } else
                {
                    y[(i+(m-m/2))*n + (j-(n/2))] = x[i*n+j];
                }
            } else
            {
                if (j < (n/2))
                {
                    y[(i-(m/2))*n + (j+(n-n/2))] = x[i*n+j];
                } else
                {
                    y[(i-(m/2))*n + (j-(n/2))] = x[i*n+j];
                }
            }
        }
    }
}

__global__
void circshift_reverse(int m, int n, float2 *x, float2 *y)
{
    // Put reverse circshifted x into y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            if (i < (m/2))
            {
                if (j < (n/2))
                {
                    y[i*n+j] = x[(i+(m-m/2))*n + (j+(n-n/2))];
                } else
                {
                    y[i*n+j] = x[(i+(m-m/2))*n + (j-(n/2))];
                }
            } else
            {
                if (j < (n/2))
                {
                    y[i*n+j] = x[(i-(m/2))*n + (j+(n-n/2))];
                } else
                {
                    y[i*n+j] = x[(i-(m/2))*n + (j-(n/2))];
                }
            }
        }
    }
}

__global__
void circshift_reverse_and_real(int m, int n, float2 *x, float2 *y)
{
    // Put reverse circshifted x into y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            if (i < (m/2))
            {
                if (j < (n/2))
                {
                    y[i*n+j].x = x[(i+(m-m/2))*n + (j+(n-n/2))].x;
                    y[i*n+j].y = 0;
                } else
                {
                    y[i*n+j].x = x[(i+(m-m/2))*n + (j-(n/2))].x;
                    y[i*n+j].y = 0;
                }
            } else
            {
                if (j < (n/2))
                {
                    y[i*n+j].x = x[(i-(m/2))*n + (j+(n-n/2))].x;
                    y[i*n+j].y = 0;
                } else
                {
                    y[i*n+j].x = x[(i-(m/2))*n + (j-(n/2))].x;
                    y[i*n+j].y = 0;
                }
            }
        }
    }
}

__global__
void reverse(int m, int n, float2* x, float2* y)
{
    // x = y reversed
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            // x[i*n+j] = y[(m*n-1)-(i*n+j)];
            x[i*n+j] = ComplexConj(y[i*n+j]);
        }
    }
}

__global__
void normalize(int m, int n, float2* x, float factor)
{
    // x = factor * x
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            // x[i*n+j] = y[(m*n-1)-(i*n+j)];
            x[i*n+j] = ComplexScale(x[i*n+j], factor);
        }
    }
}

__global__
void clear_padding_and_restore(int m, int n, float2 *x)
{
    // x = y reversed
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            if ((i < m / 4) || (i >= ((m + 1) * 3 / 4)) || (j < n / 4) || (j >= ((n + 1) * 3 / 4)))
            {
                x[i*n+j].x = 0.0f;
            } else
            {
                x[i*n+j].x = 4.0f * x[i*n+j].x;
            }
            x[i*n+j].y = 0.0f;
        }
    }
}

__global__
void compute_X_divmat(int m, int n, float *x)
{
    // x = y reversed
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            float denominator = mu1;
            if ((i >= m / 4) && (i < ((m + 1) * 3 / 4)) && (j >= n / 4) && (j < ((n + 1) * 3 / 4)))
            {
                denominator += 1.0f;
            }
            x[i*n+j] = 1.0f / denominator;
        }
    }
}

__global__
void compute_V_divmat(int m, int n, float2 *filter_shifted, float2 *psiTpsi, float2 *V_divmat)
{
    // x = y reversed
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            float MTM = mu1 * (ComplexAbs(ComplexMul(ComplexConj(filter_shifted[index]), filter_shifted[index])));
            float pTp = mu2 * ComplexAbs(psiTpsi[index]);
            V_divmat[index].x = 1.0f / (MTM + pTp + mu3);
            V_divmat[index].y = 0.0f;
        }
    }
}

__global__
void soft_thresh_specialized(int m, int n, float2 *x)
{
    // Here, we are soft-thresholding x.
    // X is actually an mxnx2 matrices. Each entry is two floating-point numbers
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            x[index].x = thresholding(x[index].x, tau);
            x[index].y = thresholding(x[index].y, tau);
        }
    }
}

__global__
void U_update(int m, int n, float2 *psi_V, float2 *eta, float2 *U)
{
    // Here, we are soft-thresholding x.
    // X is actually an mxnx2 matrices. Each entry is two floating-point numbers
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            U[index].x = psi_V[index].x + (eta[index].x / mu2);
            U[index].y = psi_V[index].y + (eta[index].y / mu2);
            U[index] = ComplexThres(U[index], tau / mu2);
        }
    }
}

__global__
void X_update(int m, int n, float *X_divmat, float2 *xi, float2 *V, float2 *b, float2 *X)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            X[index].x = X_divmat[index] * (xi[index].x + mu1 * V[index].x + b[index].x);
            X[index].y = 0.0f;
        }
    }
}

void V_update(hipfftHandle plan, int m, int n, float2 *V_divmat, float2 *r_calc, float2 *draft1, float2 *draft2, float2 *V, dim3 numBlocks, dim3 threads)
{
    circshift<<<numBlocks, threads>>>(m, n, r_calc, draft1);
    hipDeviceSynchronize();
    hipfftExecC2C(plan, draft1, draft1, HIPFFT_FORWARD);
    hipDeviceSynchronize();
    // Possible Error: float too small
    multiply_kernel<<<numBlocks, threads>>>(m, n, draft1, V_divmat, 1.0f);
    hipDeviceSynchronize();
    hipfftExecC2C(plan, draft1, draft1, HIPFFT_BACKWARD);
    hipDeviceSynchronize();
    normalize<<<numBlocks, threads>>>(m, n, draft1, (1.0f / (m * n)));
    hipDeviceSynchronize();
    circshift_reverse_and_real<<<numBlocks, threads>>>(m, n, draft1, V);
    hipDeviceSynchronize();
}

__global__
void W_update(int m, int n, float2 *rho, float2 *V, float2 *W)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            float curr = rho[index].x / mu3 + V[index].x;
            W[index].x = fmaxf(curr, 0.0f);
            W[index].y = 0.0f;
        }
    }
}

__global__
void Xi_update(int m, int n, float2 *draft1, float2 *X, float2 *xi)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            // draft1[index] = ComplexSub(draft1[index], X[index]);
            // draft1[index] = ComplexScale(draft1[index], mu1);
            draft1[index].x = mu1 * (draft1[index].x - X[index].x);
            xi[index].x = xi[index].x + draft1[index].x;
            xi[index].y = 0;
        }
    }
}

__global__
void Eta_update(int m, int n, float2 *psi_V, float2 *U, float2 *eta)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            eta[index].x = eta[index].x + mu2 * (psi_V[index].x - U[index].x);
            eta[index].y = eta[index].y + mu2 * (psi_V[index].y - U[index].y);
        }
    }
}

__global__
void Rho_update(int m, int n, float2 *V, float2 *W, float2 *rho)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            rho[index].x = rho[index].x + mu3 * (V[index].x - W[index].x);
            rho[index].y = 0.0f;
        }
    }
}

__global__
void r_calculation(int m, int n, float2 *r_calc, float2 *draft1, float2 *draft2)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            r_calc[index] = ComplexAdd(r_calc[index], ComplexAdd(draft1[index], draft2[index]));
        }
    }
}

__global__
void calc_psi_V(int m, int n, float2 *V, float2 *psi_V)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            float rowNext = i == 0 ? V[(m-1)*n+j].x : V[(i-1)*n+j].x;
            float colNext = j == 0 ? V[i*n+(n-1)].x : V[i*n+(j-1)].x;
            float curr = V[i*n+j].x;
            psi_V[i*n+j].x = rowNext - curr;
            psi_V[i*n+j].y = colNext - curr;
        }
    }
}

__global__
void psi_adjoint(int m, int n, float2 *draft2, float2 *draft1)
{
    // Store psi-adjoint-translated draft2 into draft1
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            float rowNext = i == (m-1) ? draft2[j].x : draft2[(i+1)*n+j].x;
            float colNext = j == (n-1) ? draft2[i*n].y : draft2[i*n+(j+1)].y;
            draft1[index].x = (rowNext - draft2[index].x) + (colNext - draft2[index].y);
            draft1[index].y = 0;
        }
    }
}

__global__
void matrix_dot_product(int m, int n, float2* x, float2* y)
{
    // y = x dot y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            y[index] = ComplexMul(x[index], y[index]);
        }
    }
}

__global__
void matrix_scale_and_minus(int m, int n, float2 *x, float2 *y, float k, float2 *draft)
{
    // x = kx - y
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;
    for (int i = row; i < m; i += (gridDim.x * blockDim.x))
    {
        for (int j = col; j < n; j += (gridDim.y * blockDim.y))
        {
            int index = i * n + j;
            draft[index].x = x[index].x;
            draft[index].y = x[index].y;
            draft[index] = ComplexSub(ComplexScale(draft[index], k), y[index]);
        }
    }
}

float** read_image(const char* name, int* info, png_bytep other)
{
    char header[8];
    png_structp png_ptr;
    png_infop info_ptr;
    int width, height;
    png_byte color_type;
    png_byte bit_depth;
    png_bytep *row_pointers;
    png_bytep *psf_row;

    FILE *fp = fopen(name, "rb");
    fread(header, 1, 8, fp);
    if (png_sig_cmp((png_const_bytep)header, 0, 8))
    {
        printf("That's not an png file\n");
        exit(0);
    }

    png_ptr = png_create_read_struct(PNG_LIBPNG_VER_STRING, NULL, NULL, NULL);
    info_ptr = png_create_info_struct(png_ptr);
    setjmp(png_jmpbuf(png_ptr));
    png_init_io(png_ptr, fp);
    png_set_sig_bytes(png_ptr, 8);
    png_read_info(png_ptr, info_ptr);
    width = png_get_image_width(png_ptr, info_ptr);
    height = png_get_image_height(png_ptr, info_ptr);
    info[0] = width;
    info[1] = height;
    color_type = png_get_color_type(png_ptr, info_ptr);
    bit_depth = png_get_bit_depth(png_ptr, info_ptr);
    other[0] = color_type;
    other[1] = bit_depth;
    printf("This image have width %d and height %d\n", width, height);
    row_pointers = (png_bytep*) malloc(sizeof(png_bytep) * height);
    float **ret_arr = (float**) malloc(sizeof(float*) * height);
    for (int i = 0; i < height; i++)
    {
        size_t num = png_get_rowbytes(png_ptr, info_ptr);
        row_pointers[i] = (png_bytep) malloc(num);
        ret_arr[i] = (float*) malloc(sizeof(float) * width);
    }
    png_read_image(png_ptr, row_pointers);
    for (int i = 0; i < height; i++)
    {
        for (int j = 0; j < width; j++)
        {
            ret_arr[i][j] = 0.0 + row_pointers[i][j];
        }
        free(row_pointers[i]);
    }
    free(row_pointers);
    fclose(fp);
    return ret_arr;
}

void write_image(const char *name, png_bytep *image, int width, int height, png_byte color_type, png_byte bit_depth)
{
    printf("Writing file %s...\n", name);
    FILE *fp = fopen(name, "wb");
    if (!fp)
    {
        printf("Can't even open file pointer\n");
        exit(0);
    }
    png_structp png_ptr = png_create_write_struct(PNG_LIBPNG_VER_STRING, NULL, NULL, NULL);
    png_infop info_ptr = png_create_info_struct(png_ptr);
    if (!png_ptr || !info_ptr)
    {
        printf("Stuck at pointer creation\n");
        exit(0);
    }
    setjmp(png_jmpbuf(png_ptr));
    png_init_io(png_ptr, fp);
    setjmp(png_jmpbuf(png_ptr));
    png_set_IHDR(png_ptr, info_ptr, width, height,
        bit_depth, color_type, PNG_INTERLACE_NONE,
        PNG_COMPRESSION_TYPE_BASE, PNG_FILTER_TYPE_BASE);
    png_write_info(png_ptr, info_ptr);
    if (setjmp(png_jmpbuf(png_ptr)))
    {
        printf("Error writing bytes\n");
        exit(0);
    }
    png_write_image(png_ptr, image);
    if (setjmp(png_jmpbuf(png_ptr)))
    {
        printf("Error during end of write\n");
        exit(0);
    }
    png_write_end(png_ptr, NULL);
    fclose(fp);
}

void write_test_result(int numTests, double *record, char *filename)
{
    printf("Creating %s.csv file\n",filename);
    FILE *fp;

    // printf("Creating filename\n");

    // filename = strcat(filename, ".csv");
    // filename = strcat("../test/CUDA_Result/", filename);

    printf("Creating file pointer\n");
    fp = fopen(filename,"w+");

    fprintf(fp,"Num_Iterations, Time(s)\n");

    printf("Starting to write actual file\n");

    for(int i = 0; i < numTests; i++)
    {
        fprintf(fp, "%d,%.10g\n", i+1, record[i]);
    }

    fclose(fp);

    printf("%s.csv file created\n",filename);
}

void copy_image(int m, int n, float **image, float **psf, float2 *signal, float2 *filter)
{
    for (int i = 0; i < m; i++)
    {
        for (int j = 0; j < n; j++)
        {
            signal[i*n+j].x = image[i][j];
            signal[i*n+j].y = 0.0f;
            filter[i*n+j].x = (psf[i][j] * 1.0f) / (1500 * adjust_coefficient * adjust_coefficient);
            filter[i*n+j].y = 0.0f;
        }
    }
}

void write_back_image_padded(int m, int n, png_bytep *new_image, float2 *signal)
{
    // The signal is padded in this case
    for (int i = 0; i < m; i++)
    {
        for (int j = 0; j < n; j++)
        {
            new_image[i][j] = (png_byte)fminf(fabsf(signal[(i+(m/2))*2*n+(j+(n/2))].x), 255.0);
            if ((i == m / 2) && (j < n / 2)) printf("%d ", new_image[i][j]);
        }
    }
}

void fourier(hipfftHandle plan, int m, int n, float2 *signal, float2 *filter_shifted, dim3 numBlocks, dim3 threads)
{
    hipfftExecC2C(plan, signal, signal, HIPFFT_FORWARD);
    // cufftExecC2C(plan, filter_shifted, filter_shifted, CUFFT_FORWARD);
    hipDeviceSynchronize();
    multiply_kernel<<<numBlocks, threads>>>(m, n, signal, filter_shifted, (1.0f / (m * n)));
    hipDeviceSynchronize();
    hipfftExecC2C(plan, signal, signal, HIPFFT_BACKWARD);
    // cufftExecC2C(plan, filter_shifted, filter_shifted, CUFFT_INVERSE);
    hipDeviceSynchronize();
    // normalize<<<numBlocks, threads>>>(m, n, signal, (1.0f / (m * n)));
    // cudaDeviceSynchronize();
    // normalize<<<numBlocks, threads>>>(m, n, filter_shifted);
    // cudaDeviceSynchronize();
}

void printSlice(int m, int n, float2 *mat, int start, const char* title)
{
    printf("%s:\n", title);
    for (int i = start; i < start + 8; i++)
    {
        for (int j = start; j < start + 8; j++)
        {
            float curr = mat[i*n+j].x;
            printf("%6.3f ", curr);
        }
        printf("\n");
    }
}

void printSliceReal(int m, int n, float *mat, int start, const char* title)
{
    printf("%s:\n", title);
    for (int i = start - 4; i < start + 4; i++)
    {
        for (int j = start - 4; j < start + 4; j++)
        {
            printf("%6.3f ", mat[i*n+j]);
        }
        printf("\n");
    }
}

void printSliceScientific(int m, int n, float2 *mat, int start, const char* title)
{
    printf("%s:\n", title);
    for (int i = start; i < start + 8; i++)
    {
        for (int j = start; j < start + 8; j++)
        {
            float curr = mat[i*n+j].x;
            printf("%6.3e ", curr);
        }
        printf("\n");
    }
}

void load_and_pad(int *image_info, int *psf_info, png_bytep other1, png_bytep other2, float2 **pad_signal, float2 **pad_filter)
{
    float **image;
    float **psf;
    png_bytep *new_image;
    image = read_image("../image/cameraman.png", image_info, other1);
    psf = read_image("../psf/psf_gaussian_3.png", psf_info, other2);
    int width = image_info[0];
    int height = image_info[1];
    int pad_height = 2 * height;
    int pad_width = 2 * width;
    int pad_size = pad_height * pad_width * sizeof(float2);
    float2 *signal, *filter, *filter_shifted;
    int size = image_info[0] * image_info[1] * sizeof(float2);
    // The signal (image)
    hipMallocManaged(reinterpret_cast<void **>(&signal), size);
    // The filter (psf)
    hipMallocManaged(reinterpret_cast<void **>(&filter), size);
    // Shifted psf
    hipMallocManaged(reinterpret_cast<void **>(&filter_shifted), size);
    hipMallocManaged(reinterpret_cast<void **>(pad_signal), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(pad_filter), pad_size);
    hipDeviceSynchronize();
    hipMemset(reinterpret_cast<void **>(pad_signal), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(pad_filter), 0, pad_size);
    hipDeviceSynchronize();
    // Copy the image over, do the conversion from real to complex at the same time
    copy_image(image_info[1], image_info[0], image, psf, signal, filter);
    hipDeviceSynchronize();
    dim3 threads(16, 16);
    dim3 numBlocks(image_info[1] / 16, image_info[0] / 16);
    circshift<<<numBlocks, threads>>>(image_info[1], image_info[0], filter, filter_shifted);
    hipDeviceSynchronize();
    // Create cufft plan
    hipfftHandle plan;
    hipfftPlan2d(&plan, image_info[0], image_info[1], HIPFFT_C2C);
    // Pre-transform the two filters
    hipfftExecC2C(plan, filter_shifted, filter_shifted, HIPFFT_FORWARD);
    // Now blur the image
    fourier(plan, image_info[1], image_info[0], signal, filter_shifted, numBlocks, threads);
    matrix_pad<<<numBlocks, threads>>>(height, width, signal, *pad_signal);
    hipDeviceSynchronize();
    matrix_pad<<<numBlocks, threads>>>(height, width, filter, *pad_filter);
    hipDeviceSynchronize();
    // printSlice(pad_height, pad_width, *pad_signal, height / 2, "pad_signal_original");
    hipFree(signal);
    hipFree(filter);
    hipFree(filter_shifted);
    hipfftDestroy(plan);
}

double* run_admm_image(int numIters)
{
    png_bytep *new_image;
    // Variables used in algorithm
    float2 *X, *U, *V, *W, *xi, *eta, *rho;
    // Intermediate or draft matrices
    float2 *r_calc, *draft1, *draft2;
    // Images and filters
    float2 *pad_signal, *pad_filter, *filter_shifted, *filter_reversed;
    printf("Start to load image\n");
    int *image_info, *psf_info;
    png_bytep other1, other2;
    image_info = (int*) malloc(2 * sizeof(int));
    psf_info = (int*) malloc(2 * sizeof(int));
    other1 = (png_bytep) malloc(2 * sizeof(png_byte));
    other2 = (png_bytep) malloc(2 * sizeof(png_byte));
    load_and_pad(image_info, psf_info, other1, other2, &pad_signal, &pad_filter);
    int size = image_info[0] * image_info[1] * sizeof(float2);
    int width = image_info[0];
    int height = image_info[1];
    int m = height;
    int n = width;
    int pad_height = 2 * height;
    int pad_width = 2 * width;
    int pad_size = pad_height * pad_width * sizeof(float2);
    printf("Finished loading images\n");
    // printSlice(pad_height, pad_width, pad_signal, height / 2, "pad_signal_original");
    printf("Started Allocation\n");
    printf("One array is of size %d\n", pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&X), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&U), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&V), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&W), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&xi), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&eta), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&rho), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&r_calc), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&draft1), pad_size);
    hipMallocManaged(reinterpret_cast<void **>(&draft2), pad_size);
    // Shifted psf
    hipMallocManaged(reinterpret_cast<void **>(&filter_shifted), pad_size);
    // Used for fourier adjoint
    hipMallocManaged(reinterpret_cast<void **>(&filter_reversed), pad_size);
    hipDeviceSynchronize();
    printf("Finished Allocation\n");
    hipMemset(reinterpret_cast<void **>(&X), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(&U), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(&V), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(&W), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(&xi), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(&eta), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(&rho), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(&r_calc), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(&draft1), 0, pad_size);
    hipMemset(reinterpret_cast<void **>(&draft2), 0, pad_size);
    hipDeviceSynchronize();
    printf("Finished setting memory\n");
    dim3 threads(16, 16);
    dim3 numBlocks(pad_height / 16, pad_width / 16);
    circshift<<<numBlocks, threads>>>(pad_height, pad_width, pad_filter, filter_shifted);
    hipDeviceSynchronize();
    reverse<<<numBlocks, threads>>>(pad_height, pad_width, filter_reversed, filter_shifted);
    hipDeviceSynchronize();
    printf("Transformation matrices ready\n");
    // Create cufft plan
    hipfftHandle plan;
    hipfftPlan2d(&plan, pad_height, pad_width, HIPFFT_C2C);
    // Pre-transform the two filters
    hipfftExecC2C(plan, filter_shifted, filter_shifted, HIPFFT_FORWARD);
    hipfftExecC2C(plan, filter_reversed, filter_reversed, HIPFFT_FORWARD);
    // Copy the image back
    new_image = (png_bytep*) malloc(image_info[1] * sizeof(png_bytep));
    for (int i = 0; i < image_info[1]; i++) new_image[i] = (png_bytep) malloc(image_info[0] * sizeof(png_byte));
    write_back_image_padded(image_info[1], image_info[0], new_image, pad_signal);
    hipDeviceSynchronize();
    write_image("../test/blurred/blurred3.png", new_image, image_info[0], image_info[1], other1[0], other1[1]);
    float *X_divmat;
    float2 *psiTpsi, *psi_V, *V_divmat;
    hipMallocManaged(reinterpret_cast<void **>(&X_divmat), pad_height * pad_width * sizeof(float));
    hipMallocManaged(reinterpret_cast<void **>(&V_divmat), pad_height * pad_width * sizeof(float2));
    hipMallocManaged(reinterpret_cast<void **>(&psiTpsi), pad_height * pad_width * sizeof(float2));
    hipMallocManaged(reinterpret_cast<void **>(&psi_V), pad_height * pad_width * sizeof(float2));
    hipDeviceSynchronize();
    // Now, first we calculate the X_divmat
    compute_X_divmat<<<numBlocks, threads>>>(pad_height, pad_width, X_divmat);
    hipDeviceSynchronize();
    // printSliceReal(pad_height, pad_width, X_divmat, height / 2, "X_divmat");
    hipMemset(reinterpret_cast<void **>(&psiTpsi), 0, pad_size);
    hipDeviceSynchronize();
    // Below is the construction of the psiTpsi matrix. Move to a function later
    psiTpsi[0].x = 4.0f;
    psiTpsi[1].x = -1.0f;
    psiTpsi[pad_width - 1].x = -1.0f;
    psiTpsi[pad_width].x = -1.0f;
    psiTpsi[(pad_height - 1) * pad_width].x = -1.0f;
    hipfftExecC2C(plan, psiTpsi, psiTpsi, HIPFFT_FORWARD);
    hipDeviceSynchronize();
    // Now we move on to the V_divmat calculation. There is a lot of element wise calculation, hence
    // It can be done in terms of a kernel function. The filter is pre-shifted
    compute_V_divmat<<<numBlocks, threads>>>(pad_height, pad_width, filter_shifted, psiTpsi, V_divmat);
    hipDeviceSynchronize();
    // printSlice(pad_height, pad_width, V_divmat, height / 2, "V_divmat");
    double *record = (double *) malloc(numIters * sizeof(double));
    auto runStart = std::chrono::system_clock::now();
    // ADMM iterations starts here
    for (int i = 0; i < numIters; i++)
    {
        // printf("Iteration %d\n", i);
        // U-update
        // Here, as we just calculated psi_V, there is no need to calculate that again
        U_update<<<numBlocks, threads>>>(pad_height, pad_width, psi_V, eta, U);
        hipDeviceSynchronize();
        // printSlice(pad_height, pad_width, U, height / 2, "U");
        // X-update
        copy_array_complex<<<numBlocks, threads>>>(pad_height, pad_width, V, draft1);
        hipDeviceSynchronize();
        fourier(plan, pad_height, pad_width, draft1, filter_shifted, numBlocks, threads);
        X_update<<<numBlocks, threads>>>(pad_height, pad_width, X_divmat, xi, draft1, pad_signal, X);
        hipDeviceSynchronize();
        // printSlice(pad_height, pad_width, pad_signal, height / 2, "pad_signal");
        // printSlice(pad_height, pad_width, X, height / 2, "X");
        // R-calculation
        matrix_scale_and_minus<<<numBlocks, threads>>>(pad_height, pad_width, W, rho, mu3, r_calc);
        hipDeviceSynchronize();
        matrix_scale_and_minus<<<numBlocks, threads>>>(pad_height, pad_width, U, eta, mu2, draft2);
        hipDeviceSynchronize();
        psi_adjoint<<<numBlocks, threads>>>(pad_height, pad_width, draft2, draft1);
        hipDeviceSynchronize();
        matrix_scale_and_minus<<<numBlocks, threads>>>(pad_height, pad_width, X, xi, mu1, draft2);
        hipDeviceSynchronize();
        fourier(plan, pad_height, pad_width, draft2, filter_reversed, numBlocks, threads);
        r_calculation<<<numBlocks, threads>>>(pad_height, pad_width, r_calc, draft1, draft2);
        hipDeviceSynchronize();
        // printSlice(pad_height, pad_width, r_calc, height / 2, "r_calc");
        // V-update
        V_update(plan, pad_height, pad_width, V_divmat, r_calc, draft1, draft2, V, numBlocks, threads);
        // printSlice(pad_height, pad_width, V, height / 2, "V");
        // W-update
        W_update<<<numBlocks, threads>>>(pad_height, pad_width, rho, V, W);
        hipDeviceSynchronize();
        // printSlice(pad_height, pad_width, W, height, "W");
        // Xi-update
        copy_array_complex<<<numBlocks, threads>>>(pad_height, pad_width, V, draft1);
        hipDeviceSynchronize();
        fourier(plan, pad_height, pad_width, draft1, filter_shifted, numBlocks, threads);
        Xi_update<<<numBlocks, threads>>>(pad_height, pad_width, draft1, X, xi);
        hipDeviceSynchronize();
        // printSliceScientific(pad_height, pad_width, xi, height, "xi");
        // Eta-update
        calc_psi_V<<<numBlocks, threads>>>(pad_height, pad_width, V, psi_V);
        hipDeviceSynchronize();
        Eta_update<<<numBlocks, threads>>>(pad_height, pad_width, psi_V, U, eta);
        hipDeviceSynchronize();
        // printSliceScientific(pad_height, pad_width, eta, height, "eta");
        // Rho-update
        Rho_update<<<numBlocks, threads>>>(pad_height, pad_width, V, W, rho);
        hipDeviceSynchronize();
        // printSliceScientific(pad_height, pad_width, rho, height, "rho");
        auto currEnd = std::chrono::system_clock::now();
        std::chrono::duration<double> currDuration = currEnd - runStart;
        record[i] = currDuration.count();
    }
    write_back_image_padded(image_info[1], image_info[0], new_image, V);
    hipDeviceSynchronize();
    write_image("../test/recovered/ADMM_recovered3.png", new_image, image_info[0], image_info[1], other1[0], other1[1]);
    hipFree(X);
    hipFree(U);
    hipFree(V);
    hipFree(W);
    hipFree(xi);
    hipFree(eta);
    hipFree(rho);
    hipFree(r_calc);
    hipFree(draft1);
    hipFree(draft2);
    hipFree(pad_signal);
    hipFree(pad_filter);
    hipFree(X_divmat);
    hipFree(V_divmat);
    hipFree(psiTpsi);
    hipFree(psi_V);
    free(image_info);
    free(psf_info);
    free(other1);
    free(other2);
    free(new_image);
    hipfftDestroy(plan);
    return record;
}

// Padding needed: psf, blurred image, image of all ones

int main(void)
{
    int numTests = 200;
    double *record = run_admm_image(numTests);
    // for (int i = 0; i < numTests; i++)
    // {
    //     printf("Test %d\n", i + 1);
    //     record[i] = run_ista_image(i+1);
    // }
    char *filename = "../test/CUDA_Result/ADMM_0_200_single.csv";
    write_test_result(numTests, record, filename);
    free(record);
}
	.text
	.file	"ADMM.hip"
	.globl	_Z25__device_stub__copy_arrayiiPfS_ # -- Begin function _Z25__device_stub__copy_arrayiiPfS_
	.type	_Z25__device_stub__copy_arrayiiPfS_,@function
_Z25__device_stub__copy_arrayiiPfS_:    # @_Z25__device_stub__copy_arrayiiPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10copy_arrayiiPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__copy_arrayiiPfS_, .Lfunc_end0-_Z25__device_stub__copy_arrayiiPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.type	_Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_,@function
_Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_: # @_Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end1-_Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__copy_array_paddediiPfS_ # -- Begin function _Z32__device_stub__copy_array_paddediiPfS_
	.type	_Z32__device_stub__copy_array_paddediiPfS_,@function
_Z32__device_stub__copy_array_paddediiPfS_: # @_Z32__device_stub__copy_array_paddediiPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17copy_array_paddediiPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z32__device_stub__copy_array_paddediiPfS_, .Lfunc_end2-_Z32__device_stub__copy_array_paddediiPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f # -- Begin function _Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.type	_Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f,@function
_Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f: # @_Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f, .Lfunc_end3-_Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__matrix_minusiiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z27__device_stub__matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.type	_Z27__device_stub__matrix_minusiiP15HIP_vector_typeIfLj2EES1_,@function
_Z27__device_stub__matrix_minusiiP15HIP_vector_typeIfLj2EES1_: # @_Z27__device_stub__matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__matrix_minusiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end4-_Z27__device_stub__matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__matrix_scaleiiP15HIP_vector_typeIfLj2EEf # -- Begin function _Z27__device_stub__matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.type	_Z27__device_stub__matrix_scaleiiP15HIP_vector_typeIfLj2EEf,@function
_Z27__device_stub__matrix_scaleiiP15HIP_vector_typeIfLj2EEf: # @_Z27__device_stub__matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z27__device_stub__matrix_scaleiiP15HIP_vector_typeIfLj2EEf, .Lfunc_end5-_Z27__device_stub__matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.type	_Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_,@function
_Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_: # @_Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end6-_Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_
	.type	_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_,@function
_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_: # @_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end7-_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__circshift_reverseiiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z32__device_stub__circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.type	_Z32__device_stub__circshift_reverseiiP15HIP_vector_typeIfLj2EES1_,@function
_Z32__device_stub__circshift_reverseiiP15HIP_vector_typeIfLj2EES1_: # @_Z32__device_stub__circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z32__device_stub__circshift_reverseiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end8-_Z32__device_stub__circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.type	_Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_,@function
_Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_: # @_Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end9-_Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_
	.type	_Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_,@function
_Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_: # @_Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reverseiiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end10-_Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf # -- Begin function _Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf
	.type	_Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf,@function
_Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf: # @_Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9normalizeiiP15HIP_vector_typeIfLj2EEf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf, .Lfunc_end11-_Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf
	.cfi_endproc
                                        # -- End function
	.globl	_Z40__device_stub__clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE # -- Begin function _Z40__device_stub__clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.type	_Z40__device_stub__clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE,@function
_Z40__device_stub__clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE: # @_Z40__device_stub__clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rcx
	movl	%esi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z40__device_stub__clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE, .Lfunc_end12-_Z40__device_stub__clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__compute_X_divmatiiPf # -- Begin function _Z31__device_stub__compute_X_divmatiiPf
	.type	_Z31__device_stub__compute_X_divmatiiPf,@function
_Z31__device_stub__compute_X_divmatiiPf: # @_Z31__device_stub__compute_X_divmatiiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rcx
	movl	%esi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16compute_X_divmatiiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z31__device_stub__compute_X_divmatiiPf, .Lfunc_end13-_Z31__device_stub__compute_X_divmatiiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_ # -- Begin function _Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.type	_Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_: # @_Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end14-_Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__soft_thresh_specializediiP15HIP_vector_typeIfLj2EE # -- Begin function _Z38__device_stub__soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.type	_Z38__device_stub__soft_thresh_specializediiP15HIP_vector_typeIfLj2EE,@function
_Z38__device_stub__soft_thresh_specializediiP15HIP_vector_typeIfLj2EE: # @_Z38__device_stub__soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rcx
	movl	%esi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_Z38__device_stub__soft_thresh_specializediiP15HIP_vector_typeIfLj2EE, .Lfunc_end15-_Z38__device_stub__soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_ # -- Begin function _Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.type	_Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_: # @_Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end16-_Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_ # -- Begin function _Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.type	_Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_,@function
_Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_: # @_Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_, .Lfunc_end17-_Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z8V_updateP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_S3_S3_S3_4dim3S4_
.LCPI18_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z8V_updateP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_S3_S3_S3_4dim3S4_
	.type	_Z8V_updateP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_S3_S3_S3_4dim3S4_,@function
_Z8V_updateP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_S3_S3_S3_4dim3S4_: # @_Z8V_updateP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_S3_S3_S3_4dim3S4_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	movl	%esi, 8(%rsp)                   # 4-byte Spill
	movq	%rdi, %r15
	movq	104(%rsp), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	112(%rsp), %r12
	movl	120(%rsp), %r13d
	movq	128(%rsp), %r14
	movl	136(%rsp), %ebp
	movq	%r12, %rdi
	movl	%r13d, %esi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_2
# %bb.1:
	movl	8(%rsp), %edi                   # 4-byte Reload
	movl	12(%rsp), %esi                  # 4-byte Reload
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	%rbx, %rcx
	callq	_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_
.LBB18_2:
	callq	hipDeviceSynchronize
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%rbx, %rdx
	movl	$-1, %ecx
	callq	hipfftExecC2C
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	%r13d, %esi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_4
# %bb.3:
	movss	.LCPI18_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movl	8(%rsp), %edi                   # 4-byte Reload
	movl	12(%rsp), %esi                  # 4-byte Reload
	movq	%rbx, %rdx
	movq	24(%rsp), %rcx                  # 8-byte Reload
	callq	_Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
.LBB18_4:
	callq	hipDeviceSynchronize
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipfftExecC2C
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	%r13d, %esi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_6
# %bb.5:
	movl	12(%rsp), %esi                  # 4-byte Reload
	movl	%esi, %eax
	movl	8(%rsp), %edi                   # 4-byte Reload
	imull	%edi, %eax
	cvtsi2ss	%eax, %xmm1
	movss	.LCPI18_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	movq	%rbx, %rdx
	callq	_Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf
.LBB18_6:
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	%r13d, %esi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_8
# %bb.7:
	movl	8(%rsp), %edi                   # 4-byte Reload
	movl	12(%rsp), %esi                  # 4-byte Reload
	movq	%rbx, %rdx
	movq	32(%rsp), %rcx                  # 8-byte Reload
	callq	_Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
.LBB18_8:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end18:
	.size	_Z8V_updateP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_S3_S3_S3_4dim3S4_, .Lfunc_end18-_Z8V_updateP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_S3_S3_S3_4dim3S4_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_ # -- Begin function _Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.type	_Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_: # @_Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end19-_Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_ # -- Begin function _Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.type	_Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_: # @_Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end20-_Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_ # -- Begin function _Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.type	_Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_: # @_Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end21-_Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_ # -- Begin function _Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.type	_Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_: # @_Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end22:
	.size	_Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end22-_Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_ # -- Begin function _Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.type	_Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_: # @_Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end23-_Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.type	_Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_,@function
_Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_: # @_Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end24-_Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.type	_Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_,@function
_Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_: # @_Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end25:
	.size	_Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end25-_Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z33__device_stub__matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.type	_Z33__device_stub__matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_,@function
_Z33__device_stub__matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_: # @_Z33__device_stub__matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end26:
	.size	_Z33__device_stub__matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end26-_Z33__device_stub__matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_ # -- Begin function _Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.type	_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_,@function
_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_: # @_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	40(%rsp), %r9
	movq	%r8, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r9, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end27:
	.size	_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_, .Lfunc_end27-_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10read_imagePKcPiPh           # -- Begin function _Z10read_imagePKcPiPh
	.type	_Z10read_imagePKcPiPh,@function
_Z10read_imagePKcPiPh:                  # @_Z10read_imagePKcPiPh
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r13
	movq	%rsi, %r12
	movl	$.L.str, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	32(%rsp), %r14
	movl	$8, %r15d
	movl	$1, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movq	%rax, %rcx
	callq	fread
	xorl	%eax, %eax
	movl	%eax, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	callq	png_sig_cmp
	testl	%eax, %eax
	jne	.LBB28_12
# %bb.1:
	movq	%rbx, %r14
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	movl	%eax, %ecx
	movq	%rcx, %rsi
	movq	%rcx, %rdx
	callq	png_create_read_struct
	movq	%rax, %r15
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%rax, %rdi
	callq	png_create_info_struct
	movq	%rax, %rbx
	movl	$longjmp, %esi
	movl	$200, %edx
	movq	%r15, %rdi
	callq	png_set_longjmp_fn
	movq	%rax, %rdi
	callq	_setjmp
	movq	%r15, %rdi
	movq	%r14, 24(%rsp)                  # 8-byte Spill
	movq	%r14, %rsi
	callq	png_init_io
	movq	%r15, %rdi
	movl	$8, %esi
	callq	png_set_sig_bytes
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	png_read_info
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	png_get_image_width
	movl	%eax, %ebp
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	png_get_image_height
	movl	%eax, %r14d
	movl	%ebp, (%r12)
	movl	%eax, 4(%r12)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	png_get_color_type
	movl	%eax, %r12d
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	png_get_bit_depth
	movb	%r12b, (%r13)
	movb	%al, 1(%r13)
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
                                        # kill: def $al killed $al killed $eax
	movl	%ebp, %esi
	movl	%r14d, %edx
	callq	printf
	movslq	%r14d, %r13
	leaq	(,%r13,8), %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r15
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jle	.LBB28_2
# %bb.10:                               # %.lr.ph
	movl	%ebp, 4(%rsp)                   # 4-byte Spill
	movslq	%ebp, %r13
	shlq	$2, %r13
	movl	%r14d, 20(%rsp)                 # 4-byte Spill
	movl	%r14d, %r14d
	movl	%r14d, 16(%rsp)                 # 4-byte Spill
	movl	%r14d, %ebp
	xorl	%eax, %eax
                                        # kill: def $rax killed $eax
.LBB28_11:                              # =>This Inner Loop Header: Depth=1
	movq	%rax, %r14
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	%rbx, %rsi
	callq	png_get_rowbytes
	movq	%rax, %rdi
	callq	malloc
	movq	%rax, (%r12,%r14,8)
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, (%r15,%r14,8)
	incq	%r14
	movq	%r14, %rax
	cmpq	%r14, %rbp
	jne	.LBB28_11
# %bb.4:                                # %._crit_edge
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	%r12, %rsi
	callq	png_read_image
	cmpl	$0, 20(%rsp)                    # 4-byte Folded Reload
	jle	.LBB28_3
# %bb.5:                                # %.preheader.lr.ph
	movl	16(%rsp), %eax                  # 4-byte Reload
	movl	%eax, %ebx
	movl	4(%rsp), %eax                   # 4-byte Reload
	movl	%eax, %r14d
	xorl	%r13d, %r13d
	movl	%r13d, %ebp
.LBB28_6:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB28_8 Depth 2
	movq	(%r12,%rbp,8), %rdi
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	jle	.LBB28_9
# %bb.7:                                # %.lr.ph63
                                        #   in Loop: Header=BB28_6 Depth=1
	movq	(%r15,%rbp,8), %rax
	movl	%r13d, %ecx
.LBB28_8:                               #   Parent Loop BB28_6 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movzbl	(%rdi,%rcx), %edx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, (%rax,%rcx,4)
	movq	%rcx, %rdx
	incq	%rdx
	movq	%rdx, %rcx
	cmpq	%rdx, %r14
	jne	.LBB28_8
.LBB28_9:                               # %._crit_edge64
                                        #   in Loop: Header=BB28_6 Depth=1
	callq	free
	movq	%rbp, %rax
	incq	%rax
	movq	%rax, %rbp
	cmpq	%rbx, %rax
	jne	.LBB28_6
	jmp	.LBB28_3
.LBB28_2:                               # %._crit_edge.thread
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	%r12, %rsi
	callq	png_read_image
.LBB28_3:                               # %._crit_edge66
	movq	%r12, %rdi
	callq	free
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	fclose
	movq	%r15, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB28_12:
	.cfi_def_cfa_offset 96
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end28:
	.size	_Z10read_imagePKcPiPh, .Lfunc_end28-_Z10read_imagePKcPiPh
	.cfi_endproc
                                        # -- End function
	.globl	_Z11write_imagePKcPPhiihh       # -- Begin function _Z11write_imagePKcPPhiihh
	.type	_Z11write_imagePKcPPhiihh,@function
_Z11write_imagePKcPPhiihh:              # @_Z11write_imagePKcPPhiihh
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebp
	movl	%r8d, %ebx
	movl	%ecx, %r12d
	movl	%edx, %r13d
	movq	%rsi, %r15
	movq	%rdi, %r14
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
                                        # kill: def $al killed $al killed $eax
	movq	%r14, %rsi
	callq	printf
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	callq	fopen
	testq	%rax, %rax
	je	.LBB29_1
# %bb.3:
	movq	%rax, %r14
	movl	%r13d, (%rsp)                   # 4-byte Spill
	movl	%r12d, 4(%rsp)                  # 4-byte Spill
	movq	%r15, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	movl	%eax, %ecx
	movq	%rcx, %rsi
	movq	%rcx, %rdx
	callq	png_create_write_struct
	movq	%rax, %r15
	movq	%rax, %rdi
	callq	png_create_info_struct
	testq	%r15, %r15
	je	.LBB29_5
# %bb.4:
	testq	%rax, %rax
	je	.LBB29_5
# %bb.6:
	movl	%ebp, %r13d
	movl	%ebx, %r12d
	movq	%rax, %rbp
	movl	$longjmp, %esi
	movl	$200, %edx
	movq	%r15, %rdi
	movl	$longjmp, %ebx
	callq	png_set_longjmp_fn
	movq	%rax, %rdi
	callq	_setjmp
	movq	%r15, %rdi
	movq	%r14, 8(%rsp)                   # 8-byte Spill
	movq	%r14, %rsi
	callq	png_init_io
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	$longjmp, %r14d
	movl	$200, %edx
	movl	$200, %ebx
	callq	png_set_longjmp_fn
	movq	%rax, %rdi
	callq	_setjmp
	movzbl	%r13b, %r8d
	movzbl	%r12b, %r9d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	xorl	%eax, %eax
	movl	%eax, %r10d
	movq	%r15, %rdi
	movq	%rbp, %rsi
	movl	8(%rsp), %edx                   # 4-byte Reload
	movl	12(%rsp), %ecx                  # 4-byte Reload
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
                                        # kill: def $eax killed $eax def $rax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	png_set_IHDR
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	%r15, %rdi
	movq	%rbp, %rsi
	callq	png_write_info
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	callq	png_set_longjmp_fn
	movq	%rax, %rdi
	callq	_setjmp
	testl	%eax, %eax
	jne	.LBB29_7
# %bb.8:
	movq	%r15, %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	callq	png_write_image
	movl	$longjmp, %esi
	movl	$200, %edx
	movq	%r15, %rdi
	callq	png_set_longjmp_fn
	movq	%rax, %rdi
	callq	_setjmp
	testl	%eax, %eax
	jne	.LBB29_9
# %bb.10:
	xorl	%eax, %eax
	movl	%eax, %esi
	movq	%r15, %rdi
	callq	png_write_end
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	fclose
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB29_1:
	.cfi_def_cfa_offset 80
	movl	$.Lstr.1, %edi
	jmp	.LBB29_2
.LBB29_5:
	movl	$.Lstr.2, %edi
	jmp	.LBB29_2
.LBB29_7:
	movl	$.Lstr.4, %edi
	jmp	.LBB29_2
.LBB29_9:
	movl	$.Lstr.3, %edi
.LBB29_2:
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end29:
	.size	_Z11write_imagePKcPPhiihh, .Lfunc_end29-_Z11write_imagePKcPPhiihh
	.cfi_endproc
                                        # -- End function
	.globl	_Z17write_test_resultiPdPc      # -- Begin function _Z17write_test_resultiPdPc
	.type	_Z17write_test_resultiPdPc,@function
_Z17write_test_resultiPdPc:             # @_Z17write_test_resultiPdPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movl	%edi, %ebp
	movl	$.L.str.10, %edi
	movq	%rdx, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.L.str.12, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %r15
	movl	$.L.str.13, %edi
	movl	$24, %esi
	movl	$1, %edx
	movq	%rax, %rcx
	callq	fwrite@PLT
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	testl	%ebp, %ebp
	jle	.LBB30_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r13d
	xorl	%r12d, %r12d
.LBB30_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r14,%r12,8), %xmm0            # xmm0 = mem[0],zero
	incq	%r12
	movl	$.L.str.15, %esi
	movq	%r15, %rdi
	movl	%r12d, %edx
	movb	$1, %al
	callq	fprintf
	cmpq	%r12, %r13
	jne	.LBB30_2
.LBB30_3:                               # %._crit_edge
	movq	%r15, %rdi
	callq	fclose
	movl	$.L.str.16, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end30:
	.size	_Z17write_test_resultiPdPc, .Lfunc_end30-_Z17write_test_resultiPdPc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10copy_imageiiPPfS0_P15HIP_vector_typeIfLj2EES3_
.LCPI31_0:
	.long	0x4652f000                      # float 13500
	.text
	.globl	_Z10copy_imageiiPPfS0_P15HIP_vector_typeIfLj2EES3_
	.type	_Z10copy_imageiiPPfS0_P15HIP_vector_typeIfLj2EES3_,@function
_Z10copy_imageiiPPfS0_P15HIP_vector_typeIfLj2EES3_: # @_Z10copy_imageiiPPfS0_P15HIP_vector_typeIfLj2EES3_
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB31_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%edi, %eax
	movl	%esi, %edi
	addq	$4, %r9
	addq	$4, %r8
	xorl	%r10d, %r10d
	movss	.LCPI31_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	xorl	%r11d, %r11d
	xorl	%ebx, %ebx
.LBB31_2:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB31_4 Depth 2
	testl	%esi, %esi
	jle	.LBB31_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB31_2 Depth=1
	movl	%r11d, %r15d
	leaq	(%r9,%r15,8), %r14
	leaq	(%r8,%r15,8), %r15
	xorl	%r12d, %r12d
.LBB31_4:                               #   Parent Loop BB31_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rdx,%rbx,8), %r13
	movss	(%r13,%r12,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, -4(%r15,%r12,8)
	movl	%r10d, (%r15,%r12,8)
	movq	(%rcx,%rbx,8), %r13
	movss	(%r13,%r12,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, -4(%r14,%r12,8)
	movl	%r10d, (%r14,%r12,8)
	incq	%r12
	cmpq	%r12, %rdi
	jne	.LBB31_4
.LBB31_5:                               # %._crit_edge
                                        #   in Loop: Header=BB31_2 Depth=1
	incq	%rbx
	addl	%esi, %r11d
	cmpq	%rax, %rbx
	jne	.LBB31_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB31_7:                               # %._crit_edge31
	retq
.Lfunc_end31:
	.size	_Z10copy_imageiiPPfS0_P15HIP_vector_typeIfLj2EES3_, .Lfunc_end31-_Z10copy_imageiiPPfS0_P15HIP_vector_typeIfLj2EES3_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z23write_back_image_paddediiPPhP15HIP_vector_typeIfLj2EE
.LCPI32_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI32_1:
	.long	0x437f0000                      # float 255
	.text
	.globl	_Z23write_back_image_paddediiPPhP15HIP_vector_typeIfLj2EE
	.type	_Z23write_back_image_paddediiPPhP15HIP_vector_typeIfLj2EE,@function
_Z23write_back_image_paddediiPPhP15HIP_vector_typeIfLj2EE: # @_Z23write_back_image_paddediiPPhP15HIP_vector_typeIfLj2EE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $esi killed $esi def $rsi
	movq	%rsi, (%rsp)                    # 8-byte Spill
                                        # kill: def $edi killed $edi def $rdi
	testl	%edi, %edi
	jle	.LBB32_9
# %bb.1:                                # %.preheader.lr.ph
	movq	%rcx, %r12
	movq	%rdx, %r15
	movl	%edi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	shrl	%edi
	movq	(%rsp), %r9                     # 8-byte Reload
	leal	(%r9,%r9), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	%r9d, %eax
	shrl	$31, %eax
	addl	%r9d, %eax
	sarl	%eax
	movslq	%eax, %rsi
	movl	%r9d, %r14d
	movl	%edi, %eax
	imull	%r9d, %eax
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	leal	(%rsi,%rax,2), %r13d
	movaps	.LCPI32_0(%rip), %xmm1          # xmm1 = [NaN,NaN,NaN,NaN]
	movss	.LCPI32_1(%rip), %xmm2          # xmm2 = mem[0],zero,zero,zero
	xorl	%ebp, %ebp
	movq	%rdi, 24(%rsp)                  # 8-byte Spill
.LBB32_2:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB32_4 Depth 2
	cmpl	$0, (%rsp)                      # 4-byte Folded Reload
	jle	.LBB32_8
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB32_2 Depth=1
	xorl	%ebx, %ebx
.LBB32_4:                               #   Parent Loop BB32_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rbx,%r13), %eax
	cltq
	movss	(%r12,%rax,8), %xmm0            # xmm0 = mem[0],zero,zero,zero
	andps	%xmm1, %xmm0
	minss	%xmm2, %xmm0
	cvttss2si	%xmm0, %eax
	movq	(%r15,%rbp,8), %rsi
	movb	%al, (%rsi,%rbx)
	cmpq	%rdi, %rbp
	jne	.LBB32_7
# %bb.5:                                #   in Loop: Header=BB32_4 Depth=2
	cmpq	32(%rsp), %rbx                  # 8-byte Folded Reload
	jge	.LBB32_7
# %bb.6:                                #   in Loop: Header=BB32_4 Depth=2
	movq	(%r15,%rbp,8), %rax
	movzbl	(%rax,%rbx), %esi
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	movss	.LCPI32_1(%rip), %xmm2          # xmm2 = mem[0],zero,zero,zero
	movaps	.LCPI32_0(%rip), %xmm1          # xmm1 = [NaN,NaN,NaN,NaN]
	movq	24(%rsp), %rdi                  # 8-byte Reload
.LBB32_7:                               #   in Loop: Header=BB32_4 Depth=2
	incq	%rbx
	cmpq	%rbx, %r14
	jne	.LBB32_4
.LBB32_8:                               # %._crit_edge
                                        #   in Loop: Header=BB32_2 Depth=1
	incq	%rbp
	addq	8(%rsp), %r13                   # 8-byte Folded Reload
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB32_2
.LBB32_9:                               # %._crit_edge26
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end32:
	.size	_Z23write_back_image_paddediiPPhP15HIP_vector_typeIfLj2EE, .Lfunc_end32-_Z23write_back_image_paddediiPPhP15HIP_vector_typeIfLj2EE
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_
.LCPI33_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_
	.type	_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_,@function
_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_: # @_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r15
	movq	%rcx, %rbx
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r14
	movq	%rcx, %rsi
	movq	%rcx, %rdx
	movl	$-1, %ecx
	callq	hipfftExecC2C
	callq	hipDeviceSynchronize
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	movq	64(%rsp), %rdx
	movl	72(%rsp), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB33_2
# %bb.1:
	movl	%ebp, %eax
	imull	%r12d, %eax
	cvtsi2ss	%eax, %xmm1
	movss	.LCPI33_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	movl	%r12d, %edi
	movl	%ebp, %esi
	movq	%rbx, %rdx
	movq	%r15, %rcx
	callq	_Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
.LBB33_2:
	callq	hipDeviceSynchronize
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipfftExecC2C
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end33:
	.size	_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_, .Lfunc_end33-_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10printSliceiiP15HIP_vector_typeIfLj2EEiPKc # -- Begin function _Z10printSliceiiP15HIP_vector_typeIfLj2EEiPKc
	.type	_Z10printSliceiiP15HIP_vector_typeIfLj2EEiPKc,@function
_Z10printSliceiiP15HIP_vector_typeIfLj2EEiPKc: # @_Z10printSliceiiP15HIP_vector_typeIfLj2EEiPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movq	%rdx, %r14
	movl	%esi, %ebp
	movl	$.L.str.18, %edi
	movq	%r8, %rsi
	xorl	%eax, %eax
	callq	printf
	movslq	%ebx, %rax
	addl	$8, %ebx
	movslq	%ebx, %rbx
	movslq	%ebp, %rcx
	leaq	8(,%rcx,8), %r13
	shlq	$3, %rcx
	movq	%rcx, (%rsp)                    # 8-byte Spill
	imulq	%rax, %r13
	addq	%r14, %r13
	movq	%rax, %r12
	movq	%rax, %r14
.LBB34_1:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB34_2 Depth 2
	movq	%r13, %rbp
	movq	%r12, %r15
.LBB34_2:                               #   Parent Loop BB34_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp), %xmm0
	movl	$.L.str.19, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	addq	$8, %rbp
	cmpq	%rbx, %r15
	jl	.LBB34_2
# %bb.3:                                #   in Loop: Header=BB34_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	(%rsp), %r13                    # 8-byte Folded Reload
	cmpq	%rbx, %r14
	jl	.LBB34_1
# %bb.4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end34:
	.size	_Z10printSliceiiP15HIP_vector_typeIfLj2EEiPKc, .Lfunc_end34-_Z10printSliceiiP15HIP_vector_typeIfLj2EEiPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z14printSliceRealiiPfiPKc      # -- Begin function _Z14printSliceRealiiPfiPKc
	.type	_Z14printSliceRealiiPfiPKc,@function
_Z14printSliceRealiiPfiPKc:             # @_Z14printSliceRealiiPfiPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movq	%rdx, %r14
	movl	%esi, %ebp
	movl	$.L.str.18, %edi
	movq	%r8, %rsi
	xorl	%eax, %eax
	callq	printf
	leal	-4(%rbx), %eax
	addl	$4, %ebx
	cltq
	movslq	%ebx, %rbx
	movslq	%ebp, %rcx
	leaq	4(,%rcx,4), %r13
	shlq	$2, %rcx
	movq	%rcx, (%rsp)                    # 8-byte Spill
	imulq	%rax, %r13
	addq	%r14, %r13
	movq	%rax, %r12
	movq	%rax, %r14
.LBB35_1:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB35_2 Depth 2
	movq	%r13, %rbp
	movq	%r12, %r15
.LBB35_2:                               #   Parent Loop BB35_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp), %xmm0
	movl	$.L.str.19, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	addq	$4, %rbp
	cmpq	%rbx, %r15
	jl	.LBB35_2
# %bb.3:                                #   in Loop: Header=BB35_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	(%rsp), %r13                    # 8-byte Folded Reload
	cmpq	%rbx, %r14
	jl	.LBB35_1
# %bb.4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end35:
	.size	_Z14printSliceRealiiPfiPKc, .Lfunc_end35-_Z14printSliceRealiiPfiPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z20printSliceScientificiiP15HIP_vector_typeIfLj2EEiPKc # -- Begin function _Z20printSliceScientificiiP15HIP_vector_typeIfLj2EEiPKc
	.type	_Z20printSliceScientificiiP15HIP_vector_typeIfLj2EEiPKc,@function
_Z20printSliceScientificiiP15HIP_vector_typeIfLj2EEiPKc: # @_Z20printSliceScientificiiP15HIP_vector_typeIfLj2EEiPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movq	%rdx, %r14
	movl	%esi, %ebp
	movl	$.L.str.18, %edi
	movq	%r8, %rsi
	xorl	%eax, %eax
	callq	printf
	movslq	%ebx, %rax
	addl	$8, %ebx
	movslq	%ebx, %rbx
	movslq	%ebp, %rcx
	leaq	8(,%rcx,8), %r13
	shlq	$3, %rcx
	movq	%rcx, (%rsp)                    # 8-byte Spill
	imulq	%rax, %r13
	addq	%r14, %r13
	movq	%rax, %r12
	movq	%rax, %r14
.LBB36_1:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB36_2 Depth 2
	movq	%r13, %rbp
	movq	%r12, %r15
.LBB36_2:                               #   Parent Loop BB36_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp), %xmm0
	movl	$.L.str.21, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	addq	$8, %rbp
	cmpq	%rbx, %r15
	jl	.LBB36_2
# %bb.3:                                #   in Loop: Header=BB36_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	(%rsp), %r13                    # 8-byte Folded Reload
	cmpq	%rbx, %r14
	jl	.LBB36_1
# %bb.4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end36:
	.size	_Z20printSliceScientificiiP15HIP_vector_typeIfLj2EEiPKc, .Lfunc_end36-_Z20printSliceScientificiiP15HIP_vector_typeIfLj2EEiPKc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12load_and_padPiS_PhS0_PP15HIP_vector_typeIfLj2EES4_
.LCPI37_0:
	.long	0x4652f000                      # float 13500
	.text
	.globl	_Z12load_and_padPiS_PhS0_PP15HIP_vector_typeIfLj2EES4_
	.type	_Z12load_and_padPiS_PhS0_PP15HIP_vector_typeIfLj2EES4_,@function
_Z12load_and_padPiS_PhS0_PP15HIP_vector_typeIfLj2EES4_: # @_Z12load_and_padPiS_PhS0_PP15HIP_vector_typeIfLj2EES4_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 40(%rsp)                   # 8-byte Spill
	movq	%r8, %r15
	movq	%r8, 32(%rsp)                   # 8-byte Spill
	movq	%rcx, %r14
	movq	%rsi, %rbp
	movq	%rdi, %r12
	movl	$.L.str.22, %edi
	movq	%r12, %rsi
	callq	_Z10read_imagePKcPiPh
	movq	%rax, %r13
	movl	$.L.str.23, %edi
	movq	%rbp, %rsi
	movq	%r14, %rdx
	callq	_Z10read_imagePKcPiPh
	movq	%rax, %rbp
	movl	(%r12), %eax
	movl	4(%r12), %ecx
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	movl	%ecx, (%rsp)                    # 4-byte Spill
	imull	%ecx, %eax
	movl	%eax, %ebx
	shll	$5, %ebx
	shll	$3, %eax
	movslq	%eax, %r14
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	%ebx, %r14
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	40(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	callq	hipDeviceSynchronize
	xorl	%ebx, %ebx
	movq	32(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	callq	hipDeviceSynchronize
	movl	4(%r12), %eax
	testl	%eax, %eax
	jle	.LBB37_6
# %bb.1:                                # %.preheader.lr.ph.i
	movl	(%r12), %ecx
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	addq	$4, %rsi
	addq	$4, %rdx
	movss	.LCPI37_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	xorl	%edi, %edi
	xorl	%r8d, %r8d
.LBB37_2:                               # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB37_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB37_5
# %bb.3:                                # %.lr.ph.i
                                        #   in Loop: Header=BB37_2 Depth=1
	movl	%edi, %r10d
	leaq	(%rsi,%r10,8), %r9
	leaq	(%rdx,%r10,8), %r10
	movq	(%r13,%r8,8), %r11
	movq	(%rbp,%r8,8), %r14
	xorl	%r15d, %r15d
.LBB37_4:                               #   Parent Loop BB37_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r11,%r15,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, -4(%r10,%r15,8)
	movl	%ebx, (%r10,%r15,8)
	movss	(%r14,%r15,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, -4(%r9,%r15,8)
	movl	%ebx, (%r9,%r15,8)
	incq	%r15
	cmpq	%r15, %rcx
	jne	.LBB37_4
.LBB37_5:                               # %._crit_edge.i
                                        #   in Loop: Header=BB37_2 Depth=1
	incq	%r8
	addl	%ecx, %edi
	cmpq	%rax, %r8
	jne	.LBB37_2
.LBB37_6:                               # %_Z10copy_imageiiPPfS0_P15HIP_vector_typeIfLj2EES3_.exit
	movabsq	$68719476752, %r13              # imm = 0x1000000010
	callq	hipDeviceSynchronize
	movl	(%r12), %eax
	movl	4(%r12), %ecx
	leal	15(%rcx), %ebp
	testl	%ecx, %ecx
	cmovnsl	%ecx, %ebp
	sarl	$4, %ebp
	leal	15(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	shlq	$32, %rcx
	orq	%rcx, %rbp
	movl	$1, %ebx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB37_8
# %bb.7:
	movl	(%r12), %esi
	movl	4(%r12), %edi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_
.LBB37_8:
	callq	hipDeviceSynchronize
	movl	(%r12), %esi
	movl	4(%r12), %edx
	leaq	80(%rsp), %r14
	movq	%r14, %rdi
	movl	$41, %ecx
	callq	hipfftPlan2d
	movq	(%r14), %rdi
	movq	8(%rsp), %rdx
	movq	%rdx, %rsi
	movl	$-1, %ecx
	callq	hipfftExecC2C
	movq	(%r14), %rdi
	movl	(%r12), %edx
	movl	4(%r12), %esi
	movq	24(%rsp), %rcx
	movq	8(%rsp), %r8
	movq	%rbp, 48(%rsp)
	movl	%ebx, 56(%rsp)
	movq	%r13, 64(%rsp)
	movl	%ebx, 72(%rsp)
	movq	64(%rsp), %rax
	movl	56(%rsp), %r9d
	movq	48(%rsp), %r10
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r9
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB37_10
# %bb.9:
	movq	24(%rsp), %rdx
	movq	32(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rcx
	movl	(%rsp), %edi                    # 4-byte Reload
	movl	4(%rsp), %esi                   # 4-byte Reload
	callq	_Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_
.LBB37_10:
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB37_12
# %bb.11:
	movq	16(%rsp), %rdx
	movq	40(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rcx
	movl	(%rsp), %edi                    # 4-byte Reload
	movl	4(%rsp), %esi                   # 4-byte Reload
	callq	_Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_
.LBB37_12:
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipfftDestroy
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end37:
	.size	_Z12load_and_padPiS_PhS0_PP15HIP_vector_typeIfLj2EES4_, .Lfunc_end37-_Z12load_and_padPiS_PhS0_PP15HIP_vector_typeIfLj2EES4_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z14run_admm_imagei
.LCPI38_0:
	.long	0x3827c5ac                      # float 3.9999999E-5
.LCPI38_1:
	.long	0x3727c5ac                      # float 9.99999974E-6
.LCPI38_2:
	.long	0x358637bd                      # float 9.99999997E-7
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI38_3:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.text
	.globl	_Z14run_admm_imagei
	.type	_Z14run_admm_imagei,@function
_Z14run_admm_imagei:                    # @_Z14run_admm_imagei
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$392, %rsp                      # imm = 0x188
	.cfi_def_cfa_offset 448
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, 128(%rsp)                 # 4-byte Spill
	movabsq	$68719476752, %r13              # imm = 0x1000000010
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	movl	$8, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$8, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$2, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$2, %edi
	callq	malloc
	leaq	184(%rsp), %r8
	leaq	224(%rsp), %r9
	movq	%rbx, %rdi
	movq	%r14, 312(%rsp)                 # 8-byte Spill
	movq	%r14, %rsi
	movq	%r15, 208(%rsp)                 # 8-byte Spill
	movq	%r15, %rdx
	movq	%rax, 304(%rsp)                 # 8-byte Spill
	movq	%rax, %rcx
	callq	_Z12load_and_padPiS_PhS0_PP15HIP_vector_typeIfLj2EES4_
	movslq	(%rbx), %r15
	movq	%rbx, 320(%rsp)                 # 8-byte Spill
	movslq	4(%rbx), %rax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	leal	(%rax,%rax), %r12d
	leaq	(%r15,%r15), %rbx
	movl	%r12d, %eax
	imull	%ebx, %eax
	movslq	%eax, %rbp
	leaq	(,%rbp,8), %r14
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	movl	$.L.str.27, %edi
	movq	%r14, 136(%rsp)                 # 8-byte Spill
	movl	%r14d, %esi
	movq	%r15, %r14
	xorl	%eax, %eax
	callq	printf
	movq	%rbp, 296(%rsp)                 # 8-byte Spill
	shlq	$35, %rbp
	sarq	$32, %rbp
	leaq	120(%rsp), %r15
	movq	%r15, %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	88(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	80(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	72(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	64(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	56(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	48(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	176(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	callq	hipDeviceSynchronize
	movl	$.Lstr.10, %edi
	callq	puts@PLT
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	leaq	88(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	leaq	16(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	leaq	80(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	leaq	72(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	leaq	64(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	leaq	48(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	leaq	8(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, 104(%rsp)                 # 8-byte Spill
	movq	%rbp, %rdx
	callq	hipMemset
	callq	hipDeviceSynchronize
	movl	$.Lstr.11, %edi
	callq	puts@PLT
	movq	96(%rsp), %rax                  # 8-byte Reload
	leal	7(%rax), %ebp
	testq	%rax, %rax
	cmovnsl	%eax, %ebp
	movq	%rax, %rcx
	sarl	$3, %ebp
	leal	7(%r14), %eax
	testq	%r14, %r14
	cmovnsl	%r14d, %eax
	movl	%ecx, %ecx
	movq	%rcx, 144(%rsp)                 # 8-byte Spill
	sarl	$3, %eax
	shlq	$32, %rax
	orq	%rax, %rbp
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_2
# %bb.1:
	movq	224(%rsp), %rdx
	movq	40(%rsp), %rcx
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_
.LBB38_2:
	movq	%r14, 200(%rsp)                 # 8-byte Spill
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_4
# %bb.3:
	movq	176(%rsp), %rdx
	movq	40(%rsp), %rcx
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_
.LBB38_4:
	callq	hipDeviceSynchronize
	movl	$.Lstr.12, %edi
	callq	puts@PLT
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%ebx, %edx
	movl	$41, %ecx
	callq	hipfftPlan2d
	movq	(%r15), %rdi
	movq	40(%rsp), %rdx
	movq	%rdx, %rsi
	movl	$-1, %ecx
	callq	hipfftExecC2C
	movq	(%r15), %rdi
	movq	176(%rsp), %rdx
	movq	%rdx, %rsi
	movl	$-1, %ecx
	callq	hipfftExecC2C
	movq	96(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,8), %rdi
	callq	malloc
	movq	%rax, %rdx
	movq	144(%rsp), %rdi                 # 8-byte Reload
	testl	%edi, %edi
	movq	200(%rsp), %r14                 # 8-byte Reload
	movq	%rax, 216(%rsp)                 # 8-byte Spill
	jle	.LBB38_7
# %bb.5:                                # %.lr.ph
	xorl	%r15d, %r15d
.LBB38_6:                               # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	callq	malloc
	movq	216(%rsp), %rdx                 # 8-byte Reload
	movq	144(%rsp), %rdi                 # 8-byte Reload
	movq	%rax, (%rdx,%r15,8)
	incq	%r15
	cmpq	%r15, %rdi
	jne	.LBB38_6
.LBB38_7:                               # %._crit_edge
	movq	184(%rsp), %rcx
                                        # kill: def $edi killed $edi killed $rdi
	movl	%r14d, %esi
	movq	%rdx, %r15
	callq	_Z23write_back_image_paddediiPPhP15HIP_vector_typeIfLj2EE
	callq	hipDeviceSynchronize
	movq	208(%rsp), %rax                 # 8-byte Reload
	movzbl	(%rax), %r8d
	movzbl	1(%rax), %r9d
	movl	$.L.str.31, %edi
	movq	%r15, %rsi
	movl	%r14d, %edx
	movq	96(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r8d, 196(%rsp)                 # 4-byte Spill
	movl	%r9d, 192(%rsp)                 # 4-byte Spill
	callq	_Z11write_imagePKcPPhiihh
	movq	296(%rsp), %rsi                 # 8-byte Reload
	shlq	$2, %rsi
	leaq	168(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	152(%rsp), %rdi
	movq	136(%rsp), %r14                 # 8-byte Reload
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	160(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	112(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_9
# %bb.8:
	movq	168(%rsp), %rdx
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z31__device_stub__compute_X_divmatiiPf
.LBB38_9:
	callq	hipDeviceSynchronize
	leaq	160(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	104(%rsp), %rdx                 # 8-byte Reload
	callq	hipMemset
	callq	hipDeviceSynchronize
	movq	(%r15), %rax
	movl	$1082130432, (%rax)             # imm = 0x40800000
	movq	(%r15), %rax
	movl	$-1082130432, %ecx              # imm = 0xBF800000
	movl	%ecx, 8(%rax)
	movl	%ecx, -8(%rax,%rbx,8)
	movq	(%r15), %rax
	movl	%ecx, (%rax,%rbx,8)
	movq	(%r15), %rax
	leal	-1(%r12), %edx
	imull	%ebx, %edx
	movslq	%edx, %rdx
	movl	%ecx, (%rax,%rdx,8)
	movq	32(%rsp), %rdi
	movq	(%r15), %rdx
	movq	%rdx, %rsi
	movl	$-1, %ecx
	callq	hipfftExecC2C
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_11
# %bb.10:
	movq	40(%rsp), %rdx
	movq	160(%rsp), %rcx
	movq	152(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
.LBB38_11:
	callq	hipDeviceSynchronize
	movl	128(%rsp), %r15d                # 4-byte Reload
	movslq	%r15d, %r14
	leaq	(,%r14,8), %rdi
	callq	malloc
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 136(%rsp)                 # 8-byte Spill
	testl	%r14d, %r14d
	jle	.LBB38_42
# %bb.12:                               # %.lr.ph654
	movl	%r15d, %eax
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	xorl	%r15d, %r15d
	movl	$1, %r14d
.LBB38_13:                              # =>This Inner Loop Header: Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_15
# %bb.14:                               #   in Loop: Header=BB38_13 Depth=1
	movq	112(%rsp), %rdx
	movq	64(%rsp), %rcx
	movq	88(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
.LBB38_15:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_17
# %bb.16:                               #   in Loop: Header=BB38_13 Depth=1
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
.LBB38_17:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rcx
	movq	40(%rsp), %r8
	movq	%rbp, 280(%rsp)
	movl	%r14d, 288(%rsp)
	movq	%r13, 376(%rsp)
	movl	%r14d, 384(%rsp)
	movq	376(%rsp), %rax
	movl	288(%rsp), %r9d
	movq	280(%rsp), %r10
	movl	%r12d, %esi
	movl	%ebx, %edx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r9
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_19
# %bb.18:                               #   in Loop: Header=BB38_13 Depth=1
	movq	168(%rsp), %rdx
	movq	72(%rsp), %rcx
	movq	8(%rsp), %r8
	movq	184(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	%r12d, %edi
	movl	%ebx, %esi
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB38_19:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_21
# %bb.20:                               #   in Loop: Header=BB38_13 Depth=1
	movq	80(%rsp), %rdx
	movq	56(%rsp), %rcx
	movq	48(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	movss	.LCPI38_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	callq	_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
.LBB38_21:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_23
# %bb.22:                               #   in Loop: Header=BB38_13 Depth=1
	movq	88(%rsp), %rdx
	movq	64(%rsp), %rcx
	movq	24(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	movss	.LCPI38_1(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	callq	_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
.LBB38_23:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_25
# %bb.24:                               #   in Loop: Header=BB38_13 Depth=1
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_
.LBB38_25:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_27
# %bb.26:                               #   in Loop: Header=BB38_13 Depth=1
	movq	120(%rsp), %rdx
	movq	72(%rsp), %rcx
	movq	24(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	movss	.LCPI38_2(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	callq	_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
.LBB38_27:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rcx
	movq	176(%rsp), %r8
	movq	%rbp, 264(%rsp)
	movl	%r14d, 272(%rsp)
	movq	%r13, 360(%rsp)
	movl	%r14d, 368(%rsp)
	movq	360(%rsp), %rax
	movl	272(%rsp), %r9d
	movq	264(%rsp), %r10
	movl	%r12d, %esi
	movl	%ebx, %edx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r9
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_29
# %bb.28:                               #   in Loop: Header=BB38_13 Depth=1
	movq	48(%rsp), %rdx
	movq	8(%rsp), %rcx
	movq	24(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
.LBB38_29:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	32(%rsp), %rdi
	movq	152(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	8(%rsp), %r9
	movq	16(%rsp), %rax
	movq	%rbp, 248(%rsp)
	movl	%r14d, 256(%rsp)
	movq	%r13, 344(%rsp)
	movl	%r14d, 352(%rsp)
	subq	$48, %rsp
	.cfi_adjust_cfa_offset 48
	movl	%r14d, 40(%rsp)
	movq	392(%rsp), %rdx
	movq	%rdx, 32(%rsp)
	movl	304(%rsp), %edx
	movl	%edx, 24(%rsp)
	movq	296(%rsp), %rdx
	movq	%rdx, 16(%rsp)
	movq	%rax, 8(%rsp)
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_Z8V_updateP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_S3_S3_S3_4dim3S4_
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_31
# %bb.30:                               #   in Loop: Header=BB38_13 Depth=1
	movq	56(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	80(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
.LBB38_31:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_33
# %bb.32:                               #   in Loop: Header=BB38_13 Depth=1
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
.LBB38_33:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rcx
	movq	40(%rsp), %r8
	movq	%rbp, 232(%rsp)
	movl	%r14d, 240(%rsp)
	movq	%r13, 328(%rsp)
	movl	%r14d, 336(%rsp)
	movq	328(%rsp), %rax
	movl	240(%rsp), %r9d
	movq	232(%rsp), %r10
	movl	%r12d, %esi
	movl	%ebx, %edx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r9
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	_Z7fourierP14hipfftHandle_tiiP15HIP_vector_typeIfLj2EES3_4dim3S4_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_35
# %bb.34:                               #   in Loop: Header=BB38_13 Depth=1
	movq	8(%rsp), %rdx
	movq	120(%rsp), %rcx
	movq	72(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
.LBB38_35:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_37
# %bb.36:                               #   in Loop: Header=BB38_13 Depth=1
	movq	16(%rsp), %rdx
	movq	112(%rsp), %rcx
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
.LBB38_37:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_39
# %bb.38:                               #   in Loop: Header=BB38_13 Depth=1
	movq	112(%rsp), %rdx
	movq	88(%rsp), %rcx
	movq	64(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
.LBB38_39:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB38_41
# %bb.40:                               #   in Loop: Header=BB38_13 Depth=1
	movq	16(%rsp), %rdx
	movq	80(%rsp), %rcx
	movq	56(%rsp), %r8
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
.LBB38_41:                              #   in Loop: Header=BB38_13 Depth=1
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	136(%rsp), %rax                 # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI38_3(%rip), %xmm0
	movq	104(%rsp), %rax                 # 8-byte Reload
	movsd	%xmm0, (%rax,%r15,8)
	incq	%r15
	cmpq	%r15, 128(%rsp)                 # 8-byte Folded Reload
	jne	.LBB38_13
.LBB38_42:                              # %._crit_edge655
	movq	16(%rsp), %rcx
	movq	96(%rsp), %rdi                  # 8-byte Reload
                                        # kill: def $edi killed $edi killed $rdi
	movq	200(%rsp), %rbx                 # 8-byte Reload
	movl	%ebx, %esi
	movq	216(%rsp), %r14                 # 8-byte Reload
	movq	%r14, %rdx
	callq	_Z23write_back_image_paddediiPPhP15HIP_vector_typeIfLj2EE
	callq	hipDeviceSynchronize
	movl	$.L.str.32, %edi
	movq	%r14, %rsi
	movl	%ebx, %edx
	movq	144(%rsp), %rcx                 # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	196(%rsp), %r8d                 # 4-byte Reload
	movl	192(%rsp), %r9d                 # 4-byte Reload
	callq	_Z11write_imagePKcPPhiihh
	movq	120(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	184(%rsp), %rdi
	callq	hipFree
	movq	224(%rsp), %rdi
	callq	hipFree
	movq	168(%rsp), %rdi
	callq	hipFree
	movq	152(%rsp), %rdi
	callq	hipFree
	movq	160(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rdi
	callq	hipFree
	movq	320(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	312(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	208(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	304(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipfftDestroy
	movq	104(%rsp), %rax                 # 8-byte Reload
	addq	$392, %rsp                      # imm = 0x188
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end38:
	.size	_Z14run_admm_imagei, .Lfunc_end38-_Z14run_admm_imagei
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	$200, %edi
	callq	_Z14run_admm_imagei
	movq	%rax, %rbx
	movl	$.L.str.33, %edx
	movl	$200, %edi
	movq	%rax, %rsi
	callq	_Z17write_test_resultiPdPc
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end39:
	.size	main, .Lfunc_end39-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB40_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB40_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10copy_arrayiiPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17copy_array_paddediiPfS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reverseiiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9normalizeiiP15HIP_vector_typeIfLj2EEf, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16compute_X_divmatiiPf, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %esi
	movl	$.L__unnamed_17, %edx
	movl	$.L__unnamed_17, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_, %esi
	movl	$.L__unnamed_18, %edx
	movl	$.L__unnamed_18, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %esi
	movl	$.L__unnamed_19, %edx
	movl	$.L__unnamed_19, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %esi
	movl	$.L__unnamed_20, %edx
	movl	$.L__unnamed_20, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %esi
	movl	$.L__unnamed_21, %edx
	movl	$.L__unnamed_21, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_, %esi
	movl	$.L__unnamed_22, %edx
	movl	$.L__unnamed_22, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_, %esi
	movl	$.L__unnamed_23, %edx
	movl	$.L__unnamed_23, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_24, %edx
	movl	$.L__unnamed_24, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_25, %edx
	movl	$.L__unnamed_25, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_26, %edx
	movl	$.L__unnamed_26, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_, %esi
	movl	$.L__unnamed_27, %edx
	movl	$.L__unnamed_27, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end40:
	.size	__hip_module_ctor, .Lfunc_end40-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB41_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB41_2:
	retq
.Lfunc_end41:
	.size	__hip_module_dtor, .Lfunc_end41-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10copy_arrayiiPfS_,@object    # @_Z10copy_arrayiiPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z10copy_arrayiiPfS_
	.p2align	3, 0x0
_Z10copy_arrayiiPfS_:
	.quad	_Z25__device_stub__copy_arrayiiPfS_
	.size	_Z10copy_arrayiiPfS_, 8

	.type	_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_,@object # @_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.size	_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z17copy_array_paddediiPfS_,@object # @_Z17copy_array_paddediiPfS_
	.globl	_Z17copy_array_paddediiPfS_
	.p2align	3, 0x0
_Z17copy_array_paddediiPfS_:
	.quad	_Z32__device_stub__copy_array_paddediiPfS_
	.size	_Z17copy_array_paddediiPfS_, 8

	.type	_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f,@object # @_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.globl	_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.p2align	3, 0x0
_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f:
	.quad	_Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.size	_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f, 8

	.type	_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_,@object # @_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z27__device_stub__matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.size	_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf,@object # @_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.globl	_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.p2align	3, 0x0
_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf:
	.quad	_Z27__device_stub__matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.size	_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf, 8

	.type	_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_,@object # @_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.size	_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_,@object # @_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_
	.size	_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_,@object # @_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z32__device_stub__circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.size	_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_,@object # @_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.size	_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z7reverseiiP15HIP_vector_typeIfLj2EES1_,@object # @_Z7reverseiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z7reverseiiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z7reverseiiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_
	.size	_Z7reverseiiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z9normalizeiiP15HIP_vector_typeIfLj2EEf,@object # @_Z9normalizeiiP15HIP_vector_typeIfLj2EEf
	.globl	_Z9normalizeiiP15HIP_vector_typeIfLj2EEf
	.p2align	3, 0x0
_Z9normalizeiiP15HIP_vector_typeIfLj2EEf:
	.quad	_Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf
	.size	_Z9normalizeiiP15HIP_vector_typeIfLj2EEf, 8

	.type	_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE,@object # @_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.globl	_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.p2align	3, 0x0
_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE:
	.quad	_Z40__device_stub__clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.size	_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE, 8

	.type	_Z16compute_X_divmatiiPf,@object # @_Z16compute_X_divmatiiPf
	.globl	_Z16compute_X_divmatiiPf
	.p2align	3, 0x0
_Z16compute_X_divmatiiPf:
	.quad	_Z31__device_stub__compute_X_divmatiiPf
	.size	_Z16compute_X_divmatiiPf, 8

	.type	_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_,@object # @_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	3, 0x0
_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_:
	.quad	_Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.size	_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_, 8

	.type	_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE,@object # @_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.globl	_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.p2align	3, 0x0
_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE:
	.quad	_Z38__device_stub__soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.size	_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE, 8

	.type	_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@object # @_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	3, 0x0
_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_:
	.quad	_Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.size	_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_, 8

	.type	_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_,@object # @_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.globl	_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.p2align	3, 0x0
_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_:
	.quad	_Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.size	_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_, 8

	.type	_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@object # @_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	3, 0x0
_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_:
	.quad	_Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.size	_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_, 8

	.type	_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@object # @_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	3, 0x0
_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_:
	.quad	_Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.size	_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_, 8

	.type	_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@object # @_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	3, 0x0
_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_:
	.quad	_Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.size	_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_, 8

	.type	_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@object # @_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	3, 0x0
_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_:
	.quad	_Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.size	_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_, 8

	.type	_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_,@object # @_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	3, 0x0
_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_:
	.quad	_Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.size	_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_, 8

	.type	_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_,@object # @_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.size	_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_,@object # @_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.size	_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_,@object # @_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z33__device_stub__matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.size	_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_,@object # @_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.globl	_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.p2align	3, 0x0
_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_:
	.quad	_Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.size	_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"rb"
	.size	.L.str, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"1.6.43"
	.size	.L.str.2, 7

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"This image have width %d and height %d\n"
	.size	.L.str.3, 40

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Writing file %s...\n"
	.size	.L.str.4, 20

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"wb"
	.size	.L.str.5, 3

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Creating %s.csv file\n"
	.size	.L.str.10, 22

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"w+"
	.size	.L.str.12, 3

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Num_Iterations, Time(s)\n"
	.size	.L.str.13, 25

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"%d,%.10g\n"
	.size	.L.str.15, 10

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"%s.csv file created\n"
	.size	.L.str.16, 21

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"%d "
	.size	.L.str.17, 4

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"%s:\n"
	.size	.L.str.18, 5

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"%6.3f "
	.size	.L.str.19, 7

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"%6.3e "
	.size	.L.str.21, 7

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"../image/cameraman.png"
	.size	.L.str.22, 23

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"../psf/psf_gaussian_3.png"
	.size	.L.str.23, 26

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"One array is of size %d\n"
	.size	.L.str.27, 25

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"../test/blurred/blurred3.png"
	.size	.L.str.31, 29

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"../test/recovered/ADMM_recovered3.png"
	.size	.L.str.32, 38

	.type	.L.str.33,@object               # @.str.33
.L.str.33:
	.asciz	"../test/CUDA_Result/ADMM_0_200_single.csv"
	.size	.L.str.33, 42

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10copy_arrayiiPfS_"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_2, 53

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17copy_array_paddediiPfS_"
	.size	.L__unnamed_3, 28

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f"
	.size	.L__unnamed_4, 51

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_5, 47

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf"
	.size	.L__unnamed_6, 45

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_7, 45

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_8, 43

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_9, 52

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_10, 61

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z7reverseiiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_11, 41

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z9normalizeiiP15HIP_vector_typeIfLj2EEf"
	.size	.L__unnamed_12, 41

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE"
	.size	.L__unnamed_13, 57

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z16compute_X_divmatiiPf"
	.size	.L__unnamed_14, 25

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_"
	.size	.L__unnamed_15, 54

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE"
	.size	.L__unnamed_16, 55

	.type	.L__unnamed_17,@object          # @16
.L__unnamed_17:
	.asciz	"_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_"
	.size	.L__unnamed_17, 45

	.type	.L__unnamed_18,@object          # @17
.L__unnamed_18:
	.asciz	"_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_"
	.size	.L__unnamed_18, 50

	.type	.L__unnamed_19,@object          # @18
.L__unnamed_19:
	.asciz	"_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_"
	.size	.L__unnamed_19, 45

	.type	.L__unnamed_20,@object          # @19
.L__unnamed_20:
	.asciz	"_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_"
	.size	.L__unnamed_20, 46

	.type	.L__unnamed_21,@object          # @20
.L__unnamed_21:
	.asciz	"_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_"
	.size	.L__unnamed_21, 48

	.type	.L__unnamed_22,@object          # @21
.L__unnamed_22:
	.asciz	"_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_"
	.size	.L__unnamed_22, 48

	.type	.L__unnamed_23,@object          # @22
.L__unnamed_23:
	.asciz	"_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_"
	.size	.L__unnamed_23, 51

	.type	.L__unnamed_24,@object          # @23
.L__unnamed_24:
	.asciz	"_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_24, 45

	.type	.L__unnamed_25,@object          # @24
.L__unnamed_25:
	.asciz	"_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_25, 46

	.type	.L__unnamed_26,@object          # @25
.L__unnamed_26:
	.asciz	"_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_26, 53

	.type	.L__unnamed_27,@object          # @26
.L__unnamed_27:
	.asciz	"_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_"
	.size	.L__unnamed_27, 61

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"That's not an png file"
	.size	.Lstr, 23

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Can't even open file pointer"
	.size	.Lstr.1, 29

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Stuck at pointer creation"
	.size	.Lstr.2, 26

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Error during end of write"
	.size	.Lstr.3, 26

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Error writing bytes"
	.size	.Lstr.4, 20

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Creating file pointer"
	.size	.Lstr.5, 22

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Starting to write actual file"
	.size	.Lstr.6, 30

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"Start to load image"
	.size	.Lstr.7, 20

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"Finished loading images"
	.size	.Lstr.8, 24

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"Started Allocation"
	.size	.Lstr.9, 19

	.type	.Lstr.10,@object                # @str.10
.Lstr.10:
	.asciz	"Finished Allocation"
	.size	.Lstr.10, 20

	.type	.Lstr.11,@object                # @str.11
.Lstr.11:
	.asciz	"Finished setting memory"
	.size	.Lstr.11, 24

	.type	.Lstr.12,@object                # @str.12
.Lstr.12:
	.asciz	"Transformation matrices ready"
	.size	.Lstr.12, 30

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__copy_arrayiiPfS_
	.addrsig_sym _Z33__device_stub__copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z32__device_stub__copy_array_paddediiPfS_
	.addrsig_sym _Z30__device_stub__multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.addrsig_sym _Z27__device_stub__matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z27__device_stub__matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.addrsig_sym _Z25__device_stub__matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z24__device_stub__circshiftiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z32__device_stub__circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z41__device_stub__circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z22__device_stub__reverseiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z24__device_stub__normalizeiiP15HIP_vector_typeIfLj2EEf
	.addrsig_sym _Z40__device_stub__clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.addrsig_sym _Z31__device_stub__compute_X_divmatiiPf
	.addrsig_sym _Z31__device_stub__compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z38__device_stub__soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.addrsig_sym _Z23__device_stub__U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z23__device_stub__X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.addrsig_sym _Z23__device_stub__W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z24__device_stub__Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z25__device_stub__Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z25__device_stub__Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z28__device_stub__r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z25__device_stub__calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z26__device_stub__psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z33__device_stub__matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z37__device_stub__matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.addrsig_sym longjmp
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10copy_arrayiiPfS_
	.addrsig_sym _Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z17copy_array_paddediiPfS_
	.addrsig_sym _Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.addrsig_sym _Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.addrsig_sym _Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z9circshiftiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z7reverseiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z9normalizeiiP15HIP_vector_typeIfLj2EEf
	.addrsig_sym _Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.addrsig_sym _Z16compute_X_divmatiiPf
	.addrsig_sym _Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.addrsig_sym _Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.addrsig_sym _Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.addrsig_sym _Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10copy_arrayiiPfS_    ; -- Begin function _Z10copy_arrayiiPfS_
	.globl	_Z10copy_arrayiiPfS_
	.p2align	8
	.type	_Z10copy_arrayiiPfS_,@function
_Z10copy_arrayiiPfS_:                   ; @_Z10copy_arrayiiPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s10, s9
	s_mul_i32 s9, s11, s0
	s_mul_i32 s10, s8, s3
	s_mov_b32 s11, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s13, 0
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v0, v3
	v_add_nc_u32_e32 v3, s9, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v6, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s5, v5, s0
	v_cmp_le_i32_e64 s0, s3, v3
	v_add_co_u32 v4, s1, s6, v4
	global_load_b32 v6, v[6:7], off
	v_add_co_ci_u32_e64 v5, s1, s7, v5, s1
	s_or_b32 s13, s0, s13
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_4
.LBB0_5:                                ; %Flow40
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v1, s8, v1
	v_add_nc_u32_e32 v0, s10, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s11, s0, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_2
.LBB0_6:                                ; %._crit_edge26
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10copy_arrayiiPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10copy_arrayiiPfS_, .Lfunc_end0-_Z10copy_arrayiiPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_,@function
_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_: ; @_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB1_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s10, s9
	s_mul_i32 s8, s11, s0
	s_mul_i32 s9, s1, s3
	s_mov_b32 s10, 0
.LBB1_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB1_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s12, 0
.LBB1_4:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v0, v3
	v_add_nc_u32_e32 v3, s8, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v6, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s5, v5, s0
	v_add_co_u32 v4, s0, s6, v4
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	global_load_b32 v8, v[6:7], off
	v_cmp_le_i32_e64 s0, s3, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_or_b32 s12, s0, s12
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	global_load_b32 v6, v[6:7], off offset:4
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v6, off offset:4
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB1_4
.LBB1_5:                                ; %Flow48
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s9, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s10, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_2
.LBB1_6:                                ; %._crit_edge34
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end1-_Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 348
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17copy_array_paddediiPfS_ ; -- Begin function _Z17copy_array_paddediiPfS_
	.globl	_Z17copy_array_paddediiPfS_
	.p2align	8
	.type	_Z17copy_array_paddediiPfS_,@function
_Z17copy_array_paddediiPfS_:            ; @_Z17copy_array_paddediiPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s9, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 24
	v_and_b32_e32 v1, 0x3ff, v0
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s14, s14, s8
	v_add_nc_u32_e32 v2, s14, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB2_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[4:5], 0x0
	s_lshr_b32 s4, s2, 31
	v_bfe_u32 v3, v0, 10, 10
	s_add_i32 s4, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshr_b32 s12, s4, 1
	s_load_b128 s[4:7], s[0:1], 0x8
	v_add3_u32 v4, s14, s12, v1
	s_lshr_b32 s0, s9, 16
	s_lshr_b32 s1, s3, 31
	s_mov_b32 s12, 0
	s_add_i32 s1, s3, s1
	v_mad_u64_u32 v[0:1], null, s15, s0, v[3:4]
	v_mul_lo_u32 v3, s3, v4
	v_mul_lo_u32 v1, s3, v2
	s_ashr_i32 s1, s1, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s10, s8
	v_lshl_add_u32 v3, v3, 1, s1
	s_mul_i32 s9, s8, s3
	s_mul_i32 s10, s11, s0
	s_lshl_b32 s11, s9, 1
.LBB2_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB2_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v4, v0
	s_mov_b32 s14, 0
.LBB2_4:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v1, v4
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, s0, s4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v6, s0, s5, v6, s0
	global_load_b32 v7, v[5:6], off
	v_add_nc_u32_e32 v5, v3, v4
	v_add_nc_u32_e32 v4, s10, v4
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e64 s0, s3, v4
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s14, s0, s14
	v_add_co_u32 v5, s1, s6, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s1, s7, v6, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v7, off
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB2_4
.LBB2_5:                                ; %Flow47
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v2, s8, v2
	v_add_nc_u32_e32 v1, s9, v1
	v_add_nc_u32_e32 v3, s11, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v2
	s_or_b32 s12, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB2_2
.LBB2_6:                                ; %._crit_edge31
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17copy_array_paddediiPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17copy_array_paddediiPfS_, .Lfunc_end2-_Z17copy_array_paddediiPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 412
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f ; -- Begin function _Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.globl	_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
	.p2align	8
	.type	_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f,@function
_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f: ; @_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB3_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s1, s[0:1], 0x18
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s10, s9
	s_mul_i32 s9, s11, s0
	s_mul_i32 s10, s8, s3
	s_mov_b32 s11, 0
.LBB3_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_4 Depth 2
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB3_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s13, 0
.LBB3_4:                                ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v0, v3
	v_add_nc_u32_e32 v3, s9, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v6, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s5, v5, s0
	v_add_co_u32 v4, s0, s6, v4
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	global_load_b64 v[8:9], v[6:7], off
	global_load_b64 v[4:5], v[4:5], off
	v_cmp_le_i32_e64 s0, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_or_b32 s13, s0, s13
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v10, v9, v5
	v_mul_f32_e32 v5, v8, v5
	v_fma_f32 v8, v8, v4, -v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v9, v4
	v_dual_mul_f32 v4, s1, v8 :: v_dual_mul_f32 v5, s1, v5
	global_store_b64 v[6:7], v[4:5], off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_4
.LBB3_5:                                ; %Flow70
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v1, s8, v1
	v_add_nc_u32_e32 v0, s10, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s11, s0, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB3_2
.LBB3_6:                                ; %._crit_edge50
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f, .Lfunc_end3-_Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_,@function
_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_: ; @_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB4_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s10, s9
	s_mul_i32 s8, s11, s0
	s_mul_i32 s9, s1, s3
	s_mov_b32 s10, 0
.LBB4_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_4 Depth 2
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB4_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB4_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s12, 0
.LBB4_4:                                ;   Parent Loop BB4_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v0, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v6, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s5, v5, s0
	v_add_co_u32 v4, s0, s6, v4
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	global_load_b64 v[8:9], v[6:7], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v4, v8, v4 :: v_dual_add_nc_u32 v3, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e64 s0, s3, v3
	v_sub_f32_e32 v5, v9, v5
	s_or_b32 s12, s0, s12
	global_store_b64 v[6:7], v[4:5], off
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB4_4
.LBB4_5:                                ; %Flow57
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s9, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s10, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB4_2
.LBB4_6:                                ; %._crit_edge39
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end4-_Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf ; -- Begin function _Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.globl	_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf
	.p2align	8
	.type	_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf,@function
_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf: ; @_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB5_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[8:9], s[4:5], 0x0
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x8
	s_load_b32 s1, s[0:1], 0x10
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s6, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s6, s8, s7
	s_mul_i32 s7, s9, s0
	s_mul_i32 s8, s6, s3
	s_mov_b32 s9, 0
.LBB5_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_4 Depth 2
	s_and_saveexec_b32 s10, vcc_lo
	s_cbranch_execz .LBB5_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s11, 0
.LBB5_4:                                ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v0, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v4, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
	global_load_b64 v[6:7], v[4:5], off
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v6, s1, v6 :: v_dual_add_nc_u32 v3, s7, v3
	v_cmp_le_i32_e64 s0, s3, v3
	v_mul_f32_e32 v7, s1, v7
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s11, s0, s11
	global_store_b64 v[4:5], v[6:7], off
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB5_4
.LBB5_5:                                ; %Flow43
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v1, s6, v1
	v_add_nc_u32_e32 v0, s8, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s9, s0, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB5_2
.LBB5_6:                                ; %._crit_edge29
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf, .Lfunc_end5-_Z12matrix_scaleiiP15HIP_vector_typeIfLj2EEf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_,@function
_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_: ; @_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s9, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 24
	v_and_b32_e32 v1, 0x3ff, v0
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s14, s14, s8
	v_add_nc_u32_e32 v2, s14, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB6_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[4:5], 0x0
	s_lshr_b32 s4, s2, 31
	v_bfe_u32 v3, v0, 10, 10
	s_add_i32 s4, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s12, s4, 1
	s_load_b128 s[4:7], s[0:1], 0x8
	v_add3_u32 v4, s14, s12, v1
	s_lshr_b32 s0, s9, 16
	s_lshr_b32 s1, s3, 31
	s_add_i32 s1, s3, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[0:1], null, s15, s0, v[3:4]
	v_mul_lo_u32 v3, s3, v4
	v_mul_lo_u32 v1, s3, v2
	s_ashr_i32 s9, s1, 1
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s10, s8
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v3, v3, 1, s9
	s_mul_i32 s8, s1, s3
	s_mul_i32 s9, s11, s0
	s_lshl_b32 s10, s8, 1
	s_mov_b32 s11, 0
.LBB6_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB6_4 Depth 2
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB6_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_mov_b32_e32 v4, v0
	s_mov_b32 s13, 0
.LBB6_4:                                ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v5, v1, v4
	v_add_nc_u32_e32 v7, v3, v4
	v_add_nc_u32_e32 v4, s9, v4
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v5, s0, s4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v6, s0, s5, v6, s0
	v_add_co_u32 v7, s0, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, s7, v8, s0
	global_load_b32 v9, v[5:6], off
	v_cmp_le_i32_e64 s0, s3, v4
	s_or_b32 s13, s0, s13
	s_waitcnt vmcnt(0)
	global_store_b32 v[7:8], v9, off
	global_load_b32 v5, v[5:6], off offset:4
	s_waitcnt vmcnt(0)
	global_store_b32 v[7:8], v5, off offset:4
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB6_4
.LBB6_5:                                ; %Flow55
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v2, s1, v2
	v_add_nc_u32_e32 v1, s8, v1
	v_add_nc_u32_e32 v3, s10, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v2
	s_or_b32 s11, s0, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB6_2
.LBB6_6:                                ; %._crit_edge39
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end6-_Z10matrix_padiiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 432
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z9circshiftiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_,@function
_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_: ; @_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s16, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB7_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[18:19], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_lshr_b32 s1, s2, 31
	s_lshr_b32 s8, s3, 31
	s_add_i32 s1, s2, s1
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_add_i32 s9, s3, s8
	s_ashr_i32 s8, s1, 1
	s_ashr_i32 s9, s9, 1
	s_mov_b32 s10, 0
	s_sub_i32 s11, 0, s9
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_sub_i32 s12, s3, s9
	s_sub_i32 s13, s2, s8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s18, s16
	s_mul_i32 s15, s19, s0
	s_mul_i32 s16, s14, s3
.LBB7_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB7_4 Depth 2
	s_and_saveexec_b32 s17, vcc_lo
	s_cbranch_execz .LBB7_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB7_2 Depth=1
	v_subrev_nc_u32_e32 v3, s8, v1
	v_add_nc_u32_e32 v4, s13, v1
	v_cmp_gt_i32_e64 s0, s8, v1
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v3, v3, s3
	v_mul_lo_u32 v4, v4, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v4, s0
	v_mov_b32_e32 v4, v2
.LBB7_4:                                ;   Parent Loop BB7_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v0, v4
	v_mov_b32_e32 v7, s12
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_add_co_u32 v5, s0, s4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s5, v6, s0
	v_cmp_gt_i32_e64 s0, s9, v4
	global_load_b64 v[5:6], v[5:6], off
	v_cndmask_b32_e64 v7, s11, v7, s0
	v_add3_u32 v7, v3, v7, v4
	v_add_nc_u32_e32 v4, s15, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_cmp_le_i32_e64 s0, s3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_or_b32 s18, s0, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s1, s6, v7
	v_add_co_ci_u32_e64 v8, s1, s7, v8, s1
	s_waitcnt vmcnt(0)
	global_store_b64 v[7:8], v[5:6], off
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB7_4
.LBB7_5:                                ; %Flow95
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	v_add_nc_u32_e32 v1, s14, v1
	v_add_nc_u32_e32 v0, s16, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s10, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB7_2
.LBB7_6:                                ; %._crit_edge76
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9circshiftiiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end7-_Z9circshiftiiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 456
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_,@function
_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_: ; @_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s16, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB8_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[18:19], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_lshr_b32 s1, s2, 31
	s_lshr_b32 s8, s3, 31
	s_add_i32 s1, s2, s1
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_add_i32 s9, s3, s8
	s_ashr_i32 s8, s1, 1
	s_ashr_i32 s9, s9, 1
	s_mov_b32 s10, 0
	s_sub_i32 s11, 0, s9
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_sub_i32 s12, s3, s9
	s_sub_i32 s13, s2, s8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s18, s16
	s_mul_i32 s15, s19, s0
	s_mul_i32 s16, s14, s3
.LBB8_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB8_4 Depth 2
	s_and_saveexec_b32 s17, vcc_lo
	s_cbranch_execz .LBB8_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_subrev_nc_u32_e32 v3, s8, v1
	v_add_nc_u32_e32 v4, s13, v1
	v_cmp_gt_i32_e64 s0, s8, v1
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v3, v3, s3
	v_mul_lo_u32 v4, v4, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v4, s0
	v_mov_b32_e32 v4, v2
.LBB8_4:                                ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v5, s12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s9, v4
	v_add_nc_u32_e32 v7, v0, v4
	v_cndmask_b32_e64 v5, s11, v5, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_add3_u32 v5, v3, v5, v4
	v_add_nc_u32_e32 v4, s15, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, s1, s6, v7
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v8, s1, s7, v8, s1
	v_add_co_u32 v5, s0, s4, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s5, v6, s0
	v_cmp_le_i32_e64 s0, s3, v4
	global_load_b64 v[5:6], v[5:6], off
	s_or_b32 s18, s0, s18
	s_waitcnt vmcnt(0)
	global_store_b64 v[7:8], v[5:6], off
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB8_4
.LBB8_5:                                ; %Flow94
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	v_add_nc_u32_e32 v1, s14, v1
	v_add_nc_u32_e32 v0, s16, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s10, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB8_2
.LBB8_6:                                ; %._crit_edge76
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end8-_Z17circshift_reverseiiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 456
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_,@function
_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_: ; @_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s16, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB9_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[18:19], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_lshr_b32 s1, s2, 31
	s_lshr_b32 s8, s3, 31
	s_add_i32 s1, s2, s1
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_add_i32 s9, s3, s8
	v_mov_b32_e32 v4, 0
	s_ashr_i32 s8, s1, 1
	s_ashr_i32 s9, s9, 1
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_sub_i32 s11, 0, s9
	s_sub_i32 s12, s3, s9
	s_sub_i32 s13, s2, s8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s18, s16
	s_mul_i32 s15, s19, s0
	s_mul_i32 s16, s14, s3
.LBB9_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB9_4 Depth 2
	s_and_saveexec_b32 s17, vcc_lo
	s_cbranch_execz .LBB9_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB9_2 Depth=1
	v_subrev_nc_u32_e32 v3, s8, v1
	v_dual_mov_b32 v6, v2 :: v_dual_add_nc_u32 v5, s13, v1
	v_cmp_gt_i32_e64 s0, s8, v1
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v3, v3, s3
	v_mul_lo_u32 v5, v5, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v3, v5, s0
.LBB9_4:                                ;   Parent Loop BB9_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v3, s12
	v_cmp_gt_i32_e64 s0, s9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, s11, v3, s0
	v_add3_u32 v7, v5, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s0, s4, v7
	v_add_co_ci_u32_e64 v8, s0, s5, v8, s0
	global_load_b32 v3, v[7:8], off
	v_add_nc_u32_e32 v7, v0, v6
	v_add_nc_u32_e32 v6, s15, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_cmp_le_i32_e64 s0, s3, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_or_b32 s18, s0, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s1, s6, v7
	v_add_co_ci_u32_e64 v8, s1, s7, v8, s1
	s_waitcnt vmcnt(0)
	global_store_b64 v[7:8], v[3:4], off
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB9_4
.LBB9_5:                                ; %Flow113
                                        ;   in Loop: Header=BB9_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	v_add_nc_u32_e32 v1, s14, v1
	v_add_nc_u32_e32 v0, s16, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s10, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB9_2
.LBB9_6:                                ; %._crit_edge92
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end9-_Z26circshift_reverse_and_realiiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 460
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z7reverseiiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z7reverseiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z7reverseiiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z7reverseiiP15HIP_vector_typeIfLj2EES1_,@function
_Z7reverseiiP15HIP_vector_typeIfLj2EES1_: ; @_Z7reverseiiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB10_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s10, s9
	s_mul_i32 s9, s11, s0
	s_mul_i32 s10, s8, s3
	s_mov_b32 s11, 0
.LBB10_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB10_4 Depth 2
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB10_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB10_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s13, 0
.LBB10_4:                               ;   Parent Loop BB10_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v0, v3
	v_add_nc_u32_e32 v3, s9, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v6, s0, s6, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s7, v5, s0
	v_cmp_le_i32_e64 s0, s3, v3
	v_add_co_u32 v4, s1, s4, v4
	global_load_b64 v[6:7], v[6:7], off
	v_add_co_ci_u32_e64 v5, s1, s5, v5, s1
	s_or_b32 s13, s0, s13
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v7, 0x80000000, v7
	global_store_b64 v[4:5], v[6:7], off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB10_4
.LBB10_5:                               ; %Flow44
                                        ;   in Loop: Header=BB10_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v1, s8, v1
	v_add_nc_u32_e32 v0, s10, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s11, s0, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB10_2
.LBB10_6:                               ; %._crit_edge28
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reverseiiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z7reverseiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end10-_Z7reverseiiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9normalizeiiP15HIP_vector_typeIfLj2EEf ; -- Begin function _Z9normalizeiiP15HIP_vector_typeIfLj2EEf
	.globl	_Z9normalizeiiP15HIP_vector_typeIfLj2EEf
	.p2align	8
	.type	_Z9normalizeiiP15HIP_vector_typeIfLj2EEf,@function
_Z9normalizeiiP15HIP_vector_typeIfLj2EEf: ; @_Z9normalizeiiP15HIP_vector_typeIfLj2EEf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB11_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[8:9], s[4:5], 0x0
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x8
	s_load_b32 s1, s[0:1], 0x10
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s6, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s6, s8, s7
	s_mul_i32 s7, s9, s0
	s_mul_i32 s8, s6, s3
	s_mov_b32 s9, 0
.LBB11_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB11_4 Depth 2
	s_and_saveexec_b32 s10, vcc_lo
	s_cbranch_execz .LBB11_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB11_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s11, 0
.LBB11_4:                               ;   Parent Loop BB11_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v0, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v4, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
	global_load_b64 v[6:7], v[4:5], off
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v6, s1, v6 :: v_dual_add_nc_u32 v3, s7, v3
	v_cmp_le_i32_e64 s0, s3, v3
	v_mul_f32_e32 v7, s1, v7
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s11, s0, s11
	global_store_b64 v[4:5], v[6:7], off
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB11_4
.LBB11_5:                               ; %Flow43
                                        ;   in Loop: Header=BB11_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v1, s6, v1
	v_add_nc_u32_e32 v0, s8, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s9, s0, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB11_2
.LBB11_6:                               ; %._crit_edge29
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9normalizeiiP15HIP_vector_typeIfLj2EEf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	_Z9normalizeiiP15HIP_vector_typeIfLj2EEf, .Lfunc_end11-_Z9normalizeiiP15HIP_vector_typeIfLj2EEf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE ; -- Begin function _Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.globl	_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
	.p2align	8
	.type	_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE,@function
_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE: ; @_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x1c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 16
	s_addc_u32 s3, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s12, v[3:4]
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB12_8
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[6:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[2:3], 0x0
	s_mul_i32 s2, s4, 3
	v_bfe_u32 v0, v0, 10, 10
	s_add_i32 s2, s2, 3
	s_lshr_b32 s13, s8, 16
	s_ashr_i32 s8, s2, 31
	s_ashr_i32 s3, s4, 31
	s_lshr_b32 s8, s8, 30
	v_mad_u64_u32 v[2:3], null, s15, s13, v[0:1]
	s_add_i32 s2, s2, s8
	s_lshr_b32 s3, s3, 30
	s_ashr_i32 s9, s2, 2
	s_mul_i32 s2, s5, 3
	s_add_i32 s3, s4, s3
	s_add_i32 s2, s2, 3
	s_ashr_i32 s8, s3, 2
	s_ashr_i32 s3, s5, 31
	s_ashr_i32 s10, s2, 31
	v_mul_lo_u32 v0, s5, v1
	s_lshr_b32 s3, s3, 30
	s_lshr_b32 s11, s10, 30
	v_cmp_gt_i32_e32 vcc_lo, s5, v2
	v_mov_b32_e32 v4, 0
	s_add_i32 s3, s5, s3
	s_add_i32 s2, s2, s11
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s0, s12
	s_ashr_i32 s10, s3, 2
	s_ashr_i32 s11, s2, 2
	s_mul_i32 s13, s1, s13
	s_mul_i32 s14, s12, s5
	s_mov_b32 s15, 0
.LBB12_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB12_4 Depth 2
	s_and_saveexec_b32 s16, vcc_lo
	s_cbranch_execz .LBB12_7
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB12_2 Depth=1
	v_cmp_gt_i32_e64 s0, s8, v1
	v_cmp_le_i32_e64 s1, s9, v1
	v_mov_b32_e32 v7, v2
	s_mov_b32 s17, 0
.LBB12_4:                               ;   Parent Loop BB12_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v5, v0, v7
	v_cmp_gt_i32_e64 s2, s10, v7
	v_mov_b32_e32 v3, 0
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 s3, s1, s2
	v_cmp_gt_i32_e64 s2, s11, v7
	s_or_b32 s18, s0, s3
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s3, s6, v5
	v_add_co_ci_u32_e64 v6, s3, s7, v6, s3
	s_xor_b32 s3, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s3, s2
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB12_6
; %bb.5:                                ;   in Loop: Header=BB12_4 Depth=2
	global_load_b32 v3, v[5:6], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v3, 4.0, v3
.LBB12_6:                               ;   in Loop: Header=BB12_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v7, s13, v7
	global_store_b64 v[5:6], v[3:4], off
	v_cmp_le_i32_e64 s2, s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s17, s2, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB12_4
.LBB12_7:                               ; %Flow57
                                        ;   in Loop: Header=BB12_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v1, s12, v1
	v_add_nc_u32_e32 v0, s14, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s4, v1
	s_or_b32 s15, s0, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB12_2
.LBB12_8:                               ; %._crit_edge44
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end12:
	.size	_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE, .Lfunc_end12-_Z25clear_padding_and_restoreiiP15HIP_vector_typeIfLj2EE
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 460
; NumSgprs: 21
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16compute_X_divmatiiPf ; -- Begin function _Z16compute_X_divmatiiPf
	.globl	_Z16compute_X_divmatiiPf
	.p2align	8
	.type	_Z16compute_X_divmatiiPf,@function
_Z16compute_X_divmatiiPf:               ; @_Z16compute_X_divmatiiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x1c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 16
	s_addc_u32 s3, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s12, v[3:4]
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB13_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[6:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[2:3], 0x0
	s_mul_i32 s2, s4, 3
	v_bfe_u32 v0, v0, 10, 10
	s_add_i32 s2, s2, 3
	s_lshr_b32 s13, s8, 16
	s_ashr_i32 s8, s2, 31
	s_ashr_i32 s3, s4, 31
	s_lshr_b32 s8, s8, 30
	v_mad_u64_u32 v[2:3], null, s15, s13, v[0:1]
	s_add_i32 s2, s2, s8
	s_lshr_b32 s3, s3, 30
	s_ashr_i32 s9, s2, 2
	s_mul_i32 s2, s5, 3
	s_add_i32 s3, s4, s3
	s_add_i32 s2, s2, 3
	s_ashr_i32 s8, s3, 2
	s_ashr_i32 s3, s5, 31
	s_ashr_i32 s10, s2, 31
	v_mul_lo_u32 v0, s5, v1
	s_lshr_b32 s3, s3, 30
	s_lshr_b32 s11, s10, 30
	v_cmp_gt_i32_e32 vcc_lo, s5, v2
	v_mov_b32_e32 v3, 0x3f7ffff0
	s_add_i32 s3, s5, s3
	s_add_i32 s2, s2, s11
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s0, s12
	s_ashr_i32 s10, s3, 2
	s_ashr_i32 s11, s2, 2
	s_mul_i32 s13, s1, s13
	s_mul_i32 s14, s12, s5
	s_mov_b32 s15, 0
.LBB13_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB13_4 Depth 2
	s_and_saveexec_b32 s16, vcc_lo
	s_cbranch_execz .LBB13_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB13_2 Depth=1
	v_cmp_gt_i32_e64 s0, s8, v1
	v_cmp_le_i32_e64 s1, s9, v1
	v_mov_b32_e32 v4, v2
	s_mov_b32 s17, 0
.LBB13_4:                               ;   Parent Loop BB13_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v5, v0, v4
	v_cmp_gt_i32_e64 s3, s11, v4
	v_cmp_gt_i32_e64 s2, s10, v4
	v_add_nc_u32_e32 v4, s13, v4
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, 0x49742400, v3, s3
	s_or_b32 s3, s1, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e64 s2, s5, v4
	s_or_b32 s3, s0, s3
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_cndmask_b32_e64 v7, v7, 0x49742400, s3
	s_or_b32 s17, s2, s17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s3, s6, v5
	v_add_co_ci_u32_e64 v6, s3, s7, v6, s3
	global_store_b32 v[5:6], v7, off
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB13_4
.LBB13_5:                               ; %Flow45
                                        ;   in Loop: Header=BB13_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v1, s12, v1
	v_add_nc_u32_e32 v0, s14, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s4, v1
	s_or_b32 s15, s0, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB13_2
.LBB13_6:                               ; %._crit_edge34
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16compute_X_divmatiiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end13:
	.size	_Z16compute_X_divmatiiPf, .Lfunc_end13-_Z16compute_X_divmatiiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 444
; NumSgprs: 20
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_ ; -- Begin function _Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	8
	.type	_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_: ; @_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s13, s[0:1], 0x2c
	s_load_b64 s[8:9], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s13, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s12, v[3:4]
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB14_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[16:17], s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[10:11], s[0:1], 0x18
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s1, s13, 16
	v_mov_b32_e32 v4, 0
	s_mov_b32 s14, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s15, s1, v[0:1]
	v_mul_lo_u32 v0, s9, v1
	v_cmp_gt_i32_e64 s0, s9, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s16, s12
	s_mul_i32 s12, s17, s1
	s_mul_i32 s13, s3, s9
.LBB14_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB14_4 Depth 2
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB14_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB14_2 Depth=1
	v_mov_b32_e32 v5, v2
	s_mov_b32 s16, 0
.LBB14_4:                               ;   Parent Loop BB14_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v0, v5
	v_add_nc_u32_e32 v5, s12, v5
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v8, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v10, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v7, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v11, v11, v11 :: v_dual_mul_f32 v12, v9, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, v10, v10
	v_mul_f32_e32 v3, v8, v9
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v3, v8, v9, -v3
	v_fmac_f32_e32 v12, v8, v8
	v_mul_f32_e32 v8, 0x4f800000, v11
	v_mul_f32_e32 v3, v3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v11, v8, vcc_lo
	v_sqrt_f32_e32 v10, v8
	s_waitcnt_depctr 0xfff
	v_dual_fmac_f32 v3, v12, v12 :: v_dual_add_nc_u32 v12, 1, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v9, 0x4f800000, v3
	v_cmp_gt_f32_e64 s1, 0xf800000, v3
	v_add_nc_u32_e32 v11, -1, v10
	v_fma_f32 v14, -v12, v10, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v9, s1
	v_fma_f32 v13, -v11, v10, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sqrt_f32_e32 v9, v3
	v_cmp_ge_f32_e64 s2, 0, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v10, v11, s2
	v_cmp_lt_f32_e64 s2, 0, v14
	v_cndmask_b32_e64 v10, v10, v12, s2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v15, -1, v9
	v_add_nc_u32_e32 v16, 1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v15, v9, v3
	v_cmp_ge_f32_e64 s2, 0, v11
	v_mul_f32_e32 v11, 0x37800000, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, -v16, v9, v3
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, v9, v15, s2
	v_cmp_lt_f32_e64 s2, 0, v13
	v_cmp_class_f32_e64 vcc_lo, v8, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, v9, v16, s2
	v_cndmask_b32_e32 v8, v10, v8, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v3, 0x260
	v_mul_f32_e32 v11, 0x37800000, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, v9, v11, s1
	v_mul_f32_e32 v8, 0x3727c5ac, v8
	v_cmp_le_i32_e64 s1, s9, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v9, v3, vcc_lo
	s_or_b32 s16, s1, s16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, 0x358637bd, v3
	v_add_f32_e32 v3, 0x3827c5ac, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v8, null, v3, v3, 1.0
	v_div_scale_f32 v10, vcc_lo, 1.0, v3, 1.0
	v_rcp_f32_e32 v9, v8
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v8, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v11, v9
	v_mul_f32_e32 v11, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v8, v11, v10
	v_fmac_f32_e32 v11, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v8, v11, v10
	v_div_fmas_f32 v8, v8, v9, v11
	v_add_co_u32 v6, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v3, v8, v3, 1.0
	global_store_b64 v[6:7], v[3:4], off
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB14_4
.LBB14_5:                               ; %Flow82
                                        ;   in Loop: Header=BB14_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	v_add_nc_u32_e32 v1, s3, v1
	v_add_nc_u32_e32 v0, s13, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_or_b32 s14, vcc_lo, s14
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB14_2
.LBB14_6:                               ; %._crit_edge61
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end14:
	.size	_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end14-_Z16compute_V_divmatiiP15HIP_vector_typeIfLj2EES1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 792
; NumSgprs: 20
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE ; -- Begin function _Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.globl	_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
	.p2align	8
	.type	_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE,@function
_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE: ; @_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 16
	s_addc_u32 s5, s1, 0
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB15_14
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[8:9], s[4:5], 0x0
	s_load_b64 s[4:5], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s6, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s8, s7
	s_mul_i32 s6, s9, s0
	s_mul_i32 s7, s1, s3
	s_mov_b32 s8, 0
.LBB15_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB15_4 Depth 2
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB15_13
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB15_2 Depth=1
	v_mov_b32_e32 v5, v2
	s_mov_b32 s10, 0
.LBB15_4:                               ;   Parent Loop BB15_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v0, v5
                                        ; implicit-def: $vgpr6
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v3, s0, s4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s5, v4, s0
	global_load_b32 v7, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e64 s0, 0, v7
	s_and_saveexec_b32 s11, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s11
; %bb.5:                                ;   in Loop: Header=BB15_4 Depth=2
	v_add_f32_e64 v6, 0xb8d1b717, -v7
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f32_e32 v6, 0, v6
	v_sub_f32_e32 v6, 0, v6
; %bb.6:                                ; %Flow40
                                        ;   in Loop: Header=BB15_4 Depth=2
	s_and_not1_saveexec_b32 s0, s0
; %bb.7:                                ;   in Loop: Header=BB15_4 Depth=2
	v_add_f32_e32 v6, 0xb8d1b717, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_max_f32_e32 v6, 0, v6
; %bb.8:                                ; %_ZL12thresholdingff.exit
                                        ;   in Loop: Header=BB15_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v7, v[3:4], off offset:4
	global_store_b32 v[3:4], v6, off
                                        ; implicit-def: $vgpr6
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s11, s0
	s_xor_b32 s0, exec_lo, s11
; %bb.9:                                ;   in Loop: Header=BB15_4 Depth=2
	v_add_f32_e64 v6, 0xb8d1b717, -v7
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f32_e32 v6, 0, v6
	v_sub_f32_e32 v6, 0, v6
; %bb.10:                               ; %Flow
                                        ;   in Loop: Header=BB15_4 Depth=2
	s_and_not1_saveexec_b32 s0, s0
; %bb.11:                               ;   in Loop: Header=BB15_4 Depth=2
	v_add_f32_e32 v6, 0xb8d1b717, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_max_f32_e32 v6, 0, v6
; %bb.12:                               ; %_ZL12thresholdingff.exit27
                                        ;   in Loop: Header=BB15_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v5, s6, v5
	global_store_b32 v[3:4], v6, off offset:4
	v_cmp_le_i32_e64 s0, s3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s10, s0, s10
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB15_4
.LBB15_13:                              ; %Flow42
                                        ;   in Loop: Header=BB15_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s7, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s8, s0, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_2
.LBB15_14:                              ; %._crit_edge30
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end15:
	.size	_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE, .Lfunc_end15-_Z23soft_thresh_specializediiP15HIP_vector_typeIfLj2EE
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 468
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_ ; -- Begin function _Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	8
	.type	_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_: ; @_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s10, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s11, s10, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s11, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB16_14
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[12:13], s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s10, s10, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s10, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s12, s11
	s_mul_i32 s10, s13, s10
	s_mul_i32 s11, s1, s3
	s_mov_b32 s12, 0
.LBB16_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB16_4 Depth 2
	s_and_saveexec_b32 s13, s0
	s_cbranch_execz .LBB16_13
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB16_2 Depth=1
	v_mov_b32_e32 v7, v2
	s_mov_b32 s14, 0
.LBB16_4:                               ;   Parent Loop BB16_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v0, v7
	s_mov_b32 s15, exec_lo
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v10, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v8, v[10:11], off
	global_load_b32 v9, v[5:6], off
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v12, null, 0x3727c5ac, 0x3727c5ac, v8
	v_div_scale_f32 v15, vcc_lo, v8, 0x3727c5ac, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v12, v13, 1.0
	v_fmac_f32_e32 v13, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, v15, v13
	v_fma_f32 v16, -v12, v14, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v16, v13
	v_fma_f32 v12, -v12, v14, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v12, v12, v13, v14
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	v_div_fixup_f32 v8, v12, 0x3727c5ac, v8
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v9, v9, v8
	global_store_b32 v[3:4], v9, off
	global_load_b32 v6, v[5:6], off offset:4
	global_load_b32 v8, v[10:11], off offset:4
                                        ; implicit-def: $vgpr5
	v_cmpx_nlt_f32_e32 0, v9
	s_xor_b32 s15, exec_lo, s15
; %bb.5:                                ;   in Loop: Header=BB16_4 Depth=2
	v_add_f32_e64 v5, 0xc1200000, -v9
                                        ; implicit-def: $vgpr9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f32_e32 v5, 0, v5
	v_sub_f32_e32 v5, 0, v5
; %bb.6:                                ; %Flow57
                                        ;   in Loop: Header=BB16_4 Depth=2
	s_and_not1_saveexec_b32 s15, s15
; %bb.7:                                ;   in Loop: Header=BB16_4 Depth=2
	v_add_f32_e32 v5, 0xc1200000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_max_f32_e32 v5, 0, v5
; %bb.8:                                ; %_ZL12thresholdingff.exit.i
                                        ;   in Loop: Header=BB16_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s15
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v9, null, 0x3727c5ac, 0x3727c5ac, v8
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	v_fmac_f32_e32 v10, v11, v10
	v_div_scale_f32 v11, vcc_lo, v8, 0x3727c5ac, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v11, v10
	v_fma_f32 v13, -v9, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v10
	v_fma_f32 v9, -v9, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v9, v9, v10, v12
	v_div_fixup_f32 v8, v9, 0x3727c5ac, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v6, v8
	v_cmpx_nlt_f32_e32 0, v8
	s_xor_b32 s15, exec_lo, s15
; %bb.9:                                ;   in Loop: Header=BB16_4 Depth=2
	v_add_f32_e64 v6, 0xc1200000, -v8
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f32_e32 v6, 0, v6
	v_sub_f32_e32 v6, 0, v6
; %bb.10:                               ; %Flow
                                        ;   in Loop: Header=BB16_4 Depth=2
	s_and_not1_saveexec_b32 s15, s15
; %bb.11:                               ;   in Loop: Header=BB16_4 Depth=2
	v_add_f32_e32 v6, 0xc1200000, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_max_f32_e32 v6, 0, v6
; %bb.12:                               ; %_ZL12ComplexThres15HIP_vector_typeIfLj2EEf.exit
                                        ;   in Loop: Header=BB16_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s15
	v_add_nc_u32_e32 v7, s10, v7
	global_store_b64 v[3:4], v[5:6], off
	v_cmp_le_i32_e32 vcc_lo, s3, v7
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB16_4
.LBB16_13:                              ; %Flow59
                                        ;   in Loop: Header=BB16_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_or_b32 s12, vcc_lo, s12
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB16_2
.LBB16_14:                              ; %._crit_edge40
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end16:
	.size	_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end16-_Z8U_updateiiP15HIP_vector_typeIfLj2EES1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 720
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_ ; -- Begin function _Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.globl	_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
	.p2align	8
	.type	_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_,@function
_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_: ; @_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
; %bb.0:
	s_clause 0x1
	s_load_b32 s17, s[0:1], 0x3c
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 48
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s17, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s16, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB17_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[18:19], s[4:5], 0x0
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b64 s[12:13], s[0:1], 0x28
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s17, 16
	v_mov_b32_e32 v4, 0
	s_mov_b32 s17, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s18, s16
	s_mul_i32 s15, s19, s0
	s_mul_i32 s16, s14, s3
.LBB17_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB17_4 Depth 2
	s_and_saveexec_b32 s18, vcc_lo
	s_cbranch_execz .LBB17_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB17_2 Depth=1
	v_mov_b32_e32 v5, v2
	s_mov_b32 s19, 0
.LBB17_4:                               ;   Parent Loop BB17_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v0, v5
	v_add_nc_u32_e32 v5, s15, v5
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 3, v[6:7]
	v_add_co_u32 v10, s0, s6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s7, v9, s0
	v_add_co_u32 v12, s0, s8, v8
	v_add_co_ci_u32_e64 v13, s0, s9, v9, s0
	v_add_co_u32 v14, s0, s10, v8
	global_load_b32 v3, v[10:11], off
	global_load_b32 v10, v[12:13], off
	v_add_co_ci_u32_e64 v15, s0, s11, v9, s0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v3, 0x358637bd, v10
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s0, s4, v6
	v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
	global_load_b32 v11, v[14:15], off
	global_load_b32 v12, v[6:7], off
	v_cmp_le_i32_e64 s0, s3, v5
	v_add_co_u32 v6, s1, s12, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s1, s13, v9, s1
	s_or_b32 s19, s0, s19
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v3, v12, v3
	global_store_b64 v[6:7], v[3:4], off
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB17_4
.LBB17_5:                               ; %Flow59
                                        ;   in Loop: Header=BB17_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v1, s14, v1
	v_add_nc_u32_e32 v0, s16, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s17, s0, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB17_2
.LBB17_6:                               ; %._crit_edge36
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end17:
	.size	_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_, .Lfunc_end17-_Z8X_updateiiPfP15HIP_vector_typeIfLj2EES2_S2_S2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 22
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_ ; -- Begin function _Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	8
	.type	_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_: ; @_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s11, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s11, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s10, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB18_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[12:13], s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s1, s11, 16
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s15, s1, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	v_cmp_gt_i32_e64 s0, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s12, s10
	s_mul_i32 s11, s13, s1
	s_mul_i32 s12, s10, s3
	s_mov_b32 s13, 0
.LBB18_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB18_4 Depth 2
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB18_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB18_2 Depth=1
	v_mov_b32_e32 v5, v2
	s_mov_b32 s15, 0
.LBB18_4:                               ;   Parent Loop BB18_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v0, v5
	v_add_nc_u32_e32 v5, s11, v5
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v8, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v3, v[8:9], off
	v_add_co_u32 v8, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v7, vcc_lo
	v_add_co_u32 v6, s1, s8, v6
	v_add_co_ci_u32_e64 v7, s1, s9, v7, s1
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v9, null, 0x3827c5ac, 0x3827c5ac, v3
	v_div_scale_f32 v12, vcc_lo, v3, 0x3827c5ac, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	v_fmac_f32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v12, v10
	v_fma_f32 v13, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v13, v10
	v_fma_f32 v9, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v9, v9, v10, v11
	v_cmp_le_i32_e32 vcc_lo, s3, v5
	v_div_fixup_f32 v3, v9, 0x3827c5ac, v3
	s_or_b32 s15, vcc_lo, s15
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v8
	v_max_f32_e32 v3, 0, v3
	global_store_b64 v[6:7], v[3:4], off
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB18_4
.LBB18_5:                               ; %Flow48
                                        ;   in Loop: Header=BB18_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v1, s10, v1
	v_add_nc_u32_e32 v0, s12, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_or_b32 s13, vcc_lo, s13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB18_2
.LBB18_6:                               ; %._crit_edge31
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end18:
	.size	_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end18-_Z8W_updateiiP15HIP_vector_typeIfLj2EES1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_ ; -- Begin function _Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	8
	.type	_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_: ; @_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s11, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s11, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s10, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB19_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[12:13], s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s11, 16
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s12, s10
	s_mul_i32 s10, s13, s0
	s_mul_i32 s11, s1, s3
	s_mov_b32 s12, 0
.LBB19_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB19_4 Depth 2
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB19_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB19_2 Depth=1
	v_mov_b32_e32 v5, v2
	s_mov_b32 s14, 0
.LBB19_4:                               ;   Parent Loop BB19_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v0, v5
	v_add_nc_u32_e32 v5, s10, v5
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v8, s0, s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s5, v7, s0
	v_add_co_u32 v10, s0, s6, v6
	v_add_co_ci_u32_e64 v11, s0, s7, v7, s0
	global_load_b32 v3, v[8:9], off
	global_load_b32 v10, v[10:11], off
	v_add_co_u32 v6, s0, s8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s9, v7, s0
	v_cmp_le_i32_e64 s0, s3, v5
	s_or_b32 s14, s0, s14
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v10, v3, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v3, 0x358637bd, v10
	global_store_b32 v[8:9], v3, off
	global_load_b32 v3, v[6:7], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v3, 0x358637bd, v10
	global_store_b64 v[6:7], v[3:4], off
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB19_4
.LBB19_5:                               ; %Flow53
                                        ;   in Loop: Header=BB19_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s12, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB19_2
.LBB19_6:                               ; %._crit_edge36
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end19:
	.size	_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end19-_Z9Xi_updateiiP15HIP_vector_typeIfLj2EES1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_ ; -- Begin function _Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	8
	.type	_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_: ; @_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s10, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s11, s10, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s11, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB20_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[12:13], s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s10, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s12, s11
	s_mul_i32 s10, s13, s0
	s_mul_i32 s11, s1, s3
	s_mov_b32 s12, 0
.LBB20_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB20_4 Depth 2
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB20_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB20_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s14, 0
.LBB20_4:                               ;   Parent Loop BB20_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v0, v3
	v_add_nc_u32_e32 v3, s10, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v6, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s5, v5, s0
	v_add_co_u32 v8, s0, s6, v4
	v_add_co_ci_u32_e64 v9, s0, s7, v5, s0
	v_add_co_u32 v4, s0, s8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s9, v5, s0
	global_load_b32 v12, v[6:7], off
	global_load_b32 v13, v[8:9], off
	global_load_b64 v[10:11], v[4:5], off
	v_cmp_le_i32_e64 s0, s3, v3
	s_or_b32 s14, s0, s14
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v12, v12, v13
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmamk_f32 v10, v12, 0x3727c5ac, v10
	global_store_b32 v[4:5], v10, off
	global_load_b32 v6, v[6:7], off offset:4
	global_load_b32 v7, v[8:9], off offset:4
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, 0x3727c5ac, v6
	global_store_b32 v[4:5], v11, off offset:4
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB20_4
.LBB20_5:                               ; %Flow55
                                        ;   in Loop: Header=BB20_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s12, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB20_2
.LBB20_6:                               ; %._crit_edge38
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end20:
	.size	_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end20-_Z10Eta_updateiiP15HIP_vector_typeIfLj2EES1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_ ; -- Begin function _Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	8
	.type	_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_: ; @_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s11, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s11, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s10, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB21_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[12:13], s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s11, 16
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s12, s10
	s_mul_i32 s10, s13, s0
	s_mul_i32 s11, s1, s3
	s_mov_b32 s12, 0
.LBB21_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB21_4 Depth 2
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB21_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB21_2 Depth=1
	v_mov_b32_e32 v5, v2
	s_mov_b32 s14, 0
.LBB21_4:                               ;   Parent Loop BB21_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v0, v5
	v_add_nc_u32_e32 v5, s10, v5
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v8, s0, s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s5, v7, s0
	v_add_co_u32 v10, s0, s6, v6
	v_add_co_ci_u32_e64 v11, s0, s7, v7, s0
	v_add_co_u32 v6, s0, s8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s9, v7, s0
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[10:11], off
	global_load_b32 v3, v[6:7], off
	v_cmp_le_i32_e64 s0, s3, v5
	s_or_b32 s14, s0, s14
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v8, v8, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v3, 0x3827c5ac, v8
	global_store_b64 v[6:7], v[3:4], off
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB21_4
.LBB21_5:                               ; %Flow49
                                        ;   in Loop: Header=BB21_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s12, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB21_2
.LBB21_6:                               ; %._crit_edge32
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end21:
	.size	_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end21-_Z10Rho_updateiiP15HIP_vector_typeIfLj2EES1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 392
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_ ; -- Begin function _Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.globl	_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
	.p2align	8
	.type	_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_,@function
_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_: ; @_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s10, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s11, s10, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s11, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB22_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[12:13], s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s10, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s12, s11
	s_mul_i32 s10, s13, s0
	s_mul_i32 s11, s1, s3
	s_mov_b32 s12, 0
.LBB22_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB22_4 Depth 2
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB22_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB22_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s14, 0
.LBB22_4:                               ;   Parent Loop BB22_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v0, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v6, s0, s6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s7, v5, s0
	v_add_co_u32 v8, s0, s8, v4
	v_add_co_ci_u32_e64 v9, s0, s9, v5, s0
	v_add_co_u32 v4, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[10:11], v[4:5], off
	s_waitcnt vmcnt(1)
	v_dual_add_f32 v6, v6, v8 :: v_dual_add_nc_u32 v3, s10, v3
	v_add_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e64 s0, s3, v3
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v6, v10, v6 :: v_dual_add_f32 v7, v11, v7
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s14, s0, s14
	global_store_b64 v[4:5], v[6:7], off
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB22_4
.LBB22_5:                               ; %Flow78
                                        ;   in Loop: Header=BB22_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s12, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB22_2
.LBB22_6:                               ; %._crit_edge55
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end22:
	.size	_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_, .Lfunc_end22-_Z13r_calculationiiP15HIP_vector_typeIfLj2EES1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 400
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_,@function
_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_: ; @_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB23_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s10, s9
	s_mul_i32 s9, s11, s0
	s_mul_i32 s10, s8, s3
	s_mov_b32 s11, 0
.LBB23_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB23_4 Depth 2
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB23_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB23_2 Depth=1
	v_cmp_eq_u32_e64 s0, 0, v1
	v_mul_lo_u32 v4, v1, s3
	v_mov_b32_e32 v5, v2
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v1, s2, s0
	v_add3_u32 v4, v4, s3, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, -1, v3
	v_mul_lo_u32 v3, v3, s3
.LBB23_4:                               ;   Parent Loop BB23_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v6, v0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v8, v3, v5
	v_cmp_eq_u32_e64 s0, 0, v5
	v_add_nc_u32_e32 v5, s9, v5
	v_add_nc_u32_e32 v10, -1, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v9, 31, v8
	v_ashrrev_i32_e32 v7, 31, v6
	v_cndmask_b32_e64 v10, v10, v4, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_co_u32 v8, s0, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v9, s0, s5, v9, s0
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	v_add_co_u32 v12, s0, s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v13, s0, s5, v7, s0
	v_add_co_u32 v6, s1, s6, v6
	v_add_co_u32 v10, s0, s4, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s5, v11, s0
	s_clause 0x2
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[12:13], off
	global_load_b32 v10, v[10:11], off
	v_cmp_le_i32_e64 s0, s3, v5
	v_add_co_ci_u32_e64 v7, s1, s7, v7, s1
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s13, s0, s13
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v8, v8, v9
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v9, v10, v9
	global_store_b64 v[6:7], v[8:9], off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB23_4
.LBB23_5:                               ; %Flow71
                                        ;   in Loop: Header=BB23_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v1, s8, v1
	v_add_nc_u32_e32 v0, s10, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s11, s0, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB23_2
.LBB23_6:                               ; %._crit_edge57
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end23:
	.size	_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end23-_Z10calc_psi_ViiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 508
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_,@function
_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_: ; @_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s11, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s8, s0, 24
	s_addc_u32 s9, s1, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s11, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s10, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB24_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[8:9], 0x0
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s9, s11, 16
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s15, s9, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_mov_b32 s15, 0
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s8, s4, 4
	s_mul_i32 s10, s0, s10
	s_mul_i32 s9, s1, s9
	s_addc_u32 s11, s5, 0
	s_add_i32 s12, s2, -1
	s_add_i32 s13, s3, -1
	s_mul_i32 s14, s10, s3
.LBB24_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB24_4 Depth 2
	s_and_saveexec_b32 s16, vcc_lo
	s_cbranch_execz .LBB24_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB24_2 Depth=1
	v_mul_lo_u32 v5, v1, s3
	v_cmp_ne_u32_e64 s0, s12, v1
	v_mov_b32_e32 v7, v2
	s_mov_b32 s17, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s3, v5
	v_cndmask_b32_e64 v6, 0, v3, s0
.LBB24_4:                               ;   Parent Loop BB24_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v3, 1, v7
	v_cmp_ne_u32_e64 s0, s13, v7
	v_add_nc_u32_e32 v8, v6, v7
	v_add_nc_u32_e32 v10, v0, v7
	v_add_nc_u32_e32 v7, s9, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, 0, v3, s0
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_nc_u32_e32 v12, v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v13, 31, v12
	v_add_co_u32 v8, s0, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v9, s0, s5, v9, s0
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v14, s0, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v15, s0, s5, v11, s0
	v_add_co_u32 v12, s0, s8, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s0, s11, v13, s0
	s_clause 0x2
	global_load_b32 v3, v[8:9], off
	global_load_b64 v[8:9], v[14:15], off
	global_load_b32 v12, v[12:13], off
	v_cmp_le_i32_e64 s0, s3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 s17, s0, s17
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v3, v3, v8 :: v_dual_sub_f32 v12, v12, v9
	v_add_co_u32 v8, s1, s6, v10
	v_add_co_ci_u32_e64 v9, s1, s7, v11, s1
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f32_e32 v3, v3, v12
	global_store_b64 v[8:9], v[3:4], off
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB24_4
.LBB24_5:                               ; %Flow66
                                        ;   in Loop: Header=BB24_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v1, s10, v1
	v_add_nc_u32_e32 v0, s14, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s15, s0, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB24_2
.LBB24_6:                               ; %._crit_edge52
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end24:
	.size	_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end24-_Z11psi_adjointiiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 516
; NumSgprs: 20
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_,@function
_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_: ; @_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB25_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s8, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s10, s9
	s_mul_i32 s8, s11, s0
	s_mul_i32 s9, s1, s3
	s_mov_b32 s10, 0
.LBB25_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB25_4 Depth 2
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB25_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB25_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s12, 0
.LBB25_4:                               ;   Parent Loop BB25_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v0, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v6, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s5, v5, s0
	v_add_co_u32 v4, s0, s6, v4
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[8:9], v[4:5], off
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v10, v6, v9 :: v_dual_add_nc_u32 v3, s8, v3
	v_mul_f32_e32 v11, v7, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e64 s0, s3, v3
	v_fmac_f32_e32 v10, v7, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v9, v6, v8, -v11
	s_or_b32 s12, s0, s12
	global_store_b64 v[4:5], v[9:10], off
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB25_4
.LBB25_5:                               ; %Flow54
                                        ;   in Loop: Header=BB25_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s9, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s10, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB25_2
.LBB25_6:                               ; %._crit_edge36
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end25:
	.size	_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end25-_Z18matrix_dot_productiiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_ ; -- Begin function _Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.globl	_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
	.p2align	8
	.type	_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_,@function
_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_: ; @_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s11, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s11, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s12, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB26_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[16:17], s[4:5], 0x0
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s10, s[0:1], 0x18
	s_load_b64 s[8:9], s[0:1], 0x20
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s0, s11, 16
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, s3, v1
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s16, s12
	s_mul_i32 s11, s17, s0
	s_mul_i32 s12, s1, s3
.LBB26_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB26_4 Depth 2
	s_and_saveexec_b32 s14, vcc_lo
	s_cbranch_execz .LBB26_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB26_2 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s15, 0
.LBB26_4:                               ;   Parent Loop BB26_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v0, v3
	v_add_nc_u32_e32 v3, s11, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v6, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s5, v5, s0
	v_add_co_u32 v8, s0, s8, v4
	v_add_co_ci_u32_e64 v9, s0, s9, v5, s0
	global_load_b32 v10, v[6:7], off
	v_add_co_u32 v4, s0, s6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	v_cmp_le_i32_e64 s0, s3, v3
	s_or_b32 s15, s0, s15
	s_waitcnt vmcnt(0)
	global_store_b32 v[8:9], v10, off
	global_load_b32 v6, v[6:7], off offset:4
	s_waitcnt vmcnt(0)
	global_store_b32 v[8:9], v6, off offset:4
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_fma_f32 v4, v10, s10, -v4
	v_fma_f32 v5, v6, s10, -v5
	global_store_b64 v[8:9], v[4:5], off
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB26_4
.LBB26_5:                               ; %Flow74
                                        ;   in Loop: Header=BB26_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v0, s12, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s13, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB26_2
.LBB26_6:                               ; %._crit_edge54
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end26:
	.size	_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_, .Lfunc_end26-_Z22matrix_scale_and_minusiiP15HIP_vector_typeIfLj2EES1_fS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 416
; NumSgprs: 20
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10copy_arrayiiPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10copy_arrayiiPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18copy_array_complexiiP15HIP_vector_typeIfLj2EES1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
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        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
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      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
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        .size:           4
        .value_kind:     hidden_block_count_z
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        .size:           2
        .value_kind:     hidden_group_size_x
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        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17copy_array_paddediiPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17copy_array_paddediiPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
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        .size:           4
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      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
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        .size:           2
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        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
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        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15multiply_kerneliiP15HIP_vector_typeIfLj2EES1_f.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
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        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12matrix_minusiiP15HIP_vector_typeIfLj2EES1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
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        .size:           4
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      - .offset:         38
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
