#include <stdio.h>
#include <cuda.h>
//#include "cuPrintf.cu"

/*
 * CUDA parallel factorial computing program by bahramwhh
 * Note : This program is only tested for n <= 21
 * because of my hardware constraints
 * 
 * comments in the code are for debuggin purpose only ;)
 * */

__global__ void fact(int *n, int *a, int *b, size_t *result)
{
    extern __shared__ size_t output[];
    int arrays_size = (*n)/2;
    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    
    // first round
    output[tid] = a[tid] * b[tid];
    
    // sync
    __syncthreads();
    //cuPrintf("First Round  [tid=%d] : output[%d] = %d \n", tid, tid, output[tid]);
    
    // other rounds
    for(int i=0; i < 5; i++)
    {
	if(!(tid%2) && output[tid] != 0) 
	{
	    int next_tid = tid+1;
	    while(next_tid < arrays_size && output[next_tid] == 0)
			next_tid++;
	    if(next_tid < arrays_size)
	    {
		//cuPrintf("Currently I want to multiply output[%d] (%d) * output[%d] (%d) = %d\n", tid, output[tid], next_tid, output[next_tid], output[tid]*output[next_tid]);
		size_t temp = output[next_tid];
		output[next_tid] = 0;
		if(output[tid] != 0) 
		{
		    //cuPrintf(" ************ I [tid=%d] made output[%d] to zero - output[%d]=%d, output[%d]=%d, temp=%d ***************\n", tid, next_tid, tid, output[tid], next_tid, output[next_tid], temp);
		    //__syncthreads();
		    output[tid] *= temp;
		    //cuPrintf("I made the changes : output[%d] (%d) * output[%d] (%d) = %d, temp=%d\n", tid, output[tid], next_tid, output[next_tid], output[tid]*output[next_tid], temp);
		}
		else
		    output[next_tid] = temp;
	    }

	}
	__syncthreads();
	//cuPrintf("Round[%d]  [tid=%d] : output[%d] = %lld \n", i+2, tid, tid, output[tid]);
    }
    
    if(*n % 2)
	output[0] *= (*n);
    
    *result = output[0];
}

int main(void)
{
    int *n, *dev_n, *a, *b, *dev_a, *dev_b;
    size_t *result, *dev_result;
    
    n = (int *)malloc(sizeof(int));
    result = (size_t *)malloc(sizeof(size_t));
    
    printf("Please enter your value to calculate it's factorial: \n");
    scanf("%d", n);
    
    if(*n == 1 || *n == 0 || *n == 2)
	printf("Result = %d\n", *n);
    else if(*n < 0)
	printf("Factorial input can't be negative ;)\n");
    else
    {
	int arrays_size = (*n)/2;
	
	cudaMalloc((void **)&dev_n, sizeof(int));
	cudaMalloc((void **)&dev_a, arrays_size * sizeof(int));
	cudaMalloc((void **)&dev_b, arrays_size * sizeof(int));
	cudaMalloc((void **)&dev_result, sizeof(size_t));
	
	a = (int *)malloc(arrays_size * sizeof(int));
	b = (int *)malloc(arrays_size * sizeof(int));
	
	for(int i=1, a_c=0, b_c=0; i <= *n; i++)
	{
	    if(i % 2)
		a[a_c++] = i;
	    else
		b[b_c++] = i;
	}
	
	cudaMemcpy(dev_n, n, sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(dev_a, a, arrays_size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(dev_b, b, arrays_size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(dev_result, result, sizeof(size_t), cudaMemcpyHostToDevice);
	
	clock_t start, stop;
	double t = 0.0;
	
	//cudaPrintfInit(); // needed for debuggin ;)
	fact<<<1, arrays_size, arrays_size*sizeof(size_t)>>>(dev_n, dev_a, dev_b, dev_result);
	//cudaPrintfDisplay(stdout, true);
	//cudaPrintfEnd();
	
	cudaMemcpy(result, dev_result, sizeof(size_t), cudaMemcpyDeviceToHost);
	
	printf("Result is %lu\n", *result);
	
	free(n);
	free(a);
	free(b);
	free(result);
	
	cudaFree(dev_n);
	cudaFree(dev_a);
	cudaFree(dev_b);
	cudaFree(dev_result);
	
    }
}
	.file	"tmpxft_003a8878_00000000-6_factorial_gpu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z4factPiS_S_PmPiS_S_Pm
	.type	_Z29__device_stub__Z4factPiS_S_PmPiS_S_Pm, @function
_Z29__device_stub__Z4factPiS_S_PmPiS_S_Pm:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4factPiS_S_Pm(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z4factPiS_S_PmPiS_S_Pm, .-_Z29__device_stub__Z4factPiS_S_PmPiS_S_Pm
	.globl	_Z4factPiS_S_Pm
	.type	_Z4factPiS_S_Pm, @function
_Z4factPiS_S_Pm:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z4factPiS_S_PmPiS_S_Pm
	.cfi_endproc
.LFE2053:
	.size	_Z4factPiS_S_Pm, .-_Z4factPiS_S_Pm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Please enter your value to calculate it's factorial: \n"
.LC1:
	.string	"%d"
.LC2:
	.string	"Result = %d\n"
.LC3:
	.string	"Factorial input can't be negative ;)\n"
.LC4:
	.string	"Result is %lu\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$8, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %r12
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	(%rbx), %edx
	cmpl	$2, %edx
	ja	.L9
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L10
.L9:
	testl	%edx, %edx
	jns	.L11
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L10
.L11:
	sarl	%edx
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	movslq	%edx, %r15
	call	cudaMalloc@PLT
	leaq	0(,%r15,4), %rax
	leaq	24(%rsp), %rdi
	movq	%r15, %rbp
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$8, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movl	(%rbx), %esi
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movq	%rax, %r13
	movl	$1, %eax
.L12:
	cmpl	%eax, %esi
	jl	.L19
	testb	$1, %al
	je	.L13
	movslq	%edx, %rdi
	incl	%edx
	movl	%eax, (%r14,%rdi,4)
	jmp	.L14
.L13:
	movslq	%ecx, %rdi
	incl	%ecx
	movl	%eax, 0(%r13,%rdi,4)
.L14:
	incl	%eax
	jmp	.L12
.L19:
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$4, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movl	%ebp, 60(%rsp)
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rdi
	movq	%rdi, 64(%rsp)
	movl	68(%rsp), %ecx
	movl	$1, %esi
	leaq	0(,%r15,8), %r8
	movq	60(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z29__device_stub__Z4factPiS_S_PmPiS_S_Pm
.L16:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$8, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	(%r12), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
.L10:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z4factPiS_S_Pm"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4factPiS_S_Pm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
//#include "cuPrintf.cu"

/*
 * CUDA parallel factorial computing program by bahramwhh
 * Note : This program is only tested for n <= 21
 * because of my hardware constraints
 * 
 * comments in the code are for debuggin purpose only ;)
 * */

__global__ void fact(int *n, int *a, int *b, size_t *result)
{
    extern __shared__ size_t output[];
    int arrays_size = (*n)/2;
    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    
    // first round
    output[tid] = a[tid] * b[tid];
    
    // sync
    __syncthreads();
    //cuPrintf("First Round  [tid=%d] : output[%d] = %d \n", tid, tid, output[tid]);
    
    // other rounds
    for(int i=0; i < 5; i++)
    {
	if(!(tid%2) && output[tid] != 0) 
	{
	    int next_tid = tid+1;
	    while(next_tid < arrays_size && output[next_tid] == 0)
			next_tid++;
	    if(next_tid < arrays_size)
	    {
		//cuPrintf("Currently I want to multiply output[%d] (%d) * output[%d] (%d) = %d\n", tid, output[tid], next_tid, output[next_tid], output[tid]*output[next_tid]);
		size_t temp = output[next_tid];
		output[next_tid] = 0;
		if(output[tid] != 0) 
		{
		    //cuPrintf(" ************ I [tid=%d] made output[%d] to zero - output[%d]=%d, output[%d]=%d, temp=%d ***************\n", tid, next_tid, tid, output[tid], next_tid, output[next_tid], temp);
		    //__syncthreads();
		    output[tid] *= temp;
		    //cuPrintf("I made the changes : output[%d] (%d) * output[%d] (%d) = %d, temp=%d\n", tid, output[tid], next_tid, output[next_tid], output[tid]*output[next_tid], temp);
		}
		else
		    output[next_tid] = temp;
	    }

	}
	__syncthreads();
	//cuPrintf("Round[%d]  [tid=%d] : output[%d] = %lld \n", i+2, tid, tid, output[tid]);
    }
    
    if(*n % 2)
	output[0] *= (*n);
    
    *result = output[0];
}

int main(void)
{
    int *n, *dev_n, *a, *b, *dev_a, *dev_b;
    size_t *result, *dev_result;
    
    n = (int *)malloc(sizeof(int));
    result = (size_t *)malloc(sizeof(size_t));
    
    printf("Please enter your value to calculate it's factorial: \n");
    scanf("%d", n);
    
    if(*n == 1 || *n == 0 || *n == 2)
	printf("Result = %d\n", *n);
    else if(*n < 0)
	printf("Factorial input can't be negative ;)\n");
    else
    {
	int arrays_size = (*n)/2;
	
	hipMalloc((void **)&dev_n, sizeof(int));
	hipMalloc((void **)&dev_a, arrays_size * sizeof(int));
	hipMalloc((void **)&dev_b, arrays_size * sizeof(int));
	hipMalloc((void **)&dev_result, sizeof(size_t));
	
	a = (int *)malloc(arrays_size * sizeof(int));
	b = (int *)malloc(arrays_size * sizeof(int));
	
	for(int i=1, a_c=0, b_c=0; i <= *n; i++)
	{
	    if(i % 2)
		a[a_c++] = i;
	    else
		b[b_c++] = i;
	}
	
	hipMemcpy(dev_n, n, sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(dev_a, a, arrays_size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(dev_b, b, arrays_size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(dev_result, result, sizeof(size_t), hipMemcpyHostToDevice);
	
	clock_t start, stop;
	double t = 0.0;
	
	//cudaPrintfInit(); // needed for debuggin ;)
	fact<<<1, arrays_size, arrays_size*sizeof(size_t)>>>(dev_n, dev_a, dev_b, dev_result);
	//cudaPrintfDisplay(stdout, true);
	//cudaPrintfEnd();
	
	hipMemcpy(result, dev_result, sizeof(size_t), hipMemcpyDeviceToHost);
	
	printf("Result is %lu\n", *result);
	
	free(n);
	free(a);
	free(b);
	free(result);
	
	hipFree(dev_n);
	hipFree(dev_a);
	hipFree(dev_b);
	hipFree(dev_result);
	
    }
}
	.text
	.file	"factorial_gpu.hip"
	.globl	_Z19__device_stub__factPiS_S_Pm # -- Begin function _Z19__device_stub__factPiS_S_Pm
	.type	_Z19__device_stub__factPiS_S_Pm,@function
_Z19__device_stub__factPiS_S_Pm:        # @_Z19__device_stub__factPiS_S_Pm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4factPiS_S_Pm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__factPiS_S_Pm, .Lfunc_end0-_Z19__device_stub__factPiS_S_Pm
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$8, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%r14), %r15d
	cmpq	$2, %r15
	ja	.LBB1_2
# %bb.1:
	movl	$.L.str.2, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_13
.LBB1_2:
	testl	%r15d, %r15d
	js	.LBB1_3
# %bb.4:
	shrl	%r15d
	leaq	32(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	(,%r15,4), %rbp
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r13
	movl	(%r14), %eax
	testl	%eax, %eax
	jle	.LBB1_10
# %bb.5:                                # %.lr.ph.preheader
	negl	%eax
	xorl	%ecx, %ecx
	movl	$1, %edx
	xorl	%esi, %esi
.LBB1_6:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	testb	$1, %dl
	jne	.LBB1_7
# %bb.8:                                #   in Loop: Header=BB1_6 Depth=1
	movl	%esi, %edi
	incl	%esi
	movq	%r13, %r8
                                        # kill: def $esi killed $esi def $rsi
	jmp	.LBB1_9
.LBB1_7:                                #   in Loop: Header=BB1_6 Depth=1
	movl	%ecx, %edi
	incl	%ecx
	movq	%r12, %r8
                                        # kill: def $ecx killed $ecx def $rcx
.LBB1_9:                                #   in Loop: Header=BB1_6 Depth=1
	movslq	%edi, %rdi
	movl	%edx, (%r8,%rdi,4)
	leal	(%rax,%rdx), %edi
	incl	%edi
                                        # kill: def $edx killed $edx killed $rdx
	incl	%edx
                                        # kill: def $edx killed $edx def $rdx
	cmpl	$1, %edi
	jne	.LBB1_6
.LBB1_10:                               # %._crit_edge
	movq	32(%rsp), %rdi
	movl	$4, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$8, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	(,%r15,8), %r8
	btsq	$32, %r15
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	$1, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z19__device_stub__factPiS_S_Pm
.LBB1_12:
	movq	8(%rsp), %rsi
	movl	$8, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rsi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%r14, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	jmp	.LBB1_13
.LBB1_3:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB1_13:
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4factPiS_S_Pm, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4factPiS_S_Pm,@object         # @_Z4factPiS_S_Pm
	.section	.rodata,"a",@progbits
	.globl	_Z4factPiS_S_Pm
	.p2align	3, 0x0
_Z4factPiS_S_Pm:
	.quad	_Z19__device_stub__factPiS_S_Pm
	.size	_Z4factPiS_S_Pm, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Result = %d\n"
	.size	.L.str.2, 13

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Result is %lu\n"
	.size	.L.str.4, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4factPiS_S_Pm"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Please enter your value to calculate it's factorial: "
	.size	.Lstr, 54

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Factorial input can't be negative ;)"
	.size	.Lstr.1, 37

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__factPiS_S_Pm
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4factPiS_S_Pm
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4factPiS_S_Pm         ; -- Begin function _Z4factPiS_S_Pm
	.globl	_Z4factPiS_S_Pm
	.p2align	8
	.type	_Z4factPiS_S_Pm,@function
_Z4factPiS_S_Pm:                        ; @_Z4factPiS_S_Pm
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b256 s[4:11], s[0:1], 0x0
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_or_b32_e32 v6, 1, v1
	v_lshl_add_u32 v7, v1, 3, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v8, 8, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v2, v[2:3], off
	s_load_b32 s0, s[4:5], 0x0
	v_and_b32_e32 v4, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s0, 31
	s_add_i32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s2, s0, 1
	v_cmp_le_i32_e64 s0, s2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_xor_b32 s3, s0, -1
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v2, v0
	v_mov_b32_e32 v0, 0
	v_ashrrev_i32_e32 v3, 31, v2
	ds_store_b64 v7, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_12
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	ds_load_b64 v[1:2], v7
	s_waitcnt lgkmcnt(0)
	v_cmp_ne_u64_e64 s0, 0, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s3
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_12
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v1, v6
	s_mov_b32 s7, 0
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $sgpr12
                                        ; implicit-def: $sgpr9
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b64 v[2:3], v4
	v_mov_b32_e32 v9, v4
	s_or_b32 s9, s9, exec_lo
	s_or_b32 s12, s12, exec_lo
	s_mov_b32 s13, exec_lo
                                        ; implicit-def: $vgpr4
	s_waitcnt lgkmcnt(0)
	v_cmpx_eq_u64_e32 0, v[2:3]
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v1, 1, v1
	v_add_nc_u32_e32 v4, 8, v9
	s_and_not1_b32 s12, s12, exec_lo
	s_and_not1_b32 s9, s9, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s0
; %bb.6:                                ; %Flow72
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s12
	s_or_b32 s7, s0, s7
	s_and_not1_b32 s0, s8, exec_lo
	s_and_b32 s8, s9, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s8, s0, s8
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_4
; %bb.7:                                ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_and_saveexec_b32 s0, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_12
; %bb.8:                                ; %.critedge
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_mov_b32_e32 v1, v0
	ds_store_b64 v9, v[0:1]
	ds_load_b64 v[4:5], v7
	s_waitcnt lgkmcnt(0)
	v_cmp_ne_u64_e64 s0, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s7, s0
	s_xor_b32 s0, exec_lo, s7
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mul_lo_u32 v1, v5, v2
	v_mul_lo_u32 v5, v4, v3
	v_mad_u64_u32 v[10:11], null, v4, v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v11, v11, v5, v1
	ds_store_b64 v7, v[10:11]
.LBB0_10:                               ; %Flow
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_1 Depth=1
	ds_store_b64 v9, v[2:3]
.LBB0_12:                               ; %.critedge35
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s1, s1, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s1, 5
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_1
; %bb.13:
	s_load_b32 s0, s[4:5], 0x0
	v_mov_b32_e32 v2, 0
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	s_bitcmp1_b32 s0, 0
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_15
; %bb.14:
	s_ashr_i32 s1, s0, 31
	v_mul_hi_u32 v3, v0, s0
	v_mul_lo_u32 v4, v0, s1
	v_mul_lo_u32 v1, v1, s0
	v_mul_lo_u32 v0, v0, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v4
	v_add_nc_u32_e32 v1, v3, v1
	ds_store_b64 v2, v[0:1]
.LBB0_15:
	global_store_b64 v2, v[0:1], s[10:11]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4factPiS_S_Pm
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4factPiS_S_Pm, .Lfunc_end0-_Z4factPiS_S_Pm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 672
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4factPiS_S_Pm
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4factPiS_S_Pm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
