#include <cuda.h>
#include <stdio.h>
#include <math.h>

#define NUM_BANKS 8
#define LOG_NUM_BANKS 3
#define CONFLICT_FREE_OFFSET(n) \
((n) >> NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))

// Print device properties
void printDevProp(cudaDeviceProp devProp)
{
    printf("Major revision number:         %d\n",  devProp.major);
    printf("Minor revision number:         %d\n",  devProp.minor);
    printf("Name:                          %s\n",  devProp.name);
    printf("Total global memory:           %u\n",  devProp.totalGlobalMem);
    printf("Total shared memory per block: %u\n",  devProp.sharedMemPerBlock);
    printf("Total registers per block:     %d\n",  devProp.regsPerBlock);
    printf("Warp size:                     %d\n",  devProp.warpSize);
    printf("Maximum memory pitch:          %u\n",  devProp.memPitch);
    printf("Maximum threads per block:     %d\n",  devProp.maxThreadsPerBlock);
    for (int i = 0; i < 3; ++i)
    printf("Maximum dimension %d of block:  %d\n", i, devProp.maxThreadsDim[i]);
    for (int i = 0; i < 3; ++i)
    printf("Maximum dimension %d of grid:   %d\n", i, devProp.maxGridSize[i]);
    printf("Clock rate:                    %d\n",  devProp.clockRate);
    printf("Total constant memory:         %u\n",  devProp.totalConstMem);
    printf("Texture alignment:             %u\n",  devProp.textureAlignment);
    printf("Concurrent copy and execution: %s\n",  (devProp.deviceOverlap ? "Yes" : "No"));
    printf("Number of multiprocessors:     %d\n",  devProp.multiProcessorCount);
    printf("Kernel execution timeout:      %s\n",  (devProp.kernelExecTimeoutEnabled ? "Yes" : "No"));
    return;
}

void proprietati()
{
        int devCount;
        cudaGetDeviceCount(&devCount);
        printf("Avem %d device-uri.\n", devCount);

        for (int i = 0; i < devCount; ++i)
        {
            // Get device properties
            printf("\nCUDA Device #%d\n", i);
            cudaDeviceProp devProp;
            cudaGetDeviceProperties(&devProp, i);
            printDevProp(devProp);
        }
}

__global__ void vecDiv(float *a, float *b, float *c, unsigned int n)
{
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] / b[id];
}

__global__ void vecProd(float *a, float *b, float *c, unsigned int n)
{
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] * b[id];
}

__global__ void vecAdd(float *a, float *b, float *c, unsigned int n)
{
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] + b[id];
}
__global__ void vecSub(float *a, float *b, float *c, unsigned int n)
{
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] - b[id];
}

__global__ void eulVector(float *a, float *b,float *c, unsigned int n)
{
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(id < n){
        c[id] = a[id] - b[id];
        c[id]*= c[id];
    }
}

__global__ void smallSum(unsigned char *out, unsigned char *in, int n)
{
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(threadIdx.x == 1023) {
        out[id/1024] = id;
    }
}

// reduction sum
__global__ void reductionSum(float *in_array, float *out_array, unsigned long size)
{
    extern __shared__ float shared[];

    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
    shared[tid] = in_array[i];
    __syncthreads();

    for(unsigned int s=blockDim.x/2; s>0; s>>=1) {
        if (tid < s) {
            shared[tid] += shared[tid + s];
        }
        __syncthreads();
    }

    if(tid==0) //first thread, last sum
    {
        out_array[blockIdx.x]=shared[0];
    }
}

__global__ void cumSum(float *in_array, float *out_array, unsigned long size)
{
    extern __shared__ float shared[];

    unsigned int tid = threadIdx.x;
    unsigned int b_offset = blockIdx.x * blockDim.x;
    unsigned int offset = 1;

    int i = tid;
    int j = tid + blockDim.x / 2;
    int offset_i = CONFLICT_FREE_OFFSET(i);
    int offset_j = CONFLICT_FREE_OFFSET(j);
    shared[i + offset_i] = in_array[i + b_offset];
    shared[j + offset_j] = in_array[j + b_offset];

    // scan up
    for (int s = (blockDim.x >> 1); s > 0; s >>= 1) {
        __syncthreads();

        if (tid < s) {
            int i = offset * (2 * tid + 1) - 1;
            int j = offset * (2 * tid + 2) - 1;
            i += CONFLICT_FREE_OFFSET(i);
            j += CONFLICT_FREE_OFFSET(j);
            shared[j] += shared[i];
        }
        offset <<= 1;
    }

    if (tid == 0) {
        shared[blockDim.x - 1 + CONFLICT_FREE_OFFSET(blockDim.x - 1)] =
            0;
    }
    // scan down
    for (int s = 1; s < blockDim.x; s <<= 1) {
        offset >>= 1;
        __syncthreads();

        if (tid < s) {
            int i = offset * (2 * tid + 1) - 1;
            int j = offset * (2 * tid + 2) - 1;
            i += CONFLICT_FREE_OFFSET(i);
            j += CONFLICT_FREE_OFFSET(j);
            float tmp = shared[i];
            shared[i] = shared[j];
            shared[j] += tmp;
        }
    }
    __syncthreads();
    out_array[i] = shared[i + offset_i];
    out_array[j] = shared[j + offset_j];
}

void test1(float *a, float *b, unsigned long n)
{
    float *d_a, *d_b, *d_rez;
    float *rez = (float*) malloc(n*sizeof(float));

    cudaMalloc((void **)&d_a,n*sizeof(float));
    cudaMalloc((void **)&d_b,n*sizeof(float));
    cudaMalloc((void **)&d_rez,n*sizeof(float));

    cudaMemcpy(d_a,a,n*sizeof(float),cudaMemcpyHostToDevice);
    cudaMemcpy(d_b,b,n*sizeof(float),cudaMemcpyHostToDevice);

    vecAdd<<<161,64>>>(d_a,d_b,d_rez,n);

    cudaMemcpy(rez,d_rez,10304*sizeof(float),cudaMemcpyDeviceToHost);

    printf("\n REZULTAT TEST: %f \n",rez[0]);

    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_rez);

    free(rez);
}

// a imagini
// b imagine
void euclideanNormAsync(float *a, float *b, unsigned long n, float *result, unsigned long nrPoze)
{
    float *d_a,*d_b,*d_rez,*d_temp;
    float *sum;

    cudaStream_t stream;

    cudaStreamCreate(&stream);

    cudaHostRegister((void **)&a, n*nrPoze*sizeof(float), cudaHostRegisterPortable);
    cudaHostAlloc((void **)&sum, nrPoze*sizeof(float), cudaHostAllocDefault);

    cudaMalloc((void **)&d_a,n*sizeof(float));
    cudaMalloc((void **)&d_b,n*sizeof(float));
    cudaMalloc((void **)&d_temp,n*sizeof(float));
    cudaMalloc((void **)&d_rez,(n/64+(256-n/64))*sizeof(float));

    //cudaMemcpy(d_a,a,n*sizeof(float),cudaMemcpyHostToDevice);
    cudaMemcpy(d_b,b,n*sizeof(float),cudaMemcpyHostToDevice);
    for(unsigned long int i=0, k=0; i<n, k< nrPoze; i+= n, k++)
    {
        cudaMemcpyAsync(d_a,a+i,n*sizeof(float),cudaMemcpyHostToDevice, stream);

        eulVector<<<n/64, 64, n*sizeof(float), stream>>>(d_a,d_b,d_temp, n);
        reductionSum<<<n/64, 64, n*sizeof(float), stream>>>(d_temp,d_rez, n);
        cudaMemsetAsync(d_rez+n/64,0,95*sizeof(float),stream);
        reductionSum<<<1,256, n*sizeof(float), stream>>>(d_rez,d_temp,n);
        //cumSum<<<n/64, n/64, n*sizeof(float)>>>(d_rez,d_temp, n/64);

        cudaMemcpyAsync(sum+k,d_temp,sizeof(float),cudaMemcpyDeviceToHost, stream);
    }



    cudaStreamSynchronize(stream);

    for(int i=0;i<nrPoze;i++)
    {
        result[i] = sum[i];
    }

    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_temp);
    cudaFree(d_rez);

    cudaFreeHost(sum);
    cudaHostUnregister(a);

    cudaStreamDestroy(stream);
}

// a imagini
// b imagine
void cityblockNormAsync(float *a, float *b, unsigned long n, float *result, unsigned long nrPoze)
{
    float *d_a,*d_b,*d_rez,*d_temp;
    float *sum;

    cudaStream_t stream;

    cudaStreamCreate(&stream);

    cudaHostRegister((void **)&a, n*nrPoze*sizeof(float), cudaHostRegisterPortable);
    cudaHostAlloc((void **)&sum, nrPoze*sizeof(float), cudaHostAllocDefault);

    cudaMalloc((void **)&d_a,n*sizeof(float));
    cudaMalloc((void **)&d_b,n*sizeof(float));
    cudaMalloc((void **)&d_temp,n*sizeof(float));
    cudaMalloc((void **)&d_rez,(n/64+(256-n/64))*sizeof(float));

    //cudaMemcpy(d_a,a,n*sizeof(float),cudaMemcpyHostToDevice);
    cudaMemcpy(d_b,b,n*sizeof(float),cudaMemcpyHostToDevice);
    for(unsigned long int i=0, k=0; i<n, k< nrPoze; i+= n, k++)
    {
        cudaMemcpyAsync(d_a,a+i,n*sizeof(float),cudaMemcpyHostToDevice, stream);

        vecSub<<<n/64, 64, n*sizeof(float), stream>>>(d_a,d_b,d_temp, n);
        reductionSum<<<n/64, 64, n*sizeof(float), stream>>>(d_temp,d_rez, n);
        cudaMemsetAsync(d_rez+n/64,0,95*sizeof(float),stream);
        reductionSum<<<1,256, n*sizeof(float), stream>>>(d_rez,d_temp,n);
        //cumSum<<<n/64, n/64, n*sizeof(float)>>>(d_rez,d_temp, n/64);

        cudaMemcpyAsync(sum+k,d_temp,sizeof(float),cudaMemcpyDeviceToHost, stream);
    }



    cudaStreamSynchronize(stream);

    for(int i=0;i<nrPoze;i++)
    {
        result[i] = sum[i];
    }
    //printf("%f ", min);

    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_temp);
    cudaFree(d_rez);

    cudaFreeHost(sum);
    cudaHostUnregister(a);

    cudaStreamDestroy(stream);
}

// a imagini
// b imagine
void cosNormAsync(float *a, float *b, unsigned long n, float *result, unsigned long nrPoze)
{
    float *d_a,*d_b,*d_rez,*d_temp;
    float *d_a1,*d_b1,*d_rez1, *d_temp1;
    float *d_a2,*d_b2,*d_rez2, *d_temp2;
    float *dotProd, *normA, *normB;

    cudaStream_t stream, stream1, stream2;

    cudaStreamCreate(&stream);
    cudaStreamCreate(&stream1);
    cudaStreamCreate(&stream2);

    cudaHostRegister((void **)&a, n*nrPoze*sizeof(float), cudaHostRegisterPortable);
    cudaHostAlloc((void **)&dotProd, nrPoze*sizeof(float), cudaHostAllocDefault);
    cudaHostAlloc((void **)&normA, nrPoze*sizeof(float), cudaHostAllocDefault);
    cudaHostAlloc((void **)&normB, nrPoze*sizeof(float), cudaHostAllocDefault);

    cudaMalloc((void **)&d_a,n*sizeof(float));
    cudaMalloc((void **)&d_b,n*sizeof(float));
    cudaMalloc((void **)&d_temp,n*sizeof(float));
    cudaMalloc((void **)&d_rez,(n/64+(256-n/64))*sizeof(float));

    cudaMalloc((void **)&d_a1,n*sizeof(float));
    cudaMalloc((void **)&d_b1,n*sizeof(float));
    cudaMalloc((void **)&d_temp1,n*sizeof(float));
    cudaMalloc((void **)&d_rez1,(n/64+(256-n/64))*sizeof(float));

    cudaMalloc((void **)&d_a2,n*sizeof(float));
    cudaMalloc((void **)&d_b2,n*sizeof(float));
    cudaMalloc((void **)&d_temp2,n*sizeof(float));
    cudaMalloc((void **)&d_rez2,(n/64+(256-n/64))*sizeof(float));

    //cudaMemcpy(d_a,a,n*sizeof(float),cudaMemcpyHostToDevice);
    cudaMemcpy(d_b,b,n*sizeof(float),cudaMemcpyHostToDevice);
    cudaMemcpy(d_b1,b,n*sizeof(float),cudaMemcpyHostToDevice);
    cudaMemcpy(d_b2,b,n*sizeof(float),cudaMemcpyHostToDevice);
    for(unsigned long int i=0, k=0; i<n, k< nrPoze; i+= n, k++)
    {
        cudaMemcpyAsync(d_a,a+i,n*sizeof(float),cudaMemcpyHostToDevice, stream);
        cudaMemcpyAsync(d_a1,a+i,n*sizeof(float),cudaMemcpyHostToDevice, stream1);
        cudaMemcpyAsync(d_a2,a+i,n*sizeof(float),cudaMemcpyHostToDevice, stream1);

        vecProd<<<n/64, 64, n*sizeof(float), stream>>>(d_a,d_b,d_temp, n);
        vecProd<<<n/64, 64, n*sizeof(float), stream1>>>(d_a1,d_a2,d_temp1, n);
        if(i==0)
        vecProd<<<n/64, 64, n*sizeof(float), stream2>>>(d_b1,d_b2,d_temp2, n);

        reductionSum<<<n/64, 64, n*sizeof(float), stream>>>(d_temp,d_rez, n);
        reductionSum<<<n/64, 64, n*sizeof(float), stream1>>>(d_temp1,d_rez1, n);
        if(i==0)
        reductionSum<<<n/64, 64, n*sizeof(float), stream2>>>(d_temp2,d_rez2, n);
        cudaMemsetAsync(d_rez+n/64,0,95*sizeof(float),stream);
        cudaMemsetAsync(d_rez1+n/64,0,95*sizeof(float),stream1);
        if(i==0)
        cudaMemsetAsync(d_rez2+n/64,0,95*sizeof(float),stream2);
        reductionSum<<<1,256, n*sizeof(float), stream>>>(d_rez,d_temp,n);
        reductionSum<<<1,256, n*sizeof(float), stream1>>>(d_rez1,d_temp1,n);
        if(i==0)
        reductionSum<<<1,256, n*sizeof(float), stream2>>>(d_rez2,d_temp2,n);

        // we now have in d_temp - dot product, d_temp1 - norm of a, d_temp2 norm of b

        cudaMemcpyAsync(dotProd+k,d_temp,sizeof(float),cudaMemcpyDeviceToHost, stream);
        cudaMemcpyAsync(normA+k,d_temp1,sizeof(float),cudaMemcpyDeviceToHost, stream1);
        cudaMemcpyAsync(normB+k,d_temp2,sizeof(float),cudaMemcpyDeviceToHost, stream2);
    }



    cudaStreamSynchronize(stream);
    cudaStreamSynchronize(stream1);
    cudaStreamSynchronize(stream2);

    for(int i=0;i<nrPoze;i++)
    {
        float calc = 1 - dotProd[i]/(sqrtf(normA[i])*sqrtf(normB[i]));
        result[i] = isnan(calc)?1:calc;
    }

    //printf("%f ",result[0]);

    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_temp);
    cudaFree(d_rez);

    cudaFree(d_a1);
    cudaFree(d_b2);
    cudaFree(d_temp1);
    cudaFree(d_rez1);

    cudaFree(d_a2);
    cudaFree(d_b2);
    cudaFree(d_temp2);
    cudaFree(d_rez2);

    cudaFreeHost(dotProd);
    cudaFreeHost(normA);
    cudaFreeHost(normB);
    cudaHostUnregister(a);

    cudaStreamDestroy(stream);
    cudaStreamDestroy(stream1);
    cudaStreamDestroy(stream2);
}

	.file	"tmpxft_00216cc5_00000000-6_cudaFuncs.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Yes"
.LC1:
	.string	"No"
.LC2:
	.string	"Major revision number:         %d\n"
.LC3:
	.string	"Minor revision number:         %d\n"
.LC4:
	.string	"Name:                          %s\n"
.LC5:
	.string	"Total global memory:           %u\n"
.LC6:
	.string	"Total shared memory per block: %u\n"
.LC7:
	.string	"Total registers per block:     %d\n"
.LC8:
	.string	"Warp size:                     %d\n"
.LC9:
	.string	"Maximum memory pitch:          %u\n"
.LC10:
	.string	"Maximum threads per block:     %d\n"
.LC11:
	.string	"Maximum dimension %d of block:  %d\n"
.LC12:
	.string	"Maximum dimension %d of grid:   %d\n"
.LC13:
	.string	"Clock rate:                    %d\n"
.LC14:
	.string	"Total constant memory:         %u\n"
.LC15:
	.string	"Texture alignment:             %u\n"
.LC16:
	.string	"Concurrent copy and execution: %s\n"
.LC17:
	.string	"Number of multiprocessors:     %d\n"
.LC18:
	.string	"Kernel execution timeout:      %s\n"
	.text
	.globl	_Z12printDevProp14cudaDeviceProp
	.type	_Z12printDevProp14cudaDeviceProp, @function
_Z12printDevProp14cudaDeviceProp:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	.LC11(%rip), %rbp
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	movl	392(%rsp), %edx
	call	__printf_chk@PLT
	movl	396(%rsp), %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	32(%rsp), %rdx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	320(%rsp), %rdx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	328(%rsp), %rdx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	336(%rsp), %edx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	340(%rsp), %edx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	344(%rsp), %rdx
	leaq	.LC9(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	352(%rsp), %edx
	leaq	.LC10(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L3:
	movl	356(%rsp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%rbp, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$3, %rbx
	jne	.L3
	xorl	%ebx, %ebx
	leaq	.LC12(%rip), %rbp
.L4:
	movl	368(%rsp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%rbp, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$3, %rbx
	jne	.L4
	movl	380(%rsp), %edx
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rbp
	leaq	.LC1(%rip), %rbx
	call	__printf_chk@PLT
	movq	384(%rsp), %rdx
	leaq	.LC14(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	400(%rsp), %rdx
	leaq	.LC15(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$0, 416(%rsp)
	movq	%rbp, %rdx
	leaq	.LC16(%rip), %rsi
	cmove	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	420(%rsp), %edx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$0, 424(%rsp)
	movq	%rbp, %rdx
	leaq	.LC18(%rip), %rsi
	cmove	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12printDevProp14cudaDeviceProp, .-_Z12printDevProp14cudaDeviceProp
	.section	.rodata.str1.1
.LC19:
	.string	"Avem %d device-uri.\n"
.LC20:
	.string	"\nCUDA Device #%d\n"
	.text
	.globl	_Z11proprietativ
	.type	_Z11proprietativ, @function
_Z11proprietativ:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC20(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	subq	$1056, %rsp
	.cfi_def_cfa_offset 1088
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	movl	12(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC19(%rip), %rsi
	call	__printf_chk@PLT
.L14:
	cmpl	%ebx, 12(%rsp)
	jle	.L18
	movl	%ebx, %edx
	leaq	16(%rsp), %rbp
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %esi
	movq	%rbp, %rdi
	incl	%ebx
	call	cudaGetDeviceProperties_v2@PLT
	subq	$1040, %rsp
	.cfi_def_cfa_offset 2128
	movl	$258, %ecx
	movq	%rbp, %rsi
	movq	%rsp, %rdi
	rep movsl
	call	_Z12printDevProp14cudaDeviceProp
	addq	$1040, %rsp
	.cfi_def_cfa_offset 1088
	jmp	.L14
.L18:
	movq	1048(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$1056, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11proprietativ, .-_Z11proprietativ
	.globl	_Z30__device_stub__Z6vecDivPfS_S_jPfS_S_j
	.type	_Z30__device_stub__Z6vecDivPfS_S_jPfS_S_j, @function
_Z30__device_stub__Z6vecDivPfS_S_jPfS_S_j:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6vecDivPfS_S_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L19:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z30__device_stub__Z6vecDivPfS_S_jPfS_S_j, .-_Z30__device_stub__Z6vecDivPfS_S_jPfS_S_j
	.globl	_Z6vecDivPfS_S_j
	.type	_Z6vecDivPfS_S_j, @function
_Z6vecDivPfS_S_j:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6vecDivPfS_S_jPfS_S_j
	.cfi_endproc
.LFE2058:
	.size	_Z6vecDivPfS_S_j, .-_Z6vecDivPfS_S_j
	.globl	_Z31__device_stub__Z7vecProdPfS_S_jPfS_S_j
	.type	_Z31__device_stub__Z7vecProdPfS_S_jPfS_S_j, @function
_Z31__device_stub__Z7vecProdPfS_S_jPfS_S_j:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7vecProdPfS_S_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L24:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z31__device_stub__Z7vecProdPfS_S_jPfS_S_j, .-_Z31__device_stub__Z7vecProdPfS_S_jPfS_S_j
	.globl	_Z7vecProdPfS_S_j
	.type	_Z7vecProdPfS_S_j, @function
_Z7vecProdPfS_S_j:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7vecProdPfS_S_jPfS_S_j
	.cfi_endproc
.LFE2060:
	.size	_Z7vecProdPfS_S_j, .-_Z7vecProdPfS_S_j
	.globl	_Z30__device_stub__Z6vecAddPfS_S_jPfS_S_j
	.type	_Z30__device_stub__Z6vecAddPfS_S_jPfS_S_j, @function
_Z30__device_stub__Z6vecAddPfS_S_jPfS_S_j:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6vecAddPfS_S_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L29:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z30__device_stub__Z6vecAddPfS_S_jPfS_S_j, .-_Z30__device_stub__Z6vecAddPfS_S_jPfS_S_j
	.globl	_Z6vecAddPfS_S_j
	.type	_Z6vecAddPfS_S_j, @function
_Z6vecAddPfS_S_j:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6vecAddPfS_S_jPfS_S_j
	.cfi_endproc
.LFE2062:
	.size	_Z6vecAddPfS_S_j, .-_Z6vecAddPfS_S_j
	.section	.rodata.str1.1
.LC21:
	.string	"\n REZULTAT TEST: %f \n"
	.text
	.globl	_Z5test1PfS_m
	.type	_Z5test1PfS_m, @function
_Z5test1PfS_m:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	leaq	0(,%rdx,4), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rbp, %rdi
	movq	%rdx, %rbx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$67108865, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$6, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967457, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%ebx, %ecx
	movq	8(%rsp), %rdi
	call	_Z30__device_stub__Z6vecAddPfS_S_jPfS_S_j
.L35:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$41216, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r12), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	movq	%r12, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z5test1PfS_m, .-_Z5test1PfS_m
	.globl	_Z30__device_stub__Z6vecSubPfS_S_jPfS_S_j
	.type	_Z30__device_stub__Z6vecSubPfS_S_jPfS_S_j, @function
_Z30__device_stub__Z6vecSubPfS_S_jPfS_S_j:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6vecSubPfS_S_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L39:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z30__device_stub__Z6vecSubPfS_S_jPfS_S_j, .-_Z30__device_stub__Z6vecSubPfS_S_jPfS_S_j
	.globl	_Z6vecSubPfS_S_j
	.type	_Z6vecSubPfS_S_j, @function
_Z6vecSubPfS_S_j:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6vecSubPfS_S_jPfS_S_j
	.cfi_endproc
.LFE2064:
	.size	_Z6vecSubPfS_S_j, .-_Z6vecSubPfS_S_j
	.globl	_Z33__device_stub__Z9eulVectorPfS_S_jPfS_S_j
	.type	_Z33__device_stub__Z9eulVectorPfS_S_jPfS_S_j, @function
_Z33__device_stub__Z9eulVectorPfS_S_jPfS_S_j:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9eulVectorPfS_S_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L44:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z33__device_stub__Z9eulVectorPfS_S_jPfS_S_j, .-_Z33__device_stub__Z9eulVectorPfS_S_jPfS_S_j
	.globl	_Z9eulVectorPfS_S_j
	.type	_Z9eulVectorPfS_S_j, @function
_Z9eulVectorPfS_S_j:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9eulVectorPfS_S_jPfS_S_j
	.cfi_endproc
.LFE2066:
	.size	_Z9eulVectorPfS_S_j, .-_Z9eulVectorPfS_S_j
	.globl	_Z30__device_stub__Z8smallSumPhS_iPhS_i
	.type	_Z30__device_stub__Z8smallSumPhS_iPhS_i, @function
_Z30__device_stub__Z8smallSumPhS_iPhS_i:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8smallSumPhS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L49:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z30__device_stub__Z8smallSumPhS_iPhS_i, .-_Z30__device_stub__Z8smallSumPhS_iPhS_i
	.globl	_Z8smallSumPhS_i
	.type	_Z8smallSumPhS_i, @function
_Z8smallSumPhS_i:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8smallSumPhS_iPhS_i
	.cfi_endproc
.LFE2068:
	.size	_Z8smallSumPhS_i, .-_Z8smallSumPhS_i
	.globl	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
	.type	_Z35__device_stub__Z12reductionSumPfS_mPfS_m, @function
_Z35__device_stub__Z12reductionSumPfS_mPfS_m:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12reductionSumPfS_m(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L54:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z35__device_stub__Z12reductionSumPfS_mPfS_m, .-_Z35__device_stub__Z12reductionSumPfS_mPfS_m
	.globl	_Z12reductionSumPfS_m
	.type	_Z12reductionSumPfS_m, @function
_Z12reductionSumPfS_m:
.LFB2070:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
	.cfi_endproc
.LFE2070:
	.size	_Z12reductionSumPfS_m, .-_Z12reductionSumPfS_m
	.globl	_Z18euclideanNormAsyncPfS_mS_m
	.type	_Z18euclideanNormAsyncPfS_mS_m, @function
_Z18euclideanNormAsyncPfS_mS_m:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	leaq	0(,%rbp,4), %r13
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rcx, 16(%rsp)
	movq	%rdi, 24(%rsp)
	leaq	72(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	cudaStreamCreate@PLT
	movq	%rbx, %rsi
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	imulq	%r13, %rsi
	call	cudaHostRegister@PLT
	xorl	%edx, %edx
	movq	%r13, %rsi
	leaq	64(%rsp), %rdi
	call	cudaHostAlloc@PLT
	leaq	32(%rsp), %rdi
	leaq	0(,%rbx,4), %rax
	movabsq	$4294967360, %r13
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	xorl	%r12d, %r12d
	call	cudaMemcpy@PLT
	movq	%rbx, %rax
	shrq	$6, %rax
	movl	%eax, %r15d
	salq	$2, %rax
	movq	%rax, 8(%rsp)
.L60:
	movq	72(%rsp), %r8
	cmpq	%rbp, %r12
	je	.L69
	movq	24(%rsp), %rax
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	32(%rsp), %rdi
	leaq	(%rax,%r14,4), %rsi
	call	cudaMemcpyAsync@PLT
	movl	%r15d, 80(%rsp)
	movq	72(%rsp), %r9
	movq	%r13, %rdx
	movq	(%rsp), %r8
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	movq	%r13, 92(%rsp)
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	movl	$1, 100(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movq	56(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	%ebx, %ecx
	movq	32(%rsp), %rdi
	call	_Z33__device_stub__Z9eulVectorPfS_S_jPfS_S_j
.L61:
	movl	%r15d, 80(%rsp)
	movq	(%rsp), %r8
	movq	%r13, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	movq	72(%rsp), %r9
	movq	%r13, 92(%rsp)
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	movl	$1, 100(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L62:
	movq	72(%rsp), %rcx
	xorl	%esi, %esi
	movq	8(%rsp), %rdi
	movl	$380, %edx
	addq	48(%rsp), %rdi
	call	cudaMemsetAsync@PLT
	movl	$16777217, %edx
	movq	72(%rsp), %r9
	movq	(%rsp), %r8
	salq	$8, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 92(%rsp)
	movl	$1, 100(%rsp)
	movq	%rdi, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L63:
	movq	64(%rsp), %rax
	movq	72(%rsp), %r8
	movl	$2, %ecx
	addq	%rbx, %r14
	movq	56(%rsp), %rsi
	movl	$4, %edx
	leaq	(%rax,%r12,4), %rdi
	incq	%r12
	call	cudaMemcpyAsync@PLT
	jmp	.L60
.L69:
	movq	%r8, %rdi
	call	cudaStreamSynchronize@PLT
	movq	64(%rsp), %rdx
	xorl	%eax, %eax
.L65:
	cmpq	%rax, %rbp
	je	.L70
	movss	(%rdx,%rax,4), %xmm0
	movq	16(%rsp), %rbx
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	jmp	.L65
.L70:
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaHostUnregister@PLT
	movq	72(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L67
	call	__stack_chk_fail@PLT
.L67:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z18euclideanNormAsyncPfS_mS_m, .-_Z18euclideanNormAsyncPfS_mS_m
	.globl	_Z18cityblockNormAsyncPfS_mS_m
	.type	_Z18cityblockNormAsyncPfS_mS_m, @function
_Z18cityblockNormAsyncPfS_mS_m:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	leaq	0(,%rbp,4), %r13
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rcx, 16(%rsp)
	movq	%rdi, 24(%rsp)
	leaq	72(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	cudaStreamCreate@PLT
	movq	%rbx, %rsi
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	imulq	%r13, %rsi
	call	cudaHostRegister@PLT
	xorl	%edx, %edx
	movq	%r13, %rsi
	leaq	64(%rsp), %rdi
	call	cudaHostAlloc@PLT
	leaq	32(%rsp), %rdi
	leaq	0(,%rbx,4), %rax
	movabsq	$4294967360, %r13
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	xorl	%r12d, %r12d
	call	cudaMemcpy@PLT
	movq	%rbx, %rax
	shrq	$6, %rax
	movl	%eax, %r15d
	salq	$2, %rax
	movq	%rax, 8(%rsp)
.L72:
	movq	72(%rsp), %r8
	cmpq	%rbp, %r12
	je	.L81
	movq	24(%rsp), %rax
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	32(%rsp), %rdi
	leaq	(%rax,%r14,4), %rsi
	call	cudaMemcpyAsync@PLT
	movl	%r15d, 80(%rsp)
	movq	72(%rsp), %r9
	movq	%r13, %rdx
	movq	(%rsp), %r8
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	movq	%r13, 92(%rsp)
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	movl	$1, 100(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L73
	movq	56(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	%ebx, %ecx
	movq	32(%rsp), %rdi
	call	_Z30__device_stub__Z6vecSubPfS_S_jPfS_S_j
.L73:
	movl	%r15d, 80(%rsp)
	movq	(%rsp), %r8
	movq	%r13, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	movq	72(%rsp), %r9
	movq	%r13, 92(%rsp)
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	movl	$1, 100(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L74
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L74:
	movq	72(%rsp), %rcx
	xorl	%esi, %esi
	movq	8(%rsp), %rdi
	movl	$380, %edx
	addq	48(%rsp), %rdi
	call	cudaMemsetAsync@PLT
	movl	$16777217, %edx
	movq	72(%rsp), %r9
	movq	(%rsp), %r8
	salq	$8, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 92(%rsp)
	movl	$1, 100(%rsp)
	movq	%rdi, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L75:
	movq	64(%rsp), %rax
	movq	72(%rsp), %r8
	movl	$2, %ecx
	addq	%rbx, %r14
	movq	56(%rsp), %rsi
	movl	$4, %edx
	leaq	(%rax,%r12,4), %rdi
	incq	%r12
	call	cudaMemcpyAsync@PLT
	jmp	.L72
.L81:
	movq	%r8, %rdi
	call	cudaStreamSynchronize@PLT
	movq	64(%rsp), %rdx
	xorl	%eax, %eax
.L77:
	cmpq	%rax, %rbp
	je	.L82
	movss	(%rdx,%rax,4), %xmm0
	movq	16(%rsp), %rbx
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	jmp	.L77
.L82:
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaHostUnregister@PLT
	movq	72(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L79
	call	__stack_chk_fail@PLT
.L79:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z18cityblockNormAsyncPfS_mS_m, .-_Z18cityblockNormAsyncPfS_mS_m
	.globl	_Z12cosNormAsyncPfS_mS_m
	.type	_Z12cosNormAsyncPfS_mS_m, @function
_Z12cosNormAsyncPfS_mS_m:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	movq	%rbx, %r14
	shrq	$6, %r14
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movl	%r14d, %r13d
	salq	$2, %r14
	movq	%r8, 24(%rsp)
	movq	%rcx, 32(%rsp)
	movq	%rdi, 40(%rsp)
	leaq	168(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	call	cudaStreamCreate@PLT
	leaq	176(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	184(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movq	24(%rsp), %rax
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	imulq	%rbx, %rsi
	call	cudaHostRegister@PLT
	movq	8(%rsp), %rsi
	xorl	%edx, %edx
	leaq	144(%rsp), %rdi
	call	cudaHostAlloc@PLT
	movq	8(%rsp), %rsi
	xorl	%edx, %edx
	leaq	152(%rsp), %rdi
	call	cudaHostAlloc@PLT
	movq	8(%rsp), %rsi
	xorl	%edx, %edx
	leaq	160(%rsp), %rdi
	call	cudaHostAlloc@PLT
	leaq	0(,%rbx,4), %rax
	leaq	48(%rsp), %rdi
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	96(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	128(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	88(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	120(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$67108865, %ebp
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	salq	$6, %rbp
	movq	%rax, 16(%rsp)
.L84:
	movq	168(%rsp), %r8
	movq	24(%rsp), %rcx
	cmpq	%rcx, 16(%rsp)
	je	.L104
	movq	40(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$1, %ecx
	leaq	0(,%r12,4), %r15
	movq	48(%rsp), %rdi
	addq	%r15, %rsi
	call	cudaMemcpyAsync@PLT
	movq	40(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	176(%rsp), %r8
	movq	80(%rsp), %rdi
	addq	%r15, %rsi
	call	cudaMemcpyAsync@PLT
	movq	40(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	176(%rsp), %r8
	movq	112(%rsp), %rdi
	addq	%r15, %rsi
	call	cudaMemcpyAsync@PLT
	movl	%r13d, 192(%rsp)
	movq	(%rsp), %r8
	movq	%rbp, %rdx
	movabsq	$4294967297, %rax
	movq	168(%rsp), %r9
	movl	$1, %ecx
	movq	%rbp, 204(%rsp)
	movq	%rax, 196(%rsp)
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	movl	$1, 212(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	movq	72(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	%ebx, %ecx
	movq	48(%rsp), %rdi
	call	_Z31__device_stub__Z7vecProdPfS_S_jPfS_S_j
.L85:
	movl	%r13d, 192(%rsp)
	movq	(%rsp), %r8
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	176(%rsp), %r9
	movabsq	$4294967297, %rax
	movq	%rbp, 204(%rsp)
	movq	%rax, 196(%rsp)
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	movl	$1, 212(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movq	104(%rsp), %rdx
	movq	112(%rsp), %rsi
	movl	%ebx, %ecx
	movq	80(%rsp), %rdi
	call	_Z31__device_stub__Z7vecProdPfS_S_jPfS_S_j
.L86:
	testq	%r12, %r12
	jne	.L87
	movl	%r13d, 192(%rsp)
	movq	(%rsp), %r8
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	184(%rsp), %r9
	movabsq	$4294967297, %rax
	movq	%rbp, 204(%rsp)
	movq	%rax, 196(%rsp)
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	movl	$1, 212(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L87
	movq	136(%rsp), %rdx
	movq	120(%rsp), %rsi
	movl	%ebx, %ecx
	movq	88(%rsp), %rdi
	call	_Z31__device_stub__Z7vecProdPfS_S_jPfS_S_j
.L87:
	movl	%r13d, 192(%rsp)
	movq	(%rsp), %r8
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	168(%rsp), %r9
	movabsq	$4294967297, %rax
	movq	%rbp, 204(%rsp)
	movq	%rax, 196(%rsp)
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	movl	$1, 212(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L89
	movq	64(%rsp), %rsi
	movq	72(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L89:
	movl	%r13d, 192(%rsp)
	movq	(%rsp), %r8
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	176(%rsp), %r9
	movabsq	$4294967297, %rax
	movq	%rbp, 204(%rsp)
	movq	%rax, 196(%rsp)
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	movl	$1, 212(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L90
	movq	96(%rsp), %rsi
	movq	104(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L90:
	testq	%r12, %r12
	jne	.L91
	movl	%r13d, 192(%rsp)
	movq	(%rsp), %r8
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	184(%rsp), %r9
	movabsq	$4294967297, %rax
	movq	%rbp, 204(%rsp)
	movq	%rax, 196(%rsp)
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	movl	$1, 212(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L91
	movq	128(%rsp), %rsi
	movq	136(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L91:
	movq	64(%rsp), %rdi
	movq	168(%rsp), %rcx
	xorl	%esi, %esi
	movl	$380, %edx
	addq	%r14, %rdi
	call	cudaMemsetAsync@PLT
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	movq	176(%rsp), %rcx
	movl	$380, %edx
	addq	%r14, %rdi
	call	cudaMemsetAsync@PLT
	testq	%r12, %r12
	jne	.L93
	movq	128(%rsp), %rdi
	movq	184(%rsp), %rcx
	movl	$380, %edx
	xorl	%esi, %esi
	addq	%r14, %rdi
	call	cudaMemsetAsync@PLT
.L93:
	movl	$16777217, %edx
	movq	(%rsp), %r8
	movq	168(%rsp), %r9
	movabsq	$4294967297, %rdi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 212(%rsp)
	movq	%rdx, 204(%rsp)
	movq	%rdi, 192(%rsp)
	movl	$1, 200(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L94
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L94:
	movl	$16777217, %edx
	movq	(%rsp), %r8
	movq	176(%rsp), %r9
	movabsq	$4294967297, %rdi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 212(%rsp)
	movq	%rdx, 204(%rsp)
	movq	%rdi, 192(%rsp)
	movl	$1, 200(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L95
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L95:
	testq	%r12, %r12
	jne	.L96
	movl	$16777217, %edx
	movq	(%rsp), %r8
	movq	184(%rsp), %r9
	movabsq	$4294967297, %rdi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 212(%rsp)
	movq	%rdx, 204(%rsp)
	movq	%rdi, 192(%rsp)
	movl	$1, 200(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	movq	136(%rsp), %rsi
	movq	128(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z12reductionSumPfS_mPfS_m
.L96:
	movq	16(%rsp), %rax
	movq	144(%rsp), %rdi
	movl	$2, %ecx
	addq	%rbx, %r12
	movq	168(%rsp), %r8
	movq	72(%rsp), %rsi
	movl	$4, %edx
	leaq	0(,%rax,4), %r15
	addq	%r15, %rdi
	call	cudaMemcpyAsync@PLT
	movq	104(%rsp), %rsi
	movl	$2, %ecx
	movq	152(%rsp), %rdi
	movq	176(%rsp), %r8
	movl	$4, %edx
	addq	%r15, %rdi
	call	cudaMemcpyAsync@PLT
	movl	$2, %ecx
	movl	$4, %edx
	movq	160(%rsp), %rdi
	movq	184(%rsp), %r8
	movq	136(%rsp), %rsi
	addq	%r15, %rdi
	call	cudaMemcpyAsync@PLT
	incq	16(%rsp)
	jmp	.L84
.L104:
	movq	%r8, %rdi
	xorl	%ebx, %ebx
	call	cudaStreamSynchronize@PLT
	movq	176(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	movq	184(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
.L99:
	movq	8(%rsp), %rax
	cmpq	%rax, %rbx
	je	.L105
	movq	144(%rsp), %rax
	movss	(%rax,%rbx), %xmm1
	movq	152(%rsp), %rax
	movss	(%rax,%rbx), %xmm0
	movss	%xmm1, 16(%rsp)
	call	sqrtf@PLT
	movq	160(%rsp), %rax
	movss	%xmm0, (%rsp)
	movss	(%rax,%rbx), %xmm0
	call	sqrtf@PLT
	mulss	(%rsp), %xmm0
	movss	16(%rsp), %xmm1
	movl	.LC22(%rip), %ecx
	divss	%xmm0, %xmm1
	movss	.LC22(%rip), %xmm0
	subss	%xmm1, %xmm0
	ucomiss	%xmm0, %xmm0
	movd	%xmm0, %eax
	cmovp	%ecx, %eax
	movd	%eax, %xmm0
	movq	32(%rsp), %rax
	movss	%xmm0, (%rax,%rbx)
	addq	$4, %rbx
	jmp	.L99
.L105:
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	152(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	160(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	40(%rsp), %rdi
	call	cudaHostUnregister@PLT
	movq	168(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	176(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	184(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L102
	call	__stack_chk_fail@PLT
.L102:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z12cosNormAsyncPfS_mS_m, .-_Z12cosNormAsyncPfS_mS_m
	.globl	_Z28__device_stub__Z6cumSumPfS_mPfS_m
	.type	_Z28__device_stub__Z6cumSumPfS_mPfS_m, @function
_Z28__device_stub__Z6cumSumPfS_mPfS_m:
.LFB2071:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L106
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6cumSumPfS_m(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L106:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2071:
	.size	_Z28__device_stub__Z6cumSumPfS_mPfS_m, .-_Z28__device_stub__Z6cumSumPfS_mPfS_m
	.globl	_Z6cumSumPfS_m
	.type	_Z6cumSumPfS_m, @function
_Z6cumSumPfS_m:
.LFB2072:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z6cumSumPfS_mPfS_m
	.cfi_endproc
.LFE2072:
	.size	_Z6cumSumPfS_m, .-_Z6cumSumPfS_m
	.section	.rodata.str1.1
.LC23:
	.string	"_Z6cumSumPfS_m"
.LC24:
	.string	"_Z12reductionSumPfS_m"
.LC25:
	.string	"_Z8smallSumPhS_i"
.LC26:
	.string	"_Z9eulVectorPfS_S_j"
.LC27:
	.string	"_Z6vecSubPfS_S_j"
.LC28:
	.string	"_Z6vecAddPfS_S_j"
.LC29:
	.string	"_Z7vecProdPfS_S_j"
.LC30:
	.string	"_Z6vecDivPfS_S_j"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2074:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6cumSumPfS_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12reductionSumPfS_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8smallSumPhS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9eulVectorPfS_S_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6vecSubPfS_S_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6vecAddPfS_S_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7vecProdPfS_S_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC30(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6vecDivPfS_S_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2074:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC22:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>

#define NUM_BANKS 8
#define LOG_NUM_BANKS 3
#define CONFLICT_FREE_OFFSET(n) \
((n) >> NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))

// Print device properties
void printDevProp(hipDeviceProp_t devProp)
{
    printf("Major revision number:         %d\n",  devProp.major);
    printf("Minor revision number:         %d\n",  devProp.minor);
    printf("Name:                          %s\n",  devProp.name);
    printf("Total global memory:           %u\n",  devProp.totalGlobalMem);
    printf("Total shared memory per block: %u\n",  devProp.sharedMemPerBlock);
    printf("Total registers per block:     %d\n",  devProp.regsPerBlock);
    printf("Warp size:                     %d\n",  devProp.warpSize);
    printf("Maximum memory pitch:          %u\n",  devProp.memPitch);
    printf("Maximum threads per block:     %d\n",  devProp.maxThreadsPerBlock);
    for (int i = 0; i < 3; ++i)
    printf("Maximum dimension %d of block:  %d\n", i, devProp.maxThreadsDim[i]);
    for (int i = 0; i < 3; ++i)
    printf("Maximum dimension %d of grid:   %d\n", i, devProp.maxGridSize[i]);
    printf("Clock rate:                    %d\n",  devProp.clockRate);
    printf("Total constant memory:         %u\n",  devProp.totalConstMem);
    printf("Texture alignment:             %u\n",  devProp.textureAlignment);
    printf("Concurrent copy and execution: %s\n",  (devProp.deviceOverlap ? "Yes" : "No"));
    printf("Number of multiprocessors:     %d\n",  devProp.multiProcessorCount);
    printf("Kernel execution timeout:      %s\n",  (devProp.kernelExecTimeoutEnabled ? "Yes" : "No"));
    return;
}

void proprietati()
{
        int devCount;
        hipGetDeviceCount(&devCount);
        printf("Avem %d device-uri.\n", devCount);

        for (int i = 0; i < devCount; ++i)
        {
            // Get device properties
            printf("\nCUDA Device #%d\n", i);
            hipDeviceProp_t devProp;
            hipGetDeviceProperties(&devProp, i);
            printDevProp(devProp);
        }
}

__global__ void vecDiv(float *a, float *b, float *c, unsigned int n)
{
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] / b[id];
}

__global__ void vecProd(float *a, float *b, float *c, unsigned int n)
{
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] * b[id];
}

__global__ void vecAdd(float *a, float *b, float *c, unsigned int n)
{
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] + b[id];
}
__global__ void vecSub(float *a, float *b, float *c, unsigned int n)
{
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] - b[id];
}

__global__ void eulVector(float *a, float *b,float *c, unsigned int n)
{
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(id < n){
        c[id] = a[id] - b[id];
        c[id]*= c[id];
    }
}

__global__ void smallSum(unsigned char *out, unsigned char *in, int n)
{
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(threadIdx.x == 1023) {
        out[id/1024] = id;
    }
}

// reduction sum
__global__ void reductionSum(float *in_array, float *out_array, unsigned long size)
{
    extern __shared__ float shared[];

    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
    shared[tid] = in_array[i];
    __syncthreads();

    for(unsigned int s=blockDim.x/2; s>0; s>>=1) {
        if (tid < s) {
            shared[tid] += shared[tid + s];
        }
        __syncthreads();
    }

    if(tid==0) //first thread, last sum
    {
        out_array[blockIdx.x]=shared[0];
    }
}

__global__ void cumSum(float *in_array, float *out_array, unsigned long size)
{
    extern __shared__ float shared[];

    unsigned int tid = threadIdx.x;
    unsigned int b_offset = blockIdx.x * blockDim.x;
    unsigned int offset = 1;

    int i = tid;
    int j = tid + blockDim.x / 2;
    int offset_i = CONFLICT_FREE_OFFSET(i);
    int offset_j = CONFLICT_FREE_OFFSET(j);
    shared[i + offset_i] = in_array[i + b_offset];
    shared[j + offset_j] = in_array[j + b_offset];

    // scan up
    for (int s = (blockDim.x >> 1); s > 0; s >>= 1) {
        __syncthreads();

        if (tid < s) {
            int i = offset * (2 * tid + 1) - 1;
            int j = offset * (2 * tid + 2) - 1;
            i += CONFLICT_FREE_OFFSET(i);
            j += CONFLICT_FREE_OFFSET(j);
            shared[j] += shared[i];
        }
        offset <<= 1;
    }

    if (tid == 0) {
        shared[blockDim.x - 1 + CONFLICT_FREE_OFFSET(blockDim.x - 1)] =
            0;
    }
    // scan down
    for (int s = 1; s < blockDim.x; s <<= 1) {
        offset >>= 1;
        __syncthreads();

        if (tid < s) {
            int i = offset * (2 * tid + 1) - 1;
            int j = offset * (2 * tid + 2) - 1;
            i += CONFLICT_FREE_OFFSET(i);
            j += CONFLICT_FREE_OFFSET(j);
            float tmp = shared[i];
            shared[i] = shared[j];
            shared[j] += tmp;
        }
    }
    __syncthreads();
    out_array[i] = shared[i + offset_i];
    out_array[j] = shared[j + offset_j];
}

void test1(float *a, float *b, unsigned long n)
{
    float *d_a, *d_b, *d_rez;
    float *rez = (float*) malloc(n*sizeof(float));

    hipMalloc((void **)&d_a,n*sizeof(float));
    hipMalloc((void **)&d_b,n*sizeof(float));
    hipMalloc((void **)&d_rez,n*sizeof(float));

    hipMemcpy(d_a,a,n*sizeof(float),hipMemcpyHostToDevice);
    hipMemcpy(d_b,b,n*sizeof(float),hipMemcpyHostToDevice);

    vecAdd<<<161,64>>>(d_a,d_b,d_rez,n);

    hipMemcpy(rez,d_rez,10304*sizeof(float),hipMemcpyDeviceToHost);

    printf("\n REZULTAT TEST: %f \n",rez[0]);

    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_rez);

    free(rez);
}

// a imagini
// b imagine
void euclideanNormAsync(float *a, float *b, unsigned long n, float *result, unsigned long nrPoze)
{
    float *d_a,*d_b,*d_rez,*d_temp;
    float *sum;

    hipStream_t stream;

    hipStreamCreate(&stream);

    hipHostRegister((void **)&a, n*nrPoze*sizeof(float), hipHostRegisterPortable);
    hipHostAlloc((void **)&sum, nrPoze*sizeof(float), hipHostMallocDefault);

    hipMalloc((void **)&d_a,n*sizeof(float));
    hipMalloc((void **)&d_b,n*sizeof(float));
    hipMalloc((void **)&d_temp,n*sizeof(float));
    hipMalloc((void **)&d_rez,(n/64+(256-n/64))*sizeof(float));

    //cudaMemcpy(d_a,a,n*sizeof(float),cudaMemcpyHostToDevice);
    hipMemcpy(d_b,b,n*sizeof(float),hipMemcpyHostToDevice);
    for(unsigned long int i=0, k=0; i<n, k< nrPoze; i+= n, k++)
    {
        hipMemcpyAsync(d_a,a+i,n*sizeof(float),hipMemcpyHostToDevice, stream);

        eulVector<<<n/64, 64, n*sizeof(float), stream>>>(d_a,d_b,d_temp, n);
        reductionSum<<<n/64, 64, n*sizeof(float), stream>>>(d_temp,d_rez, n);
        hipMemsetAsync(d_rez+n/64,0,95*sizeof(float),stream);
        reductionSum<<<1,256, n*sizeof(float), stream>>>(d_rez,d_temp,n);
        //cumSum<<<n/64, n/64, n*sizeof(float)>>>(d_rez,d_temp, n/64);

        hipMemcpyAsync(sum+k,d_temp,sizeof(float),hipMemcpyDeviceToHost, stream);
    }



    hipStreamSynchronize(stream);

    for(int i=0;i<nrPoze;i++)
    {
        result[i] = sum[i];
    }

    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_temp);
    hipFree(d_rez);

    hipHostFree(sum);
    hipHostUnregister(a);

    hipStreamDestroy(stream);
}

// a imagini
// b imagine
void cityblockNormAsync(float *a, float *b, unsigned long n, float *result, unsigned long nrPoze)
{
    float *d_a,*d_b,*d_rez,*d_temp;
    float *sum;

    hipStream_t stream;

    hipStreamCreate(&stream);

    hipHostRegister((void **)&a, n*nrPoze*sizeof(float), hipHostRegisterPortable);
    hipHostAlloc((void **)&sum, nrPoze*sizeof(float), hipHostMallocDefault);

    hipMalloc((void **)&d_a,n*sizeof(float));
    hipMalloc((void **)&d_b,n*sizeof(float));
    hipMalloc((void **)&d_temp,n*sizeof(float));
    hipMalloc((void **)&d_rez,(n/64+(256-n/64))*sizeof(float));

    //cudaMemcpy(d_a,a,n*sizeof(float),cudaMemcpyHostToDevice);
    hipMemcpy(d_b,b,n*sizeof(float),hipMemcpyHostToDevice);
    for(unsigned long int i=0, k=0; i<n, k< nrPoze; i+= n, k++)
    {
        hipMemcpyAsync(d_a,a+i,n*sizeof(float),hipMemcpyHostToDevice, stream);

        vecSub<<<n/64, 64, n*sizeof(float), stream>>>(d_a,d_b,d_temp, n);
        reductionSum<<<n/64, 64, n*sizeof(float), stream>>>(d_temp,d_rez, n);
        hipMemsetAsync(d_rez+n/64,0,95*sizeof(float),stream);
        reductionSum<<<1,256, n*sizeof(float), stream>>>(d_rez,d_temp,n);
        //cumSum<<<n/64, n/64, n*sizeof(float)>>>(d_rez,d_temp, n/64);

        hipMemcpyAsync(sum+k,d_temp,sizeof(float),hipMemcpyDeviceToHost, stream);
    }



    hipStreamSynchronize(stream);

    for(int i=0;i<nrPoze;i++)
    {
        result[i] = sum[i];
    }
    //printf("%f ", min);

    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_temp);
    hipFree(d_rez);

    hipHostFree(sum);
    hipHostUnregister(a);

    hipStreamDestroy(stream);
}

// a imagini
// b imagine
void cosNormAsync(float *a, float *b, unsigned long n, float *result, unsigned long nrPoze)
{
    float *d_a,*d_b,*d_rez,*d_temp;
    float *d_a1,*d_b1,*d_rez1, *d_temp1;
    float *d_a2,*d_b2,*d_rez2, *d_temp2;
    float *dotProd, *normA, *normB;

    hipStream_t stream, stream1, stream2;

    hipStreamCreate(&stream);
    hipStreamCreate(&stream1);
    hipStreamCreate(&stream2);

    hipHostRegister((void **)&a, n*nrPoze*sizeof(float), hipHostRegisterPortable);
    hipHostAlloc((void **)&dotProd, nrPoze*sizeof(float), hipHostMallocDefault);
    hipHostAlloc((void **)&normA, nrPoze*sizeof(float), hipHostMallocDefault);
    hipHostAlloc((void **)&normB, nrPoze*sizeof(float), hipHostMallocDefault);

    hipMalloc((void **)&d_a,n*sizeof(float));
    hipMalloc((void **)&d_b,n*sizeof(float));
    hipMalloc((void **)&d_temp,n*sizeof(float));
    hipMalloc((void **)&d_rez,(n/64+(256-n/64))*sizeof(float));

    hipMalloc((void **)&d_a1,n*sizeof(float));
    hipMalloc((void **)&d_b1,n*sizeof(float));
    hipMalloc((void **)&d_temp1,n*sizeof(float));
    hipMalloc((void **)&d_rez1,(n/64+(256-n/64))*sizeof(float));

    hipMalloc((void **)&d_a2,n*sizeof(float));
    hipMalloc((void **)&d_b2,n*sizeof(float));
    hipMalloc((void **)&d_temp2,n*sizeof(float));
    hipMalloc((void **)&d_rez2,(n/64+(256-n/64))*sizeof(float));

    //cudaMemcpy(d_a,a,n*sizeof(float),cudaMemcpyHostToDevice);
    hipMemcpy(d_b,b,n*sizeof(float),hipMemcpyHostToDevice);
    hipMemcpy(d_b1,b,n*sizeof(float),hipMemcpyHostToDevice);
    hipMemcpy(d_b2,b,n*sizeof(float),hipMemcpyHostToDevice);
    for(unsigned long int i=0, k=0; i<n, k< nrPoze; i+= n, k++)
    {
        hipMemcpyAsync(d_a,a+i,n*sizeof(float),hipMemcpyHostToDevice, stream);
        hipMemcpyAsync(d_a1,a+i,n*sizeof(float),hipMemcpyHostToDevice, stream1);
        hipMemcpyAsync(d_a2,a+i,n*sizeof(float),hipMemcpyHostToDevice, stream1);

        vecProd<<<n/64, 64, n*sizeof(float), stream>>>(d_a,d_b,d_temp, n);
        vecProd<<<n/64, 64, n*sizeof(float), stream1>>>(d_a1,d_a2,d_temp1, n);
        if(i==0)
        vecProd<<<n/64, 64, n*sizeof(float), stream2>>>(d_b1,d_b2,d_temp2, n);

        reductionSum<<<n/64, 64, n*sizeof(float), stream>>>(d_temp,d_rez, n);
        reductionSum<<<n/64, 64, n*sizeof(float), stream1>>>(d_temp1,d_rez1, n);
        if(i==0)
        reductionSum<<<n/64, 64, n*sizeof(float), stream2>>>(d_temp2,d_rez2, n);
        hipMemsetAsync(d_rez+n/64,0,95*sizeof(float),stream);
        hipMemsetAsync(d_rez1+n/64,0,95*sizeof(float),stream1);
        if(i==0)
        hipMemsetAsync(d_rez2+n/64,0,95*sizeof(float),stream2);
        reductionSum<<<1,256, n*sizeof(float), stream>>>(d_rez,d_temp,n);
        reductionSum<<<1,256, n*sizeof(float), stream1>>>(d_rez1,d_temp1,n);
        if(i==0)
        reductionSum<<<1,256, n*sizeof(float), stream2>>>(d_rez2,d_temp2,n);

        // we now have in d_temp - dot product, d_temp1 - norm of a, d_temp2 norm of b

        hipMemcpyAsync(dotProd+k,d_temp,sizeof(float),hipMemcpyDeviceToHost, stream);
        hipMemcpyAsync(normA+k,d_temp1,sizeof(float),hipMemcpyDeviceToHost, stream1);
        hipMemcpyAsync(normB+k,d_temp2,sizeof(float),hipMemcpyDeviceToHost, stream2);
    }



    hipStreamSynchronize(stream);
    hipStreamSynchronize(stream1);
    hipStreamSynchronize(stream2);

    for(int i=0;i<nrPoze;i++)
    {
        float calc = 1 - dotProd[i]/(sqrtf(normA[i])*sqrtf(normB[i]));
        result[i] = isnan(calc)?1:calc;
    }

    //printf("%f ",result[0]);

    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_temp);
    hipFree(d_rez);

    hipFree(d_a1);
    hipFree(d_b2);
    hipFree(d_temp1);
    hipFree(d_rez1);

    hipFree(d_a2);
    hipFree(d_b2);
    hipFree(d_temp2);
    hipFree(d_rez2);

    hipHostFree(dotProd);
    hipHostFree(normA);
    hipHostFree(normB);
    hipHostUnregister(a);

    hipStreamDestroy(stream);
    hipStreamDestroy(stream1);
    hipStreamDestroy(stream2);
}

	.text
	.file	"cudaFuncs.hip"
	.globl	_Z12printDevProp20hipDeviceProp_tR0600 # -- Begin function _Z12printDevProp20hipDeviceProp_tR0600
	.type	_Z12printDevProp20hipDeviceProp_tR0600,@function
_Z12printDevProp20hipDeviceProp_tR0600: # @_Z12printDevProp20hipDeviceProp_tR0600
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rsp), %rbx
	movl	360(%rbx), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	364(%rbx), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.2, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	movq	288(%rbx), %rsi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movq	296(%rbx), %rsi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movl	304(%rbx), %esi
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	308(%rbx), %esi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	312(%rbx), %rsi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movl	320(%rbx), %esi
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	xorl	%r14d, %r14d
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	324(%rbx,%r14,4), %edx
	movl	$.L.str.9, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB0_1
# %bb.2:                                # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB0_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	336(%rbx,%r14,4), %edx
	movl	$.L.str.10, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB0_3
# %bb.4:
	movl	348(%rbx), %esi
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	movq	352(%rbx), %rsi
	movl	$.L.str.12, %edi
	xorl	%eax, %eax
	callq	printf
	movq	368(%rbx), %rsi
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 384(%rbx)
	movl	$.L.str.16, %r15d
	movl	$.L.str.15, %r14d
	movl	$.L.str.15, %esi
	cmoveq	%r15, %rsi
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	movl	388(%rbx), %esi
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 392(%rbx)
	cmoveq	%r15, %r14
	movl	$.L.str.18, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z12printDevProp20hipDeviceProp_tR0600, .Lfunc_end0-_Z12printDevProp20hipDeviceProp_tR0600
	.cfi_endproc
                                        # -- End function
	.globl	_Z11proprietativ                # -- Begin function _Z11proprietativ
	.type	_Z11proprietativ,@function
_Z11proprietativ:                       # @_Z11proprietativ
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$2952, %rsp                     # imm = 0xB88
	.cfi_def_cfa_offset 2976
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	leaq	1476(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	(%rbx), %esi
	movl	$.L.str.19, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, (%rbx)
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	leaq	1480(%rsp), %rbx
	xorl	%ebp, %ebp
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.20, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$184, %ecx
	movq	%rsp, %rdi
	movq	%rbx, %rsi
	rep;movsq (%rsi), %es:(%rdi)
	callq	_Z12printDevProp20hipDeviceProp_tR0600
	incl	%ebp
	cmpl	1476(%rsp), %ebp
	jl	.LBB1_2
.LBB1_3:                                # %._crit_edge
	addq	$2952, %rsp                     # imm = 0xB88
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11proprietativ, .Lfunc_end1-_Z11proprietativ
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__vecDivPfS_S_j # -- Begin function _Z21__device_stub__vecDivPfS_S_j
	.type	_Z21__device_stub__vecDivPfS_S_j,@function
_Z21__device_stub__vecDivPfS_S_j:       # @_Z21__device_stub__vecDivPfS_S_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6vecDivPfS_S_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z21__device_stub__vecDivPfS_S_j, .Lfunc_end2-_Z21__device_stub__vecDivPfS_S_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__vecProdPfS_S_j # -- Begin function _Z22__device_stub__vecProdPfS_S_j
	.type	_Z22__device_stub__vecProdPfS_S_j,@function
_Z22__device_stub__vecProdPfS_S_j:      # @_Z22__device_stub__vecProdPfS_S_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7vecProdPfS_S_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z22__device_stub__vecProdPfS_S_j, .Lfunc_end3-_Z22__device_stub__vecProdPfS_S_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__vecAddPfS_S_j # -- Begin function _Z21__device_stub__vecAddPfS_S_j
	.type	_Z21__device_stub__vecAddPfS_S_j,@function
_Z21__device_stub__vecAddPfS_S_j:       # @_Z21__device_stub__vecAddPfS_S_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6vecAddPfS_S_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z21__device_stub__vecAddPfS_S_j, .Lfunc_end4-_Z21__device_stub__vecAddPfS_S_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__vecSubPfS_S_j # -- Begin function _Z21__device_stub__vecSubPfS_S_j
	.type	_Z21__device_stub__vecSubPfS_S_j,@function
_Z21__device_stub__vecSubPfS_S_j:       # @_Z21__device_stub__vecSubPfS_S_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6vecSubPfS_S_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z21__device_stub__vecSubPfS_S_j, .Lfunc_end5-_Z21__device_stub__vecSubPfS_S_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__eulVectorPfS_S_j # -- Begin function _Z24__device_stub__eulVectorPfS_S_j
	.type	_Z24__device_stub__eulVectorPfS_S_j,@function
_Z24__device_stub__eulVectorPfS_S_j:    # @_Z24__device_stub__eulVectorPfS_S_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9eulVectorPfS_S_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z24__device_stub__eulVectorPfS_S_j, .Lfunc_end6-_Z24__device_stub__eulVectorPfS_S_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__smallSumPhS_i # -- Begin function _Z23__device_stub__smallSumPhS_i
	.type	_Z23__device_stub__smallSumPhS_i,@function
_Z23__device_stub__smallSumPhS_i:       # @_Z23__device_stub__smallSumPhS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8smallSumPhS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z23__device_stub__smallSumPhS_i, .Lfunc_end7-_Z23__device_stub__smallSumPhS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__reductionSumPfS_m # -- Begin function _Z27__device_stub__reductionSumPfS_m
	.type	_Z27__device_stub__reductionSumPfS_m,@function
_Z27__device_stub__reductionSumPfS_m:   # @_Z27__device_stub__reductionSumPfS_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12reductionSumPfS_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z27__device_stub__reductionSumPfS_m, .Lfunc_end8-_Z27__device_stub__reductionSumPfS_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__cumSumPfS_m  # -- Begin function _Z21__device_stub__cumSumPfS_m
	.type	_Z21__device_stub__cumSumPfS_m,@function
_Z21__device_stub__cumSumPfS_m:         # @_Z21__device_stub__cumSumPfS_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6cumSumPfS_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z21__device_stub__cumSumPfS_m, .Lfunc_end9-_Z21__device_stub__cumSumPfS_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z5test1PfS_m                   # -- Begin function _Z5test1PfS_m
	.type	_Z5test1PfS_m,@function
_Z5test1PfS_m:                          # @_Z5test1PfS_m
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	movq	%rdi, %r13
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	leaq	(,%rdx,4), %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %rbx
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967360, %rdx               # imm = 0x100000040
	leaq	97(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z21__device_stub__vecAddPfS_S_j
.LBB10_2:
	movq	8(%rsp), %rsi
	movl	$41216, %edx                    # imm = 0xA100
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.21, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z5test1PfS_m, .Lfunc_end10-_Z5test1PfS_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z18euclideanNormAsyncPfS_mS_m  # -- Begin function _Z18euclideanNormAsyncPfS_mS_m
	.type	_Z18euclideanNormAsyncPfS_mS_m,@function
_Z18euclideanNormAsyncPfS_mS_m:         # @_Z18euclideanNormAsyncPfS_mS_m
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r15
	movq	%rcx, %r13
	movq	%rdx, %rbp
	movq	%rsi, %rbx
	leaq	56(%rsp), %r14
	movq	%rdi, (%r14)
	movq	%rsp, %rdi
	callq	hipStreamCreate
	leaq	(,%rbp,4), %r12
	movq	%r12, %rsi
	imulq	%r15, %rsi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipHostRegister
	leaq	(,%r15,4), %rsi
	leaq	32(%rsp), %rdi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testq	%r15, %r15
	je	.LBB11_1
# %bb.2:                                # %.lr.ph
	movq	%r13, 64(%rsp)                  # 8-byte Spill
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdx
	shrq	$6, %rdx
	movabsq	$4294967360, %rcx               # imm = 0x100000040
	movl	%edx, %eax
	leaq	(%rax,%rcx), %rbp
	addq	$-64, %rbp
	xorl	%r13d, %r13d
	shlq	$2, %rdx
	movq	%rdx, 96(%rsp)                  # 8-byte Spill
	leaq	-63(%rcx), %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	leaq	192(%rcx), %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	%r15, 72(%rsp)                  # 8-byte Spill
	movq	%r15, %r14
	xorl	%ebx, %ebx
	movabsq	$4294967360, %r15               # imm = 0x100000040
.LBB11_3:                               # =>This Inner Loop Header: Depth=1
	movq	40(%rsp), %rdi
	movq	56(%rsp), %rsi
	addq	%rbx, %rsi
	movq	(%rsp), %r8
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	(%rsp), %r9
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_5
# %bb.4:                                #   in Loop: Header=BB11_3 Depth=1
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z24__device_stub__eulVectorPfS_S_j
.LBB11_5:                               #   in Loop: Header=BB11_3 Depth=1
	movq	(%rsp), %r9
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_7
# %bb.6:                                #   in Loop: Header=BB11_3 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB11_7:                               #   in Loop: Header=BB11_3 Depth=1
	movq	16(%rsp), %rdi
	addq	96(%rsp), %rdi                  # 8-byte Folded Reload
	movq	(%rsp), %rcx
	movl	$380, %edx                      # imm = 0x17C
	xorl	%esi, %esi
	callq	hipMemsetAsync
	movq	(%rsp), %r9
	movq	88(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_9
# %bb.8:                                #   in Loop: Header=BB11_3 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB11_9:                               #   in Loop: Header=BB11_3 Depth=1
	movq	32(%rsp), %rdi
	addq	%r13, %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %r8
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	addq	%r12, %rbx
	addq	$4, %r13
	decq	%r14
	jne	.LBB11_3
# %bb.10:                               # %.lr.ph69
	movq	(%rsp), %rdi
	callq	hipStreamSynchronize
	xorl	%eax, %eax
	movq	32(%rsp), %rcx
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
.LBB11_11:                              # =>This Inner Loop Header: Depth=1
	movss	(%rcx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rsi,%rax,4)
	incq	%rax
	cmpq	%rax, %rdx
	jne	.LBB11_11
	jmp	.LBB11_12
.LBB11_1:                               # %._crit_edge.thread
	movq	(%rsp), %rdi
	callq	hipStreamSynchronize
.LBB11_12:                              # %._crit_edge70
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	56(%rsp), %rdi
	callq	hipHostUnregister
	movq	(%rsp), %rdi
	callq	hipStreamDestroy
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z18euclideanNormAsyncPfS_mS_m, .Lfunc_end11-_Z18euclideanNormAsyncPfS_mS_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z18cityblockNormAsyncPfS_mS_m  # -- Begin function _Z18cityblockNormAsyncPfS_mS_m
	.type	_Z18cityblockNormAsyncPfS_mS_m,@function
_Z18cityblockNormAsyncPfS_mS_m:         # @_Z18cityblockNormAsyncPfS_mS_m
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r15
	movq	%rcx, %r13
	movq	%rdx, %rbp
	movq	%rsi, %rbx
	leaq	56(%rsp), %r14
	movq	%rdi, (%r14)
	movq	%rsp, %rdi
	callq	hipStreamCreate
	leaq	(,%rbp,4), %r12
	movq	%r12, %rsi
	imulq	%r15, %rsi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipHostRegister
	leaq	(,%r15,4), %rsi
	leaq	32(%rsp), %rdi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testq	%r15, %r15
	je	.LBB12_1
# %bb.2:                                # %.lr.ph
	movq	%r13, 64(%rsp)                  # 8-byte Spill
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdx
	shrq	$6, %rdx
	movabsq	$4294967360, %rcx               # imm = 0x100000040
	movl	%edx, %eax
	leaq	(%rax,%rcx), %rbp
	addq	$-64, %rbp
	xorl	%r13d, %r13d
	shlq	$2, %rdx
	movq	%rdx, 96(%rsp)                  # 8-byte Spill
	leaq	-63(%rcx), %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	leaq	192(%rcx), %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	%r15, 72(%rsp)                  # 8-byte Spill
	movq	%r15, %r14
	xorl	%ebx, %ebx
	movabsq	$4294967360, %r15               # imm = 0x100000040
.LBB12_3:                               # =>This Inner Loop Header: Depth=1
	movq	40(%rsp), %rdi
	movq	56(%rsp), %rsi
	addq	%rbx, %rsi
	movq	(%rsp), %r8
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	(%rsp), %r9
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_5
# %bb.4:                                #   in Loop: Header=BB12_3 Depth=1
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z21__device_stub__vecSubPfS_S_j
.LBB12_5:                               #   in Loop: Header=BB12_3 Depth=1
	movq	(%rsp), %r9
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_7
# %bb.6:                                #   in Loop: Header=BB12_3 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB12_7:                               #   in Loop: Header=BB12_3 Depth=1
	movq	16(%rsp), %rdi
	addq	96(%rsp), %rdi                  # 8-byte Folded Reload
	movq	(%rsp), %rcx
	movl	$380, %edx                      # imm = 0x17C
	xorl	%esi, %esi
	callq	hipMemsetAsync
	movq	(%rsp), %r9
	movq	88(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_9
# %bb.8:                                #   in Loop: Header=BB12_3 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB12_9:                               #   in Loop: Header=BB12_3 Depth=1
	movq	32(%rsp), %rdi
	addq	%r13, %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %r8
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	addq	%r12, %rbx
	addq	$4, %r13
	decq	%r14
	jne	.LBB12_3
# %bb.10:                               # %.lr.ph69
	movq	(%rsp), %rdi
	callq	hipStreamSynchronize
	xorl	%eax, %eax
	movq	32(%rsp), %rcx
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
.LBB12_11:                              # =>This Inner Loop Header: Depth=1
	movss	(%rcx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rsi,%rax,4)
	incq	%rax
	cmpq	%rax, %rdx
	jne	.LBB12_11
	jmp	.LBB12_12
.LBB12_1:                               # %._crit_edge.thread
	movq	(%rsp), %rdi
	callq	hipStreamSynchronize
.LBB12_12:                              # %._crit_edge70
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	56(%rsp), %rdi
	callq	hipHostUnregister
	movq	(%rsp), %rdi
	callq	hipStreamDestroy
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z18cityblockNormAsyncPfS_mS_m, .Lfunc_end12-_Z18cityblockNormAsyncPfS_mS_m
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12cosNormAsyncPfS_mS_m
.LCPI13_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z12cosNormAsyncPfS_mS_m
	.type	_Z12cosNormAsyncPfS_mS_m,@function
_Z12cosNormAsyncPfS_mS_m:               # @_Z12cosNormAsyncPfS_mS_m
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r15
	movq	%rcx, 192(%rsp)                 # 8-byte Spill
	movq	%rdx, %r12
	movq	%rsi, %rbx
	leaq	88(%rsp), %r14
	movq	%rdi, (%r14)
	leaq	16(%rsp), %rdi
	callq	hipStreamCreate
	leaq	8(%rsp), %rdi
	callq	hipStreamCreate
	leaq	24(%rsp), %rdi
	callq	hipStreamCreate
	movq	%r12, (%rsp)                    # 8-byte Spill
	leaq	(,%r12,4), %r12
	movq	%r12, %rsi
	imulq	%r15, %rsi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipHostRegister
	leaq	(,%r15,4), %r14
	leaq	112(%rsp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	104(%rsp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	96(%rsp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	144(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	176(%rsp), %r14
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	leaq	136(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	208(%rsp), %r13
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	leaq	128(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	120(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testq	%r15, %r15
	je	.LBB13_30
# %bb.1:                                # %.lr.ph
	movq	(%rsp), %rcx                    # 8-byte Reload
	shrq	$6, %rcx
	movabsq	$4294967360, %rbp               # imm = 0x100000040
	movl	%ecx, %eax
	addq	%rbp, %rax
	addq	$-64, %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
	shlq	$2, %rcx
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	leaq	-63(%rbp), %rax
	movq	%rax, 168(%rsp)                 # 8-byte Spill
	leaq	192(%rbp), %rax
	movq	%rax, 160(%rsp)                 # 8-byte Spill
	movq	%r15, 184(%rsp)                 # 8-byte Spill
	movq	%r15, %rbx
	xorl	%r13d, %r13d
	xorl	%r15d, %r15d
.LBB13_2:                               # =>This Inner Loop Header: Depth=1
	movq	%rbx, 200(%rsp)                 # 8-byte Spill
	movq	144(%rsp), %rdi
	movq	88(%rsp), %rsi
	addq	%r13, %rsi
	movq	16(%rsp), %r8
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	136(%rsp), %rdi
	movq	88(%rsp), %rsi
	addq	%r13, %rsi
	movq	8(%rsp), %r8
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	128(%rsp), %rdi
	movq	88(%rsp), %rsi
	addq	%r13, %rsi
	movq	8(%rsp), %r8
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	16(%rsp), %r9
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_4
# %bb.3:                                #   in Loop: Header=BB13_2 Depth=1
	movq	144(%rsp), %rdi
	movq	176(%rsp), %rsi
	movq	64(%rsp), %rdx
	movq	(%rsp), %rcx                    # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z22__device_stub__vecProdPfS_S_j
.LBB13_4:                               #   in Loop: Header=BB13_2 Depth=1
	movq	8(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_6
# %bb.5:                                #   in Loop: Header=BB13_2 Depth=1
	movq	136(%rsp), %rdi
	movq	128(%rsp), %rsi
	movq	48(%rsp), %rdx
	movq	(%rsp), %rcx                    # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z22__device_stub__vecProdPfS_S_j
.LBB13_6:                               #   in Loop: Header=BB13_2 Depth=1
	testq	%r15, %r15
	jne	.LBB13_9
# %bb.7:                                #   in Loop: Header=BB13_2 Depth=1
	movq	24(%rsp), %r9
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_9
# %bb.8:                                #   in Loop: Header=BB13_2 Depth=1
	movq	208(%rsp), %rdi
	movq	120(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	(%rsp), %rcx                    # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z22__device_stub__vecProdPfS_S_j
.LBB13_9:                               #   in Loop: Header=BB13_2 Depth=1
	movq	16(%rsp), %r9
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_11
# %bb.10:                               #   in Loop: Header=BB13_2 Depth=1
	movq	64(%rsp), %rdi
	movq	72(%rsp), %rsi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB13_11:                              #   in Loop: Header=BB13_2 Depth=1
	movq	8(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_13
# %bb.12:                               #   in Loop: Header=BB13_2 Depth=1
	movq	48(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB13_13:                              #   in Loop: Header=BB13_2 Depth=1
	testq	%r15, %r15
	movq	168(%rsp), %rbx                 # 8-byte Reload
	je	.LBB13_14
# %bb.21:                               # %.critedge
                                        #   in Loop: Header=BB13_2 Depth=1
	movq	72(%rsp), %rdi
	movq	152(%rsp), %rbp                 # 8-byte Reload
	addq	%rbp, %rdi
	movq	16(%rsp), %rcx
	movl	$380, %edx                      # imm = 0x17C
	xorl	%esi, %esi
	callq	hipMemsetAsync
	movq	56(%rsp), %rdi
	addq	%rbp, %rdi
	movq	8(%rsp), %rcx
	jmp	.LBB13_22
.LBB13_14:                              #   in Loop: Header=BB13_2 Depth=1
	movq	24(%rsp), %r9
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_16
# %bb.15:                               #   in Loop: Header=BB13_2 Depth=1
	movq	40(%rsp), %rdi
	movq	80(%rsp), %rsi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB13_16:                              #   in Loop: Header=BB13_2 Depth=1
	movq	72(%rsp), %rdi
	movq	152(%rsp), %rbp                 # 8-byte Reload
	addq	%rbp, %rdi
	movq	16(%rsp), %rcx
	movl	$380, %edx                      # imm = 0x17C
	xorl	%esi, %esi
	callq	hipMemsetAsync
	movq	56(%rsp), %rdi
	addq	%rbp, %rdi
	movq	8(%rsp), %rcx
	movl	$380, %edx                      # imm = 0x17C
	xorl	%esi, %esi
	callq	hipMemsetAsync
	movq	80(%rsp), %rdi
	addq	%rbp, %rdi
	movq	24(%rsp), %rcx
.LBB13_22:                              #   in Loop: Header=BB13_2 Depth=1
	movl	$380, %edx                      # imm = 0x17C
	xorl	%esi, %esi
	callq	hipMemsetAsync
	movq	16(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	160(%rsp), %rbp                 # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_24
# %bb.23:                               #   in Loop: Header=BB13_2 Depth=1
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB13_24:                              #   in Loop: Header=BB13_2 Depth=1
	movq	8(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movabsq	$4294967360, %rbp               # imm = 0x100000040
	jne	.LBB13_26
# %bb.25:                               #   in Loop: Header=BB13_2 Depth=1
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB13_26:                              #   in Loop: Header=BB13_2 Depth=1
	testq	%r15, %r15
	movq	200(%rsp), %rbx                 # 8-byte Reload
	jne	.LBB13_29
# %bb.27:                               #   in Loop: Header=BB13_2 Depth=1
	movq	24(%rsp), %r9
	movq	168(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	160(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	movq	%r12, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_29
# %bb.28:                               #   in Loop: Header=BB13_2 Depth=1
	movq	80(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	_Z27__device_stub__reductionSumPfS_m
.LBB13_29:                              #   in Loop: Header=BB13_2 Depth=1
	movq	112(%rsp), %rdi
	addq	%r14, %rdi
	movq	64(%rsp), %rsi
	movq	16(%rsp), %r8
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	104(%rsp), %rdi
	addq	%r14, %rdi
	movq	48(%rsp), %rsi
	movq	8(%rsp), %r8
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	96(%rsp), %rdi
	addq	%r14, %rdi
	movq	40(%rsp), %rsi
	movq	24(%rsp), %r8
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	(%rsp), %rax                    # 8-byte Reload
	addq	%rax, %r15
	addq	%r12, %r13
	addq	$4, %r14
	decq	%rbx
	jne	.LBB13_2
# %bb.17:                               # %._crit_edge
	movq	16(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	8(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	24(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	184(%rsp), %r14                 # 8-byte Reload
	testq	%r14, %r14
	movq	192(%rsp), %r15                 # 8-byte Reload
	je	.LBB13_31
# %bb.18:                               # %.lr.ph183.preheader
	xorl	%ebx, %ebx
	xorps	%xmm3, %xmm3
.LBB13_19:                              # %.lr.ph183
                                        # =>This Inner Loop Header: Depth=1
	movq	112(%rsp), %rax
	movss	(%rax,%rbx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movq	104(%rsp), %rax
	movss	(%rax,%rbx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm3, %xmm0
	jb	.LBB13_32
# %bb.20:                               #   in Loop: Header=BB13_19 Depth=1
	xorps	%xmm2, %xmm2
	sqrtss	%xmm0, %xmm2
	jmp	.LBB13_33
.LBB13_32:                              # %call.sqrt
                                        #   in Loop: Header=BB13_19 Depth=1
	callq	sqrtf
	xorps	%xmm3, %xmm3
	movaps	%xmm0, %xmm2
.LBB13_33:                              # %.lr.ph183.split
                                        #   in Loop: Header=BB13_19 Depth=1
	movq	96(%rsp), %rax
	movss	(%rax,%rbx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm3, %xmm0
	jb	.LBB13_35
# %bb.34:                               #   in Loop: Header=BB13_19 Depth=1
	sqrtss	%xmm0, %xmm0
	jmp	.LBB13_36
.LBB13_35:                              # %call.sqrt208
                                        #   in Loop: Header=BB13_19 Depth=1
	movss	%xmm2, 32(%rsp)                 # 4-byte Spill
	callq	sqrtf
	movss	32(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	xorps	%xmm3, %xmm3
.LBB13_36:                              # %.lr.ph183.split.split
                                        #   in Loop: Header=BB13_19 Depth=1
	mulss	%xmm0, %xmm2
	movss	(%rsp), %xmm1                   # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm1
	movss	.LCPI13_0(%rip), %xmm4          # xmm4 = mem[0],zero,zero,zero
	movaps	%xmm4, %xmm0
	subss	%xmm1, %xmm0
	movaps	%xmm0, %xmm1
	cmpunordss	%xmm0, %xmm1
	movaps	%xmm1, %xmm2
	andnps	%xmm0, %xmm2
	andps	%xmm4, %xmm1
	orps	%xmm2, %xmm1
	movss	%xmm1, (%r15,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %r14
	jne	.LBB13_19
	jmp	.LBB13_31
.LBB13_30:                              # %._crit_edge184.critedge
	movq	16(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	8(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	24(%rsp), %rdi
	callq	hipStreamSynchronize
.LBB13_31:                              # %._crit_edge184
	movq	144(%rsp), %rdi
	callq	hipFree
	movq	176(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	136(%rsp), %rdi
	callq	hipFree
	movq	120(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	128(%rsp), %rdi
	callq	hipFree
	movq	120(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rdi
	callq	hipHostFree
	movq	104(%rsp), %rdi
	callq	hipHostFree
	movq	96(%rsp), %rdi
	callq	hipHostFree
	movq	88(%rsp), %rdi
	callq	hipHostUnregister
	movq	16(%rsp), %rdi
	callq	hipStreamDestroy
	movq	8(%rsp), %rdi
	callq	hipStreamDestroy
	movq	24(%rsp), %rdi
	callq	hipStreamDestroy
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z12cosNormAsyncPfS_mS_m, .Lfunc_end13-_Z12cosNormAsyncPfS_mS_m
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB14_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB14_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6vecDivPfS_S_j, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7vecProdPfS_S_j, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6vecAddPfS_S_j, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6vecSubPfS_S_j, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9eulVectorPfS_S_j, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8smallSumPhS_i, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12reductionSumPfS_m, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6cumSumPfS_m, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end14:
	.size	__hip_module_ctor, .Lfunc_end14-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB15_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB15_2:
	retq
.Lfunc_end15:
	.size	__hip_module_dtor, .Lfunc_end15-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Major revision number:         %d\n"
	.size	.L.str, 35

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Minor revision number:         %d\n"
	.size	.L.str.1, 35

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Name:                          %s\n"
	.size	.L.str.2, 35

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Total global memory:           %u\n"
	.size	.L.str.3, 35

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Total shared memory per block: %u\n"
	.size	.L.str.4, 35

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Total registers per block:     %d\n"
	.size	.L.str.5, 35

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Warp size:                     %d\n"
	.size	.L.str.6, 35

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Maximum memory pitch:          %u\n"
	.size	.L.str.7, 35

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Maximum threads per block:     %d\n"
	.size	.L.str.8, 35

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Maximum dimension %d of block:  %d\n"
	.size	.L.str.9, 36

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Maximum dimension %d of grid:   %d\n"
	.size	.L.str.10, 36

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Clock rate:                    %d\n"
	.size	.L.str.11, 35

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Total constant memory:         %u\n"
	.size	.L.str.12, 35

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Texture alignment:             %u\n"
	.size	.L.str.13, 35

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Concurrent copy and execution: %s\n"
	.size	.L.str.14, 35

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Yes"
	.size	.L.str.15, 4

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"No"
	.size	.L.str.16, 3

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Number of multiprocessors:     %d\n"
	.size	.L.str.17, 35

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Kernel execution timeout:      %s\n"
	.size	.L.str.18, 35

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Avem %d device-uri.\n"
	.size	.L.str.19, 21

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"\nCUDA Device #%d\n"
	.size	.L.str.20, 18

	.type	_Z6vecDivPfS_S_j,@object        # @_Z6vecDivPfS_S_j
	.section	.rodata,"a",@progbits
	.globl	_Z6vecDivPfS_S_j
	.p2align	3, 0x0
_Z6vecDivPfS_S_j:
	.quad	_Z21__device_stub__vecDivPfS_S_j
	.size	_Z6vecDivPfS_S_j, 8

	.type	_Z7vecProdPfS_S_j,@object       # @_Z7vecProdPfS_S_j
	.globl	_Z7vecProdPfS_S_j
	.p2align	3, 0x0
_Z7vecProdPfS_S_j:
	.quad	_Z22__device_stub__vecProdPfS_S_j
	.size	_Z7vecProdPfS_S_j, 8

	.type	_Z6vecAddPfS_S_j,@object        # @_Z6vecAddPfS_S_j
	.globl	_Z6vecAddPfS_S_j
	.p2align	3, 0x0
_Z6vecAddPfS_S_j:
	.quad	_Z21__device_stub__vecAddPfS_S_j
	.size	_Z6vecAddPfS_S_j, 8

	.type	_Z6vecSubPfS_S_j,@object        # @_Z6vecSubPfS_S_j
	.globl	_Z6vecSubPfS_S_j
	.p2align	3, 0x0
_Z6vecSubPfS_S_j:
	.quad	_Z21__device_stub__vecSubPfS_S_j
	.size	_Z6vecSubPfS_S_j, 8

	.type	_Z9eulVectorPfS_S_j,@object     # @_Z9eulVectorPfS_S_j
	.globl	_Z9eulVectorPfS_S_j
	.p2align	3, 0x0
_Z9eulVectorPfS_S_j:
	.quad	_Z24__device_stub__eulVectorPfS_S_j
	.size	_Z9eulVectorPfS_S_j, 8

	.type	_Z8smallSumPhS_i,@object        # @_Z8smallSumPhS_i
	.globl	_Z8smallSumPhS_i
	.p2align	3, 0x0
_Z8smallSumPhS_i:
	.quad	_Z23__device_stub__smallSumPhS_i
	.size	_Z8smallSumPhS_i, 8

	.type	_Z12reductionSumPfS_m,@object   # @_Z12reductionSumPfS_m
	.globl	_Z12reductionSumPfS_m
	.p2align	3, 0x0
_Z12reductionSumPfS_m:
	.quad	_Z27__device_stub__reductionSumPfS_m
	.size	_Z12reductionSumPfS_m, 8

	.type	_Z6cumSumPfS_m,@object          # @_Z6cumSumPfS_m
	.globl	_Z6cumSumPfS_m
	.p2align	3, 0x0
_Z6cumSumPfS_m:
	.quad	_Z21__device_stub__cumSumPfS_m
	.size	_Z6cumSumPfS_m, 8

	.type	.L.str.21,@object               # @.str.21
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.21:
	.asciz	"\n REZULTAT TEST: %f \n"
	.size	.L.str.21, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6vecDivPfS_S_j"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7vecProdPfS_S_j"
	.size	.L__unnamed_2, 18

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z6vecAddPfS_S_j"
	.size	.L__unnamed_3, 17

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z6vecSubPfS_S_j"
	.size	.L__unnamed_4, 17

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z9eulVectorPfS_S_j"
	.size	.L__unnamed_5, 20

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z8smallSumPhS_i"
	.size	.L__unnamed_6, 17

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z12reductionSumPfS_m"
	.size	.L__unnamed_7, 22

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z6cumSumPfS_m"
	.size	.L__unnamed_8, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__vecDivPfS_S_j
	.addrsig_sym _Z22__device_stub__vecProdPfS_S_j
	.addrsig_sym _Z21__device_stub__vecAddPfS_S_j
	.addrsig_sym _Z21__device_stub__vecSubPfS_S_j
	.addrsig_sym _Z24__device_stub__eulVectorPfS_S_j
	.addrsig_sym _Z23__device_stub__smallSumPhS_i
	.addrsig_sym _Z27__device_stub__reductionSumPfS_m
	.addrsig_sym _Z21__device_stub__cumSumPfS_m
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6vecDivPfS_S_j
	.addrsig_sym _Z7vecProdPfS_S_j
	.addrsig_sym _Z6vecAddPfS_S_j
	.addrsig_sym _Z6vecSubPfS_S_j
	.addrsig_sym _Z9eulVectorPfS_S_j
	.addrsig_sym _Z8smallSumPhS_i
	.addrsig_sym _Z12reductionSumPfS_m
	.addrsig_sym _Z6cumSumPfS_m
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6vecDivPfS_S_j        ; -- Begin function _Z6vecDivPfS_S_j
	.globl	_Z6vecDivPfS_S_j
	.p2align	8
	.type	_Z6vecDivPfS_S_j,@function
_Z6vecDivPfS_S_j:                       ; @_Z6vecDivPfS_S_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v4, null, v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v4, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v4, v4, v5, v7
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_div_fixup_f32 v2, v4, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6vecDivPfS_S_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6vecDivPfS_S_j, .Lfunc_end0-_Z6vecDivPfS_S_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 268
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7vecProdPfS_S_j       ; -- Begin function _Z7vecProdPfS_S_j
	.globl	_Z7vecProdPfS_S_j
	.p2align	8
	.type	_Z7vecProdPfS_S_j,@function
_Z7vecProdPfS_S_j:                      ; @_Z7vecProdPfS_S_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7vecProdPfS_S_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7vecProdPfS_S_j, .Lfunc_end1-_Z7vecProdPfS_S_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6vecAddPfS_S_j        ; -- Begin function _Z6vecAddPfS_S_j
	.globl	_Z6vecAddPfS_S_j
	.p2align	8
	.type	_Z6vecAddPfS_S_j,@function
_Z6vecAddPfS_S_j:                       ; @_Z6vecAddPfS_S_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6vecAddPfS_S_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z6vecAddPfS_S_j, .Lfunc_end2-_Z6vecAddPfS_S_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6vecSubPfS_S_j        ; -- Begin function _Z6vecSubPfS_S_j
	.globl	_Z6vecSubPfS_S_j
	.p2align	8
	.type	_Z6vecSubPfS_S_j,@function
_Z6vecSubPfS_S_j:                       ; @_Z6vecSubPfS_S_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6vecSubPfS_S_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z6vecSubPfS_S_j, .Lfunc_end3-_Z6vecSubPfS_S_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9eulVectorPfS_S_j     ; -- Begin function _Z9eulVectorPfS_S_j
	.globl	_Z9eulVectorPfS_S_j
	.p2align	8
	.type	_Z9eulVectorPfS_S_j,@function
_Z9eulVectorPfS_S_j:                    ; @_Z9eulVectorPfS_S_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB4_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v2, v2, v2
	global_store_b32 v[0:1], v2, off
.LBB4_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9eulVectorPfS_S_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z9eulVectorPfS_S_j, .Lfunc_end4-_Z9eulVectorPfS_S_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8smallSumPhS_i        ; -- Begin function _Z8smallSumPhS_i
	.globl	_Z8smallSumPhS_i
	.p2align	8
	.type	_Z8smallSumPhS_i,@function
_Z8smallSumPhS_i:                       ; @_Z8smallSumPhS_i
; %bb.0:
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0x3ff, v0
	s_cbranch_execz .LBB5_2
; %bb.1:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s2, s15, s2
	s_addk_i32 s2, 0x3ff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
	s_ashr_i32 s3, s2, 31
	s_lshr_b32 s3, s3, 22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s2, s3
	s_ashr_i32 s3, s3, 10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s2, s3, 31
	s_add_u32 s0, s0, s3
	s_addc_u32 s1, s1, s2
	global_store_b8 v0, v1, s[0:1]
.LBB5_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8smallSumPhS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z8smallSumPhS_i, .Lfunc_end5-_Z8smallSumPhS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 128
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12reductionSumPfS_m   ; -- Begin function _Z12reductionSumPfS_m
	.globl	_Z12reductionSumPfS_m
	.p2align	8
	.type	_Z12reductionSumPfS_m,@function
_Z12reductionSumPfS_m:                  ; @_Z12reductionSumPfS_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB6_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB6_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB6_1 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB6_4
; %bb.3:                                ;   in Loop: Header=BB6_1 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB6_4:                                ;   in Loop: Header=BB6_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s0
	s_branch .LBB6_1
.LBB6_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB6_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB6_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12reductionSumPfS_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z12reductionSumPfS_m, .Lfunc_end6-_Z12reductionSumPfS_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6cumSumPfS_m          ; -- Begin function _Z6cumSumPfS_m
	.globl	_Z6cumSumPfS_m
	.p2align	8
	.type	_Z6cumSumPfS_m,@function
_Z6cumSumPfS_m:                         ; @_Z6cumSumPfS_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s4, 0xffff
	s_bfe_u32 s4, s4, 0xf0001
	s_mul_i32 s15, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, s15, v0
	v_add_nc_u32_e32 v5, s4, v0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s15, v5
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s0, 1
	s_clause 0x1
	global_load_b32 v4, v[3:4], off
	global_load_b32 v6, v[1:2], off
	v_add_nc_u32_e32 v1, 8, v5
	v_lshl_add_u32 v2, v0, 2, 0
	v_lshl_or_b32 v3, v0, 1, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, v1, v5
	v_lshrrev_b32_e32 v1, 6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v5
	v_lshl_add_u32 v1, v1, 2, 0
	s_waitcnt vmcnt(1)
	ds_store_b32 v2, v4
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v6
	s_cbranch_scc1 .LBB7_6
; %bb.1:                                ; %.lr.ph
	s_mov_b32 s1, s5
.LBB7_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshr_b32 s6, s1, 1
	s_mov_b32 s7, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB7_4
; %bb.3:                                ;   in Loop: Header=BB7_2 Depth=1
	v_mul_lo_u32 v4, s0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v5, s0, v4
	v_add_nc_u32_e32 v6, -1, v4
	v_add_nc_u32_e32 v4, 7, v4
	v_add_nc_u32_e32 v7, -1, v5
	v_add_nc_u32_e32 v5, 7, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, v4, v6
	v_ashrrev_i32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 6, v4
	v_ashrrev_i32_e32 v5, 6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v6
	v_add_nc_u32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v4, v4, 2, 0
	v_lshl_add_u32 v5, v5, 2, 0
	ds_load_b32 v4, v4
	ds_load_b32 v6, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v4, v4, v6
	ds_store_b32 v5, v4
.LBB7_4:                                ;   in Loop: Header=BB7_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_lshl_b32 s0, s0, 1
	s_cmp_lt_u32 s1, 4
	s_cbranch_scc1 .LBB7_6
; %bb.5:                                ;   in Loop: Header=BB7_2 Depth=1
	s_mov_b32 s1, s6
	s_branch .LBB7_2
.LBB7_6:                                ; %Flow83
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB7_8
; %bb.7:
	s_add_i32 s6, s5, -1
	s_add_i32 s7, s5, 7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s7, s6, s7
	s_lshr_b32 s7, s7, 6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s7, s7, s6
	s_lshl_b32 s6, s7, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s6, s6, 0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, s6
	ds_store_b32 v5, v4
.LBB7_8:
	s_or_b32 exec_lo, exec_lo, s1
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB7_13
; %bb.9:                                ; %.lr.ph74
	s_mov_b32 s1, 1
.LBB7_10:                               ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s0, s0, 1
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB7_12
; %bb.11:                               ;   in Loop: Header=BB7_10 Depth=1
	v_mul_lo_u32 v4, s0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v5, s0, v4
	v_add_nc_u32_e32 v6, -1, v4
	v_add_nc_u32_e32 v4, 7, v4
	v_add_nc_u32_e32 v7, -1, v5
	v_add_nc_u32_e32 v5, 7, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, v4, v6
	v_ashrrev_i32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 6, v4
	v_ashrrev_i32_e32 v5, 6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v6
	v_add_nc_u32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v4, v4, 2, 0
	v_lshl_add_u32 v5, v5, 2, 0
	ds_load_b32 v6, v4
	ds_load_b32 v7, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v6, v7
	ds_store_b32 v4, v7
	ds_store_b32 v5, v6
.LBB7_12:                               ;   in Loop: Header=BB7_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_lshl_b32 s1, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s1, s5
	s_cbranch_scc0 .LBB7_10
.LBB7_13:                               ; %._crit_edge75
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, s2, v4
	v_add_co_ci_u32_e64 v1, null, s3, 0, s0
	s_lshl_b32 s0, s4, 2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v0, vcc_lo, v0, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt lgkmcnt(1)
	global_store_b32 v4, v2, s[2:3]
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6cumSumPfS_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z6cumSumPfS_m, .Lfunc_end7-_Z6cumSumPfS_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 792
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6vecDivPfS_S_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6vecDivPfS_S_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7vecProdPfS_S_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7vecProdPfS_S_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6vecAddPfS_S_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6vecAddPfS_S_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
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...

	.end_amdgpu_metadata
