#include <cuda.h>
#include <stdio.h>
#include <stdlib.h>

#define BLOCK_SIZE 16

__global__ void mandelKernel(
    int *d_out, size_t pitch,
    float lowerX, float lowerY,
    float stepX, float stepY,
    int maxIters
) {
    // To avoid error caused by the floating number, use the following pseudo code
    //
    // float x = lowerX + thisX * stepX;
    // float y = lowerY + thisY * stepY;
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int j = blockIdx.y * blockDim.y + threadIdx.y;

    float c_re = lowerX + i*stepX;
    float c_im = lowerY + j*stepY;
    float z_re = c_re;
    float z_im = c_im;

    int iter;

    for (iter = 0; iter < maxIters; ++iter) {
        if (z_re*z_re + z_im*z_im > 4.f)
            break;

        float new_re = z_re*z_re - z_im*z_im;
        float new_im = 2.f*z_re*z_im;
        z_re = c_re + new_re;
        z_im = c_im + new_im;
    }

    *((int*)((char*)d_out + j * pitch) + i) = iter;
}

// Host front-end function that allocates the memory and launches the GPU kernel
void hostFE (float upperX, float upperY, float lowerX, float lowerY, int* img, int resX, int resY, int maxIterations)
{
    float stepX = (upperX - lowerX) / resX;
    float stepY = (upperY - lowerY) / resY;

    int *h_out, *d_out; // Mandelbort result on host & device
    int size = resX * resY * sizeof(int);

    // Allocate memory on host & device. 
    size_t pitch;
    cudaHostAlloc((void **)&h_out, size, cudaHostAllocDefault);
    cudaMallocPitch((void **)&d_out, &pitch, resX*sizeof(int), resY);

    // CUDA kernel function.
    dim3 block_size(BLOCK_SIZE, BLOCK_SIZE);
    dim3 num_block(resX / BLOCK_SIZE, resY / BLOCK_SIZE);
    mandelKernel<<<num_block, block_size>>>(d_out, pitch,
                                            lowerX, lowerY,
                                            stepX, stepY,
                                            maxIterations);
    // Wait for all CUDA threads to finish.
    cudaDeviceSynchronize();

    // Store result from device to host.
    cudaMemcpy2D(h_out, resX*sizeof(int), d_out, pitch,
                 resX*sizeof(int), resY, cudaMemcpyDeviceToHost);
    memcpy(img, h_out, size);

    // Free memory.
    cudaFreeHost(h_out);
    cudaFree(d_out);
}

	.file	"tmpxft_002672c1_00000000-6_kernel2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z12mandelKernelPimffffiPimffffi
	.type	_Z38__device_stub__Z12mandelKernelPimffffiPimffffi, @function
_Z38__device_stub__Z12mandelKernelPimffffiPimffffi:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	56(%rsp), %rcx
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	48(%rsp), %rdx
	movss	%xmm0, 28(%rsp)
	movss	%xmm1, 24(%rsp)
	movss	%xmm2, 20(%rsp)
	movss	%xmm3, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12mandelKernelPimffffi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z38__device_stub__Z12mandelKernelPimffffiPimffffi, .-_Z38__device_stub__Z12mandelKernelPimffffiPimffffi
	.globl	_Z12mandelKernelPimffffi
	.type	_Z12mandelKernelPimffffi, @function
_Z12mandelKernelPimffffi:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12mandelKernelPimffffiPimffffi
	.cfi_endproc
.LFE2053:
	.size	_Z12mandelKernelPimffffi, .-_Z12mandelKernelPimffffi
	.globl	_Z6hostFEffffPiiii
	.type	_Z6hostFEffffPiiii, @function
_Z6hostFEffffPiiii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%edx, %r15
	xorl	%edx, %edx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	imull	%r15d, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	sall	$2, %ebx
	movss	%xmm0, 28(%rsp)
	leaq	40(%rsp), %rdi
	movslq	%ebx, %rbx
	movss	%xmm1, 24(%rsp)
	movss	%xmm2, 20(%rsp)
	movq	%rbx, %rsi
	movss	%xmm3, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	cudaHostAlloc@PLT
	movslq	%ebp, %rax
	leaq	56(%rsp), %rsi
	movq	%r15, %rcx
	salq	$2, %rax
	leaq	48(%rsp), %rdi
	movq	%rax, %rdx
	movq	%rax, 8(%rsp)
	call	cudaMallocPitch@PLT
	movl	%ebp, %eax
	movl	$16, %ecx
	xorl	%r9d, %r9d
	cltd
	xorl	%r8d, %r8d
	movabsq	$68719476752, %rsi
	movl	$1, 72(%rsp)
	idivl	%ecx
	movq	%rsi, 64(%rsp)
	movl	$1, 84(%rsp)
	movl	%eax, 76(%rsp)
	movl	%r15d, %eax
	cltd
	idivl	%ecx
	movq	%rsi, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	%eax, 80(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movss	16(%rsp), %xmm1
	movss	20(%rsp), %xmm0
	testl	%eax, %eax
	movss	24(%rsp), %xmm5
	movss	28(%rsp), %xmm4
	jne	.L9
	movaps	%xmm5, %xmm3
	movaps	%xmm4, %xmm2
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	cvtsi2ssl	%r15d, %xmm5
	subss	%xmm1, %xmm3
	movl	%r14d, %edx
	cvtsi2ssl	%ebp, %xmm4
	subss	%xmm0, %xmm2
	divss	%xmm5, %xmm3
	divss	%xmm4, %xmm2
	call	_Z38__device_stub__Z12mandelKernelPimffffiPimffffi
.L9:
	call	cudaDeviceSynchronize@PLT
	movq	%r15, %r9
	pushq	%rax
	.cfi_def_cfa_offset 168
	pushq	$2
	.cfi_def_cfa_offset 176
	movq	24(%rsp), %r8
	movq	72(%rsp), %rcx
	movq	56(%rsp), %rdi
	movq	64(%rsp), %rdx
	movq	%r8, %rsi
	call	cudaMemcpy2D@PLT
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	movq	%rbx, %rcx
	rep movsb
	popq	%rdx
	.cfi_def_cfa_offset 168
	popq	%rcx
	.cfi_def_cfa_offset 160
	movq	40(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z6hostFEffffPiiii, .-_Z6hostFEffffPiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z12mandelKernelPimffffi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12mandelKernelPimffffi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

#define BLOCK_SIZE 16

__global__ void mandelKernel(
    int *d_out, size_t pitch,
    float lowerX, float lowerY,
    float stepX, float stepY,
    int maxIters
) {
    // To avoid error caused by the floating number, use the following pseudo code
    //
    // float x = lowerX + thisX * stepX;
    // float y = lowerY + thisY * stepY;
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int j = blockIdx.y * blockDim.y + threadIdx.y;

    float c_re = lowerX + i*stepX;
    float c_im = lowerY + j*stepY;
    float z_re = c_re;
    float z_im = c_im;

    int iter;

    for (iter = 0; iter < maxIters; ++iter) {
        if (z_re*z_re + z_im*z_im > 4.f)
            break;

        float new_re = z_re*z_re - z_im*z_im;
        float new_im = 2.f*z_re*z_im;
        z_re = c_re + new_re;
        z_im = c_im + new_im;
    }

    *((int*)((char*)d_out + j * pitch) + i) = iter;
}

// Host front-end function that allocates the memory and launches the GPU kernel
void hostFE (float upperX, float upperY, float lowerX, float lowerY, int* img, int resX, int resY, int maxIterations)
{
    float stepX = (upperX - lowerX) / resX;
    float stepY = (upperY - lowerY) / resY;

    int *h_out, *d_out; // Mandelbort result on host & device
    int size = resX * resY * sizeof(int);

    // Allocate memory on host & device. 
    size_t pitch;
    hipHostAlloc((void **)&h_out, size, hipHostMallocDefault);
    hipMallocPitch((void **)&d_out, &pitch, resX*sizeof(int), resY);

    // CUDA kernel function.
    dim3 block_size(BLOCK_SIZE, BLOCK_SIZE);
    dim3 num_block(resX / BLOCK_SIZE, resY / BLOCK_SIZE);
    mandelKernel<<<num_block, block_size>>>(d_out, pitch,
                                            lowerX, lowerY,
                                            stepX, stepY,
                                            maxIterations);
    // Wait for all CUDA threads to finish.
    hipDeviceSynchronize();

    // Store result from device to host.
    hipMemcpy2D(h_out, resX*sizeof(int), d_out, pitch,
                 resX*sizeof(int), resY, hipMemcpyDeviceToHost);
    memcpy(img, h_out, size);

    // Free memory.
    hipHostFree(h_out);
    hipFree(d_out);
}

	.text
	.file	"kernel2.hip"
	.globl	_Z27__device_stub__mandelKernelPimffffi # -- Begin function _Z27__device_stub__mandelKernelPimffffi
	.type	_Z27__device_stub__mandelKernelPimffffi,@function
_Z27__device_stub__mandelKernelPimffffi: # @_Z27__device_stub__mandelKernelPimffffi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	28(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	24(%rsp), %rdi
	movss	%xmm1, (%rdi)
	leaq	20(%rsp), %r8
	movss	%xmm2, (%r8)
	leaq	16(%rsp), %r9
	movss	%xmm3, (%r9)
	leaq	12(%rsp), %r10
	movl	%edx, (%r10)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	movq	%r8, 32(%rbx)
	movq	%r9, 40(%rbx)
	movq	%r10, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12mandelKernelPimffffi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__mandelKernelPimffffi, .Lfunc_end0-_Z27__device_stub__mandelKernelPimffffi
	.cfi_endproc
                                        # -- End function
	.globl	_Z6hostFEffffPiiii              # -- Begin function _Z6hostFEffffPiiii
	.type	_Z6hostFEffffPiiii,@function
_Z6hostFEffffPiiii:                     # @_Z6hostFEffffPiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, 44(%rsp)                  # 4-byte Spill
	movl	%edx, %ebp
	movl	%esi, %r13d
	movq	%rdi, 64(%rsp)                  # 8-byte Spill
	movss	%xmm3, 40(%rsp)                 # 4-byte Spill
	movss	%xmm2, 32(%rsp)                 # 4-byte Spill
	movss	%xmm1, 36(%rsp)                 # 4-byte Spill
	movss	%xmm0, 28(%rsp)                 # 4-byte Spill
	movl	%esi, %eax
	imull	%edx, %eax
	shll	$2, %eax
	movslq	%eax, %r14
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	movslq	%r13d, %rbx
	leaq	(,%rbx,4), %r15
	movslq	%ebp, %r12
	leaq	16(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	hipMallocPitch
	leal	15(%rbx), %eax
	testl	%ebx, %ebx
	cmovnsl	%r13d, %eax
	sarl	$4, %eax
	leal	15(%r12), %edi
	testl	%r12d, %r12d
	cmovnsl	%ebp, %edi
	sarl	$4, %edi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movss	40(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	36(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	subss	%xmm1, %xmm3
	cvtsi2ss	%ebp, %xmm0
	divss	%xmm0, %xmm3
	cvtsi2ss	%r13d, %xmm4
	movss	32(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	28(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	subss	%xmm0, %xmm2
	divss	%xmm4, %xmm2
	movq	16(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	44(%rsp), %edx                  # 4-byte Reload
	callq	_Z27__device_stub__mandelKernelPimffffi
.LBB1_2:
	callq	hipDeviceSynchronize
	movq	56(%rsp), %rdi
	movq	16(%rsp), %rdx
	movq	48(%rsp), %rcx
	movl	$2, (%rsp)
	movq	%r15, %rsi
	movq	%r15, %r8
	movq	%r12, %r9
	callq	hipMemcpy2D
	movq	56(%rsp), %r15
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
	movq	%r15, %rdi
	callq	hipHostFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z6hostFEffffPiiii, .Lfunc_end1-_Z6hostFEffffPiiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12mandelKernelPimffffi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12mandelKernelPimffffi,@object # @_Z12mandelKernelPimffffi
	.section	.rodata,"a",@progbits
	.globl	_Z12mandelKernelPimffffi
	.p2align	3, 0x0
_Z12mandelKernelPimffffi:
	.quad	_Z27__device_stub__mandelKernelPimffffi
	.size	_Z12mandelKernelPimffffi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12mandelKernelPimffffi"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__mandelKernelPimffffi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12mandelKernelPimffffi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12mandelKernelPimffffi ; -- Begin function _Z12mandelKernelPimffffi
	.globl	_Z12mandelKernelPimffffi
	.p2align	8
	.type	_Z12mandelKernelPimffffi,@function
_Z12mandelKernelPimffffi:               ; @_Z12mandelKernelPimffffi
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x34
	s_load_b32 s2, s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_cmp_lt_i32 s2, 1
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[4:7], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v2, v0
	v_cvt_f32_i32_e32 v4, v1
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v3, v2, s6, s4
	v_fma_f32 v4, v4, s7, s5
	s_mov_b32 s4, 0
                                        ; implicit-def: $sgpr5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v3 :: v_dual_mov_b32 v5, v4
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v6
	s_or_b32 s5, s5, exec_lo
	v_fma_f32 v2, v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_nlt_f32_e32 vcc_lo, 4.0, v2
	v_mov_b32_e32 v2, s4
	s_and_saveexec_b32 s6, vcc_lo
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f32_e32 v2, v5, v5
	v_add_f32_e32 v6, v6, v6
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s2, s4
	v_dual_sub_f32 v7, v7, v2 :: v_dual_mov_b32 v2, s2
	s_cselect_b32 s7, -1, 0
	v_fma_f32 v5, v5, v6, v4
	s_and_not1_b32 s5, s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_f32_e32 v6, v3, v7
	s_and_b32 s7, s7, exec_lo
	s_or_b32 s5, s5, s7
; %bb.4:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s5
	s_or_b32 s3, s6, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_2
; %bb.5:                                ; %Flow61
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB0_7
.LBB0_6:
	v_mov_b32_e32 v2, 0
.LBB0_7:                                ; %._crit_edge
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v1
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v5, v1, s3
	v_mul_lo_u32 v6, v3, s2
	v_mad_u64_u32 v[3:4], null, v1, s2, s[0:1]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add3_u32 v4, v6, v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v3, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12mandelKernelPimffffi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12mandelKernelPimffffi, .Lfunc_end0-_Z12mandelKernelPimffffi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12mandelKernelPimffffi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12mandelKernelPimffffi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
