
#include <stdio.h>
/* Global variable for returning result of computation */
__device__ float g_res;


/* CUDA kernel for dot product. Optimized for brevity
 */
__global__ void dotp_kernel(double xs[], double ys[]) {
    const unsigned int idx = threadIdx.x + blockIdx.x*blockDim.x;
    double mine = xs[idx] * ys[idx];
    atomicAdd(&g_res, mine);
}

inline void gpuAssert(cudaError_t err, const char* file, int line) {
    if( err != cudaSuccess ) {
        fprintf(stderr,"GPU error: %s %s %d\n", cudaGetErrorString(err), file, line);
        exit(1);
    }
}
#define GPU_ASSERT(ans) {gpuAssert(ans,__FILE__,__LINE__);}

/* Execute kernel on GPU */
extern "C"
double calculate_dot_p(double xs[], double ys[], int n) {
    // Deeply magical constant
    const int block_size = 512; 
    // size padded to nearest multiple of block size
    int n_padded = ((n + block_size - 1)/block_size)*block_size;
    dim3 block(block_size);
    dim3 grid (n_padded/block_size);
    // Buffers for CUDA data
    double *buf_xs = NULL;
    double *buf_ys = NULL;
    // Allocate memory and copy to device
    GPU_ASSERT( cudaMalloc( &buf_xs, n_padded*sizeof(double) ) );
    GPU_ASSERT( cudaMalloc( &buf_ys, n_padded*sizeof(double) ) );
    GPU_ASSERT( cudaMemcpy(buf_xs, xs, n*sizeof(double), cudaMemcpyHostToDevice) );
    GPU_ASSERT( cudaMemcpy(buf_ys, ys, n*sizeof(double), cudaMemcpyHostToDevice) );
    GPU_ASSERT( cudaMemset(buf_xs + n, 0, (n_padded-n) * sizeof(double)) );
    GPU_ASSERT( cudaMemset(buf_ys + n, 0, (n_padded-n) * sizeof(double)) );
    // Execute kernel
    dotp_kernel<<<grid, block>>>(buf_xs, buf_ys);
    // Free buffers & obtain data
    cudaFree( &buf_xs );
    cudaFree( &buf_ys );
    float res;
    GPU_ASSERT( cudaMemcpyFromSymbol(&res, g_res, sizeof(res), 0, cudaMemcpyDeviceToHost) );
    return res;
}

	.file	"tmpxft_002f5010_00000000-6_cuda-dotp.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKci.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPU error: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKci,"axG",@progbits,_Z9gpuAssert9cudaErrorPKci,comdat
	.weak	_Z9gpuAssert9cudaErrorPKci
	.type	_Z9gpuAssert9cudaErrorPKci, @function
_Z9gpuAssert9cudaErrorPKci:
.LFB2027:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movl	12(%rsp), %r9d
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9gpuAssert9cudaErrorPKci, .-_Z9gpuAssert9cudaErrorPKci
	.text
	.globl	_Z33__device_stub__Z11dotp_kernelPdS_PdS_
	.type	_Z33__device_stub__Z11dotp_kernelPdS_PdS_, @function
_Z33__device_stub__Z11dotp_kernelPdS_PdS_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11dotp_kernelPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z33__device_stub__Z11dotp_kernelPdS_PdS_, .-_Z33__device_stub__Z11dotp_kernelPdS_PdS_
	.globl	_Z11dotp_kernelPdS_
	.type	_Z11dotp_kernelPdS_, @function
_Z11dotp_kernelPdS_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z11dotp_kernelPdS_PdS_
	.cfi_endproc
.LFE2054:
	.size	_Z11dotp_kernelPdS_, .-_Z11dotp_kernelPdS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/SKA-ScienceDataProcessor/RC/master/MS2/dna-programs/cuda-dotp.cu"
	.text
	.globl	calculate_dot_p
	.type	calculate_dot_p, @function
calculate_dot_p:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$512, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leal	511(%rdx), %eax
	leaq	32(%rsp), %r15
	movl	$1, 56(%rsp)
	cltd
	movq	%r15, %rdi
	idivl	%ecx
	movl	$8388609, %ecx
	salq	$9, %rcx
	movq	%rcx, 48(%rsp)
	movl	%eax, 60(%rsp)
	movl	%eax, %ebx
	movabsq	$4294967297, %rax
	sall	$9, %ebx
	movq	%rax, 64(%rsp)
	xorl	%eax, %eax
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
	movslq	%ebx, %rax
	subl	%r12d, %ebx
	leaq	0(,%rax,8), %rbp
	movslq	%ebx, %rbx
	movq	%rbp, %rsi
	salq	$3, %rbx
	call	cudaMalloc@PLT
	movl	$36, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	leaq	40(%rsp), %rax
	movq	%rbp, %rsi
	movslq	%r12d, %rbp
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	salq	$3, %rbp
	call	cudaMalloc@PLT
	movl	$37, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	32(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$38, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	40(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$39, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	addq	%rbp, %rdi
	call	cudaMemset@PLT
	movl	$40, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	addq	%rbp, %rdi
	call	cudaMemset@PLT
	movl	$41, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z33__device_stub__Z11dotp_kernelPdS_PdS_
.L14:
	movq	%r15, %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	leaq	28(%rsp), %rdi
	movl	$2, %r8d
	xorl	%ecx, %ecx
	movl	$4, %edx
	leaq	_ZL5g_res(%rip), %rsi
	call	cudaMemcpyFromSymbol@PLT
	movl	$48, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	cvtss2sd	28(%rsp), %xmm0
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	calculate_dot_p, .-calculate_dot_p
	.section	.rodata.str1.1
.LC2:
	.string	"_Z11dotp_kernelPdS_"
.LC3:
	.string	"g_res"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11dotp_kernelPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movl	$4, %r9d
	leaq	_ZL5g_res(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL5g_res
	.comm	_ZL5g_res,4,4
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:



#include <hip/hip_runtime.h>
#include <stdio.h>
/* Global variable for returning result of computation */
__device__ float g_res;


/* CUDA kernel for dot product. Optimized for brevity
 */
__global__ void dotp_kernel(double xs[], double ys[]) {
    const unsigned int idx = threadIdx.x + blockIdx.x*blockDim.x;
    double mine = xs[idx] * ys[idx];
    atomicAdd(&g_res, mine);
}

inline void gpuAssert(hipError_t err, const char* file, int line) {
    if( err != hipSuccess ) {
        fprintf(stderr,"GPU error: %s %s %d\n", hipGetErrorString(err), file, line);
        exit(1);
    }
}
#define GPU_ASSERT(ans) {gpuAssert(ans,__FILE__,__LINE__);}

/* Execute kernel on GPU */
extern "C"
double calculate_dot_p(double xs[], double ys[], int n) {
    // Deeply magical constant
    const int block_size = 512; 
    // size padded to nearest multiple of block size
    int n_padded = ((n + block_size - 1)/block_size)*block_size;
    dim3 block(block_size);
    dim3 grid (n_padded/block_size);
    // Buffers for CUDA data
    double *buf_xs = NULL;
    double *buf_ys = NULL;
    // Allocate memory and copy to device
    GPU_ASSERT( hipMalloc( &buf_xs, n_padded*sizeof(double) ) );
    GPU_ASSERT( hipMalloc( &buf_ys, n_padded*sizeof(double) ) );
    GPU_ASSERT( hipMemcpy(buf_xs, xs, n*sizeof(double), hipMemcpyHostToDevice) );
    GPU_ASSERT( hipMemcpy(buf_ys, ys, n*sizeof(double), hipMemcpyHostToDevice) );
    GPU_ASSERT( hipMemset(buf_xs + n, 0, (n_padded-n) * sizeof(double)) );
    GPU_ASSERT( hipMemset(buf_ys + n, 0, (n_padded-n) * sizeof(double)) );
    // Execute kernel
    dotp_kernel<<<grid, block>>>(buf_xs, buf_ys);
    // Free buffers & obtain data
    hipFree( &buf_xs );
    hipFree( &buf_ys );
    float res;
    GPU_ASSERT( hipMemcpyFromSymbol(&res, HIP_SYMBOL(g_res), sizeof(res), 0, hipMemcpyDeviceToHost) );
    return res;
}

	.text
	.file	"cuda-dotp.hip"
	.globl	_Z26__device_stub__dotp_kernelPdS_ # -- Begin function _Z26__device_stub__dotp_kernelPdS_
	.type	_Z26__device_stub__dotp_kernelPdS_,@function
_Z26__device_stub__dotp_kernelPdS_:     # @_Z26__device_stub__dotp_kernelPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11dotp_kernelPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__dotp_kernelPdS_, .Lfunc_end0-_Z26__device_stub__dotp_kernelPdS_
	.cfi_endproc
                                        # -- End function
	.globl	calculate_dot_p                 # -- Begin function calculate_dot_p
	.type	calculate_dot_p,@function
calculate_dot_p:                        # @calculate_dot_p
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %r14d
	movq	%rsi, %r15
	movq	%rdi, %r13
	leal	511(%r14), %eax
	leal	1022(%r14), %ebx
	testl	%eax, %eax
	cmovnsl	%eax, %ebx
	movl	%ebx, %ebp
	andl	$-512, %ebp                     # imm = 0xFE00
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rax, (%rsp)
	movslq	%ebp, %r12
	shlq	$3, %r12
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKci.exit
	movq	%rsp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKci.exit20
	movq	8(%rsp), %rdi
	movslq	%r14d, %r12
	shlq	$3, %r12
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKci.exit22
	movq	(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.9:                                # %_Z9gpuAssert10hipError_tPKci.exit24
	movq	8(%rsp), %rdi
	addq	%r12, %rdi
	subl	%r14d, %ebp
	movslq	%ebp, %r14
	shlq	$3, %r14
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.11:                               # %_Z9gpuAssert10hipError_tPKci.exit26
	addq	(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.13:                               # %_Z9gpuAssert10hipError_tPKci.exit28
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	sarl	$9, %ebx
	btsq	$32, %rbx
	addq	$512, %rdx                      # imm = 0x200
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.14:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z26__device_stub__dotp_kernelPdS_
.LBB1_15:
	leaq	8(%rsp), %rdi
	callq	hipFree
	movq	%rsp, %rdi
	callq	hipFree
	leaq	20(%rsp), %rdi
	movl	$g_res, %esi
	movl	$4, %edx
	xorl	%ecx, %ecx
	movl	$2, %r8d
	callq	hipMemcpyFromSymbol
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.17:                               # %_Z9gpuAssert10hipError_tPKci.exit30
	cvtss2sd	20(%rsp), %xmm0
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 80
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$38, %r8d
	jmp	.LBB1_2
.LBB1_4:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$39, %r8d
	jmp	.LBB1_2
.LBB1_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$40, %r8d
	jmp	.LBB1_2
.LBB1_8:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$41, %r8d
	jmp	.LBB1_2
.LBB1_10:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$42, %r8d
	jmp	.LBB1_2
.LBB1_12:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$43, %r8d
	jmp	.LBB1_2
.LBB1_16:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$50, %r8d
.LBB1_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	calculate_dot_p, .Lfunc_end1-calculate_dot_p
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11dotp_kernelPdS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$g_res, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	g_res,@object                   # @g_res
	.local	g_res
	.comm	g_res,4,4
	.type	_Z11dotp_kernelPdS_,@object     # @_Z11dotp_kernelPdS_
	.section	.rodata,"a",@progbits
	.globl	_Z11dotp_kernelPdS_
	.p2align	3, 0x0
_Z11dotp_kernelPdS_:
	.quad	_Z26__device_stub__dotp_kernelPdS_
	.size	_Z11dotp_kernelPdS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/SKA-ScienceDataProcessor/RC/master/MS2/dna-programs/cuda-dotp.hip"
	.size	.L.str, 128

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"GPU error: %s %s %d\n"
	.size	.L.str.1, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11dotp_kernelPdS_"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"g_res"
	.size	.L__unnamed_2, 6

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__dotp_kernelPdS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym g_res
	.addrsig_sym _Z11dotp_kernelPdS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11dotp_kernelPdS_     ; -- Begin function _Z11dotp_kernelPdS_
	.globl	_Z11dotp_kernelPdS_
	.p2align	8
	.type	_Z11dotp_kernelPdS_,@function
_Z11dotp_kernelPdS_:                    ; @_Z11dotp_kernelPdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x1c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[2:3], v[0:1]
	v_bfrev_b32_e32 v2, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_cvt_f32_f64_e32 v0, v[0:1]
.LBB0_1:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s0, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s1, v0, s0
	s_lshl_b32 s0, 1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s2, s2, s0
	s_cmp_lg_u32 s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, s1, v2
	s_cbranch_scc1 .LBB0_1
; %bb.2:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s2, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_5
; %bb.3:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, g_res@rel32@lo+4
	s_addc_u32 s1, s1, g_res@rel32@hi+12
	v_mov_b32_e32 v3, 0
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v1, s3
.LBB0_4:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v2
	global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_4
.LBB0_5:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11dotp_kernelPdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11dotp_kernelPdS_, .Lfunc_end0-_Z11dotp_kernelPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	g_res                   ; @g_res
	.type	g_res,@object
	.section	.bss,"aw",@nobits
	.globl	g_res
	.p2align	2, 0x0
g_res:
	.long	0x00000000                      ; float 0
	.size	g_res, 4

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym g_res
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11dotp_kernelPdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11dotp_kernelPdS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
