#include "includes.h"
__global__ void ComputeColorKernel(float *u, float *v, int width, int height, int stride, float3 *uvRGB, float flowscale) {
int r = blockIdx.y * blockDim.y + threadIdx.y;        // current row
int c = blockIdx.x * blockDim.x + threadIdx.x;        // current column

if ((r < height) && (c < width))
{
int pos = c + stride * r;
float du = u[pos] / flowscale;
float dv = v[pos] / flowscale;

int ncols = 55;
float rad = sqrtf(du * du + dv * dv);
float a = atan2(-dv, -du) / 3.14159f;
float fk = (a + 1) / 2 * ((float)ncols - 1);
int k0 = floorf(fk); //colorwheel index lower bound
int k1 = k0 + 1; //colorwheel index upper bound
if (k1 == ncols) {
k1 = 1;
}
float f = fk - (float)k0;

float colorwheelR[55] = { 255, 255,	255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,
255, 213, 170, 128, 85, 43, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 19, 39, 58, 78, 98, 117, 137, 156,
176, 196, 215, 235, 255, 255, 255, 255, 255, 255 };
float colorwheelG[55] = { 0, 17, 34, 51, 68, 85, 102, 119, 136, 153, 170, 187, 204, 221, 238,
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 232, 209, 186, 163,
140, 116, 93, 70, 47, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
float colorwheelB[55] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 63, 127, 191, 255, 255, 255, 255, 255,
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,
255, 255, 255, 255, 255, 213, 170, 128, 85, 43 };
/*float colorwheel[165] = { 255, 0, 0,
255, 17, 0,
255, 34, 0,
255, 51, 0,
255, 68, 0,
255, 85, 0,
255, 102, 0,
255, 119, 0,
255, 136, 0,
255, 153, 0,
255, 170, 0,
255, 187, 0,
255, 204, 0,
255, 221, 0,
255, 238, 0,
255, 255, 0,
213, 255, 0,
170, 255, 0,
128, 255, 0,
85, 255, 0,
43, 255, 0,
0, 255, 0,
0, 255, 63,
0, 255, 127,
0, 255, 191,
0, 255, 255,
0, 232, 255,
0, 209, 255,
0, 186, 255,
0, 163, 255,
0, 140, 255,
0, 116, 255,
0, 93, 255,
0, 70, 255,
0, 47, 255,
0, 24, 255,
0, 0, 255,
19, 0, 255,
39, 0, 255,
58, 0, 255,
78, 0, 255,
98, 0, 255,
117, 0, 255,
137, 0, 255,
156, 0, 255,
176, 0, 255,
196, 0, 255,
215, 0, 255,
235, 0, 255,
255, 0, 255,
255, 0, 213,
255, 0, 170,
255, 0, 128,
255, 0, 85,
255, 0, 43 };*/

float colR = (1 - f) * (colorwheelR[k0] / 255.0f) + f * (colorwheelR[k1] / 255.0f);
float colG = (1 - f) * (colorwheelG[k0] / 255.0f) + f * (colorwheelG[k1] / 255.0f);
float colB = (1 - f) * (colorwheelB[k0] / 255.0f) + f * (colorwheelB[k1] / 255.0f);

if (rad <= 1) {
colR = 1 - rad * (1 - colR);
colG = 1 - rad * (1 - colG);
colB = 1 - rad * (1 - colB);
}
else {
colR = colR * 0.75;
colG = colG * 0.75;
colB = colB * 0.75;
}

uvRGB[pos].z = (colR);
uvRGB[pos].y = (colG);
uvRGB[pos].x = (colB);
}
}
	.file	"tmpxft_0028a77a_00000000-6_ComputeColorKernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z52__device_stub__Z18ComputeColorKernelPfS_iiiP6float3fPfS_iiiP6float3f
	.type	_Z52__device_stub__Z18ComputeColorKernelPfS_iiiP6float3fPfS_iiiP6float3f, @function
_Z52__device_stub__Z18ComputeColorKernelPfS_iiiP6float3fPfS_iiiP6float3f:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movq	%r9, 8(%rsp)
	movss	%xmm0, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z18ComputeColorKernelPfS_iiiP6float3f(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z52__device_stub__Z18ComputeColorKernelPfS_iiiP6float3fPfS_iiiP6float3f, .-_Z52__device_stub__Z18ComputeColorKernelPfS_iiiP6float3fPfS_iiiP6float3f
	.globl	_Z18ComputeColorKernelPfS_iiiP6float3f
	.type	_Z18ComputeColorKernelPfS_iiiP6float3f, @function
_Z18ComputeColorKernelPfS_iiiP6float3f:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z18ComputeColorKernelPfS_iiiP6float3fPfS_iiiP6float3f
	.cfi_endproc
.LFE2033:
	.size	_Z18ComputeColorKernelPfS_iiiP6float3f, .-_Z18ComputeColorKernelPfS_iiiP6float3f
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z18ComputeColorKernelPfS_iiiP6float3f"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18ComputeColorKernelPfS_iiiP6float3f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void ComputeColorKernel(float *u, float *v, int width, int height, int stride, float3 *uvRGB, float flowscale) {
int r = blockIdx.y * blockDim.y + threadIdx.y;        // current row
int c = blockIdx.x * blockDim.x + threadIdx.x;        // current column

if ((r < height) && (c < width))
{
int pos = c + stride * r;
float du = u[pos] / flowscale;
float dv = v[pos] / flowscale;

int ncols = 55;
float rad = sqrtf(du * du + dv * dv);
float a = atan2(-dv, -du) / 3.14159f;
float fk = (a + 1) / 2 * ((float)ncols - 1);
int k0 = floorf(fk); //colorwheel index lower bound
int k1 = k0 + 1; //colorwheel index upper bound
if (k1 == ncols) {
k1 = 1;
}
float f = fk - (float)k0;

float colorwheelR[55] = { 255, 255,	255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,
255, 213, 170, 128, 85, 43, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 19, 39, 58, 78, 98, 117, 137, 156,
176, 196, 215, 235, 255, 255, 255, 255, 255, 255 };
float colorwheelG[55] = { 0, 17, 34, 51, 68, 85, 102, 119, 136, 153, 170, 187, 204, 221, 238,
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 232, 209, 186, 163,
140, 116, 93, 70, 47, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
float colorwheelB[55] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 63, 127, 191, 255, 255, 255, 255, 255,
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,
255, 255, 255, 255, 255, 213, 170, 128, 85, 43 };
/*float colorwheel[165] = { 255, 0, 0,
255, 17, 0,
255, 34, 0,
255, 51, 0,
255, 68, 0,
255, 85, 0,
255, 102, 0,
255, 119, 0,
255, 136, 0,
255, 153, 0,
255, 170, 0,
255, 187, 0,
255, 204, 0,
255, 221, 0,
255, 238, 0,
255, 255, 0,
213, 255, 0,
170, 255, 0,
128, 255, 0,
85, 255, 0,
43, 255, 0,
0, 255, 0,
0, 255, 63,
0, 255, 127,
0, 255, 191,
0, 255, 255,
0, 232, 255,
0, 209, 255,
0, 186, 255,
0, 163, 255,
0, 140, 255,
0, 116, 255,
0, 93, 255,
0, 70, 255,
0, 47, 255,
0, 24, 255,
0, 0, 255,
19, 0, 255,
39, 0, 255,
58, 0, 255,
78, 0, 255,
98, 0, 255,
117, 0, 255,
137, 0, 255,
156, 0, 255,
176, 0, 255,
196, 0, 255,
215, 0, 255,
235, 0, 255,
255, 0, 255,
255, 0, 213,
255, 0, 170,
255, 0, 128,
255, 0, 85,
255, 0, 43 };*/

float colR = (1 - f) * (colorwheelR[k0] / 255.0f) + f * (colorwheelR[k1] / 255.0f);
float colG = (1 - f) * (colorwheelG[k0] / 255.0f) + f * (colorwheelG[k1] / 255.0f);
float colB = (1 - f) * (colorwheelB[k0] / 255.0f) + f * (colorwheelB[k1] / 255.0f);

if (rad <= 1) {
colR = 1 - rad * (1 - colR);
colG = 1 - rad * (1 - colG);
colB = 1 - rad * (1 - colB);
}
else {
colR = colR * 0.75;
colG = colG * 0.75;
colB = colB * 0.75;
}

uvRGB[pos].z = (colR);
uvRGB[pos].y = (colG);
uvRGB[pos].x = (colB);
}
}
	.text
	.file	"ComputeColorKernel.hip"
	.globl	_Z33__device_stub__ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf # -- Begin function _Z33__device_stub__ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.type	_Z33__device_stub__ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf,@function
_Z33__device_stub__ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf: # @_Z33__device_stub__ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	8(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf, .Lfunc_end0-_Z33__device_stub__ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf,@object # @_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.section	.rodata,"a",@progbits
	.globl	_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.p2align	3, 0x0
_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf:
	.quad	_Z33__device_stub__ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.size	_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf"
	.size	.L__unnamed_1, 56

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf ; -- Begin function _Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.globl	_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
	.p2align	8
	.type	_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf,@function
_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf: ; @_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x28
	v_mad_u64_u32 v[3:4], null, v0, s6, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v2, v[4:5], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v1, null, s3, s3, v2
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v4, null, s3, s3, v0
	v_div_scale_f32 v9, vcc_lo, v2, s3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v5, v1
	v_rcp_f32_e32 v6, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v1, v5, 1.0
	v_fma_f32 v8, -v4, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v5, v7, v5 :: v_dual_fmac_f32 v6, v8, v6
	v_div_scale_f32 v7, s2, v0, s3, v0
	v_mul_f32_e32 v8, v9, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v10, v7, v6
	v_fma_f32 v11, -v1, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v4, v10, v7
	v_fmac_f32_e32 v8, v11, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, v12, v6
	v_fma_f32 v1, -v1, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v4, -v4, v10, v7
	v_div_fmas_f32 v1, v1, v5, v8
	s_mov_b32 vcc_lo, s2
	s_mov_b32 s2, 0x3b2d2a58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v4, v4, v6, v10
	v_div_fixup_f32 v10, v1, s3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v11, v4, s3, v0
	v_max_f32_e64 v0, |v10|, |v11|
	v_min_f32_e64 v2, |v10|, |v11|
	v_cmp_gt_f32_e64 vcc_lo, |v11|, |v10|
	v_cmp_class_f32_e64 s3, v11, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_frexp_mant_f32_e32 v1, v0
	v_frexp_exp_i32_f32_e32 v0, v0
	v_frexp_exp_i32_f32_e32 v4, v2
	v_frexp_mant_f32_e32 v2, v2
	v_rcp_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v4, v0
	s_waitcnt_depctr 0xfff
	v_dual_mov_b32 v4, 0x4016cbe4 :: v_dual_mul_f32 v1, v2, v1
	v_ldexp_f32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v0, v0
	v_fmaak_f32 v2, s2, v1, 0xbc7a590c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v2, v1, v2, 0x3d29fb3f
	v_fmaak_f32 v2, v1, v2, 0xbd97d4d7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v2, v1, v2, 0x3dd931b2
	v_fmaak_f32 v2, v1, v2, 0xbe1160e6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v2, v1, v2, 0x3e4cb8bf
	v_fmaak_f32 v2, v1, v2, 0xbeaaaa62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v1, v2
	v_fmac_f32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v1, 0x3fc90fdb, v0
	v_cndmask_b32_e32 v0, v0, v1, vcc_lo
	v_xor_b32_e32 v1, 0x80000000, v10
	v_cmp_lt_f32_e32 vcc_lo, 0, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v2, 0x40490fdb, v0
	v_cmp_gt_i32_e64 s2, 0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	v_cndmask_b32_e64 v1, 0, 0x40490fdb, s2
	v_cndmask_b32_e32 v2, 0x3f490fdb, v4, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0, v11
	v_cmp_class_f32_e64 s2, v10, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, v0, v1, vcc_lo
	s_and_b32 vcc_lo, s2, s3
	v_xor_b32_e32 v1, 0x80000000, v11
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelR@rel32@lo+4
	s_addc_u32 s3, s3, __const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelR@rel32@hi+12
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, __const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelG@rel32@lo+4
	s_addc_u32 s5, s5, __const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelG@rel32@hi+12
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v10, v11
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelB@rel32@lo+4
	s_addc_u32 s7, s7, __const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelB@rel32@hi+12
	v_cndmask_b32_e32 v0, 0x7fc00000, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0x7fffffff, v0, v1
	v_div_scale_f32 v1, null, 0x40490fd0, 0x40490fd0, v0
	v_div_scale_f32 v5, vcc_lo, v0, 0x40490fd0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v1, v2, 1.0
	v_fmac_f32_e32 v2, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v5, v2
	v_fma_f32 v6, -v1, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v6, v2
	v_fma_f32 v1, -v1, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v1, v1, v2, v4
	v_div_fixup_f32 v0, v1, 0x40490fd0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, 1.0, v0
	v_mul_f32_e32 v12, 0.5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, 0x42580000, v12
	v_floor_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v0, v0
	v_add_nc_u32_e32 v2, 1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_ne_u32_e32 vcc_lo, 55, v2
	v_cndmask_b32_e32 v4, 1, v2, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_cvt_f32_i32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v6, vcc_lo, v1, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v2, vcc_lo
	v_add_co_u32 v8, vcc_lo, v1, s4
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, v1, s6
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v13, v[6:7], off
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[1:2], off
	v_add_co_u32 v1, vcc_lo, v4, s2
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v4, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v14, v[1:2], off
	v_add_co_u32 v1, vcc_lo, v4, s6
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v5, v[6:7], off
	global_load_b32 v1, v[1:2], off
	v_mul_f32_e32 v2, v11, v11
	v_fma_f32 v0, 0x42580000, v12, -v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v10, v10
	v_mul_f32_e32 v4, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_sqrt_f32_e32 v4, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v6, -1, v4
	v_add_nc_u32_e32 v7, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, -v6, v4, v2
	v_fma_f32 v11, -v7, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v10
	v_cndmask_b32_e64 v4, v4, v6, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v11
	v_cndmask_b32_e64 v4, v4, v7, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, 0x37800000, v4
	v_dual_cndmask_b32 v7, v4, v6 :: v_dual_sub_f32 v6, 1.0, v0
	s_waitcnt vmcnt(5)
	v_div_scale_f32 v4, null, 0x437f0000, 0x437f0000, v13
	s_waitcnt vmcnt(4)
	v_div_scale_f32 v11, null, 0x437f0000, 0x437f0000, v8
	s_waitcnt vmcnt(3)
	v_div_scale_f32 v15, null, 0x437f0000, 0x437f0000, v9
	v_rcp_f32_e32 v17, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v18, v11
	v_div_scale_f32 v10, vcc_lo, v13, 0x437f0000, v13
	v_rcp_f32_e32 v19, v15
	s_waitcnt vmcnt(2)
	v_div_scale_f32 v20, null, 0x437f0000, 0x437f0000, v14
	v_div_scale_f32 v12, s2, v8, 0x437f0000, v8
	v_div_scale_f32 v16, s3, v9, 0x437f0000, v9
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v22, null, 0x437f0000, 0x437f0000, v5
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v24, null, 0x437f0000, 0x437f0000, v1
	v_fma_f32 v25, -v4, v17, 1.0
	v_rcp_f32_e32 v26, v20
	v_fma_f32 v27, -v11, v18, 1.0
	v_rcp_f32_e32 v28, v22
	v_fma_f32 v29, -v15, v19, 1.0
	v_rcp_f32_e32 v30, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v17, v25, v17 :: v_dual_fmac_f32 v18, v27, v18
	v_div_scale_f32 v21, s4, v14, 0x437f0000, v14
	v_fmac_f32_e32 v19, v29, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_mul_f32_e32 v27, v10, v17
	v_fma_f32 v29, -v20, v26, 1.0
	v_mul_f32_e32 v31, v12, v18
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f32 v32, -v22, v28, 1.0
	v_fma_f32 v34, -v24, v30, 1.0
	v_fma_f32 v35, -v4, v27, v10
	v_fmac_f32_e32 v26, v29, v26
	v_div_scale_f32 v23, s5, v5, 0x437f0000, v5
	v_mul_f32_e32 v33, v16, v19
	v_fma_f32 v29, -v11, v31, v12
	v_fmac_f32_e32 v28, v32, v28
	v_dual_fmac_f32 v30, v34, v30 :: v_dual_fmac_f32 v27, v35, v17
	v_mul_f32_e32 v34, v21, v26
	v_fma_f32 v32, -v15, v33, v16
	v_fmac_f32_e32 v31, v29, v18
	v_mul_f32_e32 v29, v23, v28
	v_fma_f32 v4, -v4, v27, v10
	v_fma_f32 v10, -v20, v34, v21
	v_div_scale_f32 v25, s6, v1, 0x437f0000, v1
	v_fmac_f32_e32 v33, v32, v19
	v_fma_f32 v32, -v22, v29, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v34, v10, v26
	v_mul_f32_e32 v35, v25, v30
	v_div_fmas_f32 v4, v4, v17, v27
	v_fma_f32 v11, -v11, v31, v12
	v_fmac_f32_e32 v29, v32, v28
	v_fma_f32 v12, -v20, v34, v21
	v_fma_f32 v36, -v24, v35, v25
	s_mov_b32 vcc_lo, s4
	v_div_fixup_f32 v4, v4, 0x437f0000, v13
	v_fma_f32 v13, -v22, v29, v23
	v_div_fmas_f32 v12, v12, v26, v34
	s_mov_b32 vcc_lo, s2
	v_fmac_f32_e32 v35, v36, v30
	v_fma_f32 v10, -v15, v33, v16
	v_div_fmas_f32 v11, v11, v18, v31
	s_mov_b32 vcc_lo, s5
	v_mul_f32_e32 v4, v4, v6
	v_div_fmas_f32 v13, v13, v28, v29
	s_mov_b32 vcc_lo, s3
	v_fma_f32 v15, -v24, v35, v25
	v_div_fmas_f32 v10, v10, v19, v33
	s_mov_b32 vcc_lo, s6
	v_div_fixup_f32 v8, v11, 0x437f0000, v8
	s_mov_b32 s2, exec_lo
	v_div_fmas_f32 v11, v15, v30, v35
	v_div_fixup_f32 v9, v10, 0x437f0000, v9
	v_div_fixup_f32 v10, v12, 0x437f0000, v14
	v_div_fixup_f32 v12, v13, 0x437f0000, v5
	v_mul_f32_e32 v5, v8, v6
	v_div_fixup_f32 v1, v11, 0x437f0000, v1
	v_mul_f32_e32 v6, v9, v6
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	v_fmac_f32_e32 v4, v10, v0
	v_fmac_f32_e32 v5, v12, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v6, v1, v0 :: v_dual_cndmask_b32 v7, v7, v2
                                        ; implicit-def: $vgpr0
	v_cmpx_ge_f32_e32 1.0, v7
	s_xor_b32 s2, exec_lo, s2
; %bb.2:
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v0, 1.0, v4 :: v_dual_sub_f32 v1, 1.0, v5
	v_sub_f32_e32 v4, 1.0, v6
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v2, -v7, v0, 1.0
	v_fma_f32 v1, -v7, v1, 1.0
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v0, -v7, v4, 1.0
                                        ; implicit-def: $vgpr4
; %bb.3:                                ; %Flow
	s_and_not1_saveexec_b32 s2, s2
; %bb.4:
	v_dual_mul_f32 v2, 0x3f400000, v4 :: v_dual_mul_f32 v1, 0x3f400000, v5
	v_mul_f32_e32 v0, 0x3f400000, v6
; %bb.5:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[4:5], null, v3, 12, s[0:1]
	global_store_b96 v[4:5], v[0:2], off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 37
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf, .Lfunc_end0-_Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1976
; NumSgprs: 18
; NumVgprs: 37
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 37
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelR,@object ; @__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelR
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelR:
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x43550000                      ; float 213
	.long	0x432a0000                      ; float 170
	.long	0x43000000                      ; float 128
	.long	0x42aa0000                      ; float 85
	.long	0x422c0000                      ; float 43
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x41980000                      ; float 19
	.long	0x421c0000                      ; float 39
	.long	0x42680000                      ; float 58
	.long	0x429c0000                      ; float 78
	.long	0x42c40000                      ; float 98
	.long	0x42ea0000                      ; float 117
	.long	0x43090000                      ; float 137
	.long	0x431c0000                      ; float 156
	.long	0x43300000                      ; float 176
	.long	0x43440000                      ; float 196
	.long	0x43570000                      ; float 215
	.long	0x436b0000                      ; float 235
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.size	__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelR, 220

	.type	__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelG,@object ; @__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelG
	.p2align	4, 0x0
__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelG:
	.long	0x00000000                      ; float 0
	.long	0x41880000                      ; float 17
	.long	0x42080000                      ; float 34
	.long	0x424c0000                      ; float 51
	.long	0x42880000                      ; float 68
	.long	0x42aa0000                      ; float 85
	.long	0x42cc0000                      ; float 102
	.long	0x42ee0000                      ; float 119
	.long	0x43080000                      ; float 136
	.long	0x43190000                      ; float 153
	.long	0x432a0000                      ; float 170
	.long	0x433b0000                      ; float 187
	.long	0x434c0000                      ; float 204
	.long	0x435d0000                      ; float 221
	.long	0x436e0000                      ; float 238
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x43680000                      ; float 232
	.long	0x43510000                      ; float 209
	.long	0x433a0000                      ; float 186
	.long	0x43230000                      ; float 163
	.long	0x430c0000                      ; float 140
	.long	0x42e80000                      ; float 116
	.long	0x42ba0000                      ; float 93
	.long	0x428c0000                      ; float 70
	.long	0x423c0000                      ; float 47
	.long	0x41c00000                      ; float 24
	.zero	76
	.size	__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelG, 220

	.type	__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelB,@object ; @__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelB
	.p2align	4, 0x0
__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelB:
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x427c0000                      ; float 63
	.long	0x42fe0000                      ; float 127
	.long	0x433f0000                      ; float 191
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x437f0000                      ; float 255
	.long	0x43550000                      ; float 213
	.long	0x432a0000                      ; float 170
	.long	0x43000000                      ; float 128
	.long	0x42aa0000                      ; float 85
	.long	0x422c0000                      ; float 43
	.size	__const._Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.colorwheelB, 220

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18ComputeColorKernelPfS_iiiP15HIP_vector_typeIfLj3EEf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     37
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
