#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <getopt.h>
#include <curand_kernel.h>
#include <stdlib.h>
#include <cuda.h>
#include <sys/time.h>
#include "aux_fields.cu"
#include<chrono>
#include<iostream>
using namespace std;
using namespace std::chrono;
int blocks_[20][2] = {{8,8},{16,16},{24,24},{32,32},{1,64},{1,128},{1,192},{1,256},{1,320},{1,384},{1,448},{1,512},{1,576},{1,640},{1,704},{1,768},{1,832},{1,896},{1,960},{1,1024}};
int matrices_[7][2] = {{240,240},{496,496},{784,784},{1016,1016},{1232,1232},{1680,1680},{2024,2024}};
int main(int argc, char **argv) {
cudaSetDevice(0);
char* p;int matrix_len=strtol(argv[1], &p, 10);
for(int matrix_looper=0;matrix_looper<matrix_len;matrix_looper++){
for(int block_looper=0;block_looper<20;block_looper++){
int XSIZE=matrices_[matrix_looper][0],YSIZE=matrices_[matrix_looper][1],BLOCKX=blocks_[block_looper][0],BLOCKY=blocks_[block_looper][1];
double *V = NULL;
cudaMalloc(&V, XSIZE*YSIZE);
double *K = NULL;
cudaMalloc(&K, XSIZE*YSIZE);
double gdt = 1;
double dt = 1;
double *Ax = NULL;
cudaMalloc(&Ax, XSIZE*YSIZE);
double *Ay = NULL;
cudaMalloc(&Ay, XSIZE*YSIZE);
double *Az = NULL;
cudaMalloc(&Az, XSIZE*YSIZE);
double *px = NULL;
cudaMalloc(&px, XSIZE*YSIZE);
double *py = NULL;
cudaMalloc(&py, XSIZE*YSIZE);
double *pz = NULL;
cudaMalloc(&pz, XSIZE*YSIZE);
double *pAx = NULL;
cudaMalloc(&pAx, XSIZE*YSIZE);
double *pAy = NULL;
cudaMalloc(&pAy, XSIZE*YSIZE);
double *pAz = NULL;
cudaMalloc(&pAz, XSIZE*YSIZE);
double2 *GV = NULL;
cudaMalloc(&GV, XSIZE*YSIZE);
double2 *EV = NULL;
cudaMalloc(&EV, XSIZE*YSIZE);
double2 *GK = NULL;
cudaMalloc(&GK, XSIZE*YSIZE);
double2 *EK = NULL;
cudaMalloc(&EK, XSIZE*YSIZE);
double2 *GpAx = NULL;
cudaMalloc(&GpAx, XSIZE*YSIZE);
double2 *GpAy = NULL;
cudaMalloc(&GpAy, XSIZE*YSIZE);
double2 *GpAz = NULL;
cudaMalloc(&GpAz, XSIZE*YSIZE);
double2 *EpAx = NULL;
cudaMalloc(&EpAx, XSIZE*YSIZE);
double2 *EpAy = NULL;
cudaMalloc(&EpAy, XSIZE*YSIZE);
double2 *EpAz = NULL;
cudaMalloc(&EpAz, XSIZE*YSIZE);
int iXSIZE= XSIZE;
int iYSIZE= YSIZE;
while(iXSIZE%BLOCKX!=0)
{
iXSIZE++;
}
while(iYSIZE%BLOCKY!=0)
{
iYSIZE++;
}
dim3 gridBlock(iXSIZE/BLOCKX, iYSIZE/BLOCKY);
dim3 threadBlock(BLOCKX, BLOCKY);
cudaFree(0);
aux_fields<<<gridBlock,threadBlock>>>(V,K,gdt,dt,Ax,Ay,Az,px,py,pz,pAx,pAy,pAz,GV,EV,GK,EK,GpAx,GpAy,GpAz,EpAx,EpAy,EpAz);
cudaDeviceSynchronize();
for (int loop_counter = 0; loop_counter < 10; ++loop_counter) {
aux_fields<<<gridBlock,threadBlock>>>(V,K,gdt,dt,Ax,Ay,Az,px,py,pz,pAx,pAy,pAz,GV,EV,GK,EK,GpAx,GpAy,GpAz,EpAx,EpAy,EpAz);
}
auto start = steady_clock::now();
for (int loop_counter = 0; loop_counter < 1000; loop_counter++) {
aux_fields<<<gridBlock,threadBlock>>>(V,K,gdt,dt,Ax,Ay,Az,px,py,pz,pAx,pAy,pAz,GV,EV,GK,EK,GpAx,GpAy,GpAz,EpAx,EpAy,EpAz);
}
auto end = steady_clock::now();
auto usecs = duration_cast<duration<float, microseconds::period> >(end - start);
cout <<'['<<usecs.count()<<','<<'('<<BLOCKX<<','<<BLOCKY<<')' << ','<<'('<<XSIZE<<','<<YSIZE<<')'<<']' << endl;
}
}}
	.file	"tmpxft_0027bc9f_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3955:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3955:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0, @function
_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0:
.LFB4662:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4662:
	.size	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0, .-_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	.globl	_Z10getGid3d3dv
	.type	_Z10getGid3d3dv, @function
_Z10getGid3d3dv:
.LFB2241:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2241:
	.size	_Z10getGid3d3dv, .-_Z10getGid3d3dv
	.globl	_Z88__device_stub__Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_PdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.type	_Z88__device_stub__Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_PdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_, @function
_Z88__device_stub__Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_PdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_:
.LFB3977:
	.cfi_startproc
	endbr64
	subq	$456, %rsp
	.cfi_def_cfa_offset 464
	movq	464(%rsp), %rax
	movq	%rdi, 184(%rsp)
	leaq	208(%rsp), %rdi
	movq	%rsi, 176(%rsp)
	leaq	220(%rsp), %rsi
	movq	%rax, 120(%rsp)
	movq	472(%rsp), %rax
	movq	%rdx, 152(%rsp)
	leaq	192(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movq	480(%rsp), %rax
	movq	%rcx, 144(%rsp)
	leaq	200(%rsp), %rcx
	movq	%rax, 104(%rsp)
	movq	488(%rsp), %rax
	movq	%r8, 136(%rsp)
	movq	%rax, 96(%rsp)
	movq	496(%rsp), %rax
	movq	%r9, 128(%rsp)
	movq	%rax, 88(%rsp)
	movq	504(%rsp), %rax
	movsd	%xmm0, 168(%rsp)
	movq	%rax, 80(%rsp)
	movq	512(%rsp), %rax
	movsd	%xmm1, 160(%rsp)
	movq	%rax, 72(%rsp)
	movq	520(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	528(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	536(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	544(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	552(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	560(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	568(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	576(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 440(%rsp)
	xorl	%eax, %eax
	leaq	184(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 320(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 328(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 336(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 344(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 352(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 360(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 368(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 376(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 384(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 392(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 400(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 408(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 416(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 424(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 432(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 208(%rsp)
	movl	$1, 216(%rsp)
	movq	%rax, 220(%rsp)
	movl	$1, 228(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	200(%rsp)
	.cfi_def_cfa_offset 472
	leaq	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_(%rip), %rdi
	pushq	200(%rsp)
	.cfi_def_cfa_offset 480
	movq	236(%rsp), %rcx
	movl	244(%rsp), %r8d
	movq	224(%rsp), %rsi
	movl	232(%rsp), %edx
	leaq	272(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 472
	popq	%rdx
	.cfi_def_cfa_offset 464
.L5:
	movq	440(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$456, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3977:
	.size	_Z88__device_stub__Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_PdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_, .-_Z88__device_stub__Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_PdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.globl	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.type	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_, @function
_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_:
.LFB3978:
	.cfi_startproc
	endbr64
	jmp	_Z88__device_stub__Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_PdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.cfi_endproc
.LFE3978:
	.size	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_, .-_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3949:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%edi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	movq	8(%rbx), %rdi
	leaq	16(%rsp), %rsi
	xorl	%ebx, %ebx
	movl	$10, %edx
	call	__isoc23_strtol@PLT
	movl	%eax, 12(%rsp)
.L12:
	cmpl	%ebx, 12(%rsp)
	jle	.L29
	leaq	blocks_(%rip), %rbp
.L22:
	xorl	%esi, %esi
	leaq	24(%rsp), %rdi
	movl	0(%rbp), %r13d
	movl	4(%rbp), %r12d
	leaq	matrices_(%rip), %rax
	movq	%rsi, 24(%rsp)
	movl	(%rax,%rbx,8), %eax
	movl	%eax, 4(%rsp)
	leaq	4+matrices_(%rip), %rax
	movl	4(%rsp), %r14d
	movl	(%rax,%rbx,8), %r15d
	imull	%r15d, %r14d
	movslq	%r14d, %r14
	movq	%r14, %rsi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edi, %edi
	movq	%r14, %rsi
	movq	%rdi, 32(%rsp)
	leaq	32(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r8d, %r8d
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r8, 40(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r9d, %r9d
	leaq	48(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r9, 48(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r10d, %r10d
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r10, 56(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r11d, %r11d
	leaq	64(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r11, 64(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	72(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 72(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	80(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 80(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	88(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 88(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	96(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 96(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	104(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 104(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edx, %edx
	leaq	112(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rdx, 112(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%ecx, %ecx
	leaq	120(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rcx, 120(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%esi, %esi
	leaq	128(%rsp), %rdi
	movq	%rsi, 128(%rsp)
	movq	%r14, %rsi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%edi, %edi
	movq	%r14, %rsi
	movq	%rdi, 136(%rsp)
	leaq	136(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r8d, %r8d
	leaq	144(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r8, 144(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r9d, %r9d
	leaq	152(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r9, 152(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r10d, %r10d
	leaq	160(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r10, 160(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%r11d, %r11d
	leaq	168(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r11, 168(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	176(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 176(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	xorl	%eax, %eax
	leaq	184(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 184(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	movl	4(%rsp), %ecx
.L13:
	movl	%ecx, %eax
	cltd
	idivl	%r13d
	movl	%eax, %esi
	testl	%edx, %edx
	je	.L30
	incl	%ecx
	jmp	.L13
.L30:
	movl	%r15d, %ecx
.L15:
	movl	%ecx, %eax
	cltd
	idivl	%r12d
	testl	%edx, %edx
	je	.L31
	incl	%ecx
	jmp	.L15
.L31:
	xorl	%edi, %edi
	movl	%esi, 192(%rsp)
	movl	%eax, 196(%rsp)
	movl	$1, 200(%rsp)
	movl	%r13d, 204(%rsp)
	movl	%r12d, 208(%rsp)
	movl	$1, 212(%rsp)
	call	cudaFree@PLT
	movl	212(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	204(%rsp), %rdx
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movsd	.LC0(%rip), %xmm0
	pushq	%rcx
	.cfi_def_cfa_offset 296
	pushq	192(%rsp)
	.cfi_def_cfa_offset 304
	pushq	192(%rsp)
	.cfi_def_cfa_offset 312
	movaps	%xmm0, %xmm1
	pushq	192(%rsp)
	.cfi_def_cfa_offset 320
	pushq	192(%rsp)
	.cfi_def_cfa_offset 328
	pushq	192(%rsp)
	.cfi_def_cfa_offset 336
	pushq	192(%rsp)
	.cfi_def_cfa_offset 344
	pushq	192(%rsp)
	.cfi_def_cfa_offset 352
	pushq	192(%rsp)
	.cfi_def_cfa_offset 360
	pushq	192(%rsp)
	.cfi_def_cfa_offset 368
	pushq	192(%rsp)
	.cfi_def_cfa_offset 376
	pushq	192(%rsp)
	.cfi_def_cfa_offset 384
	pushq	192(%rsp)
	.cfi_def_cfa_offset 392
	pushq	192(%rsp)
	.cfi_def_cfa_offset 400
	pushq	192(%rsp)
	.cfi_def_cfa_offset 408
	pushq	192(%rsp)
	.cfi_def_cfa_offset 416
	movq	192(%rsp), %r9
	movq	184(%rsp), %r8
	movq	176(%rsp), %rcx
	movq	168(%rsp), %rdx
	movq	160(%rsp), %rsi
	movq	152(%rsp), %rdi
	call	_Z88__device_stub__Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_PdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_
	subq	$-128, %rsp
	.cfi_def_cfa_offset 288
.L17:
	call	cudaDeviceSynchronize@PLT
	movl	$10, %r14d
.L19:
	movl	212(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	204(%rsp), %rdx
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	%rdx
	.cfi_def_cfa_offset 296
	pushq	192(%rsp)
	.cfi_def_cfa_offset 304
	pushq	192(%rsp)
	.cfi_def_cfa_offset 312
	pushq	192(%rsp)
	.cfi_def_cfa_offset 320
	pushq	192(%rsp)
	.cfi_def_cfa_offset 328
	pushq	192(%rsp)
	.cfi_def_cfa_offset 336
	pushq	192(%rsp)
	.cfi_def_cfa_offset 344
	pushq	192(%rsp)
	.cfi_def_cfa_offset 352
	pushq	192(%rsp)
	.cfi_def_cfa_offset 360
	pushq	192(%rsp)
	.cfi_def_cfa_offset 368
	pushq	192(%rsp)
	.cfi_def_cfa_offset 376
	pushq	192(%rsp)
	.cfi_def_cfa_offset 384
	movsd	.LC0(%rip), %xmm1
	pushq	192(%rsp)
	.cfi_def_cfa_offset 392
	pushq	192(%rsp)
	.cfi_def_cfa_offset 400
	pushq	192(%rsp)
	.cfi_def_cfa_offset 408
	movaps	%xmm1, %xmm0
	pushq	192(%rsp)
	.cfi_def_cfa_offset 416
	movq	192(%rsp), %r9
	movq	184(%rsp), %r8
	movq	176(%rsp), %rcx
	movq	168(%rsp), %rdx
	movq	160(%rsp), %rsi
	movq	152(%rsp), %rdi
	call	_Z88__device_stub__Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_PdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_
	subq	$-128, %rsp
	.cfi_def_cfa_offset 288
.L18:
	decl	%r14d
	jne	.L19
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	$1000, 8(%rsp)
	movq	%rax, %r14
.L21:
	movl	212(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	204(%rsp), %rdx
	movq	192(%rsp), %rdi
	movl	200(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	%rax
	.cfi_def_cfa_offset 296
	pushq	192(%rsp)
	.cfi_def_cfa_offset 304
	pushq	192(%rsp)
	.cfi_def_cfa_offset 312
	pushq	192(%rsp)
	.cfi_def_cfa_offset 320
	pushq	192(%rsp)
	.cfi_def_cfa_offset 328
	pushq	192(%rsp)
	.cfi_def_cfa_offset 336
	pushq	192(%rsp)
	.cfi_def_cfa_offset 344
	pushq	192(%rsp)
	.cfi_def_cfa_offset 352
	pushq	192(%rsp)
	.cfi_def_cfa_offset 360
	pushq	192(%rsp)
	.cfi_def_cfa_offset 368
	pushq	192(%rsp)
	.cfi_def_cfa_offset 376
	pushq	192(%rsp)
	.cfi_def_cfa_offset 384
	movsd	.LC0(%rip), %xmm1
	pushq	192(%rsp)
	.cfi_def_cfa_offset 392
	pushq	192(%rsp)
	.cfi_def_cfa_offset 400
	pushq	192(%rsp)
	.cfi_def_cfa_offset 408
	movaps	%xmm1, %xmm0
	pushq	192(%rsp)
	.cfi_def_cfa_offset 416
	movq	192(%rsp), %r9
	movq	184(%rsp), %r8
	movq	176(%rsp), %rcx
	movq	168(%rsp), %rdx
	movq	160(%rsp), %rsi
	movq	152(%rsp), %rdi
	call	_Z88__device_stub__Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_PdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_
	subq	$-128, %rsp
	.cfi_def_cfa_offset 288
.L20:
	decl	8(%rsp)
	jne	.L21
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	$91, %esi
	leaq	_ZSt4cout(%rip), %rdi
	addq	$8, %rbp
	subq	%r14, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC1(%rip), %xmm0
	movss	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movss	8(%rsp), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$40, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	%r13d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$41, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$40, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	4(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	%r15d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$41, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$93, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	160+blocks_(%rip), %rax
	cmpq	%rax, %rbp
	jne	.L22
	incq	%rbx
	jmp	.L12
.L29:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3949:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_"
.LC3:
	.string	"precalc_xorwow_matrix"
.LC4:
	.string	"precalc_xorwow_offset_matrix"
.LC5:
	.string	"mrg32k3aM1"
.LC6:
	.string	"mrg32k3aM2"
.LC7:
	.string	"mrg32k3aM1SubSeq"
.LC8:
	.string	"mrg32k3aM2SubSeq"
.LC9:
	.string	"mrg32k3aM1Seq"
.LC10:
	.string	"mrg32k3aM2Seq"
.LC11:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3980:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P7double2S1_S1_S1_S1_S1_S1_S1_S1_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3980:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	matrices_
	.data
	.align 32
	.type	matrices_, @object
	.size	matrices_, 56
matrices_:
	.long	240
	.long	240
	.long	496
	.long	496
	.long	784
	.long	784
	.long	1016
	.long	1016
	.long	1232
	.long	1232
	.long	1680
	.long	1680
	.long	2024
	.long	2024
	.globl	blocks_
	.align 32
	.type	blocks_, @object
	.size	blocks_, 160
blocks_:
	.long	8
	.long	8
	.long	16
	.long	16
	.long	24
	.long	24
	.long	32
	.long	32
	.long	1
	.long	64
	.long	1
	.long	128
	.long	1
	.long	192
	.long	1
	.long	256
	.long	1
	.long	320
	.long	1
	.long	384
	.long	1
	.long	448
	.long	1
	.long	512
	.long	1
	.long	576
	.long	1
	.long	640
	.long	1
	.long	704
	.long	1
	.long	768
	.long	1
	.long	832
	.long	1
	.long	896
	.long	1
	.long	960
	.long	1
	.long	1024
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1072693248
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <getopt.h>
#include <hiprand/hiprand_kernel.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <sys/time.h>
#include "aux_fields.cu"
#include<chrono>
#include<iostream>
using namespace std;
using namespace std::chrono;
int blocks_[20][2] = {{8,8},{16,16},{24,24},{32,32},{1,64},{1,128},{1,192},{1,256},{1,320},{1,384},{1,448},{1,512},{1,576},{1,640},{1,704},{1,768},{1,832},{1,896},{1,960},{1,1024}};
int matrices_[7][2] = {{240,240},{496,496},{784,784},{1016,1016},{1232,1232},{1680,1680},{2024,2024}};
int main(int argc, char **argv) {
hipSetDevice(0);
char* p;int matrix_len=strtol(argv[1], &p, 10);
for(int matrix_looper=0;matrix_looper<matrix_len;matrix_looper++){
for(int block_looper=0;block_looper<20;block_looper++){
int XSIZE=matrices_[matrix_looper][0],YSIZE=matrices_[matrix_looper][1],BLOCKX=blocks_[block_looper][0],BLOCKY=blocks_[block_looper][1];
double *V = NULL;
hipMalloc(&V, XSIZE*YSIZE);
double *K = NULL;
hipMalloc(&K, XSIZE*YSIZE);
double gdt = 1;
double dt = 1;
double *Ax = NULL;
hipMalloc(&Ax, XSIZE*YSIZE);
double *Ay = NULL;
hipMalloc(&Ay, XSIZE*YSIZE);
double *Az = NULL;
hipMalloc(&Az, XSIZE*YSIZE);
double *px = NULL;
hipMalloc(&px, XSIZE*YSIZE);
double *py = NULL;
hipMalloc(&py, XSIZE*YSIZE);
double *pz = NULL;
hipMalloc(&pz, XSIZE*YSIZE);
double *pAx = NULL;
hipMalloc(&pAx, XSIZE*YSIZE);
double *pAy = NULL;
hipMalloc(&pAy, XSIZE*YSIZE);
double *pAz = NULL;
hipMalloc(&pAz, XSIZE*YSIZE);
double2 *GV = NULL;
hipMalloc(&GV, XSIZE*YSIZE);
double2 *EV = NULL;
hipMalloc(&EV, XSIZE*YSIZE);
double2 *GK = NULL;
hipMalloc(&GK, XSIZE*YSIZE);
double2 *EK = NULL;
hipMalloc(&EK, XSIZE*YSIZE);
double2 *GpAx = NULL;
hipMalloc(&GpAx, XSIZE*YSIZE);
double2 *GpAy = NULL;
hipMalloc(&GpAy, XSIZE*YSIZE);
double2 *GpAz = NULL;
hipMalloc(&GpAz, XSIZE*YSIZE);
double2 *EpAx = NULL;
hipMalloc(&EpAx, XSIZE*YSIZE);
double2 *EpAy = NULL;
hipMalloc(&EpAy, XSIZE*YSIZE);
double2 *EpAz = NULL;
hipMalloc(&EpAz, XSIZE*YSIZE);
int iXSIZE= XSIZE;
int iYSIZE= YSIZE;
while(iXSIZE%BLOCKX!=0)
{
iXSIZE++;
}
while(iYSIZE%BLOCKY!=0)
{
iYSIZE++;
}
dim3 gridBlock(iXSIZE/BLOCKX, iYSIZE/BLOCKY);
dim3 threadBlock(BLOCKX, BLOCKY);
hipFree(0);
aux_fields<<<gridBlock,threadBlock>>>(V,K,gdt,dt,Ax,Ay,Az,px,py,pz,pAx,pAy,pAz,GV,EV,GK,EK,GpAx,GpAy,GpAz,EpAx,EpAy,EpAz);
hipDeviceSynchronize();
for (int loop_counter = 0; loop_counter < 10; ++loop_counter) {
aux_fields<<<gridBlock,threadBlock>>>(V,K,gdt,dt,Ax,Ay,Az,px,py,pz,pAx,pAy,pAz,GV,EV,GK,EK,GpAx,GpAy,GpAz,EpAx,EpAy,EpAz);
}
auto start = steady_clock::now();
for (int loop_counter = 0; loop_counter < 1000; loop_counter++) {
aux_fields<<<gridBlock,threadBlock>>>(V,K,gdt,dt,Ax,Ay,Az,px,py,pz,pAx,pAy,pAz,GV,EV,GK,EK,GpAx,GpAy,GpAz,EpAx,EpAy,EpAz);
}
auto end = steady_clock::now();
auto usecs = duration_cast<duration<float, microseconds::period> >(end - start);
cout <<'['<<usecs.count()<<','<<'('<<BLOCKX<<','<<BLOCKY<<')' << ','<<'('<<XSIZE<<','<<YSIZE<<')'<<']' << endl;
}
}}
	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_ # -- Begin function _Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.type	_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_,@function
_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_: # @_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$304, %rsp                      # imm = 0x130
	.cfi_def_cfa_offset 352
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	48(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	40(%rsp), %r11
	movq	%rdx, (%r11)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r10, 24(%rbx)
	movq	%r11, 32(%rbx)
	movq	%rdx, 40(%rbx)
	movq	%rcx, 48(%rbx)
	movq	%r8, 56(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	384(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	392(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	400(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	408(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	416(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	424(%rsp), %rax
	movq	%rax, 136(%rbx)
	leaq	432(%rsp), %rax
	movq	%rax, 144(%rbx)
	leaq	440(%rsp), %rax
	movq	%rax, 152(%rbx)
	leaq	448(%rsp), %rax
	movq	%rax, 160(%rbx)
	leaq	456(%rsp), %rax
	movq	%rax, 168(%rbx)
	leaq	464(%rsp), %rax
	movq	%rax, 176(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$320, %rsp                      # imm = 0x140
	.cfi_adjust_cfa_offset -320
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_, .Lfunc_end0-_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3ff0000000000000              # double 1
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI1_1:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	8(%rbx), %rdi
	leaq	208(%rsp), %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	testl	%eax, %eax
	jle	.LBB1_20
# %bb.1:                                # %.preheader152.preheader
	movl	%eax, %eax
	movq	%rax, 192(%rsp)                 # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, 176(%rsp)                 # 8-byte Spill
.LBB1_2:                                # %.preheader152
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
                                        #       Child Loop BB1_6 Depth 3
                                        #       Child Loop BB1_10 Depth 3
                                        #       Child Loop BB1_14 Depth 3
	xorl	%ecx, %ecx
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
                                        #       Child Loop BB1_6 Depth 3
                                        #       Child Loop BB1_10 Depth 3
                                        #       Child Loop BB1_14 Depth 3
	movq	176(%rsp), %rax                 # 8-byte Reload
	movl	matrices_(,%rax,8), %r13d
	movl	matrices_+4(,%rax,8), %ebp
	movl	blocks_(,%rcx,8), %r14d
	movq	%rcx, 200(%rsp)                 # 8-byte Spill
	movl	blocks_+4(,%rcx,8), %r12d
	xorl	%r15d, %r15d
	movq	%r15, 168(%rsp)
	movl	%ebp, %eax
	imull	%r13d, %eax
	movslq	%eax, %rbx
	leaq	168(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 160(%rsp)
	leaq	160(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 152(%rsp)
	leaq	152(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 144(%rsp)
	leaq	144(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 136(%rsp)
	leaq	136(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 128(%rsp)
	leaq	128(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 120(%rsp)
	leaq	120(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 112(%rsp)
	leaq	112(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 104(%rsp)
	leaq	104(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 96(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 88(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 80(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 72(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 64(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 56(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 48(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 40(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 32(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 24(%rsp)
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r15, 8(%rsp)
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	%r13d, 188(%rsp)                # 4-byte Spill
	movl	%r13d, %esi
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%esi, %eax
	cltd
	idivl	%r14d
	incl	%esi
	testl	%edx, %edx
	jne	.LBB1_4
# %bb.5:                                # %.preheader.preheader
                                        #   in Loop: Header=BB1_3 Depth=2
	movl	%eax, %ecx
	movl	%ebp, %esi
.LBB1_6:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%esi, %eax
	cltd
	idivl	%r12d
	incl	%esi
	testl	%edx, %edx
	jne	.LBB1_6
# %bb.7:                                #   in Loop: Header=BB1_3 Depth=2
	movl	%eax, %r15d
	movl	%ebp, 4(%rsp)                   # 4-byte Spill
	movl	%ecx, %eax
	shlq	$32, %r15
	orq	%rax, %r15
	movq	%r12, %rbx
	shlq	$32, %rbx
	orq	%r14, %rbx
	xorl	%edi, %edi
	callq	hipFree
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_3 Depth=2
	movq	168(%rsp), %rdi
	movq	160(%rsp), %rsi
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rcx
	movq	136(%rsp), %r8
	movq	128(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movsd	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movaps	%xmm0, %xmm1
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	176(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	192(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	208(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	224(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	240(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
.LBB1_9:                                #   in Loop: Header=BB1_3 Depth=2
	callq	hipDeviceSynchronize
	movl	$10, %ebp
.LBB1_10:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_10 Depth=3
	movq	168(%rsp), %rdi
	movq	160(%rsp), %rsi
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rcx
	movq	136(%rsp), %r8
	movq	128(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movsd	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movaps	%xmm0, %xmm1
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	176(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	192(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	208(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	224(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	240(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
.LBB1_12:                               #   in Loop: Header=BB1_10 Depth=3
	decl	%ebp
	jne	.LBB1_10
# %bb.13:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1000, %ebp                     # imm = 0x3E8
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, %r13
.LBB1_14:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.15:                               #   in Loop: Header=BB1_14 Depth=3
	movq	168(%rsp), %rdi
	movq	160(%rsp), %rsi
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rcx
	movq	136(%rsp), %r8
	movq	128(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movsd	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movaps	%xmm0, %xmm1
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	176(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	192(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	208(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	224(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	240(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
.LBB1_16:                               #   in Loop: Header=BB1_14 Depth=3
	decl	%ebp
	jne	.LBB1_14
# %bb.17:                               #   in Loop: Header=BB1_3 Depth=2
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	subq	%r13, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI1_1(%rip), %xmm0
	movss	%xmm0, 184(%rsp)                # 4-byte Spill
	movb	$91, 3(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB1_21
# %bb.18:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	leaq	3(%rsp), %r15
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_22
.LBB1_21:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$91, %esi
	callq	_ZNSo3putEc
	leaq	3(%rsp), %r15
.LBB1_22:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
                                        #   in Loop: Header=BB1_3 Depth=2
	movl	4(%rsp), %ebp                   # 4-byte Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	184(%rsp), %xmm0                # 4-byte Folded Reload
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movb	$44, 3(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_24
# %bb.23:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_25
.LBB1_24:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_25:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit113
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$40, 3(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_27
# %bb.26:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_28
.LBB1_27:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$40, %esi
	callq	_ZNSo3putEc
.LBB1_28:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit116
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$44, 3(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_30
# %bb.29:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_31
.LBB1_30:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_31:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit119
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$41, 3(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_33
# %bb.32:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_34
.LBB1_33:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$41, %esi
	callq	_ZNSo3putEc
.LBB1_34:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit122
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$44, 3(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_36
# %bb.35:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_37
.LBB1_36:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_37:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit125
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$40, 3(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_39
# %bb.38:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_40
.LBB1_39:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$40, %esi
	callq	_ZNSo3putEc
.LBB1_40:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit128
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	188(%rsp), %esi                 # 4-byte Reload
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$44, 3(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_42
# %bb.41:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_43
.LBB1_42:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_43:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit131
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$41, 3(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_45
# %bb.44:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_46
.LBB1_45:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$41, %esi
	callq	_ZNSo3putEc
.LBB1_46:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit134
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$93, 3(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_48
# %bb.47:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_49
.LBB1_48:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$93, %esi
	callq	_ZNSo3putEc
.LBB1_49:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit137
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	200(%rsp), %rcx                 # 8-byte Reload
	incq	%rcx
	cmpq	$20, %rcx
	jne	.LBB1_3
# %bb.19:                               #   in Loop: Header=BB1_2 Depth=1
	movq	176(%rsp), %rcx                 # 8-byte Reload
	incq	%rcx
	movq	%rcx, %rax
	movq	%rcx, 176(%rsp)                 # 8-byte Spill
	cmpq	192(%rsp), %rcx                 # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_20:                               # %._crit_edge
	xorl	%eax, %eax
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_,@object # @_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.section	.rodata,"a",@progbits
	.globl	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.p2align	3, 0x0
_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_:
	.quad	_Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.size	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_, 8

	.type	blocks_,@object                 # @blocks_
	.data
	.globl	blocks_
	.p2align	4, 0x0
blocks_:
	.long	8                               # 0x8
	.long	8                               # 0x8
	.long	16                              # 0x10
	.long	16                              # 0x10
	.long	24                              # 0x18
	.long	24                              # 0x18
	.long	32                              # 0x20
	.long	32                              # 0x20
	.long	1                               # 0x1
	.long	64                              # 0x40
	.long	1                               # 0x1
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	192                             # 0xc0
	.long	1                               # 0x1
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	320                             # 0x140
	.long	1                               # 0x1
	.long	384                             # 0x180
	.long	1                               # 0x1
	.long	448                             # 0x1c0
	.long	1                               # 0x1
	.long	512                             # 0x200
	.long	1                               # 0x1
	.long	576                             # 0x240
	.long	1                               # 0x1
	.long	640                             # 0x280
	.long	1                               # 0x1
	.long	704                             # 0x2c0
	.long	1                               # 0x1
	.long	768                             # 0x300
	.long	1                               # 0x1
	.long	832                             # 0x340
	.long	1                               # 0x1
	.long	896                             # 0x380
	.long	1                               # 0x1
	.long	960                             # 0x3c0
	.long	1                               # 0x1
	.long	1024                            # 0x400
	.size	blocks_, 160

	.type	matrices_,@object               # @matrices_
	.globl	matrices_
	.p2align	4, 0x0
matrices_:
	.long	240                             # 0xf0
	.long	240                             # 0xf0
	.long	496                             # 0x1f0
	.long	496                             # 0x1f0
	.long	784                             # 0x310
	.long	784                             # 0x310
	.long	1016                            # 0x3f8
	.long	1016                            # 0x3f8
	.long	1232                            # 0x4d0
	.long	1232                            # 0x4d0
	.long	1680                            # 0x690
	.long	1680                            # 0x690
	.long	2024                            # 0x7e8
	.long	2024                            # 0x7e8
	.size	matrices_, 56

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_"
	.size	.L__unnamed_1, 91

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_ ; -- Begin function _Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.globl	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
	.p2align	8
	.type	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_,@function
_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_: ; @_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0xb8
	s_load_b64 s[70:71], s[0:1], 0xc4
	s_add_u32 s4, s0, 0xb8
	s_addc_u32 s5, s1, 0
	v_bfe_u32 v3, v0, 20, 10
	v_bfe_u32 v6, v0, 10, 10
	s_load_b512 s[16:31], s[0:1], 0x0
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	s_mov_b32 s8, 0xfefa39ef
	s_mov_b32 s9, 0xbfe62e42
	s_mov_b32 s10, 0x3b39803f
	s_mov_b32 s11, 0xbc7abc9e
	s_mov_b32 s34, 0xfca7ab0c
	s_mov_b32 s52, 0x6a5dcb37
	s_mov_b32 s35, 0x3e928af3
	s_mov_b32 s53, 0x3e5ade15
	s_mov_b32 s54, 0x623fde64
	s_mov_b32 s55, 0x3ec71dee
	s_mov_b32 s56, 0x7c89e6b0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s3, s15
	s_mov_b32 s57, 0x3efa0199
	s_add_i32 s3, s3, s14
	s_mov_b32 s58, 0x14761f6e
	s_mul_i32 s3, s3, s2
	s_mov_b32 s59, 0x3f2a01a0
	s_add_i32 s3, s3, s13
	s_cmp_lt_u32 s13, s2
	s_mov_b32 s60, 0x1852b7b0
	s_cselect_b32 s2, 12, 18
	s_and_b32 s12, s71, 0xffff
	v_dual_mov_b32 v1, s2 :: v_dual_and_b32 v0, 0x3ff, v0
	v_mad_u64_u32 v[4:5], null, s3, s12, v[3:4]
	s_lshr_b32 s33, s70, 16
	global_load_u16 v9, v1, s[4:5]
	s_mov_b32 s4, 0xa75d2ceb
	s_mov_b32 s5, 0x38f185a6
	s_mov_b32 s61, 0x3f56c16c
	v_div_scale_f64 v[1:2], null, s[4:5], s[4:5], s[20:21]
	v_mad_u64_u32 v[7:8], null, v4, s33, v[6:7]
	s_mov_b32 s62, 0x11122322
	s_mov_b32 s63, 0x3f811111
	s_mov_b32 s64, 0x555502a1
	s_mov_b32 s65, 0x3fa55555
	s_mov_b32 s66, 0x55555511
	s_mov_b32 s67, 0x3fc55555
	s_mov_b32 s68, 11
	s_mov_b32 s69, 0x3fe00000
	s_load_b512 s[36:51], s[0:1], 0x40
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[4:5], null, v7, v9, v[0:1]
	v_rcp_f64_e32 v[7:8], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[10:11], 3, v[4:5]
	v_lshlrev_b64 v[4:5], 4, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, s16, v10
	v_add_co_ci_u32_e32 v15, vcc_lo, s17, v11, vcc_lo
	v_div_scale_f64 v[18:19], vcc_lo, s[20:21], s[4:5], s[20:21]
	s_mov_b32 s17, 0xb8e185a6
	global_load_b64 v[12:13], v[14:15], off
	s_mov_b32 s16, s4
	v_fma_f64 v[16:17], -v[1:2], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[16:17], v[7:8]
	v_fma_f64 v[16:17], -v[1:2], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[16:17], v[7:8]
	v_mul_f64 v[16:17], v[18:19], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], -v[1:2], v[16:17], v[18:19]
	v_div_fmas_f64 v[1:2], v[1:2], v[7:8], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[1:2], v[1:2], s[4:5], s[20:21]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[1:2], v[1:2], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[7:8], v[1:2], s[6:7]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[1:2]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[1:2]
	v_rndne_f64_e32 v[7:8], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[7:8], s[8:9], v[1:2]
	v_cvt_i32_f64_e32 v9, v[7:8]
	v_fma_f64 v[12:13], v[7:8], s[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[12:13], s[52:53], s[34:35]
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[56:57]
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[60:61]
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[64:65]
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[68:69]
	v_fma_f64 v[16:17], v[12:13], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[7:8], v[12:13], v[16:17], 1.0
	v_div_scale_f64 v[16:17], null, s[16:17], s[16:17], s[20:21]
	v_ldexp_f64 v[7:8], v[7:8], v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[1:2], v[16:17]
	v_cndmask_b32_e32 v12, 0x7ff00000, v8, vcc_lo
	s_and_b32 vcc_lo, s2, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s3, s46, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(TRANS32_DEP_1)
	v_cndmask_b32_e32 v18, 0, v7, vcc_lo
	v_cndmask_b32_e64 v19, 0, v12, s2
	v_add_co_u32 v12, vcc_lo, s18, v10
	v_add_co_ci_u32_e64 v9, s3, s47, v5, s3
	v_add_co_ci_u32_e32 v13, vcc_lo, s19, v11, vcc_lo
	v_fma_f64 v[20:21], -v[16:17], v[1:2], 1.0
	global_store_b64 v[8:9], v[18:19], off
	v_div_scale_f64 v[22:23], vcc_lo, s[20:21], s[16:17], s[20:21]
	global_load_b64 v[18:19], v[12:13], off
	s_and_b32 s3, s70, 0xffff
	v_fma_f64 v[1:2], v[1:2], v[20:21], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[16:17], v[1:2], 1.0
	v_fma_f64 v[1:2], v[1:2], v[20:21], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[22:23], v[1:2]
	v_fma_f64 v[16:17], -v[16:17], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[1:2], v[16:17], v[1:2], v[20:21]
	v_div_fixup_f64 v[1:2], v[1:2], s[16:17], s[20:21]
	s_mov_b32 s16, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_mov_b32 s17, s16
	s_waitcnt vmcnt(0)
	v_mul_f64 v[1:2], v[1:2], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[1:2], s[6:7]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[1:2]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[1:2]
	v_rndne_f64_e32 v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[16:17], s[8:9], v[1:2]
	v_cvt_i32_f64_e32 v7, v[16:17]
	v_mad_u64_u32 v[1:2], null, s13, s3, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_fma_f64 v[18:19], v[16:17], s[10:11], v[18:19]
	v_fma_f64 v[20:21], v[18:19], s[52:53], s[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[54:55]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[58:59]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[62:63]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[66:67]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], 1.0
	v_fma_f64 v[16:17], v[18:19], v[20:21], 1.0
	v_add_co_u32 v19, s3, s50, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, s3, s51, v5, s3
	v_add_co_u32 v21, s3, s24, v10
	v_add_co_ci_u32_e64 v22, s3, s25, v11, s3
	v_ldexp_f64 v[16:17], v[16:17], v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, 0x7ff00000, v17, vcc_lo
	s_and_b32 vcc_lo, s2, vcc_lo
	v_dual_mov_b32 v18, s17 :: v_dual_cndmask_b32 v23, 0, v16
	v_add_co_u32 v0, vcc_lo, s30, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v24, 0, v7, s2
	v_mov_b32_e32 v17, s16
	v_add_co_ci_u32_e32 v1, vcc_lo, s31, v1, vcc_lo
	global_store_b64 v[19:20], v[23:24], off
	global_store_b64 v[8:9], v[17:18], off offset:8
	global_store_b64 v[19:20], v[17:18], off offset:8
	global_load_b64 v[7:8], v[21:22], off
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[7:8], v[0:1]
	v_mad_u64_u32 v[7:8], null, s14, s33, v[6:7]
	v_add_co_u32 v6, vcc_lo, s40, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[8:9], 3, v[7:8]
	v_add_co_ci_u32_e32 v7, vcc_lo, s41, v11, vcc_lo
	v_add_co_u32 v16, vcc_lo, s26, v10
	v_add_co_ci_u32_e32 v17, vcc_lo, s27, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s36, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s37, v9, vcc_lo
	global_store_b64 v[6:7], v[0:1], off
	global_load_b64 v[0:1], v[16:17], off
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[0:1], v[8:9]
	v_mad_u64_u32 v[8:9], null, s15, s12, v[3:4]
	s_load_b256 s[12:19], s[0:1], 0x80
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[2:3], 3, v[8:9]
	v_add_co_u32 v8, vcc_lo, s42, v10
	v_add_co_ci_u32_e32 v9, vcc_lo, s43, v11, vcc_lo
	v_add_co_u32 v16, vcc_lo, s28, v10
	v_add_co_ci_u32_e32 v17, vcc_lo, s29, v11, vcc_lo
	v_add_co_u32 v2, vcc_lo, s38, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s39, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s44, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s45, v11, vcc_lo
	global_store_b64 v[8:9], v[0:1], off
	global_load_b64 v[0:1], v[16:17], off
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[0:1], v[2:3]
	global_store_b64 v[10:11], v[0:1], off
	global_load_b64 v[0:1], v[6:7], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], -v[0:1], s[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[2:3], v[0:1], s[6:7]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[0:1]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[0:1]
	v_rndne_f64_e32 v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[2:3], s[8:9], v[0:1]
	v_cvt_i32_f64_e32 v20, v[2:3]
	v_fma_f64 v[16:17], v[2:3], s[10:11], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[16:17], s[52:53], s[34:35]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[56:57]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[60:61]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[64:65]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[68:69]
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[16:17], v[18:19], 1.0
	v_ldexp_f64 v[16:17], v[2:3], v20
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v3, v2
	v_cndmask_b32_e32 v19, 0x7ff00000, v17, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v17, s3, s14, v4
	s_and_b32 vcc_lo, s2, vcc_lo
	v_add_co_ci_u32_e64 v18, s3, s15, v5, s3
	v_cndmask_b32_e64 v1, 0, v19, s2
	v_cndmask_b32_e32 v0, 0, v16, vcc_lo
	global_store_b128 v[17:18], v[0:3], off
	global_load_b64 v[0:1], v[8:9], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], -v[0:1], s[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[0:1], s[6:7]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[0:1]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[0:1]
	v_rndne_f64_e32 v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], s[8:9], v[0:1]
	v_cvt_i32_f64_e32 v3, v[16:17]
	v_fma_f64 v[18:19], v[16:17], s[10:11], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], s[52:53], s[34:35]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[56:57]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[60:61]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[64:65]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[68:69]
	v_fma_f64 v[20:21], v[18:19], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[18:19], v[20:21], 1.0
	v_ldexp_f64 v[16:17], v[16:17], v3
	v_mov_b32_e32 v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v19, 0x7ff00000, v17, vcc_lo
	v_add_co_u32 v17, s3, s16, v4
	s_and_b32 vcc_lo, s2, vcc_lo
	v_add_co_ci_u32_e64 v18, s3, s17, v5, s3
	v_cndmask_b32_e64 v1, 0, v19, s2
	v_cndmask_b32_e32 v0, 0, v16, vcc_lo
	v_add_co_u32 v22, s3, s18, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v23, s3, s19, v5, s3
	global_store_b128 v[17:18], v[0:3], off
	global_load_b64 v[0:1], v[10:11], off
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], -v[0:1], s[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[0:1], s[6:7]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[0:1]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[0:1]
	v_rndne_f64_e32 v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], s[8:9], v[0:1]
	v_cvt_i32_f64_e32 v3, v[16:17]
	v_fma_f64 v[18:19], v[16:17], s[10:11], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], s[52:53], s[34:35]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[56:57]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[60:61]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[64:65]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[68:69]
	v_fma_f64 v[20:21], v[18:19], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[18:19], v[20:21], 1.0
	v_div_scale_f64 v[18:19], null, s[4:5], s[4:5], s[22:23]
	v_ldexp_f64 v[16:17], v[16:17], v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[18:19]
	v_cndmask_b32_e32 v3, 0x7ff00000, v17, vcc_lo
	s_and_b32 vcc_lo, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v0, 0, v16, vcc_lo
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[18:19], v[20:21], 1.0
	v_cndmask_b32_e64 v1, 0, v3, s2
	v_mov_b32_e32 v3, v2
	global_store_b128 v[22:23], v[0:3], off
	global_load_b64 v[0:1], v[14:15], off
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[18:19], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	v_div_scale_f64 v[20:21], vcc_lo, s[22:23], s[4:5], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[20:21], v[16:17]
	v_fma_f64 v[18:19], -v[18:19], v[22:23], v[20:21]
                                        ; implicit-def: $vgpr20_vgpr21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[16:17], v[18:19], v[16:17], v[22:23]
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr18_vgpr19
	v_div_fixup_f64 v[16:17], v[16:17], s[4:5], s[22:23]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[16:17], -v[0:1]
	v_cmpx_ngt_f64_e64 0x41d00000, |v[0:1]|
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_ldexp_f64 v[18:19], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[20:21], |v[0:1]|, 0
	v_and_b32_e32 v3, 0x7fffffff, v1
	v_trig_preop_f64 v[22:23], |v[0:1]|, 1
	v_trig_preop_f64 v[32:33], |v[0:1]|, 2
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0x3ff921fb
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_dual_cndmask_b32 v18, v0, v18 :: v_dual_cndmask_b32 v19, v3, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[24:25], v[20:21], v[18:19]
	v_mul_f64 v[26:27], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[18:19], -v[24:25]
	v_fma_f64 v[22:23], v[22:23], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[28:29], v[26:27], v[20:21]
	v_add_f64 v[30:31], v[28:29], -v[26:27]
	v_add_f64 v[36:37], v[24:25], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[28:29], -v[30:31]
	v_add_f64 v[20:21], v[20:21], -v[30:31]
	v_ldexp_f64 v[30:31], v[36:37], -2
	v_add_f64 v[24:25], v[36:37], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[26:27], -v[34:35]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[30:31]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[28:29], -v[24:25]
	v_add_f64 v[20:21], v[20:21], v[26:27]
	v_fract_f64_e32 v[26:27], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v26, 0, v26, vcc_lo
	v_mul_f64 v[38:39], v[32:33], v[18:19]
	v_cndmask_b32_e32 v27, 0, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[26:27], v[26:27], 2
	v_add_f64 v[34:35], v[38:39], v[22:23]
	v_fma_f64 v[18:19], v[32:33], v[18:19], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[28:29], v[34:35], v[20:21]
	v_add_f64 v[30:31], v[24:25], v[28:29]
	v_add_f64 v[40:41], v[28:29], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[30:31], v[26:27]
	v_add_f64 v[46:47], v[28:29], -v[40:41]
	v_add_f64 v[20:21], v[20:21], -v[40:41]
	v_add_f64 v[24:25], v[30:31], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[36:37]
	v_add_f64 v[36:37], v[34:35], -v[38:39]
	v_cndmask_b32_e64 v3, 0, 0x40100000, vcc_lo
	v_add_f64 v[44:45], v[34:35], -v[36:37]
	v_add_f64 v[22:23], v[22:23], -v[36:37]
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[26:27], v[2:3]
	v_add_f64 v[36:37], v[38:39], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[20:21], v[34:35]
	v_add_f64 v[42:43], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], v[36:37]
	v_cvt_i32_f64_e32 v3, v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[22:23], v[20:21]
	v_add_f64 v[22:23], v[28:29], -v[24:25]
	v_cvt_f64_i32_e32 v[40:41], v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[20:21]
	v_add_f64 v[26:27], v[26:27], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[22:23], v[18:19]
	v_add_f64 v[32:33], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[32:33], -v[26:27]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[32:33]
	v_add_f64 v[20:21], v[30:31], -v[20:21]
	v_add_co_ci_u32_e64 v22, s2, 0, v3, vcc_lo
	v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[32:33], -v[2:3]
	v_add_f64 v[18:19], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[2:3], v[18:19]
	v_mul_f64 v[23:24], v[20:21], s[4:5]
	v_add_f64 v[2:3], v[20:21], -v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[25:26], v[20:21], s[4:5], -v[23:24]
	v_add_f64 v[2:3], v[18:19], -v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], s[6:7], v[25:26]
	v_fma_f64 v[2:3], v[2:3], s[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[23:24], v[2:3]
	v_add_f64 v[20:21], v[18:19], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[2:3], -v[20:21]
.LBB0_2:                                ; %Flow248
	s_and_not1_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_4
; %bb.3:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[2:3], v[2:3]
	v_fma_f64 v[18:19], v[2:3], s[4:5], |v[0:1]|
	v_mul_f64 v[20:21], v[2:3], s[6:7]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[2:3], s[6:7], v[18:19]
	v_add_f64 v[22:23], v[18:19], v[20:21]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[20:21]
	v_fma_f64 v[20:21], v[2:3], s[6:7], v[20:21]
	v_add_f64 v[18:19], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[20:21]
	v_fma_f64 v[20:21], v[2:3], s[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[24:25], v[20:21]
	v_add_f64 v[22:23], v[18:19], -v[24:25]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	v_cvt_i32_f64_e32 v22, v[2:3]
.LBB0_4:                                ; %_ZL3cosd.exit
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f64 v[2:3], v[18:19], v[18:19]
	s_mov_b32 s2, 0xb42fdfa7
	s_mov_b32 s4, 0xf9a43bb8
	s_mov_b32 s3, 0xbe5ae600
	s_mov_b32 s5, 0x3de5e0b2
	s_mov_b32 s6, 0x796cde01
	s_mov_b32 s7, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[31:32], v[20:21], 0.5
	v_fma_f64 v[23:24], v[2:3], s[4:5], s[2:3]
	s_mov_b32 s2, 0x9037ab78
	s_mov_b32 s4, 0x46cc5e42
	s_mov_b32 s3, 0x3e21eeb6
	s_mov_b32 s5, 0xbda907db
	v_mul_f64 v[27:28], v[2:3], 0.5
	v_fma_f64 v[25:26], v[2:3], s[4:5], s[2:3]
	s_mov_b32 s2, 0xa17f65f6
	s_mov_b32 s4, 0x19e83e5c
	s_mov_b32 s3, 0xbe927e4f
	s_mov_b32 s5, 0xbf2a01a0
	v_mul_f64 v[33:34], v[18:19], -v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[23:24], v[2:3], v[23:24], s[6:7]
	v_add_f64 v[29:30], -v[27:28], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[2:3], v[25:26], s[2:3]
	s_mov_b32 s2, 0x19f4ec90
	s_mov_b32 s3, 0x3efa01a0
	v_fma_f64 v[23:24], v[2:3], v[23:24], s[4:5]
	s_mov_b32 s4, 0x11110bb3
	s_mov_b32 s5, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], -v[29:30], 1.0
	v_fma_f64 v[25:26], v[2:3], v[25:26], s[2:3]
	s_mov_b32 s2, 0x16c16967
	s_mov_b32 s3, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[2:3], v[23:24], s[4:5]
	v_add_f64 v[27:28], v[35:36], -v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[2:3], v[25:26], s[2:3]
	s_mov_b32 s3, 0x3fa55555
	s_mov_b32 s2, 0x55555555
	v_fma_f64 v[23:24], v[33:34], v[23:24], v[31:32]
	v_mul_f64 v[31:32], v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[27:28], v[18:19], -v[20:21], v[27:28]
	v_fma_f64 v[25:26], v[2:3], v[25:26], s[2:3]
	s_mov_b32 s3, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[2:3], v[23:24], -v[20:21]
	v_fma_f64 v[20:21], v[31:32], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[2:3], v[33:34], s[2:3], v[2:3]
	v_cmp_class_f64_e64 s2, v[0:1], 0x1f8
	v_lshlrev_b32_e32 v0, 30, v22
	s_mov_b32 s3, exec_lo
	v_add_f64 v[20:21], v[29:30], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, 0x80000000, v0
	v_add_f64 v[2:3], v[18:19], -v[2:3]
	v_xor_b32_e32 v1, 0x80000000, v3
	v_and_b32_e32 v18, 1, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v18
                                        ; implicit-def: $vgpr18
	v_dual_cndmask_b32 v1, v1, v21 :: v_dual_cndmask_b32 v2, v2, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v1, v0
	v_cndmask_b32_e64 v2, 0, v2, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v0, s2
	v_add_co_u32 v0, vcc_lo, s48, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s49, v5, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
	global_load_b64 v[2:3], v[14:15], off
                                        ; implicit-def: $vgpr14_vgpr15
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[16:17], -v[2:3]
                                        ; implicit-def: $vgpr16_vgpr17
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f64_e64 0x41d00000, |v[2:3]|
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_ldexp_f64 v[14:15], |v[2:3]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[2:3]|
	v_trig_preop_f64 v[16:17], |v[2:3]|, 0
	v_and_b32_e32 v18, 0x7fffffff, v3
	v_trig_preop_f64 v[28:29], |v[2:3]|, 2
	v_mov_b32_e32 v36, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0x3ff921fb
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_cndmask_b32_e32 v15, v18, v15, vcc_lo
	v_cndmask_b32_e32 v14, v2, v14, vcc_lo
	v_trig_preop_f64 v[18:19], |v[2:3]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	v_mul_f64 v[22:23], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[16:17], v[14:15], -v[20:21]
	v_fma_f64 v[18:19], v[18:19], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[22:23], v[16:17]
	v_add_f64 v[26:27], v[24:25], -v[22:23]
	v_add_f64 v[32:33], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[24:25], -v[26:27]
	v_add_f64 v[16:17], v[16:17], -v[26:27]
	v_ldexp_f64 v[26:27], v[32:33], -2
	v_add_f64 v[20:21], v[32:33], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[26:27]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[24:25], -v[20:21]
	v_add_f64 v[16:17], v[16:17], v[22:23]
	v_fract_f64_e32 v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, 0, v23 :: v_dual_cndmask_b32 v22, 0, v22
	v_mul_f64 v[34:35], v[28:29], v[14:15]
	v_ldexp_f64 v[22:23], v[22:23], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[34:35], v[18:19]
	v_fma_f64 v[14:15], v[28:29], v[14:15], -v[34:35]
	v_add_f64 v[24:25], v[30:31], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[20:21], v[24:25]
	v_add_f64 v[32:33], v[26:27], v[22:23]
	v_add_f64 v[20:21], v[26:27], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[32:33]
	v_add_f64 v[32:33], v[30:31], -v[34:35]
	v_cndmask_b32_e64 v37, 0, 0x40100000, vcc_lo
	v_add_f64 v[41:42], v[30:31], -v[32:33]
	v_add_f64 v[18:19], v[18:19], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], v[36:37]
	v_add_f64 v[37:38], v[24:25], -v[30:31]
	v_add_f64 v[32:33], v[34:35], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[26:27], v[22:23]
	v_add_f64 v[43:44], v[24:25], -v[37:38]
	v_add_f64 v[16:17], v[16:17], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], v[32:33]
	v_cvt_i32_f64_e32 v39, v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], -v[43:44]
	v_cvt_f64_i32_e32 v[37:38], v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[30:31]
	v_add_f64 v[22:23], v[22:23], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[18:19], v[16:17]
	v_add_f64 v[18:19], v[24:25], -v[20:21]
	v_add_f64 v[28:29], v[26:27], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_f64 v[16:17], v[28:29], -v[22:23]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[18:19], v[14:15]
	v_add_f64 v[16:17], v[26:27], -v[16:17]
	v_cndmask_b32_e64 v37, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v18, s2, 0, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_f64 v[16:17], v[28:29], -v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[16:17], v[14:15]
	v_mul_f64 v[21:22], v[19:20], s[4:5]
	v_add_f64 v[16:17], v[19:20], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[19:20], s[4:5], -v[21:22]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[19:20], s[6:7], v[23:24]
	v_fma_f64 v[16:17], v[14:15], s[4:5], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[21:22], v[16:17]
	v_add_f64 v[19:20], v[14:15], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[19:20]
.LBB0_6:                                ; %Flow247
	s_or_saveexec_b32 s2, s3
	s_load_b256 s[4:11], s[0:1], 0xa0
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_8
; %bb.7:
	s_mov_b32 s0, 0x6dc9c883
	s_mov_b32 s1, 0x3fe45f30
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[14:15], |v[2:3]|, s[0:1]
	s_mov_b32 s0, 0x54442d18
	s_mov_b32 s1, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[18:19], v[14:15]
	v_fma_f64 v[14:15], v[18:19], s[0:1], |v[2:3]|
	v_mul_f64 v[16:17], v[18:19], s[10:11]
	s_mov_b32 s0, 0x252049c0
	s_mov_b32 s1, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], s[10:11], v[14:15]
	v_add_f64 v[20:21], v[14:15], v[16:17]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_fma_f64 v[16:17], v[18:19], s[10:11], v[16:17]
	v_add_f64 v[14:15], v[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_fma_f64 v[16:17], v[18:19], s[0:1], v[14:15]
	v_cvt_i32_f64_e32 v18, v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], v[16:17]
	v_add_f64 v[20:21], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[20:21]
.LBB0_8:                                ; %_ZL3sind.exit
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f64 v[19:20], v[14:15], v[14:15]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s10, 0x796cde01
	s_mov_b32 s11, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[29:30], v[16:17], 0.5
	v_fma_f64 v[21:22], v[19:20], s[2:3], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[25:26], v[19:20], 0.5
	v_fma_f64 v[23:24], v[19:20], s[2:3], s[0:1]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s3, 0xbf2a01a0
	v_mul_f64 v[31:32], v[14:15], -v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[10:11]
	v_add_f64 v[27:28], -v[25:26], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[19:20], v[23:24], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], -v[27:28], 1.0
	v_fma_f64 v[23:24], v[19:20], v[23:24], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[2:3]
	s_mov_b32 s2, 0xa75d2ceb
	s_mov_b32 s3, 0x38e185a6
	v_add_f64 v[25:26], v[33:34], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[19:20], v[23:24], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[21:22], v[31:32], v[21:22], v[29:30]
	v_mul_f64 v[29:30], v[19:20], v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[25:26], v[14:15], -v[16:17], v[25:26]
	v_fma_f64 v[23:24], v[19:20], v[23:24], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[19:20], v[21:22], -v[16:17]
	v_and_b32_e32 v21, 1, v18
	v_fma_f64 v[19:20], v[29:30], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_fma_f64 v[16:17], v[31:32], s[0:1], v[16:17]
	v_cmp_class_f64_e64 s0, v[2:3], 0x1f8
	v_lshlrev_b32_e32 v2, 30, v18
	s_mov_b32 s1, exec_lo
	v_add_f64 v[19:20], v[27:28], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_and_b32_e32 v2, 0x80000000, v2
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_div_scale_f64 v[16:17], null, s[2:3], s[2:3], s[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v14, v19, v14 :: v_dual_cndmask_b32 v3, v20, v15
	v_rcp_f64_e32 v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v3, v2
	v_cndmask_b32_e64 v2, 0, v14, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s0
	global_store_b64 v[0:1], v[2:3], off offset:8
	global_load_b64 v[2:3], v[12:13], off
	v_fma_f64 v[0:1], -v[16:17], v[18:19], 1.0
	v_fma_f64 v[0:1], v[18:19], v[0:1], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], -v[16:17], v[0:1], 1.0
	v_fma_f64 v[0:1], v[0:1], v[14:15], v[0:1]
	v_div_scale_f64 v[14:15], vcc_lo, s[22:23], s[2:3], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[14:15], v[0:1]
	v_fma_f64 v[14:15], -v[16:17], v[18:19], v[14:15]
                                        ; implicit-def: $vgpr16_vgpr17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[0:1], v[14:15], v[0:1], v[18:19]
                                        ; implicit-def: $vgpr18
                                        ; implicit-def: $vgpr14_vgpr15
	v_div_fixup_f64 v[0:1], v[0:1], s[2:3], s[22:23]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[0:1], -v[2:3]
	v_cmpx_ngt_f64_e64 0x41d00000, |v[2:3]|
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_ldexp_f64 v[14:15], |v[2:3]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[2:3]|
	v_trig_preop_f64 v[16:17], |v[2:3]|, 0
	v_and_b32_e32 v18, 0x7fffffff, v3
	v_trig_preop_f64 v[28:29], |v[2:3]|, 2
	v_mov_b32_e32 v36, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_cndmask_b32_e32 v15, v18, v15, vcc_lo
	v_cndmask_b32_e32 v14, v2, v14, vcc_lo
	v_trig_preop_f64 v[18:19], |v[2:3]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	v_mul_f64 v[22:23], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[16:17], v[14:15], -v[20:21]
	v_fma_f64 v[18:19], v[18:19], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[22:23], v[16:17]
	v_add_f64 v[26:27], v[24:25], -v[22:23]
	v_add_f64 v[32:33], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[24:25], -v[26:27]
	v_add_f64 v[16:17], v[16:17], -v[26:27]
	v_ldexp_f64 v[26:27], v[32:33], -2
	v_add_f64 v[20:21], v[32:33], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[26:27]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[24:25], -v[20:21]
	v_add_f64 v[16:17], v[16:17], v[22:23]
	v_fract_f64_e32 v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, 0, v23 :: v_dual_cndmask_b32 v22, 0, v22
	v_mul_f64 v[34:35], v[28:29], v[14:15]
	v_ldexp_f64 v[22:23], v[22:23], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[34:35], v[18:19]
	v_fma_f64 v[14:15], v[28:29], v[14:15], -v[34:35]
	v_add_f64 v[24:25], v[30:31], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[20:21], v[24:25]
	v_add_f64 v[32:33], v[26:27], v[22:23]
	v_add_f64 v[20:21], v[26:27], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[32:33]
	v_add_f64 v[32:33], v[30:31], -v[34:35]
	v_cndmask_b32_e64 v37, 0, 0x40100000, vcc_lo
	v_add_f64 v[41:42], v[30:31], -v[32:33]
	v_add_f64 v[18:19], v[18:19], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], v[36:37]
	v_add_f64 v[37:38], v[24:25], -v[30:31]
	v_add_f64 v[32:33], v[34:35], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[26:27], v[22:23]
	v_add_f64 v[43:44], v[24:25], -v[37:38]
	v_add_f64 v[16:17], v[16:17], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], v[32:33]
	v_cvt_i32_f64_e32 v39, v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], -v[43:44]
	v_cvt_f64_i32_e32 v[37:38], v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[30:31]
	v_add_f64 v[22:23], v[22:23], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[18:19], v[16:17]
	v_add_f64 v[18:19], v[24:25], -v[20:21]
	v_add_f64 v[28:29], v[26:27], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_f64 v[16:17], v[28:29], -v[22:23]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[18:19], v[14:15]
	v_add_f64 v[16:17], v[26:27], -v[16:17]
	v_cndmask_b32_e64 v37, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v18, s0, 0, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_f64 v[16:17], v[28:29], -v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[16:17], v[14:15]
	v_mul_f64 v[21:22], v[19:20], s[2:3]
	v_add_f64 v[16:17], v[19:20], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[19:20], s[2:3], -v[21:22]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[19:20], s[10:11], v[23:24]
	v_fma_f64 v[16:17], v[14:15], s[2:3], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[21:22], v[16:17]
	v_add_f64 v[19:20], v[14:15], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[19:20]
.LBB0_10:                               ; %Flow246
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_12
; %bb.11:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[14:15], |v[2:3]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[18:19], v[14:15]
	v_fma_f64 v[14:15], v[18:19], s[2:3], |v[2:3]|
	v_mul_f64 v[16:17], v[18:19], s[10:11]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], s[10:11], v[14:15]
	v_add_f64 v[20:21], v[14:15], v[16:17]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_fma_f64 v[16:17], v[18:19], s[10:11], v[16:17]
	v_add_f64 v[14:15], v[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_fma_f64 v[16:17], v[18:19], s[2:3], v[14:15]
	v_cvt_i32_f64_e32 v18, v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], v[16:17]
	v_add_f64 v[20:21], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[20:21]
.LBB0_12:                               ; %_ZL3cosd.exit133
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[19:20], v[14:15], v[14:15]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s10, 0x796cde01
	s_mov_b32 s11, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[29:30], v[16:17], 0.5
	v_fma_f64 v[21:22], v[19:20], s[2:3], s[0:1]
	v_mul_f64 v[25:26], v[19:20], 0.5
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[31:32], v[14:15], -v[19:20]
	v_fma_f64 v[23:24], v[19:20], s[2:3], s[0:1]
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s3, 0xbf2a01a0
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s1, 0xbe927e4f
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[10:11]
	v_add_f64 v[27:28], -v[25:26], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[19:20], v[23:24], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], -v[27:28], 1.0
	v_fma_f64 v[23:24], v[19:20], v[23:24], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[2:3]
	v_add_f64 v[25:26], v[33:34], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[19:20], v[23:24], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[21:22], v[31:32], v[21:22], v[29:30]
	v_mul_f64 v[29:30], v[19:20], v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[25:26], v[14:15], -v[16:17], v[25:26]
	v_fma_f64 v[23:24], v[19:20], v[23:24], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[19:20], v[21:22], -v[16:17]
	v_fma_f64 v[19:20], v[29:30], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[31:32], s[0:1], v[16:17]
	v_cmp_class_f64_e64 s0, v[2:3], 0x1f8
	v_lshlrev_b32_e32 v2, 30, v18
	s_mov_b32 s1, exec_lo
	v_add_f64 v[19:20], v[27:28], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, 0x80000000, v2
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_xor_b32_e32 v3, 0x80000000, v15
	v_and_b32_e32 v16, 1, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v16
                                        ; implicit-def: $vgpr16
	v_dual_cndmask_b32 v3, v3, v20 :: v_dual_cndmask_b32 v14, v14, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v3, v2
	v_cndmask_b32_e64 v14, 0, v14, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v15, 0x7ff80000, v2, s0
	v_add_co_u32 v2, vcc_lo, s12, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v5, vcc_lo
	global_store_b64 v[2:3], v[14:15], off
	global_load_b64 v[12:13], v[12:13], off
                                        ; implicit-def: $vgpr14_vgpr15
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[0:1], -v[12:13]
                                        ; implicit-def: $vgpr12_vgpr13
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f64_e64 0x41d00000, |v[0:1]|
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_ldexp_f64 v[12:13], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[14:15], |v[0:1]|, 0
	v_and_b32_e32 v16, 0x7fffffff, v1
	v_trig_preop_f64 v[26:27], |v[0:1]|, 2
	v_mov_b32_e32 v34, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_cndmask_b32_e32 v13, v16, v13, vcc_lo
	v_cndmask_b32_e32 v12, v0, v12, vcc_lo
	v_trig_preop_f64 v[16:17], |v[0:1]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[14:15], v[12:13]
	v_mul_f64 v[20:21], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[14:15], v[12:13], -v[18:19]
	v_fma_f64 v[16:17], v[16:17], v[12:13], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[20:21], v[14:15]
	v_add_f64 v[24:25], v[22:23], -v[20:21]
	v_add_f64 v[30:31], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[22:23], -v[24:25]
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_ldexp_f64 v[24:25], v[30:31], -2
	v_add_f64 v[18:19], v[30:31], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[24:25]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[22:23], -v[18:19]
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_fract_f64_e32 v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v21, 0, v21 :: v_dual_cndmask_b32 v20, 0, v20
	v_mul_f64 v[32:33], v[26:27], v[12:13]
	v_ldexp_f64 v[20:21], v[20:21], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[32:33], v[16:17]
	v_fma_f64 v[12:13], v[26:27], v[12:13], -v[32:33]
	v_add_f64 v[22:23], v[28:29], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[18:19], v[22:23]
	v_add_f64 v[30:31], v[24:25], v[20:21]
	v_add_f64 v[18:19], v[24:25], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[30:31]
	v_add_f64 v[30:31], v[28:29], -v[32:33]
	v_cndmask_b32_e64 v35, 0, 0x40100000, vcc_lo
	v_add_f64 v[39:40], v[28:29], -v[30:31]
	v_add_f64 v[16:17], v[16:17], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[20:21], v[34:35]
	v_add_f64 v[35:36], v[22:23], -v[28:29]
	v_add_f64 v[30:31], v[32:33], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[24:25], v[20:21]
	v_add_f64 v[41:42], v[22:23], -v[35:36]
	v_add_f64 v[14:15], v[14:15], -v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], v[30:31]
	v_cvt_i32_f64_e32 v37, v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[41:42]
	v_cvt_f64_i32_e32 v[35:36], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[28:29]
	v_add_f64 v[20:21], v[20:21], -v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[16:17], v[14:15]
	v_add_f64 v[16:17], v[22:23], -v[18:19]
	v_add_f64 v[26:27], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[14:15]
	v_add_f64 v[14:15], v[26:27], -v[20:21]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[16:17], v[12:13]
	v_add_f64 v[14:15], v[24:25], -v[14:15]
	v_cndmask_b32_e64 v35, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v16, s0, 0, v37, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[14:15]
	v_add_f64 v[14:15], v[26:27], -v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[14:15], v[12:13]
	v_mul_f64 v[19:20], v[17:18], s[2:3]
	v_add_f64 v[14:15], v[17:18], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[17:18], s[2:3], -v[19:20]
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[17:18], s[10:11], v[21:22]
	v_fma_f64 v[14:15], v[12:13], s[2:3], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[19:20], v[14:15]
	v_add_f64 v[17:18], v[12:13], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[17:18]
.LBB0_14:                               ; %Flow245
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_16
; %bb.15:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[12:13], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[16:17], v[12:13]
	v_fma_f64 v[12:13], v[16:17], s[2:3], |v[0:1]|
	v_mul_f64 v[14:15], v[16:17], s[10:11]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[16:17], s[10:11], v[12:13]
	v_add_f64 v[18:19], v[12:13], v[14:15]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_add_f64 v[18:19], v[18:19], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[14:15]
	v_fma_f64 v[14:15], v[16:17], s[10:11], v[14:15]
	v_add_f64 v[12:13], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_fma_f64 v[14:15], v[16:17], s[2:3], v[12:13]
	v_cvt_i32_f64_e32 v16, v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[20:21], v[14:15]
	v_add_f64 v[18:19], v[12:13], -v[20:21]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[18:19]
.LBB0_16:                               ; %_ZL3sind.exit138
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[17:18], v[12:13], v[12:13]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s10, 0x796cde01
	s_mov_b32 s11, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[27:28], v[14:15], 0.5
	v_fma_f64 v[19:20], v[17:18], s[2:3], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[23:24], v[17:18], 0.5
	v_fma_f64 v[21:22], v[17:18], s[2:3], s[0:1]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s3, 0xbf2a01a0
	v_mul_f64 v[29:30], v[12:13], -v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[10:11]
	v_add_f64 v[25:26], -v[23:24], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], -v[25:26], 1.0
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[2:3]
	v_add_f64 v[23:24], v[31:32], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[19:20], v[29:30], v[19:20], v[27:28]
	v_mul_f64 v[27:28], v[17:18], v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[23:24], v[12:13], -v[14:15], v[23:24]
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[17:18], v[19:20], -v[14:15]
	v_fma_f64 v[17:18], v[27:28], v[21:22], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[29:30], s[0:1], v[14:15]
	v_cmp_class_f64_e64 s0, v[0:1], 0x1f8
	v_lshlrev_b32_e32 v0, 30, v16
	s_mov_b32 s1, exec_lo
	v_add_f64 v[17:18], v[25:26], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_and_b32_e32 v0, 0x80000000, v0
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_and_b32_e32 v14, 1, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v14
                                        ; implicit-def: $vgpr14
	v_dual_cndmask_b32 v1, v18, v13 :: v_dual_cndmask_b32 v12, v17, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v0
	v_cndmask_b32_e64 v0, 0, v12, s0
                                        ; implicit-def: $vgpr12_vgpr13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, 0x7ff80000, v1, s0
	global_store_b64 v[2:3], v[0:1], off offset:8
	global_load_b64 v[0:1], v[10:11], off
                                        ; implicit-def: $vgpr2_vgpr3
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], -v[0:1], s[22:23]
	v_cmpx_ngt_f64_e64 0x41d00000, |v[0:1]|
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_18
; %bb.17:
	v_ldexp_f64 v[2:3], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[12:13], |v[0:1]|, 0
	v_and_b32_e32 v14, 0x7fffffff, v1
	v_trig_preop_f64 v[24:25], |v[0:1]|, 2
	v_mov_b32_e32 v32, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v3, v14, v3 :: v_dual_cndmask_b32 v2, v0, v2
	v_trig_preop_f64 v[14:15], |v[0:1]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[12:13], v[2:3]
	v_mul_f64 v[30:31], v[24:25], v[2:3]
	v_mul_f64 v[18:19], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[12:13], v[2:3], -v[16:17]
	v_fma_f64 v[14:15], v[14:15], v[2:3], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[2:3], v[24:25], v[2:3], -v[30:31]
	v_add_f64 v[20:21], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[20:21], -v[18:19]
	v_add_f64 v[28:29], v[16:17], v[20:21]
	v_add_f64 v[26:27], v[20:21], -v[22:23]
	v_add_f64 v[12:13], v[12:13], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[22:23], v[28:29], -2
	v_add_f64 v[16:17], v[28:29], -v[16:17]
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_add_f64 v[26:27], v[30:31], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[22:23]|
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[18:19]
	v_fract_f64_e32 v[18:19], v[22:23]
	v_add_f64 v[20:21], v[26:27], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v19, 0, v19 :: v_dual_cndmask_b32 v18, 0, v18
	v_ldexp_f64 v[18:19], v[18:19], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[16:17], v[20:21]
	v_add_f64 v[28:29], v[22:23], v[18:19]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[28:29]
	v_add_f64 v[28:29], v[26:27], -v[30:31]
	v_cndmask_b32_e64 v33, 0, 0x40100000, vcc_lo
	v_add_f64 v[37:38], v[26:27], -v[28:29]
	v_add_f64 v[14:15], v[14:15], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], v[32:33]
	v_add_f64 v[33:34], v[20:21], -v[26:27]
	v_add_f64 v[28:29], v[30:31], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[22:23], v[18:19]
	v_add_f64 v[39:40], v[20:21], -v[33:34]
	v_add_f64 v[12:13], v[12:13], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[14:15], v[28:29]
	v_cvt_i32_f64_e32 v35, v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[26:27], -v[39:40]
	v_cvt_f64_i32_e32 v[33:34], v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[26:27]
	v_add_f64 v[18:19], v[18:19], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[14:15], v[12:13]
	v_add_f64 v[14:15], v[20:21], -v[16:17]
	v_add_f64 v[24:25], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[12:13]
	v_add_f64 v[12:13], v[24:25], -v[18:19]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[14:15], v[2:3]
	v_add_f64 v[12:13], v[22:23], -v[12:13]
	v_cndmask_b32_e64 v33, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v14, s0, 0, v35, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[12:13]
	v_add_f64 v[12:13], v[24:25], -v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[12:13], v[2:3]
	v_mul_f64 v[17:18], v[15:16], s[2:3]
	v_add_f64 v[12:13], v[15:16], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], v[15:16], s[2:3], -v[17:18]
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[15:16], s[10:11], v[19:20]
	v_fma_f64 v[12:13], v[2:3], s[2:3], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[17:18], v[12:13]
	v_add_f64 v[15:16], v[2:3], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], -v[15:16]
.LBB0_18:                               ; %Flow244
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_20
; %bb.19:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[2:3], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[14:15], v[2:3]
	v_fma_f64 v[2:3], v[14:15], s[2:3], |v[0:1]|
	v_mul_f64 v[12:13], v[14:15], s[10:11]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[14:15], s[10:11], v[2:3]
	v_add_f64 v[16:17], v[2:3], v[12:13]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[12:13]
	v_fma_f64 v[12:13], v[14:15], s[10:11], v[12:13]
	v_add_f64 v[2:3], v[16:17], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_fma_f64 v[12:13], v[14:15], s[2:3], v[2:3]
	v_cvt_i32_f64_e32 v14, v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[18:19], v[12:13]
	v_add_f64 v[16:17], v[2:3], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], -v[16:17]
.LBB0_20:                               ; %_ZL3cosd.exit143
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[15:16], v[2:3], v[2:3]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s10, 0x796cde01
	s_mov_b32 s11, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[25:26], v[12:13], 0.5
	v_fma_f64 v[17:18], v[15:16], s[2:3], s[0:1]
	v_mul_f64 v[21:22], v[15:16], 0.5
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[27:28], v[2:3], -v[15:16]
	v_fma_f64 v[19:20], v[15:16], s[2:3], s[0:1]
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s3, 0xbf2a01a0
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s1, 0xbe927e4f
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[10:11]
	v_add_f64 v[23:24], -v[21:22], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], -v[23:24], 1.0
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[2:3]
	v_add_f64 v[21:22], v[29:30], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[17:18], v[27:28], v[17:18], v[25:26]
	v_mul_f64 v[25:26], v[15:16], v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[21:22], v[2:3], -v[12:13], v[21:22]
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[15:16], v[17:18], -v[12:13]
	v_fma_f64 v[15:16], v[25:26], v[19:20], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[27:28], s[0:1], v[12:13]
	v_cmp_class_f64_e64 s0, v[0:1], 0x1f8
	v_lshlrev_b32_e32 v0, 30, v14
	s_mov_b32 s1, exec_lo
	v_add_f64 v[15:16], v[23:24], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, 0x80000000, v0
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_xor_b32_e32 v1, 0x80000000, v3
	v_and_b32_e32 v12, 1, v14
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v12
                                        ; implicit-def: $vgpr12_vgpr13
	v_dual_cndmask_b32 v1, v1, v16 :: v_dual_cndmask_b32 v2, v2, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v1, v0
	v_cndmask_b32_e64 v2, 0, v2, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v0, s0
	v_add_co_u32 v0, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
	global_load_b64 v[2:3], v[10:11], off
                                        ; implicit-def: $vgpr10_vgpr11
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], -v[2:3], s[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f64_e64 0x41d00000, |v[2:3]|
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_22
; %bb.21:
	v_ldexp_f64 v[10:11], |v[2:3]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[2:3]|
	v_trig_preop_f64 v[12:13], |v[2:3]|, 0
	v_and_b32_e32 v14, 0x7fffffff, v3
	v_trig_preop_f64 v[24:25], |v[2:3]|, 2
	v_mov_b32_e32 v32, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s9, 0x3c91a626
	v_cndmask_b32_e32 v11, v14, v11, vcc_lo
	v_cndmask_b32_e32 v10, v2, v10, vcc_lo
	v_trig_preop_f64 v[14:15], |v[2:3]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[12:13], v[10:11]
	v_mul_f64 v[18:19], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[12:13], v[10:11], -v[16:17]
	v_fma_f64 v[14:15], v[14:15], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[18:19], v[12:13]
	v_add_f64 v[22:23], v[20:21], -v[18:19]
	v_add_f64 v[28:29], v[16:17], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[20:21], -v[22:23]
	v_add_f64 v[12:13], v[12:13], -v[22:23]
	v_ldexp_f64 v[22:23], v[28:29], -2
	v_add_f64 v[16:17], v[28:29], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[22:23]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	v_add_f64 v[12:13], v[12:13], v[18:19]
	v_fract_f64_e32 v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v19, 0, v19 :: v_dual_cndmask_b32 v18, 0, v18
	v_mul_f64 v[30:31], v[24:25], v[10:11]
	v_ldexp_f64 v[18:19], v[18:19], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[30:31], v[14:15]
	v_fma_f64 v[10:11], v[24:25], v[10:11], -v[30:31]
	v_add_f64 v[20:21], v[26:27], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[16:17], v[20:21]
	v_add_f64 v[28:29], v[22:23], v[18:19]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[28:29]
	v_add_f64 v[28:29], v[26:27], -v[30:31]
	v_cndmask_b32_e64 v33, 0, 0x40100000, vcc_lo
	v_add_f64 v[37:38], v[26:27], -v[28:29]
	v_add_f64 v[14:15], v[14:15], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], v[32:33]
	v_add_f64 v[33:34], v[20:21], -v[26:27]
	v_add_f64 v[28:29], v[30:31], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[22:23], v[18:19]
	v_add_f64 v[39:40], v[20:21], -v[33:34]
	v_add_f64 v[12:13], v[12:13], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[14:15], v[28:29]
	v_cvt_i32_f64_e32 v35, v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[26:27], -v[39:40]
	v_cvt_f64_i32_e32 v[33:34], v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[26:27]
	v_add_f64 v[18:19], v[18:19], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[14:15], v[12:13]
	v_add_f64 v[14:15], v[20:21], -v[16:17]
	v_add_f64 v[24:25], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_add_f64 v[12:13], v[24:25], -v[18:19]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[12:13], v[22:23], -v[12:13]
	v_cndmask_b32_e64 v33, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v14, s0, 0, v35, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_add_f64 v[12:13], v[24:25], -v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[12:13], v[10:11]
	v_mul_f64 v[17:18], v[15:16], s[2:3]
	v_add_f64 v[12:13], v[15:16], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], v[15:16], s[2:3], -v[17:18]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[15:16], s[8:9], v[19:20]
	v_fma_f64 v[12:13], v[10:11], s[2:3], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[17:18], v[12:13]
	v_add_f64 v[15:16], v[10:11], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], -v[15:16]
.LBB0_22:                               ; %Flow243
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_24
; %bb.23:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[10:11], |v[2:3]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[14:15], v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[2:3], |v[2:3]|
	v_mul_f64 v[12:13], v[14:15], s[8:9]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[14:15], s[8:9], v[10:11]
	v_add_f64 v[16:17], v[10:11], v[12:13]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_fma_f64 v[12:13], v[14:15], s[8:9], v[12:13]
	v_add_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	v_fma_f64 v[12:13], v[14:15], s[2:3], v[10:11]
	v_cvt_i32_f64_e32 v14, v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[18:19], v[12:13]
	v_add_f64 v[16:17], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], -v[16:17]
.LBB0_24:                               ; %_ZL3sind.exit148
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[15:16], v[10:11], v[10:11]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s8, 0x796cde01
	s_mov_b32 s9, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[25:26], v[12:13], 0.5
	v_fma_f64 v[17:18], v[15:16], s[2:3], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[21:22], v[15:16], 0.5
	v_fma_f64 v[19:20], v[15:16], s[2:3], s[0:1]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s3, 0xbf2a01a0
	v_mul_f64 v[27:28], v[10:11], -v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[8:9]
	v_add_f64 v[23:24], -v[21:22], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], -v[23:24], 1.0
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[2:3]
	v_add_f64 v[21:22], v[29:30], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[17:18], v[27:28], v[17:18], v[25:26]
	v_mul_f64 v[25:26], v[15:16], v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[21:22], v[10:11], -v[12:13], v[21:22]
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[15:16], v[17:18], -v[12:13]
	v_fma_f64 v[15:16], v[25:26], v[19:20], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[27:28], s[0:1], v[12:13]
	v_cmp_class_f64_e64 s0, v[2:3], 0x1f8
	v_lshlrev_b32_e32 v2, 30, v14
	s_mov_b32 s1, exec_lo
	v_add_f64 v[15:16], v[23:24], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_and_b32_e32 v2, 0x80000000, v2
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	v_and_b32_e32 v12, 1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v12
                                        ; implicit-def: $vgpr12
	v_dual_cndmask_b32 v3, v16, v11 :: v_dual_cndmask_b32 v10, v15, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v3, v2
	v_cndmask_b32_e64 v2, 0, v10, s0
                                        ; implicit-def: $vgpr10_vgpr11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s0
	global_store_b64 v[0:1], v[2:3], off offset:8
	global_load_b64 v[0:1], v[8:9], off
                                        ; implicit-def: $vgpr2_vgpr3
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], -v[0:1], s[22:23]
	v_cmpx_ngt_f64_e64 0x41d00000, |v[0:1]|
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_26
; %bb.25:
	v_ldexp_f64 v[2:3], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[10:11], |v[0:1]|, 0
	v_and_b32_e32 v12, 0x7fffffff, v1
	v_trig_preop_f64 v[22:23], |v[0:1]|, 2
	v_mov_b32_e32 v30, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s9, 0x3c91a626
	v_cndmask_b32_e32 v3, v12, v3, vcc_lo
	v_cndmask_b32_e32 v2, v0, v2, vcc_lo
	v_trig_preop_f64 v[12:13], |v[0:1]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[10:11], v[2:3]
	v_mul_f64 v[16:17], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[2:3], -v[14:15]
	v_fma_f64 v[12:13], v[12:13], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[16:17], v[10:11]
	v_add_f64 v[20:21], v[18:19], -v[16:17]
	v_add_f64 v[26:27], v[14:15], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[18:19], -v[20:21]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	v_ldexp_f64 v[20:21], v[26:27], -2
	v_add_f64 v[14:15], v[26:27], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[20:21]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	v_add_f64 v[10:11], v[10:11], v[16:17]
	v_fract_f64_e32 v[16:17], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v17, 0, v17 :: v_dual_cndmask_b32 v16, 0, v16
	v_mul_f64 v[28:29], v[22:23], v[2:3]
	v_ldexp_f64 v[16:17], v[16:17], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[28:29], v[12:13]
	v_fma_f64 v[2:3], v[22:23], v[2:3], -v[28:29]
	v_add_f64 v[18:19], v[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[14:15], v[18:19]
	v_add_f64 v[26:27], v[20:21], v[16:17]
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[26:27]
	v_add_f64 v[26:27], v[24:25], -v[28:29]
	v_cndmask_b32_e64 v31, 0, 0x40100000, vcc_lo
	v_add_f64 v[35:36], v[24:25], -v[26:27]
	v_add_f64 v[12:13], v[12:13], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], v[30:31]
	v_add_f64 v[31:32], v[18:19], -v[24:25]
	v_add_f64 v[26:27], v[28:29], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[20:21], v[16:17]
	v_add_f64 v[37:38], v[18:19], -v[31:32]
	v_add_f64 v[10:11], v[10:11], -v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[26:27]
	v_cvt_i32_f64_e32 v33, v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], -v[37:38]
	v_cvt_f64_i32_e32 v[31:32], v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[24:25]
	v_add_f64 v[16:17], v[16:17], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[12:13], v[10:11]
	v_add_f64 v[12:13], v[18:19], -v[14:15]
	v_add_f64 v[22:23], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	v_add_f64 v[10:11], v[22:23], -v[16:17]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[12:13], v[2:3]
	v_add_f64 v[10:11], v[20:21], -v[10:11]
	v_cndmask_b32_e64 v31, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v12, s0, 0, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	v_add_f64 v[10:11], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[10:11], v[2:3]
	v_mul_f64 v[15:16], v[13:14], s[2:3]
	v_add_f64 v[10:11], v[13:14], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[2:3], -v[15:16]
	v_add_f64 v[2:3], v[2:3], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[13:14], s[8:9], v[17:18]
	v_fma_f64 v[10:11], v[2:3], s[2:3], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[15:16], v[10:11]
	v_add_f64 v[13:14], v[2:3], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[13:14]
.LBB0_26:                               ; %Flow242
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_28
; %bb.27:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[2:3], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[12:13], v[2:3]
	v_fma_f64 v[2:3], v[12:13], s[2:3], |v[0:1]|
	v_mul_f64 v[10:11], v[12:13], s[8:9]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[12:13], s[8:9], v[2:3]
	v_add_f64 v[14:15], v[2:3], v[10:11]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	v_fma_f64 v[10:11], v[12:13], s[8:9], v[10:11]
	v_add_f64 v[2:3], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[10:11]
	v_fma_f64 v[10:11], v[12:13], s[2:3], v[2:3]
	v_cvt_i32_f64_e32 v12, v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[16:17], v[10:11]
	v_add_f64 v[14:15], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[14:15]
.LBB0_28:                               ; %_ZL3cosd.exit153
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[13:14], v[2:3], v[2:3]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s8, 0x796cde01
	s_mov_b32 s9, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[23:24], v[10:11], 0.5
	v_fma_f64 v[15:16], v[13:14], s[2:3], s[0:1]
	v_mul_f64 v[19:20], v[13:14], 0.5
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[25:26], v[2:3], -v[13:14]
	v_fma_f64 v[17:18], v[13:14], s[2:3], s[0:1]
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s3, 0xbf2a01a0
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s1, 0xbe927e4f
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[8:9]
	v_add_f64 v[21:22], -v[19:20], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], -v[21:22], 1.0
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	v_add_f64 v[19:20], v[27:28], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[15:16], v[25:26], v[15:16], v[23:24]
	v_mul_f64 v[23:24], v[13:14], v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[19:20], v[2:3], -v[10:11], v[19:20]
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[13:14], v[15:16], -v[10:11]
	v_fma_f64 v[13:14], v[23:24], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[25:26], s[0:1], v[10:11]
	v_cmp_class_f64_e64 s0, v[0:1], 0x1f8
	v_lshlrev_b32_e32 v0, 30, v12
	s_mov_b32 s1, exec_lo
	v_add_f64 v[13:14], v[21:22], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, 0x80000000, v0
	v_add_f64 v[2:3], v[2:3], -v[10:11]
	v_xor_b32_e32 v1, 0x80000000, v3
	v_and_b32_e32 v10, 1, v12
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
                                        ; implicit-def: $vgpr10_vgpr11
	v_dual_cndmask_b32 v1, v1, v14 :: v_dual_cndmask_b32 v2, v2, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v1, v0
	v_cndmask_b32_e64 v2, 0, v2, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v0, s0
	v_add_co_u32 v0, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
	global_load_b64 v[2:3], v[8:9], off
                                        ; implicit-def: $vgpr8_vgpr9
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], -v[2:3], s[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f64_e64 0x41d00000, |v[2:3]|
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_30
; %bb.29:
	v_ldexp_f64 v[8:9], |v[2:3]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[2:3]|
	v_trig_preop_f64 v[10:11], |v[2:3]|, 0
	v_and_b32_e32 v12, 0x7fffffff, v3
	v_trig_preop_f64 v[22:23], |v[2:3]|, 2
	v_mov_b32_e32 v30, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_dual_cndmask_b32 v9, v12, v9 :: v_dual_cndmask_b32 v8, v2, v8
	v_trig_preop_f64 v[12:13], |v[2:3]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[10:11], v[8:9]
	v_mul_f64 v[28:29], v[22:23], v[8:9]
	v_mul_f64 v[16:17], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[8:9], -v[14:15]
	v_fma_f64 v[12:13], v[12:13], v[8:9], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[22:23], v[8:9], -v[28:29]
	v_add_f64 v[18:19], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[18:19], -v[16:17]
	v_add_f64 v[26:27], v[14:15], v[18:19]
	v_add_f64 v[24:25], v[18:19], -v[20:21]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[20:21], v[26:27], -2
	v_add_f64 v[14:15], v[26:27], -v[14:15]
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	v_add_f64 v[24:25], v[28:29], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[20:21]|
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[16:17]
	v_fract_f64_e32 v[16:17], v[20:21]
	v_add_f64 v[18:19], v[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v17, 0, v17 :: v_dual_cndmask_b32 v16, 0, v16
	v_ldexp_f64 v[16:17], v[16:17], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[14:15], v[18:19]
	v_add_f64 v[26:27], v[20:21], v[16:17]
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[26:27]
	v_add_f64 v[26:27], v[24:25], -v[28:29]
	v_cndmask_b32_e64 v31, 0, 0x40100000, vcc_lo
	v_add_f64 v[35:36], v[24:25], -v[26:27]
	v_add_f64 v[12:13], v[12:13], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], v[30:31]
	v_add_f64 v[31:32], v[18:19], -v[24:25]
	v_add_f64 v[26:27], v[28:29], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[20:21], v[16:17]
	v_add_f64 v[37:38], v[18:19], -v[31:32]
	v_add_f64 v[10:11], v[10:11], -v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[26:27]
	v_cvt_i32_f64_e32 v33, v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], -v[37:38]
	v_cvt_f64_i32_e32 v[31:32], v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[24:25]
	v_add_f64 v[16:17], v[16:17], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[12:13], v[10:11]
	v_add_f64 v[12:13], v[18:19], -v[14:15]
	v_add_f64 v[22:23], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_add_f64 v[10:11], v[22:23], -v[16:17]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[12:13], v[8:9]
	v_add_f64 v[10:11], v[20:21], -v[10:11]
	v_cndmask_b32_e64 v31, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v12, s0, 0, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_add_f64 v[10:11], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[10:11], v[8:9]
	v_mul_f64 v[15:16], v[13:14], s[2:3]
	v_add_f64 v[10:11], v[13:14], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[2:3], -v[15:16]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[13:14], s[6:7], v[17:18]
	v_fma_f64 v[10:11], v[8:9], s[2:3], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[15:16], v[10:11]
	v_add_f64 v[13:14], v[8:9], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[13:14]
.LBB0_30:                               ; %Flow241
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_32
; %bb.31:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[8:9], |v[2:3]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[12:13], v[8:9]
	v_fma_f64 v[8:9], v[12:13], s[2:3], |v[2:3]|
	v_mul_f64 v[10:11], v[12:13], s[6:7]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[12:13], s[6:7], v[8:9]
	v_add_f64 v[14:15], v[8:9], v[10:11]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], -v[14:15]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_fma_f64 v[10:11], v[12:13], s[6:7], v[10:11]
	v_add_f64 v[8:9], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[12:13], s[2:3], v[8:9]
	v_cvt_i32_f64_e32 v12, v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[16:17], v[10:11]
	v_add_f64 v[14:15], v[8:9], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[14:15]
.LBB0_32:                               ; %_ZL3sind.exit158
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[13:14], v[8:9], v[8:9]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s6, 0x796cde01
	s_mov_b32 s7, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[23:24], v[10:11], 0.5
	v_fma_f64 v[15:16], v[13:14], s[2:3], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[19:20], v[13:14], 0.5
	v_fma_f64 v[17:18], v[13:14], s[2:3], s[0:1]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s3, 0xbf2a01a0
	v_mul_f64 v[25:26], v[8:9], -v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[6:7]
	v_add_f64 v[21:22], -v[19:20], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], -v[21:22], 1.0
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	v_add_f64 v[19:20], v[27:28], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[15:16], v[25:26], v[15:16], v[23:24]
	v_mul_f64 v[23:24], v[13:14], v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[19:20], v[8:9], -v[10:11], v[19:20]
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[13:14], v[15:16], -v[10:11]
	v_fma_f64 v[13:14], v[23:24], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[25:26], s[0:1], v[10:11]
	v_cmp_class_f64_e64 s0, v[2:3], 0x1f8
	v_lshlrev_b32_e32 v2, 30, v12
	s_mov_b32 s1, exec_lo
	v_add_f64 v[13:14], v[21:22], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_and_b32_e32 v2, 0x80000000, v2
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_and_b32_e32 v10, 1, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
                                        ; implicit-def: $vgpr10
	v_dual_cndmask_b32 v3, v14, v9 :: v_dual_cndmask_b32 v8, v13, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v3, v2
	v_cndmask_b32_e64 v2, 0, v8, s0
                                        ; implicit-def: $vgpr8_vgpr9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s0
	global_store_b64 v[0:1], v[2:3], off offset:8
	global_load_b64 v[0:1], v[6:7], off
                                        ; implicit-def: $vgpr2_vgpr3
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], -v[0:1], s[22:23]
	v_cmpx_ngt_f64_e64 0x41d00000, |v[0:1]|
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_34
; %bb.33:
	v_ldexp_f64 v[2:3], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[8:9], |v[0:1]|, 0
	v_and_b32_e32 v10, 0x7fffffff, v1
	v_trig_preop_f64 v[20:21], |v[0:1]|, 2
	v_mov_b32_e32 v28, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_dual_cndmask_b32 v3, v10, v3 :: v_dual_cndmask_b32 v2, v0, v2
	v_trig_preop_f64 v[10:11], |v[0:1]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[12:13], v[8:9], v[2:3]
	v_mul_f64 v[26:27], v[20:21], v[2:3]
	v_mul_f64 v[14:15], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[8:9], v[2:3], -v[12:13]
	v_fma_f64 v[10:11], v[10:11], v[2:3], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[2:3], v[20:21], v[2:3], -v[26:27]
	v_add_f64 v[16:17], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[16:17], -v[14:15]
	v_add_f64 v[24:25], v[12:13], v[16:17]
	v_add_f64 v[22:23], v[16:17], -v[18:19]
	v_add_f64 v[8:9], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[18:19], v[24:25], -2
	v_add_f64 v[12:13], v[24:25], -v[12:13]
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	v_add_f64 v[22:23], v[26:27], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[18:19]|
	v_add_f64 v[12:13], v[16:17], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[14:15]
	v_fract_f64_e32 v[14:15], v[18:19]
	v_add_f64 v[16:17], v[22:23], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v15, 0, v15 :: v_dual_cndmask_b32 v14, 0, v14
	v_ldexp_f64 v[14:15], v[14:15], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[12:13], v[16:17]
	v_add_f64 v[24:25], v[18:19], v[14:15]
	v_add_f64 v[12:13], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[24:25]
	v_add_f64 v[24:25], v[22:23], -v[26:27]
	v_cndmask_b32_e64 v29, 0, 0x40100000, vcc_lo
	v_add_f64 v[33:34], v[22:23], -v[24:25]
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[14:15], v[28:29]
	v_add_f64 v[29:30], v[16:17], -v[22:23]
	v_add_f64 v[24:25], v[26:27], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[18:19], v[14:15]
	v_add_f64 v[35:36], v[16:17], -v[29:30]
	v_add_f64 v[8:9], v[8:9], -v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[10:11], v[24:25]
	v_cvt_i32_f64_e32 v31, v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[35:36]
	v_cvt_f64_i32_e32 v[29:30], v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[10:11], v[8:9]
	v_add_f64 v[10:11], v[16:17], -v[12:13]
	v_add_f64 v[20:21], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[8:9], v[20:21], -v[14:15]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[10:11], v[2:3]
	v_add_f64 v[8:9], v[18:19], -v[8:9]
	v_cndmask_b32_e64 v29, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v10, s0, 0, v31, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[8:9], v[20:21], -v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[8:9], v[2:3]
	v_mul_f64 v[13:14], v[11:12], s[2:3]
	v_add_f64 v[8:9], v[11:12], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[15:16], v[11:12], s[2:3], -v[13:14]
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[11:12], s[6:7], v[15:16]
	v_fma_f64 v[8:9], v[2:3], s[2:3], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[13:14], v[8:9]
	v_add_f64 v[11:12], v[2:3], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[11:12]
.LBB0_34:                               ; %Flow240
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_36
; %bb.35:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[2:3], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[10:11], v[2:3]
	v_fma_f64 v[2:3], v[10:11], s[2:3], |v[0:1]|
	v_mul_f64 v[8:9], v[10:11], s[6:7]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[10:11], s[6:7], v[2:3]
	v_add_f64 v[12:13], v[2:3], v[8:9]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_fma_f64 v[8:9], v[10:11], s[6:7], v[8:9]
	v_add_f64 v[2:3], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	v_fma_f64 v[8:9], v[10:11], s[2:3], v[2:3]
	v_cvt_i32_f64_e32 v10, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[14:15], v[8:9]
	v_add_f64 v[12:13], v[2:3], -v[14:15]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[12:13]
.LBB0_36:                               ; %_ZL3cosd.exit163
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[11:12], v[2:3], v[2:3]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s6, 0x796cde01
	s_mov_b32 s7, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[21:22], v[8:9], 0.5
	v_fma_f64 v[13:14], v[11:12], s[2:3], s[0:1]
	v_mul_f64 v[17:18], v[11:12], 0.5
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[23:24], v[2:3], -v[11:12]
	v_fma_f64 v[15:16], v[11:12], s[2:3], s[0:1]
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s3, 0xbf2a01a0
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s1, 0xbe927e4f
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[6:7]
	v_add_f64 v[19:20], -v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], -v[19:20], 1.0
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[2:3]
	v_add_f64 v[17:18], v[25:26], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[13:14], v[23:24], v[13:14], v[21:22]
	v_mul_f64 v[21:22], v[11:12], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], v[2:3], -v[8:9], v[17:18]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[11:12], v[13:14], -v[8:9]
	v_fma_f64 v[11:12], v[21:22], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[8:9], v[23:24], s[0:1], v[8:9]
	v_cmp_class_f64_e64 s0, v[0:1], 0x1f8
	v_lshlrev_b32_e32 v0, 30, v10
	s_mov_b32 s1, exec_lo
	v_add_f64 v[11:12], v[19:20], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, 0x80000000, v0
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	v_xor_b32_e32 v1, 0x80000000, v3
	v_and_b32_e32 v8, 1, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
                                        ; implicit-def: $vgpr8
	v_dual_cndmask_b32 v1, v1, v12 :: v_dual_cndmask_b32 v2, v2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v1, v0
	v_cndmask_b32_e64 v2, 0, v2, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v0, s0
	v_add_co_u32 v0, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
                                        ; implicit-def: $vgpr4_vgpr5
	global_store_b64 v[0:1], v[2:3], off
	global_load_b64 v[2:3], v[6:7], off
                                        ; implicit-def: $vgpr6_vgpr7
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], -v[2:3], s[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f64_e64 0x41d00000, |v[2:3]|
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_38
; %bb.37:
	v_ldexp_f64 v[4:5], |v[2:3]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[2:3]|
	v_trig_preop_f64 v[6:7], |v[2:3]|, 0
	v_and_b32_e32 v8, 0x7fffffff, v3
	v_trig_preop_f64 v[18:19], |v[2:3]|, 2
	v_mov_b32_e32 v26, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s4, 0x33145c07
	s_mov_b32 s5, 0x3c91a626
	v_dual_cndmask_b32 v5, v8, v5 :: v_dual_cndmask_b32 v4, v2, v4
	v_trig_preop_f64 v[8:9], |v[2:3]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[6:7], v[4:5]
	v_mul_f64 v[24:25], v[18:19], v[4:5]
	v_mul_f64 v[12:13], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[4:5], -v[10:11]
	v_fma_f64 v[8:9], v[8:9], v[4:5], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[18:19], v[4:5], -v[24:25]
	v_add_f64 v[14:15], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[14:15], -v[12:13]
	v_add_f64 v[22:23], v[10:11], v[14:15]
	v_add_f64 v[20:21], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[16:17], v[22:23], -2
	v_add_f64 v[10:11], v[22:23], -v[10:11]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[20:21], v[24:25], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[16:17]|
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fract_f64_e32 v[12:13], v[16:17]
	v_add_f64 v[14:15], v[20:21], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v13, 0, v13 :: v_dual_cndmask_b32 v12, 0, v12
	v_ldexp_f64 v[12:13], v[12:13], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[22:23], v[16:17], v[12:13]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[22:23]
	v_add_f64 v[22:23], v[20:21], -v[24:25]
	v_cndmask_b32_e64 v27, 0, 0x40100000, vcc_lo
	v_add_f64 v[31:32], v[20:21], -v[22:23]
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[26:27]
	v_add_f64 v[27:28], v[14:15], -v[20:21]
	v_add_f64 v[22:23], v[24:25], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[16:17], v[12:13]
	v_add_f64 v[33:34], v[14:15], -v[27:28]
	v_add_f64 v[6:7], v[6:7], -v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[8:9], v[22:23]
	v_cvt_i32_f64_e32 v29, v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], -v[33:34]
	v_cvt_f64_i32_e32 v[27:28], v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[20:21]
	v_add_f64 v[12:13], v[12:13], -v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[14:15], -v[10:11]
	v_add_f64 v[18:19], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[18:19], -v[12:13]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[8:9], v[4:5]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	v_cndmask_b32_e64 v27, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v8, s0, 0, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[6:7], v[4:5]
	v_mul_f64 v[11:12], v[9:10], s[2:3]
	v_add_f64 v[6:7], v[9:10], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[9:10], s[2:3], -v[11:12]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[9:10], s[4:5], v[13:14]
	v_fma_f64 v[6:7], v[4:5], s[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[11:12], v[6:7]
	v_add_f64 v[9:10], v[4:5], -v[11:12]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[9:10]
.LBB0_38:                               ; %Flow
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_40
; %bb.39:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s5, 0xbc91a626
	v_mul_f64 v[4:5], |v[2:3]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s4, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[8:9], v[4:5]
	v_fma_f64 v[4:5], v[8:9], s[2:3], |v[2:3]|
	v_mul_f64 v[6:7], v[8:9], s[4:5]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[4:5], v[4:5]
	v_add_f64 v[10:11], v[4:5], v[6:7]
	s_mov_b32 s5, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[4:5], v[6:7]
	v_add_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[2:3], v[4:5]
	v_cvt_i32_f64_e32 v8, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[4:5], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
.LBB0_40:                               ; %_ZL3sind.exit168
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[9:10], v[4:5], v[4:5]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s4, 0x796cde01
	s_mov_b32 s5, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[19:20], v[6:7], 0.5
	v_fma_f64 v[11:12], v[9:10], s[2:3], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[15:16], v[9:10], 0.5
	v_fma_f64 v[13:14], v[9:10], s[2:3], s[0:1]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s3, 0xbf2a01a0
	v_mul_f64 v[21:22], v[4:5], -v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[4:5]
	v_add_f64 v[17:18], -v[15:16], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], -v[17:18], 1.0
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	v_add_f64 v[15:16], v[23:24], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[11:12], v[21:22], v[11:12], v[19:20]
	v_mul_f64 v[19:20], v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[4:5], -v[6:7], v[15:16]
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[9:10], v[11:12], -v[6:7]
	v_fma_f64 v[9:10], v[19:20], v[13:14], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[21:22], s[0:1], v[6:7]
	v_cmp_class_f64_e64 s0, v[2:3], 0x1f8
	v_lshlrev_b32_e32 v2, 30, v8
	v_add_f64 v[9:10], v[17:18], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_and_b32_e32 v2, 0x80000000, v2
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_and_b32_e32 v6, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	v_dual_cndmask_b32 v3, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v3, v2
	v_cndmask_b32_e64 v2, 0, v4, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s0
	global_store_b64 v[0:1], v[2:3], off offset:8
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 440
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 48
		.amdhsa_next_free_sgpr 72
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_, .Lfunc_end0-_Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 17512
; NumSgprs: 74
; NumVgprs: 48
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 9
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 74
; NumVGPRsForWavesPerEU: 48
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         128
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         136
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         144
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         152
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         160
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         168
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         176
        .size:           8
        .value_kind:     global_buffer
      - .offset:         184
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         188
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         192
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         196
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         198
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         200
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         202
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         204
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         206
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         224
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         232
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         240
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         248
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 440
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_
    .private_segment_fixed_size: 0
    .sgpr_count:     74
    .sgpr_spill_count: 0
    .symbol:         _Z10aux_fieldsPdS_ddS_S_S_S_S_S_S_S_S_P15HIP_vector_typeIdLj2EES2_S2_S2_S2_S2_S2_S2_S2_S2_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     48
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
