
__global__ void Initialize_gpu(double state[],double m[], double l[],double I[],double Zetas[],int n);
void printa(double a[], int n);
#include <iostream>
#include <stdio.h>
void CudaInitialize(double m[], double l[], double I[], double x[], int n, double Zs[])
{
	int x_size = 2*n;
	int I_size = 3*n*3;
	int z_size = 26*6*n;
	double *d_x, *d_m, *d_l, *d_I, *d_zs;
	
	// Allocate and Load M and N to device memor

	cudaMalloc(&d_x,x_size*sizeof(double));
	cudaMalloc(&d_m, n*sizeof(double));
	cudaMalloc(&d_l, n*sizeof(double));
	cudaMalloc(&d_I, I_size*sizeof(double));
	cudaMalloc(&d_zs, z_size*sizeof(double));
	cudaMemcpy(d_x, x, x_size*sizeof(double), cudaMemcpyHostToDevice);
	cudaMemcpy(d_m, m, n*sizeof(double), cudaMemcpyHostToDevice);
	cudaMemcpy(d_I, I, I_size*sizeof(double), cudaMemcpyHostToDevice);
	cudaMemcpy(d_l, l, n*sizeof(double), cudaMemcpyHostToDevice);
	dim3 dimBlock(6, 6,1);
	dim3 dimGrid(n,1,1);

	Initialize_gpu<<<dimGrid, dimBlock>>>(d_x, d_m, d_l, d_I, d_zs, n);
	cudaMemcpy(Zs, d_zs, z_size*sizeof(double), cudaMemcpyDeviceToHost);
	
	cudaFree(d_x);
	cudaFree(d_m);
	cudaFree(d_l);
	cudaFree(d_I);
	cudaFree(d_zs);
}

	.file	"tmpxft_00273a6f_00000000-6_Init_setup.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14CudaInitializePdS_S_S_iS_
	.type	_Z14CudaInitializePdS_S_S_iS_, @function
_Z14CudaInitializePdS_S_S_iS_:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rcx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	leal	(%r8,%r8), %edx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movslq	%edx, %rdx
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	salq	$3, %rdx
	movq	%r9, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rsi
	movl	%r8d, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rdi
	movq	%rdx, 24(%rsp)
	call	cudaMalloc@PLT
	movslq	%ebx, %rax
	leaq	48(%rsp), %rdi
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	leal	(%rbx,%rbx,8), %eax
	leaq	64(%rsp), %rdi
	cltq
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	imull	$156, %ebx, %eax
	leaq	72(%rsp), %rdi
	cltq
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	64(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, 92(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movabsq	$25769803782, %rdx
	movq	%rax, 96(%rsp)
	movq	92(%rsp), %rdi
	movl	100(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	movq	72(%rsp), %r8
	movq	64(%rsp), %rcx
	movl	%ebx, %r9d
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z14Initialize_gpuPdS_S_S_S_i@PLT
.L3:
	movq	16(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z14CudaInitializePdS_S_S_iS_, .-_Z14CudaInitializePdS_S_S_iS_
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3661:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3661:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


__global__ void Initialize_gpu(double state[],double m[], double l[],double I[],double Zetas[],int n);
void printa(double a[], int n);

#include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
void CudaInitialize(double m[], double l[], double I[], double x[], int n, double Zs[])
{
	int x_size = 2*n;
	int I_size = 3*n*3;
	int z_size = 26*6*n;
	double *d_x, *d_m, *d_l, *d_I, *d_zs;
	
	// Allocate and Load M and N to device memor

	hipMalloc(&d_x,x_size*sizeof(double));
	hipMalloc(&d_m, n*sizeof(double));
	hipMalloc(&d_l, n*sizeof(double));
	hipMalloc(&d_I, I_size*sizeof(double));
	hipMalloc(&d_zs, z_size*sizeof(double));
	hipMemcpy(d_x, x, x_size*sizeof(double), hipMemcpyHostToDevice);
	hipMemcpy(d_m, m, n*sizeof(double), hipMemcpyHostToDevice);
	hipMemcpy(d_I, I, I_size*sizeof(double), hipMemcpyHostToDevice);
	hipMemcpy(d_l, l, n*sizeof(double), hipMemcpyHostToDevice);
	dim3 dimBlock(6, 6,1);
	dim3 dimGrid(n,1,1);

	Initialize_gpu<<<dimGrid, dimBlock>>>(d_x, d_m, d_l, d_I, d_zs, n);
	hipMemcpy(Zs, d_zs, z_size*sizeof(double), hipMemcpyDeviceToHost);
	
	hipFree(d_x);
	hipFree(d_m);
	hipFree(d_l);
	hipFree(d_I);
	hipFree(d_zs);
}

	.text
	.file	"Init_setup.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z14CudaInitializePdS_S_S_iS_   # -- Begin function _Z14CudaInitializePdS_S_S_iS_
	.type	_Z14CudaInitializePdS_S_S_iS_,@function
_Z14CudaInitializePdS_S_S_iS_:          # @_Z14CudaInitializePdS_S_S_iS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 80(%rsp)                   # 8-byte Spill
	movl	%r8d, %r14d
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, 72(%rsp)                  # 8-byte Spill
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	leal	(%r14,%r14), %eax
	leal	(%r14,%r14,8), %ebx
	imull	$156, %r8d, %r15d
	movslq	%eax, %r13
	shlq	$3, %r13
	leaq	40(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movslq	%r14d, %r12
	leaq	(,%r12,8), %rbp
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movslq	%ebx, %rbx
	shlq	$3, %rbx
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movslq	%r15d, %r15
	shlq	$3, %r15
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%r12d, %edi
	btsq	$32, %rdi
	movabsq	$25769803782, %rdx              # imm = 0x600000006
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	8(%rsp), %r8
	movl	%r14d, %r9d
	callq	_Z29__device_stub__Initialize_gpuPdS_S_S_S_i
.LBB0_2:
	movq	8(%rsp), %rsi
	movq	80(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z14CudaInitializePdS_S_S_iS_, .Lfunc_end0-_Z14CudaInitializePdS_S_S_iS_
	.cfi_endproc
                                        # -- End function
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
