#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <assert.h>
#include <unistd.h>
#include <sys/time.h>
#include <cuda_runtime.h>

/* Problem size. */

#ifndef M_PI
#define M_PI 3.14159
#endif

void init_array(double *x, double *A, int NX, int NY)
{
	int i, j;

	for (i = 0; i < NX; i++) {
		for (j = 0; j < NY; j++) {
			A[i*NY + j] = ((double) i*(j)) / NX;
		}
	}

	for (j = 0; j < NY; j++) {
		x[j] = j * M_PI;
	}

}

__global__ void trans_norm_vector(double* A, double* x, double* y, double* tmp, int NX, int NY)
{
	int j;
	int i = blockDim.x * blockIdx.x + threadIdx.x;

  	tmp[i] = 0;
		//Α*Χ
	  for (j = 0; j < NY; j++) {
			tmp[i] = tmp[i] + A[i*NY + j] * x[j];
		}

}

__global__ void atemp(double* A, double* y, double* tmp, int NX, int NY)
{
	int j;
	int i = blockDim.x * blockIdx.x + threadIdx.x;
		// Α(T)*temp
		if (i <= NY){
	  	for (j = 0; j < NX; j++) {
				y[i] = y[i] + A[i + j*NY] * tmp[j];
			}
		}
}



int main(int argc, char *argv[])
{
	FILE		*output1;
	double		*A;
	double		*x;
	double		*y;
	double		*tmp;
	cudaEvent_t start, stop;
 	float elapsedTime;
	int NX = atoi(argv[1]), NY = atoi(argv[2]);

	int sizeY = NY*sizeof(double);
	int sizeX = NY*sizeof(double);
	int sizeA = NX*NY*sizeof(double);
	int sizeTMP = NX*sizeof(double);


	A = (double*)malloc(sizeA);
	x = (double*)malloc(sizeX);
	y = (double*)malloc(sizeY);
	tmp = (double*)malloc(sizeTMP);
	output1 = fopen("transgpu.out", "w");
	cudaError_t err = cudaSuccess;

	int threadsPerBlock=64;
	int threadsPerBlock2=64;
	int blocksPerGrid;
	int blocksPerGrid2;

	if ((NX%512==0) && (NY%512==0)) {
		threadsPerBlock=128;
		threadsPerBlock2=128;
	}


	if ((NX%threadsPerBlock != 0) && (NY%threadsPerBlock2 != 0)) {
		blocksPerGrid = NX/threadsPerBlock+1;
		blocksPerGrid2 = NY/threadsPerBlock2+1;
		}
	else if ((NX%threadsPerBlock == 0) && (NY%threadsPerBlock2 != 0)) {
		blocksPerGrid = NX/threadsPerBlock;
		blocksPerGrid2 = NY/threadsPerBlock2+1;
	}
	else if ((NX%threadsPerBlock != 0) && (NY%threadsPerBlock2 == 0)) {
		blocksPerGrid = NX/threadsPerBlock+1;
		blocksPerGrid2 = NY/threadsPerBlock2;
	}
	else {
		blocksPerGrid = NX/threadsPerBlock;
		blocksPerGrid2 = NY/threadsPerBlock2;
	}

	printf("blocksPerGrid %d\n", blocksPerGrid);
	printf("blocksPerGrid2 %d\n", blocksPerGrid2);
	printf("threadsPerBlock %d\n", threadsPerBlock);
	printf("threadsPerBlock2 %d\n", threadsPerBlock2);



	//Matrix A
	double *d_A = NULL;
	err = cudaMalloc((void **)&d_A, sizeA);
	if (err != cudaSuccess){
		fprintf(stderr, "Failed to allocate device matrix A (error code %s)!\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	//Vector x
	double *d_x = NULL;
	err = cudaMalloc((void **)&d_x, sizeX);
	if (err != cudaSuccess){
		fprintf(stderr, "Failed to allocate device vector x (error code %s)!\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}


	//Vector y
	double *d_y = NULL;
	err = cudaMalloc((void **)&d_y, sizeY);
	if (err != cudaSuccess){
		fprintf(stderr, "Failed to allocate device vector y (error code %s)!\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}


	// tmp
	double *d_tmp = NULL;
	err = cudaMalloc((void **)&d_tmp, sizeTMP);
	if (err != cudaSuccess){
		fprintf(stderr, "Failed to allocate device vector tmp (error code %s)!\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	init_array(x, A, NX, NY);

	err = cudaMemcpy(d_A, A, sizeA, cudaMemcpyHostToDevice);
	if (err != cudaSuccess){
		fprintf(stderr, "Failed to copy matrix A from host to device (error code %s)!\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	err = cudaMemcpy(d_x, x, sizeX, cudaMemcpyHostToDevice);
	if (err != cudaSuccess){
		fprintf(stderr, "Failed to copy vector x from host to device (error code %s)!\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	cudaEventRecord(start,0);
	trans_norm_vector<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_x, d_y, d_tmp, NX, NY);
	atemp<<<blocksPerGrid2, threadsPerBlock2>>>(d_A, d_y, d_tmp, NX, NY);
	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&elapsedTime, start,stop);

	printf("Elapsed time : %f s\n" ,elapsedTime/1000);
	if (err != cudaSuccess){
		fprintf(stderr, "Failed to fail to run (error code %s)!\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	err = cudaMemcpy(y, d_y, sizeY, cudaMemcpyDeviceToHost);

	if (err != cudaSuccess){
		fprintf(stderr, "Failed to copy vector Y from device to host (error code %s)!\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	err = cudaMemcpy(tmp, d_tmp, sizeTMP, cudaMemcpyDeviceToHost);

	if (err != cudaSuccess){
		fprintf(stderr, "Failed to copy vector tmp from device to host (error code %s)!\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	for (int j = 0; j < NY; j++) {
		fprintf(output1, "%f ", y[j]);
		fprintf(output1, "\n");
	}

	//free gpu pointers
	cudaFree(d_A);
	cudaFree(d_y);
	cudaFree(d_x);
	cudaFree(d_tmp);

	//free cpu pointers
	free(A);
	free(x);
	free(y);
	free(tmp);
	fclose(output1);

  return 0;
}

	.file	"tmpxft_002fd4bc_00000000-6_Trans.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2044:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2044:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10init_arrayPdS_ii
	.type	_Z10init_arrayPdS_ii, @function
_Z10init_arrayPdS_ii:
.LFB2040:
	.cfi_startproc
	endbr64
	movq	%rdi, %r8
	xorl	%r9d, %r9d
	xorl	%edi, %edi
.L3:
	cmpl	%edx, %edi
	jge	.L8
	movslq	%r9d, %rax
	leaq	(%rsi,%rax,8), %r10
	xorl	%eax, %eax
.L6:
	cmpl	%eax, %ecx
	jle	.L10
	cvtsi2sdl	%eax, %xmm1
	cvtsi2sdl	%edi, %xmm0
	mulsd	%xmm1, %xmm0
	cvtsi2sdl	%edx, %xmm1
	divsd	%xmm1, %xmm0
	movsd	%xmm0, (%r10,%rax,8)
	incq	%rax
	jmp	.L6
.L10:
	incl	%edi
	addl	%ecx, %r9d
	jmp	.L3
.L8:
	movsd	.LC0(%rip), %xmm1
	xorl	%eax, %eax
.L5:
	cmpl	%eax, %ecx
	jle	.L11
	cvtsi2sdl	%eax, %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%r8,%rax,8)
	incq	%rax
	jmp	.L5
.L11:
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z10init_arrayPdS_ii, .-_Z10init_arrayPdS_ii
	.globl	_Z45__device_stub__Z17trans_norm_vectorPdS_S_S_iiPdS_S_S_ii
	.type	_Z45__device_stub__Z17trans_norm_vectorPdS_S_S_iiPdS_S_S_ii, @function
_Z45__device_stub__Z17trans_norm_vectorPdS_S_S_iiPdS_S_S_ii:
.LFB2066:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17trans_norm_vectorPdS_S_S_ii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L12:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2066:
	.size	_Z45__device_stub__Z17trans_norm_vectorPdS_S_S_iiPdS_S_S_ii, .-_Z45__device_stub__Z17trans_norm_vectorPdS_S_S_iiPdS_S_S_ii
	.globl	_Z17trans_norm_vectorPdS_S_S_ii
	.type	_Z17trans_norm_vectorPdS_S_S_ii, @function
_Z17trans_norm_vectorPdS_S_S_ii:
.LFB2067:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z17trans_norm_vectorPdS_S_S_iiPdS_S_S_ii
	.cfi_endproc
.LFE2067:
	.size	_Z17trans_norm_vectorPdS_S_S_ii, .-_Z17trans_norm_vectorPdS_S_S_ii
	.globl	_Z30__device_stub__Z5atempPdS_S_iiPdS_S_ii
	.type	_Z30__device_stub__Z5atempPdS_S_iiPdS_S_ii, @function
_Z30__device_stub__Z5atempPdS_S_iiPdS_S_ii:
.LFB2068:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z5atempPdS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L17:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2068:
	.size	_Z30__device_stub__Z5atempPdS_S_iiPdS_S_ii, .-_Z30__device_stub__Z5atempPdS_S_iiPdS_S_ii
	.globl	_Z5atempPdS_S_ii
	.type	_Z5atempPdS_S_ii, @function
_Z5atempPdS_S_ii:
.LFB2069:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z5atempPdS_S_iiPdS_S_ii
	.cfi_endproc
.LFE2069:
	.size	_Z5atempPdS_S_ii, .-_Z5atempPdS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"w"
.LC2:
	.string	"transgpu.out"
.LC3:
	.string	"blocksPerGrid %d\n"
.LC4:
	.string	"blocksPerGrid2 %d\n"
.LC5:
	.string	"threadsPerBlock %d\n"
.LC6:
	.string	"threadsPerBlock2 %d\n"
.LC7:
	.string	"Failed to allocate device matrix A (error code %s)!\n"
.LC8:
	.string	"Failed to allocate device vector x (error code %s)!\n"
.LC9:
	.string	"Failed to allocate device vector y (error code %s)!\n"
.LC10:
	.string	"Failed to allocate device vector tmp (error code %s)!\n"
.LC11:
	.string	"Failed to copy matrix A from host to device (error code %s)!\n"
.LC12:
	.string	"Failed to copy vector x from host to device (error code %s)!\n"
.LC14:
	.string	"Elapsed time : %f s\n"
.LC15:
	.string	"Failed to copy vector Y from device to host (error code %s)!\n"
.LC16:
	.string	"Failed to copy vector tmp from device to host (error code %s)!\n"
.LC17:
	.string	"%f "
.LC18:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movl	%eax, %ebp
	movl	%r12d, %eax
	imull	%ebp, %eax
	sall	$3, %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, 32(%rsp)
	leal	0(,%rbp,8), %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movq	%rax, %r14
	leal	0(,%r12,8), %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	leaq	.LC1(%rip), %rsi
	leaq	.LC2(%rip), %rdi
	movq	%rax, 56(%rsp)
	call	fopen@PLT
	movq	%rax, 48(%rsp)
	movl	%r12d, %eax
	orl	%ebp, %eax
	andl	$511, %eax
	cmpl	$1, %eax
	movl	%r12d, %eax
	sbbl	%ebx, %ebx
	cltd
	andl	$64, %ebx
	addl	$64, %ebx
	idivl	%ebx
	movl	%eax, %r15d
	movl	%ebp, %eax
	movl	%edx, %ecx
	cltd
	idivl	%ebx
	movl	%eax, %r13d
	testl	%ecx, %ecx
	je	.L24
	incl	%r15d
.L24:
	cmpl	$1, %edx
	leaq	.LC3(%rip), %rsi
	movl	%r15d, %edx
	movl	$2, %edi
	sbbl	$-1, %r13d
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r13d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movl	%ebx, %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	%ebx, %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%esi, %esi
	leaq	80(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	movq	16(%rsp), %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L26
	call	cudaGetErrorString@PLT
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L48
.L26:
	movq	8(%rsp), %rsi
	xorl	%ecx, %ecx
	leaq	88(%rsp), %rdi
	movq	%rcx, 88(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L27
	call	cudaGetErrorString@PLT
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rcx
.L48:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L27:
	movq	8(%rsp), %rsi
	xorl	%edx, %edx
	leaq	96(%rsp), %rdi
	movq	%rdx, 96(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L28
	call	cudaGetErrorString@PLT
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L48
.L28:
	movq	24(%rsp), %rsi
	xorl	%eax, %eax
	leaq	104(%rsp), %rdi
	movq	%rax, 104(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L29
	call	cudaGetErrorString@PLT
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L48
.L29:
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%r12d, %edx
	call	_Z10init_arrayPdS_ii
	movq	80(%rsp), %rdi
	movq	16(%rsp), %rdx
	movl	$1, %ecx
	movq	32(%rsp), %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L30
	call	cudaGetErrorString@PLT
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L48
.L30:
	movq	88(%rsp), %rdi
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	40(%rsp), %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L31
	call	cudaGetErrorString@PLT
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L48
.L31:
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebx, 124(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r15d, 112(%rsp)
	movq	%rax, 128(%rsp)
	movl	132(%rsp), %ecx
	movq	%rax, 116(%rsp)
	movq	124(%rsp), %rdx
	movq	112(%rsp), %rdi
	movl	120(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	104(%rsp), %rcx
	movq	96(%rsp), %rdx
	movl	%ebp, %r9d
	movl	%r12d, %r8d
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z45__device_stub__Z17trans_norm_vectorPdS_S_S_iiPdS_S_S_ii
.L32:
	movabsq	$4294967297, %rax
	movl	%ebx, 124(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 128(%rsp)
	movl	132(%rsp), %ecx
	movq	%rax, 116(%rsp)
	movq	124(%rsp), %rdx
	movl	%r13d, 112(%rsp)
	movl	120(%rsp), %esi
	movq	112(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	%ebp, %r8d
	movl	%r12d, %ecx
	movq	80(%rsp), %rdi
	call	_Z30__device_stub__Z5atempPdS_S_iiPdS_S_ii
.L33:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	124(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	124(%rsp), %xmm0
	divss	.LC13(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L34
	call	cudaGetErrorString@PLT
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L48
.L34:
	movq	56(%rsp), %rdi
	movq	24(%rsp), %rdx
	movl	$2, %ecx
	xorl	%r12d, %r12d
	movq	104(%rsp), %rsi
	leaq	.LC17(%rip), %rbx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L35
	call	cudaGetErrorString@PLT
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L48
.L35:
	cmpl	%r12d, %ebp
	jle	.L49
	movsd	(%r14,%r12,8), %xmm0
	movq	48(%rsp), %rdi
	movq	%rbx, %rdx
	movb	$1, %al
	movl	$2, %esi
	incq	%r12
	call	__fprintf_chk@PLT
	movq	48(%rsp), %rdi
	leaq	.LC18(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	jmp	.L35
.L49:
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	56(%rsp), %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	fclose@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	main, .-main
	.section	.rodata.str1.1
.LC19:
	.string	"_Z5atempPdS_S_ii"
.LC20:
	.string	"_Z17trans_norm_vectorPdS_S_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2071:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z5atempPdS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17trans_norm_vectorPdS_S_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2071:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	1413754136
	.long	1074340347
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC13:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <assert.h>
#include <unistd.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

/* Problem size. */

#ifndef M_PI
#define M_PI 3.14159
#endif

void init_array(double *x, double *A, int NX, int NY)
{
	int i, j;

	for (i = 0; i < NX; i++) {
		for (j = 0; j < NY; j++) {
			A[i*NY + j] = ((double) i*(j)) / NX;
		}
	}

	for (j = 0; j < NY; j++) {
		x[j] = j * M_PI;
	}

}

__global__ void trans_norm_vector(double* A, double* x, double* y, double* tmp, int NX, int NY)
{
	int j;
	int i = blockDim.x * blockIdx.x + threadIdx.x;

  	tmp[i] = 0;
		//Α*Χ
	  for (j = 0; j < NY; j++) {
			tmp[i] = tmp[i] + A[i*NY + j] * x[j];
		}

}

__global__ void atemp(double* A, double* y, double* tmp, int NX, int NY)
{
	int j;
	int i = blockDim.x * blockIdx.x + threadIdx.x;
		// Α(T)*temp
		if (i <= NY){
	  	for (j = 0; j < NX; j++) {
				y[i] = y[i] + A[i + j*NY] * tmp[j];
			}
		}
}



int main(int argc, char *argv[])
{
	FILE		*output1;
	double		*A;
	double		*x;
	double		*y;
	double		*tmp;
	hipEvent_t start, stop;
 	float elapsedTime;
	int NX = atoi(argv[1]), NY = atoi(argv[2]);

	int sizeY = NY*sizeof(double);
	int sizeX = NY*sizeof(double);
	int sizeA = NX*NY*sizeof(double);
	int sizeTMP = NX*sizeof(double);


	A = (double*)malloc(sizeA);
	x = (double*)malloc(sizeX);
	y = (double*)malloc(sizeY);
	tmp = (double*)malloc(sizeTMP);
	output1 = fopen("transgpu.out", "w");
	hipError_t err = hipSuccess;

	int threadsPerBlock=64;
	int threadsPerBlock2=64;
	int blocksPerGrid;
	int blocksPerGrid2;

	if ((NX%512==0) && (NY%512==0)) {
		threadsPerBlock=128;
		threadsPerBlock2=128;
	}


	if ((NX%threadsPerBlock != 0) && (NY%threadsPerBlock2 != 0)) {
		blocksPerGrid = NX/threadsPerBlock+1;
		blocksPerGrid2 = NY/threadsPerBlock2+1;
		}
	else if ((NX%threadsPerBlock == 0) && (NY%threadsPerBlock2 != 0)) {
		blocksPerGrid = NX/threadsPerBlock;
		blocksPerGrid2 = NY/threadsPerBlock2+1;
	}
	else if ((NX%threadsPerBlock != 0) && (NY%threadsPerBlock2 == 0)) {
		blocksPerGrid = NX/threadsPerBlock+1;
		blocksPerGrid2 = NY/threadsPerBlock2;
	}
	else {
		blocksPerGrid = NX/threadsPerBlock;
		blocksPerGrid2 = NY/threadsPerBlock2;
	}

	printf("blocksPerGrid %d\n", blocksPerGrid);
	printf("blocksPerGrid2 %d\n", blocksPerGrid2);
	printf("threadsPerBlock %d\n", threadsPerBlock);
	printf("threadsPerBlock2 %d\n", threadsPerBlock2);



	//Matrix A
	double *d_A = NULL;
	err = hipMalloc((void **)&d_A, sizeA);
	if (err != hipSuccess){
		fprintf(stderr, "Failed to allocate device matrix A (error code %s)!\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	//Vector x
	double *d_x = NULL;
	err = hipMalloc((void **)&d_x, sizeX);
	if (err != hipSuccess){
		fprintf(stderr, "Failed to allocate device vector x (error code %s)!\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}


	//Vector y
	double *d_y = NULL;
	err = hipMalloc((void **)&d_y, sizeY);
	if (err != hipSuccess){
		fprintf(stderr, "Failed to allocate device vector y (error code %s)!\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}


	// tmp
	double *d_tmp = NULL;
	err = hipMalloc((void **)&d_tmp, sizeTMP);
	if (err != hipSuccess){
		fprintf(stderr, "Failed to allocate device vector tmp (error code %s)!\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	init_array(x, A, NX, NY);

	err = hipMemcpy(d_A, A, sizeA, hipMemcpyHostToDevice);
	if (err != hipSuccess){
		fprintf(stderr, "Failed to copy matrix A from host to device (error code %s)!\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	err = hipMemcpy(d_x, x, sizeX, hipMemcpyHostToDevice);
	if (err != hipSuccess){
		fprintf(stderr, "Failed to copy vector x from host to device (error code %s)!\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	hipEventCreate(&start);
	hipEventCreate(&stop);
	hipEventRecord(start,0);
	trans_norm_vector<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_x, d_y, d_tmp, NX, NY);
	atemp<<<blocksPerGrid2, threadsPerBlock2>>>(d_A, d_y, d_tmp, NX, NY);
	hipEventRecord(stop,0);
	hipEventSynchronize(stop);
	hipEventElapsedTime(&elapsedTime, start,stop);

	printf("Elapsed time : %f s\n" ,elapsedTime/1000);
	if (err != hipSuccess){
		fprintf(stderr, "Failed to fail to run (error code %s)!\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	err = hipMemcpy(y, d_y, sizeY, hipMemcpyDeviceToHost);

	if (err != hipSuccess){
		fprintf(stderr, "Failed to copy vector Y from device to host (error code %s)!\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	err = hipMemcpy(tmp, d_tmp, sizeTMP, hipMemcpyDeviceToHost);

	if (err != hipSuccess){
		fprintf(stderr, "Failed to copy vector tmp from device to host (error code %s)!\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}

	for (int j = 0; j < NY; j++) {
		fprintf(output1, "%f ", y[j]);
		fprintf(output1, "\n");
	}

	//free gpu pointers
	hipFree(d_A);
	hipFree(d_y);
	hipFree(d_x);
	hipFree(d_tmp);

	//free cpu pointers
	free(A);
	free(x);
	free(y);
	free(tmp);
	fclose(output1);

  return 0;
}

	.text
	.file	"Trans.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10init_arrayPdS_ii
.LCPI0_0:
	.quad	0x400921fb54442d18              # double 3.1415926535897931
	.text
	.globl	_Z10init_arrayPdS_ii
	.type	_Z10init_arrayPdS_ii,@function
_Z10init_arrayPdS_ii:                   # @_Z10init_arrayPdS_ii
	.cfi_startproc
# %bb.0:
	movl	%ecx, %eax
	testl	%edx, %edx
	jle	.LBB0_6
# %bb.1:                                # %.preheader21.lr.ph
	cvtsi2sd	%edx, %xmm0
	movl	%edx, %edx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.LBB0_2:                                # %.preheader21
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB0_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	%r8d, %r10d
	leaq	(%rsi,%r10,8), %r10
	xorps	%xmm1, %xmm1
	cvtsi2sd	%r9d, %xmm1
	xorl	%r11d, %r11d
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm2, %xmm2
	cvtsi2sd	%r11d, %xmm2
	mulsd	%xmm1, %xmm2
	divsd	%xmm0, %xmm2
	movsd	%xmm2, (%r10,%r11,8)
	incq	%r11
	cmpq	%r11, %rax
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r9
	addl	%ecx, %r8d
	cmpq	%rdx, %r9
	jne	.LBB0_2
.LBB0_6:                                # %.preheader
	testl	%ecx, %ecx
	jle	.LBB0_9
# %bb.7:                                # %.lr.ph25.preheader
	xorl	%ecx, %ecx
	movsd	.LCPI0_0(%rip), %xmm0           # xmm0 = mem[0],zero
.LBB0_8:                                # %.lr.ph25
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ecx, %xmm1
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, (%rdi,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_8
.LBB0_9:                                # %._crit_edge26
	retq
.Lfunc_end0:
	.size	_Z10init_arrayPdS_ii, .Lfunc_end0-_Z10init_arrayPdS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__trans_norm_vectorPdS_S_S_ii # -- Begin function _Z32__device_stub__trans_norm_vectorPdS_S_S_ii
	.type	_Z32__device_stub__trans_norm_vectorPdS_S_S_ii,@function
_Z32__device_stub__trans_norm_vectorPdS_S_S_ii: # @_Z32__device_stub__trans_norm_vectorPdS_S_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17trans_norm_vectorPdS_S_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z32__device_stub__trans_norm_vectorPdS_S_S_ii, .Lfunc_end1-_Z32__device_stub__trans_norm_vectorPdS_S_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__atempPdS_S_ii # -- Begin function _Z20__device_stub__atempPdS_S_ii
	.type	_Z20__device_stub__atempPdS_S_ii,@function
_Z20__device_stub__atempPdS_S_ii:       # @_Z20__device_stub__atempPdS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5atempPdS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z20__device_stub__atempPdS_S_ii, .Lfunc_end2-_Z20__device_stub__atempPdS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:                                # %.thread138
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r12d
	leal	(,%r12,8), %ebx
	leal	(,%rbp,8), %r14d
	movl	%r14d, %eax
	imull	%r12d, %eax
	movslq	%eax, %rdi
	movq	%rdi, 112(%rsp)                 # 8-byte Spill
	callq	malloc
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	movslq	%ebx, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movslq	%r14d, %rdi
	movq	%rdi, 96(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r13
	movl	%r12d, %eax
	orl	%ebp, %eax
	xorl	%ecx, %ecx
	testl	$511, %eax                      # imm = 0x1FF
	sete	%cl
	shll	$6, %ecx
	leal	64(%rcx), %r14d
	orl	$63, %ecx
	movl	%ecx, %esi
	andl	%ebp, %esi
	andl	%r12d, %ecx
	movq	%rbp, 40(%rsp)                  # 8-byte Spill
	movl	%ebp, %eax
	cltd
	idivl	%r14d
	movl	%eax, %ebp
	cmpl	$1, %esi
	sbbl	$-1, %ebp
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	movl	%r12d, %eax
	cltd
	idivl	%r14d
	movl	%eax, %r12d
	cmpl	$1, %ecx
	sbbl	$-1, %r12d
	movl	$.L.str.2, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.5, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	leaq	32(%rsp), %rdi
	movq	$0, (%rdi)
	movq	112(%rsp), %rsi                 # 8-byte Reload
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_1
# %bb.3:
	leaq	48(%rsp), %rdi
	movq	$0, (%rdi)
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.5:
	leaq	24(%rsp), %rdi
	movq	$0, (%rdi)
	movq	%rbx, 80(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.7:
	movl	%ebp, 68(%rsp)                  # 4-byte Spill
	movl	%r12d, 64(%rsp)                 # 4-byte Spill
	leaq	16(%rsp), %rdi
	movq	$0, (%rdi)
	movq	96(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	testl	%eax, %eax
	movq	8(%rsp), %rbx                   # 8-byte Reload
	jne	.LBB3_8
# %bb.9:
	movq	88(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movq	104(%rsp), %rbp                 # 8-byte Reload
	movq	%rbp, %rsi
	movq	40(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%ebx, %ecx
	callq	_Z10init_arrayPdS_ii
	movq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movq	112(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_10
# %bb.11:
	movq	48(%rsp), %rdi
	movq	%r12, %rsi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movl	68(%rsp), %ebx                  # 4-byte Reload
	jne	.LBB3_12
# %bb.13:
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	leaq	120(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%ebx, %edi
	btsq	$32, %rdi
	movl	%r14d, %ebx
	btsq	$32, %rbx
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_15
# %bb.14:
	movq	32(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	40(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movq	8(%rsp), %r9                    # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	callq	_Z32__device_stub__trans_norm_vectorPdS_S_S_ii
.LBB3_15:
	movl	64(%rsp), %edi                  # 4-byte Reload
	orq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	80(%rsp), %r14                  # 8-byte Reload
	jne	.LBB3_17
# %bb.16:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	40(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movq	8(%rsp), %r8                    # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_Z20__device_stub__atempPdS_S_ii
.LBB3_17:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	56(%rsp), %rdi
	callq	hipEventSynchronize
	movq	120(%rsp), %rsi
	movq	56(%rsp), %rdx
	leaq	132(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rsi
	movq	%r15, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movq	104(%rsp), %r12                 # 8-byte Reload
	jne	.LBB3_18
# %bb.19:
	movq	16(%rsp), %rsi
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movq	96(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	jne	.LBB3_24
# %bb.20:                               # %.preheader
	testl	%ecx, %ecx
	jle	.LBB3_23
# %bb.21:                               # %.lr.ph.preheader
	movl	%ecx, %ebx
	xorl	%r14d, %r14d
.LBB3_22:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r15,%r14,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.16, %esi
	movq	%r13, %rdi
	movb	$1, %al
	callq	fprintf
	movl	$10, %edi
	movq	%r13, %rsi
	callq	fputc@PLT
	incq	%r14
	cmpq	%r14, %rbx
	jne	.LBB3_22
.LBB3_23:                               # %._crit_edge
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%r12, %rdi
	callq	free
	movq	88(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r13, %rdi
	callq	fclose
	xorl	%eax, %eax
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_1:
	.cfi_def_cfa_offset 192
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	jmp	.LBB3_2
.LBB3_4:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	jmp	.LBB3_2
.LBB3_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	jmp	.LBB3_2
.LBB3_8:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %esi
	jmp	.LBB3_2
.LBB3_10:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	jmp	.LBB3_2
.LBB3_12:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	jmp	.LBB3_2
.LBB3_18:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.14, %esi
	jmp	.LBB3_2
.LBB3_24:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
.LBB3_2:
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17trans_norm_vectorPdS_S_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5atempPdS_S_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17trans_norm_vectorPdS_S_S_ii,@object # @_Z17trans_norm_vectorPdS_S_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z17trans_norm_vectorPdS_S_S_ii
	.p2align	3, 0x0
_Z17trans_norm_vectorPdS_S_S_ii:
	.quad	_Z32__device_stub__trans_norm_vectorPdS_S_S_ii
	.size	_Z17trans_norm_vectorPdS_S_S_ii, 8

	.type	_Z5atempPdS_S_ii,@object        # @_Z5atempPdS_S_ii
	.globl	_Z5atempPdS_S_ii
	.p2align	3, 0x0
_Z5atempPdS_S_ii:
	.quad	_Z20__device_stub__atempPdS_S_ii
	.size	_Z5atempPdS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"transgpu.out"
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"blocksPerGrid %d\n"
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"blocksPerGrid2 %d\n"
	.size	.L.str.3, 19

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"threadsPerBlock %d\n"
	.size	.L.str.4, 20

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"threadsPerBlock2 %d\n"
	.size	.L.str.5, 21

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to allocate device matrix A (error code %s)!\n"
	.size	.L.str.6, 53

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to allocate device vector x (error code %s)!\n"
	.size	.L.str.7, 53

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to allocate device vector y (error code %s)!\n"
	.size	.L.str.8, 53

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to allocate device vector tmp (error code %s)!\n"
	.size	.L.str.9, 55

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to copy matrix A from host to device (error code %s)!\n"
	.size	.L.str.10, 62

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to copy vector x from host to device (error code %s)!\n"
	.size	.L.str.11, 62

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Elapsed time : %f s\n"
	.size	.L.str.12, 21

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Failed to copy vector Y from device to host (error code %s)!\n"
	.size	.L.str.14, 62

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Failed to copy vector tmp from device to host (error code %s)!\n"
	.size	.L.str.15, 64

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"%f "
	.size	.L.str.16, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17trans_norm_vectorPdS_S_S_ii"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z5atempPdS_S_ii"
	.size	.L__unnamed_2, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__trans_norm_vectorPdS_S_S_ii
	.addrsig_sym _Z20__device_stub__atempPdS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17trans_norm_vectorPdS_S_S_ii
	.addrsig_sym _Z5atempPdS_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17trans_norm_vectorPdS_S_S_ii ; -- Begin function _Z17trans_norm_vectorPdS_S_S_ii
	.globl	_Z17trans_norm_vectorPdS_S_S_ii
	.p2align	8
	.type	_Z17trans_norm_vectorPdS_S_S_ii,@function
_Z17trans_norm_vectorPdS_S_S_ii:        ; @_Z17trans_norm_vectorPdS_S_S_ii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s2, 0xffff
	s_load_b64 s[2:3], s[0:1], 0x18
	v_mad_u64_u32 v[4:5], null, s15, s4, v[0:1]
	s_load_b32 s4, s[0:1], 0x24
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v1, v0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_cmp_lt_i32 s4, 1
	global_store_b64 v[2:3], v[0:1], off
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mul_lo_u32 v4, v4, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[6:7], 3, v[4:5]
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[8:9], v[6:7], off
	global_load_b64 v[10:11], v0, s[2:3]
	v_add_co_u32 v6, vcc_lo, v6, 8
	s_add_i32 s4, s4, -1
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s4, 0
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[8:9], v[10:11], v[4:5]
	global_store_b64 v[2:3], v[4:5], off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17trans_norm_vectorPdS_S_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17trans_norm_vectorPdS_S_S_ii, .Lfunc_end0-_Z17trans_norm_vectorPdS_S_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5atempPdS_S_ii        ; -- Begin function _Z5atempPdS_S_ii
	.globl	_Z5atempPdS_S_ii
	.p2align	8
	.type	_Z5atempPdS_S_ii,@function
_Z5atempPdS_S_ii:                       ; @_Z5atempPdS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_gt_i32 s2, 0
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s3, v1
	s_and_b32 s4, vcc_lo, s4
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b64 v[5:6], v[3:4], off
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[1:2]
	v_add_nc_u32_e32 v1, s3, v1
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b64 v[9:10], v0, s[0:1]
	global_load_b64 v[7:8], v[7:8], off
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s2, 0
	s_waitcnt vmcnt(0)
	v_fma_f64 v[5:6], v[7:8], v[9:10], v[5:6]
	global_store_b64 v[3:4], v[5:6], off
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5atempPdS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z5atempPdS_S_ii, .Lfunc_end1-_Z5atempPdS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17trans_norm_vectorPdS_S_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17trans_norm_vectorPdS_S_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5atempPdS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5atempPdS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
