#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <sys/time.h>

double get_time() {
  struct timeval tv;
  cudaThreadSynchronize();
  gettimeofday(&tv, NULL);
  return double(tv.tv_sec+tv.tv_usec*1e-6);
}

int   const N       = 1000000;
int   const THREADS = 64;
int   const NCRIT   = THREADS;
float const THETA   = 0.8;
float const EPS2    = 0.0001;

__global__ void direct(float4 *sourceGlob, float4 *targetGlob) {
  float3 d; 
  __shared__ float4 sourceShrd[THREADS];
  float4 target = sourceGlob[blockIdx.x * THREADS + threadIdx.x];
  target.w *= -rsqrtf(EPS2);
  for( int iblok=0; iblok<(N-1)/THREADS; iblok++) {
    __syncthreads();
    sourceShrd[threadIdx.x] = sourceGlob[iblok * THREADS + threadIdx.x];
    __syncthreads();
    for( int i=0; i<THREADS; i++ ) {
      d.x = target.x - sourceShrd[i].x;
      d.y = target.y - sourceShrd[i].y;
      d.z = target.z - sourceShrd[i].z;
      target.w += sourceShrd[i].w * rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z + EPS2);
    }
  } 
  int iblok = (N-1)/THREADS;
  __syncthreads();
  sourceShrd[threadIdx.x] = sourceGlob[iblok * THREADS + threadIdx.x];
  __syncthreads();
  for( int i=0; i<N - (iblok * THREADS); i++ ) {
    d.x = target.x - sourceShrd[i].x;
    d.y = target.y - sourceShrd[i].y;
    d.z = target.z - sourceShrd[i].z;
    target.w += sourceShrd[i].w * rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z + EPS2);
  }
  targetGlob[blockIdx.x * THREADS + threadIdx.x] = target;
} 

__device__ void multipole(int i, float4 &target, float *multipShrd) {
  float R,R3,R5;
  float3 d;
  d.x = target.x - multipShrd[i*13+0];
  d.y = target.y - multipShrd[i*13+1];
  d.z = target.z - multipShrd[i*13+2];
  R = rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z);
  R3 = R * R * R;
  R5 = R3 * R * R;
  target.w += multipShrd[i*13+ 3] * R;
  target.w += multipShrd[i*13+ 4] * (-d.x * R3);
  target.w += multipShrd[i*13+ 5] * (-d.y * R3);
  target.w += multipShrd[i*13+ 6] * (-d.z * R3);
  target.w += multipShrd[i*13+ 7] * (3 * d.x * d.x * R5 - 1 * R3);
  target.w += multipShrd[i*13+ 8] * (3 * d.y * d.y * R5 - 1 * R3);
  target.w += multipShrd[i*13+ 9] * (3 * d.z * d.z * R5 - 1 * R3);
  target.w += multipShrd[i*13+10] * (3 * d.x * d.y * R5);
  target.w += multipShrd[i*13+11] * (3 * d.y * d.z * R5);
  target.w += multipShrd[i*13+12] * (3 * d.z * d.x * R5);
}

__global__ void kernel(int *offSrcGlob, float4 *sourceGlob, int *offMtpGlob, float *multipGlob, float4 *targetGlob) {
  int N = offSrcGlob[blockIdx.x+1]-offSrcGlob[blockIdx.x];
  int offset = offSrcGlob[blockIdx.x];
  float3 d;
  __shared__ float4 sourceShrd[THREADS];
  __shared__ float  multipShrd[13*THREADS];
  float4 target = targetGlob[blockIdx.x * THREADS + threadIdx.x];
  target.w *= -rsqrtf(EPS2);
  for( int iblok=0; iblok<(N-1)/THREADS; iblok++) {
    __syncthreads();
    sourceShrd[threadIdx.x] = sourceGlob[offset + iblok * THREADS + threadIdx.x];
    __syncthreads();
    for( int i=0; i<THREADS; i++ ) {
      d.x = target.x - sourceShrd[i].x;
      d.y = target.y - sourceShrd[i].y;
      d.z = target.z - sourceShrd[i].z;
      target.w += sourceShrd[i].w * rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z + EPS2);
    }
  }
  int iblok = (N-1)/THREADS;
  __syncthreads();
  sourceShrd[threadIdx.x] = sourceGlob[offset + iblok * THREADS + threadIdx.x];
  __syncthreads();
  for( int i=0; i<N - (iblok * THREADS); i++ ) {
    d.x = target.x - sourceShrd[i].x;
    d.y = target.y - sourceShrd[i].y;
    d.z = target.z - sourceShrd[i].z;
    target.w += sourceShrd[i].w * rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z + EPS2);
  }
  N = offMtpGlob[blockIdx.x+1]-offMtpGlob[blockIdx.x];
  offset = offMtpGlob[blockIdx.x];
  for( int iblok=0; iblok<(N-1)/THREADS; iblok++) {
    int index = offset + iblok * THREADS + threadIdx.x;
    __syncthreads();
    for( int i=0; i<13; i++ )
      multipShrd[threadIdx.x*13+i] = multipGlob[index*13+i];
    __syncthreads();
    for( int i=0; i<THREADS; i++ ) {
      multipole(i,target,multipShrd);
    }
  }
  iblok = (N-1)/THREADS;
  int index = offset + iblok * THREADS + threadIdx.x;
  __syncthreads();
  for( int i=0; i<13; i++ )
    multipShrd[threadIdx.x*13+i] = multipGlob[index*13+i];
  __syncthreads();
  for( int i=0; i<N - (iblok * THREADS); i++ ) {
    multipole(i,target,multipShrd);
  }
  targetGlob[blockIdx.x * THREADS + threadIdx.x] = target;
}

struct cell {
  int nleaf,nchild,leaf[NCRIT];
  float xc,yc,zc,r;
  float multipole[10];
  cell *parent,*child[8];
};

void initialize(cell *C) {
  C->nleaf = C->nchild = 0;
  C->parent = NULL;
  for( int i=0; i<8; i++ ) C->child[i] = NULL;
  for( int i=0; i<10; i++ ) C->multipole[i] = 0;
}

void add_child(int octant, cell *C, cell *&CN) {
  ++CN;
  initialize(CN);
  CN->r  = C->r/2;
  CN->xc = C->xc+CN->r*((octant&1)*2-1);
  CN->yc = C->yc+CN->r*((octant&2)-1);
  CN->zc = C->zc+CN->r*((octant&4)/2-1);
  CN->parent = C;
  C->child[octant] = CN;
  C->nchild |= (1 << octant);
}

void split_cell(float *x, float *y, float *z, cell *C, cell *&CN) {
  for( int i=0; i<NCRIT; i++ ) {                             
    int l = C->leaf[i];
    int octant = (x[l] > C->xc) + ((y[l] > C->yc) << 1) + ((z[l] > C->zc) << 2);
    if( !(C->nchild & (1 << octant)) ) add_child(octant,C,CN);
    cell *CC = C->child[octant];
    CC->leaf[CC->nleaf++] = l;
    if( CC->nleaf >= NCRIT ) split_cell(x,y,z,CC,CN);
  } 
}

void getMultipole(cell *C, float *x, float *y, float *z, float *m, cell **twig, int &ntwig) {
  float dx,dy,dz;
  if( C->nleaf >= NCRIT ) {
    for( int c=0; c<8; c++ )
      if( C->nchild & (1 << c) ) getMultipole(C->child[c],x,y,z,m,twig,ntwig);
  } else {
    for( int l=0; l<C->nleaf; l++ ) {
      int j = C->leaf[l];
      dx = C->xc-x[j];
      dy = C->yc-y[j];
      dz = C->zc-z[j];
      C->multipole[0] += m[j];
      C->multipole[1] += m[j]*dx;
      C->multipole[2] += m[j]*dy;
      C->multipole[3] += m[j]*dz;
      C->multipole[4] += m[j]*dx*dx/2;
      C->multipole[5] += m[j]*dy*dy/2;
      C->multipole[6] += m[j]*dz*dz/2;
      C->multipole[7] += m[j]*dx*dy/2;
      C->multipole[8] += m[j]*dy*dz/2;
      C->multipole[9] += m[j]*dz*dx/2;
    }
    twig[ntwig] = C;
    ntwig++;
  }
}

void upwardSweep(cell *C, cell *P) {
  float dx,dy,dz;
  dx = P->xc-C->xc;
  dy = P->yc-C->yc;
  dz = P->zc-C->zc;
  P->multipole[0] += C->multipole[0];
  P->multipole[1] += C->multipole[1]+ dx*C->multipole[0];
  P->multipole[2] += C->multipole[2]+ dy*C->multipole[0];
  P->multipole[3] += C->multipole[3]+ dz*C->multipole[0];
  P->multipole[4] += C->multipole[4]+ dx*C->multipole[1]+dx*dx*C->multipole[0]/2;
  P->multipole[5] += C->multipole[5]+ dy*C->multipole[2]+dy*dy*C->multipole[0]/2;
  P->multipole[6] += C->multipole[6]+ dz*C->multipole[3]+dz*dz*C->multipole[0]/2;
  P->multipole[7] += C->multipole[7]+(dx*C->multipole[2]+   dy*C->multipole[1]+dx*dy*C->multipole[0])/2;
  P->multipole[8] += C->multipole[8]+(dy*C->multipole[3]+   dz*C->multipole[2]+dy*dz*C->multipole[0])/2;
  P->multipole[9] += C->multipole[9]+(dz*C->multipole[1]+   dx*C->multipole[3]+dz*dx*C->multipole[0])/2;
}

void preval(cell *CI, cell *CJ, int &nmtp, int &nsrc) {
  float dx,dy,dz,r;
  if( CJ->nleaf >= NCRIT ) {
    for( int c=0; c<8; c++ ) {
      if( CJ->nchild & (1 << c) ) {
        cell *CC = CJ->child[c];
        dx = CI->xc-CC->xc;
        dy = CI->yc-CC->yc;
        dz = CI->zc-CC->zc;
        r = sqrtf(dx*dx+dy*dy+dz*dz);
        if( CI->r+CC->r > THETA*r ) {
          preval(CI,CC,nmtp,nsrc);
        } else {
          nmtp += 13;
        }
      }
    }
  } else
    nsrc += CJ->nleaf;
}

void evaluate(cell *CI, cell *CJ, float *x, float *y, float *z, float *m, float *p,
              int &offSrc, float4 *sourceHost, int &offMtp, float *multipHost) {
  float dx,dy,dz,r;
  if( CJ->nleaf >= NCRIT ) {
    for( int c=0; c<8; c++ ) {
      if( CJ->nchild & (1 << c) ) {
        cell *CC = CJ->child[c];
        dx = CI->xc-CC->xc;
        dy = CI->yc-CC->yc;
        dz = CI->zc-CC->zc;
        r = sqrtf(dx*dx+dy*dy+dz*dz);
        if( CI->r+CC->r > THETA*r ) {
          evaluate(CI,CC,x,y,z,m,p,offSrc,sourceHost,offMtp,multipHost);
        } else {
          multipHost[offMtp*13+ 0] = CC->xc;
          multipHost[offMtp*13+ 1] = CC->yc;
          multipHost[offMtp*13+ 2] = CC->zc;
          for( int i=0; i<10; i++ )
            multipHost[offMtp*13+ i + 3] = CC->multipole[i];
          offMtp++;
        }
      }
    }
  } else {
    for( int lj=0; lj<CJ->nleaf; lj++ ) {
      int j = CJ->leaf[lj];
      sourceHost[offSrc].x = x[j];
      sourceHost[offSrc].y = y[j];
      sourceHost[offSrc].z = z[j];
      sourceHost[offSrc].w = m[j];
      offSrc++;
    }
  }
}

int main() {
  float *x,*y,*z,*m,*p,*pd;
  double tic,toc;
  x  = (float*)malloc(N*sizeof(float));
  y  = (float*)malloc(N*sizeof(float));
  z  = (float*)malloc(N*sizeof(float));
  m  = (float*)malloc(N*sizeof(float));
  p  = (float*)malloc(N*sizeof(float));
  pd = (float*)malloc(N*sizeof(float));
// Initialize
  for( int i=0; i<N; i++ ) {
    x[i] = rand()/(1.+RAND_MAX);
    y[i] = rand()/(1.+RAND_MAX);
    z[i] = rand()/(1.+RAND_MAX);
    m[i] = 1.0/N;
  }
// Direct summation
/*
  float dx,dy,dz,r;
  for( int i=0; i<N; i++ ) {
    float pp = - m[i] / sqrtf(EPS2);
    for( int j=0; j<N; j++ ) {
      dx = x[i]-x[j];
      dy = y[i]-y[j];
      dz = z[i]-z[j];
      r = sqrtf(dx*dx+dy*dy+dz*dz+EPS2);
      pp += m[j] / r;
    }
    pd[i] = pp;
  }
*/
// Set root cell
  cell *C0;
  C0 = (cell*)malloc(N*sizeof(cell));
  initialize(C0);
  C0->xc = C0->yc = C0->zc = C0->r = 0.5;
// Build tree
  cell *CN = C0;
  for( int i=0; i<N; i++ ) {
    cell *C = C0;
    while( C->nleaf >= NCRIT ) {
      C->nleaf++;
      int octant = (x[i] > C->xc) + ((y[i] > C->yc) << 1) + ((z[i] > C->zc) << 2);
      if( !(C->nchild & (1 << octant)) ) add_child(octant,C,CN);
      C = C->child[octant];
    }
    C->leaf[C->nleaf++] = i;
    if( C->nleaf >= NCRIT ) split_cell(x,y,z,C,CN);
  }
// Multipole expansion
  int ntwig=0;
  cell **twig;
  twig = (cell**)malloc(N*sizeof(cell*));
  getMultipole(C0,x,y,z,m,twig,ntwig);
// Upward translation
  for( cell *C=CN; C!=C0; --C ) {
    cell *P = C->parent;
    upwardSweep(C,P);
  }
// Evaluate expansion
  int Nround = ntwig * THREADS;
  int ntgt = Nround;
  int noff = ntwig + 1;
  int    *offSrcHost,*offSrcDevc;
  int    *offMtpHost,*offMtpDevc;
  float4 *sourceHost,*sourceDevc;
  float4 *targetHost,*targetDevc;
  float  *multipHost,*multipDevc;
// Allocate memory on host and device
  int nmtp = 0, nsrc = 0;
  for( int t=0; t<ntwig; t++ ) {
    cell *CI = twig[t];
    cell *CJ = C0;
    preval(CI,CJ,nmtp,nsrc);
  }
  printf("%d %d\n",ntgt,nsrc);

  offSrcHost = (int   *)     malloc( noff*sizeof(int) );
  offMtpHost = (int   *)     malloc( noff*sizeof(int) );
  sourceHost = (float4*)     malloc( nsrc*sizeof(float4) );
  targetHost = (float4*)     malloc( ntgt*sizeof(float4) );
  multipHost = (float *)     malloc( nmtp*sizeof(float ) );
  cudaMalloc(  (void**) &offSrcDevc, noff*sizeof(int) );
  cudaMalloc(  (void**) &offMtpDevc, noff*sizeof(int) );
  cudaMalloc(  (void**) &sourceDevc, nsrc*sizeof(float4) );
  cudaMalloc(  (void**) &targetDevc, ntgt*sizeof(float4) );
  cudaMalloc(  (void**) &multipDevc, nmtp*sizeof(float ) );
  for( int i=0; i<N; i++ ) p[i] = 0;
  int offSrc = 0, offMtp = 0;
  tic = get_time();
  for( int t=0; t<ntwig; t++ ) {
    cell *CI = twig[t];
    cell *CJ = C0;
    offSrcHost[t] = offSrc;
    offMtpHost[t] = offMtp;
    for( int l=0; l<CI->nleaf; l++ ) {
      int i = CI->leaf[l];
      targetHost[t*THREADS+l].x = x[i];
      targetHost[t*THREADS+l].y = y[i];
      targetHost[t*THREADS+l].z = z[i];
      targetHost[t*THREADS+l].w = m[i];
    }
    evaluate(CI,CJ,x,y,z,m,p,offSrc,sourceHost,offMtp,multipHost);
  }
  toc = get_time();
  printf("buffer: %lf\n",toc-tic);
  offSrcHost[ntwig] = offSrc;
  offMtpHost[ntwig] = offMtp;
// Direct summation on device
  tic = get_time();
  cudaMemcpy(offSrcDevc,offSrcHost,noff*sizeof(int),cudaMemcpyHostToDevice);
  cudaMemcpy(offMtpDevc,offMtpHost,noff*sizeof(int),cudaMemcpyHostToDevice);
  cudaMemcpy(sourceDevc,sourceHost,nsrc*sizeof(float4),cudaMemcpyHostToDevice);
  cudaMemcpy(multipDevc,multipHost,nmtp*sizeof(float ),cudaMemcpyHostToDevice);
  cudaMemcpy(targetDevc,targetHost,ntgt*sizeof(float4),cudaMemcpyHostToDevice);
  toc = get_time();
  printf("memcpy: %lf\n",toc-tic);
  tic = get_time();
  kernel<<< Nround/THREADS, THREADS >>>(offSrcDevc,sourceDevc,offMtpDevc,multipDevc,targetDevc);
  toc = get_time();
  printf("kernel: %lf\n",toc-tic);
  cudaMemcpy(targetHost,targetDevc,ntgt*sizeof(float4),cudaMemcpyDeviceToHost);
// Compare results
  for( int t=0; t<ntwig; t++ ) {
    cell *CI = twig[t];
    for( int l=0; l<CI->nleaf; l++ ) {
      int i = CI->leaf[l];
      p[i] = targetHost[t*THREADS+l].w;
    }
  }
// Direct summation on device
  for( int i=0; i<N; i++ ) {
    sourceHost[i].x = x[i];
    sourceHost[i].y = y[i];
    sourceHost[i].z = z[i];
    sourceHost[i].w = m[i];
  }
  tic = get_time();
  cudaMemcpy        (sourceDevc,sourceHost,Nround*sizeof(float4),cudaMemcpyHostToDevice);
  direct<<< Nround/THREADS, THREADS >>>(sourceDevc,targetDevc);
  cudaMemcpy        (targetHost,targetDevc,Nround*sizeof(float4),cudaMemcpyDeviceToHost);
  toc = get_time();
  printf("direct: %lf\n",toc-tic);
// Compare results
  float err=0,rel=0;
  for( int i=0; i<N; i++ ) {
    float pp = targetHost[i].w;;
//    float pp = pd[i];
    err += (pp-p[i])*(pp-p[i]);
    rel += pp*pp;
  }
  printf("error : %f\n",sqrtf(err/rel));
}

	.file	"tmpxft_002533bf_00000000-6_12steps.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2039:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8get_timev
	.type	_Z8get_timev, @function
_Z8get_timev:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	cudaThreadSynchronize@PLT
	leaq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8get_timev, .-_Z8get_timev
	.globl	_Z9multipoleiR6float4Pf
	.type	_Z9multipoleiR6float4Pf, @function
_Z9multipoleiR6float4Pf:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z9multipoleiR6float4Pf, .-_Z9multipoleiR6float4Pf
	.globl	_Z10initializeP4cell
	.type	_Z10initializeP4cell, @function
_Z10initializeP4cell:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	movq	%rdi, %rdx
	movl	$16, %ecx
	leaq	328(%rdi), %rsi
	movq	%rax, (%rdi)
	addq	$280, %rdx
	movq	%rax, 320(%rdi)
	xorl	%eax, %eax
	movq	%rsi, %rdi
	rep stosl
	movl	$10, %ecx
	movq	%rdx, %rdi
	rep stosl
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10initializeP4cell, .-_Z10initializeP4cell
	.globl	_Z9add_childiP4cellRS0_
	.type	_Z9add_childiP4cellRS0_, @function
_Z9add_childiP4cellRS0_:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	(%rdx), %rax
	movl	%edi, %r9d
	movq	%rsi, %r8
	movq	%rdx, %r10
	leaq	392(%rax), %rdi
	movq	%rdi, (%rdx)
	call	_Z10initializeP4cell
	movl	%r9d, %edx
	movq	(%r10), %rax
	movl	%r9d, %ecx
	andl	$1, %edx
	movss	.LC1(%rip), %xmm0
	mulss	276(%r8), %xmm0
	leal	-1(%rdx,%rdx), %edx
	cvtsi2ssl	%edx, %xmm1
	movl	%r9d, %edx
	andl	$2, %edx
	decl	%edx
	mulss	%xmm0, %xmm1
	movss	%xmm0, 276(%rax)
	addss	264(%r8), %xmm1
	movss	%xmm1, 264(%rax)
	cvtsi2ssl	%edx, %xmm1
	movl	%r9d, %edx
	sarl	%edx
	andl	$2, %edx
	decl	%edx
	mulss	%xmm0, %xmm1
	addss	268(%r8), %xmm1
	movss	%xmm1, 268(%rax)
	cvtsi2ssl	%edx, %xmm1
	mulss	%xmm0, %xmm1
	addss	272(%r8), %xmm1
	movq	%r8, 320(%rax)
	movq	(%r10), %rdx
	movss	%xmm1, 272(%rax)
	movslq	%r9d, %rax
	movq	%rdx, 328(%r8,%rax,8)
	movl	$1, %eax
	sall	%cl, %eax
	orl	%eax, 4(%r8)
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z9add_childiP4cellRS0_, .-_Z9add_childiP4cellRS0_
	.globl	_Z10split_cellPfS_S_P4cellRS1_
	.type	_Z10split_cellPfS_S_P4cellRS1_, @function
_Z10split_cellPfS_S_P4cellRS1_:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rcx, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%r8, 8(%rsp)
.L13:
	movslq	8(%rbx,%rbp), %rax
	xorl	%ecx, %ecx
	movss	0(%r13,%rax,4), %xmm0
	comiss	268(%rbx), %xmm0
	movq	%rax, %r15
	movss	(%r12,%rax,4), %xmm0
	seta	%cl
	xorl	%edx, %edx
	comiss	264(%rbx), %xmm0
	movss	(%r14,%rax,4), %xmm0
	seta	%dl
	xorl	%eax, %eax
	comiss	272(%rbx), %xmm0
	leal	(%rdx,%rcx,2), %edx
	seta	%al
	leal	(%rdx,%rax,4), %r11d
	movl	4(%rbx), %eax
	btl	%r11d, %eax
	jc	.L11
	movq	8(%rsp), %rdx
	movq	%rbx, %rsi
	movl	%r11d, %edi
	call	_Z9add_childiP4cellRS0_
.L11:
	movslq	%r11d, %r11
	movq	328(%rbx,%r11,8), %rcx
	movslq	(%rcx), %rax
	leal	1(%rax), %edx
	movl	%edx, (%rcx)
	movl	%r15d, 8(%rcx,%rax,4)
	cmpl	$63, %edx
	jle	.L12
	movq	8(%rsp), %r8
	movq	%r14, %rdx
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	_Z10split_cellPfS_S_P4cellRS1_
.L12:
	addq	$4, %rbp
	cmpq	$256, %rbp
	jne	.L13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z10split_cellPfS_S_P4cellRS1_, .-_Z10split_cellPfS_S_P4cellRS1_
	.globl	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
	.type	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri, @function
_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r9, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	(%rdi), %edx
	movq	80(%rsp), %r15
	cmpl	$63, %edx
	jle	.L22
.L19:
	movl	4(%rbx), %edx
	btl	%eax, %edx
	jnc	.L18
	movq	%rax, 8(%rsp)
	movq	%r14, %rcx
	movq	%r13, %rdx
	movq	%rbp, %r9
	movq	328(%rbx,%rax,8), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 88
	movq	%r12, %rsi
	pushq	%r15
	.cfi_def_cfa_offset 96
	movq	%r8, 16(%rsp)
	call	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
	popq	%rdx
	.cfi_def_cfa_offset 88
	popq	%rcx
	.cfi_def_cfa_offset 80
	movq	8(%rsp), %rax
	movq	(%rsp), %r8
.L18:
	incq	%rax
	cmpq	$8, %rax
	jne	.L19
	jmp	.L16
.L22:
	movss	.LC1(%rip), %xmm4
.L17:
	cmpl	%eax, %edx
	jle	.L28
	movslq	8(%rbx,%rax,4), %rcx
	movss	264(%rbx), %xmm2
	incq	%rax
	movss	268(%rbx), %xmm1
	movss	272(%rbx), %xmm0
	subss	(%r12,%rcx,4), %xmm2
	subss	0(%r13,%rcx,4), %xmm1
	subss	(%r14,%rcx,4), %xmm0
	leaq	(%r8,%rcx,4), %rcx
	movss	280(%rbx), %xmm3
	addss	(%rcx), %xmm3
	movss	%xmm3, 280(%rbx)
	movss	(%rcx), %xmm3
	mulss	%xmm2, %xmm3
	addss	284(%rbx), %xmm3
	movss	%xmm3, 284(%rbx)
	movss	(%rcx), %xmm3
	mulss	%xmm1, %xmm3
	addss	288(%rbx), %xmm3
	movss	%xmm3, 288(%rbx)
	movss	(%rcx), %xmm3
	mulss	%xmm0, %xmm3
	addss	292(%rbx), %xmm3
	movss	%xmm3, 292(%rbx)
	movss	(%rcx), %xmm3
	mulss	%xmm2, %xmm3
	mulss	%xmm2, %xmm3
	mulss	%xmm4, %xmm3
	addss	296(%rbx), %xmm3
	movss	%xmm3, 296(%rbx)
	movss	(%rcx), %xmm3
	mulss	%xmm1, %xmm3
	mulss	%xmm1, %xmm3
	mulss	%xmm4, %xmm3
	addss	300(%rbx), %xmm3
	movss	%xmm3, 300(%rbx)
	movss	(%rcx), %xmm3
	mulss	%xmm0, %xmm3
	mulss	%xmm0, %xmm3
	mulss	%xmm4, %xmm3
	addss	304(%rbx), %xmm3
	movss	%xmm3, 304(%rbx)
	movss	(%rcx), %xmm3
	mulss	%xmm2, %xmm3
	mulss	%xmm1, %xmm3
	mulss	%xmm4, %xmm3
	addss	308(%rbx), %xmm3
	movss	%xmm3, 308(%rbx)
	mulss	(%rcx), %xmm1
	mulss	%xmm0, %xmm1
	mulss	%xmm4, %xmm1
	addss	312(%rbx), %xmm1
	movss	%xmm1, 312(%rbx)
	mulss	(%rcx), %xmm0
	mulss	%xmm2, %xmm0
	mulss	%xmm4, %xmm0
	addss	316(%rbx), %xmm0
	movss	%xmm0, 316(%rbx)
	jmp	.L17
.L28:
	movslq	(%r15), %rdx
	movq	%rdx, %rax
	movq	%rbx, 0(%rbp,%rdx,8)
	incl	%eax
	movl	%eax, (%r15)
.L16:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri, .-_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
	.globl	_Z11upwardSweepP4cellS0_
	.type	_Z11upwardSweepP4cellS0_, @function
_Z11upwardSweepP4cellS0_:
.LFB2033:
	.cfi_startproc
	endbr64
	movss	280(%rsi), %xmm0
	addss	280(%rdi), %xmm0
	movss	264(%rsi), %xmm1
	movss	268(%rsi), %xmm2
	subss	264(%rdi), %xmm1
	subss	268(%rdi), %xmm2
	movss	272(%rsi), %xmm6
	subss	272(%rdi), %xmm6
	movss	%xmm0, 280(%rsi)
	movss	280(%rdi), %xmm5
	movss	.LC1(%rip), %xmm4
	movaps	%xmm1, %xmm7
	mulss	%xmm1, %xmm7
	movaps	%xmm5, %xmm0
	movaps	%xmm6, %xmm9
	mulss	%xmm1, %xmm0
	addss	284(%rdi), %xmm0
	addss	284(%rsi), %xmm0
	mulss	%xmm6, %xmm9
	movss	%xmm0, 284(%rsi)
	mulss	%xmm5, %xmm7
	movaps	%xmm5, %xmm0
	mulss	%xmm2, %xmm0
	addss	288(%rdi), %xmm0
	addss	288(%rsi), %xmm0
	mulss	%xmm5, %xmm9
	movss	%xmm0, 288(%rsi)
	mulss	%xmm4, %xmm7
	movaps	%xmm5, %xmm0
	movss	288(%rdi), %xmm8
	mulss	%xmm6, %xmm0
	addss	292(%rdi), %xmm0
	addss	292(%rsi), %xmm0
	mulss	%xmm4, %xmm9
	movss	%xmm0, 292(%rsi)
	movss	284(%rdi), %xmm0
	movaps	%xmm0, %xmm3
	mulss	%xmm1, %xmm3
	addss	296(%rdi), %xmm3
	addss	%xmm7, %xmm3
	movaps	%xmm2, %xmm7
	addss	296(%rsi), %xmm3
	mulss	%xmm2, %xmm7
	movss	%xmm3, 296(%rsi)
	movaps	%xmm8, %xmm3
	mulss	%xmm2, %xmm3
	addss	300(%rdi), %xmm3
	mulss	%xmm5, %xmm7
	mulss	%xmm4, %xmm7
	addss	%xmm7, %xmm3
	addss	300(%rsi), %xmm3
	movss	292(%rdi), %xmm7
	movss	%xmm3, 300(%rsi)
	movaps	%xmm7, %xmm3
	mulss	%xmm6, %xmm3
	addss	304(%rdi), %xmm3
	addss	%xmm9, %xmm3
	addss	304(%rsi), %xmm3
	movaps	%xmm0, %xmm9
	mulss	%xmm2, %xmm9
	mulss	%xmm6, %xmm0
	movss	%xmm3, 304(%rsi)
	movaps	%xmm8, %xmm3
	mulss	%xmm1, %xmm3
	mulss	%xmm6, %xmm8
	addss	%xmm9, %xmm3
	movaps	%xmm1, %xmm9
	mulss	%xmm2, %xmm9
	mulss	%xmm5, %xmm9
	addss	%xmm9, %xmm3
	mulss	%xmm4, %xmm3
	addss	308(%rdi), %xmm3
	addss	308(%rsi), %xmm3
	movss	%xmm3, 308(%rsi)
	movaps	%xmm7, %xmm3
	mulss	%xmm2, %xmm3
	mulss	%xmm1, %xmm7
	mulss	%xmm6, %xmm2
	mulss	%xmm6, %xmm1
	addss	%xmm8, %xmm3
	addss	%xmm7, %xmm0
	mulss	%xmm5, %xmm2
	mulss	%xmm5, %xmm1
	addss	%xmm2, %xmm3
	addss	%xmm1, %xmm0
	mulss	%xmm4, %xmm3
	mulss	%xmm4, %xmm0
	addss	312(%rdi), %xmm3
	addss	312(%rsi), %xmm3
	addss	316(%rdi), %xmm0
	addss	316(%rsi), %xmm0
	movss	%xmm3, 312(%rsi)
	movss	%xmm0, 316(%rsi)
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z11upwardSweepP4cellS0_, .-_Z11upwardSweepP4cellS0_
	.globl	_Z6prevalP4cellS0_RiS1_
	.type	_Z6prevalP4cellS0_RiS1_, @function
_Z6prevalP4cellS0_RiS1_:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%r8
	.cfi_def_cfa_offset 64
	movl	(%rsi), %eax
	cmpl	$63, %eax
	jle	.L31
	movq	%rdi, %rbx
	movq	%rsi, %r13
	movq	%rdx, %r14
	xorl	%r12d, %r12d
.L35:
	movl	4(%r13), %eax
	btl	%r12d, %eax
	jnc	.L32
	movq	328(%r13,%r12,8), %r15
	movss	264(%rbx), %xmm0
	movss	268(%rbx), %xmm2
	movss	272(%rbx), %xmm1
	subss	264(%r15), %xmm0
	subss	268(%r15), %xmm2
	subss	272(%r15), %xmm1
	mulss	%xmm2, %xmm2
	mulss	%xmm0, %xmm0
	mulss	%xmm1, %xmm1
	addss	%xmm2, %xmm0
	addss	%xmm1, %xmm0
	call	sqrtf@PLT
	mulss	.LC2(%rip), %xmm0
	movss	276(%rbx), %xmm1
	addss	276(%r15), %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L42
	movq	%rbp, %rcx
	movq	%r14, %rdx
	movq	%r15, %rsi
	movq	%rbx, %rdi
	call	_Z6prevalP4cellS0_RiS1_
	jmp	.L32
.L42:
	addl	$13, (%r14)
.L32:
	incq	%r12
	cmpq	$8, %r12
	jne	.L35
	jmp	.L30
.L31:
	addl	%eax, (%rcx)
.L30:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z6prevalP4cellS0_RiS1_, .-_Z6prevalP4cellS0_RiS1_
	.globl	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP6float4S2_S1_
	.type	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP6float4S2_S1_, @function
_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP6float4S2_S1_:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	cmpl	$63, (%rsi)
	movq	128(%rsp), %r12
	jle	.L53
	movq	%rdi, %r14
	xorl	%r13d, %r13d
.L50:
	movl	4(%r15), %edx
	btl	%r13d, %edx
	jnc	.L46
	movq	328(%r15,%r13,8), %rsi
	movq	%r9, 24(%rsp)
	movss	264(%r14), %xmm0
	movq	%r8, 16(%rsp)
	movss	264(%rsi), %xmm3
	movq	%rsi, (%rsp)
	movss	268(%r14), %xmm2
	subss	268(%rsi), %xmm2
	subss	%xmm3, %xmm0
	movss	%xmm3, 8(%rsp)
	movss	272(%r14), %xmm1
	subss	272(%rsi), %xmm1
	mulss	%xmm2, %xmm2
	mulss	%xmm0, %xmm0
	mulss	%xmm1, %xmm1
	addss	%xmm2, %xmm0
	addss	%xmm1, %xmm0
	call	sqrtf@PLT
	movq	(%rsp), %rsi
	movss	8(%rsp), %xmm3
	mulss	.LC2(%rip), %xmm0
	movq	16(%rsp), %r8
	movss	276(%r14), %xmm1
	movq	24(%rsp), %r9
	addss	276(%rsi), %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L60
	pushq	%rax
	.cfi_def_cfa_offset 104
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movq	%r14, %rdi
	pushq	%r12
	.cfi_def_cfa_offset 112
	pushq	136(%rsp)
	.cfi_def_cfa_offset 120
	pushq	136(%rsp)
	.cfi_def_cfa_offset 128
	pushq	136(%rsp)
	.cfi_def_cfa_offset 136
	pushq	136(%rsp)
	.cfi_def_cfa_offset 144
	movq	%r9, 56(%rsp)
	movq	%r8, 48(%rsp)
	call	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP6float4S2_S1_
	addq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	(%rsp), %r8
	movq	8(%rsp), %r9
	jmp	.L46
.L60:
	movq	120(%rsp), %rax
	movl	(%rax), %ecx
	imull	$13, %ecx, %edx
	movslq	%edx, %rdx
	leaq	(%r12,%rdx,4), %r11
	incq	%rdx
	movss	%xmm3, (%r11)
	movss	268(%rsi), %xmm0
	movss	%xmm0, (%r12,%rdx,4)
	movss	272(%rsi), %xmm0
	movss	%xmm0, 4(%r12,%rdx,4)
	xorl	%edx, %edx
.L49:
	movss	280(%rsi,%rdx), %xmm0
	movss	%xmm0, 12(%r11,%rdx)
	addq	$4, %rdx
	cmpq	$40, %rdx
	jne	.L49
	movq	120(%rsp), %rax
	incl	%ecx
	movl	%ecx, (%rax)
.L46:
	incq	%r13
	cmpq	$8, %r13
	jne	.L50
	jmp	.L44
.L53:
	xorl	%ecx, %ecx
.L45:
	cmpl	%ecx, (%r15)
	jle	.L44
	movq	104(%rsp), %rax
	movslq	8(%r15,%rcx,4), %rdi
	incq	%rcx
	movslq	(%rax), %rdx
	movss	(%rbx,%rdi,4), %xmm0
	movq	%rdx, %rsi
	salq	$4, %rdx
	addq	112(%rsp), %rdx
	movss	%xmm0, (%rdx)
	movss	0(%rbp,%rdi,4), %xmm0
	incl	%esi
	movss	%xmm0, 4(%rdx)
	movss	(%r8,%rdi,4), %xmm0
	movss	%xmm0, 8(%rdx)
	movss	(%r9,%rdi,4), %xmm0
	movss	%xmm0, 12(%rdx)
	movl	%esi, (%rax)
	jmp	.L45
.L44:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP6float4S2_S1_, .-_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP6float4S2_S1_
	.globl	_Z34__device_stub__Z6directP6float4S0_P6float4S0_
	.type	_Z34__device_stub__Z6directP6float4S0_P6float4S0_, @function
_Z34__device_stub__Z6directP6float4S0_P6float4S0_:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6directP6float4S0_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L62:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z34__device_stub__Z6directP6float4S0_P6float4S0_, .-_Z34__device_stub__Z6directP6float4S0_P6float4S0_
	.globl	_Z6directP6float4S0_
	.type	_Z6directP6float4S0_, @function
_Z6directP6float4S0_:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z6directP6float4S0_P6float4S0_
	.cfi_endproc
.LFE2062:
	.size	_Z6directP6float4S0_, .-_Z6directP6float4S0_
	.globl	_Z40__device_stub__Z6kernelPiP6float4S_PfS1_PiP6float4S_PfS1_
	.type	_Z40__device_stub__Z6kernelPiP6float4S_PfS1_PiP6float4S_PfS1_, @function
_Z40__device_stub__Z6kernelPiP6float4S_PfS1_PiP6float4S_PfS1_:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z6kernelPiP6float4S_PfS1_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L67:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L69
	call	__stack_chk_fail@PLT
.L69:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z40__device_stub__Z6kernelPiP6float4S_PfS1_PiP6float4S_PfS1_, .-_Z40__device_stub__Z6kernelPiP6float4S_PfS1_PiP6float4S_PfS1_
	.globl	_Z6kernelPiP6float4S_PfS1_
	.type	_Z6kernelPiP6float4S_PfS1_, @function
_Z6kernelPiP6float4S_PfS1_:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z6kernelPiP6float4S_PfS1_PiP6float4S_PfS1_
	.cfi_endproc
.LFE2064:
	.size	_Z6kernelPiP6float4S_PfS1_, .-_Z6kernelPiP6float4S_PfS1_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"%d %d\n"
.LC7:
	.string	"buffer: %lf\n"
.LC8:
	.string	"memcpy: %lf\n"
.LC9:
	.string	"kernel: %lf\n"
.LC10:
	.string	"direct: %lf\n"
.LC11:
	.string	"error : %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4000000, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	%rax, 32(%rsp)
.L73:
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	mulsd	.LC4(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r12,%r13)
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	mulsd	.LC4(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 0(%rbp,%r13)
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	mulsd	.LC4(%rip), %xmm0
	movq	24(%rsp), %rax
	movl	$0x358637bd, (%rax,%r13)
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r13)
	addq	$4, %r13
	cmpq	$4000000, %r13
	jne	.L73
	movl	$392000000, %edi
	xorl	%r14d, %r14d
	call	malloc@PLT
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	_Z10initializeP4cell
	movq	(%rsp), %rcx
	movabsq	$4539628425446424576, %rax
	movq	%rax, 264(%rcx)
	movq	%rax, 272(%rcx)
	leaq	128(%rsp), %rax
	movq	%rcx, 128(%rsp)
	movq	%rax, 8(%rsp)
.L74:
	movq	(%rsp), %r11
	movl	%r14d, %r13d
.L79:
	movslq	(%r11), %rax
	leal	1(%rax), %edx
	movl	%edx, (%r11)
	cmpl	$63, %eax
	jle	.L101
	movss	0(%rbp,%r14,4), %xmm0
	xorl	%edx, %edx
	comiss	268(%r11), %xmm0
	movss	(%r12,%r14,4), %xmm0
	seta	%dl
	xorl	%eax, %eax
	comiss	264(%r11), %xmm0
	movss	(%rbx,%r14,4), %xmm0
	seta	%al
	leal	(%rax,%rdx,2), %eax
	xorl	%edx, %edx
	comiss	272(%r11), %xmm0
	seta	%dl
	leal	(%rax,%rdx,4), %r15d
	movl	4(%r11), %eax
	btl	%r15d, %eax
	jc	.L75
	movq	8(%rsp), %rdx
	movq	%r11, %rsi
	movl	%r15d, %edi
	call	_Z9add_childiP4cellRS0_
.L75:
	movslq	%r15d, %r15
	movq	328(%r11,%r15,8), %r11
	jmp	.L79
.L101:
	movl	%r13d, 8(%r11,%rax,4)
	cmpl	$64, %edx
	jne	.L77
	movq	8(%rsp), %r8
	movq	%r11, %rcx
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	_Z10split_cellPfS_S_P4cellRS1_
.L77:
	incq	%r14
	cmpq	$1000000, %r14
	jne	.L74
	movl	$8000000, %edi
	xorl	%esi, %esi
	movl	%esi, 108(%rsp)
	call	malloc@PLT
	movq	%rbx, %rcx
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movq	%rax, 40(%rsp)
	pushq	%rdi
	.cfi_def_cfa_offset 280
	leaq	116(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 288
	movq	56(%rsp), %r9
	movq	40(%rsp), %r8
	movq	16(%rsp), %rdi
	call	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
	movq	144(%rsp), %rax
	popq	%r8
	.cfi_def_cfa_offset 280
	popq	%r9
	.cfi_def_cfa_offset 272
.L80:
	movq	(%rsp), %rcx
	cmpq	%rcx, %rax
	je	.L102
	movq	320(%rax), %rsi
	movq	%rax, %rdi
	subq	$392, %rax
	call	_Z11upwardSweepP4cellS0_
	jmp	.L80
.L102:
	movl	108(%rsp), %r15d
	xorl	%ecx, %ecx
	xorl	%r13d, %r13d
	movl	%ecx, 112(%rsp)
	movl	%r15d, %eax
	movl	%ecx, 116(%rsp)
	leal	1(%r15), %r14d
	sall	$6, %eax
	movl	%eax, 16(%rsp)
	leaq	116(%rsp), %rax
	movq	%rax, 8(%rsp)
.L82:
	cmpl	%r13d, %r15d
	jle	.L103
	movq	40(%rsp), %rax
	movq	8(%rsp), %rcx
	leaq	112(%rsp), %rdx
	movq	(%rsp), %rsi
	movq	(%rax,%r13,8), %rdi
	incq	%r13
	call	_Z6prevalP4cellS0_RiS1_
	jmp	.L82
.L103:
	movl	116(%rsp), %ecx
	movl	16(%rsp), %edx
	movl	$2, %edi
	movslq	%r14d, %r14
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	0(,%r14,4), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 48(%rsp)
	call	malloc@PLT
	movslq	116(%rsp), %rdi
	movq	%rax, 56(%rsp)
	salq	$4, %rdi
	call	malloc@PLT
	movslq	16(%rsp), %r13
	movq	%rax, %r14
	salq	$4, %r13
	movq	%r13, %rdi
	movq	%r13, 16(%rsp)
	call	malloc@PLT
	movslq	112(%rsp), %rdi
	movq	%rax, %r13
	salq	$2, %rdi
	call	malloc@PLT
	movq	8(%rsp), %rsi
	leaq	136(%rsp), %rdi
	movq	%rax, 64(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	144(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	116(%rsp), %rsi
	leaq	152(%rsp), %rdi
	salq	$4, %rsi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	leaq	160(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	112(%rsp), %rsi
	leaq	168(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	xorl	%eax, %eax
	xorl	%edx, %edx
	movl	$1000000, %ecx
	movl	%edx, 120(%rsp)
	rep stosl
	movl	%edx, 124(%rsp)
	call	_Z8get_timev
	xorl	%r10d, %r10d
	leaq	124(%rsp), %r11
	movsd	%xmm0, 72(%rsp)
.L84:
	cmpl	%r10d, 108(%rsp)
	jle	.L104
	movq	40(%rsp), %rax
	movq	48(%rsp), %rcx
	xorl	%edx, %edx
	movq	(%rax,%r10,8), %rdi
	movl	120(%rsp), %eax
	movl	%eax, (%rcx,%r10,4)
	movl	124(%rsp), %eax
	movq	56(%rsp), %rcx
	movl	%eax, (%rcx,%r10,4)
	movl	%r10d, %eax
	movl	(%rdi), %ecx
	sall	$6, %eax
	cltq
	salq	$4, %rax
	addq	%r13, %rax
.L85:
	cmpl	%edx, %ecx
	jle	.L105
	movslq	8(%rdi,%rdx,4), %rsi
	movq	24(%rsp), %r9
	incq	%rdx
	addq	$16, %rax
	movss	(%r12,%rsi,4), %xmm0
	movss	%xmm0, -16(%rax)
	movss	0(%rbp,%rsi,4), %xmm0
	movss	%xmm0, -12(%rax)
	movss	(%rbx,%rsi,4), %xmm0
	movss	%xmm0, -8(%rax)
	movss	(%r9,%rsi,4), %xmm0
	movss	%xmm0, -4(%rax)
	jmp	.L85
.L105:
	movq	%r10, 88(%rsp)
	movq	%rbx, %r8
	movq	%rbp, %rcx
	movq	%r12, %rdx
	pushq	%rax
	.cfi_def_cfa_offset 280
	pushq	72(%rsp)
	.cfi_def_cfa_offset 288
	pushq	%r11
	.cfi_def_cfa_offset 296
	movq	%r11, 104(%rsp)
	pushq	%r14
	.cfi_def_cfa_offset 304
	leaq	152(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 312
	pushq	72(%rsp)
	.cfi_def_cfa_offset 320
	movq	72(%rsp), %r9
	movq	48(%rsp), %rsi
	call	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP6float4S2_S1_
	movq	136(%rsp), %r10
	addq	$48, %rsp
	.cfi_def_cfa_offset 272
	movq	80(%rsp), %r11
	incq	%r10
	jmp	.L84
.L104:
	call	_Z8get_timev
	subsd	72(%rsp), %xmm0
	leaq	.LC7(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movslq	108(%rsp), %rax
	movl	120(%rsp), %edx
	movq	48(%rsp), %rcx
	movl	%edx, (%rcx,%rax,4)
	movl	124(%rsp), %edx
	movq	56(%rsp), %rcx
	movl	%edx, (%rcx,%rax,4)
	call	_Z8get_timev
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	136(%rsp), %rdi
	movsd	%xmm0, (%rsp)
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movq	144(%rsp), %rdi
	call	cudaMemcpy@PLT
	movslq	116(%rsp), %rdx
	movl	$1, %ecx
	movq	%r14, %rsi
	movq	152(%rsp), %rdi
	salq	$4, %rdx
	call	cudaMemcpy@PLT
	movslq	112(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movq	168(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movl	$1, %ecx
	movq	%r13, %rsi
	movq	160(%rsp), %rdi
	call	cudaMemcpy@PLT
	call	_Z8get_timev
	subsd	(%rsp), %xmm0
	leaq	.LC8(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	call	_Z8get_timev
	movl	$67108865, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$6, %rdx
	movl	$1, %ecx
	movsd	%xmm0, (%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 180(%rsp)
	movl	184(%rsp), %esi
	movl	%r15d, 176(%rsp)
	movq	176(%rsp), %rdi
	movq	%rdx, 188(%rsp)
	movl	$1, 196(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L88
	movq	160(%rsp), %r8
	movq	168(%rsp), %rcx
	movq	144(%rsp), %rdx
	movq	152(%rsp), %rsi
	movq	136(%rsp), %rdi
	call	_Z40__device_stub__Z6kernelPiP6float4S_PfS1_PiP6float4S_PfS1_
.L88:
	call	_Z8get_timev
	subsd	(%rsp), %xmm0
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	16(%rsp), %rdx
	movl	$2, %ecx
	movq	%r13, %rdi
	movq	160(%rsp), %rsi
	call	cudaMemcpy@PLT
	movl	108(%rsp), %r8d
	xorl	%esi, %esi
	xorl	%edx, %edx
.L89:
	cmpl	%edx, %r8d
	jle	.L106
	movq	40(%rsp), %rax
	xorl	%ecx, %ecx
	movq	(%rax,%rdx,8), %rdi
	movslq	%esi, %rax
	salq	$4, %rax
	movl	(%rdi), %r9d
	addq	%r13, %rax
.L90:
	addq	$16, %rax
	cmpl	%ecx, %r9d
	jle	.L107
	movslq	8(%rdi,%rcx,4), %r10
	movss	-4(%rax), %xmm0
	incq	%rcx
	movq	32(%rsp), %r11
	movss	%xmm0, (%r11,%r10,4)
	jmp	.L90
.L107:
	incq	%rdx
	addl	$64, %esi
	jmp	.L89
.L106:
	xorl	%eax, %eax
.L93:
	movss	(%r12,%rax), %xmm0
	movq	24(%rsp), %rcx
	movss	%xmm0, (%r14,%rax,4)
	movss	0(%rbp,%rax), %xmm0
	movss	%xmm0, 4(%r14,%rax,4)
	movss	(%rbx,%rax), %xmm0
	movss	%xmm0, 8(%r14,%rax,4)
	movss	(%rcx,%rax), %xmm0
	movss	%xmm0, 12(%r14,%rax,4)
	addq	$4, %rax
	cmpq	$4000000, %rax
	jne	.L93
	call	_Z8get_timev
	movq	16(%rsp), %rdx
	movl	$1, %ecx
	movq	%r14, %rsi
	movq	152(%rsp), %rdi
	movsd	%xmm0, (%rsp)
	call	cudaMemcpy@PLT
	movl	$67108865, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$6, %rdx
	movl	$1, %ecx
	movl	%r15d, 176(%rsp)
	movq	%rax, 180(%rsp)
	movq	176(%rsp), %rdi
	movl	184(%rsp), %esi
	movq	%rdx, 188(%rsp)
	movl	$1, 196(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L94
	movq	160(%rsp), %rsi
	movq	152(%rsp), %rdi
	call	_Z34__device_stub__Z6directP6float4S0_P6float4S0_
.L94:
	movq	16(%rsp), %rdx
	movq	160(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	call	_Z8get_timev
	subsd	(%rsp), %xmm0
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	xorps	%xmm3, %xmm3
	xorl	%eax, %eax
	movaps	%xmm3, %xmm0
.L95:
	movq	%rax, %rdx
	movq	32(%rsp), %rbx
	salq	$4, %rdx
	movss	12(%r13,%rdx), %xmm1
	movaps	%xmm1, %xmm2
	subss	(%rbx,%rax,4), %xmm2
	incq	%rax
	mulss	%xmm1, %xmm1
	mulss	%xmm2, %xmm2
	addss	%xmm1, %xmm3
	addss	%xmm2, %xmm0
	cmpq	$1000000, %rax
	jne	.L95
	divss	%xmm3, %xmm0
	call	sqrtf@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L96
	call	__stack_chk_fail@PLT
.L96:
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z6kernelPiP6float4S_PfS1_"
.LC13:
	.string	"_Z6directP6float4S0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2066:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6kernelPiP6float4S_PfS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6directP6float4S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2066:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1056964608
	.align 4
.LC2:
	.long	1061997773
	.section	.rodata.cst8
	.align 8
.LC4:
	.long	0
	.long	1040187392
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <sys/time.h>

double get_time() {
  struct timeval tv;
  hipDeviceSynchronize();
  gettimeofday(&tv, NULL);
  return double(tv.tv_sec+tv.tv_usec*1e-6);
}

int   const N       = 1000000;
int   const THREADS = 64;
int   const NCRIT   = THREADS;
float const THETA   = 0.8;
float const EPS2    = 0.0001;

__global__ void direct(float4 *sourceGlob, float4 *targetGlob) {
  float3 d; 
  __shared__ float4 sourceShrd[THREADS];
  float4 target = sourceGlob[blockIdx.x * THREADS + threadIdx.x];
  target.w *= -rsqrtf(EPS2);
  for( int iblok=0; iblok<(N-1)/THREADS; iblok++) {
    __syncthreads();
    sourceShrd[threadIdx.x] = sourceGlob[iblok * THREADS + threadIdx.x];
    __syncthreads();
    for( int i=0; i<THREADS; i++ ) {
      d.x = target.x - sourceShrd[i].x;
      d.y = target.y - sourceShrd[i].y;
      d.z = target.z - sourceShrd[i].z;
      target.w += sourceShrd[i].w * rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z + EPS2);
    }
  } 
  int iblok = (N-1)/THREADS;
  __syncthreads();
  sourceShrd[threadIdx.x] = sourceGlob[iblok * THREADS + threadIdx.x];
  __syncthreads();
  for( int i=0; i<N - (iblok * THREADS); i++ ) {
    d.x = target.x - sourceShrd[i].x;
    d.y = target.y - sourceShrd[i].y;
    d.z = target.z - sourceShrd[i].z;
    target.w += sourceShrd[i].w * rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z + EPS2);
  }
  targetGlob[blockIdx.x * THREADS + threadIdx.x] = target;
} 

__device__ void multipole(int i, float4 &target, float *multipShrd) {
  float R,R3,R5;
  float3 d;
  d.x = target.x - multipShrd[i*13+0];
  d.y = target.y - multipShrd[i*13+1];
  d.z = target.z - multipShrd[i*13+2];
  R = rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z);
  R3 = R * R * R;
  R5 = R3 * R * R;
  target.w += multipShrd[i*13+ 3] * R;
  target.w += multipShrd[i*13+ 4] * (-d.x * R3);
  target.w += multipShrd[i*13+ 5] * (-d.y * R3);
  target.w += multipShrd[i*13+ 6] * (-d.z * R3);
  target.w += multipShrd[i*13+ 7] * (3 * d.x * d.x * R5 - 1 * R3);
  target.w += multipShrd[i*13+ 8] * (3 * d.y * d.y * R5 - 1 * R3);
  target.w += multipShrd[i*13+ 9] * (3 * d.z * d.z * R5 - 1 * R3);
  target.w += multipShrd[i*13+10] * (3 * d.x * d.y * R5);
  target.w += multipShrd[i*13+11] * (3 * d.y * d.z * R5);
  target.w += multipShrd[i*13+12] * (3 * d.z * d.x * R5);
}

__global__ void kernel(int *offSrcGlob, float4 *sourceGlob, int *offMtpGlob, float *multipGlob, float4 *targetGlob) {
  int N = offSrcGlob[blockIdx.x+1]-offSrcGlob[blockIdx.x];
  int offset = offSrcGlob[blockIdx.x];
  float3 d;
  __shared__ float4 sourceShrd[THREADS];
  __shared__ float  multipShrd[13*THREADS];
  float4 target = targetGlob[blockIdx.x * THREADS + threadIdx.x];
  target.w *= -rsqrtf(EPS2);
  for( int iblok=0; iblok<(N-1)/THREADS; iblok++) {
    __syncthreads();
    sourceShrd[threadIdx.x] = sourceGlob[offset + iblok * THREADS + threadIdx.x];
    __syncthreads();
    for( int i=0; i<THREADS; i++ ) {
      d.x = target.x - sourceShrd[i].x;
      d.y = target.y - sourceShrd[i].y;
      d.z = target.z - sourceShrd[i].z;
      target.w += sourceShrd[i].w * rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z + EPS2);
    }
  }
  int iblok = (N-1)/THREADS;
  __syncthreads();
  sourceShrd[threadIdx.x] = sourceGlob[offset + iblok * THREADS + threadIdx.x];
  __syncthreads();
  for( int i=0; i<N - (iblok * THREADS); i++ ) {
    d.x = target.x - sourceShrd[i].x;
    d.y = target.y - sourceShrd[i].y;
    d.z = target.z - sourceShrd[i].z;
    target.w += sourceShrd[i].w * rsqrtf(d.x * d.x + d.y * d.y + d.z * d.z + EPS2);
  }
  N = offMtpGlob[blockIdx.x+1]-offMtpGlob[blockIdx.x];
  offset = offMtpGlob[blockIdx.x];
  for( int iblok=0; iblok<(N-1)/THREADS; iblok++) {
    int index = offset + iblok * THREADS + threadIdx.x;
    __syncthreads();
    for( int i=0; i<13; i++ )
      multipShrd[threadIdx.x*13+i] = multipGlob[index*13+i];
    __syncthreads();
    for( int i=0; i<THREADS; i++ ) {
      multipole(i,target,multipShrd);
    }
  }
  iblok = (N-1)/THREADS;
  int index = offset + iblok * THREADS + threadIdx.x;
  __syncthreads();
  for( int i=0; i<13; i++ )
    multipShrd[threadIdx.x*13+i] = multipGlob[index*13+i];
  __syncthreads();
  for( int i=0; i<N - (iblok * THREADS); i++ ) {
    multipole(i,target,multipShrd);
  }
  targetGlob[blockIdx.x * THREADS + threadIdx.x] = target;
}

struct cell {
  int nleaf,nchild,leaf[NCRIT];
  float xc,yc,zc,r;
  float multipole[10];
  cell *parent,*child[8];
};

void initialize(cell *C) {
  C->nleaf = C->nchild = 0;
  C->parent = NULL;
  for( int i=0; i<8; i++ ) C->child[i] = NULL;
  for( int i=0; i<10; i++ ) C->multipole[i] = 0;
}

void add_child(int octant, cell *C, cell *&CN) {
  ++CN;
  initialize(CN);
  CN->r  = C->r/2;
  CN->xc = C->xc+CN->r*((octant&1)*2-1);
  CN->yc = C->yc+CN->r*((octant&2)-1);
  CN->zc = C->zc+CN->r*((octant&4)/2-1);
  CN->parent = C;
  C->child[octant] = CN;
  C->nchild |= (1 << octant);
}

void split_cell(float *x, float *y, float *z, cell *C, cell *&CN) {
  for( int i=0; i<NCRIT; i++ ) {                             
    int l = C->leaf[i];
    int octant = (x[l] > C->xc) + ((y[l] > C->yc) << 1) + ((z[l] > C->zc) << 2);
    if( !(C->nchild & (1 << octant)) ) add_child(octant,C,CN);
    cell *CC = C->child[octant];
    CC->leaf[CC->nleaf++] = l;
    if( CC->nleaf >= NCRIT ) split_cell(x,y,z,CC,CN);
  } 
}

void getMultipole(cell *C, float *x, float *y, float *z, float *m, cell **twig, int &ntwig) {
  float dx,dy,dz;
  if( C->nleaf >= NCRIT ) {
    for( int c=0; c<8; c++ )
      if( C->nchild & (1 << c) ) getMultipole(C->child[c],x,y,z,m,twig,ntwig);
  } else {
    for( int l=0; l<C->nleaf; l++ ) {
      int j = C->leaf[l];
      dx = C->xc-x[j];
      dy = C->yc-y[j];
      dz = C->zc-z[j];
      C->multipole[0] += m[j];
      C->multipole[1] += m[j]*dx;
      C->multipole[2] += m[j]*dy;
      C->multipole[3] += m[j]*dz;
      C->multipole[4] += m[j]*dx*dx/2;
      C->multipole[5] += m[j]*dy*dy/2;
      C->multipole[6] += m[j]*dz*dz/2;
      C->multipole[7] += m[j]*dx*dy/2;
      C->multipole[8] += m[j]*dy*dz/2;
      C->multipole[9] += m[j]*dz*dx/2;
    }
    twig[ntwig] = C;
    ntwig++;
  }
}

void upwardSweep(cell *C, cell *P) {
  float dx,dy,dz;
  dx = P->xc-C->xc;
  dy = P->yc-C->yc;
  dz = P->zc-C->zc;
  P->multipole[0] += C->multipole[0];
  P->multipole[1] += C->multipole[1]+ dx*C->multipole[0];
  P->multipole[2] += C->multipole[2]+ dy*C->multipole[0];
  P->multipole[3] += C->multipole[3]+ dz*C->multipole[0];
  P->multipole[4] += C->multipole[4]+ dx*C->multipole[1]+dx*dx*C->multipole[0]/2;
  P->multipole[5] += C->multipole[5]+ dy*C->multipole[2]+dy*dy*C->multipole[0]/2;
  P->multipole[6] += C->multipole[6]+ dz*C->multipole[3]+dz*dz*C->multipole[0]/2;
  P->multipole[7] += C->multipole[7]+(dx*C->multipole[2]+   dy*C->multipole[1]+dx*dy*C->multipole[0])/2;
  P->multipole[8] += C->multipole[8]+(dy*C->multipole[3]+   dz*C->multipole[2]+dy*dz*C->multipole[0])/2;
  P->multipole[9] += C->multipole[9]+(dz*C->multipole[1]+   dx*C->multipole[3]+dz*dx*C->multipole[0])/2;
}

void preval(cell *CI, cell *CJ, int &nmtp, int &nsrc) {
  float dx,dy,dz,r;
  if( CJ->nleaf >= NCRIT ) {
    for( int c=0; c<8; c++ ) {
      if( CJ->nchild & (1 << c) ) {
        cell *CC = CJ->child[c];
        dx = CI->xc-CC->xc;
        dy = CI->yc-CC->yc;
        dz = CI->zc-CC->zc;
        r = sqrtf(dx*dx+dy*dy+dz*dz);
        if( CI->r+CC->r > THETA*r ) {
          preval(CI,CC,nmtp,nsrc);
        } else {
          nmtp += 13;
        }
      }
    }
  } else
    nsrc += CJ->nleaf;
}

void evaluate(cell *CI, cell *CJ, float *x, float *y, float *z, float *m, float *p,
              int &offSrc, float4 *sourceHost, int &offMtp, float *multipHost) {
  float dx,dy,dz,r;
  if( CJ->nleaf >= NCRIT ) {
    for( int c=0; c<8; c++ ) {
      if( CJ->nchild & (1 << c) ) {
        cell *CC = CJ->child[c];
        dx = CI->xc-CC->xc;
        dy = CI->yc-CC->yc;
        dz = CI->zc-CC->zc;
        r = sqrtf(dx*dx+dy*dy+dz*dz);
        if( CI->r+CC->r > THETA*r ) {
          evaluate(CI,CC,x,y,z,m,p,offSrc,sourceHost,offMtp,multipHost);
        } else {
          multipHost[offMtp*13+ 0] = CC->xc;
          multipHost[offMtp*13+ 1] = CC->yc;
          multipHost[offMtp*13+ 2] = CC->zc;
          for( int i=0; i<10; i++ )
            multipHost[offMtp*13+ i + 3] = CC->multipole[i];
          offMtp++;
        }
      }
    }
  } else {
    for( int lj=0; lj<CJ->nleaf; lj++ ) {
      int j = CJ->leaf[lj];
      sourceHost[offSrc].x = x[j];
      sourceHost[offSrc].y = y[j];
      sourceHost[offSrc].z = z[j];
      sourceHost[offSrc].w = m[j];
      offSrc++;
    }
  }
}

int main() {
  float *x,*y,*z,*m,*p,*pd;
  double tic,toc;
  x  = (float*)malloc(N*sizeof(float));
  y  = (float*)malloc(N*sizeof(float));
  z  = (float*)malloc(N*sizeof(float));
  m  = (float*)malloc(N*sizeof(float));
  p  = (float*)malloc(N*sizeof(float));
  pd = (float*)malloc(N*sizeof(float));
// Initialize
  for( int i=0; i<N; i++ ) {
    x[i] = rand()/(1.+RAND_MAX);
    y[i] = rand()/(1.+RAND_MAX);
    z[i] = rand()/(1.+RAND_MAX);
    m[i] = 1.0/N;
  }
// Direct summation
/*
  float dx,dy,dz,r;
  for( int i=0; i<N; i++ ) {
    float pp = - m[i] / sqrtf(EPS2);
    for( int j=0; j<N; j++ ) {
      dx = x[i]-x[j];
      dy = y[i]-y[j];
      dz = z[i]-z[j];
      r = sqrtf(dx*dx+dy*dy+dz*dz+EPS2);
      pp += m[j] / r;
    }
    pd[i] = pp;
  }
*/
// Set root cell
  cell *C0;
  C0 = (cell*)malloc(N*sizeof(cell));
  initialize(C0);
  C0->xc = C0->yc = C0->zc = C0->r = 0.5;
// Build tree
  cell *CN = C0;
  for( int i=0; i<N; i++ ) {
    cell *C = C0;
    while( C->nleaf >= NCRIT ) {
      C->nleaf++;
      int octant = (x[i] > C->xc) + ((y[i] > C->yc) << 1) + ((z[i] > C->zc) << 2);
      if( !(C->nchild & (1 << octant)) ) add_child(octant,C,CN);
      C = C->child[octant];
    }
    C->leaf[C->nleaf++] = i;
    if( C->nleaf >= NCRIT ) split_cell(x,y,z,C,CN);
  }
// Multipole expansion
  int ntwig=0;
  cell **twig;
  twig = (cell**)malloc(N*sizeof(cell*));
  getMultipole(C0,x,y,z,m,twig,ntwig);
// Upward translation
  for( cell *C=CN; C!=C0; --C ) {
    cell *P = C->parent;
    upwardSweep(C,P);
  }
// Evaluate expansion
  int Nround = ntwig * THREADS;
  int ntgt = Nround;
  int noff = ntwig + 1;
  int    *offSrcHost,*offSrcDevc;
  int    *offMtpHost,*offMtpDevc;
  float4 *sourceHost,*sourceDevc;
  float4 *targetHost,*targetDevc;
  float  *multipHost,*multipDevc;
// Allocate memory on host and device
  int nmtp = 0, nsrc = 0;
  for( int t=0; t<ntwig; t++ ) {
    cell *CI = twig[t];
    cell *CJ = C0;
    preval(CI,CJ,nmtp,nsrc);
  }
  printf("%d %d\n",ntgt,nsrc);

  offSrcHost = (int   *)     malloc( noff*sizeof(int) );
  offMtpHost = (int   *)     malloc( noff*sizeof(int) );
  sourceHost = (float4*)     malloc( nsrc*sizeof(float4) );
  targetHost = (float4*)     malloc( ntgt*sizeof(float4) );
  multipHost = (float *)     malloc( nmtp*sizeof(float ) );
  hipMalloc(  (void**) &offSrcDevc, noff*sizeof(int) );
  hipMalloc(  (void**) &offMtpDevc, noff*sizeof(int) );
  hipMalloc(  (void**) &sourceDevc, nsrc*sizeof(float4) );
  hipMalloc(  (void**) &targetDevc, ntgt*sizeof(float4) );
  hipMalloc(  (void**) &multipDevc, nmtp*sizeof(float ) );
  for( int i=0; i<N; i++ ) p[i] = 0;
  int offSrc = 0, offMtp = 0;
  tic = get_time();
  for( int t=0; t<ntwig; t++ ) {
    cell *CI = twig[t];
    cell *CJ = C0;
    offSrcHost[t] = offSrc;
    offMtpHost[t] = offMtp;
    for( int l=0; l<CI->nleaf; l++ ) {
      int i = CI->leaf[l];
      targetHost[t*THREADS+l].x = x[i];
      targetHost[t*THREADS+l].y = y[i];
      targetHost[t*THREADS+l].z = z[i];
      targetHost[t*THREADS+l].w = m[i];
    }
    evaluate(CI,CJ,x,y,z,m,p,offSrc,sourceHost,offMtp,multipHost);
  }
  toc = get_time();
  printf("buffer: %lf\n",toc-tic);
  offSrcHost[ntwig] = offSrc;
  offMtpHost[ntwig] = offMtp;
// Direct summation on device
  tic = get_time();
  hipMemcpy(offSrcDevc,offSrcHost,noff*sizeof(int),hipMemcpyHostToDevice);
  hipMemcpy(offMtpDevc,offMtpHost,noff*sizeof(int),hipMemcpyHostToDevice);
  hipMemcpy(sourceDevc,sourceHost,nsrc*sizeof(float4),hipMemcpyHostToDevice);
  hipMemcpy(multipDevc,multipHost,nmtp*sizeof(float ),hipMemcpyHostToDevice);
  hipMemcpy(targetDevc,targetHost,ntgt*sizeof(float4),hipMemcpyHostToDevice);
  toc = get_time();
  printf("memcpy: %lf\n",toc-tic);
  tic = get_time();
  kernel<<< Nround/THREADS, THREADS >>>(offSrcDevc,sourceDevc,offMtpDevc,multipDevc,targetDevc);
  toc = get_time();
  printf("kernel: %lf\n",toc-tic);
  hipMemcpy(targetHost,targetDevc,ntgt*sizeof(float4),hipMemcpyDeviceToHost);
// Compare results
  for( int t=0; t<ntwig; t++ ) {
    cell *CI = twig[t];
    for( int l=0; l<CI->nleaf; l++ ) {
      int i = CI->leaf[l];
      p[i] = targetHost[t*THREADS+l].w;
    }
  }
// Direct summation on device
  for( int i=0; i<N; i++ ) {
    sourceHost[i].x = x[i];
    sourceHost[i].y = y[i];
    sourceHost[i].z = z[i];
    sourceHost[i].w = m[i];
  }
  tic = get_time();
  hipMemcpy        (sourceDevc,sourceHost,Nround*sizeof(float4),hipMemcpyHostToDevice);
  direct<<< Nround/THREADS, THREADS >>>(sourceDevc,targetDevc);
  hipMemcpy        (targetHost,targetDevc,Nround*sizeof(float4),hipMemcpyDeviceToHost);
  toc = get_time();
  printf("direct: %lf\n",toc-tic);
// Compare results
  float err=0,rel=0;
  for( int i=0; i<N; i++ ) {
    float pp = targetHost[i].w;;
//    float pp = pd[i];
    err += (pp-p[i])*(pp-p[i]);
    rel += pp*pp;
  }
  printf("error : %f\n",sqrtf(err/rel));
}

	.text
	.file	"12steps.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8get_timev
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z8get_timev
	.type	_Z8get_timev,@function
_Z8get_timev:                           # @_Z8get_timev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	callq	hipDeviceSynchronize
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z8get_timev, .Lfunc_end0-_Z8get_timev
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_ # -- Begin function _Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_
	.type	_Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_,@function
_Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_: # @_Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6directP15HIP_vector_typeIfLj4EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_, .Lfunc_end1-_Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_ # -- Begin function _Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.type	_Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_,@function
_Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_: # @_Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_, .Lfunc_end2-_Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10initializeP4cell            # -- Begin function _Z10initializeP4cell
	.type	_Z10initializeP4cell,@function
_Z10initializeP4cell:                   # @_Z10initializeP4cell
	.cfi_startproc
# %bb.0:                                # %.preheader.preheader
	movq	$0, (%rdi)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 280(%rdi)
	movups	%xmm0, 296(%rdi)
	movups	%xmm0, 312(%rdi)
	movups	%xmm0, 328(%rdi)
	movups	%xmm0, 344(%rdi)
	movups	%xmm0, 360(%rdi)
	movups	%xmm0, 376(%rdi)
	retq
.Lfunc_end3:
	.size	_Z10initializeP4cell, .Lfunc_end3-_Z10initializeP4cell
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z9add_childiP4cellRS0_
.LCPI4_0:
	.long	0x3f000000                      # float 0.5
	.text
	.globl	_Z9add_childiP4cellRS0_
	.type	_Z9add_childiP4cellRS0_,@function
_Z9add_childiP4cellRS0_:                # @_Z9add_childiP4cellRS0_
	.cfi_startproc
# %bb.0:
	movq	(%rdx), %rax
	leaq	392(%rax), %rcx
	movq	%rcx, (%rdx)
	movq	$0, 392(%rax)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 672(%rax)
	movups	%xmm0, 688(%rax)
	movups	%xmm0, 704(%rax)
	movups	%xmm0, 720(%rax)
	movups	%xmm0, 736(%rax)
	movups	%xmm0, 752(%rax)
	movups	%xmm0, 768(%rax)
	movss	276(%rsi), %xmm0                # xmm0 = mem[0],zero,zero,zero
	mulss	.LCPI4_0(%rip), %xmm0
	movq	(%rdx), %rax
	movss	%xmm0, 276(%rax)
	movl	%edi, %ecx
	andl	$1, %ecx
	leal	-1(,%rcx,2), %ecx
	cvtsi2ss	%ecx, %xmm1
	mulss	%xmm0, %xmm1
	addss	264(%rsi), %xmm1
	movl	%edi, %ecx
	andl	$2, %ecx
	decl	%ecx
	cvtsi2ss	%ecx, %xmm2
	movss	%xmm1, 264(%rax)
	mulss	%xmm0, %xmm2
	addss	268(%rsi), %xmm2
	movslq	%edi, %rcx
	shrl	%edi
	andl	$2, %edi
	decl	%edi
	xorps	%xmm1, %xmm1
	cvtsi2ss	%edi, %xmm1
	movss	%xmm2, 268(%rax)
	mulss	%xmm0, %xmm1
	addss	272(%rsi), %xmm1
	movss	%xmm1, 272(%rax)
	movq	%rsi, 320(%rax)
	movq	(%rdx), %rax
	movl	$1, %edx
	shll	%cl, %edx
	movq	%rax, 328(%rsi,%rcx,8)
	orl	%edx, 4(%rsi)
	retq
.Lfunc_end4:
	.size	_Z9add_childiP4cellRS0_, .Lfunc_end4-_Z9add_childiP4cellRS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10split_cellPfS_S_P4cellRS1_  # -- Begin function _Z10split_cellPfS_S_P4cellRS1_
	.type	_Z10split_cellPfS_S_P4cellRS1_,@function
_Z10split_cellPfS_S_P4cellRS1_:         # @_Z10split_cellPfS_S_P4cellRS1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, 8(%rsp)                    # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	$2, %ebx
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	movslq	(%r14,%rbx,4), %r15
	movss	(%r13,%r15,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	xorl	%eax, %eax
	ucomiss	264(%r14), %xmm0
	seta	%al
	movss	(%r12,%r15,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	xorl	%ecx, %ecx
	ucomiss	268(%r14), %xmm0
	seta	%cl
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movss	(%rdx,%r15,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	xorl	%edx, %edx
	ucomiss	272(%r14), %xmm0
	seta	%dl
	leal	(%rax,%rcx,2), %eax
	leal	(%rax,%rdx,4), %ebp
	movl	4(%r14), %eax
	btl	%ebp, %eax
	jb	.LBB5_3
# %bb.2:                                #   in Loop: Header=BB5_1 Depth=1
	movl	%ebp, %edi
	movq	%r14, %rsi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	callq	_Z9add_childiP4cellRS0_
.LBB5_3:                                #   in Loop: Header=BB5_1 Depth=1
	movl	%ebp, %eax
	movq	328(%r14,%rax,8), %rcx
	movslq	(%rcx), %rax
	leal	1(%rax), %edx
	movl	%edx, (%rcx)
	movl	%r15d, 8(%rcx,%rax,4)
	cmpl	$64, (%rcx)
	jl	.LBB5_5
# %bb.4:                                #   in Loop: Header=BB5_1 Depth=1
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	8(%rsp), %r8                    # 8-byte Reload
	callq	_Z10split_cellPfS_S_P4cellRS1_
.LBB5_5:                                #   in Loop: Header=BB5_1 Depth=1
	incq	%rbx
	cmpq	$66, %rbx
	jne	.LBB5_1
# %bb.6:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z10split_cellPfS_S_P4cellRS1_, .Lfunc_end5-_Z10split_cellPfS_S_P4cellRS1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
.LCPI6_0:
	.long	0x3f000000                      # float 0.5
	.text
	.globl	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
	.type	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri,@function
_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri: # @_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r12
	movq	%rdx, %r13
	movq	%rsi, %rbp
	movq	%rdi, %r15
	movl	(%rdi), %eax
	cmpl	$63, %eax
	jle	.LBB6_1
# %bb.5:                                # %.preheader
	xorl	%ebx, %ebx
.LBB6_6:                                # =>This Inner Loop Header: Depth=1
	movl	4(%r15), %eax
	btl	%ebx, %eax
	jae	.LBB6_8
# %bb.7:                                #   in Loop: Header=BB6_6 Depth=1
	movq	328(%r15,%rbx,8), %rdi
	movq	80(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%rbp, %rsi
	movq	%r13, %rdx
	movq	%r12, %rcx
	movq	%r14, %r8
	movq	16(%rsp), %r9                   # 8-byte Reload
	callq	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
.LBB6_8:                                #   in Loop: Header=BB6_6 Depth=1
	incq	%rbx
	cmpq	$8, %rbx
	jne	.LBB6_6
	jmp	.LBB6_9
.LBB6_1:                                # %.preheader76
	testl	%eax, %eax
	jle	.LBB6_4
# %bb.2:                                # %.lr.ph
	movss	264(%r15), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movss	268(%r15), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movss	272(%r15), %xmm2                # xmm2 = mem[0],zero,zero,zero
	movss	280(%r15), %xmm3                # xmm3 = mem[0],zero,zero,zero
	movss	284(%r15), %xmm4                # xmm4 = mem[0],zero,zero,zero
	movss	288(%r15), %xmm5                # xmm5 = mem[0],zero,zero,zero
	movss	292(%r15), %xmm6                # xmm6 = mem[0],zero,zero,zero
	movss	296(%r15), %xmm7                # xmm7 = mem[0],zero,zero,zero
	movss	300(%r15), %xmm8                # xmm8 = mem[0],zero,zero,zero
	movss	304(%r15), %xmm9                # xmm9 = mem[0],zero,zero,zero
	movss	308(%r15), %xmm10               # xmm10 = mem[0],zero,zero,zero
	movss	312(%r15), %xmm11               # xmm11 = mem[0],zero,zero,zero
	movss	316(%r15), %xmm12               # xmm12 = mem[0],zero,zero,zero
	xorl	%ecx, %ecx
	movss	.LCPI6_0(%rip), %xmm13          # xmm13 = mem[0],zero,zero,zero
.LBB6_3:                                # =>This Inner Loop Header: Depth=1
	movslq	8(%r15,%rcx,4), %rdx
	movss	12(%rsp), %xmm14                # 4-byte Reload
                                        # xmm14 = mem[0],zero,zero,zero
	subss	(%rbp,%rdx,4), %xmm14
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm15
	subss	(%r13,%rdx,4), %xmm1
	addss	(%r14,%rdx,4), %xmm3
	subss	(%r12,%rdx,4), %xmm15
	movss	%xmm3, 280(%r15)
	movss	(%r14,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm14, %xmm0
	addss	%xmm0, %xmm4
	movss	%xmm4, 284(%r15)
	movss	(%r14,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	addss	%xmm0, %xmm5
	movss	%xmm5, 288(%r15)
	movss	(%r14,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm15, %xmm0
	addss	%xmm0, %xmm6
	movss	%xmm6, 292(%r15)
	movss	(%r14,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm14, %xmm0
	mulss	%xmm14, %xmm0
	mulss	%xmm13, %xmm0
	addss	%xmm0, %xmm7
	movss	%xmm7, 296(%r15)
	movss	(%r14,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	mulss	%xmm13, %xmm0
	addss	%xmm0, %xmm8
	movss	%xmm8, 300(%r15)
	movss	(%r14,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm15, %xmm0
	mulss	%xmm15, %xmm0
	mulss	%xmm13, %xmm0
	addss	%xmm0, %xmm9
	movss	%xmm9, 304(%r15)
	movss	(%r14,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm14, %xmm0
	mulss	%xmm1, %xmm0
	mulss	%xmm13, %xmm0
	addss	%xmm0, %xmm10
	movss	%xmm10, 308(%r15)
	mulss	(%r14,%rdx,4), %xmm1
	mulss	%xmm15, %xmm1
	mulss	%xmm13, %xmm1
	addss	%xmm1, %xmm11
	movss	%xmm11, 312(%r15)
	mulss	(%r14,%rdx,4), %xmm15
	mulss	%xmm14, %xmm15
	mulss	%xmm13, %xmm15
	addss	%xmm15, %xmm12
	movss	%xmm12, 316(%r15)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB6_3
.LBB6_4:                                # %._crit_edge
	movq	80(%rsp), %rdx
	movslq	(%rdx), %rax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%r15, (%rcx,%rax,8)
	incl	%eax
	movl	%eax, (%rdx)
.LBB6_9:                                # %.loopexit
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri, .Lfunc_end6-_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11upwardSweepP4cellS0_
.LCPI7_0:
	.long	0x3f000000                      # float 0.5
	.text
	.globl	_Z11upwardSweepP4cellS0_
	.type	_Z11upwardSweepP4cellS0_,@function
_Z11upwardSweepP4cellS0_:               # @_Z11upwardSweepP4cellS0_
	.cfi_startproc
# %bb.0:
	movss	264(%rsi), %xmm1                # xmm1 = mem[0],zero,zero,zero
	movss	268(%rsi), %xmm2                # xmm2 = mem[0],zero,zero,zero
	subss	264(%rdi), %xmm1
	subss	268(%rdi), %xmm2
	movss	272(%rsi), %xmm0                # xmm0 = mem[0],zero,zero,zero
	subss	272(%rdi), %xmm0
	movss	280(%rdi), %xmm3                # xmm3 = mem[0],zero,zero,zero
	addss	280(%rsi), %xmm3
	movss	%xmm3, 280(%rsi)
	movss	280(%rdi), %xmm3                # xmm3 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm3
	addss	284(%rdi), %xmm3
	addss	284(%rsi), %xmm3
	movss	%xmm3, 284(%rsi)
	movss	280(%rdi), %xmm3                # xmm3 = mem[0],zero,zero,zero
	mulss	%xmm2, %xmm3
	addss	288(%rdi), %xmm3
	addss	288(%rsi), %xmm3
	movss	%xmm3, 288(%rsi)
	movss	280(%rdi), %xmm3                # xmm3 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm3
	addss	292(%rdi), %xmm3
	addss	292(%rsi), %xmm3
	movss	%xmm3, 292(%rsi)
	movss	284(%rdi), %xmm4                # xmm4 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm4
	addss	296(%rdi), %xmm4
	movaps	%xmm1, %xmm5
	mulss	%xmm1, %xmm5
	mulss	280(%rdi), %xmm5
	movss	.LCPI7_0(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	mulss	%xmm3, %xmm5
	addss	%xmm4, %xmm5
	addss	296(%rsi), %xmm5
	movss	%xmm5, 296(%rsi)
	movss	288(%rdi), %xmm4                # xmm4 = mem[0],zero,zero,zero
	mulss	%xmm2, %xmm4
	addss	300(%rdi), %xmm4
	movaps	%xmm2, %xmm5
	mulss	%xmm2, %xmm5
	mulss	280(%rdi), %xmm5
	mulss	%xmm3, %xmm5
	addss	%xmm4, %xmm5
	addss	300(%rsi), %xmm5
	movss	%xmm5, 300(%rsi)
	movss	292(%rdi), %xmm4                # xmm4 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm4
	addss	304(%rdi), %xmm4
	movaps	%xmm0, %xmm5
	mulss	%xmm0, %xmm5
	mulss	280(%rdi), %xmm5
	mulss	%xmm3, %xmm5
	addss	%xmm4, %xmm5
	addss	304(%rsi), %xmm5
	movss	%xmm5, 304(%rsi)
	movss	288(%rdi), %xmm4                # xmm4 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm4
	movss	284(%rdi), %xmm5                # xmm5 = mem[0],zero,zero,zero
	mulss	%xmm2, %xmm5
	addss	%xmm4, %xmm5
	movaps	%xmm1, %xmm4
	mulss	%xmm2, %xmm4
	mulss	280(%rdi), %xmm4
	addss	%xmm5, %xmm4
	mulss	%xmm3, %xmm4
	addss	308(%rdi), %xmm4
	addss	308(%rsi), %xmm4
	movss	%xmm4, 308(%rsi)
	movss	292(%rdi), %xmm4                # xmm4 = mem[0],zero,zero,zero
	mulss	%xmm2, %xmm4
	movss	288(%rdi), %xmm5                # xmm5 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm5
	addss	%xmm4, %xmm5
	mulss	%xmm0, %xmm2
	mulss	280(%rdi), %xmm2
	addss	%xmm5, %xmm2
	mulss	%xmm3, %xmm2
	addss	312(%rdi), %xmm2
	addss	312(%rsi), %xmm2
	movss	%xmm2, 312(%rsi)
	movss	284(%rdi), %xmm2                # xmm2 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm2
	movss	292(%rdi), %xmm4                # xmm4 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm4
	addss	%xmm2, %xmm4
	mulss	%xmm1, %xmm0
	mulss	280(%rdi), %xmm0
	addss	%xmm4, %xmm0
	mulss	%xmm3, %xmm0
	addss	316(%rdi), %xmm0
	addss	316(%rsi), %xmm0
	movss	%xmm0, 316(%rsi)
	retq
.Lfunc_end7:
	.size	_Z11upwardSweepP4cellS0_, .Lfunc_end7-_Z11upwardSweepP4cellS0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6prevalP4cellS0_RiS1_
.LCPI8_0:
	.long	0x3f4ccccd                      # float 0.800000011
	.text
	.globl	_Z6prevalP4cellS0_RiS1_
	.type	_Z6prevalP4cellS0_RiS1_,@function
_Z6prevalP4cellS0_RiS1_:                # @_Z6prevalP4cellS0_RiS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rcx, %rbx
	movl	(%rsi), %eax
	cmpl	$64, %eax
	jl	.LBB8_7
# %bb.1:                                # %.preheader
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %r12
	xorl	%r13d, %r13d
	movss	.LCPI8_0(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
.LBB8_2:                                # =>This Inner Loop Header: Depth=1
	movl	4(%r15), %eax
	btl	%r13d, %eax
	jae	.LBB8_6
# %bb.3:                                #   in Loop: Header=BB8_2 Depth=1
	movq	328(%r15,%r13,8), %rsi
	movss	264(%r12), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movss	268(%r12), %xmm1                # xmm1 = mem[0],zero,zero,zero
	subss	264(%rsi), %xmm0
	subss	268(%rsi), %xmm1
	movss	272(%r12), %xmm2                # xmm2 = mem[0],zero,zero,zero
	subss	272(%rsi), %xmm2
	mulss	%xmm0, %xmm0
	mulss	%xmm1, %xmm1
	addss	%xmm0, %xmm1
	mulss	%xmm2, %xmm2
	addss	%xmm1, %xmm2
	movss	276(%r12), %xmm0                # xmm0 = mem[0],zero,zero,zero
	addss	276(%rsi), %xmm0
	xorps	%xmm1, %xmm1
	sqrtss	%xmm2, %xmm1
	mulss	%xmm3, %xmm1
	ucomiss	%xmm1, %xmm0
	jbe	.LBB8_5
# %bb.4:                                #   in Loop: Header=BB8_2 Depth=1
	movq	%r12, %rdi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z6prevalP4cellS0_RiS1_
	movss	.LCPI8_0(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	jmp	.LBB8_6
.LBB8_5:                                #   in Loop: Header=BB8_2 Depth=1
	addl	$13, (%r14)
.LBB8_6:                                #   in Loop: Header=BB8_2 Depth=1
	incq	%r13
	cmpq	$8, %r13
	jne	.LBB8_2
	jmp	.LBB8_8
.LBB8_7:
	addl	%eax, (%rbx)
.LBB8_8:                                # %.loopexit
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z6prevalP4cellS0_RiS1_, .Lfunc_end8-_Z6prevalP4cellS0_RiS1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP15HIP_vector_typeIfLj4EES2_S1_
.LCPI9_0:
	.long	0x3f4ccccd                      # float 0.800000011
	.text
	.globl	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP15HIP_vector_typeIfLj4EES2_S1_
	.type	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP15HIP_vector_typeIfLj4EES2_S1_,@function
_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP15HIP_vector_typeIfLj4EES2_S1_: # @_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP15HIP_vector_typeIfLj4EES2_S1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %rbp
	movq	112(%rsp), %r10
	movq	104(%rsp), %rbx
	movl	(%rsi), %eax
	cmpl	$63, %eax
	jle	.LBB9_1
# %bb.4:                                # %.preheader
	movq	%rdi, %r13
	movq	128(%rsp), %r11
	movq	120(%rsp), %r15
	leaq	12(%r11), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
	movss	.LCPI9_0(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
.LBB9_5:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_9 Depth 2
	movl	4(%rbp), %eax
	btl	%r14d, %eax
	jae	.LBB9_11
# %bb.6:                                #   in Loop: Header=BB9_5 Depth=1
	movq	328(%rbp,%r14,8), %rsi
	movss	264(%rsi), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movss	264(%r13), %xmm1                # xmm1 = mem[0],zero,zero,zero
	movss	268(%r13), %xmm2                # xmm2 = mem[0],zero,zero,zero
	subss	268(%rsi), %xmm2
	subss	%xmm0, %xmm1
	movss	272(%r13), %xmm3                # xmm3 = mem[0],zero,zero,zero
	subss	272(%rsi), %xmm3
	mulss	%xmm1, %xmm1
	mulss	%xmm2, %xmm2
	addss	%xmm1, %xmm2
	mulss	%xmm3, %xmm3
	addss	%xmm2, %xmm3
	movss	276(%r13), %xmm1                # xmm1 = mem[0],zero,zero,zero
	addss	276(%rsi), %xmm1
	xorps	%xmm2, %xmm2
	sqrtss	%xmm3, %xmm2
	mulss	%xmm4, %xmm2
	ucomiss	%xmm2, %xmm1
	jbe	.LBB9_8
# %bb.7:                                #   in Loop: Header=BB9_5 Depth=1
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	24(%rsp), %r8                   # 8-byte Reload
	movq	32(%rsp), %r9                   # 8-byte Reload
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	136(%rsp)
	.cfi_adjust_cfa_offset 8
	movq	%r15, %rbx
	movq	%r10, %r15
	movq	%r11, %r12
	callq	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP15HIP_vector_typeIfLj4EES2_S1_
	movss	.LCPI9_0(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
	movq	%r12, %r11
	movq	%r15, %r10
	movq	%rbx, %r15
	movq	152(%rsp), %rbx
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
	jmp	.LBB9_11
.LBB9_8:                                #   in Loop: Header=BB9_5 Depth=1
	movslq	(%r15), %rax
	imulq	$52, %rax, %rcx
	movss	%xmm0, (%r11,%rcx)
	movss	268(%rsi), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 4(%r11,%rcx)
	movss	272(%rsi), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 8(%r11,%rcx)
	addq	32(%rsp), %rcx                  # 8-byte Folded Reload
	xorl	%edx, %edx
.LBB9_9:                                #   Parent Loop BB9_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	280(%rsi,%rdx,4), %xmm0         # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$10, %rdx
	jne	.LBB9_9
# %bb.10:                               #   in Loop: Header=BB9_5 Depth=1
	incl	%eax
	movl	%eax, (%r15)
.LBB9_11:                               #   in Loop: Header=BB9_5 Depth=1
	incq	%r14
	cmpq	$8, %r14
	jne	.LBB9_5
	jmp	.LBB9_12
.LBB9_1:                                # %.preheader73
	testl	%eax, %eax
	jle	.LBB9_12
# %bb.2:                                # %.lr.ph.preheader
	leaq	4(%r10), %rax
	leaq	8(%r10), %rcx
	leaq	12(%r10), %rdx
	movl	(%rbx), %edi
	xorl	%esi, %esi
	movq	(%rsp), %r9                     # 8-byte Reload
.LBB9_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movslq	8(%rbp,%rsi,4), %r8
	movss	(%r9,%r8,4), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movslq	%edi, %rdi
	shlq	$4, %rdi
	movss	%xmm0, (%r10,%rdi)
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movss	(%rdi,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movslq	(%rbx), %rdi
	shlq	$4, %rdi
	movss	%xmm0, (%rax,%rdi)
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movss	(%rdi,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movslq	(%rbx), %rdi
	shlq	$4, %rdi
	movss	%xmm0, (%rcx,%rdi)
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movss	(%rdi,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movslq	(%rbx), %rdi
	shlq	$4, %rdi
	movss	%xmm0, (%rdx,%rdi)
	movl	(%rbx), %edi
	incl	%edi
	movl	%edi, (%rbx)
	incq	%rsi
	movslq	(%rbp), %r8
	cmpq	%r8, %rsi
	jl	.LBB9_3
.LBB9_12:                               # %.loopexit
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP15HIP_vector_typeIfLj4EES2_S1_, .Lfunc_end9-_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP15HIP_vector_typeIfLj4EES2_S1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI10_0:
	.quad	0x3e00000000000000              # double 4.6566128730773926E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r13
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r15
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r12
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r14
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
.LBB10_1:                               # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	.LCPI10_0(%rip), %xmm1          # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r13,%rbx,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	mulsd	.LCPI10_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r15,%rbx,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	mulsd	.LCPI10_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	movl	$897988541, (%r14,%rbx,4)       # imm = 0x358637BD
	incq	%rbx
	cmpq	$1000000, %rbx                  # imm = 0xF4240
	jne	.LBB10_1
# %bb.2:
	movq	%r14, 112(%rsp)                 # 8-byte Spill
	movl	$392000000, %edi                # imm = 0x175D7200
	callq	malloc
	movq	$0, (%rax)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 280(%rax)
	movups	%xmm0, 296(%rax)
	movups	%xmm0, 312(%rax)
	movups	%xmm0, 328(%rax)
	movups	%xmm0, 344(%rax)
	movups	%xmm0, 360(%rax)
	movups	%xmm0, 376(%rax)
	movabsq	$4539628425446424576, %rcx      # imm = 0x3F0000003F000000
	movq	%rcx, 272(%rax)
	movq	%rcx, 264(%rax)
	leaq	192(%rsp), %rbp
	movq	%rax, (%rbp)
	xorl	%r14d, %r14d
	movq	%r13, %rsi
	movq	%rax, %r13
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movq	%rax, 8(%rsp)                   # 8-byte Spill
.LBB10_3:                               # %.preheader225
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB10_10 Depth 2
	movl	(%r13), %eax
	cmpl	$64, %eax
	jl	.LBB10_4
# %bb.9:                                # %.lr.ph
                                        #   in Loop: Header=BB10_3 Depth=1
	movss	(%rsi,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%r15,%r14,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	(%r12,%r14,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movq	%r13, %rbx
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movss	%xmm1, 16(%rsp)                 # 4-byte Spill
	movss	%xmm2, 72(%rsp)                 # 4-byte Spill
.LBB10_10:                              #   Parent Loop BB10_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	incl	%eax
	movl	%eax, (%rbx)
	xorl	%eax, %eax
	ucomiss	264(%rbx), %xmm0
	seta	%al
	xorl	%ecx, %ecx
	ucomiss	268(%rbx), %xmm1
	seta	%cl
	xorl	%edx, %edx
	ucomiss	272(%rbx), %xmm2
	seta	%dl
	leal	(%rax,%rcx,2), %eax
	leal	(%rax,%rdx,4), %r13d
	movl	4(%rbx), %eax
	btl	%r13d, %eax
	jb	.LBB10_12
# %bb.11:                               #   in Loop: Header=BB10_10 Depth=2
	movl	%r13d, %edi
	movq	%rbx, %rsi
	movq	%rbp, %rdx
	callq	_Z9add_childiP4cellRS0_
	movss	72(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	16(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	32(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	40(%rsp), %rsi                  # 8-byte Reload
.LBB10_12:                              #   in Loop: Header=BB10_10 Depth=2
	movl	%r13d, %eax
	movq	328(%rbx,%rax,8), %rbx
	movl	(%rbx), %eax
	cmpl	$63, %eax
	jg	.LBB10_10
	jmp	.LBB10_13
.LBB10_4:                               #   in Loop: Header=BB10_3 Depth=1
	movq	%r13, %rbx
.LBB10_13:                              # %._crit_edge
                                        #   in Loop: Header=BB10_3 Depth=1
	leal	1(%rax), %ecx
	movl	%ecx, (%rbx)
	cltq
	movl	%r14d, 8(%rbx,%rax,4)
	cmpl	$64, (%rbx)
	jl	.LBB10_15
# %bb.14:                               #   in Loop: Header=BB10_3 Depth=1
	movq	%rsi, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%rbx, %rcx
	movq	%rbp, %r8
	callq	_Z10split_cellPfS_S_P4cellRS1_
	movq	40(%rsp), %rsi                  # 8-byte Reload
.LBB10_15:                              #   in Loop: Header=BB10_3 Depth=1
	incq	%r14
	cmpq	$1000000, %r14                  # imm = 0xF4240
	movq	8(%rsp), %r13                   # 8-byte Reload
	jne	.LBB10_3
# %bb.5:
	leaq	124(%rsp), %rbx
	movl	$0, (%rbx)
	movl	$8000000, %edi                  # imm = 0x7A1200
	movq	%rsi, %r14
	callq	malloc
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	movq	120(%rsp), %r8                  # 8-byte Reload
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	%rax, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	_Z12getMultipoleP4cellPfS1_S1_S1_PS0_Ri
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	192(%rsp), %rbx
.LBB10_6:                               # =>This Inner Loop Header: Depth=1
	cmpq	%r13, %rbx
	je	.LBB10_7
# %bb.16:                               # %.lr.ph233
                                        #   in Loop: Header=BB10_6 Depth=1
	movq	320(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_Z11upwardSweepP4cellS0_
	addq	$-392, %rbx                     # imm = 0xFE78
	jmp	.LBB10_6
.LBB10_7:                               # %._crit_edge234
	movslq	124(%rsp), %rcx
	movq	%rcx, %rax
	shlq	$6, %rax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	leaq	1(%rcx), %rax
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	xorl	%edx, %edx
	movl	%ecx, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%edx, 92(%rsp)
	movl	%edx, 88(%rsp)
	movq	%rcx, 184(%rsp)                 # 8-byte Spill
	testq	%rcx, %rcx
	jle	.LBB10_8
# %bb.36:                               # %.lr.ph237.preheader
	xorl	%r14d, %r14d
	leaq	88(%rsp), %rbp
	movq	72(%rsp), %r13                  # 8-byte Reload
	movq	8(%rsp), %rbx                   # 8-byte Reload
.LBB10_37:                              # %.lr.ph237
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r13,%r14,8), %rdi
	movq	%rbx, %rsi
	leaq	92(%rsp), %rdx
	movq	%rbp, %rcx
	callq	_Z6prevalP4cellS0_RiS1_
	incq	%r14
	cmpq	%r14, 32(%rsp)                  # 8-byte Folded Reload
	jne	.LBB10_37
# %bb.17:                               # %._crit_edge238.loopexit
	movl	88(%rsp), %ebp
	movslq	92(%rsp), %rax
	shlq	$2, %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	jmp	.LBB10_18
.LBB10_8:
	xorl	%eax, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	xorl	%ebp, %ebp
.LBB10_18:                              # %._crit_edge238
	movl	$.L.str, %edi
	movq	56(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	movq	104(%rsp), %rbx                 # 8-byte Reload
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 136(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	movslq	%ebp, %r14
	shlq	$4, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	56(%rsp), %rdi                  # 8-byte Reload
	shlq	$4, %rdi
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	leaq	160(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	152(%rsp), %rdi
	movq	%rbx, 104(%rsp)                 # 8-byte Spill
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	96(%rsp), %rdi
	movq	%r14, 176(%rsp)                 # 8-byte Spill
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	leaq	144(%rsp), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	64(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	xorl	%ebx, %ebx
	movl	%ebx, 28(%rsp)
	movl	%ebx, 24(%rsp)
	callq	_Z8get_timev
	movsd	%xmm0, 168(%rsp)                # 8-byte Spill
	movl	$0, %eax
	cmpl	$0, 32(%rsp)                    # 4-byte Folded Reload
	jle	.LBB10_25
# %bb.19:                               # %.lr.ph246.preheader
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	12(%rax), %rbx
	xorl	%r14d, %r14d
.LBB10_20:                              # %.lr.ph246
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB10_22 Depth 2
	movq	72(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r14,8), %rdi
	movl	28(%rsp), %eax
	movq	136(%rsp), %rcx                 # 8-byte Reload
	movl	%eax, (%rcx,%r14,4)
	movl	24(%rsp), %eax
	movl	%eax, (%r13,%r14,4)
	movl	(%rdi), %eax
	testl	%eax, %eax
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movq	112(%rsp), %r9                  # 8-byte Reload
	jle	.LBB10_23
# %bb.21:                               # %.lr.ph242
                                        #   in Loop: Header=BB10_20 Depth=1
	movl	%r14d, %ecx
	andl	$67108863, %ecx                 # imm = 0x3FFFFFF
	shlq	$10, %rcx
	addq	%rbx, %rcx
	xorl	%r8d, %r8d
.LBB10_22:                              #   Parent Loop BB10_20 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	8(%rdi,%r8,4), %rsi
	movss	(%rdx,%rsi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, -12(%rcx)
	movss	(%r15,%rsi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, -8(%rcx)
	movss	(%r12,%rsi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, -4(%rcx)
	movss	(%r9,%rsi,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rcx)
	incq	%r8
	addq	$16, %rcx
	cmpq	%rax, %r8
	jb	.LBB10_22
.LBB10_23:                              # %._crit_edge243
                                        #   in Loop: Header=BB10_20 Depth=1
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rcx
	movq	%r12, %r8
	pushq	136(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	leaq	40(%rsp), %rax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	leaq	60(%rsp), %rax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z8evaluateP4cellS0_PfS1_S1_S1_S1_RiP15HIP_vector_typeIfLj4EES2_S1_
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
	incq	%r14
	cmpq	32(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB10_20
# %bb.24:                               # %._crit_edge247.loopexit
	movl	28(%rsp), %eax
	movl	24(%rsp), %ebx
	movq	64(%rsp), %r14                  # 8-byte Reload
.LBB10_25:                              # %._crit_edge247
	movl	%eax, 8(%rsp)                   # 4-byte Spill
	callq	_Z8get_timev
	subsd	168(%rsp), %xmm0                # 8-byte Folded Reload
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	184(%rsp), %rax                 # 8-byte Reload
	movq	%rbx, %rcx
	movq	136(%rsp), %rbx                 # 8-byte Reload
	movl	8(%rsp), %edx                   # 4-byte Reload
	movl	%edx, (%rbx,%rax,4)
	movl	%ecx, (%r13,%rax,4)
	callq	_Z8get_timev
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	160(%rsp), %rdi
	movq	%rbx, %rsi
	movq	104(%rsp), %rbx                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	152(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	96(%rsp), %rdi
	movq	%rbp, %rsi
	movq	176(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	144(%rsp), %rdi
	movq	128(%rsp), %rsi                 # 8-byte Reload
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	80(%rsp), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	56(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_Z8get_timev
	subsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	callq	_Z8get_timev
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movabsq	$4294967360, %rdx               # imm = 0x100000040
	leaq	(%rbx,%rdx), %rdi
	addq	$-64, %rdi
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_27
# %bb.26:
	movq	160(%rsp), %rdi
	movq	96(%rsp), %rsi
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rcx
	movq	80(%rsp), %r8
	callq	_Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
.LBB10_27:
	callq	_Z8get_timev
	subsd	64(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	80(%rsp), %rsi
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%ebx, %ebx
	movq	72(%rsp), %r10                  # 8-byte Reload
	jle	.LBB10_28
# %bb.38:                               # %.lr.ph254
	movq	16(%rsp), %rax                  # 8-byte Reload
	addq	$12, %rax
	xorl	%ecx, %ecx
.LBB10_39:                              # =>This Loop Header: Depth=1
                                        #     Child Loop BB10_41 Depth 2
	movq	(%r10,%rcx,8), %rdx
	movl	(%rdx), %esi
	testl	%esi, %esi
	jle	.LBB10_42
# %bb.40:                               # %.lr.ph250
                                        #   in Loop: Header=BB10_39 Depth=1
	movl	%ecx, %edi
	andl	$67108863, %edi                 # imm = 0x3FFFFFF
	shlq	$10, %rdi
	addq	%rax, %rdi
	shlq	$2, %rsi
	xorl	%r8d, %r8d
.LBB10_41:                              #   Parent Loop BB10_39 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	8(%rdx,%r8), %r9
	movss	(%rdi,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r14,%r9,4)
	addq	$4, %r8
	cmpq	%r8, %rsi
	jne	.LBB10_41
.LBB10_42:                              # %._crit_edge251
                                        #   in Loop: Header=BB10_39 Depth=1
	incq	%rcx
	cmpq	%rbx, %rcx
	jne	.LBB10_39
.LBB10_28:                              # %.preheader.preheader
	xorl	%eax, %eax
	movq	40(%rsp), %rcx                  # 8-byte Reload
	movq	112(%rsp), %rdx                 # 8-byte Reload
.LBB10_29:                              # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rcx,%rax), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rbp,%rax,4)
	movss	(%r15,%rax), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 4(%rbp,%rax,4)
	movss	(%r12,%rax), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 8(%rbp,%rax,4)
	movss	(%rdx,%rax), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 12(%rbp,%rax,4)
	addq	$4, %rax
	cmpq	$4000000, %rax                  # imm = 0x3D0900
	jne	.LBB10_29
# %bb.30:
	callq	_Z8get_timev
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movq	96(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	$1, %esi
	movabsq	$4294967360, %rdx               # imm = 0x100000040
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_32
# %bb.31:
	movq	96(%rsp), %rdi
	movq	80(%rsp), %rsi
	callq	_Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_
.LBB10_32:
	movq	80(%rsp), %rsi
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	callq	_Z8get_timev
	subsd	40(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	xorpd	%xmm1, %xmm1
	xorl	%eax, %eax
	xorpd	%xmm0, %xmm0
	movq	16(%rsp), %rcx                  # 8-byte Reload
.LBB10_33:                              # =>This Inner Loop Header: Depth=1
	movss	12(%rcx,%rax,4), %xmm2          # xmm2 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm3
	subss	(%r14,%rax), %xmm3
	mulss	%xmm3, %xmm3
	addss	%xmm3, %xmm0
	mulss	%xmm2, %xmm2
	addss	%xmm2, %xmm1
	addq	$4, %rax
	cmpq	$4000000, %rax                  # imm = 0x3D0900
	jne	.LBB10_33
# %bb.34:
	divss	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	ucomiss	%xmm1, %xmm0
	jb	.LBB10_43
# %bb.35:
	sqrtss	%xmm0, %xmm0
	jmp	.LBB10_44
.LBB10_43:                              # %call.sqrt
	callq	sqrtf
.LBB10_44:                              # %.split
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	main, .Lfunc_end10-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6directP15HIP_vector_typeIfLj4EES1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6directP15HIP_vector_typeIfLj4EES1_,@object # @_Z6directP15HIP_vector_typeIfLj4EES1_
	.section	.rodata,"a",@progbits
	.globl	_Z6directP15HIP_vector_typeIfLj4EES1_
	.p2align	3, 0x0
_Z6directP15HIP_vector_typeIfLj4EES1_:
	.quad	_Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_
	.size	_Z6directP15HIP_vector_typeIfLj4EES1_, 8

	.type	_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_,@object # @_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.globl	_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.p2align	3, 0x0
_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_:
	.quad	_Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.size	_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d %d\n"
	.size	.L.str, 7

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"buffer: %lf\n"
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"memcpy: %lf\n"
	.size	.L.str.2, 13

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"kernel: %lf\n"
	.size	.L.str.3, 13

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"direct: %lf\n"
	.size	.L.str.4, 13

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"error : %f\n"
	.size	.L.str.5, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6directP15HIP_vector_typeIfLj4EES1_"
	.size	.L__unnamed_1, 38

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_"
	.size	.L__unnamed_2, 44

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__directP15HIP_vector_typeIfLj4EES1_
	.addrsig_sym _Z21__device_stub__kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6directP15HIP_vector_typeIfLj4EES1_
	.addrsig_sym _Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6directP15HIP_vector_typeIfLj4EES1_ ; -- Begin function _Z6directP15HIP_vector_typeIfLj4EES1_
	.globl	_Z6directP15HIP_vector_typeIfLj4EES1_
	.p2align	8
	.type	_Z6directP15HIP_vector_typeIfLj4EES1_,@function
_Z6directP15HIP_vector_typeIfLj4EES1_:  ; @_Z6directP15HIP_vector_typeIfLj4EES1_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v9, 4, v0
	v_lshl_add_u32 v7, s15, 6, v0
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 4, v[7:8]
	v_rsq_f32_e32 v7, 0x38d1b717
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v6, vcc_lo
	global_load_b128 v[1:4], v[1:2], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v4, v4, -v7
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	v_lshl_add_u32 v7, s4, 6, v0
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s5, 0
	v_lshlrev_b64 v[10:11], 4, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	global_load_b128 v[10:13], v[10:11], off
	s_waitcnt vmcnt(0)
	ds_store_b128 v9, v[10:13]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v7, s5
	s_add_i32 s5, s5, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_cmpk_eq_i32 s5, 0x400
	ds_load_b128 v[10:13], v7
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v10, v1, v10 :: v_dual_sub_f32 v7, v2, v11
	v_sub_f32_e32 v11, v3, v12
	v_mul_f32_e32 v7, v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v10, v10
	v_fmac_f32_e32 v7, v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, 0x38d1b717, v7
	v_mul_f32_e32 v10, 0x4b800000, v7
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v10, vcc_lo
	v_rsq_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v10, 0x45800000, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v10, vcc_lo
	v_fmac_f32_e32 v4, v13, v7
	s_cbranch_scc0 .LBB0_2
; %bb.3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s4, 0x3d08
	s_cbranch_scc0 .LBB0_1
; %bb.4:
	v_add_co_u32 v0, s0, s0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v8, null, s1, 0, s0
	v_add_co_u32 v7, vcc_lo, 0xf42000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s0, 0
	global_load_b128 v[10:13], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b128 v9, v[10:13]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v0, s0
	s_add_i32 s0, s0, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_cmpk_eq_i32 s0, 0x400
	ds_load_b128 v[7:10], v0
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v7, v1, v7 :: v_dual_sub_f32 v0, v2, v8
	v_sub_f32_e32 v8, v3, v9
	v_mul_f32_e32 v0, v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v7, v7
	v_fmac_f32_e32 v0, v8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, 0x38d1b717, v0
	v_mul_f32_e32 v7, 0x4b800000, v0
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v7, vcc_lo
	v_rsq_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x45800000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v7, vcc_lo
	v_fmac_f32_e32 v4, v10, v0
	s_cbranch_scc0 .LBB0_5
; %bb.6:
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_store_b128 v[5:6], v[1:4], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6directP15HIP_vector_typeIfLj4EES1_
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6directP15HIP_vector_typeIfLj4EES1_, .Lfunc_end0-_Z6directP15HIP_vector_typeIfLj4EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 560
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_ ; -- Begin function _Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.globl	_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
	.p2align	8
	.type	_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_,@function
_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_: ; @_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x20
	s_mov_b32 s8, s15
	v_mov_b32_e32 v8, 0
	v_lshl_add_u32 v7, s8, 6, v0
	s_mov_b32 s13, 0
	s_add_i32 s12, s15, 1
	s_mov_b32 s9, s13
	s_lshl_b64 s[10:11], s[12:13], 2
	v_lshlrev_b64 v[1:2], 4, v[7:8]
	v_rsq_f32_e32 v7, 0x38d1b717
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v2, vcc_lo
	s_load_b256 s[0:7], s[0:1], 0x0
	global_load_b128 v[1:4], v[5:6], off
	s_waitcnt lgkmcnt(0)
	s_add_u32 s14, s0, s10
	s_addc_u32 s15, s1, s11
	s_lshl_b64 s[8:9], s[8:9], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_clause 0x1
	s_load_b32 s12, s[14:15], 0x0
	s_load_b32 s1, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v9, s1, v0
	s_sub_i32 s0, s12, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s12, s0, -1
	s_ashr_i32 s14, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s14, s14, 26
	s_add_i32 s12, s12, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s1, s12, 6
	s_cmpk_lt_i32 s0, 0x41
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v4, v4, -v7
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph
	v_lshl_add_u32 v10, v0, 4, 0xd00
	s_max_i32 s12, s1, 1
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	v_lshl_add_u32 v7, s13, 6, v9
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s14, 0
	v_lshlrev_b64 v[11:12], 4, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	global_load_b128 v[11:14], v[11:12], off
	s_waitcnt vmcnt(0)
	ds_store_b128 v10, v[11:14]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v7, s14
	s_add_i32 s14, s14, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_cmpk_eq_i32 s14, 0x400
	ds_load_b128 v[11:14], v7 offset:3328
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v7, v2, v12 :: v_dual_sub_f32 v12, v3, v13
	v_sub_f32_e32 v11, v1, v11
	v_mul_f32_e32 v7, v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v11, v11
	v_fmac_f32_e32 v7, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, 0x38d1b717, v7
	v_mul_f32_e32 v11, 0x4b800000, v7
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v11, vcc_lo
	v_rsq_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v11, 0x45800000, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v11, vcc_lo
	v_fmac_f32_e32 v4, v14, v7
	s_cbranch_scc0 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s13, s13, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s13, s12
	s_cbranch_scc0 .LBB1_2
.LBB1_5:                                ; %._crit_edge
	s_lshl_b32 s1, s1, 6
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, s1, v9
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b32_e32 v11, 4, v0
	v_lshlrev_b64 v[7:8], 4, v[7:8]
	s_sub_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lt_i32 s0, 1
	v_add_co_u32 v7, vcc_lo, s2, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_load_b128 v[7:10], v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b128 v11, v[7:10] offset:3328
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_8
; %bb.6:                                ; %.lr.ph111.preheader
	s_mov_b32 s1, 0
	s_movk_i32 s2, 0xd00
.LBB1_7:                                ; %.lr.ph111
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s2
	s_add_i32 s1, s1, 1
	s_add_i32 s2, s2, 16
	s_cmp_ge_i32 s1, s0
	ds_load_b128 v[7:10], v7
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v8, v2, v8 :: v_dual_sub_f32 v7, v1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v3, v9 :: v_dual_mul_f32 v8, v8, v8
	v_fmac_f32_e32 v8, v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v9
	v_add_f32_e32 v7, 0x38d1b717, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v8, 0x4b800000, v7
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v7
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, 0x45800000, v7
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v4, v10, v7
	s_cbranch_scc0 .LBB1_7
.LBB1_8:                                ; %._crit_edge112
	s_add_u32 s0, s4, s10
	s_addc_u32 s1, s5, s11
	s_add_u32 s2, s4, s8
	s_addc_u32 s3, s5, s9
	s_clause 0x1
	s_load_b32 s0, s[0:1], 0x0
	s_load_b32 s1, s[2:3], 0x0
	v_mul_u32_u24_e32 v7, 13, v0
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s0, s0, s1
	v_add_nc_u32_e32 v10, s1, v0
	s_add_i32 s2, s0, -1
	v_lshlrev_b32_e32 v0, 2, v7
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s3, s3, 26
	s_add_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s1, s2, 6
	s_cmpk_lt_i32 s0, 0x41
	s_cbranch_scc1 .LBB1_15
; %bb.9:                                ; %.lr.ph120
	v_mul_lo_u32 v7, v10, 13
	s_max_i32 s2, s1, 1
	s_mov_b32 s3, 0
.LBB1_10:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_11 Depth 2
                                        ;     Child Loop BB1_13 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	s_mov_b32 s4, 0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b64 v[8:9], 2, v[7:8]
	v_add_co_u32 v8, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
.LBB1_11:                               ;   Parent Loop BB1_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v11, v[8:9], off
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_nc_u32_e32 v12, s4, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_add_i32 s4, s4, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 52
	s_waitcnt vmcnt(0)
	ds_store_b32 v12, v11
	s_cbranch_scc0 .LBB1_11
; %bb.12:                               ;   in Loop: Header=BB1_10 Depth=1
	s_mov_b32 s4, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_13:                               ;   Parent Loop BB1_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v17, s4
	s_add_i32 s4, s4, 52
	ds_load_2addr_b32 v[8:9], v17 offset1:1
	ds_load_2addr_b32 v[11:12], v17 offset0:2 offset1:3
	ds_load_2addr_b32 v[13:14], v17 offset0:4 offset1:5
	ds_load_2addr_b32 v[15:16], v17 offset0:6 offset1:7
	s_cmpk_eq_i32 s4, 0xd00
	s_waitcnt lgkmcnt(3)
	v_dual_sub_f32 v18, v2, v9 :: v_dual_sub_f32 v19, v1, v8
	s_waitcnt lgkmcnt(2)
	v_sub_f32_e32 v20, v3, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v18, v18
	v_fmac_f32_e32 v8, v19, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v20, v20
	v_mul_f32_e32 v9, 0x4b800000, v8
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v8
	v_mul_f32_e32 v22, 0x40400000, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v8, v9 :: v_dual_mul_f32 v25, v19, v22
	v_rsq_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x45800000, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v11, v8, v9, vcc_lo
	v_mul_f32_e32 v8, v11, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_fmac_f32 v4, v12, v11 :: v_dual_mul_f32 v21, v11, v8
	ds_load_2addr_b32 v[8:9], v17 offset0:8 offset1:9
	v_dual_mul_f32 v12, v21, v19 :: v_dual_mul_f32 v23, v11, v21
	v_mul_f32_e32 v24, v21, v18
	v_mul_f32_e32 v26, v21, v20
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v4, -v13, v12, v4
	v_mul_f32_e32 v23, v11, v23
	v_mul_f32_e32 v13, 0x40400000, v18
	ds_load_2addr_b32 v[11:12], v17 offset0:10 offset1:11
	v_fma_f32 v4, -v14, v24, v4
	v_fma_f32 v25, v25, v23, -v21
	v_mul_f32_e32 v14, 0x40400000, v20
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v4, -v15, v26, v4
	v_mul_f32_e32 v15, v20, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v4, v16, v25
	ds_load_b32 v16, v17 offset:48
	v_mul_f32_e32 v24, v18, v13
	v_mul_f32_e32 v17, v22, v18
	v_fma_f32 v15, v15, v23, -v21
	v_fma_f32 v24, v24, v23, -v21
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v4, v8, v24
	v_mul_f32_e32 v8, v13, v20
	v_mul_f32_e32 v13, v17, v23
	v_dual_fmac_f32 v4, v9, v15 :: v_dual_mul_f32 v9, v19, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v8, v8, v23
	s_waitcnt lgkmcnt(1)
	v_dual_fmac_f32 v4, v11, v13 :: v_dual_mul_f32 v9, v9, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v12, v8
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v4, v16, v9
	s_cbranch_scc0 .LBB1_13
; %bb.14:                               ;   in Loop: Header=BB1_10 Depth=1
	v_add_nc_u32_e32 v7, 0x340, v7
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, s2
	s_cbranch_scc0 .LBB1_10
.LBB1_15:                               ; %Flow247
	s_lshl_b32 s1, s1, 6
	s_mov_b32 s2, 0
	v_add_nc_u32_e32 v7, s1, v10
	s_barrier
	buffer_gl0_inv
	v_mul_lo_u32 v7, v7, 13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
.LBB1_16:                               ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[7:8], off
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_nc_u32_e32 v10, s2, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_add_i32 s2, s2, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 52
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v9
	s_cbranch_scc0 .LBB1_16
; %bb.17:
	s_sub_i32 s0, s0, s1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s0, 1
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_20
; %bb.18:                               ; %.lr.ph128.preheader
	s_mov_b32 s1, 0
	s_mov_b32 s2, 0
.LBB1_19:                               ; %.lr.ph128
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v0, s1
	s_add_i32 s2, s2, 1
	s_add_i32 s1, s1, 52
	s_cmp_ge_i32 s2, s0
	ds_load_2addr_b32 v[7:8], v0 offset1:1
	ds_load_2addr_b32 v[9:10], v0 offset0:2 offset1:3
	ds_load_2addr_b32 v[11:12], v0 offset0:4 offset1:5
	ds_load_2addr_b32 v[13:14], v0 offset0:6 offset1:7
	s_waitcnt lgkmcnt(3)
	v_dual_sub_f32 v15, v2, v8 :: v_dual_sub_f32 v16, v1, v7
	s_waitcnt lgkmcnt(2)
	v_sub_f32_e32 v17, v3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v7, v15, v15
	v_mul_f32_e32 v19, 0x40400000, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v16, v16
	v_dual_mul_f32 v22, v16, v19 :: v_dual_fmac_f32 v7, v17, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v8, 0x4b800000, v7
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v7
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, 0x45800000, v7
	v_cndmask_b32_e32 v9, v7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, v9, v9
	v_fmac_f32_e32 v4, v10, v9
	v_mul_f32_e32 v18, v9, v7
	ds_load_2addr_b32 v[7:8], v0 offset0:8 offset1:9
	v_mul_f32_e32 v10, v18, v16
	v_mul_f32_e32 v21, v18, v15
	v_mul_f32_e32 v23, v18, v17
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, -v11, v10, v4
	v_fma_f32 v4, -v12, v21, v4
	v_mul_f32_e32 v12, 0x40400000, v17
	v_mul_f32_e32 v20, v9, v18
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v4, -v13, v23, v4
	v_mul_f32_e32 v13, v17, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v20, v9, v20
	ds_load_2addr_b32 v[9:10], v0 offset0:10 offset1:11
	ds_load_b32 v0, v0 offset:48
	v_fma_f32 v22, v22, v20, -v18
	v_fmac_f32_e32 v4, v14, v22
	v_mul_f32_e32 v14, v19, v15
	v_mul_f32_e32 v11, 0x40400000, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v21, v15, v11
	v_fma_f32 v21, v21, v20, -v18
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v7, v21
	v_mul_f32_e32 v7, v11, v17
	v_fma_f32 v13, v13, v20, -v18
	v_dual_mul_f32 v11, v14, v20 :: v_dual_fmac_f32 v4, v8, v13
	v_mul_f32_e32 v8, v16, v12
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v7, v7, v20 :: v_dual_fmac_f32 v4, v9, v11
	v_mul_f32_e32 v8, v8, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v10, v7
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v4, v0, v8
	s_cbranch_scc0 .LBB1_19
.LBB1_20:                               ; %Flow245
	global_store_b128 v[5:6], v[1:4], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
		.amdhsa_group_segment_fixed_size 4352
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_, .Lfunc_end1-_Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1868
; NumSgprs: 18
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4352 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6directP15HIP_vector_typeIfLj4EES1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6directP15HIP_vector_typeIfLj4EES1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 4352
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPiP15HIP_vector_typeIfLj4EES_PfS2_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     27
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
