// the GPU code can be found in power_gpu.cu
// jiabing jin, sept 2017 
////////////////////////////////////////////


#include <stdio.h>
#include <math.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include "cuda.h"



const int BLOCK_SIZE =256;
// #include "power_gpu.cu"

// Input Array Variables
float* h_MatA = NULL;
float* d_MatA = NULL;

// Output Array
float* h_VecV = NULL;
float* d_VecV = NULL;
float* h_VecW = NULL;
float* d_VecW = NULL;
float* h_NormW = NULL;
float* d_NormW = NULL;

// Variables to change
int GlobalSize = 8000;         // this is the dimension of the matrix, GlobalSize*GlobalSize
int BlockSize = 256;            // number of threads in each block
const float EPS = 0.000005;    // tolerence of the error
int max_iteration = 100;       // the maximum iteration steps


// Functions
void Cleanup(void);
void InitOne(float*, int);
void UploadArray(float*, int);
float CPUReduce(float*, int);
void  Arguments(int, char**);
void checkCardVersion(void);
void ParseArguments(int, char**);

// Kernels
__global__ void Av_Product(float* , float* , float* , int );
__global__ void FindNormW(float* , float* , int );
__global__ void NormalizeW(float* ,float* , int );
__global__ void ComputeLamda( float* ,float* , float* ,int );


void CPU_AvProduct()
{
	int N = GlobalSize;
	int matIndex =0;
    for(int i=0;i<N;i++)
	{
		h_VecW[i] = 0;
		for(int j=0;j<N;j++)
		{
			matIndex = i*N + j;
			h_VecW[i] += h_MatA[matIndex] * h_VecV[j];
			
		}
	}
}

void CPU_NormalizeW()
{
	int N = GlobalSize;
	float normW=0;
	for(int i=0;i<N;i++)
		normW += h_VecW[i] * h_VecW[i];
	
	normW = sqrt(normW);
	for(int i=0;i<N;i++)
		h_VecV[i] = h_VecW[i]/normW;
}

float CPU_ComputeLamda()
{
	int N = GlobalSize;
	float lamda =0;
	for(int i=0;i<N;i++)
		lamda += h_VecV[i] * h_VecW[i];
	
	return lamda;
}

void RunCPUPowerMethod()
{
	printf("*************************************\n");
	float oldLamda =0;
	float lamda=0;
	
	//AvProduct
	CPU_AvProduct();
	
	//power loop
	for (int i=0;i<max_iteration;i++)
	{
		CPU_NormalizeW();
		CPU_AvProduct();
		lamda= CPU_ComputeLamda();
		printf("CPU lamda at %d: %f \n", i, lamda);
		// If residual is lass than epsilon break
		if(abs(oldLamda - lamda) < EPS)
			break;
		oldLamda = lamda;	
	
	}
	printf("*************************************\n");
	
}

__global__ void Av_Product(float* g_MatA, float* g_VecV, float* g_VecW, int N)
{
    // Block index
    int bx = blockIdx.x;

    // Thread index
    int tx = threadIdx.x;

    int aBegin = N * BLOCK_SIZE * bx;
    int aEnd   = aBegin + N - 1;
    int step  = BLOCK_SIZE;

    int bBegin = 0;//BLOCK_SIZE * bx;
    int bIndex=0;
    int aIndex =0;
    float Csub = 0;

    for (int a = aBegin, b = bBegin;
         a <= aEnd;
         a += step, b += step)
    {

        __shared__ float As[BLOCK_SIZE];

        __shared__ float bs[BLOCK_SIZE];
        aIndex = a  + tx;
        if( aIndex < N*N)
        	As[tx] = g_MatA[aIndex];
		else
        	As[tx] = 0;

            bIndex = b+tx;
   	    if(bIndex<N)   
		bs[tx] = g_VecV[bIndex];
	    else
		bs[tx] = 0;

        __syncthreads();

        for (int k = 0; k < BLOCK_SIZE; ++k)
        {
            Csub += As[k] * bs[k];
        }//}
        __syncthreads();
    }

    g_VecW[ BLOCK_SIZE * bx + tx] = Csub;
}

__global__ void ComputeLamda( float* g_VecV, float* g_VecW, float * g_Lamda,int N)
{
  // shared memory size declared at kernel launch
  extern __shared__ float sdataVW[];
  unsigned int tid = threadIdx.x;
  unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;

  // For thread ids greater than data space
  if (globalid < N) {
     sdataVW[tid] =  g_VecV[globalid] * g_VecW[globalid];
  }
  else {
     sdataVW[tid] = 0;  // Case of extra threads above N
  }

  // each thread loads one element from global to shared mem
  __syncthreads();

  // do reduction in shared mem
  for (unsigned int s=blockDim.x / 2; s > 0; s = s >> 1) {
     if (tid < s) {
         sdataVW[tid] = sdataVW[tid] + sdataVW[tid+ s];
     }
     __syncthreads();
  }
   // atomic operations:
  if (tid == 0) atomicAdd(g_Lamda,sdataVW[0]); 
}

__global__ void FindNormW(float* g_VecW, float * g_NormW, int N)
{
  // shared memory size declared at kernel launch
  extern __shared__ float sdata[];
  unsigned int tid = threadIdx.x;
  unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;

  // For thread ids greater than data space
  if (globalid < N) {
     sdata[tid] =  g_VecW[globalid];
  }
  else {
     sdata[tid] = 0;  // Case of extra threads above N
  }

  // each thread loads one element from global to shared mem
  __syncthreads();

  sdata[tid] = sdata[tid] * sdata[tid];
  __syncthreads();

  // do reduction in shared mem
  for (unsigned int s=blockDim.x / 2; s > 0; s = s >> 1) {
     if (tid < s) {
         sdata[tid] = sdata[tid] + sdata[tid+ s];
     }
     __syncthreads();
  }
   // atomic operations:
  if (tid == 0) atomicAdd(g_NormW,sdata[0]);
}

__global__ void NormalizeW(float* g_VecW, float * g_NormW, float* g_VecV, int N)
{
  // shared memory size declared at kernel launch
  extern __shared__ float sNormData[];
  unsigned int tid = threadIdx.x;
  unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;

  if(tid==0) sNormData[0] =  g_NormW[0];
  __syncthreads();

  // For thread ids greater than data space
  if (globalid < N) {
     g_VecV[globalid] = g_VecW[globalid]/sNormData[0];
  }

}

// Host code
int main(int argc, char** argv)
{

    struct timespec t_start,t_end,t_start2;
    double runtime;
    double Av_runtime = 0.0;
    double Find_runtime = 0.0; 
    double Norm_runtime = 0.0; 
    double Compute_runtime = 0.0;
    ParseArguments(argc, argv);
		
    int N = GlobalSize;
    printf("Matrix size %d X %d \n", N, N);
    size_t vec_size = N * sizeof(float);
    size_t mat_size = N * N * sizeof(float);
    size_t norm_size = sizeof(float);
  
    // Allocate normalized value in host memory
    h_NormW = (float*)malloc(norm_size);
    // Allocate input matrix in host memory
    h_MatA = (float*)malloc(mat_size);
    // Allocate initial vector V in host memory
    h_VecV = (float*)malloc(vec_size);
    // Allocate W vector for computations
    h_VecW = (float*)malloc(vec_size);


    // Initialize input matrix
    UploadArray(h_MatA, N);
    InitOne(h_VecV,N);

    printf("Power method in CPU starts\n");	   
    clock_gettime(CLOCK_REALTIME,&t_start);
    RunCPUPowerMethod();   // the lamda is already solved here
    clock_gettime(CLOCK_REALTIME,&t_end);
    runtime = (t_end.tv_sec - t_start.tv_sec) + 1e-9*(t_end.tv_nsec - t_start.tv_nsec);
    printf("CPU: run time = %f secs.\n",runtime);
    printf("Power method in CPU is finished\n");
    
    
    /////////////////////////////////////////////////
    // This is the starting points of GPU
    printf("Power method in GPU starts\n");
    checkCardVersion();

    // Initialize input matrix
    InitOne(h_VecV,N);
    
    clock_gettime(CLOCK_REALTIME,&t_start);  // Here I start to count

    // Set the kernel arguments
    int threadsPerBlock = BlockSize;   
    int sharedMemSize = threadsPerBlock * sizeof(float); // in per block, the memory is shared   
    int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;

    /* Host variables for convergence */
    float OldLamda = 0;
    float temp = 0;

    /* Device variable for convergence */
    float* Lamda = 0;

    // Allocate matrix and vectors in device memory
    cudaMalloc((void**)&d_MatA, mat_size); 
    cudaMalloc((void**)&d_VecV, vec_size); 
    cudaMalloc((void**)&d_VecW, vec_size); // This vector is only used by the device
    cudaMalloc((void**)&d_NormW, norm_size); 

    /* Allocate memory for device lamda */
    cudaMalloc((void**)&Lamda, sizeof(float));

    //Copy from host memory to device memory
    cudaMemcpy(d_MatA, h_MatA, mat_size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_VecV, h_VecV, vec_size, cudaMemcpyHostToDevice);
    cudaMemcpy(Lamda, &OldLamda, sizeof(float), cudaMemcpyHostToDevice);
	// cutilCheckError(cutStopTimer(timer_mem));
	  
    //Power method loops
    
    clock_gettime(CLOCK_REALTIME,&t_start2);
    
    /* First matrix vector multiplication */
    Av_Product<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_MatA, d_VecV, d_VecW, N);

    /* Measure time for one matrix vector multiplication */
    clock_gettime(CLOCK_REALTIME,&t_end);
    Av_runtime += Av_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
    cudaThreadSynchronize(); //Needed, kind of barrier to sychronize all threads
	
    // This part is the main code of the iteration process for the Power Method in GPU. 
    // Please finish this part based on the given code. Do not forget the command line 
    // cudaThreadSynchronize() after callig the function every time in CUDA to synchoronize the threads
    ////////////////////////////////////////////
    //   ///      //        //            //          //            //        //
    //                                                                        //
	
	//power loop
	for (int i=0;i<max_iteration;i++)
	{
                /* Measure time for creating the normalized vector */
                clock_gettime(CLOCK_REALTIME,&t_start2);
                FindNormW<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_VecW, d_NormW, N);
                clock_gettime(CLOCK_REALTIME,&t_end);
                Find_runtime += Find_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
                cudaThreadSynchronize();

                /* Measure time for normalizing the vector */
                clock_gettime(CLOCK_REALTIME,&t_start2);
		NormalizeW<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_VecW, d_NormW, d_VecV, N);
                clock_gettime(CLOCK_REALTIME,&t_end);
                Norm_runtime += Norm_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
                cudaThreadSynchronize();

                /* Measure time for matrix vector multiplication */
                clock_gettime(CLOCK_REALTIME,&t_start2);
		Av_Product<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_MatA, d_VecV, d_VecW, N);
                clock_gettime(CLOCK_REALTIME,&t_end);
                Av_runtime += Av_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
                cudaThreadSynchronize();
                
                /* Measure time computing the Lamda */
                clock_gettime(CLOCK_REALTIME,&t_start2);
		ComputeLamda<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_VecV, d_VecW, Lamda, N);
                clock_gettime(CLOCK_REALTIME,&t_end);
                Compute_runtime += Compute_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
                cudaThreadSynchronize();

		// If residual is lass than epsilon break
                cudaMemcpy(&OldLamda, Lamda, sizeof(float), cudaMemcpyDeviceToHost);
		printf("GPU lamda at %d: %f \n", i, OldLamda);
		if(abs(OldLamda - temp) < EPS){
			break;
                }
		temp = OldLamda;	
	
	}
    //                                                                        //
    //                                                                        //
    //                                                                        //
    //                                                                        //
    //                                                                        //
    //                                                                        //
    //  ///   //    ///     //    //      //      //        //       //   //  //
    
    

    clock_gettime(CLOCK_REALTIME,&t_end);
    runtime = (t_end.tv_sec - t_start.tv_sec) + 1e-9*(t_end.tv_nsec - t_start.tv_nsec);
    printf("GPU: run time = %f secs.\n",runtime);
    printf("GPU: Av time = %f secs.\n",Av_runtime);
    printf("GPU: compute time = %f secs.\n",Compute_runtime);
    printf("GPU: find time = %f secs.\n",Find_runtime);
    printf("GPU: norm time = %f secs.\n",Norm_runtime);
    // printf("Overall CPU Execution Time: %f (ms) \n", cutGetTimerValue(timer_CPU));
    if (Lamda)
        cudaFree(Lamda);
    Cleanup();
}

void Cleanup(void)
{
    // Free device memory
    if (d_MatA)
        cudaFree(d_MatA);
    if (d_VecV)
        cudaFree(d_VecV);
    if (d_VecW)
        cudaFree(d_VecW);
	  if (d_NormW)
		    cudaFree(d_NormW);

    // Free host memory
    if (h_MatA)
        free(h_MatA);
    if (h_VecV)
        free(h_VecV);
    if (h_VecW)
        free(h_VecW);
    if (h_NormW)
        free(h_NormW);
    
    exit(0);
}

// Allocates an array with zero value.
void InitOne(float* data, int n)
{
    for (int i = 0; i < n; i++)
        data[i] = 0;
	data[0]=1;
}

void UploadArray(float* data, int n)
{
   int total = n*n;
   int value=1;
    for (int i = 0; i < total; i++)
    {
    	data[i] = (int) (rand() % (int)(101));//1;//value;
	    value ++; if(value>n) value =1;
      // data[i] = 1;
    }
}

// Obtain program arguments
void Arguments(int argc, char** argv)
{
    for (int i = 0; i < argc; ++i) 
    {
        if (strcmp(argv[i], "--size") == 0 || strcmp(argv[i], "-size") == 0)
        {
            GlobalSize = atoi(argv[i+1]);
		    i = i + 1;
        }
        if (strcmp(argv[i], "--max_iteration") == 0 || strcmp(argv[i], "-max_iteration") == 0)
        {
            max_iteration = atoi(argv[i+1]);
		    i = i + 1;
        }
    }
}


void checkCardVersion()
{
   cudaDeviceProp prop;
   
   cudaGetDeviceProperties(&prop, 0);
   
   printf("This GPU has major architecture %d, minor %d \n",prop.major,prop.minor);
   if(prop.major < 2)
   {
      fprintf(stderr,"Need compute capability 2 or higher.\n");
      exit(1);
   }
}
// Parse program arguments
void ParseArguments(int argc, char** argv)
{
    for (int i = 0; i < argc; ++i) {
        if (strcmp(argv[i], "--size") == 0 || strcmp(argv[i], "-size") == 0) {
                  GlobalSize = atoi(argv[i+1]);
		  i = i + 1;
        }
    //     if (strcmp(argv[i], "--blocksize") == 0 || strcmp(argv[i], "-blocksize") == 0) {
    //               BlockSize = atoi(argv[i+1]);
		  // i = i + 1;
	// }
    }
}

	.file	"tmpxft_0039d6ae_00000000-6_power_gpu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2040:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2040:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13CPU_AvProductv
	.type	_Z13CPU_AvProductv, @function
_Z13CPU_AvProductv:
.LFB2027:
	.cfi_startproc
	endbr64
	movslq	GlobalSize(%rip), %r8
	movq	h_VecW(%rip), %rsi
	xorl	%eax, %eax
	movq	h_VecV(%rip), %r9
	movq	h_MatA(%rip), %rdi
	movq	%r8, %rcx
	salq	$2, %r8
.L3:
	cmpl	%eax, %ecx
	jle	.L8
	movl	$0x00000000, (%rsi,%rax,4)
	xorl	%edx, %edx
.L4:
	movss	(%rdi,%rdx,4), %xmm0
	mulss	(%r9,%rdx,4), %xmm0
	incq	%rdx
	addss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, (%rsi,%rax,4)
	cmpl	%edx, %ecx
	jg	.L4
	incq	%rax
	addq	%r8, %rdi
	jmp	.L3
.L8:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13CPU_AvProductv, .-_Z13CPU_AvProductv
	.globl	_Z14CPU_NormalizeWv
	.type	_Z14CPU_NormalizeWv, @function
_Z14CPU_NormalizeWv:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rdx
	.cfi_def_cfa_offset 32
	movl	GlobalSize(%rip), %ebx
	movq	h_VecW(%rip), %rbp
.L10:
	cmpl	%eax, %ebx
	jle	.L15
	movss	0(%rbp,%rax,4), %xmm0
	incq	%rax
	mulss	%xmm0, %xmm0
	addss	%xmm0, %xmm1
	jmp	.L10
.L15:
	movaps	%xmm1, %xmm0
	call	sqrtf@PLT
	movq	h_VecV(%rip), %rdx
	xorl	%eax, %eax
.L12:
	cmpl	%eax, %ebx
	jle	.L16
	movss	0(%rbp,%rax,4), %xmm1
	divss	%xmm0, %xmm1
	movss	%xmm1, (%rdx,%rax,4)
	incq	%rax
	jmp	.L12
.L16:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14CPU_NormalizeWv, .-_Z14CPU_NormalizeWv
	.globl	_Z16CPU_ComputeLamdav
	.type	_Z16CPU_ComputeLamdav, @function
_Z16CPU_ComputeLamdav:
.LFB2029:
	.cfi_startproc
	endbr64
	movl	GlobalSize(%rip), %edx
	movq	h_VecV(%rip), %rcx
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
	movq	h_VecW(%rip), %rsi
.L18:
	cmpl	%eax, %edx
	jle	.L20
	movss	(%rcx,%rax,4), %xmm1
	mulss	(%rsi,%rax,4), %xmm1
	incq	%rax
	addss	%xmm1, %xmm0
	jmp	.L18
.L20:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z16CPU_ComputeLamdav, .-_Z16CPU_ComputeLamdav
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"*************************************\n"
.LC2:
	.string	"CPU lamda at %d: %f \n"
	.text
	.globl	_Z17RunCPUPowerMethodv
	.type	_Z17RunCPUPowerMethodv, @function
_Z17RunCPUPowerMethodv:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	.LC1(%rip), %rbp
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rbp, %rsi
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
	xorps	%xmm1, %xmm1
	call	_Z13CPU_AvProductv
.L22:
	cmpl	%ebx, max_iteration(%rip)
	jle	.L26
	movss	%xmm1, 12(%rsp)
	call	_Z14CPU_NormalizeWv
	call	_Z13CPU_AvProductv
	movl	$2, %edi
	call	_Z16CPU_ComputeLamdav
	movl	%ebx, %edx
	leaq	.LC2(%rip), %rsi
	movb	$1, %al
	movaps	%xmm0, %xmm2
	cvtss2sd	%xmm0, %xmm0
	movss	%xmm2, 8(%rsp)
	call	__printf_chk@PLT
	movss	8(%rsp), %xmm2
	movss	12(%rsp), %xmm1
	movss	.LC4(%rip), %xmm0
	subss	%xmm2, %xmm1
	andps	.LC3(%rip), %xmm1
	comiss	%xmm1, %xmm0
	jbe	.L27
.L26:
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L27:
	.cfi_restore_state
	incl	%ebx
	movaps	%xmm2, %xmm1
	jmp	.L22
	.cfi_endproc
.LFE2030:
	.size	_Z17RunCPUPowerMethodv, .-_Z17RunCPUPowerMethodv
	.globl	_Z7Cleanupv
	.type	_Z7Cleanupv, @function
_Z7Cleanupv:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	d_MatA(%rip), %rdi
	testq	%rdi, %rdi
	je	.L30
	call	cudaFree@PLT
.L30:
	movq	d_VecV(%rip), %rdi
	testq	%rdi, %rdi
	je	.L31
	call	cudaFree@PLT
.L31:
	movq	d_VecW(%rip), %rdi
	testq	%rdi, %rdi
	je	.L32
	call	cudaFree@PLT
.L32:
	movq	d_NormW(%rip), %rdi
	testq	%rdi, %rdi
	je	.L33
	call	cudaFree@PLT
.L33:
	movq	h_MatA(%rip), %rdi
	testq	%rdi, %rdi
	je	.L34
	call	free@PLT
.L34:
	movq	h_VecV(%rip), %rdi
	testq	%rdi, %rdi
	je	.L35
	call	free@PLT
.L35:
	movq	h_VecW(%rip), %rdi
	testq	%rdi, %rdi
	je	.L36
	call	free@PLT
.L36:
	movq	h_NormW(%rip), %rdi
	testq	%rdi, %rdi
	je	.L37
	call	free@PLT
.L37:
	xorl	%edi, %edi
	call	exit@PLT
	.cfi_endproc
.LFE2032:
	.size	_Z7Cleanupv, .-_Z7Cleanupv
	.globl	_Z7InitOnePfi
	.type	_Z7InitOnePfi, @function
_Z7InitOnePfi:
.LFB2033:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L64:
	cmpl	%eax, %esi
	jle	.L66
	movl	$0x00000000, (%rdi,%rax,4)
	incq	%rax
	jmp	.L64
.L66:
	movl	$0x3f800000, (%rdi)
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z7InitOnePfi, .-_Z7InitOnePfi
	.globl	_Z11UploadArrayPfi
	.type	_Z11UploadArrayPfi, @function
_Z11UploadArrayPfi:
.LFB2034:
	.cfi_startproc
	endbr64
	imull	%esi, %esi
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	$101, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	movslq	%esi, %rsi
	leaq	(%rdi,%rsi,4), %r12
.L68:
	cmpq	%r12, %rbx
	je	.L71
	call	rand@PLT
	addq	$4, %rbx
	cltd
	idivl	%ebp
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, -4(%rbx)
	jmp	.L68
.L71:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z11UploadArrayPfi, .-_Z11UploadArrayPfi
	.section	.rodata.str1.1
.LC6:
	.string	"--size"
.LC7:
	.string	"-size"
.LC8:
	.string	"--max_iteration"
.LC9:
	.string	"-max_iteration"
	.text
	.globl	_Z9ArgumentsiPPc
	.type	_Z9ArgumentsiPPc, @function
_Z9ArgumentsiPPc:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC9(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	.LC8(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L73:
	cmpl	%r12d, %ebx
	jge	.L86
	movslq	%ebx, %rax
	leaq	.LC6(%rip), %rsi
	movq	0(%rbp,%rax,8), %rdi
	leaq	0(,%rax,8), %r15
	movq	%rdi, 8(%rsp)
	call	strcmp@PLT
	testl	%eax, %eax
	je	.L74
	movq	8(%rsp), %rdi
	leaq	.LC7(%rip), %rsi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L75
.L74:
	movq	8(%rbp,%r15), %rdi
	incl	%ebx
	call	atoi@PLT
	movl	%eax, GlobalSize(%rip)
.L75:
	movslq	%ebx, %rax
	movq	%r13, %rsi
	movq	0(%rbp,%rax,8), %rdi
	leaq	0(,%rax,8), %r15
	movq	%rdi, 8(%rsp)
	call	strcmp@PLT
	testl	%eax, %eax
	je	.L76
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L77
.L76:
	movq	8(%rbp,%r15), %rdi
	incl	%ebx
	call	atoi@PLT
	movl	%eax, max_iteration(%rip)
.L77:
	incl	%ebx
	jmp	.L73
.L86:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z9ArgumentsiPPc, .-_Z9ArgumentsiPPc
	.section	.rodata.str1.1
.LC10:
	.string	"This GPU has major architecture %d, minor %d \n"
.LC11:
	.string	"Need compute capability 2 or higher.\n"
	.text
	.globl	_Z16checkCardVersionv
	.type	_Z16checkCardVersionv, @function
_Z16checkCardVersionv:
.LFB2036:
	.cfi_startproc
	endbr64
	subq	$1048, %rsp
	.cfi_def_cfa_offset 1056
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 1032(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	364(%rsp), %ecx
	xorl	%eax, %eax
	movl	360(%rsp), %edx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$1, 360(%rsp)
	jg	.L87
	movq	stderr(%rip), %rdi
	leaq	.LC11(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L87:
	movq	1032(%rsp), %rax
	subq	%fs:40, %rax
	je	.L89
	call	__stack_chk_fail@PLT
.L89:
	addq	$1048, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z16checkCardVersionv, .-_Z16checkCardVersionv
	.globl	_Z14ParseArgumentsiPPc
	.type	_Z14ParseArgumentsiPPc, @function
_Z14ParseArgumentsiPPc:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC7(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	.LC6(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L92:
	cmpl	%r12d, %ebx
	jge	.L100
	movslq	%ebx, %rax
	movq	%r13, %rsi
	movq	0(%rbp,%rax,8), %rdi
	leaq	0(,%rax,8), %r15
	movq	%rdi, 8(%rsp)
	call	strcmp@PLT
	testl	%eax, %eax
	je	.L93
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L94
.L93:
	movq	8(%rbp,%r15), %rdi
	incl	%ebx
	call	atoi@PLT
	movl	%eax, GlobalSize(%rip)
.L94:
	incl	%ebx
	jmp	.L92
.L100:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z14ParseArgumentsiPPc, .-_Z14ParseArgumentsiPPc
	.globl	_Z35__device_stub__Z10Av_ProductPfS_S_iPfS_S_i
	.type	_Z35__device_stub__Z10Av_ProductPfS_S_iPfS_S_i, @function
_Z35__device_stub__Z10Av_ProductPfS_S_iPfS_S_i:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L101
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10Av_ProductPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L101:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L103
	call	__stack_chk_fail@PLT
.L103:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z35__device_stub__Z10Av_ProductPfS_S_iPfS_S_i, .-_Z35__device_stub__Z10Av_ProductPfS_S_iPfS_S_i
	.globl	_Z10Av_ProductPfS_S_i
	.type	_Z10Av_ProductPfS_S_i, @function
_Z10Av_ProductPfS_S_i:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10Av_ProductPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2063:
	.size	_Z10Av_ProductPfS_S_i, .-_Z10Av_ProductPfS_S_i
	.globl	_Z37__device_stub__Z12ComputeLamdaPfS_S_iPfS_S_i
	.type	_Z37__device_stub__Z12ComputeLamdaPfS_S_iPfS_S_i, @function
_Z37__device_stub__Z12ComputeLamdaPfS_S_iPfS_S_i:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L106
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12ComputeLamdaPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L106:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z37__device_stub__Z12ComputeLamdaPfS_S_iPfS_S_i, .-_Z37__device_stub__Z12ComputeLamdaPfS_S_iPfS_S_i
	.globl	_Z12ComputeLamdaPfS_S_i
	.type	_Z12ComputeLamdaPfS_S_i, @function
_Z12ComputeLamdaPfS_S_i:
.LFB2065:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12ComputeLamdaPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2065:
	.size	_Z12ComputeLamdaPfS_S_i, .-_Z12ComputeLamdaPfS_S_i
	.globl	_Z31__device_stub__Z9FindNormWPfS_iPfS_i
	.type	_Z31__device_stub__Z9FindNormWPfS_iPfS_i, @function
_Z31__device_stub__Z9FindNormWPfS_iPfS_i:
.LFB2066:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L111
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9FindNormWPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L111:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L113
	call	__stack_chk_fail@PLT
.L113:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2066:
	.size	_Z31__device_stub__Z9FindNormWPfS_iPfS_i, .-_Z31__device_stub__Z9FindNormWPfS_iPfS_i
	.globl	_Z9FindNormWPfS_i
	.type	_Z9FindNormWPfS_i, @function
_Z9FindNormWPfS_i:
.LFB2067:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9FindNormWPfS_iPfS_i
	.cfi_endproc
.LFE2067:
	.size	_Z9FindNormWPfS_i, .-_Z9FindNormWPfS_i
	.globl	_Z35__device_stub__Z10NormalizeWPfS_S_iPfS_S_i
	.type	_Z35__device_stub__Z10NormalizeWPfS_S_iPfS_S_i, @function
_Z35__device_stub__Z10NormalizeWPfS_S_iPfS_S_i:
.LFB2068:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L116
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10NormalizeWPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L116:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L118
	call	__stack_chk_fail@PLT
.L118:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2068:
	.size	_Z35__device_stub__Z10NormalizeWPfS_S_iPfS_S_i, .-_Z35__device_stub__Z10NormalizeWPfS_S_iPfS_S_i
	.globl	_Z10NormalizeWPfS_S_i
	.type	_Z10NormalizeWPfS_S_i, @function
_Z10NormalizeWPfS_S_i:
.LFB2069:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10NormalizeWPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2069:
	.size	_Z10NormalizeWPfS_S_i, .-_Z10NormalizeWPfS_S_i
	.section	.rodata.str1.1
.LC13:
	.string	"Matrix size %d X %d \n"
.LC14:
	.string	"Power method in CPU starts\n"
.LC16:
	.string	"CPU: run time = %f secs.\n"
.LC17:
	.string	"Power method in CPU is finished\n"
.LC18:
	.string	"Power method in GPU starts\n"
.LC19:
	.string	"GPU lamda at %d: %f \n"
.LC20:
	.string	"GPU: run time = %f secs.\n"
.LC21:
	.string	"GPU: Av time = %f secs.\n"
.LC22:
	.string	"GPU: compute time = %f secs.\n"
.LC23:
	.string	"GPU: find time = %f secs.\n"
.LC24:
	.string	"GPU: norm time = %f secs.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	68(%rsp), %r15
	call	_Z14ParseArgumentsiPPc
	movslq	GlobalSize(%rip), %r13
	leaq	.LC13(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	movq	%r13, %rbx
	movl	%r13d, %ecx
	movl	%r13d, %edx
	salq	$2, %r13
	call	__printf_chk@PLT
	movl	%ebx, %r14d
	movl	$4, %edi
	call	malloc@PLT
	imull	%ebx, %r14d
	movq	%rax, h_NormW(%rip)
	movslq	%r14d, %r14
	salq	$2, %r14
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, %rbp
	movq	%rax, h_MatA(%rip)
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, h_VecV(%rip)
	call	malloc@PLT
	movq	%rbp, %rdi
	movl	%ebx, %esi
	leaq	104(%rsp), %rbp
	movq	%rax, h_VecW(%rip)
	call	_Z11UploadArrayPfi
	movq	h_VecV(%rip), %rdi
	movl	%ebx, %esi
	call	_Z7InitOnePfi
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	call	_Z17RunCPUPowerMethodv
	leaq	120(%rsp), %rax
	xorl	%edi, %edi
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	clock_gettime@PLT
	movq	128(%rsp), %rax
	subq	112(%rsp), %rax
	leaq	.LC16(%rip), %rsi
	cvtsi2sdq	%rax, %xmm0
	movq	120(%rsp), %rax
	subq	104(%rsp), %rax
	movl	$2, %edi
	mulsd	.LC15(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	movb	$1, %al
	addsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	_Z16checkCardVersionv
	movq	h_VecV(%rip), %rdi
	movl	%ebx, %esi
	call	_Z7InitOnePfi
	movq	%rbp, %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	movl	BlockSize(%rip), %ebp
	movq	%r14, %rsi
	leaq	d_MatA(%rip), %rdi
	movl	$0x00000000, 68(%rsp)
	leal	-1(%rbx,%rbp), %eax
	cltd
	idivl	%ebp
	movl	%eax, %r12d
	xorl	%eax, %eax
	movq	%rax, 72(%rsp)
	call	cudaMalloc@PLT
	movq	%r13, %rsi
	leaq	d_VecV(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%r13, %rsi
	leaq	d_VecW(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$4, %esi
	leaq	d_NormW(%rip), %rdi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	h_MatA(%rip), %rsi
	movl	$1, %ecx
	movq	%r14, %rdx
	movq	d_MatA(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	h_VecV(%rip), %rsi
	movq	%r13, %rdx
	movq	d_VecV(%rip), %rdi
	movl	$1, %ecx
	leaq	136(%rsp), %r13
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	xorl	%edi, %edi
	movq	%r13, %rsi
	call	clock_gettime@PLT
	leal	0(,%rbp,4), %eax
	movl	%ebp, 92(%rsp)
	xorl	%r9d, %r9d
	cltq
	movl	%r12d, 80(%rsp)
	movq	%rax, 16(%rsp)
	movq	16(%rsp), %r8
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movl	100(%rsp), %ecx
	movq	%rax, 84(%rsp)
	movq	92(%rsp), %rdx
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L122
	movq	d_VecW(%rip), %rdx
	movq	d_VecV(%rip), %rsi
	movl	%ebx, %ecx
	movq	d_MatA(%rip), %rdi
	call	_Z35__device_stub__Z10Av_ProductPfS_S_iPfS_S_i
.L122:
	movq	8(%rsp), %rsi
	xorl	%edi, %edi
	xorl	%r14d, %r14d
	call	clock_gettime@PLT
	movq	120(%rsp), %rax
	xorps	%xmm2, %xmm2
	subq	136(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	128(%rsp), %rax
	subq	144(%rsp), %rax
	cvtsi2sdq	%rax, %xmm1
	mulsd	.LC15(%rip), %xmm1
	addsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	addsd	%xmm2, %xmm0
	movsd	%xmm0, 24(%rsp)
	call	cudaThreadSynchronize@PLT
	movl	$0x00000000, 60(%rsp)
	movq	$0x000000000, 48(%rsp)
	movq	$0x000000000, 40(%rsp)
	movq	$0x000000000, 32(%rsp)
.L123:
	cmpl	%r14d, max_iteration(%rip)
	jle	.L128
	xorl	%edi, %edi
	movq	%r13, %rsi
	call	clock_gettime@PLT
	movl	%ebp, 92(%rsp)
	movq	16(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movl	%r12d, 80(%rsp)
	movq	%rax, 96(%rsp)
	movl	100(%rsp), %ecx
	movq	%rax, 84(%rsp)
	movq	92(%rsp), %rdx
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L124
	movq	d_NormW(%rip), %rsi
	movq	d_VecW(%rip), %rdi
	movl	%ebx, %edx
	call	_Z31__device_stub__Z9FindNormWPfS_iPfS_i
.L124:
	movq	8(%rsp), %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	movq	120(%rsp), %rax
	subq	136(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	128(%rsp), %rax
	subq	144(%rsp), %rax
	cvtsi2sdq	%rax, %xmm1
	mulsd	.LC15(%rip), %xmm1
	addsd	32(%rsp), %xmm0
	addsd	%xmm1, %xmm0
	addsd	32(%rsp), %xmm0
	movsd	%xmm0, 32(%rsp)
	call	cudaThreadSynchronize@PLT
	xorl	%edi, %edi
	movq	%r13, %rsi
	call	clock_gettime@PLT
	movl	%ebp, 92(%rsp)
	movq	16(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movl	%r12d, 80(%rsp)
	movq	%rax, 96(%rsp)
	movl	100(%rsp), %ecx
	movq	%rax, 84(%rsp)
	movq	92(%rsp), %rdx
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L125
	movq	d_VecV(%rip), %rdx
	movq	d_NormW(%rip), %rsi
	movl	%ebx, %ecx
	movq	d_VecW(%rip), %rdi
	call	_Z35__device_stub__Z10NormalizeWPfS_S_iPfS_S_i
.L125:
	movq	8(%rsp), %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	movq	120(%rsp), %rax
	subq	136(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	128(%rsp), %rax
	subq	144(%rsp), %rax
	cvtsi2sdq	%rax, %xmm1
	mulsd	.LC15(%rip), %xmm1
	addsd	40(%rsp), %xmm0
	addsd	%xmm1, %xmm0
	addsd	40(%rsp), %xmm0
	movsd	%xmm0, 40(%rsp)
	call	cudaThreadSynchronize@PLT
	xorl	%edi, %edi
	movq	%r13, %rsi
	call	clock_gettime@PLT
	movl	%ebp, 92(%rsp)
	movq	16(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movl	%r12d, 80(%rsp)
	movq	%rax, 96(%rsp)
	movl	100(%rsp), %ecx
	movq	%rax, 84(%rsp)
	movq	92(%rsp), %rdx
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L126
	movq	d_VecW(%rip), %rdx
	movq	d_VecV(%rip), %rsi
	movl	%ebx, %ecx
	movq	d_MatA(%rip), %rdi
	call	_Z35__device_stub__Z10Av_ProductPfS_S_iPfS_S_i
.L126:
	movq	8(%rsp), %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	movq	120(%rsp), %rax
	subq	136(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	128(%rsp), %rax
	subq	144(%rsp), %rax
	cvtsi2sdq	%rax, %xmm1
	mulsd	.LC15(%rip), %xmm1
	addsd	24(%rsp), %xmm0
	addsd	%xmm1, %xmm0
	addsd	24(%rsp), %xmm0
	movsd	%xmm0, 24(%rsp)
	call	cudaThreadSynchronize@PLT
	xorl	%edi, %edi
	movq	%r13, %rsi
	call	clock_gettime@PLT
	movl	%ebp, 92(%rsp)
	movq	16(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movl	%r12d, 80(%rsp)
	movq	%rax, 96(%rsp)
	movl	100(%rsp), %ecx
	movq	%rax, 84(%rsp)
	movq	92(%rsp), %rdx
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L127
	movq	72(%rsp), %rdx
	movq	d_VecW(%rip), %rsi
	movl	%ebx, %ecx
	movq	d_VecV(%rip), %rdi
	call	_Z37__device_stub__Z12ComputeLamdaPfS_S_iPfS_S_i
.L127:
	movq	8(%rsp), %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	movq	120(%rsp), %rax
	subq	136(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	128(%rsp), %rax
	subq	144(%rsp), %rax
	cvtsi2sdq	%rax, %xmm1
	mulsd	.LC15(%rip), %xmm1
	addsd	48(%rsp), %xmm0
	addsd	%xmm1, %xmm0
	addsd	48(%rsp), %xmm0
	movsd	%xmm0, 48(%rsp)
	call	cudaThreadSynchronize@PLT
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%r15, %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	%r14d, %edx
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC19(%rip), %rsi
	cvtss2sd	68(%rsp), %xmm0
	call	__printf_chk@PLT
	movss	68(%rsp), %xmm1
	movss	.LC4(%rip), %xmm2
	movaps	%xmm1, %xmm0
	subss	60(%rsp), %xmm0
	andps	.LC3(%rip), %xmm0
	comiss	%xmm0, %xmm2
	ja	.L128
	incl	%r14d
	movss	%xmm1, 60(%rsp)
	jmp	.L123
.L128:
	movq	8(%rsp), %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	movq	128(%rsp), %rax
	subq	112(%rsp), %rax
	leaq	.LC20(%rip), %rsi
	cvtsi2sdq	%rax, %xmm0
	movq	120(%rsp), %rax
	subq	104(%rsp), %rax
	movl	$2, %edi
	mulsd	.LC15(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	movb	$1, %al
	addsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movsd	24(%rsp), %xmm0
	leaq	.LC21(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movsd	48(%rsp), %xmm0
	leaq	.LC22(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movsd	32(%rsp), %xmm0
	leaq	.LC23(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movsd	40(%rsp), %xmm0
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC24(%rip), %rsi
	call	__printf_chk@PLT
	movq	72(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L130
	call	cudaFree@PLT
.L130:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L131
	call	__stack_chk_fail@PLT
.L131:
	call	_Z7Cleanupv
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC25:
	.string	"_Z10NormalizeWPfS_S_i"
.LC26:
	.string	"_Z9FindNormWPfS_i"
.LC27:
	.string	"_Z12ComputeLamdaPfS_S_i"
.LC28:
	.string	"_Z10Av_ProductPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2071:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10NormalizeWPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9FindNormWPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12ComputeLamdaPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10Av_ProductPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2071:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	max_iteration
	.data
	.align 4
	.type	max_iteration, @object
	.size	max_iteration, 4
max_iteration:
	.long	100
	.globl	BlockSize
	.align 4
	.type	BlockSize, @object
	.size	BlockSize, 4
BlockSize:
	.long	256
	.globl	GlobalSize
	.align 4
	.type	GlobalSize, @object
	.size	GlobalSize, 4
GlobalSize:
	.long	8000
	.globl	d_NormW
	.bss
	.align 8
	.type	d_NormW, @object
	.size	d_NormW, 8
d_NormW:
	.zero	8
	.globl	h_NormW
	.align 8
	.type	h_NormW, @object
	.size	h_NormW, 8
h_NormW:
	.zero	8
	.globl	d_VecW
	.align 8
	.type	d_VecW, @object
	.size	d_VecW, 8
d_VecW:
	.zero	8
	.globl	h_VecW
	.align 8
	.type	h_VecW, @object
	.size	h_VecW, 8
h_VecW:
	.zero	8
	.globl	d_VecV
	.align 8
	.type	d_VecV, @object
	.size	d_VecV, 8
d_VecV:
	.zero	8
	.globl	h_VecV
	.align 8
	.type	h_VecV, @object
	.size	h_VecV, 8
h_VecV:
	.zero	8
	.globl	d_MatA
	.align 8
	.type	d_MatA, @object
	.size	d_MatA, 8
d_MatA:
	.zero	8
	.globl	h_MatA
	.align 8
	.type	h_MatA, @object
	.size	h_MatA, 8
h_MatA:
	.zero	8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC3:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	916964780
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC15:
	.long	-400107883
	.long	1041313291
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// the GPU code can be found in power_gpu.cu
// jiabing jin, sept 2017 
////////////////////////////////////////////


#include <stdio.h>
#include <math.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include "hip/hip_runtime.h"



const int BLOCK_SIZE =256;
// #include "power_gpu.cu"

// Input Array Variables
float* h_MatA = NULL;
float* d_MatA = NULL;

// Output Array
float* h_VecV = NULL;
float* d_VecV = NULL;
float* h_VecW = NULL;
float* d_VecW = NULL;
float* h_NormW = NULL;
float* d_NormW = NULL;

// Variables to change
int GlobalSize = 8000;         // this is the dimension of the matrix, GlobalSize*GlobalSize
int BlockSize = 256;            // number of threads in each block
const float EPS = 0.000005;    // tolerence of the error
int max_iteration = 100;       // the maximum iteration steps


// Functions
void Cleanup(void);
void InitOne(float*, int);
void UploadArray(float*, int);
float CPUReduce(float*, int);
void  Arguments(int, char**);
void checkCardVersion(void);
void ParseArguments(int, char**);

// Kernels
__global__ void Av_Product(float* , float* , float* , int );
__global__ void FindNormW(float* , float* , int );
__global__ void NormalizeW(float* ,float* , int );
__global__ void ComputeLamda( float* ,float* , float* ,int );


void CPU_AvProduct()
{
	int N = GlobalSize;
	int matIndex =0;
    for(int i=0;i<N;i++)
	{
		h_VecW[i] = 0;
		for(int j=0;j<N;j++)
		{
			matIndex = i*N + j;
			h_VecW[i] += h_MatA[matIndex] * h_VecV[j];
			
		}
	}
}

void CPU_NormalizeW()
{
	int N = GlobalSize;
	float normW=0;
	for(int i=0;i<N;i++)
		normW += h_VecW[i] * h_VecW[i];
	
	normW = sqrt(normW);
	for(int i=0;i<N;i++)
		h_VecV[i] = h_VecW[i]/normW;
}

float CPU_ComputeLamda()
{
	int N = GlobalSize;
	float lamda =0;
	for(int i=0;i<N;i++)
		lamda += h_VecV[i] * h_VecW[i];
	
	return lamda;
}

void RunCPUPowerMethod()
{
	printf("*************************************\n");
	float oldLamda =0;
	float lamda=0;
	
	//AvProduct
	CPU_AvProduct();
	
	//power loop
	for (int i=0;i<max_iteration;i++)
	{
		CPU_NormalizeW();
		CPU_AvProduct();
		lamda= CPU_ComputeLamda();
		printf("CPU lamda at %d: %f \n", i, lamda);
		// If residual is lass than epsilon break
		if(abs(oldLamda - lamda) < EPS)
			break;
		oldLamda = lamda;	
	
	}
	printf("*************************************\n");
	
}

__global__ void Av_Product(float* g_MatA, float* g_VecV, float* g_VecW, int N)
{
    // Block index
    int bx = blockIdx.x;

    // Thread index
    int tx = threadIdx.x;

    int aBegin = N * BLOCK_SIZE * bx;
    int aEnd   = aBegin + N - 1;
    int step  = BLOCK_SIZE;

    int bBegin = 0;//BLOCK_SIZE * bx;
    int bIndex=0;
    int aIndex =0;
    float Csub = 0;

    for (int a = aBegin, b = bBegin;
         a <= aEnd;
         a += step, b += step)
    {

        __shared__ float As[BLOCK_SIZE];

        __shared__ float bs[BLOCK_SIZE];
        aIndex = a  + tx;
        if( aIndex < N*N)
        	As[tx] = g_MatA[aIndex];
		else
        	As[tx] = 0;

            bIndex = b+tx;
   	    if(bIndex<N)   
		bs[tx] = g_VecV[bIndex];
	    else
		bs[tx] = 0;

        __syncthreads();

        for (int k = 0; k < BLOCK_SIZE; ++k)
        {
            Csub += As[k] * bs[k];
        }//}
        __syncthreads();
    }

    g_VecW[ BLOCK_SIZE * bx + tx] = Csub;
}

__global__ void ComputeLamda( float* g_VecV, float* g_VecW, float * g_Lamda,int N)
{
  // shared memory size declared at kernel launch
  extern __shared__ float sdataVW[];
  unsigned int tid = threadIdx.x;
  unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;

  // For thread ids greater than data space
  if (globalid < N) {
     sdataVW[tid] =  g_VecV[globalid] * g_VecW[globalid];
  }
  else {
     sdataVW[tid] = 0;  // Case of extra threads above N
  }

  // each thread loads one element from global to shared mem
  __syncthreads();

  // do reduction in shared mem
  for (unsigned int s=blockDim.x / 2; s > 0; s = s >> 1) {
     if (tid < s) {
         sdataVW[tid] = sdataVW[tid] + sdataVW[tid+ s];
     }
     __syncthreads();
  }
   // atomic operations:
  if (tid == 0) atomicAdd(g_Lamda,sdataVW[0]); 
}

__global__ void FindNormW(float* g_VecW, float * g_NormW, int N)
{
  // shared memory size declared at kernel launch
  extern __shared__ float sdata[];
  unsigned int tid = threadIdx.x;
  unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;

  // For thread ids greater than data space
  if (globalid < N) {
     sdata[tid] =  g_VecW[globalid];
  }
  else {
     sdata[tid] = 0;  // Case of extra threads above N
  }

  // each thread loads one element from global to shared mem
  __syncthreads();

  sdata[tid] = sdata[tid] * sdata[tid];
  __syncthreads();

  // do reduction in shared mem
  for (unsigned int s=blockDim.x / 2; s > 0; s = s >> 1) {
     if (tid < s) {
         sdata[tid] = sdata[tid] + sdata[tid+ s];
     }
     __syncthreads();
  }
   // atomic operations:
  if (tid == 0) atomicAdd(g_NormW,sdata[0]);
}

__global__ void NormalizeW(float* g_VecW, float * g_NormW, float* g_VecV, int N)
{
  // shared memory size declared at kernel launch
  extern __shared__ float sNormData[];
  unsigned int tid = threadIdx.x;
  unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;

  if(tid==0) sNormData[0] =  g_NormW[0];
  __syncthreads();

  // For thread ids greater than data space
  if (globalid < N) {
     g_VecV[globalid] = g_VecW[globalid]/sNormData[0];
  }

}

// Host code
int main(int argc, char** argv)
{

    struct timespec t_start,t_end,t_start2;
    double runtime;
    double Av_runtime = 0.0;
    double Find_runtime = 0.0; 
    double Norm_runtime = 0.0; 
    double Compute_runtime = 0.0;
    ParseArguments(argc, argv);
		
    int N = GlobalSize;
    printf("Matrix size %d X %d \n", N, N);
    size_t vec_size = N * sizeof(float);
    size_t mat_size = N * N * sizeof(float);
    size_t norm_size = sizeof(float);
  
    // Allocate normalized value in host memory
    h_NormW = (float*)malloc(norm_size);
    // Allocate input matrix in host memory
    h_MatA = (float*)malloc(mat_size);
    // Allocate initial vector V in host memory
    h_VecV = (float*)malloc(vec_size);
    // Allocate W vector for computations
    h_VecW = (float*)malloc(vec_size);


    // Initialize input matrix
    UploadArray(h_MatA, N);
    InitOne(h_VecV,N);

    printf("Power method in CPU starts\n");	   
    clock_gettime(CLOCK_REALTIME,&t_start);
    RunCPUPowerMethod();   // the lamda is already solved here
    clock_gettime(CLOCK_REALTIME,&t_end);
    runtime = (t_end.tv_sec - t_start.tv_sec) + 1e-9*(t_end.tv_nsec - t_start.tv_nsec);
    printf("CPU: run time = %f secs.\n",runtime);
    printf("Power method in CPU is finished\n");
    
    
    /////////////////////////////////////////////////
    // This is the starting points of GPU
    printf("Power method in GPU starts\n");
    checkCardVersion();

    // Initialize input matrix
    InitOne(h_VecV,N);
    
    clock_gettime(CLOCK_REALTIME,&t_start);  // Here I start to count

    // Set the kernel arguments
    int threadsPerBlock = BlockSize;   
    int sharedMemSize = threadsPerBlock * sizeof(float); // in per block, the memory is shared   
    int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;

    /* Host variables for convergence */
    float OldLamda = 0;
    float temp = 0;

    /* Device variable for convergence */
    float* Lamda = 0;

    // Allocate matrix and vectors in device memory
    hipMalloc((void**)&d_MatA, mat_size); 
    hipMalloc((void**)&d_VecV, vec_size); 
    hipMalloc((void**)&d_VecW, vec_size); // This vector is only used by the device
    hipMalloc((void**)&d_NormW, norm_size); 

    /* Allocate memory for device lamda */
    hipMalloc((void**)&Lamda, sizeof(float));

    //Copy from host memory to device memory
    hipMemcpy(d_MatA, h_MatA, mat_size, hipMemcpyHostToDevice);
    hipMemcpy(d_VecV, h_VecV, vec_size, hipMemcpyHostToDevice);
    hipMemcpy(Lamda, &OldLamda, sizeof(float), hipMemcpyHostToDevice);
	// cutilCheckError(cutStopTimer(timer_mem));
	  
    //Power method loops
    
    clock_gettime(CLOCK_REALTIME,&t_start2);
    
    /* First matrix vector multiplication */
    Av_Product<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_MatA, d_VecV, d_VecW, N);

    /* Measure time for one matrix vector multiplication */
    clock_gettime(CLOCK_REALTIME,&t_end);
    Av_runtime += Av_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
    hipDeviceSynchronize(); //Needed, kind of barrier to sychronize all threads
	
    // This part is the main code of the iteration process for the Power Method in GPU. 
    // Please finish this part based on the given code. Do not forget the command line 
    // cudaThreadSynchronize() after callig the function every time in CUDA to synchoronize the threads
    ////////////////////////////////////////////
    //   ///      //        //            //          //            //        //
    //                                                                        //
	
	//power loop
	for (int i=0;i<max_iteration;i++)
	{
                /* Measure time for creating the normalized vector */
                clock_gettime(CLOCK_REALTIME,&t_start2);
                FindNormW<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_VecW, d_NormW, N);
                clock_gettime(CLOCK_REALTIME,&t_end);
                Find_runtime += Find_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
                hipDeviceSynchronize();

                /* Measure time for normalizing the vector */
                clock_gettime(CLOCK_REALTIME,&t_start2);
		NormalizeW<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_VecW, d_NormW, d_VecV, N);
                clock_gettime(CLOCK_REALTIME,&t_end);
                Norm_runtime += Norm_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
                hipDeviceSynchronize();

                /* Measure time for matrix vector multiplication */
                clock_gettime(CLOCK_REALTIME,&t_start2);
		Av_Product<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_MatA, d_VecV, d_VecW, N);
                clock_gettime(CLOCK_REALTIME,&t_end);
                Av_runtime += Av_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
                hipDeviceSynchronize();
                
                /* Measure time computing the Lamda */
                clock_gettime(CLOCK_REALTIME,&t_start2);
		ComputeLamda<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_VecV, d_VecW, Lamda, N);
                clock_gettime(CLOCK_REALTIME,&t_end);
                Compute_runtime += Compute_runtime + (t_end.tv_sec - t_start2.tv_sec) + 1e-9*(t_end.tv_nsec - t_start2.tv_nsec);
                hipDeviceSynchronize();

		// If residual is lass than epsilon break
                hipMemcpy(&OldLamda, Lamda, sizeof(float), hipMemcpyDeviceToHost);
		printf("GPU lamda at %d: %f \n", i, OldLamda);
		if(abs(OldLamda - temp) < EPS){
			break;
                }
		temp = OldLamda;	
	
	}
    //                                                                        //
    //                                                                        //
    //                                                                        //
    //                                                                        //
    //                                                                        //
    //                                                                        //
    //  ///   //    ///     //    //      //      //        //       //   //  //
    
    

    clock_gettime(CLOCK_REALTIME,&t_end);
    runtime = (t_end.tv_sec - t_start.tv_sec) + 1e-9*(t_end.tv_nsec - t_start.tv_nsec);
    printf("GPU: run time = %f secs.\n",runtime);
    printf("GPU: Av time = %f secs.\n",Av_runtime);
    printf("GPU: compute time = %f secs.\n",Compute_runtime);
    printf("GPU: find time = %f secs.\n",Find_runtime);
    printf("GPU: norm time = %f secs.\n",Norm_runtime);
    // printf("Overall CPU Execution Time: %f (ms) \n", cutGetTimerValue(timer_CPU));
    if (Lamda)
        hipFree(Lamda);
    Cleanup();
}

void Cleanup(void)
{
    // Free device memory
    if (d_MatA)
        hipFree(d_MatA);
    if (d_VecV)
        hipFree(d_VecV);
    if (d_VecW)
        hipFree(d_VecW);
	  if (d_NormW)
		    hipFree(d_NormW);

    // Free host memory
    if (h_MatA)
        free(h_MatA);
    if (h_VecV)
        free(h_VecV);
    if (h_VecW)
        free(h_VecW);
    if (h_NormW)
        free(h_NormW);
    
    exit(0);
}

// Allocates an array with zero value.
void InitOne(float* data, int n)
{
    for (int i = 0; i < n; i++)
        data[i] = 0;
	data[0]=1;
}

void UploadArray(float* data, int n)
{
   int total = n*n;
   int value=1;
    for (int i = 0; i < total; i++)
    {
    	data[i] = (int) (rand() % (int)(101));//1;//value;
	    value ++; if(value>n) value =1;
      // data[i] = 1;
    }
}

// Obtain program arguments
void Arguments(int argc, char** argv)
{
    for (int i = 0; i < argc; ++i) 
    {
        if (strcmp(argv[i], "--size") == 0 || strcmp(argv[i], "-size") == 0)
        {
            GlobalSize = atoi(argv[i+1]);
		    i = i + 1;
        }
        if (strcmp(argv[i], "--max_iteration") == 0 || strcmp(argv[i], "-max_iteration") == 0)
        {
            max_iteration = atoi(argv[i+1]);
		    i = i + 1;
        }
    }
}


void checkCardVersion()
{
   hipDeviceProp_t prop;
   
   hipGetDeviceProperties(&prop, 0);
   
   printf("This GPU has major architecture %d, minor %d \n",prop.major,prop.minor);
   if(prop.major < 2)
   {
      fprintf(stderr,"Need compute capability 2 or higher.\n");
      exit(1);
   }
}
// Parse program arguments
void ParseArguments(int argc, char** argv)
{
    for (int i = 0; i < argc; ++i) {
        if (strcmp(argv[i], "--size") == 0 || strcmp(argv[i], "-size") == 0) {
                  GlobalSize = atoi(argv[i+1]);
		  i = i + 1;
        }
    //     if (strcmp(argv[i], "--blocksize") == 0 || strcmp(argv[i], "-blocksize") == 0) {
    //               BlockSize = atoi(argv[i+1]);
		  // i = i + 1;
	// }
    }
}

	.text
	.file	"power_gpu.hip"
	.globl	_Z13CPU_AvProductv              # -- Begin function _Z13CPU_AvProductv
	.type	_Z13CPU_AvProductv,@function
_Z13CPU_AvProductv:                     # @_Z13CPU_AvProductv
	.cfi_startproc
# %bb.0:
	movl	GlobalSize(%rip), %eax
	testl	%eax, %eax
	jle	.LBB0_5
# %bb.1:                                # %.lr.ph18
	movq	h_VecW(%rip), %rcx
	movq	h_MatA(%rip), %rdx
	xorl	%esi, %esi
	movq	h_VecV(%rip), %rdi
	xorl	%r8d, %r8d
.LBB0_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	movl	%esi, %r9d
	leaq	(%rdx,%r9,4), %r9
	movl	$0, (%rcx,%r8,4)
	xorps	%xmm0, %xmm0
	xorl	%r10d, %r10d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r9,%r10,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdi,%r10,4), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%rcx,%r8,4)
	incq	%r10
	cmpq	%r10, %rax
	jne	.LBB0_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r8
	addl	%eax, %esi
	cmpq	%rax, %r8
	jne	.LBB0_2
.LBB0_5:                                # %._crit_edge19
	retq
.Lfunc_end0:
	.size	_Z13CPU_AvProductv, .Lfunc_end0-_Z13CPU_AvProductv
	.cfi_endproc
                                        # -- End function
	.globl	_Z14CPU_NormalizeWv             # -- Begin function _Z14CPU_NormalizeWv
	.type	_Z14CPU_NormalizeWv,@function
_Z14CPU_NormalizeWv:                    # @_Z14CPU_NormalizeWv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	GlobalSize(%rip), %ebx
	testl	%ebx, %ebx
	jle	.LBB1_9
# %bb.1:                                # %.lr.ph
	xorps	%xmm0, %xmm0
	movq	h_VecW(%rip), %rax
	xorl	%ecx, %ecx
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movss	(%rax,%rcx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	incq	%rcx
	cmpq	%rcx, %rbx
	jne	.LBB1_2
# %bb.3:                                # %._crit_edge
	xorps	%xmm1, %xmm1
	ucomiss	%xmm1, %xmm0
	jb	.LBB1_5
# %bb.4:
	sqrtss	%xmm0, %xmm0
	jmp	.LBB1_6
.LBB1_5:                                # %call.sqrt
	callq	sqrtf
.LBB1_6:                                # %._crit_edge.split
	testl	%ebx, %ebx
	jle	.LBB1_9
# %bb.7:                                # %.lr.ph19
	movq	h_VecW(%rip), %rax
	movq	h_VecV(%rip), %rcx
	xorl	%edx, %edx
.LBB1_8:                                # =>This Inner Loop Header: Depth=1
	movss	(%rax,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rbx
	jne	.LBB1_8
.LBB1_9:                                # %._crit_edge20
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z14CPU_NormalizeWv, .Lfunc_end1-_Z14CPU_NormalizeWv
	.cfi_endproc
                                        # -- End function
	.globl	_Z16CPU_ComputeLamdav           # -- Begin function _Z16CPU_ComputeLamdav
	.type	_Z16CPU_ComputeLamdav,@function
_Z16CPU_ComputeLamdav:                  # @_Z16CPU_ComputeLamdav
	.cfi_startproc
# %bb.0:
	movl	GlobalSize(%rip), %eax
	testl	%eax, %eax
	jle	.LBB2_1
# %bb.3:                                # %.lr.ph
	movq	h_VecV(%rip), %rcx
	xorps	%xmm0, %xmm0
	movq	h_VecW(%rip), %rdx
	xorl	%esi, %esi
.LBB2_4:                                # =>This Inner Loop Header: Depth=1
	movss	(%rcx,%rsi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdx,%rsi,4), %xmm1
	addss	%xmm1, %xmm0
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB2_4
# %bb.2:                                # %._crit_edge
	retq
.LBB2_1:
	xorps	%xmm0, %xmm0
	retq
.Lfunc_end2:
	.size	_Z16CPU_ComputeLamdav, .Lfunc_end2-_Z16CPU_ComputeLamdav
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z17RunCPUPowerMethodv
.LCPI3_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_1:
	.long	0x36a7c5ac                      # float 4.99999987E-6
	.text
	.globl	_Z17RunCPUPowerMethodv
	.type	_Z17RunCPUPowerMethodv,@function
_Z17RunCPUPowerMethodv:                 # @_Z17RunCPUPowerMethodv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	callq	_Z13CPU_AvProductv
	cmpl	$0, max_iteration(%rip)
	jle	.LBB3_7
# %bb.1:                                # %.lr.ph.preheader
	xorps	%xmm0, %xmm0
	xorl	%ebx, %ebx
.LBB3_3:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
	movaps	%xmm0, 16(%rsp)                 # 16-byte Spill
	callq	_Z14CPU_NormalizeWv
	callq	_Z13CPU_AvProductv
	movl	GlobalSize(%rip), %eax
	xorps	%xmm1, %xmm1
	testl	%eax, %eax
	jle	.LBB3_6
# %bb.4:                                # %.lr.ph.i
                                        #   in Loop: Header=BB3_3 Depth=1
	movq	h_VecV(%rip), %rcx
	movq	h_VecW(%rip), %rdx
	xorl	%esi, %esi
.LBB3_5:                                #   Parent Loop BB3_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rsi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	(%rdx,%rsi,4), %xmm0
	addss	%xmm0, %xmm1
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB3_5
.LBB3_6:                                # %_Z16CPU_ComputeLamdav.exit
                                        #   in Loop: Header=BB3_3 Depth=1
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	movss	12(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movaps	16(%rsp), %xmm1                 # 16-byte Reload
	subss	%xmm2, %xmm1
	andps	.LCPI3_0(%rip), %xmm1
	movss	.LCPI3_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	ja	.LBB3_7
# %bb.2:                                #   in Loop: Header=BB3_3 Depth=1
	incl	%ebx
	movaps	%xmm2, %xmm0
	cmpl	max_iteration(%rip), %ebx
	jl	.LBB3_3
.LBB3_7:                                # %_Z16CPU_ComputeLamdav.exit._crit_edge
	movl	$.Lstr.1, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end3:
	.size	_Z17RunCPUPowerMethodv, .Lfunc_end3-_Z17RunCPUPowerMethodv
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__Av_ProductPfS_S_i # -- Begin function _Z25__device_stub__Av_ProductPfS_S_i
	.type	_Z25__device_stub__Av_ProductPfS_S_i,@function
_Z25__device_stub__Av_ProductPfS_S_i:   # @_Z25__device_stub__Av_ProductPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10Av_ProductPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__Av_ProductPfS_S_i, .Lfunc_end4-_Z25__device_stub__Av_ProductPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__ComputeLamdaPfS_S_i # -- Begin function _Z27__device_stub__ComputeLamdaPfS_S_i
	.type	_Z27__device_stub__ComputeLamdaPfS_S_i,@function
_Z27__device_stub__ComputeLamdaPfS_S_i: # @_Z27__device_stub__ComputeLamdaPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12ComputeLamdaPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z27__device_stub__ComputeLamdaPfS_S_i, .Lfunc_end5-_Z27__device_stub__ComputeLamdaPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__FindNormWPfS_i # -- Begin function _Z24__device_stub__FindNormWPfS_i
	.type	_Z24__device_stub__FindNormWPfS_i,@function
_Z24__device_stub__FindNormWPfS_i:      # @_Z24__device_stub__FindNormWPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9FindNormWPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z24__device_stub__FindNormWPfS_i, .Lfunc_end6-_Z24__device_stub__FindNormWPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__NormalizeWPfS_S_i # -- Begin function _Z25__device_stub__NormalizeWPfS_S_i
	.type	_Z25__device_stub__NormalizeWPfS_S_i,@function
_Z25__device_stub__NormalizeWPfS_S_i:   # @_Z25__device_stub__NormalizeWPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10NormalizeWPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z25__device_stub__NormalizeWPfS_S_i, .Lfunc_end7-_Z25__device_stub__NormalizeWPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI8_0:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI8_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI8_2:
	.long	0x36a7c5ac                      # float 4.99999987E-6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	callq	_Z14ParseArgumentsiPPc
	movslq	GlobalSize(%rip), %r15
	xorl	%ebp, %ebp
	movl	$.L.str.2, %edi
	movl	%r15d, %esi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	printf
	leaq	(,%r15,4), %rbx
	movl	%r15d, %r12d
	imull	%r12d, %r12d
	leaq	(,%r12,4), %r14
	movl	$4, %edi
	callq	malloc
	movq	%rax, h_NormW(%rip)
	movq	%r14, 64(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rax, h_MatA(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rax, h_VecV(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movl	%r15d, %ecx
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
	movq	%rax, h_VecW(%rip)
	testq	%r15, %r15
	je	.LBB8_6
# %bb.1:                                # %.lr.ph.preheader.i
	cmpl	$1, %r12d
	adcl	$0, %r12d
	xorl	%r15d, %r15d
.LBB8_2:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$680390859, %rax, %rcx          # imm = 0x288DF0CB
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$36, %rcx
	addl	%edx, %ecx
	imull	$101, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB8_2
# %bb.3:                                # %_Z11UploadArrayPfi.exit
	movq	h_VecV(%rip), %r13
	movq	56(%rsp), %rax                  # 8-byte Reload
	testl	%eax, %eax
	jle	.LBB8_4
# %bb.5:                                # %.lr.ph.preheader.i98
	leaq	(,%rax,4), %rdx
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movb	$1, %bpl
	jmp	.LBB8_6
.LBB8_4:
	xorl	%ebp, %ebp
.LBB8_6:                                # %_Z7InitOnePfi.exit
	movl	$1065353216, (%r13)             # imm = 0x3F800000
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	leaq	168(%rsp), %r14
	xorl	%edi, %edi
	movq	%r14, %rsi
	callq	clock_gettime
	callq	_Z17RunCPUPowerMethodv
	leaq	24(%rsp), %r15
	xorl	%edi, %edi
	movq	%r15, %rsi
	callq	clock_gettime
	movq	(%r15), %rax
	movq	8(%r15), %rcx
	subq	(%r14), %rax
	cvtsi2sd	%rax, %xmm1
	subq	8(%r14), %rcx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rcx, %xmm0
	mulsd	.LCPI8_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	callq	_Z16checkCardVersionv
	movq	h_VecV(%rip), %r14
	testb	%bpl, %bpl
	je	.LBB8_8
# %bb.7:                                # %.lr.ph.preheader.i99
	movq	56(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rdx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB8_8:                                # %_Z7InitOnePfi.exit100
	movl	$1065353216, (%r14)             # imm = 0x3F800000
	leaq	168(%rsp), %rsi
	xorl	%edi, %edi
	callq	clock_gettime
	movl	BlockSize(%rip), %r13d
	leal	(,%r13,4), %eax
	movl	%eax, 16(%rsp)                  # 4-byte Spill
	movq	56(%rsp), %r14                  # 8-byte Reload
	leal	(%r14,%r13), %eax
	decl	%eax
	cltd
	idivl	%r13d
	movl	%eax, %r15d
	leaq	12(%rsp), %rax
	movl	$0, (%rax)
	leaq	88(%rsp), %rbp
	movq	$0, (%rbp)
	movl	$d_MatA, %edi
	movq	64(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$d_VecV, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$d_VecW, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$d_NormW, %edi
	movl	$4, %esi
	callq	hipMalloc
	movl	$4, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	d_MatA(%rip), %rdi
	movq	h_MatA(%rip), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	d_VecV(%rip), %rdi
	movq	h_VecV(%rip), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$4, %edx
	leaq	12(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rsi
	xorl	%edi, %edi
	callq	clock_gettime
	movslq	16(%rsp), %r8                   # 4-byte Folded Reload
	btsq	$32, %r15
	btsq	$32, %r13
	movq	%r15, 112(%rsp)                 # 8-byte Spill
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, 120(%rsp)                 # 8-byte Spill
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r8, 104(%rsp)                  # 8-byte Spill
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_10
# %bb.9:
	movq	d_MatA(%rip), %rdi
	movq	d_VecV(%rip), %rsi
	movq	d_VecW(%rip), %rdx
	movl	%r14d, %ecx
	callq	_Z25__device_stub__Av_ProductPfS_S_i
.LBB8_10:
	xorl	%r15d, %r15d
	leaq	24(%rsp), %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	subq	40(%rsp), %rax
	cvtsi2sd	%rax, %xmm0
	subq	48(%rsp), %rcx
	cvtsi2sd	%rcx, %xmm1
	mulsd	.LCPI8_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 64(%rsp)                 # 8-byte Spill
	callq	hipDeviceSynchronize
	cmpl	$0, max_iteration(%rip)
	jle	.LBB8_11
# %bb.12:                               # %.lr.ph.preheader
	xorpd	%xmm1, %xmm1
	xorpd	%xmm0, %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %rbp
	movsd	%xmm0, 80(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	movq	112(%rsp), %r12                 # 8-byte Reload
	movq	104(%rsp), %r13                 # 8-byte Reload
.LBB8_14:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm1, 100(%rsp)                # 4-byte Spill
	movq	%r15, 160(%rsp)                 # 8-byte Spill
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	%r12, %rdi
	movl	$1, %esi
	movq	120(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r13, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_16
# %bb.15:                               #   in Loop: Header=BB8_14 Depth=1
	movq	d_VecW(%rip), %rdi
	movq	d_NormW(%rip), %rsi
	movl	%r14d, %edx
	callq	_Z24__device_stub__FindNormWPfS_i
.LBB8_16:                               #   in Loop: Header=BB8_14 Depth=1
	xorl	%edi, %edi
	movq	%rbp, %rsi
	callq	clock_gettime
	movq	24(%rsp), %rcx
	movq	32(%rsp), %rax
	subq	40(%rsp), %rcx
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	subq	48(%rsp), %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	movsd	.LCPI8_0(%rip), %xmm0           # xmm0 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 144(%rsp)                # 8-byte Spill
	callq	hipDeviceSynchronize
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r13, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_18
# %bb.17:                               #   in Loop: Header=BB8_14 Depth=1
	movq	d_VecW(%rip), %rdi
	movq	d_NormW(%rip), %rsi
	movq	d_VecV(%rip), %rdx
	movl	%r14d, %ecx
	callq	_Z25__device_stub__NormalizeWPfS_S_i
.LBB8_18:                               #   in Loop: Header=BB8_14 Depth=1
	xorl	%edi, %edi
	movq	%rbp, %rsi
	callq	clock_gettime
	movq	24(%rsp), %rbp
	movq	32(%rsp), %rax
	subq	40(%rsp), %rbp
	subq	48(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI8_0(%rip), %xmm0
	movsd	%xmm0, 136(%rsp)                # 8-byte Spill
	callq	hipDeviceSynchronize
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r13, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_20
# %bb.19:                               #   in Loop: Header=BB8_14 Depth=1
	movq	d_MatA(%rip), %rdi
	movq	d_VecV(%rip), %rsi
	movq	d_VecW(%rip), %rdx
	movl	%r14d, %ecx
	callq	_Z25__device_stub__Av_ProductPfS_S_i
.LBB8_20:                               #   in Loop: Header=BB8_14 Depth=1
	xorl	%edi, %edi
	leaq	24(%rsp), %rsi
	callq	clock_gettime
	movq	24(%rsp), %r14
	movq	32(%rsp), %rax
	subq	40(%rsp), %r14
	subq	48(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI8_0(%rip), %xmm0
	movsd	%xmm0, 128(%rsp)                # 8-byte Spill
	callq	hipDeviceSynchronize
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r13, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_22
# %bb.21:                               #   in Loop: Header=BB8_14 Depth=1
	movq	d_VecV(%rip), %rdi
	movq	d_VecW(%rip), %rsi
	movq	88(%rsp), %rdx
	movq	56(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z27__device_stub__ComputeLamdaPfS_S_i
.LBB8_22:                               #   in Loop: Header=BB8_14 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	152(%rsp), %xmm0        # 8-byte Folded Reload
	movsd	16(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	addsd	%xmm1, %xmm0
	addsd	144(%rsp), %xmm0                # 8-byte Folded Reload
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rbp, %xmm0
	movsd	80(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	addsd	%xmm2, %xmm0
	addsd	136(%rsp), %xmm0                # 8-byte Folded Reload
	xorps	%xmm1, %xmm1
	cvtsi2sd	%r14, %xmm1
	addsd	%xmm0, %xmm2
	movsd	%xmm2, 80(%rsp)                 # 8-byte Spill
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	%xmm0, %xmm1
	addsd	128(%rsp), %xmm1                # 8-byte Folded Reload
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	xorl	%edi, %edi
	leaq	24(%rsp), %rbp
	movq	%rbp, %rsi
	callq	clock_gettime
	movq	24(%rsp), %rax
	movq	32(%rsp), %rcx
	subq	40(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	subq	48(%rsp), %rcx
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rcx, %xmm1
	movsd	72(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	addsd	%xmm2, %xmm0
	mulsd	.LCPI8_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	addsd	%xmm1, %xmm2
	movsd	%xmm2, 72(%rsp)                 # 8-byte Spill
	callq	hipDeviceSynchronize
	movq	88(%rsp), %rsi
	movl	$4, %edx
	leaq	12(%rsp), %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0
	movl	$.L.str.7, %edi
	movq	160(%rsp), %r15                 # 8-byte Reload
	movl	%r15d, %esi
	movb	$1, %al
	callq	printf
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movaps	%xmm0, %xmm1
	subss	100(%rsp), %xmm1                # 4-byte Folded Reload
	andps	.LCPI8_1(%rip), %xmm1
	movss	.LCPI8_2(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm2
	ja	.LBB8_23
# %bb.13:                               #   in Loop: Header=BB8_14 Depth=1
	incl	%r15d
	movaps	%xmm0, %xmm1
	cmpl	max_iteration(%rip), %r15d
	movq	56(%rsp), %r14                  # 8-byte Reload
	leaq	40(%rsp), %rbx
	jl	.LBB8_14
	jmp	.LBB8_23
.LBB8_11:
	xorpd	%xmm0, %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 80(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
.LBB8_23:                               # %._crit_edge
	leaq	24(%rsp), %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	subq	168(%rsp), %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	subq	176(%rsp), %rcx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rcx, %xmm0
	mulsd	.LCPI8_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.9, %edi
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.10, %edi
	movsd	72(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.11, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.12, %edi
	movsd	80(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movq	88(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB8_25
# %bb.24:
	callq	hipFree
.LBB8_25:
	callq	_Z7Cleanupv
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z14ParseArgumentsiPPc          # -- Begin function _Z14ParseArgumentsiPPc
	.type	_Z14ParseArgumentsiPPc,@function
_Z14ParseArgumentsiPPc:                 # @_Z14ParseArgumentsiPPc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB9_7
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	xorl	%r15d, %r15d
.LBB9_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movslq	%r15d, %r12
	movq	(%rbx,%r12,8), %r14
	movl	$.L.str.13, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB9_4
# %bb.3:                                #   in Loop: Header=BB9_2 Depth=1
	movl	$.L.str.14, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB9_5
.LBB9_4:                                #   in Loop: Header=BB9_2 Depth=1
	leal	1(%r12), %r15d
	movq	8(%rbx,%r12,8), %rdi
	callq	atoi
	movl	%eax, GlobalSize(%rip)
.LBB9_5:                                #   in Loop: Header=BB9_2 Depth=1
	incl	%r15d
	cmpl	%ebp, %r15d
	jl	.LBB9_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB9_7:                                # %._crit_edge
	retq
.Lfunc_end9:
	.size	_Z14ParseArgumentsiPPc, .Lfunc_end9-_Z14ParseArgumentsiPPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z11UploadArrayPfi              # -- Begin function _Z11UploadArrayPfi
	.type	_Z11UploadArrayPfi,@function
_Z11UploadArrayPfi:                     # @_Z11UploadArrayPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	je	.LBB10_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	imull	%ebx, %ebx
	cmpl	$1, %ebx
	adcl	$0, %ebx
	xorl	%r15d, %r15d
.LBB10_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$680390859, %rax, %rcx          # imm = 0x288DF0CB
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$36, %rcx
	addl	%edx, %ecx
	imull	$101, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB10_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB10_4:                               # %._crit_edge
	retq
.Lfunc_end10:
	.size	_Z11UploadArrayPfi, .Lfunc_end10-_Z11UploadArrayPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z7InitOnePfi                   # -- Begin function _Z7InitOnePfi
	.type	_Z7InitOnePfi,@function
_Z7InitOnePfi:                          # @_Z7InitOnePfi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	testl	%esi, %esi
	jle	.LBB11_2
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %edx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB11_2:                               # %._crit_edge
	movl	$1065353216, (%rbx)             # imm = 0x3F800000
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z7InitOnePfi, .Lfunc_end11-_Z7InitOnePfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z16checkCardVersionv           # -- Begin function _Z16checkCardVersionv
	.type	_Z16checkCardVersionv,@function
_Z16checkCardVersionv:                  # @_Z16checkCardVersionv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 1488
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	360(%rbx), %esi
	movl	364(%rbx), %edx
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$1, 360(%rbx)
	jle	.LBB12_2
# %bb.1:
	addq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB12_2:
	.cfi_def_cfa_offset 1488
	movq	stderr(%rip), %rcx
	movl	$.L.str.18, %edi
	movl	$37, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end12:
	.size	_Z16checkCardVersionv, .Lfunc_end12-_Z16checkCardVersionv
	.cfi_endproc
                                        # -- End function
	.globl	_Z7Cleanupv                     # -- Begin function _Z7Cleanupv
	.type	_Z7Cleanupv,@function
_Z7Cleanupv:                            # @_Z7Cleanupv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	d_MatA(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_2
# %bb.1:
	callq	hipFree
.LBB13_2:
	movq	d_VecV(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_4
# %bb.3:
	callq	hipFree
.LBB13_4:
	movq	d_VecW(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_6
# %bb.5:
	callq	hipFree
.LBB13_6:
	movq	d_NormW(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_8
# %bb.7:
	callq	hipFree
.LBB13_8:
	movq	h_MatA(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_10
# %bb.9:
	callq	free
.LBB13_10:
	movq	h_VecV(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_12
# %bb.11:
	callq	free
.LBB13_12:
	movq	h_VecW(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_14
# %bb.13:
	callq	free
.LBB13_14:
	movq	h_NormW(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_16
# %bb.15:
	callq	free
.LBB13_16:
	xorl	%edi, %edi
	callq	exit
.Lfunc_end13:
	.size	_Z7Cleanupv, .Lfunc_end13-_Z7Cleanupv
	.cfi_endproc
                                        # -- End function
	.globl	_Z9ArgumentsiPPc                # -- Begin function _Z9ArgumentsiPPc
	.type	_Z9ArgumentsiPPc,@function
_Z9ArgumentsiPPc:                       # @_Z9ArgumentsiPPc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB14_10
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	xorl	%r15d, %r15d
.LBB14_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movslq	%r15d, %r12
	movq	(%rbx,%r12,8), %r14
	movl	$.L.str.13, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB14_4
# %bb.3:                                #   in Loop: Header=BB14_2 Depth=1
	movl	$.L.str.14, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB14_5
.LBB14_4:                               #   in Loop: Header=BB14_2 Depth=1
	leal	1(%r12), %r15d
	movq	8(%rbx,%r12,8), %r14
	movq	%r14, %rdi
	callq	atoi
	movl	%eax, GlobalSize(%rip)
.LBB14_5:                               #   in Loop: Header=BB14_2 Depth=1
	movl	$.L.str.15, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB14_7
# %bb.6:                                #   in Loop: Header=BB14_2 Depth=1
	movl	$.L.str.16, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB14_8
.LBB14_7:                               #   in Loop: Header=BB14_2 Depth=1
	movslq	%r15d, %rax
	incl	%r15d
	movq	8(%rbx,%rax,8), %rdi
	callq	atoi
	movl	%eax, max_iteration(%rip)
.LBB14_8:                               #   in Loop: Header=BB14_2 Depth=1
	incl	%r15d
	cmpl	%ebp, %r15d
	jl	.LBB14_2
# %bb.9:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB14_10:                              # %._crit_edge
	retq
.Lfunc_end14:
	.size	_Z9ArgumentsiPPc, .Lfunc_end14-_Z9ArgumentsiPPc
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB15_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB15_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10Av_ProductPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12ComputeLamdaPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9FindNormWPfS_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10NormalizeWPfS_S_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end15:
	.size	__hip_module_ctor, .Lfunc_end15-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB16_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB16_2:
	retq
.Lfunc_end16:
	.size	__hip_module_dtor, .Lfunc_end16-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	h_MatA,@object                  # @h_MatA
	.bss
	.globl	h_MatA
	.p2align	3, 0x0
h_MatA:
	.quad	0
	.size	h_MatA, 8

	.type	d_MatA,@object                  # @d_MatA
	.globl	d_MatA
	.p2align	3, 0x0
d_MatA:
	.quad	0
	.size	d_MatA, 8

	.type	h_VecV,@object                  # @h_VecV
	.globl	h_VecV
	.p2align	3, 0x0
h_VecV:
	.quad	0
	.size	h_VecV, 8

	.type	d_VecV,@object                  # @d_VecV
	.globl	d_VecV
	.p2align	3, 0x0
d_VecV:
	.quad	0
	.size	d_VecV, 8

	.type	h_VecW,@object                  # @h_VecW
	.globl	h_VecW
	.p2align	3, 0x0
h_VecW:
	.quad	0
	.size	h_VecW, 8

	.type	d_VecW,@object                  # @d_VecW
	.globl	d_VecW
	.p2align	3, 0x0
d_VecW:
	.quad	0
	.size	d_VecW, 8

	.type	h_NormW,@object                 # @h_NormW
	.globl	h_NormW
	.p2align	3, 0x0
h_NormW:
	.quad	0
	.size	h_NormW, 8

	.type	d_NormW,@object                 # @d_NormW
	.globl	d_NormW
	.p2align	3, 0x0
d_NormW:
	.quad	0
	.size	d_NormW, 8

	.type	GlobalSize,@object              # @GlobalSize
	.data
	.globl	GlobalSize
	.p2align	2, 0x0
GlobalSize:
	.long	8000                            # 0x1f40
	.size	GlobalSize, 4

	.type	BlockSize,@object               # @BlockSize
	.globl	BlockSize
	.p2align	2, 0x0
BlockSize:
	.long	256                             # 0x100
	.size	BlockSize, 4

	.type	max_iteration,@object           # @max_iteration
	.globl	max_iteration
	.p2align	2, 0x0
max_iteration:
	.long	100                             # 0x64
	.size	max_iteration, 4

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"CPU lamda at %d: %f \n"
	.size	.L.str.1, 22

	.type	_Z10Av_ProductPfS_S_i,@object   # @_Z10Av_ProductPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10Av_ProductPfS_S_i
	.p2align	3, 0x0
_Z10Av_ProductPfS_S_i:
	.quad	_Z25__device_stub__Av_ProductPfS_S_i
	.size	_Z10Av_ProductPfS_S_i, 8

	.type	_Z12ComputeLamdaPfS_S_i,@object # @_Z12ComputeLamdaPfS_S_i
	.globl	_Z12ComputeLamdaPfS_S_i
	.p2align	3, 0x0
_Z12ComputeLamdaPfS_S_i:
	.quad	_Z27__device_stub__ComputeLamdaPfS_S_i
	.size	_Z12ComputeLamdaPfS_S_i, 8

	.type	_Z9FindNormWPfS_i,@object       # @_Z9FindNormWPfS_i
	.globl	_Z9FindNormWPfS_i
	.p2align	3, 0x0
_Z9FindNormWPfS_i:
	.quad	_Z24__device_stub__FindNormWPfS_i
	.size	_Z9FindNormWPfS_i, 8

	.type	_Z10NormalizeWPfS_S_i,@object   # @_Z10NormalizeWPfS_S_i
	.globl	_Z10NormalizeWPfS_S_i
	.p2align	3, 0x0
_Z10NormalizeWPfS_S_i:
	.quad	_Z25__device_stub__NormalizeWPfS_S_i
	.size	_Z10NormalizeWPfS_S_i, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Matrix size %d X %d \n"
	.size	.L.str.2, 22

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CPU: run time = %f secs.\n"
	.size	.L.str.4, 26

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"GPU lamda at %d: %f \n"
	.size	.L.str.7, 22

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"GPU: run time = %f secs.\n"
	.size	.L.str.8, 26

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"GPU: Av time = %f secs.\n"
	.size	.L.str.9, 25

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"GPU: compute time = %f secs.\n"
	.size	.L.str.10, 30

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"GPU: find time = %f secs.\n"
	.size	.L.str.11, 27

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"GPU: norm time = %f secs.\n"
	.size	.L.str.12, 27

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"--size"
	.size	.L.str.13, 7

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"-size"
	.size	.L.str.14, 6

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"--max_iteration"
	.size	.L.str.15, 16

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"-max_iteration"
	.size	.L.str.16, 15

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"This GPU has major architecture %d, minor %d \n"
	.size	.L.str.17, 47

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Need compute capability 2 or higher.\n"
	.size	.L.str.18, 38

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10Av_ProductPfS_S_i"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12ComputeLamdaPfS_S_i"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9FindNormWPfS_i"
	.size	.L__unnamed_3, 18

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z10NormalizeWPfS_S_i"
	.size	.L__unnamed_4, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"*************************************"
	.size	.Lstr.1, 38

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Power method in CPU starts"
	.size	.Lstr.2, 27

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Power method in CPU is finished"
	.size	.Lstr.3, 32

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Power method in GPU starts"
	.size	.Lstr.4, 27

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__Av_ProductPfS_S_i
	.addrsig_sym _Z27__device_stub__ComputeLamdaPfS_S_i
	.addrsig_sym _Z24__device_stub__FindNormWPfS_i
	.addrsig_sym _Z25__device_stub__NormalizeWPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_MatA
	.addrsig_sym d_VecV
	.addrsig_sym d_VecW
	.addrsig_sym d_NormW
	.addrsig_sym _Z10Av_ProductPfS_S_i
	.addrsig_sym _Z12ComputeLamdaPfS_S_i
	.addrsig_sym _Z9FindNormWPfS_i
	.addrsig_sym _Z10NormalizeWPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10Av_ProductPfS_S_i   ; -- Begin function _Z10Av_ProductPfS_S_i
	.globl	_Z10Av_ProductPfS_S_i
	.p2align	8
	.type	_Z10Av_ProductPfS_S_i,@function
_Z10Av_ProductPfS_S_i:                  ; @_Z10Av_ProductPfS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_9
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v5, 0 :: v_dual_lshlrev_b32 v6, 2, v0
	s_mul_i32 s3, s2, s15
	v_mov_b32_e32 v2, 0
	s_lshl_b32 s3, s3, 8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 0x400, v6
	s_add_i32 s8, s3, s2
	s_mul_i32 s9, s2, s2
	s_mov_b32 s10, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, s3, v0
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s9, v3
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v4, v[3:4], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v1, s10, v0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v4
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_mov_b32 s11, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_7:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v1, s11
	s_add_i32 s11, s11, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s11, 0x400
	ds_load_2addr_stride64_b32 v[3:4], v1 offset1:4
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v5, v3, v4
	s_cbranch_scc0 .LBB0_7
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_addk_i32 s3, 0x100
	s_addk_i32 s10, 0x100
	s_cmp_ge_i32 s3, s8
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_10
.LBB0_9:
	v_mov_b32_e32 v5, 0
.LBB0_10:                               ; %Flow63
	v_lshl_add_u32 v0, s15, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10Av_ProductPfS_S_i
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10Av_ProductPfS_S_i, .Lfunc_end0-_Z10Av_ProductPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 392
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12ComputeLamdaPfS_S_i ; -- Begin function _Z12ComputeLamdaPfS_S_i
	.globl	_Z12ComputeLamdaPfS_S_i
	.p2align	8
	.type	_Z12ComputeLamdaPfS_S_i,@function
_Z12ComputeLamdaPfS_S_i:                ; @_Z12ComputeLamdaPfS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmp_gt_u32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, v3, v1
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v1, v0, 2, 0
	s_cmp_lt_u32 s2, 2
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_7
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_lshr_b32 s3, s2, 1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e64 s3, v0
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_3 Depth=1
	v_lshl_add_u32 v2, s3, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB1_6:                                ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s2, 4
	s_mov_b32 s2, s3
	s_branch .LBB1_3
.LBB1_7:                                ; %._crit_edge
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_11
; %bb.8:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB1_11
; %bb.9:
	s_bcnt1_i32_b32 s2, s2
	s_load_b32 s3, s[0:1], 0x0
	v_cvt_f32_ubyte0_e32 v1, s2
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, 0
	ds_load_b32 v0, v2
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v3, v0, v1
	v_mov_b32_e32 v1, s3
.LBB1_10:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v3
	global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_10
.LBB1_11:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12ComputeLamdaPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12ComputeLamdaPfS_S_i, .Lfunc_end1-_Z12ComputeLamdaPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 412
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9FindNormWPfS_i       ; -- Begin function _Z9FindNormWPfS_i
	.globl	_Z9FindNormWPfS_i
	.p2align	8
	.type	_Z9FindNormWPfS_i,@function
_Z9FindNormWPfS_i:                      ; @_Z9FindNormWPfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmp_gt_u32_e32 vcc_lo, s5, v1
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s5
	v_lshl_add_u32 v1, v0, 2, 0
	s_cmp_lt_u32 s4, 2
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v2, v1
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v2, v2, v2
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB2_3:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_7
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_lshr_b32 s0, s4, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB2_6
; %bb.5:                                ;   in Loop: Header=BB2_3 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB2_6:                                ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s4, 4
	s_mov_b32 s4, s0
	s_branch .LBB2_3
.LBB2_7:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_11
; %bb.8:
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s0, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s1, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s1
	s_cbranch_execz .LBB2_11
; %bb.9:
	s_bcnt1_i32_b32 s0, s0
	s_load_b32 s1, s[2:3], 0x0
	v_cvt_f32_ubyte0_e32 v1, s0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0
	ds_load_b32 v0, v2
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v3, v0, v1
	v_mov_b32_e32 v1, s1
.LBB2_10:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v3
	global_atomic_cmpswap_b32 v0, v2, v[0:1], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_10
.LBB2_11:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9FindNormWPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9FindNormWPfS_i, .Lfunc_end2-_Z9FindNormWPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 420
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10NormalizeWPfS_S_i   ; -- Begin function _Z10NormalizeWPfS_S_i
	.globl	_Z10NormalizeWPfS_S_i
	.p2align	8
	.type	_Z10NormalizeWPfS_S_i,@function
_Z10NormalizeWPfS_S_i:                  ; @_Z10NormalizeWPfS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b32 s8, s[0:1], 0x2c
	s_mov_b32 s9, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_waitcnt lgkmcnt(0)
	s_load_b32 s6, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s6
	ds_store_b32 v1, v2
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s9
	s_load_b32 s0, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, 0xffff, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s1, v[0:1]
	s_barrier
	buffer_gl0_inv
	v_cmp_gt_u32_e32 vcc_lo, s0, v1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_4
; %bb.3:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	ds_load_b32 v2, v2
	v_add_co_u32 v3, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v4, null, v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v3, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v4, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v4, v4, v5, v7
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_div_fixup_f32 v2, v4, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB3_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10NormalizeWPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z10NormalizeWPfS_S_i, .Lfunc_end3-_Z10NormalizeWPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10Av_ProductPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10Av_ProductPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12ComputeLamdaPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12ComputeLamdaPfS_S_i.kd
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    .name:           _Z9FindNormWPfS_i
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
