#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/time.h>

//#include "cublas.h"
//#include "magma.h"
//#include "magmablas.h"

#define NN 4096


void host_mv(int n,float *a,int lda,float *x,float *y){

  int i,j;
  for(j=0;j<n;j++){
    for(i=0;i<n;i++){
      y[i]+=a[i+j*lda]*x[j];
    }
  }
}

__global__ void cuda_mv(int n,float *a,int lda,float *x,float *y){

  int j;
  int idx = blockIdx.x*blockDim.x+threadIdx.x;
  float t = y[idx];
  
  for(j=0;j<n;j++){
    t+=a[idx+j*lda]*x[j];
  }
  
  y[idx]=t;
}

__global__ void cuda_xmv(int n,float *a,int lda,float *x,float *y){

  __shared__ float xc[128];
  __shared__ float yc[128];

  int j,k;
  int idx = blockIdx.x*blockDim.x+threadIdx.x;

  yc[threadIdx.x] = y[idx];
  
  for(k=0;k<n/blockDim.x;k++) {
  
     xc[threadIdx.x]=x[k*blockDim.x+threadIdx.x];
     __syncthreads();
  
    for(j=0;j<blockDim.x;j++){
       yc[threadIdx.x]+=a[(j+k*blockDim.x)*lda+idx]*xc[j];
    }

    __syncthreads();
  }
  y[idx]=yc[threadIdx.x];
}


/* Main */
int main(int argc, char** argv)
{    
    float *h_a;
    float *h_b;
    float *h_c;

    float *d_a;
    float *d_b;
    float *d_c;


    int i,j,n;

	struct timeval t1, t2;
	double time;

    int devCount;
    cudaGetDeviceCount(&devCount);
    
    printf("Liczba GPU= %d\n",devCount);
    

    //cudaSetDevice(1);

    //scanf("%d",&n);
	n = NN;
    
    // alokacja tablic w pamięci hosta

    h_a = (float*)malloc(n*n * sizeof(*h_a));
    h_b = (float*)malloc(n * sizeof(*h_b));
    h_c = (float*)malloc(n * sizeof(*h_c));


    // inicjowanie tablic
    
    for (i = 0; i < n*n; i++) {
        h_a[i] = 2; // rand() / (float)RAND_MAX;
    
    }

    for (i = 0; i < n; i++) {
        h_b[i] = 2; // rand() / (float)RAND_MAX;
        h_c[i] = 2; // rand() / (float)RAND_MAX;
    
    }


    // alokacja tablic w pamięci karty


    cudaMalloc((void **) &d_a, n*n*sizeof(*d_a));
    cudaMalloc((void **) &d_b, n*sizeof(*d_b));
    cudaMalloc((void **) &d_c, n*sizeof(*d_c));

    // kopiowanie danych do pamięci karty


    cudaMemcpy(d_a, h_a, n*n*sizeof(*d_a), cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, h_b, n*sizeof(*d_b), cudaMemcpyHostToDevice);
    cudaMemcpy(d_c, h_c, n*sizeof(*d_c), cudaMemcpyHostToDevice);

	gettimeofday(&t1, 0); // start

    cuda_xmv<<<n/128,128>>>(n,d_a,n,d_b,d_c);

//    cuda_mv<<<n/128,128>>>(n,d_a,n,d_b,d_c);

    cudaThreadSynchronize();


//    host_mv(n,h_a,n,h_b,h_c);

	gettimeofday(&t2, 0); // stop
	time = (1000000.0*(t2.tv_sec-t1.tv_sec) + t2.tv_usec-t1.tv_usec)/1000000.0;
	//printf("Czas = %f\n",time);
	

    cudaMemcpy(h_c, d_c, sizeof(float)*n, cudaMemcpyDeviceToHost);
    

/*
    for(i=0;i<n;i++){
      printf("%f\n",h_c[i]);
    }

*/
    // zwolnienie pamięci
    
    free(h_a);
    free(h_b);
    free(h_c);

    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);



    printf("N=%d Czas=%le MFlops=%lf\n",n,
                            time,2.0*n*n/(1000000.0*time));


    return 0;
}

	.file	"tmpxft_003b25a7_00000000-6_072_mv_mnozenie.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7host_mviPfiS_S_
	.type	_Z7host_mviPfiS_S_, @function
_Z7host_mviPfiS_S_:
.LFB2027:
	.cfi_startproc
	endbr64
	movslq	%edx, %rdx
	movl	%edi, %r9d
	xorl	%edi, %edi
	salq	$2, %rdx
.L3:
	cmpl	%edi, %r9d
	jle	.L8
	xorl	%eax, %eax
.L4:
	movss	(%rsi,%rax,4), %xmm0
	mulss	(%rcx,%rdi,4), %xmm0
	addss	(%r8,%rax,4), %xmm0
	movss	%xmm0, (%r8,%rax,4)
	incq	%rax
	cmpl	%eax, %r9d
	jg	.L4
	incq	%rdi
	addq	%rdx, %rsi
	jmp	.L3
.L8:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z7host_mviPfiS_S_, .-_Z7host_mviPfiS_S_
	.globl	_Z32__device_stub__Z7cuda_mviPfiS_S_iPfiS_S_
	.type	_Z32__device_stub__Z7cuda_mviPfiS_S_iPfiS_S_, @function
_Z32__device_stub__Z7cuda_mviPfiS_S_iPfiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7cuda_mviPfiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L9:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z32__device_stub__Z7cuda_mviPfiS_S_iPfiS_S_, .-_Z32__device_stub__Z7cuda_mviPfiS_S_iPfiS_S_
	.globl	_Z7cuda_mviPfiS_S_
	.type	_Z7cuda_mviPfiS_S_, @function
_Z7cuda_mviPfiS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z7cuda_mviPfiS_S_iPfiS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z7cuda_mviPfiS_S_, .-_Z7cuda_mviPfiS_S_
	.globl	_Z33__device_stub__Z8cuda_xmviPfiS_S_iPfiS_S_
	.type	_Z33__device_stub__Z8cuda_xmviPfiS_S_iPfiS_S_, @function
_Z33__device_stub__Z8cuda_xmviPfiS_S_iPfiS_S_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8cuda_xmviPfiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L14:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z33__device_stub__Z8cuda_xmviPfiS_S_iPfiS_S_, .-_Z33__device_stub__Z8cuda_xmviPfiS_S_iPfiS_S_
	.globl	_Z8cuda_xmviPfiS_S_
	.type	_Z8cuda_xmviPfiS_S_, @function
_Z8cuda_xmviPfiS_S_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z8cuda_xmviPfiS_S_iPfiS_S_
	.cfi_endproc
.LFE2056:
	.size	_Z8cuda_xmviPfiS_S_, .-_Z8cuda_xmviPfiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Liczba GPU= %d\n"
.LC4:
	.string	"N=%d Czas=%le MFlops=%lf\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$112, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	movl	28(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	movl	$67108864, %edi
	call	malloc@PLT
	movl	$16384, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$16384, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movss	.LC1(%rip), %xmm0
	movq	%rax, %rbx
	xorl	%eax, %eax
.L20:
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$16777216, %rax
	jne	.L20
	xorl	%eax, %eax
.L21:
	movss	%xmm0, 0(%rbp,%rax)
	movss	%xmm0, (%rbx,%rax)
	addq	$4, %rax
	cmpq	$16384, %rax
	jne	.L21
	leaq	32(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$16384, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$16384, %esi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$16384, %edx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$16384, %edx
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	leaq	72(%rsp), %rdi
	call	gettimeofday@PLT
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$134217729, %edi
	salq	$7, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$5, %rdi
	movq	%rdx, 88(%rsp)
	movl	$1, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	48(%rsp), %r8
	movq	40(%rsp), %rcx
	movl	$4096, %edx
	movl	$4096, %edi
	movq	32(%rsp), %rsi
	call	_Z33__device_stub__Z8cuda_xmviPfiS_S_iPfiS_S_
.L22:
	call	cudaThreadSynchronize@PLT
	xorl	%esi, %esi
	leaq	88(%rsp), %rdi
	call	gettimeofday@PLT
	movq	88(%rsp), %rax
	subq	72(%rsp), %rax
	movl	$16384, %edx
	cvtsi2sdq	%rax, %xmm0
	mulsd	.LC2(%rip), %xmm0
	movq	48(%rsp), %rsi
	movq	%rbx, %rdi
	cvtsi2sdq	96(%rsp), %xmm1
	movl	$2, %ecx
	addsd	%xmm1, %xmm0
	cvtsi2sdq	80(%rsp), %xmm1
	subsd	%xmm1, %xmm0
	divsd	.LC2(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movsd	.LC2(%rip), %xmm2
	movsd	8(%rsp), %xmm0
	movb	$2, %al
	movsd	.LC3(%rip), %xmm1
	movl	$4096, %edx
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	mulsd	%xmm0, %xmm2
	divsd	%xmm2, %xmm1
	call	__printf_chk@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$112, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z8cuda_xmviPfiS_S_"
.LC6:
	.string	"_Z7cuda_mviPfiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8cuda_xmviPfiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7cuda_mviPfiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1073741824
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	0
	.long	1093567616
	.align 8
.LC3:
	.long	0
	.long	1098907648
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/time.h>

//#include "cublas.h"
//#include "magma.h"
//#include "magmablas.h"

#define NN 4096


void host_mv(int n,float *a,int lda,float *x,float *y){

  int i,j;
  for(j=0;j<n;j++){
    for(i=0;i<n;i++){
      y[i]+=a[i+j*lda]*x[j];
    }
  }
}

__global__ void cuda_mv(int n,float *a,int lda,float *x,float *y){

  int j;
  int idx = blockIdx.x*blockDim.x+threadIdx.x;
  float t = y[idx];
  
  for(j=0;j<n;j++){
    t+=a[idx+j*lda]*x[j];
  }
  
  y[idx]=t;
}

__global__ void cuda_xmv(int n,float *a,int lda,float *x,float *y){

  __shared__ float xc[128];
  __shared__ float yc[128];

  int j,k;
  int idx = blockIdx.x*blockDim.x+threadIdx.x;

  yc[threadIdx.x] = y[idx];
  
  for(k=0;k<n/blockDim.x;k++) {
  
     xc[threadIdx.x]=x[k*blockDim.x+threadIdx.x];
     __syncthreads();
  
    for(j=0;j<blockDim.x;j++){
       yc[threadIdx.x]+=a[(j+k*blockDim.x)*lda+idx]*xc[j];
    }

    __syncthreads();
  }
  y[idx]=yc[threadIdx.x];
}


/* Main */
int main(int argc, char** argv)
{    
    float *h_a;
    float *h_b;
    float *h_c;

    float *d_a;
    float *d_b;
    float *d_c;


    int i,j,n;

	struct timeval t1, t2;
	double time;

    int devCount;
    hipGetDeviceCount(&devCount);
    
    printf("Liczba GPU= %d\n",devCount);
    

    //cudaSetDevice(1);

    //scanf("%d",&n);
	n = NN;
    
    // alokacja tablic w pamięci hosta

    h_a = (float*)malloc(n*n * sizeof(*h_a));
    h_b = (float*)malloc(n * sizeof(*h_b));
    h_c = (float*)malloc(n * sizeof(*h_c));


    // inicjowanie tablic
    
    for (i = 0; i < n*n; i++) {
        h_a[i] = 2; // rand() / (float)RAND_MAX;
    
    }

    for (i = 0; i < n; i++) {
        h_b[i] = 2; // rand() / (float)RAND_MAX;
        h_c[i] = 2; // rand() / (float)RAND_MAX;
    
    }


    // alokacja tablic w pamięci karty


    hipMalloc((void **) &d_a, n*n*sizeof(*d_a));
    hipMalloc((void **) &d_b, n*sizeof(*d_b));
    hipMalloc((void **) &d_c, n*sizeof(*d_c));

    // kopiowanie danych do pamięci karty


    hipMemcpy(d_a, h_a, n*n*sizeof(*d_a), hipMemcpyHostToDevice);
    hipMemcpy(d_b, h_b, n*sizeof(*d_b), hipMemcpyHostToDevice);
    hipMemcpy(d_c, h_c, n*sizeof(*d_c), hipMemcpyHostToDevice);

	gettimeofday(&t1, 0); // start

    cuda_xmv<<<n/128,128>>>(n,d_a,n,d_b,d_c);

//    cuda_mv<<<n/128,128>>>(n,d_a,n,d_b,d_c);

    hipDeviceSynchronize();


//    host_mv(n,h_a,n,h_b,h_c);

	gettimeofday(&t2, 0); // stop
	time = (1000000.0*(t2.tv_sec-t1.tv_sec) + t2.tv_usec-t1.tv_usec)/1000000.0;
	//printf("Czas = %f\n",time);
	

    hipMemcpy(h_c, d_c, sizeof(float)*n, hipMemcpyDeviceToHost);
    

/*
    for(i=0;i<n;i++){
      printf("%f\n",h_c[i]);
    }

*/
    // zwolnienie pamięci
    
    free(h_a);
    free(h_b);
    free(h_c);

    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);



    printf("N=%d Czas=%le MFlops=%lf\n",n,
                            time,2.0*n*n/(1000000.0*time));


    return 0;
}

	.text
	.file	"072_mv_mnozenie.hip"
	.globl	_Z7host_mviPfiS_S_              # -- Begin function _Z7host_mviPfiS_S_
	.type	_Z7host_mviPfiS_S_,@function
_Z7host_mviPfiS_S_:                     # @_Z7host_mviPfiS_S_
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB0_5
# %bb.1:                                # %.preheader.lr.ph
	movslq	%edx, %rax
	movl	%edi, %edx
	shlq	$2, %rax
	xorl	%edi, %edi
.LBB0_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	xorl	%r9d, %r9d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rsi,%r9,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	mulss	(%rcx,%rdi,4), %xmm0
	addss	(%r8,%r9,4), %xmm0
	movss	%xmm0, (%r8,%r9,4)
	incq	%r9
	cmpq	%r9, %rdx
	jne	.LBB0_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%rdi
	addq	%rax, %rsi
	cmpq	%rdx, %rdi
	jne	.LBB0_2
.LBB0_5:                                # %._crit_edge17
	retq
.Lfunc_end0:
	.size	_Z7host_mviPfiS_S_, .Lfunc_end0-_Z7host_mviPfiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__cuda_mviPfiS_S_ # -- Begin function _Z22__device_stub__cuda_mviPfiS_S_
	.type	_Z22__device_stub__cuda_mviPfiS_S_,@function
_Z22__device_stub__cuda_mviPfiS_S_:     # @_Z22__device_stub__cuda_mviPfiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7cuda_mviPfiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__cuda_mviPfiS_S_, .Lfunc_end1-_Z22__device_stub__cuda_mviPfiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__cuda_xmviPfiS_S_ # -- Begin function _Z23__device_stub__cuda_xmviPfiS_S_
	.type	_Z23__device_stub__cuda_xmviPfiS_S_,@function
_Z23__device_stub__cuda_xmviPfiS_S_:    # @_Z23__device_stub__cuda_xmviPfiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8cuda_xmviPfiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__cuda_xmviPfiS_S_, .Lfunc_end2-_Z23__device_stub__cuda_xmviPfiS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI3_1:
	.quad	0x4180000000000000              # double 33554432
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	(%rbx), %esi
	xorl	%r12d, %r12d
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %rbx
	movl	$16384, %edi                    # imm = 0x4000
	callq	malloc
	movq	%rax, %r14
	movl	$16384, %edi                    # imm = 0x4000
	callq	malloc
	movq	%rax, %r15
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1073741824, (%rbx,%r12,4)      # imm = 0x40000000
	incq	%r12
	cmpq	$16777216, %r12                 # imm = 0x1000000
	jne	.LBB3_1
# %bb.2:                                # %.preheader.preheader
	xorl	%eax, %eax
	movl	$1073741824, %ecx               # imm = 0x40000000
.LBB3_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%r14,%rax,4)
	movl	%ecx, (%r15,%rax,4)
	incq	%rax
	cmpq	$4096, %rax                     # imm = 0x1000
	jne	.LBB3_3
# %bb.4:
	leaq	16(%rsp), %r12
	movl	$67108864, %esi                 # imm = 0x4000000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r13
	movl	$16384, %esi                    # imm = 0x4000
	movq	%r13, %rdi
	callq	hipMalloc
	movq	%rsp, %rbp
	movl	$16384, %esi                    # imm = 0x4000
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movabsq	$4294967328, %rdi               # imm = 0x100000020
	leaq	96(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.5:
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rcx
	movq	(%rsp), %r8
	movl	$4096, %edi                     # imm = 0x1000
	movl	$4096, %edx                     # imm = 0x1000
	callq	_Z23__device_stub__cuda_xmviPfiS_S_
.LBB3_6:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	subq	40(%rsp), %rax
	cvtsi2sd	%rax, %xmm0
	movsd	.LCPI3_0(%rip), %xmm3           # xmm3 = mem[0],zero
	mulsd	%xmm3, %xmm0
	cvtsi2sdq	8(%r12), %xmm2
	cvtsi2sdq	48(%rsp), %xmm1
	addsd	%xmm0, %xmm2
	subsd	%xmm1, %xmm2
	divsd	%xmm3, %xmm2
	movsd	%xmm2, 24(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	.LCPI3_0(%rip), %xmm2           # xmm2 = mem[0],zero
	mulsd	%xmm0, %xmm2
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm2, %xmm1
	movl	$.L.str.1, %edi
	movl	$4096, %esi                     # imm = 0x1000
	movb	$2, %al
	callq	printf
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7cuda_mviPfiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8cuda_xmviPfiS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7cuda_mviPfiS_S_,@object      # @_Z7cuda_mviPfiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z7cuda_mviPfiS_S_
	.p2align	3, 0x0
_Z7cuda_mviPfiS_S_:
	.quad	_Z22__device_stub__cuda_mviPfiS_S_
	.size	_Z7cuda_mviPfiS_S_, 8

	.type	_Z8cuda_xmviPfiS_S_,@object     # @_Z8cuda_xmviPfiS_S_
	.globl	_Z8cuda_xmviPfiS_S_
	.p2align	3, 0x0
_Z8cuda_xmviPfiS_S_:
	.quad	_Z23__device_stub__cuda_xmviPfiS_S_
	.size	_Z8cuda_xmviPfiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Liczba GPU= %d\n"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"N=%d Czas=%le MFlops=%lf\n"
	.size	.L.str.1, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7cuda_mviPfiS_S_"
	.size	.L__unnamed_1, 19

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8cuda_xmviPfiS_S_"
	.size	.L__unnamed_2, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__cuda_mviPfiS_S_
	.addrsig_sym _Z23__device_stub__cuda_xmviPfiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7cuda_mviPfiS_S_
	.addrsig_sym _Z8cuda_xmviPfiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7cuda_mviPfiS_S_      ; -- Begin function _Z7cuda_mviPfiS_S_
	.globl	_Z7cuda_mviPfiS_S_
	.p2align	8
	.type	_Z7cuda_mviPfiS_S_,@function
_Z7cuda_mviPfiS_S_:                     ; @_Z7cuda_mviPfiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_load_b32 s6, s[0:1], 0x0
	global_load_b32 v4, v[0:1], off
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x8
	s_load_b32 s0, s[0:1], 0x10
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	s_load_b32 s1, s[4:5], 0x0
	s_add_i32 s6, s6, -1
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, s0, v2
	s_cmp_lg_u32 s6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v3, v[5:6], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, s1, v3
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7cuda_mviPfiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7cuda_mviPfiS_S_, .Lfunc_end0-_Z7cuda_mviPfiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 228
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8cuda_xmviPfiS_S_     ; -- Begin function _Z8cuda_xmviPfiS_S_
	.globl	_Z8cuda_xmviPfiS_S_
	.p2align	8
	.type	_Z8cuda_xmviPfiS_S_,@function
_Z8cuda_xmviPfiS_S_:                    ; @_Z8cuda_xmviPfiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_lshlrev_b32_e32 v6, 2, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_load_b32 s6, s[0:1], 0x0
	global_load_b32 v4, v[1:2], off
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_u32 s2, s6
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v4 offset:512
	s_cbranch_scc1 .LBB1_6
; %bb.1:                                ; %.lr.ph
	v_cvt_f32_u32_e32 v4, s2
	s_sub_i32 s3, 0, s2
	v_add_nc_u32_e32 v7, 0x200, v6
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_mul_i32 s8, s3, s7
	s_load_b32 s3, s[0:1], 0x10
	s_mul_hi_u32 s8, s7, s8
	s_load_b64 s[0:1], s[0:1], 0x8
	s_add_i32 s7, s7, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s7, s6, s7
	s_mul_i32 s8, s7, s2
	s_add_i32 s9, s7, 1
	s_sub_i32 s8, s6, s8
	s_mov_b32 s6, 0
	s_sub_i32 s10, s8, s2
	s_cmp_ge_u32 s8, s2
	s_cselect_b32 s7, s9, s7
	s_cselect_b32 s8, s10, s8
	s_add_i32 s9, s7, 1
	s_cmp_ge_u32 s8, s2
	s_cselect_b32 s7, s9, s7
	s_max_u32 s8, s2, 1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s9, s3, s2
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	v_mad_u64_u32 v[8:9], null, s6, s2, v[0:1]
	v_mov_b32_e32 v9, v5
	s_mov_b32 s10, 0
	s_mov_b32 s11, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v4, v[8:9], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v4
	v_mov_b32_e32 v4, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v8, v7
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshlrev_b64 v[9:10], 2, v[4:5]
	v_add_nc_u32_e32 v4, s3, v4
	s_add_i32 s11, s11, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s0, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
	global_load_b32 v9, v[9:10], off
	v_mov_b32_e32 v10, s10
	s_add_i32 s10, s10, 4
	s_cmp_lg_u32 s11, 0
	ds_load_b32 v10, v10
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v8, v9, v10
	s_cbranch_scc1 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_nc_u32_e32 v3, s9, v3
	s_add_i32 s6, s6, 1
	ds_store_b32 v7, v8
	s_cmp_lt_u32 s6, s7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_2
; %bb.5:                                ; %._crit_edge.loopexit
	ds_load_b32 v4, v7
.LBB1_6:                                ; %._crit_edge
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8cuda_xmviPfiS_S_
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8cuda_xmviPfiS_S_, .Lfunc_end1-_Z8cuda_xmviPfiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 504
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7cuda_mviPfiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7cuda_mviPfiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8cuda_xmviPfiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8cuda_xmviPfiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
