#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
//// notes

using namespace std;

///////////////////////////////////////////////////////////////////////////////
// GPU code to calculate the bin number.
// This assumes that you have normalized your data that you want to plot to 
// lie between 0.0 and 1.0. 
// Outside this range is classified as overflow or underflow.
///////////////////////////////////////////////////////////////////////////////
__device__ int get_bin_num(float normalized_val, int nbins)
{
    // The data goes in bins number 1 to nbins
    // 0 is the underflow
    // nbins-1 is the overflow
    //
    // Remember that we have underflow (0) and overflow (nbins-1) 
    if (normalized_val>=1.0)
    {
        // If it is greater than or equal to 1.0, put it in the overflow bin
        return nbins-1;
    }
    else if (normalized_val<0.0)
    {
        return 0;
    }
    else if (normalized_val==0.0)
    {
        return 1;
    }

    // Do this calculation only if it fails the other conditionals.
    // I think this buys us a few CPU cycles.
    int ret = (int)(normalized_val*(nbins-2)) + 1;    
    return ret;
}

///////////////////////////////////////////////////////////////////////////////
// GPU code to calculate the separation between two galaxies given the 
// right ascenscion and declanation.
///////////////////////////////////////////////////////////////////////////////
//__global__ void CalcSep(float* raA, float* decA, int ngals, int nthreads, int* hist_array, float hist_lo, float hist_hi, int hist_nbins)
__global__ void CalcSep(float* raA, float* sin_decA, float* cos_decA, int ngals, int nthreads, int* hist_array, float hist_lo, float hist_hi, int hist_nbins)
{
    //does all the i's simultaneously - one for each thread 
    int ix = blockDim.x * blockIdx.x + threadIdx.x;
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	
	extern __shared__ int s_data[];
	
	// need shared array that in nbins * nthreads
	//
	
	if (hist_nbins>2)	
	{
		for (int j = 0; j<hist_nbins; ++j){
			s_data[threadIdx.x*hist_nbins+j] = 0;
		}
	}
	

	__syncthreads();

    // Get normalization term
    float norm = hist_hi-hist_lo;
    float norm_val = 0;
    int bin = 0;
	
//    int hist_array_bin_block = ix*hist_nbins;
	int hist_array_bin_block = threadIdx.x*hist_nbins;

    int hist_array_bin = 0;

	const int Ngals = ngals;
    float sep=0;
	
	
	float sin_dec_ix;
	float cos_dec_ix;
	float sin_dec_ij;
	float cos_dec_ij;
	float ra_ix;
	float ra_ij;
	
		/*
	for(int k = 0; k< ngals; ++k){
		sin_dec[k]=sin_decA[k];
		cos_dec[k]=cos_decA[k];
		ra[k]=raA[k];
	}
	*/

    // Do the ix ``column"
	
	sin_dec_ix = sin_decA[ix];
    cos_dec_ix = cos_decA[ix];
	ra_ix = raA[ix];

	for(int ij=ix+1;ij<ngals;ij++)
    {
		//if(ix>=nthreads) continue;

       
        sin_dec_ij = sin_decA[ij];
		cos_dec_ij = cos_decA[ij];
		ra_ij = raA[ij];

        sep = acos( sin_dec_ix*sin_dec_ij + cos_dec_ix*cos_dec_ij*cos(fabs(ra_ix-ra_ij)) );

        norm_val = (sep-hist_lo)/norm;
        bin = get_bin_num(norm_val,hist_nbins);
        hist_array_bin = hist_array_bin_block + bin;

		//hist_array[hist_array_bin]++;

        // If we passed 0 bins or -x on the command line, don't try
        // to fill the super array.
        if (hist_nbins>2 )
        {
			if(index<nthreads) s_data[hist_array_bin]++;	
			//hist_array[hist_array_bin]++;
		}

    }//loop over gals

    // Then the ngals-ix ``column"
    ix = (ngals - 1) - ix;
	sin_dec_ix = sin_decA[ix];
    cos_dec_ix = cos_decA[ix];
	ra_ix = raA[ix];

	
    for(int ij=ix+1;ij<ngals;ij++)
    {
		//if(ix>=nthreads) continue;
				
		//sin_dec_ix = sin_decA[ix];
		sin_dec_ij = sin_decA[ij];
		//cos_dec_ix = cos_decA[ix];
		cos_dec_ij = cos_decA[ij];
		ra_ix = raA[ix];
		ra_ij = raA[ij];

        sep = acos( sin_dec_ix*sin_dec_ij + cos_dec_ix*cos_dec_ij*cos(fabs(ra_ix-ra_ij)) );
                
        norm_val = (sep-hist_lo)/norm;
        bin = get_bin_num(norm_val,hist_nbins);
        hist_array_bin = hist_array_bin_block + bin;
		//hist_array[hist_array_bin]++;
        
        // If we passed 0 bins or -x on the command line, don't try
        // to fill the super array.
        if (hist_nbins>2)
        {
            if(index<nthreads)s_data[hist_array_bin]++;	
			//hist_array[hist_array_bin]++;
        }
    }//loop over gals

	__syncthreads();
	
	// Now load s_data into 
		//for(int kbin =0; kbin<10; kbin++) {
	//s_data[threadIdx.x]=99;
	int hist_hostblock = blockIdx.x*hist_nbins;
	
	if(hist_nbins >2)// && threadIdx.x<hist_nbins) 
	{
		int thisbin = threadIdx.x;
		for(int thisbin=threadIdx.x; thisbin < hist_nbins; thisbin+=blockDim.x) 
		{				
			hist_hostblock	= thisbin*hist_nbins;
			for(int k =1; k < blockDim.x; k++)
			{
				//s_data[(hist_nbins*k) +threadIdx.x]=99;
				s_data[thisbin]+=s_data[(hist_nbins*k) + thisbin];
				//hist_array[hist_hostblock+threadIdx.x]+=s_data[(hist_nbins*k) +threadIdx.x];
			}
			hist_array[hist_hostblock+thisbin] = s_data[thisbin];
			//hist_array[hist_hostblock+threadIdx.x] =	 blockIdx.x;
		}
	}
}
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////


////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//Host code
int main(int argc, char **argv)
{
    int ngals = 1000;
    int nbins = 100;
    srand(time(0));

    ///////////////////////////////////////////////////////////////////////////
    // Grab the number of galaxies from the command line *if* they have 
    // been specified.
    if (argc>1)
    {
        ngals = atoi(argv[1]);
        if (argc>2)
        {
            nbins = atoi(argv[2]);
        }
    }
    else
    {
        printf("Usage: %s <number of galaxies> <number of histogram bins>\n",\
                argv[0]);
        printf("\nDefault is 1000 galaxies and 100 bins\n\n"); 
    }
    ///////////////////////////////////////////////////////////////////////////

    ///////////////////////////////////////////////////////////////////////////
    // Define histo arrays and memory info and the like
    size_t gal_mem_needed = ngals * sizeof(float);

    // How many threads will there be?
    int nthreads = ngals/2;
	
    printf("nthreads: %d\n",nthreads);

    float hist_lo = 0.0;
    float hist_hi = 3.5;

    // From here on out, use the number of bins with underflow/overflow added in
    // to the calculation.
    int nbins_with_overflow = nbins + 2;
	
	int nblocks = 256;//ceil(nthreads/(threadsPerBlock*1.0));
	int threadsPerBlock = ceil(nthreads/(nblocks*1.0));
	
	//int threadsPerBlock = 64;
	
	if(threadsPerBlock<nbins_with_overflow)
	{
		printf("Too many bins for this blocksize\n");
	}
	
	
	
	
	//int threadsPerBlock = ceil(nthreads/(nblocks*1.0));//nbins_with_overflow;

	//if (! nthreads%nblocks) threadsPerBlock++;
	
	
	//if (! nthreads%threadsPerBlock) nblocks++;

	printf("nblocks: %d\n",nblocks);	
	printf("nthreads/nblocks: %d\n",threadsPerBlock );	
	printf("shared memory allocated: %d\n",threadsPerBlock*nbins_with_overflow*sizeof(int));

    // Calculate our thread/grid/block sizes.
	//int threadsPerBlock = ;
	    // IS THIS CALCULATION BEING DONE PROPERLY? OPTIMALLY?????
    int blocksPerGrid = nblocks ;//(nthreads/threadsPerBlock)+1; //(nthreads + threadsPerBlock -1) / threadsPerBlock; //???????
	
	
		
	int nbins_in_super_hist_array = nblocks*nbins_with_overflow;


    size_t hist_mem_needed = nbins_in_super_hist_array*sizeof(int);

    ///////////////////////////////////////////////////////////////////////////
    //allocate vectors in host memory
    float* h_raA = 0; 
    float* h_decA = 0;

    float* h_sin_decA = 0; 
    float* h_cos_decA = 0;

    int *h_hist_array = 0;
    int *h_hist_array_compressed = 0;

    h_raA = (float*)malloc(gal_mem_needed);
    h_decA = (float*)malloc(gal_mem_needed);

    // Allocate memory for the cos and sin of the right asenscion. This saves
    // us some time rather than recalcuating this over and over on the GPUs.
    h_cos_decA = (float*)malloc(gal_mem_needed);
    h_sin_decA = (float*)malloc(gal_mem_needed);

    h_hist_array = (int*)malloc(hist_mem_needed);
    h_hist_array_compressed = (int*)malloc(nbins_with_overflow*sizeof(int));

    if (0==h_raA || 0==h_sin_decA || 0==h_cos_decA || 0==h_hist_array || 0==h_hist_array_compressed)
    {
        printf("Couldn't allocate memory on host....\n");
        return 1;
    }

    ///////////////////////////////////////////////////////////////////////////
    //allocate vectors in device memory
    float* d_raA=0;
    //float* d_decA=0;

    float* d_sin_decA=0;
    float* d_cos_decA=0;

    int *d_hist_array;

    cudaMalloc(&d_raA, gal_mem_needed);
    //cudaMalloc(&d_decA, gal_mem_needed);

    cudaMalloc(&d_cos_decA, gal_mem_needed);
    cudaMalloc(&d_sin_decA, gal_mem_needed);

    cudaMalloc(&d_hist_array, hist_mem_needed);

    if (0==d_raA || 0==d_cos_decA || 0==d_sin_decA || 0==d_hist_array)
    {
        printf("Couldn't allocate memory on device....\n");
        return 1;
    }

    ///////////////////////////////////////////////////////////////////////////
    // Initialise input vectors.
    // Place galaxies at random coords between 0 and 1.
    ///////////////////////////////////////////////////////////////////////////
    for(int i=0;i<ngals;i++)
    {

        h_raA[i] = rand(); 
        h_decA[i] = rand();

        h_cos_decA[i] = cos(h_decA[i]);
        h_sin_decA[i] = sin(h_decA[i]);

    }

    ///////////////////////////////////////////////////////////////////////////
    // Uncomment this section if you would also like to do the calculation on
    // the CPU.
    ///////////////////////////////////////////////////////////////////////////
    
    //calculate separation in CPU and calculate time needed
    clock_t teststart = clock();

    float testsep=0;
    for(int i=0;i<ngals;i++){
        for(int j=i+1;j<ngals;j++){
            testsep = acos( sin(h_decA[i])*sin(h_decA[j]) + \
            cos(h_decA[i])*cos(h_decA[j])*cos(fabs(h_raA[i]-h_raA[j])) );
        }
    }
    clock_t testend = clock();
    float testelapsed = (float)(testend-teststart);
    printf("elapsed time for CPU in ms: %f", testelapsed/CLOCKS_PER_SEC*1000);
    printf("\n");
    
    ///////////////////////////////////////////////////////////////////////////
    ///////////////////////////////////////////////////////////////////////////

    ///////////////////////////////////////////////////////////////////////////
    // Zero out the super-array that will hold the histogram entries
    // for each thread.
    printf("nbins_in_super_hist_array: %d\n",nbins_in_super_hist_array);
    for (int i=0;i<nbins_in_super_hist_array;i++)
    {
        h_hist_array[i]=0.0;
    }
    ///////////////////////////////////////////////////////////////////////////

    ///////////////////////////////////////////////////////////////////////////
    // Copy vectors from host to device memory.
    cudaMemcpy(d_raA,  h_raA,  gal_mem_needed, cudaMemcpyHostToDevice); 
    //cudaMemcpy(d_decA, h_decA, gal_mem_needed, cudaMemcpyHostToDevice); 

    cudaMemcpy(d_sin_decA, h_sin_decA, gal_mem_needed, cudaMemcpyHostToDevice); 
    cudaMemcpy(d_cos_decA, h_cos_decA, gal_mem_needed, cudaMemcpyHostToDevice); 

    cudaMemcpy(d_hist_array, h_hist_array, hist_mem_needed, cudaMemcpyHostToDevice); 

    ///////////////////////////////////////////////////////////////////////////
 
	
    // Set up the cuda timer. 
    // Ccan't use simple CPU timer since that would only time the kernel launch overhead. 
    // Need to make sure all threads have finished before stop the timer 
    // so can synchronise threads before and after kernel launch if using cpu timer? 
    // I didn't get sensible results when I've tried that though. 

    cudaEvent_t cudastart, cudaend;
    cudaEventCreate(&cudastart); 
    cudaEventCreate(&cudaend);

    //record the start time
    cudaEventRecord(cudastart,0);

    ///////////////////////////////////////////////////////////////////////////
    // Run the kernel! 
    //CalcSep<<<blocksPerGrid, threadsPerBlock>>>(d_raA, d_decA, ngals, nthreads, d_hist_array, hist_lo, hist_hi, nbins_with_overflow);
    CalcSep<<<blocksPerGrid, threadsPerBlock, threadsPerBlock*nbins_with_overflow*sizeof(int) >>>(d_raA, d_sin_decA, d_cos_decA,
															ngals, nthreads, d_hist_array, hist_lo, hist_hi, nbins_with_overflow);

    // Copy the info back off the GPU to the host.
    cudaMemcpy(h_hist_array, d_hist_array, hist_mem_needed, cudaMemcpyDeviceToHost); 

    ///////////////////////////////////////////////////////////////////////////
    // Record the end time
    cudaEventRecord(cudaend,0);
    cudaEventSynchronize(cudaend);

    ///////////////////////////////////////////////////////////////////////////
    // How long did the kernel take? this gives time in ms
    float cudaelapsed=0;
    cudaEventElapsedTime(&cudaelapsed, cudastart, cudaend);
    printf("elapsed time for GPU in ms: %f\n",cudaelapsed);

    ///////////////////////////////////////////////////////////////////////////
    // Collapse the super histogram array to a simple histogram array and write
    // it out to histogram_array.txt
    int sum = 0;
    int master_bin = 0;
    for (int i=0;i<nbins_in_super_hist_array;i++)
    {
        //printf("%d ",h_hist_array[i]);
        sum += h_hist_array[i];

        master_bin = i%nbins_with_overflow;

        //printf("%d\n",master_bin);
        h_hist_array_compressed[master_bin] += h_hist_array[i];
    }
    printf("\ntotal: %d\n",sum);

    FILE *outfile; 
    outfile = fopen("histogram_array.txt","w+"); /* write to file (add text to 
                                                    a file or create a file if it does not exist.*/ 
    // Print out the compressed array
    fprintf(outfile,"%f %f\n",hist_lo,hist_hi);
    for (int i=0;i<nbins_with_overflow;i++)
    {
        fprintf(outfile,"%d ",h_hist_array_compressed[i]);
    }
    fprintf(outfile,"\n");
    fclose(outfile); /*done!*/ 

    ///////////////////////////////////////////////////////////////////////////
    // Free up the device memory.
    cudaEventDestroy(cudastart);
    cudaEventDestroy(cudaend);

    cudaFree(d_raA); 
    //cudaFree(d_decA);
    cudaFree(d_sin_decA);
    cudaFree(d_cos_decA);
    cudaFree(d_hist_array);

    // Free up the host memory.
    free(h_raA); 
    free(h_decA); 
    free(h_sin_decA); 
    free(h_cos_decA); 
    free(h_hist_array);
    free(h_hist_array_compressed);


}

	.file	"tmpxft_00293a9e_00000000-6_calc_separation_and_histogram_mark.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11get_bin_numfi
	.type	_Z11get_bin_numfi, @function
_Z11get_bin_numfi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z11get_bin_numfi, .-_Z11get_bin_numfi
	.globl	_Z37__device_stub__Z7CalcSepPfS_S_iiPiffiPfS_S_iiPiffi
	.type	_Z37__device_stub__Z7CalcSepPfS_S_iiPiffiPfS_S_iiPiffi, @function
_Z37__device_stub__Z7CalcSepPfS_S_iiPiffiPfS_S_iiPiffi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movq	%r9, 8(%rsp)
	movss	%xmm0, 4(%rsp)
	movss	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movq	%rsp, %rax
	movq	%rax, 168(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z7CalcSepPfS_S_iiPiffi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L4:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z37__device_stub__Z7CalcSepPfS_S_iiPiffiPfS_S_iiPiffi, .-_Z37__device_stub__Z7CalcSepPfS_S_iiPiffiPfS_S_iiPiffi
	.globl	_Z7CalcSepPfS_S_iiPiffi
	.type	_Z7CalcSepPfS_S_iiPiffi, @function
_Z7CalcSepPfS_S_iiPiffi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z7CalcSepPfS_S_iiPiffiPfS_S_iiPiffi
	.cfi_endproc
.LFE2054:
	.size	_Z7CalcSepPfS_S_iiPiffi, .-_Z7CalcSepPfS_S_iiPiffi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Usage: %s <number of galaxies> <number of histogram bins>\n"
.LC1:
	.string	"\nDefault is 1000 galaxies and 100 bins\n\n"
.LC2:
	.string	"nthreads: %d\n"
.LC4:
	.string	"Too many bins for this blocksize\n"
.LC5:
	.string	"nblocks: %d\n"
.LC6:
	.string	"nthreads/nblocks: %d\n"
.LC7:
	.string	"shared memory allocated: %d\n"
.LC8:
	.string	"Couldn't allocate memory on host....\n"
.LC9:
	.string	"Couldn't allocate memory on device....\n"
.LC12:
	.string	"elapsed time for CPU in ms: %f"
.LC13:
	.string	"\n"
.LC14:
	.string	"nbins_in_super_hist_array: %d\n"
.LC17:
	.string	"elapsed time for GPU in ms: %f\n"
.LC18:
	.string	"\ntotal: %d\n"
.LC19:
	.string	"w+"
.LC20:
	.string	"histogram_array.txt"
.LC22:
	.string	"%f %f\n"
.LC24:
	.string	"%d "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	cmpl	$1, %r12d
	jle	.L11
	movq	8(%rbp), %rdi
	movl	$100, %ebx
	call	atoi@PLT
	movl	%eax, 16(%rsp)
	cmpl	$2, %r12d
	je	.L12
	movq	16(%rbp), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L12
.L11:
	movq	0(%rbp), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$100, %ebx
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1000, 16(%rsp)
.L12:
	movslq	16(%rsp), %rax
	movl	$2, %ecx
	movl	$2, %edi
	addl	$2, %ebx
	leaq	.LC2(%rip), %rsi
	salq	$2, %rax
	movq	%rax, 8(%rsp)
	movl	16(%rsp), %eax
	cltd
	idivl	%ecx
	movl	%eax, %edx
	movl	%eax, 52(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cvtsi2sdl	52(%rsp), %xmm0
	mulsd	.LC3(%rip), %xmm0
	call	ceil@PLT
	cvttsd2sil	%xmm0, %eax
	movl	%eax, 20(%rsp)
	cmpl	%eax, %ebx
	jle	.L13
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L13:
	movl	$256, %edx
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	20(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movl	20(%rsp), %eax
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	imull	%ebx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rdx
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %eax
	movq	8(%rsp), %rdi
	sall	$8, %eax
	movl	%eax, 48(%rsp)
	cltq
	salq	$2, %rax
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movslq	%ebx, %rdi
	salq	$2, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rax, %r12
	testq	%rbp, %rbp
	je	.L14
	cmpq	$0, 40(%rsp)
	je	.L14
	cmpq	$0, 32(%rsp)
	sete	%al
	testq	%r14, %r14
	sete	%dl
	orb	%dl, %al
	jne	.L14
	testq	%r12, %r12
	jne	.L15
.L14:
	leaq	.LC8(%rip), %rsi
	jmp	.L38
.L15:
	xorl	%edi, %edi
	movq	8(%rsp), %rsi
	movq	%rdi, 112(%rsp)
	movq	%rdi, 120(%rsp)
	movq	%rdi, 128(%rsp)
	leaq	112(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	cudaMalloc@PLT
	cmpq	$0, 112(%rsp)
	je	.L18
	cmpq	$0, 128(%rsp)
	je	.L18
	cmpq	$0, 120(%rsp)
	je	.L18
	xorl	%r15d, %r15d
	leaq	108(%rsp), %rax
	cmpq	$0, 136(%rsp)
	movq	%rax, 64(%rsp)
	jne	.L19
.L18:
	leaq	.LC9(%rip), %rsi
.L38:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L10
.L19:
	cmpl	%r15d, 16(%rsp)
	jle	.L39
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, 0(%rbp,%r15,4)
	call	rand@PLT
	movq	64(%rsp), %rdi
	leaq	104(%rsp), %rsi
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, 72(%rsp)
	call	sincosf@PLT
	movss	72(%rsp), %xmm0
	movq	32(%rsp), %rax
	movss	%xmm0, 0(%r13,%r15,4)
	movss	104(%rsp), %xmm0
	movss	%xmm0, (%rax,%r15,4)
	movq	40(%rsp), %rax
	movss	108(%rsp), %xmm0
	movss	%xmm0, (%rax,%r15,4)
	incq	%r15
	jmp	.L19
.L39:
	call	clock@PLT
	leaq	108(%rsp), %rcx
	movq	%rcx, 64(%rsp)
	movq	%rax, 72(%rsp)
	movl	$1, %eax
.L22:
	leal	-1(%rax), %edx
	cmpl	%edx, 16(%rsp)
	jle	.L40
	movq	%rax, %r15
.L24:
	cmpl	%r15d, 16(%rsp)
	jle	.L41
	movq	64(%rsp), %rdi
	leaq	104(%rsp), %rsi
	movq	%rax, 96(%rsp)
	movss	-4(%r13,%rax,4), %xmm0
	movq	%rsi, 80(%rsp)
	call	sincosf@PLT
	movss	104(%rsp), %xmm2
	movss	108(%rsp), %xmm1
	movss	0(%r13,%r15,4), %xmm0
	movq	80(%rsp), %rsi
	movq	64(%rsp), %rdi
	movss	%xmm2, 92(%rsp)
	movss	%xmm1, 88(%rsp)
	call	sincosf@PLT
	movq	96(%rsp), %rax
	movss	-4(%rbp,%rax,4), %xmm0
	subss	0(%rbp,%r15,4), %xmm0
	movq	%rax, 80(%rsp)
	incq	%r15
	call	cosf@PLT
	movss	92(%rsp), %xmm2
	mulss	104(%rsp), %xmm2
	movaps	%xmm0, %xmm3
	movss	88(%rsp), %xmm1
	mulss	108(%rsp), %xmm1
	movaps	%xmm2, %xmm0
	mulss	%xmm3, %xmm0
	addss	%xmm1, %xmm0
	call	acosf@PLT
	movq	80(%rsp), %rax
	jmp	.L24
.L41:
	incq	%rax
	jmp	.L22
.L40:
	call	clock@PLT
	movq	72(%rsp), %rcx
	movl	$2, %edi
	leaq	.LC12(%rip), %rsi
	subq	%rcx, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC10(%rip), %xmm0
	movb	$1, %al
	mulss	.LC11(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC13(%rip), %rsi
	call	__printf_chk@PLT
	movl	48(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC14(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L25:
	cmpl	%eax, 48(%rsp)
	jle	.L42
	xorl	%esi, %esi
	movl	%esi, (%r14,%rax,4)
	incq	%rax
	jmp	.L25
.L42:
	movq	8(%rsp), %rdx
	movq	112(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	120(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdx
	movl	$1, %ecx
	movq	%r14, %rsi
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	144(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	152(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	144(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	20(%rsp), %eax
	movl	$16777217, %edi
	xorl	%r9d, %r9d
	movq	56(%rsp), %r8
	salq	$8, %rdi
	movl	$1, %esi
	movl	%eax, 172(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 176(%rsp)
	movl	180(%rsp), %ecx
	movq	172(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	%rax
	.cfi_def_cfa_offset 264
	movss	.LC15(%rip), %xmm1
	xorps	%xmm0, %xmm0
	pushq	%rbx
	.cfi_def_cfa_offset 272
	movq	152(%rsp), %r9
	movl	68(%rsp), %r8d
	movl	32(%rsp), %ecx
	movq	144(%rsp), %rdx
	movq	136(%rsp), %rsi
	movq	128(%rsp), %rdi
	call	_Z37__device_stub__Z7CalcSepPfS_S_iiPiffiPfS_S_iiPiffi
	popq	%rdx
	.cfi_def_cfa_offset 264
	popq	%rcx
	.cfi_def_cfa_offset 256
.L27:
	movq	24(%rsp), %rdx
	movq	136(%rsp), %rsi
	movl	$2, %ecx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	152(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rsi
	leaq	172(%rsp), %rdi
	movl	$0x00000000, 172(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	172(%rsp), %xmm0
	call	__printf_chk@PLT
	xorl	%ecx, %ecx
	xorl	%esi, %esi
.L28:
	movl	%ecx, %eax
	cmpl	%ecx, 48(%rsp)
	jle	.L43
	cltd
	movl	(%r14,%rcx,4), %edi
	incq	%rcx
	idivl	%ebx
	addl	%edi, %esi
	movslq	%edx, %rdx
	addl	%edi, (%r12,%rdx,4)
	jmp	.L28
.L43:
	movl	%esi, %edx
	movl	$2, %edi
	leaq	.LC18(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC19(%rip), %rsi
	leaq	.LC20(%rip), %rdi
	xorl	%r15d, %r15d
	call	fopen@PLT
	movsd	.LC21(%rip), %xmm1
	xorps	%xmm0, %xmm0
	leaq	.LC22(%rip), %rdx
	movq	%rax, 8(%rsp)
	movq	%rax, %rdi
	movl	$2, %esi
	movb	$2, %al
	call	__fprintf_chk@PLT
.L30:
	cmpl	%r15d, %ebx
	jle	.L44
	movl	(%r12,%r15,4), %ecx
	movq	8(%rsp), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC24(%rip), %rdx
	incq	%r15
	call	__fprintf_chk@PLT
	jmp	.L30
.L44:
	movq	8(%rsp), %rdi
	leaq	.LC13(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	144(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	152(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	xorl	%eax, %eax
.L10:
	movq	184(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC25:
	.string	"_Z7CalcSepPfS_S_iiPiffi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7CalcSepPfS_S_iiPiffi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1064304640
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC10:
	.long	1232348160
	.align 4
.LC11:
	.long	1148846080
	.align 4
.LC15:
	.long	1080033280
	.section	.rodata.cst8
	.align 8
.LC21:
	.long	0
	.long	1074528256
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
//// notes

using namespace std;

///////////////////////////////////////////////////////////////////////////////
// GPU code to calculate the bin number.
// This assumes that you have normalized your data that you want to plot to 
// lie between 0.0 and 1.0. 
// Outside this range is classified as overflow or underflow.
///////////////////////////////////////////////////////////////////////////////
__device__ int get_bin_num(float normalized_val, int nbins)
{
    // The data goes in bins number 1 to nbins
    // 0 is the underflow
    // nbins-1 is the overflow
    //
    // Remember that we have underflow (0) and overflow (nbins-1) 
    if (normalized_val>=1.0)
    {
        // If it is greater than or equal to 1.0, put it in the overflow bin
        return nbins-1;
    }
    else if (normalized_val<0.0)
    {
        return 0;
    }
    else if (normalized_val==0.0)
    {
        return 1;
    }

    // Do this calculation only if it fails the other conditionals.
    // I think this buys us a few CPU cycles.
    int ret = (int)(normalized_val*(nbins-2)) + 1;    
    return ret;
}

///////////////////////////////////////////////////////////////////////////////
// GPU code to calculate the separation between two galaxies given the 
// right ascenscion and declanation.
///////////////////////////////////////////////////////////////////////////////
//__global__ void CalcSep(float* raA, float* decA, int ngals, int nthreads, int* hist_array, float hist_lo, float hist_hi, int hist_nbins)
__global__ void CalcSep(float* raA, float* sin_decA, float* cos_decA, int ngals, int nthreads, int* hist_array, float hist_lo, float hist_hi, int hist_nbins)
{
    //does all the i's simultaneously - one for each thread 
    int ix = blockDim.x * blockIdx.x + threadIdx.x;
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	
	extern __shared__ int s_data[];
	
	// need shared array that in nbins * nthreads
	//
	
	if (hist_nbins>2)	
	{
		for (int j = 0; j<hist_nbins; ++j){
			s_data[threadIdx.x*hist_nbins+j] = 0;
		}
	}
	

	__syncthreads();

    // Get normalization term
    float norm = hist_hi-hist_lo;
    float norm_val = 0;
    int bin = 0;
	
//    int hist_array_bin_block = ix*hist_nbins;
	int hist_array_bin_block = threadIdx.x*hist_nbins;

    int hist_array_bin = 0;

	const int Ngals = ngals;
    float sep=0;
	
	
	float sin_dec_ix;
	float cos_dec_ix;
	float sin_dec_ij;
	float cos_dec_ij;
	float ra_ix;
	float ra_ij;
	
		/*
	for(int k = 0; k< ngals; ++k){
		sin_dec[k]=sin_decA[k];
		cos_dec[k]=cos_decA[k];
		ra[k]=raA[k];
	}
	*/

    // Do the ix ``column"
	
	sin_dec_ix = sin_decA[ix];
    cos_dec_ix = cos_decA[ix];
	ra_ix = raA[ix];

	for(int ij=ix+1;ij<ngals;ij++)
    {
		//if(ix>=nthreads) continue;

       
        sin_dec_ij = sin_decA[ij];
		cos_dec_ij = cos_decA[ij];
		ra_ij = raA[ij];

        sep = acos( sin_dec_ix*sin_dec_ij + cos_dec_ix*cos_dec_ij*cos(fabs(ra_ix-ra_ij)) );

        norm_val = (sep-hist_lo)/norm;
        bin = get_bin_num(norm_val,hist_nbins);
        hist_array_bin = hist_array_bin_block + bin;

		//hist_array[hist_array_bin]++;

        // If we passed 0 bins or -x on the command line, don't try
        // to fill the super array.
        if (hist_nbins>2 )
        {
			if(index<nthreads) s_data[hist_array_bin]++;	
			//hist_array[hist_array_bin]++;
		}

    }//loop over gals

    // Then the ngals-ix ``column"
    ix = (ngals - 1) - ix;
	sin_dec_ix = sin_decA[ix];
    cos_dec_ix = cos_decA[ix];
	ra_ix = raA[ix];

	
    for(int ij=ix+1;ij<ngals;ij++)
    {
		//if(ix>=nthreads) continue;
				
		//sin_dec_ix = sin_decA[ix];
		sin_dec_ij = sin_decA[ij];
		//cos_dec_ix = cos_decA[ix];
		cos_dec_ij = cos_decA[ij];
		ra_ix = raA[ix];
		ra_ij = raA[ij];

        sep = acos( sin_dec_ix*sin_dec_ij + cos_dec_ix*cos_dec_ij*cos(fabs(ra_ix-ra_ij)) );
                
        norm_val = (sep-hist_lo)/norm;
        bin = get_bin_num(norm_val,hist_nbins);
        hist_array_bin = hist_array_bin_block + bin;
		//hist_array[hist_array_bin]++;
        
        // If we passed 0 bins or -x on the command line, don't try
        // to fill the super array.
        if (hist_nbins>2)
        {
            if(index<nthreads)s_data[hist_array_bin]++;	
			//hist_array[hist_array_bin]++;
        }
    }//loop over gals

	__syncthreads();
	
	// Now load s_data into 
		//for(int kbin =0; kbin<10; kbin++) {
	//s_data[threadIdx.x]=99;
	int hist_hostblock = blockIdx.x*hist_nbins;
	
	if(hist_nbins >2)// && threadIdx.x<hist_nbins) 
	{
		int thisbin = threadIdx.x;
		for(int thisbin=threadIdx.x; thisbin < hist_nbins; thisbin+=blockDim.x) 
		{				
			hist_hostblock	= thisbin*hist_nbins;
			for(int k =1; k < blockDim.x; k++)
			{
				//s_data[(hist_nbins*k) +threadIdx.x]=99;
				s_data[thisbin]+=s_data[(hist_nbins*k) + thisbin];
				//hist_array[hist_hostblock+threadIdx.x]+=s_data[(hist_nbins*k) +threadIdx.x];
			}
			hist_array[hist_hostblock+thisbin] = s_data[thisbin];
			//hist_array[hist_hostblock+threadIdx.x] =	 blockIdx.x;
		}
	}
}
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////


////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//Host code
int main(int argc, char **argv)
{
    int ngals = 1000;
    int nbins = 100;
    srand(time(0));

    ///////////////////////////////////////////////////////////////////////////
    // Grab the number of galaxies from the command line *if* they have 
    // been specified.
    if (argc>1)
    {
        ngals = atoi(argv[1]);
        if (argc>2)
        {
            nbins = atoi(argv[2]);
        }
    }
    else
    {
        printf("Usage: %s <number of galaxies> <number of histogram bins>\n",\
                argv[0]);
        printf("\nDefault is 1000 galaxies and 100 bins\n\n"); 
    }
    ///////////////////////////////////////////////////////////////////////////

    ///////////////////////////////////////////////////////////////////////////
    // Define histo arrays and memory info and the like
    size_t gal_mem_needed = ngals * sizeof(float);

    // How many threads will there be?
    int nthreads = ngals/2;
	
    printf("nthreads: %d\n",nthreads);

    float hist_lo = 0.0;
    float hist_hi = 3.5;

    // From here on out, use the number of bins with underflow/overflow added in
    // to the calculation.
    int nbins_with_overflow = nbins + 2;
	
	int nblocks = 256;//ceil(nthreads/(threadsPerBlock*1.0));
	int threadsPerBlock = ceil(nthreads/(nblocks*1.0));
	
	//int threadsPerBlock = 64;
	
	if(threadsPerBlock<nbins_with_overflow)
	{
		printf("Too many bins for this blocksize\n");
	}
	
	
	
	
	//int threadsPerBlock = ceil(nthreads/(nblocks*1.0));//nbins_with_overflow;

	//if (! nthreads%nblocks) threadsPerBlock++;
	
	
	//if (! nthreads%threadsPerBlock) nblocks++;

	printf("nblocks: %d\n",nblocks);	
	printf("nthreads/nblocks: %d\n",threadsPerBlock );	
	printf("shared memory allocated: %d\n",threadsPerBlock*nbins_with_overflow*sizeof(int));

    // Calculate our thread/grid/block sizes.
	//int threadsPerBlock = ;
	    // IS THIS CALCULATION BEING DONE PROPERLY? OPTIMALLY?????
    int blocksPerGrid = nblocks ;//(nthreads/threadsPerBlock)+1; //(nthreads + threadsPerBlock -1) / threadsPerBlock; //???????
	
	
		
	int nbins_in_super_hist_array = nblocks*nbins_with_overflow;


    size_t hist_mem_needed = nbins_in_super_hist_array*sizeof(int);

    ///////////////////////////////////////////////////////////////////////////
    //allocate vectors in host memory
    float* h_raA = 0; 
    float* h_decA = 0;

    float* h_sin_decA = 0; 
    float* h_cos_decA = 0;

    int *h_hist_array = 0;
    int *h_hist_array_compressed = 0;

    h_raA = (float*)malloc(gal_mem_needed);
    h_decA = (float*)malloc(gal_mem_needed);

    // Allocate memory for the cos and sin of the right asenscion. This saves
    // us some time rather than recalcuating this over and over on the GPUs.
    h_cos_decA = (float*)malloc(gal_mem_needed);
    h_sin_decA = (float*)malloc(gal_mem_needed);

    h_hist_array = (int*)malloc(hist_mem_needed);
    h_hist_array_compressed = (int*)malloc(nbins_with_overflow*sizeof(int));

    if (0==h_raA || 0==h_sin_decA || 0==h_cos_decA || 0==h_hist_array || 0==h_hist_array_compressed)
    {
        printf("Couldn't allocate memory on host....\n");
        return 1;
    }

    ///////////////////////////////////////////////////////////////////////////
    //allocate vectors in device memory
    float* d_raA=0;
    //float* d_decA=0;

    float* d_sin_decA=0;
    float* d_cos_decA=0;

    int *d_hist_array;

    hipMalloc(&d_raA, gal_mem_needed);
    //cudaMalloc(&d_decA, gal_mem_needed);

    hipMalloc(&d_cos_decA, gal_mem_needed);
    hipMalloc(&d_sin_decA, gal_mem_needed);

    hipMalloc(&d_hist_array, hist_mem_needed);

    if (0==d_raA || 0==d_cos_decA || 0==d_sin_decA || 0==d_hist_array)
    {
        printf("Couldn't allocate memory on device....\n");
        return 1;
    }

    ///////////////////////////////////////////////////////////////////////////
    // Initialise input vectors.
    // Place galaxies at random coords between 0 and 1.
    ///////////////////////////////////////////////////////////////////////////
    for(int i=0;i<ngals;i++)
    {

        h_raA[i] = rand(); 
        h_decA[i] = rand();

        h_cos_decA[i] = cos(h_decA[i]);
        h_sin_decA[i] = sin(h_decA[i]);

    }

    ///////////////////////////////////////////////////////////////////////////
    // Uncomment this section if you would also like to do the calculation on
    // the CPU.
    ///////////////////////////////////////////////////////////////////////////
    
    //calculate separation in CPU and calculate time needed
    clock_t teststart = clock();

    float testsep=0;
    for(int i=0;i<ngals;i++){
        for(int j=i+1;j<ngals;j++){
            testsep = acos( sin(h_decA[i])*sin(h_decA[j]) + \
            cos(h_decA[i])*cos(h_decA[j])*cos(fabs(h_raA[i]-h_raA[j])) );
        }
    }
    clock_t testend = clock();
    float testelapsed = (float)(testend-teststart);
    printf("elapsed time for CPU in ms: %f", testelapsed/CLOCKS_PER_SEC*1000);
    printf("\n");
    
    ///////////////////////////////////////////////////////////////////////////
    ///////////////////////////////////////////////////////////////////////////

    ///////////////////////////////////////////////////////////////////////////
    // Zero out the super-array that will hold the histogram entries
    // for each thread.
    printf("nbins_in_super_hist_array: %d\n",nbins_in_super_hist_array);
    for (int i=0;i<nbins_in_super_hist_array;i++)
    {
        h_hist_array[i]=0.0;
    }
    ///////////////////////////////////////////////////////////////////////////

    ///////////////////////////////////////////////////////////////////////////
    // Copy vectors from host to device memory.
    hipMemcpy(d_raA,  h_raA,  gal_mem_needed, hipMemcpyHostToDevice); 
    //cudaMemcpy(d_decA, h_decA, gal_mem_needed, cudaMemcpyHostToDevice); 

    hipMemcpy(d_sin_decA, h_sin_decA, gal_mem_needed, hipMemcpyHostToDevice); 
    hipMemcpy(d_cos_decA, h_cos_decA, gal_mem_needed, hipMemcpyHostToDevice); 

    hipMemcpy(d_hist_array, h_hist_array, hist_mem_needed, hipMemcpyHostToDevice); 

    ///////////////////////////////////////////////////////////////////////////
 
	
    // Set up the cuda timer. 
    // Ccan't use simple CPU timer since that would only time the kernel launch overhead. 
    // Need to make sure all threads have finished before stop the timer 
    // so can synchronise threads before and after kernel launch if using cpu timer? 
    // I didn't get sensible results when I've tried that though. 

    hipEvent_t cudastart, cudaend;
    hipEventCreate(&cudastart); 
    hipEventCreate(&cudaend);

    //record the start time
    hipEventRecord(cudastart,0);

    ///////////////////////////////////////////////////////////////////////////
    // Run the kernel! 
    //CalcSep<<<blocksPerGrid, threadsPerBlock>>>(d_raA, d_decA, ngals, nthreads, d_hist_array, hist_lo, hist_hi, nbins_with_overflow);
    CalcSep<<<blocksPerGrid, threadsPerBlock, threadsPerBlock*nbins_with_overflow*sizeof(int) >>>(d_raA, d_sin_decA, d_cos_decA,
															ngals, nthreads, d_hist_array, hist_lo, hist_hi, nbins_with_overflow);

    // Copy the info back off the GPU to the host.
    hipMemcpy(h_hist_array, d_hist_array, hist_mem_needed, hipMemcpyDeviceToHost); 

    ///////////////////////////////////////////////////////////////////////////
    // Record the end time
    hipEventRecord(cudaend,0);
    hipEventSynchronize(cudaend);

    ///////////////////////////////////////////////////////////////////////////
    // How long did the kernel take? this gives time in ms
    float cudaelapsed=0;
    hipEventElapsedTime(&cudaelapsed, cudastart, cudaend);
    printf("elapsed time for GPU in ms: %f\n",cudaelapsed);

    ///////////////////////////////////////////////////////////////////////////
    // Collapse the super histogram array to a simple histogram array and write
    // it out to histogram_array.txt
    int sum = 0;
    int master_bin = 0;
    for (int i=0;i<nbins_in_super_hist_array;i++)
    {
        //printf("%d ",h_hist_array[i]);
        sum += h_hist_array[i];

        master_bin = i%nbins_with_overflow;

        //printf("%d\n",master_bin);
        h_hist_array_compressed[master_bin] += h_hist_array[i];
    }
    printf("\ntotal: %d\n",sum);

    FILE *outfile; 
    outfile = fopen("histogram_array.txt","w+"); /* write to file (add text to 
                                                    a file or create a file if it does not exist.*/ 
    // Print out the compressed array
    fprintf(outfile,"%f %f\n",hist_lo,hist_hi);
    for (int i=0;i<nbins_with_overflow;i++)
    {
        fprintf(outfile,"%d ",h_hist_array_compressed[i]);
    }
    fprintf(outfile,"\n");
    fclose(outfile); /*done!*/ 

    ///////////////////////////////////////////////////////////////////////////
    // Free up the device memory.
    hipEventDestroy(cudastart);
    hipEventDestroy(cudaend);

    hipFree(d_raA); 
    //cudaFree(d_decA);
    hipFree(d_sin_decA);
    hipFree(d_cos_decA);
    hipFree(d_hist_array);

    // Free up the host memory.
    free(h_raA); 
    free(h_decA); 
    free(h_sin_decA); 
    free(h_cos_decA); 
    free(h_hist_array);
    free(h_hist_array_compressed);


}

	.text
	.file	"calc_separation_and_histogram_mark.hip"
	.globl	_Z22__device_stub__CalcSepPfS_S_iiPiffi # -- Begin function _Z22__device_stub__CalcSepPfS_S_iiPiffi
	.type	_Z22__device_stub__CalcSepPfS_S_iiPiffi,@function
_Z22__device_stub__CalcSepPfS_S_iiPiffi: # @_Z22__device_stub__CalcSepPfS_S_iiPiffi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	4(%rsp), %r9
	movss	%xmm0, (%r9)
	movq	%rsp, %r10
	movss	%xmm1, (%r10)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7CalcSepPfS_S_iiPiffi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__CalcSepPfS_S_iiPiffi, .Lfunc_end0-_Z22__device_stub__CalcSepPfS_S_iiPiffi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3f70000000000000              # double 0.00390625
.LCPI1_5:
	.quad	0x400c000000000000              # double 3.5
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI1_2:
	.long	0x49742400                      # float 1.0E+6
.LCPI1_3:
	.long	0x447a0000                      # float 1000
.LCPI1_4:
	.long	0x40600000                      # float 3.5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %ebp
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	cmpl	$2, %ebp
	jl	.LBB1_3
# %bb.1:
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %r15d
	movl	$102, %ebx
	cmpl	$2, %ebp
	je	.LBB1_4
# %bb.2:
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
	addl	$2, %ebx
	jmp	.LBB1_4
.LBB1_3:
	movq	(%r14), %rsi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1000, %r15d                    # imm = 0x3E8
	movl	$102, %ebx
.LBB1_4:
	movslq	%r15d, %rax
	leaq	(,%rax,4), %r12
	movq	%rax, 184(%rsp)                 # 8-byte Spill
	movl	%eax, %ebp
	shrl	$31, %ebp
	movl	%r15d, 12(%rsp)                 # 4-byte Spill
	addl	%r15d, %ebp
	sarl	%ebp
	movl	$.L.str.2, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebp, 120(%rsp)                 # 4-byte Spill
	cvtsi2sd	%ebp, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %ebp
	cmpl	%ebp, %ebx
	jle	.LBB1_6
# %bb.5:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB1_6:
	movl	$.L.str.4, %edi
	movl	$256, %esi                      # imm = 0x100
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.5, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %eax
	movl	%ebp, 124(%rsp)                 # 4-byte Spill
	imull	%ebp, %eax
	movslq	%eax, %rsi
	shlq	$2, %rsi
	movl	$.L.str.6, %edi
	movq	%rsi, 168(%rsp)                 # 8-byte Spill
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %eax
	shll	$8, %eax
	movl	%eax, 44(%rsp)                  # 4-byte Spill
	movslq	%eax, %r13
	shlq	$2, %r13
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r12, 136(%rsp)                 # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, 72(%rsp)                  # 8-byte Spill
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movslq	%ebx, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, 176(%rsp)                 # 8-byte Spill
	testq	%rax, %rax
	je	.LBB1_11
# %bb.7:
	cmpq	$0, 88(%rsp)                    # 8-byte Folded Reload
	je	.LBB1_11
# %bb.8:
	testq	%r14, %r14
	je	.LBB1_11
# %bb.9:
	testq	%rbp, %rbp
	je	.LBB1_11
# %bb.10:
	testq	%r12, %r12
	je	.LBB1_11
# %bb.12:
	movq	%r12, 64(%rsp)                  # 8-byte Spill
	movq	%r15, 96(%rsp)                  # 8-byte Spill
	movl	%ebx, 116(%rsp)                 # 4-byte Spill
	xorl	%ebx, %ebx
	leaq	104(%rsp), %r12
	movq	%rbx, (%r12)
	leaq	32(%rsp), %rax
	movq	%rbx, (%rax)
	leaq	56(%rsp), %r13
	movq	%rbx, (%r13)
	movq	%r12, %rdi
	movq	136(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	72(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rsi
	callq	hipMalloc
	cmpq	%rbx, (%r12)
	je	.LBB1_39
# %bb.13:
	cmpq	$0, 56(%rsp)
	je	.LBB1_39
# %bb.14:
	cmpq	$0, 32(%rsp)
	je	.LBB1_39
# %bb.15:
	cmpq	$0, 24(%rsp)
	je	.LBB1_39
# %bb.16:                               # %.preheader
	movl	12(%rsp), %eax                  # 4-byte Reload
	testl	%eax, %eax
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	jle	.LBB1_17
# %bb.20:                               # %.lr.ph.preheader
	movl	%eax, %r15d
	xorl	%ebx, %ebx
	movq	96(%rsp), %r13                  # 8-byte Reload
	movq	64(%rsp), %r12                  # 8-byte Reload
.LBB1_21:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbp,%rbx,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movss	%xmm0, (%r13,%rbx,4)
	callq	cosf
	movss	%xmm0, (%r14,%rbx,4)
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	sinf
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %r15
	jne	.LBB1_21
# %bb.18:                               # %._crit_edge
	callq	clock
	movq	%rax, %rbx
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	jle	.LBB1_19
# %bb.35:                               # %.lr.ph171.preheader
	movq	%rbx, 152(%rsp)                 # 8-byte Spill
	movq	%r14, 160(%rsp)                 # 8-byte Spill
	movq	%rbp, %rbx
	xorl	%ebp, %ebp
	movq	%r15, %r12
.LBB1_36:                               # %.lr.ph171
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_38 Depth 2
	movq	%rbp, %rax
	incq	%rbp
	cmpq	184(%rsp), %rbp                 # 8-byte Folded Reload
	jge	.LBB1_22
# %bb.37:                               # %.lr.ph168
                                        #   in Loop: Header=BB1_36 Depth=1
	movq	96(%rsp), %rcx                  # 8-byte Reload
	movss	(%rcx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movq	80(%rsp), %rcx                  # 8-byte Reload
	movss	(%rcx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 128(%rsp)                # 4-byte Spill
	movl	$1, %r14d
.LBB1_38:                               #   Parent Loop BB1_36 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	sinf
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	movss	(%r13,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	callq	sinf
	mulss	20(%rsp), %xmm0                 # 4-byte Folded Reload
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	cosf
	movss	%xmm0, 132(%rsp)                # 4-byte Spill
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	cosf
	mulss	132(%rsp), %xmm0                # 4-byte Folded Reload
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movss	128(%rsp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	subss	(%rbx,%r14,4), %xmm0
	andps	.LCPI1_1(%rip), %xmm0
	callq	cosf
	mulss	16(%rsp), %xmm0                 # 4-byte Folded Reload
	addss	20(%rsp), %xmm0                 # 4-byte Folded Reload
	callq	acosf
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB1_38
.LBB1_22:                               # %.loopexit
                                        #   in Loop: Header=BB1_36 Depth=1
	addq	$4, %rbx
	addq	$4, %r13
	decq	%r12
	cmpq	%r15, %rbp
	jne	.LBB1_36
# %bb.23:
	movq	160(%rsp), %r14                 # 8-byte Reload
	movq	80(%rsp), %rbp                  # 8-byte Reload
	movq	72(%rsp), %r13                  # 8-byte Reload
	movq	152(%rsp), %rbx                 # 8-byte Reload
	jmp	.LBB1_24
.LBB1_11:
	movl	$.Lstr.3, %edi
	jmp	.LBB1_40
.LBB1_39:
	movl	$.Lstr.2, %edi
.LBB1_40:
	callq	puts@PLT
	movl	$1, %ebp
	jmp	.LBB1_41
.LBB1_17:                               # %._crit_edge.thread
	callq	clock
	movq	%rax, %rbx
	jmp	.LBB1_24
.LBB1_19:
	movq	72(%rsp), %r13                  # 8-byte Reload
.LBB1_24:                               # %._crit_edge172
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI1_2(%rip), %xmm0
	mulss	.LCPI1_3(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.11, %edi
	movl	44(%rsp), %r15d                 # 4-byte Reload
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	116(%rsp), %ebx                 # 4-byte Reload
	testl	%ebx, %ebx
	movq	88(%rsp), %r12                  # 8-byte Reload
	jle	.LBB1_26
# %bb.25:                               # %.lr.ph175.preheader
	cmpl	$2, %r15d
	movl	$1, %edx
	cmovgel	%r15d, %edx
	shlq	$2, %rdx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_26:                               # %._crit_edge176
	movq	104(%rsp), %rdi
	movq	%rbp, %rsi
	movq	136(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	144(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	movq	%r13, %r15
	xorl	%r13d, %r13d
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	124(%rsp), %edx                 # 4-byte Reload
	btsq	$32, %rdx
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	$256, %rdi                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	movq	168(%rsp), %r8                  # 8-byte Reload
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	%r12, %rbp
	jne	.LBB1_28
# %bb.27:
	movq	104(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	24(%rsp), %r9
	movl	%ebx, (%rsp)
	movss	.LCPI1_4(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	120(%rsp), %r8d                 # 4-byte Reload
	callq	_Z22__device_stub__CalcSepPfS_S_iiPiffi
.LBB1_28:
	movq	%r14, %r12
	movq	24(%rsp), %rsi
	movq	%rbp, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	48(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	196(%rsp), %r15
	movl	$0, (%r15)
	movq	144(%rsp), %rsi
	movq	48(%rsp), %rdx
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
	testl	%ebx, %ebx
	movq	176(%rsp), %r15                 # 8-byte Reload
	jle	.LBB1_31
# %bb.29:                               # %.lr.ph180.preheader
	movl	44(%rsp), %eax                  # 4-byte Reload
	cmpl	$2, %eax
	movl	$1, %esi
	cmovgel	%eax, %esi
	xorl	%ecx, %ecx
	xorl	%r13d, %r13d
.LBB1_30:                               # %.lr.ph180
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbp,%rcx,4), %edi
	movl	%ecx, %eax
	xorl	%edx, %edx
	divl	%ebx
                                        # kill: def $edx killed $edx def $rdx
	addl	%edi, (%r15,%rdx,4)
	addl	%edi, %r13d
	incq	%rcx
	cmpq	%rcx, %rsi
	jne	.LBB1_30
.LBB1_31:                               # %._crit_edge181
	xorl	%ebp, %ebp
	movl	$.L.str.13, %edi
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.14, %edi
	movl	$.L.str.15, %esi
	callq	fopen
	movq	%rax, %r13
	movsd	.LCPI1_5(%rip), %xmm1           # xmm1 = mem[0],zero
	movl	$.L.str.16, %esi
	xorps	%xmm0, %xmm0
	movq	%rax, %rdi
	movb	$2, %al
	callq	fprintf
	testl	%ebx, %ebx
	jle	.LBB1_34
# %bb.32:                               # %.lr.ph184.preheader
	movl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB1_33:                               # %.lr.ph184
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r14,4), %edx
	movl	$.L.str.17, %esi
	movq	%r13, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%r14
	cmpq	%r14, %rbx
	jne	.LBB1_33
.LBB1_34:                               # %._crit_edge185
	movl	$10, %edi
	movq	%r13, %rsi
	callq	fputc@PLT
	movq	%r13, %rdi
	callq	fclose
	movq	144(%rsp), %rdi
	callq	hipEventDestroy
	movq	48(%rsp), %rdi
	callq	hipEventDestroy
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	96(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	64(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	88(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
.LBB1_41:
	movl	%ebp, %eax
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7CalcSepPfS_S_iiPiffi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7CalcSepPfS_S_iiPiffi,@object # @_Z7CalcSepPfS_S_iiPiffi
	.section	.rodata,"a",@progbits
	.globl	_Z7CalcSepPfS_S_iiPiffi
	.p2align	3, 0x0
_Z7CalcSepPfS_S_iiPiffi:
	.quad	_Z22__device_stub__CalcSepPfS_S_iiPiffi
	.size	_Z7CalcSepPfS_S_iiPiffi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Usage: %s <number of galaxies> <number of histogram bins>\n"
	.size	.L.str, 59

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"nthreads: %d\n"
	.size	.L.str.2, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"nblocks: %d\n"
	.size	.L.str.4, 13

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"nthreads/nblocks: %d\n"
	.size	.L.str.5, 22

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"shared memory allocated: %d\n"
	.size	.L.str.6, 29

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"elapsed time for CPU in ms: %f"
	.size	.L.str.9, 31

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"nbins_in_super_hist_array: %d\n"
	.size	.L.str.11, 31

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"elapsed time for GPU in ms: %f\n"
	.size	.L.str.12, 32

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"\ntotal: %d\n"
	.size	.L.str.13, 12

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"histogram_array.txt"
	.size	.L.str.14, 20

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"w+"
	.size	.L.str.15, 3

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"%f %f\n"
	.size	.L.str.16, 7

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"%d "
	.size	.L.str.17, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7CalcSepPfS_S_iiPiffi"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\nDefault is 1000 galaxies and 100 bins\n"
	.size	.Lstr, 40

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Too many bins for this blocksize"
	.size	.Lstr.1, 33

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Couldn't allocate memory on device...."
	.size	.Lstr.2, 39

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Couldn't allocate memory on host...."
	.size	.Lstr.3, 37

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__CalcSepPfS_S_iiPiffi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7CalcSepPfS_S_iiPiffi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7CalcSepPfS_S_iiPiffi ; -- Begin function _Z7CalcSepPfS_S_iiPiffi
	.globl	_Z7CalcSepPfS_S_iiPiffi
	.p2align	8
	.type	_Z7CalcSepPfS_S_iiPiffi,@function
_Z7CalcSepPfS_S_iiPiffi:                ; @_Z7CalcSepPfS_S_iiPiffi
; %bb.0:
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x28
	s_load_b32 s2, s[0:1], 0x44
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v12, v0, s18
	s_cmp_gt_i32 s18, 2
	s_cselect_b32 s13, -1, 0
	s_cmp_lt_i32 s18, 3
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.preheader120.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v12, 2, 0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s3, s18
.LBB0_2:                                ; %.preheader120
                                        ; =>This Inner Loop Header: Depth=1
	ds_store_b32 v1, v2
	v_add_nc_u32_e32 v1, 4, v1
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 0
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit121
	s_load_b256 s[4:11], s[0:1], 0x0
	s_and_b32 s12, 0xffff, s2
	v_sub_f32_e64 v13, s17, s16
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v3, 1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v3
	s_cbranch_execz .LBB0_18
; %bb.4:                                ; %.lr.ph
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s2, s18, -2
	v_mov_b32_e32 v11, 0
	v_cvt_f32_i32_e32 v16, s2
	s_add_i32 s15, s18, -1
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_mov_b32 s19, 0
	s_mov_b32 s20, 0x7fffff
	s_mov_b32 s21, 0xb94c1982
	s_mov_b32 s22, 0x37d75334
	s_mov_b32 s23, 0x3d1c21a7
	v_add_co_u32 v6, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v2, v[6:7], off
	global_load_b32 v14, v[8:9], off
	global_load_b32 v15, v[4:5], off
	v_ashrrev_i32_e32 v4, 31, v3
	v_cmp_gt_i32_e32 vcc_lo, s11, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[3:4]
	s_and_b32 s17, s13, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v9, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v9, vcc_lo
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v10, v[8:9], off
	global_load_b32 v17, v[4:5], off
	global_load_b32 v18, v[6:7], off
                                        ; implicit-def: $vgpr20
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v19, v15, v10
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f32_e64 0x48000000, |v19|
	s_xor_b32 s24, exec_lo, s3
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	v_and_b32_e32 v25, 0x7fffffff, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v28, v25, s20, 0x800000
	v_mad_u64_u32 v[20:21], null, 0xfe5163ab, v28, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v10, v21
	v_lshrrev_b32_e32 v25, 23, v25
	v_mad_u64_u32 v[21:22], null, 0x3c439041, v28, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v26, 0xffffff88, v25
	v_cmp_lt_u32_e32 vcc_lo, 63, v26
	v_cndmask_b32_e64 v27, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v10, v22 :: v_dual_add_nc_u32 v27, v27, v26
	v_mad_u64_u32 v[22:23], null, 0xdb629599, v28, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s2, 31, v27
	v_cndmask_b32_e32 v20, v22, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v29, 0, 0xffffffe0, s2
	v_dual_mov_b32 v10, v23 :: v_dual_add_nc_u32 v29, v29, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[23:24], null, 0xf534ddc0, v28, v[10:11]
	v_cmp_lt_u32_e64 s3, 31, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v10, v24 :: v_dual_cndmask_b32 v21, v23, v21
	v_mad_u64_u32 v[24:25], null, 0xfc2757d1, v28, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v20, v21, v20, s2
	v_mov_b32_e32 v10, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[25:26], null, 0x4e441529, v28, v[10:11]
	v_mov_b32_e32 v10, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[26:27], null, 0xa2f9836e, v28, v[10:11]
	v_cndmask_b32_e64 v10, 0, 0xffffffe0, s3
	v_cndmask_b32_e32 v28, v25, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v10, v10, v29
	v_dual_cndmask_b32 v26, v26, v24 :: v_dual_cndmask_b32 v25, v27, v25
	v_cndmask_b32_e32 v24, v24, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v27, 32, v10
	v_cndmask_b32_e64 v23, v26, v28, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, v25, v26, s2
	v_cndmask_b32_e64 v26, v28, v24, s2
	v_cndmask_b32_e64 v24, v24, v21, s2
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, v25, v23, s3
	v_cndmask_b32_e64 v23, v23, v26, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v24, s3
	v_cndmask_b32_e64 v20, v24, v20, s3
	v_alignbit_b32 v28, v25, v23, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v22, v23, v26, v27
	v_dual_cndmask_b32 v10, v28, v25 :: v_dual_cndmask_b32 v21, v22, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_alignbit_b32 v25, v26, v20, v27
	v_bfe_u32 v22, v10, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v23, v10, v21, 30
	v_cndmask_b32_e32 v25, v25, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v24, 0, v22
	v_alignbit_b32 v21, v21, v25, 30
	v_alignbit_b32 v20, v25, v20, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v23, v23, v24
	v_xor_b32_e32 v21, v21, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v20, v20, v24
	v_lshrrev_b32_e32 v24, 29, v10
	v_clz_i32_u32_e32 v26, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 31, v24
	v_min_u32_e32 v26, 32, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v27, 0.5, v24
	v_sub_nc_u32_e32 v25, 31, v26
	v_lshlrev_b32_e32 v28, 23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v23, v23, v21, v25
	v_alignbit_b32 v20, v21, v20, v25
	v_sub_nc_u32_e32 v27, v27, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v21, v23, v20, 9
	v_lshrrev_b32_e32 v23, 9, v23
	v_clz_i32_u32_e32 v25, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v25, 32, v25
	v_sub_nc_u32_e32 v29, 31, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v20, v21, v20, v29
	v_or_b32_e32 v21, v23, v27
	v_add_lshl_u32 v23, v25, v26, 23
	v_lshrrev_b32_e32 v20, 9, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v25, 0x3fc90fda, v21
	v_sub_nc_u32_e32 v20, v20, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v23, 0x3fc90fda, v21, -v25
	v_add_nc_u32_e32 v20, 0x33000000, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, 0x33a22168, v21
	v_or_b32_e32 v20, v20, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, 0x3fc90fda, v20
	v_lshrrev_b32_e32 v20, 30, v10
	v_add_f32_e32 v10, v25, v23
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v20, v22, v20
.LBB0_7:                                ; %Flow204
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_and_not1_saveexec_b32 s2, s24
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
	v_mul_f32_e64 v10, 0x3f22f983, |v19|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v20, v10
	v_fma_f32 v10, 0xbfc90fda, v20, |v19|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, 0xb3a22168, v20
	v_fmac_f32_e32 v10, 0xa7c234c4, v20
	v_cvt_i32_f32_e32 v20, v20
; %bb.9:                                ; %_ZL3cosf.exit
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v21, v10, v10 :: v_dual_and_b32 v24, 1, v20
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v18, v14, v18
	v_lshlrev_b32_e32 v20, 30, v20
	v_fmaak_f32 v22, s21, v21, 0x3c0881c4
	v_cmp_eq_u32_e32 vcc_lo, 0, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v20, 0x80000000, v20
	v_fmaak_f32 v22, v21, v22, 0xbe2aaa9d
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v23, s22, v21, 0xbab64f3b :: v_dual_mul_f32 v22, v21, v22
	v_dual_fmaak_f32 v23, v21, v23, 0x3d2aabf7 :: v_dual_fmac_f32 v10, v10, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v23, v21, v23, 0xbf000004
	v_fma_f32 v21, v21, v23, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, -v10, v21, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v19, 0x1f8
	v_xor_b32_e32 v10, v20, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, 0x7fc00000, v10, vcc_lo
	v_mul_f32_e32 v10, v18, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v2, v17
	v_fma_f32 v17, |v10|, -0.5, 0.5
	v_mul_f32_e32 v18, v10, v10
	v_cmp_gt_f32_e64 vcc_lo, |v10|, 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v17, v18, v17, vcc_lo
	v_fmaak_f32 v18, s23, v17, 0x3c5fc5da
	v_sqrt_f32_e32 v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v18, v17, v18, 0x3d034c3c
	v_fmaak_f32 v18, v17, v18, 0x3d3641b1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v18, v17, v18, 0x3d999bc8
	v_fmaak_f32 v18, v17, v18, 0x3e2aaaac
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v17, v18
	s_waitcnt_depctr 0xfff
	v_fmac_f32_e32 v19, v19, v17
	v_add_f32_e32 v18, v19, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v19, 0x40490fdb, v18
	v_cmp_gt_f32_e64 s2, 0, v10
	v_fmac_f32_e32 v10, v10, v17
	v_cndmask_b32_e64 v17, v18, v19, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, 0x3fc90fdb, v10
	s_mov_b32 s2, exec_lo
	v_cndmask_b32_e32 v10, v10, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_f32_e32 v10, s16, v10
	v_div_scale_f32 v17, null, v13, v13, v10
	v_div_scale_f32 v20, vcc_lo, v10, v13, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v18, v17
	s_waitcnt_depctr 0xfff
	v_fma_f32 v19, -v17, v18, 1.0
	v_fmac_f32_e32 v18, v19, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v19, v20, v18
	v_fma_f32 v21, -v17, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v21, v18
	v_fma_f32 v17, -v17, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v17, v17, v18, v19
	v_div_fixup_f32 v17, v17, v13, v10
	v_mov_b32_e32 v10, s15
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_nle_f32_e32 1.0, v17
	s_cbranch_execz .LBB0_15
; %bb.10:                               ;   in Loop: Header=BB0_5 Depth=1
	v_mov_b32_e32 v10, 0
	s_mov_b32 s3, exec_lo
	v_cmpx_ngt_f32_e32 0, v17
	s_cbranch_execz .LBB0_14
; %bb.11:                               ;   in Loop: Header=BB0_5 Depth=1
	v_mov_b32_e32 v10, 1
	s_mov_b32 s24, exec_lo
	v_cmpx_neq_f32_e32 0, v17
; %bb.12:                               ;   in Loop: Header=BB0_5 Depth=1
	v_mul_f32_e32 v10, v17, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v10, v10
	v_add_nc_u32_e32 v10, 1, v10
; %bb.13:                               ; %Flow202
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
.LBB0_14:                               ; %Flow203
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_15:                               ; %_Z11get_bin_numfi.exit
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_5 Depth=1
	v_add_nc_u32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v10, v10, 2, 0
	ds_load_b32 v17, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v17, 1, v17
	ds_store_b32 v10, v17
.LBB0_17:                               ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_nc_u32_e32 v3, 1, v3
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s10, v3
	v_add_co_u32 v8, s2, v8, 4
	v_add_co_ci_u32_e64 v9, s2, 0, v9, s2
	s_or_b32 s19, vcc_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_5
.LBB0_18:                               ; %Flow206
	s_or_b32 exec_lo, exec_lo, s14
	v_sub_nc_u32_e32 v2, s10, v1
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v2
	s_cbranch_execz .LBB0_33
; %bb.19:                               ; %.lr.ph127
	v_xad_u32 v3, v1, -1, s10
	s_add_i32 s2, s18, -2
	v_mov_b32_e32 v9, 0
	v_cvt_f32_i32_e32 v15, s2
	s_add_i32 s10, s18, -1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v5, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v10, v[5:6], off
	global_load_b32 v11, v[7:8], off
	global_load_b32 v14, v[3:4], off
	v_ashrrev_i32_e32 v3, 31, v2
	v_cmp_gt_i32_e32 vcc_lo, s11, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	s_and_b32 s11, s13, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v7, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s4, 0
	s_mov_b32 s5, 0x7fffff
	s_mov_b32 s6, 0xb94c1982
	s_mov_b32 s7, 0x37d75334
	s_mov_b32 s8, 0x3d1c21a7
.LBB0_20:                               ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[6:7], off
	global_load_b32 v16, v[2:3], off
	global_load_b32 v17, v[4:5], off
                                        ; implicit-def: $vgpr19
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v18, v14, v8
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f32_e64 0x48000000, |v18|
	s_xor_b32 s9, exec_lo, s3
	s_cbranch_execz .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_20 Depth=1
	v_and_b32_e32 v24, 0x7fffffff, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_or_b32 v27, v24, s5, 0x800000
	v_lshrrev_b32_e32 v24, 23, v24
	v_mad_u64_u32 v[19:20], null, 0xfe5163ab, v27, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v25, 0xffffff88, v24
	v_cmp_lt_u32_e32 vcc_lo, 63, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v8, v20
	v_cndmask_b32_e64 v26, 0, 0xffffffc0, vcc_lo
	v_mad_u64_u32 v[20:21], null, 0x3c439041, v27, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v26, v26, v25
	v_mov_b32_e32 v8, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s2, 31, v26
	v_mad_u64_u32 v[21:22], null, 0xdb629599, v27, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v28, 0, 0xffffffe0, s2
	v_add_nc_u32_e32 v28, v28, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v8, v22 :: v_dual_cndmask_b32 v19, v21, v19
	v_cmp_lt_u32_e64 s3, 31, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[22:23], null, 0xf534ddc0, v27, v[8:9]
	v_mov_b32_e32 v8, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v22, v20, vcc_lo
	v_mad_u64_u32 v[23:24], null, 0xfc2757d1, v27, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v19, v20, v19, s2
	v_mov_b32_e32 v8, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[24:25], null, 0x4e441529, v27, v[8:9]
	v_mov_b32_e32 v8, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[25:26], null, 0xa2f9836e, v27, v[8:9]
	v_cndmask_b32_e64 v8, 0, 0xffffffe0, s3
	v_cndmask_b32_e32 v27, v24, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v25, v25, v23 :: v_dual_add_nc_u32 v8, v8, v28
	v_dual_cndmask_b32 v24, v26, v24 :: v_dual_cndmask_b32 v23, v23, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v26, 32, v8
	v_cndmask_b32_e64 v22, v25, v27, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v24, v24, v25, s2
	v_cndmask_b32_e64 v25, v27, v23, s2
	v_cndmask_b32_e64 v23, v23, v20, s2
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v24, v24, v22, s3
	v_cndmask_b32_e64 v22, v22, v25, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v25, v25, v23, s3
	v_cndmask_b32_e64 v19, v23, v19, s3
	v_alignbit_b32 v27, v24, v22, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_alignbit_b32 v21, v22, v25, v26
	v_cndmask_b32_e32 v8, v27, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v20, v21, v22, vcc_lo
	v_alignbit_b32 v24, v25, v19, v26
	v_bfe_u32 v21, v8, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v22, v8, v20, 30
	v_cndmask_b32_e32 v24, v24, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v23, 0, v21
	v_alignbit_b32 v20, v20, v24, 30
	v_alignbit_b32 v19, v24, v19, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v22, v22, v23
	v_xor_b32_e32 v20, v20, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v19, v19, v23
	v_lshrrev_b32_e32 v23, 29, v8
	v_clz_i32_u32_e32 v25, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v23, 31, v23
	v_min_u32_e32 v25, 32, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v26, 0.5, v23
	v_sub_nc_u32_e32 v24, 31, v25
	v_lshlrev_b32_e32 v27, 23, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v22, v22, v20, v24
	v_alignbit_b32 v19, v20, v19, v24
	v_sub_nc_u32_e32 v26, v26, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v20, v22, v19, 9
	v_lshrrev_b32_e32 v22, 9, v22
	v_clz_i32_u32_e32 v24, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v24, 32, v24
	v_sub_nc_u32_e32 v28, 31, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v19, v20, v19, v28
	v_or_b32_e32 v20, v22, v26
	v_add_lshl_u32 v22, v24, v25, 23
	v_lshrrev_b32_e32 v19, 9, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v24, 0x3fc90fda, v20
	v_sub_nc_u32_e32 v19, v19, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v22, 0x3fc90fda, v20, -v24
	v_add_nc_u32_e32 v19, 0x33000000, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v22, 0x33a22168, v20
	v_or_b32_e32 v19, v19, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, 0x3fc90fda, v19
	v_lshrrev_b32_e32 v19, 30, v8
	v_dual_add_f32 v8, v24, v22 :: v_dual_add_nc_u32 v19, v21, v19
.LBB0_22:                               ; %Flow199
                                        ;   in Loop: Header=BB0_20 Depth=1
	s_and_not1_saveexec_b32 s2, s9
; %bb.23:                               ;   in Loop: Header=BB0_20 Depth=1
	v_mul_f32_e64 v8, 0x3f22f983, |v18|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v19, v8
	v_fma_f32 v8, 0xbfc90fda, v19, |v18|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, 0xb3a22168, v19
	v_fmac_f32_e32 v8, 0xa7c234c4, v19
	v_cvt_i32_f32_e32 v19, v19
; %bb.24:                               ; %_ZL3cosf.exit113
                                        ;   in Loop: Header=BB0_20 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v20, v8, v8 :: v_dual_and_b32 v23, 1, v19
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v17, v11, v17
	v_lshlrev_b32_e32 v19, 30, v19
	v_fmaak_f32 v21, s6, v20, 0x3c0881c4
	v_cmp_eq_u32_e32 vcc_lo, 0, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v19, 0x80000000, v19
	v_fmaak_f32 v21, v20, v21, 0xbe2aaa9d
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v22, s7, v20, 0xbab64f3b :: v_dual_mul_f32 v21, v20, v21
	v_fmaak_f32 v22, v20, v22, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v8, v8, v21
	v_fmaak_f32 v22, v20, v22, 0xbf000004
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v20, v20, v22, 1.0
	v_cndmask_b32_e64 v8, -v8, v20, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v18, 0x1f8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v8, v19, v8
	v_cndmask_b32_e32 v8, 0x7fc00000, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v17, v8
	v_fmac_f32_e32 v8, v10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f32 v16, |v8|, -0.5, 0.5
	v_mul_f32_e32 v17, v8, v8
	v_cmp_gt_f32_e64 vcc_lo, |v8|, 0.5
	v_cndmask_b32_e32 v16, v17, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmaak_f32 v17, s8, v16, 0x3c5fc5da
	v_sqrt_f32_e32 v18, v16
	v_fmaak_f32 v17, v16, v17, 0x3d034c3c
	v_cmp_gt_f32_e64 s2, 0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v17, v16, v17, 0x3d3641b1
	v_fmaak_f32 v17, v16, v17, 0x3d999bc8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v17, v16, v17, 0x3e2aaaac
	v_mul_f32_e32 v16, v16, v17
	s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v18, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v8, v8, v16 :: v_dual_add_f32 v17, v18, v18
	v_sub_f32_e32 v8, 0x3fc90fdb, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v18, 0x40490fdb, v17
	v_cndmask_b32_e64 v16, v17, v18, s2
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v16, vcc_lo
	v_subrev_f32_e32 v8, s16, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v16, null, v13, v13, v8
	v_div_scale_f32 v19, vcc_lo, v8, v13, v8
	v_rcp_f32_e32 v17, v16
	s_waitcnt_depctr 0xfff
	v_fma_f32 v18, -v16, v17, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v17, v18, v17
	v_mul_f32_e32 v18, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v20, -v16, v18, v19
	v_fmac_f32_e32 v18, v20, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, -v16, v18, v19
	v_div_fmas_f32 v16, v16, v17, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v16, v16, v13, v8
	v_mov_b32_e32 v8, s10
	v_cmpx_nle_f32_e32 1.0, v16
	s_cbranch_execz .LBB0_30
; %bb.25:                               ;   in Loop: Header=BB0_20 Depth=1
	v_mov_b32_e32 v8, 0
	s_mov_b32 s3, exec_lo
	v_cmpx_ngt_f32_e32 0, v16
	s_cbranch_execz .LBB0_29
; %bb.26:                               ;   in Loop: Header=BB0_20 Depth=1
	v_mov_b32_e32 v8, 1
	s_mov_b32 s9, exec_lo
	v_cmpx_neq_f32_e32 0, v16
; %bb.27:                               ;   in Loop: Header=BB0_20 Depth=1
	v_mul_f32_e32 v8, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v8, v8
	v_add_nc_u32_e32 v8, 1, v8
; %bb.28:                               ; %Flow197
                                        ;   in Loop: Header=BB0_20 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_29:                               ; %Flow198
                                        ;   in Loop: Header=BB0_20 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_30:                               ; %_Z11get_bin_numfi.exit115
                                        ;   in Loop: Header=BB0_20 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_20 Depth=1
	v_add_nc_u32_e32 v8, v8, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v8, v8, 2, 0
	ds_load_b32 v16, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v16, 1, v16
	ds_store_b32 v8, v16
.LBB0_32:                               ;   in Loop: Header=BB0_20 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_nc_u32_e32 v1, -1, v1
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	v_add_co_u32 v6, s2, v6, 4
	v_add_co_ci_u32_e64 v7, s2, 0, v7, s2
	s_or_b32 s4, vcc_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_20
.LBB0_33:                               ; %Flow201
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_gt_i32_e32 vcc_lo, s18, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s2, s13, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_39
; %bb.34:                               ; %.preheader.lr.ph
	s_load_b64 s[2:3], s[0:1], 0x20
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_gt_u32 s12, 1
	s_mov_b32 s7, 0
	s_cselect_b32 s1, -1, 0
	s_lshl_b32 s4, s18, 2
	s_add_i32 s5, s18, 1
	v_add3_u32 v1, 0, s4, v1
	s_add_i32 s6, s12, -1
	s_lshl_b32 s8, s12, 2
.LBB0_35:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_36 Depth 2
	v_lshl_add_u32 v3, v0, 2, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v1
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_mov_b32 s0, s6
	ds_load_b32 v2, v3
	s_cbranch_vccnz .LBB0_38
.LBB0_36:                               ; %.lr.ph130
                                        ;   Parent Loop BB0_35 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v5, v4
	v_add_nc_u32_e32 v4, s4, v4
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v2, v5
	s_cbranch_scc0 .LBB0_36
; %bb.37:                               ; %._crit_edge131
                                        ;   in Loop: Header=BB0_35 Depth=1
	ds_store_b32 v3, v2
.LBB0_38:                               ; %Flow
                                        ;   in Loop: Header=BB0_35 Depth=1
	v_mul_lo_u32 v3, v0, s5
	v_add_nc_u32_e32 v0, s12, v0
	v_add_nc_u32_e32 v1, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_le_i32_e32 vcc_lo, s18, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, s0, s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s3, v4, s0
	global_store_b32 v[3:4], v2, off
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_35
.LBB0_39:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7CalcSepPfS_S_iiPiffi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 25
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7CalcSepPfS_S_iiPiffi, .Lfunc_end0-_Z7CalcSepPfS_S_iiPiffi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3692
; NumSgprs: 27
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 27
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         176
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7CalcSepPfS_S_iiPiffi
    .private_segment_fixed_size: 0
    .sgpr_count:     27
    .sgpr_spill_count: 0
    .symbol:         _Z7CalcSepPfS_S_iiPiffi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     30
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
