#include <stdio.h>
#include <cuda_runtime.h>
#define block_size 8
#define N (1<<9)
#define tile_size 64

float* fillArray(float* arr)
{
    //Seed rand()
    srand(42);
    for (int i = 0; i < N*N; i++)
    {
        arr[i] = rand() % 100;
    }
    return arr;
}

void printArray(float* arr)
{
    for (int i = 0; i < N*N; i++)
        printf("%f ", arr[i]);
    printf("\n");
}

float* seq_Transpose(float* arr, float* out)
{
    int row, col, t;
    for (int i = 0; i < N*N; i++)
    {
        row = i/N;
        col = i % N;
        t = col*N + row;
        out[t] = arr[i];
    }
    return out;
}

bool checkTranspose(float* arr, float* arrT)
{
    int row, col, indx, indxT;
    for (int i = 0; i < N*N; i++)
    {
        row = i/N;
        col = i % N;
        indx = row*N + col;
        indxT = col*N + row;
        if (arr[indx] != arrT[indxT])
        {
            return 0;
        }
    }
    return 1;
}
void checkCUDAError(const char *msg) 
{
    cudaError_t err = cudaGetLastError();
    if( cudaSuccess != err) {
        fprintf(stderr, "Cuda error: %s: %s.\n", msg, cudaGetErrorString( err) );
        exit(EXIT_FAILURE);
    }
}
__global__ void glob_gpuTranspose(float* arr, float* out)
{
    int row, col, t;
    unsigned int i = threadIdx.x + blockIdx.x*blockDim.x;
    if (i < (N*N))
    {
        row = i/N;
        col = i % N;
        t = col*N + row;
        out[t] = arr[i];
    }
}


__global__ void share_gpuTranspose(float* arr, float* out)
{
    __shared__ float tile[tile_size][tile_size];
 
    unsigned int row = threadIdx.x + blockIdx.x*tile_size;
    unsigned int col = threadIdx.y + blockIdx.y*tile_size;

    for (int i = 0; i < tile_size; i += block_size)
    {
        if ((row < N*N) && (col < N*N))
        tile[threadIdx.y+i][threadIdx.x] = arr[(col+i)*N + row];
    }
    __syncthreads();
    
    row = blockIdx.y*tile_size + threadIdx.x;
    col = blockIdx.x*tile_size + threadIdx.y;
 

    for (int i = 0; i < tile_size; i += block_size)
    {
        if ((row < N*N) && (col < N*N))
        out[(col +i)*N + row] = tile[threadIdx.x][threadIdx.y + i];
    }

 
}

int main (void)
{
    printf("-------------------N = %d----------------\n", N);
    //Declare host arrays
    float* h_in;
    float* h_out;
    //Declare device arrays
    float* d_in;
    float* d_out;
 
    //Set amount of memory required for arrays
    const int num_bytes = N*N*sizeof(float);
 
    //Allocate memory for host array
    h_in = (float*)malloc(num_bytes);
    h_out = (float*)malloc(num_bytes);

    //Fill host array
    h_in = fillArray(h_in);

    //Allocate memory to device
    cudaMalloc((void**) &d_in, num_bytes);
    cudaMalloc((void**) &d_out, num_bytes);

    if(h_in == 0 || h_out == 0 || d_in == 0 || d_out == 0)
    {
        printf("Couldn't allocate memory\n");
        return 1;
    }
 
    //Initialise Timing(Sequential)
    cudaEvent_t launch_begin, launch_end;
    cudaEventCreate(&launch_begin);
    cudaEventCreate(&launch_end);

    cudaEventRecord(launch_begin,0);
    //Sequential Transpose
    h_out = seq_Transpose(h_in, h_out);

    cudaEventRecord(launch_end,0);
    cudaEventSynchronize(launch_end);

    float seq_time = 0;
	cudaEventElapsedTime(&seq_time, launch_begin, launch_end);
    //End Timing (Sequential)
    float cputp = 1e-9*N*N/(seq_time*1e-3);//divive by 10^9 for giga and times by 10^3 to get seconds
    if (checkTranspose(h_in,h_out))
    {
        printf("CPU: Run Time: %f ms\n", seq_time);
        printf("CPU: Speed Up: %fx\n", seq_time/seq_time);
        printf("CPU: Throughputs: %f GFLOP/s\n\n",cputp );
    }
    else
    printf("Transpose failed (Sequential)");
/////////////////////GPU Section/////////////////////////////
 
    //Copy host arrays to device arrays
    cudaMemcpy(d_in, h_in, num_bytes, cudaMemcpyHostToDevice);
    
    //Declare size of blocks and grid
    size_t num_threads = 256;
    size_t num_blocks = (N*N) / num_threads;
 
    //Zero output memory
    memset(h_out,  0, num_bytes);
    
    if (N % num_threads)
        ++num_blocks;

    //Initialise Timing(Global)
    cudaEventCreate(&launch_begin);
    cudaEventCreate(&launch_end);
 
    cudaEventRecord(launch_begin,0);

    //Global kernel
    glob_gpuTranspose<<<num_blocks, num_threads>>>(d_in, d_out);

    cudaEventRecord(launch_end,0);
    cudaEventSynchronize(launch_end);

    float glob_time = 0;
	cudaEventElapsedTime(&glob_time, launch_begin, launch_end);
    //End Timing
 
    cudaMemcpy(h_out, d_out, num_bytes, cudaMemcpyDeviceToHost);
    
    if (checkTranspose(h_in,h_out))
    {
        printf("GPU(Global): Run Time: %f ms\n", glob_time);
        printf("GPU(Global): Speed Up: %fx\n", seq_time/glob_time);
        printf("GPU(Global): Throughputs: %f GFLOP/s\n", 1e-9*N*N/(glob_time*1e-3));
        printf("GPU(Global): Ratio of Throughputs: %f\n\n", 1e-9*N*N/(glob_time*1e-3)/cputp);
    }
    else
    printf("Transpose failed (Global)");

    checkCUDAError("glob_gpuTranspose");

    dim3 dimGrid(N/tile_size,N/tile_size,1);
    dim3 dimBlock(tile_size, block_size,1);
 
    memset(h_out,  0, num_bytes);
    cudaMemset(d_out, 0, num_bytes);

    //Initialise Timing(Shared)
    cudaEventCreate(&launch_begin);
    cudaEventCreate(&launch_end);
 
    cudaEventRecord(launch_begin,0);

    //Shared kernel    
    share_gpuTranspose<<<dimGrid, dimBlock>>>(d_in, d_out);

    cudaEventRecord(launch_end,0);
    cudaEventSynchronize(launch_end);

    float share_time = 0;
	cudaEventElapsedTime(&share_time, launch_begin, launch_end);
    //End Timing
 
    cudaMemcpy(h_out, d_out, num_bytes, cudaMemcpyDeviceToHost);
    
    if (checkTranspose(h_in,h_out))
    {
        printf("GPU (Shared) tile size = %d, block size = %d: Run Time: %f ms\n", tile_size, block_size, share_time);
        printf("GPU (Shared) tile size = %d, block size = %d: Speed Up: %fx\n", tile_size, block_size, seq_time/share_time);
        printf("GPU (Shared) tile size = %d, block size = %d: Throughputs: %f GFLOPS/s\n\n", tile_size, block_size, 1e-9*N*N/(share_time*1e-3));
        printf("GPU (Shared) tile size = %d, block size = %d: Throughput Ratio: %f GFLOPS/s\n\n", tile_size, block_size, 1e-9*N*N/(share_time*1e-3)/cputp);
    }
    else
    printf("Transpose failed (Shared)");

    checkCUDAError("share_gpuTranspose");

    cudaEventDestroy(launch_begin);
    cudaEventDestroy(launch_end);
    //printArray(h_out);
    //Free host array
    free(h_in);
    free(h_out);
 
    //Free device array
    cudaFree(d_in);
    cudaFree(d_out);
    return 0;
}
	.file	"tmpxft_00322302_00000000-6_Transpose.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9fillArrayPf
	.type	_Z9fillArrayPf, @function
_Z9fillArrayPf:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$100, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	movl	$42, %edi
	call	srand@PLT
.L3:
	call	rand@PLT
	cltd
	idivl	%r12d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$262144, %rbp
	jne	.L3
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9fillArrayPf, .-_Z9fillArrayPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%f "
.LC1:
	.string	"\n"
	.text
	.globl	_Z10printArrayPf
	.type	_Z10printArrayPf, @function
_Z10printArrayPf:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC0(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L8:
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	movq	%r12, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbx
	cmpq	$262144, %rbx
	jne	.L8
	popq	%rbx
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z10printArrayPf, .-_Z10printArrayPf
	.globl	_Z13seq_TransposePfS_
	.type	_Z13seq_TransposePfS_, @function
_Z13seq_TransposePfS_:
.LFB2029:
	.cfi_startproc
	endbr64
	movq	%rsi, %rax
	xorl	%ecx, %ecx
.L12:
	movl	%ecx, %edx
	movl	%ecx, %esi
	movss	(%rdi,%rcx,4), %xmm0
	incq	%rcx
	andl	$511, %edx
	sarl	$9, %esi
	sall	$9, %edx
	addl	%esi, %edx
	movslq	%edx, %rdx
	movss	%xmm0, (%rax,%rdx,4)
	cmpq	$262144, %rcx
	jne	.L12
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z13seq_TransposePfS_, .-_Z13seq_TransposePfS_
	.globl	_Z14checkTransposePfS_
	.type	_Z14checkTransposePfS_, @function
_Z14checkTransposePfS_:
.LFB2030:
	.cfi_startproc
	endbr64
	xorl	%edx, %edx
.L17:
	movl	%edx, %eax
	movl	%edx, %ecx
	movss	(%rdi,%rdx,4), %xmm0
	andl	$511, %eax
	sarl	$9, %ecx
	sall	$9, %eax
	addl	%ecx, %eax
	cltq
	ucomiss	(%rsi,%rax,4), %xmm0
	jp	.L18
	jne	.L18
	incq	%rdx
	cmpq	$262144, %rdx
	jne	.L17
	movb	$1, %al
	ret
.L18:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z14checkTransposePfS_, .-_Z14checkTransposePfS_
	.section	.rodata.str1.1
.LC2:
	.string	"Cuda error: %s: %s.\n"
	.text
	.globl	_Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc, @function
_Z14checkCUDAErrorPKc:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L21
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	leaq	.LC2(%rip), %rdx
	movq	%rax, %r8
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L21:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc
	.globl	_Z39__device_stub__Z17glob_gpuTransposePfS_PfS_
	.type	_Z39__device_stub__Z17glob_gpuTransposePfS_PfS_, @function
_Z39__device_stub__Z17glob_gpuTransposePfS_PfS_:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17glob_gpuTransposePfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L24:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z39__device_stub__Z17glob_gpuTransposePfS_PfS_, .-_Z39__device_stub__Z17glob_gpuTransposePfS_PfS_
	.globl	_Z17glob_gpuTransposePfS_
	.type	_Z17glob_gpuTransposePfS_, @function
_Z17glob_gpuTransposePfS_:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17glob_gpuTransposePfS_PfS_
	.cfi_endproc
.LFE2058:
	.size	_Z17glob_gpuTransposePfS_, .-_Z17glob_gpuTransposePfS_
	.globl	_Z40__device_stub__Z18share_gpuTransposePfS_PfS_
	.type	_Z40__device_stub__Z18share_gpuTransposePfS_PfS_, @function
_Z40__device_stub__Z18share_gpuTransposePfS_PfS_:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18share_gpuTransposePfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L29:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z40__device_stub__Z18share_gpuTransposePfS_PfS_, .-_Z40__device_stub__Z18share_gpuTransposePfS_PfS_
	.globl	_Z18share_gpuTransposePfS_
	.type	_Z18share_gpuTransposePfS_, @function
_Z18share_gpuTransposePfS_:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z18share_gpuTransposePfS_PfS_
	.cfi_endproc
.LFE2060:
	.size	_Z18share_gpuTransposePfS_, .-_Z18share_gpuTransposePfS_
	.section	.rodata.str1.1
.LC3:
	.string	"-------------------N = %d----------------\n"
.LC4:
	.string	"Couldn't allocate memory\n"
.LC8:
	.string	"CPU: Run Time: %f ms\n"
.LC9:
	.string	"CPU: Speed Up: %fx\n"
.LC10:
	.string	"CPU: Throughputs: %f GFLOP/s\n\n"
.LC11:
	.string	"Transpose failed (Sequential)"
.LC12:
	.string	"GPU(Global): Run Time: %f ms\n"
.LC13:
	.string	"GPU(Global): Speed Up: %fx\n"
.LC14:
	.string	"GPU(Global): Throughputs: %f GFLOP/s\n"
.LC15:
	.string	"GPU(Global): Ratio of Throughputs: %f\n\n"
.LC16:
	.string	"Transpose failed (Global)"
.LC17:
	.string	"glob_gpuTranspose"
.LC18:
	.string	"GPU (Shared) tile size = %d, block size = %d: Run Time: %f ms\n"
.LC19:
	.string	"GPU (Shared) tile size = %d, block size = %d: Speed Up: %fx\n"
.LC20:
	.string	"GPU (Shared) tile size = %d, block size = %d: Throughputs: %f GFLOPS/s\n\n"
.LC21:
	.string	"GPU (Shared) tile size = %d, block size = %d: Throughput Ratio: %f GFLOPS/s\n\n"
.LC22:
	.string	"Transpose failed (Shared)"
.LC23:
	.string	"share_gpuTranspose"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$512, %edx
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1048576, %edi
	call	malloc@PLT
	movl	$1048576, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %rbx
	call	_Z9fillArrayPf
	leaq	16(%rsp), %rdi
	movl	$1048576, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	testq	%rbp, %rbp
	je	.L35
	testq	%rbx, %rbx
	je	.L35
	cmpq	$0, 16(%rsp)
	je	.L35
	cmpq	$0, 24(%rsp)
	jne	.L36
.L35:
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L34
.L36:
	leaq	32(%rsp), %r13
	leaq	40(%rsp), %r12
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	movq	%r12, %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z13seq_TransposePfS_
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rax, %rbx
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdx
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	movsd	.LC6(%rip), %xmm2
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	cvtss2sd	4(%rsp), %xmm1
	movsd	.LC7(%rip), %xmm0
	mulsd	%xmm1, %xmm2
	divsd	%xmm2, %xmm0
	cvtsd2ss	%xmm0, %xmm3
	movd	%xmm3, %r14d
	call	_Z14checkTransposePfS_
	testb	%al, %al
	je	.L38
	movaps	%xmm1, %xmm0
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movss	4(%rsp), %xmm0
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	divss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movd	%r14d, %xmm6
	movl	$2, %edi
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	cvtss2sd	%xmm6, %xmm0
	call	__printf_chk@PLT
	jmp	.L39
.L38:
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L39:
	movq	16(%rsp), %rdi
	movl	$1048576, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movl	$262144, %ecx
	movq	%rbx, %rdi
	rep stosl
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	movq	%r12, %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$4194305, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$10, %rdi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z39__device_stub__Z17glob_gpuTransposePfS_PfS_
.L40:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	8(%rsp), %rdi
	movl	$0x00000000, 8(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z14checkTransposePfS_
	testb	%al, %al
	je	.L41
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	8(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	4(%rsp), %xmm0
	divss	8(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	cvtss2sd	8(%rsp), %xmm0
	movl	$2, %edi
	movb	$1, %al
	mulsd	.LC6(%rip), %xmm0
	movsd	.LC7(%rip), %xmm1
	leaq	.LC14(%rip), %rsi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	__printf_chk@PLT
	cvtss2sd	8(%rsp), %xmm1
	movb	$1, %al
	movsd	.LC7(%rip), %xmm0
	mulsd	.LC6(%rip), %xmm1
	movd	%r14d, %xmm5
	movl	$2, %edi
	leaq	.LC15(%rip), %rsi
	divsd	%xmm1, %xmm0
	cvtss2sd	%xmm5, %xmm1
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	jmp	.L42
.L41:
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L42:
	leaq	.LC17(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movl	$262144, %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movabsq	$34359738376, %rax
	movl	$1048576, %edx
	movl	$1, 56(%rsp)
	movq	%rax, 48(%rsp)
	addq	$56, %rax
	movq	%rax, 60(%rsp)
	xorl	%eax, %eax
	rep stosl
	movq	24(%rsp), %rdi
	movl	$1, 68(%rsp)
	call	cudaMemset@PLT
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	movq	%r12, %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z40__device_stub__Z18share_gpuTransposePfS_PfS_
.L43:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z14checkTransposePfS_
	testb	%al, %al
	je	.L44
	movl	$8, %ecx
	movl	$64, %edx
	leaq	.LC18(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$8, %ecx
	movl	$64, %edx
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	4(%rsp), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$8, %ecx
	cvtss2sd	12(%rsp), %xmm0
	mulsd	.LC6(%rip), %xmm0
	movl	$64, %edx
	movb	$1, %al
	movsd	.LC7(%rip), %xmm1
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	__printf_chk@PLT
	cvtss2sd	12(%rsp), %xmm1
	movd	%r14d, %xmm4
	movsd	.LC7(%rip), %xmm0
	mulsd	.LC6(%rip), %xmm1
	movl	$8, %ecx
	movb	$1, %al
	movl	$64, %edx
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	divsd	%xmm1, %xmm0
	cvtss2sd	%xmm4, %xmm1
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	jmp	.L45
.L44:
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L45:
	leaq	.LC23(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L34:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	main, .-main
	.section	.rodata.str1.1
.LC24:
	.string	"_Z18share_gpuTransposePfS_"
.LC25:
	.string	"_Z17glob_gpuTransposePfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18share_gpuTransposePfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17glob_gpuTransposePfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	-755914244
	.long	1062232653
	.align 8
.LC7:
	.long	-400107883
	.long	1060187659
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
#define block_size 8
#define N (1<<9)
#define tile_size 64

float* fillArray(float* arr)
{
    //Seed rand()
    srand(42);
    for (int i = 0; i < N*N; i++)
    {
        arr[i] = rand() % 100;
    }
    return arr;
}

void printArray(float* arr)
{
    for (int i = 0; i < N*N; i++)
        printf("%f ", arr[i]);
    printf("\n");
}

float* seq_Transpose(float* arr, float* out)
{
    int row, col, t;
    for (int i = 0; i < N*N; i++)
    {
        row = i/N;
        col = i % N;
        t = col*N + row;
        out[t] = arr[i];
    }
    return out;
}

bool checkTranspose(float* arr, float* arrT)
{
    int row, col, indx, indxT;
    for (int i = 0; i < N*N; i++)
    {
        row = i/N;
        col = i % N;
        indx = row*N + col;
        indxT = col*N + row;
        if (arr[indx] != arrT[indxT])
        {
            return 0;
        }
    }
    return 1;
}
void checkCUDAError(const char *msg) 
{
    hipError_t err = hipGetLastError();
    if( hipSuccess != err) {
        fprintf(stderr, "Cuda error: %s: %s.\n", msg, hipGetErrorString( err) );
        exit(EXIT_FAILURE);
    }
}
__global__ void glob_gpuTranspose(float* arr, float* out)
{
    int row, col, t;
    unsigned int i = threadIdx.x + blockIdx.x*blockDim.x;
    if (i < (N*N))
    {
        row = i/N;
        col = i % N;
        t = col*N + row;
        out[t] = arr[i];
    }
}


__global__ void share_gpuTranspose(float* arr, float* out)
{
    __shared__ float tile[tile_size][tile_size];
 
    unsigned int row = threadIdx.x + blockIdx.x*tile_size;
    unsigned int col = threadIdx.y + blockIdx.y*tile_size;

    for (int i = 0; i < tile_size; i += block_size)
    {
        if ((row < N*N) && (col < N*N))
        tile[threadIdx.y+i][threadIdx.x] = arr[(col+i)*N + row];
    }
    __syncthreads();
    
    row = blockIdx.y*tile_size + threadIdx.x;
    col = blockIdx.x*tile_size + threadIdx.y;
 

    for (int i = 0; i < tile_size; i += block_size)
    {
        if ((row < N*N) && (col < N*N))
        out[(col +i)*N + row] = tile[threadIdx.x][threadIdx.y + i];
    }

 
}

int main (void)
{
    printf("-------------------N = %d----------------\n", N);
    //Declare host arrays
    float* h_in;
    float* h_out;
    //Declare device arrays
    float* d_in;
    float* d_out;
 
    //Set amount of memory required for arrays
    const int num_bytes = N*N*sizeof(float);
 
    //Allocate memory for host array
    h_in = (float*)malloc(num_bytes);
    h_out = (float*)malloc(num_bytes);

    //Fill host array
    h_in = fillArray(h_in);

    //Allocate memory to device
    hipMalloc((void**) &d_in, num_bytes);
    hipMalloc((void**) &d_out, num_bytes);

    if(h_in == 0 || h_out == 0 || d_in == 0 || d_out == 0)
    {
        printf("Couldn't allocate memory\n");
        return 1;
    }
 
    //Initialise Timing(Sequential)
    hipEvent_t launch_begin, launch_end;
    hipEventCreate(&launch_begin);
    hipEventCreate(&launch_end);

    hipEventRecord(launch_begin,0);
    //Sequential Transpose
    h_out = seq_Transpose(h_in, h_out);

    hipEventRecord(launch_end,0);
    hipEventSynchronize(launch_end);

    float seq_time = 0;
	hipEventElapsedTime(&seq_time, launch_begin, launch_end);
    //End Timing (Sequential)
    float cputp = 1e-9*N*N/(seq_time*1e-3);//divive by 10^9 for giga and times by 10^3 to get seconds
    if (checkTranspose(h_in,h_out))
    {
        printf("CPU: Run Time: %f ms\n", seq_time);
        printf("CPU: Speed Up: %fx\n", seq_time/seq_time);
        printf("CPU: Throughputs: %f GFLOP/s\n\n",cputp );
    }
    else
    printf("Transpose failed (Sequential)");
/////////////////////GPU Section/////////////////////////////
 
    //Copy host arrays to device arrays
    hipMemcpy(d_in, h_in, num_bytes, hipMemcpyHostToDevice);
    
    //Declare size of blocks and grid
    size_t num_threads = 256;
    size_t num_blocks = (N*N) / num_threads;
 
    //Zero output memory
    memset(h_out,  0, num_bytes);
    
    if (N % num_threads)
        ++num_blocks;

    //Initialise Timing(Global)
    hipEventCreate(&launch_begin);
    hipEventCreate(&launch_end);
 
    hipEventRecord(launch_begin,0);

    //Global kernel
    glob_gpuTranspose<<<num_blocks, num_threads>>>(d_in, d_out);

    hipEventRecord(launch_end,0);
    hipEventSynchronize(launch_end);

    float glob_time = 0;
	hipEventElapsedTime(&glob_time, launch_begin, launch_end);
    //End Timing
 
    hipMemcpy(h_out, d_out, num_bytes, hipMemcpyDeviceToHost);
    
    if (checkTranspose(h_in,h_out))
    {
        printf("GPU(Global): Run Time: %f ms\n", glob_time);
        printf("GPU(Global): Speed Up: %fx\n", seq_time/glob_time);
        printf("GPU(Global): Throughputs: %f GFLOP/s\n", 1e-9*N*N/(glob_time*1e-3));
        printf("GPU(Global): Ratio of Throughputs: %f\n\n", 1e-9*N*N/(glob_time*1e-3)/cputp);
    }
    else
    printf("Transpose failed (Global)");

    checkCUDAError("glob_gpuTranspose");

    dim3 dimGrid(N/tile_size,N/tile_size,1);
    dim3 dimBlock(tile_size, block_size,1);
 
    memset(h_out,  0, num_bytes);
    hipMemset(d_out, 0, num_bytes);

    //Initialise Timing(Shared)
    hipEventCreate(&launch_begin);
    hipEventCreate(&launch_end);
 
    hipEventRecord(launch_begin,0);

    //Shared kernel    
    share_gpuTranspose<<<dimGrid, dimBlock>>>(d_in, d_out);

    hipEventRecord(launch_end,0);
    hipEventSynchronize(launch_end);

    float share_time = 0;
	hipEventElapsedTime(&share_time, launch_begin, launch_end);
    //End Timing
 
    hipMemcpy(h_out, d_out, num_bytes, hipMemcpyDeviceToHost);
    
    if (checkTranspose(h_in,h_out))
    {
        printf("GPU (Shared) tile size = %d, block size = %d: Run Time: %f ms\n", tile_size, block_size, share_time);
        printf("GPU (Shared) tile size = %d, block size = %d: Speed Up: %fx\n", tile_size, block_size, seq_time/share_time);
        printf("GPU (Shared) tile size = %d, block size = %d: Throughputs: %f GFLOPS/s\n\n", tile_size, block_size, 1e-9*N*N/(share_time*1e-3));
        printf("GPU (Shared) tile size = %d, block size = %d: Throughput Ratio: %f GFLOPS/s\n\n", tile_size, block_size, 1e-9*N*N/(share_time*1e-3)/cputp);
    }
    else
    printf("Transpose failed (Shared)");

    checkCUDAError("share_gpuTranspose");

    hipEventDestroy(launch_begin);
    hipEventDestroy(launch_end);
    //printArray(h_out);
    //Free host array
    free(h_in);
    free(h_out);
 
    //Free device array
    hipFree(d_in);
    hipFree(d_out);
    return 0;
}
	.text
	.file	"Transpose.hip"
	.globl	_Z9fillArrayPf                  # -- Begin function _Z9fillArrayPf
	.type	_Z9fillArrayPf,@function
_Z9fillArrayPf:                         # @_Z9fillArrayPf
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movl	$42, %edi
	callq	srand
	xorl	%r14d, %r14d
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$262144, %r14                   # imm = 0x40000
	jne	.LBB0_1
# %bb.2:
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z9fillArrayPf, .Lfunc_end0-_Z9fillArrayPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z10printArrayPf                # -- Begin function _Z10printArrayPf
	.type	_Z10printArrayPf,@function
_Z10printArrayPf:                       # @_Z10printArrayPf
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r14,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	$262144, %r14                   # imm = 0x40000
	jne	.LBB1_1
# %bb.2:
	movl	$10, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end1:
	.size	_Z10printArrayPf, .Lfunc_end1-_Z10printArrayPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z13seq_TransposePfS_           # -- Begin function _Z13seq_TransposePfS_
	.type	_Z13seq_TransposePfS_,@function
_Z13seq_TransposePfS_:                  # @_Z13seq_TransposePfS_
	.cfi_startproc
# %bb.0:
	movq	%rsi, %rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	%edx, %esi
	shrl	$9, %esi
	movl	%ecx, %r8d
	andl	$261632, %r8d                   # imm = 0x3FE00
	orl	%esi, %r8d
	movss	(%rdi,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rax,%r8,4)
	incq	%rdx
	addl	$512, %ecx                      # imm = 0x200
	cmpq	$262144, %rdx                   # imm = 0x40000
	jne	.LBB2_1
# %bb.2:
	retq
.Lfunc_end2:
	.size	_Z13seq_TransposePfS_, .Lfunc_end2-_Z13seq_TransposePfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkTransposePfS_          # -- Begin function _Z14checkTransposePfS_
	.type	_Z14checkTransposePfS_,@function
_Z14checkTransposePfS_:                 # @_Z14checkTransposePfS_
	.cfi_startproc
# %bb.0:
	movss	(%rdi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%rsi), %xmm0
	jne	.LBB3_1
	jnp	.LBB3_3
.LBB3_1:
	xorl	%eax, %eax
                                        # kill: def $al killed $al killed $eax
	retq
.LBB3_3:                                # %.lr.ph.preheader
	movl	$1, %edx
	movl	$512, %eax                      # imm = 0x200
.LBB3_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, %rcx
	cmpq	$262144, %rdx                   # imm = 0x40000
	je	.LBB3_6
# %bb.5:                                #   in Loop: Header=BB3_4 Depth=1
	movl	%ecx, %edx
	shrl	$9, %edx
	movl	%eax, %r8d
	andl	$261632, %r8d                   # imm = 0x3FE00
	orl	%edx, %r8d
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	leaq	1(%rcx), %rdx
	addl	$512, %eax                      # imm = 0x200
	ucomiss	(%rsi,%r8,4), %xmm0
	jne	.LBB3_6
	jnp	.LBB3_4
.LBB3_6:                                # %.critedge.loopexit
	decq	%rcx
	cmpq	$262143, %rcx                   # imm = 0x3FFFF
	setae	%al
                                        # kill: def $al killed $al killed $eax
	retq
.Lfunc_end3:
	.size	_Z14checkTransposePfS_, .Lfunc_end3-_Z14checkTransposePfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCUDAErrorPKc           # -- Begin function _Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc,@function
_Z14checkCUDAErrorPKc:                  # @_Z14checkCUDAErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB4_2:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end4:
	.size	_Z14checkCUDAErrorPKc, .Lfunc_end4-_Z14checkCUDAErrorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__glob_gpuTransposePfS_ # -- Begin function _Z32__device_stub__glob_gpuTransposePfS_
	.type	_Z32__device_stub__glob_gpuTransposePfS_,@function
_Z32__device_stub__glob_gpuTransposePfS_: # @_Z32__device_stub__glob_gpuTransposePfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17glob_gpuTransposePfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z32__device_stub__glob_gpuTransposePfS_, .Lfunc_end5-_Z32__device_stub__glob_gpuTransposePfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__share_gpuTransposePfS_ # -- Begin function _Z33__device_stub__share_gpuTransposePfS_
	.type	_Z33__device_stub__share_gpuTransposePfS_,@function
_Z33__device_stub__share_gpuTransposePfS_: # @_Z33__device_stub__share_gpuTransposePfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18share_gpuTransposePfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z33__device_stub__share_gpuTransposePfS_, .Lfunc_end6-_Z33__device_stub__share_gpuTransposePfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI7_0:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
.LCPI7_1:
	.quad	0x3f312e0be826d695              # double 2.6214400000000002E-4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.L.str.3, %edi
	movl	$512, %esi                      # imm = 0x200
	xorl	%eax, %eax
	callq	printf
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %rbx
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_Z9fillArrayPf
	leaq	40(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	hipMalloc
	testq	%rbx, %rbx
	je	.LBB7_4
# %bb.1:
	testq	%r14, %r14
	je	.LBB7_4
# %bb.2:
	cmpq	$0, 40(%rsp)
	je	.LBB7_4
# %bb.3:
	cmpq	$0, 16(%rsp)
	je	.LBB7_4
# %bb.5:
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	xorl	%eax, %eax
.LBB7_6:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, %ecx
	shrl	$9, %ecx
	movl	%r15d, %edx
	andl	$261632, %edx                   # imm = 0x3FE00
	orl	%ecx, %edx
	movss	(%rbx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r14,%rdx,4)
	incq	%rax
	addl	$512, %r15d                     # imm = 0x200
	cmpq	$262144, %rax                   # imm = 0x40000
	jne	.LBB7_6
# %bb.7:                                # %_Z13seq_TransposePfS_.exit
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	28(%rsp), %r15
	movl	$0, (%r15)
	movq	32(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movsd	.LCPI7_0(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	.LCPI7_1(%rip), %xmm2           # xmm2 = mem[0],zero
	divsd	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm2, %xmm1
	movss	%xmm1, 24(%rsp)                 # 4-byte Spill
	movss	(%rbx), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	ucomiss	(%r14), %xmm1
	jne	.LBB7_13
	jnp	.LBB7_8
.LBB7_13:                               # %.critedge
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB7_14
.LBB7_4:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %eax
	jmp	.LBB7_33
.LBB7_8:                                # %.lr.ph.preheader
	movl	$1, %eax
	movl	$512, %ecx                      # imm = 0x200
.LBB7_9:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$262144, %rax                   # imm = 0x40000
	je	.LBB7_12
# %bb.10:                               #   in Loop: Header=BB7_9 Depth=1
	movl	%eax, %edx
	shrl	$9, %edx
	movl	%ecx, %esi
	andl	$261632, %esi                   # imm = 0x3FE00
	orl	%edx, %esi
	movss	(%rbx,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	incq	%rax
	addl	$512, %ecx                      # imm = 0x200
	ucomiss	(%r14,%rsi,4), %xmm1
	jne	.LBB7_11
	jnp	.LBB7_9
.LBB7_11:                               # %_Z14checkTransposePfS_.exit
	addq	$-2, %rax
	cmpq	$262143, %rax                   # imm = 0x3FFFF
	jb	.LBB7_13
.LBB7_12:                               # %_Z14checkTransposePfS_.exit.thread
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	24(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
.LBB7_14:
	movq	40(%rsp), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	768(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_16
# %bb.15:
	movq	40(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z32__device_stub__glob_gpuTransposePfS_
.LBB7_16:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	12(%rsp), %rdi
	movl	$0, (%rdi)
	movq	32(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r14), %xmm0
	jne	.LBB7_22
	jnp	.LBB7_17
.LBB7_22:                               # %.critedge79
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB7_23
.LBB7_17:                               # %.lr.ph70.preheader
	movl	$1, %eax
	movl	$512, %ecx                      # imm = 0x200
.LBB7_18:                               # %.lr.ph70
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$262144, %rax                   # imm = 0x40000
	je	.LBB7_21
# %bb.19:                               #   in Loop: Header=BB7_18 Depth=1
	movl	%eax, %edx
	shrl	$9, %edx
	movl	%ecx, %esi
	andl	$261632, %esi                   # imm = 0x3FE00
	orl	%edx, %esi
	movss	(%rbx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	incq	%rax
	addl	$512, %ecx                      # imm = 0x200
	ucomiss	(%r14,%rsi,4), %xmm0
	jne	.LBB7_20
	jnp	.LBB7_18
.LBB7_20:                               # %_Z14checkTransposePfS_.exit53
	addq	$-2, %rax
	cmpq	$262143, %rax                   # imm = 0x3FFFF
	jb	.LBB7_22
.LBB7_21:                               # %_Z14checkTransposePfS_.exit53.thread
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	cvtss2sd	12(%rsp), %xmm1
	mulsd	.LCPI7_0(%rip), %xmm1
	movsd	.LCPI7_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm1, %xmm1
	cvtss2sd	12(%rsp), %xmm1
	mulsd	.LCPI7_0(%rip), %xmm1
	movsd	.LCPI7_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	24(%rsp), %xmm1                 # 4-byte Folded Reload
	divsd	%xmm1, %xmm0
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
.LBB7_23:
	movl	$.L.str.14, %edi
	callq	_Z14checkCUDAErrorPKc
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	16(%rsp), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	xorl	%esi, %esi
	callq	hipMemset
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$34359738376, %rdi              # imm = 0x800000008
	leaq	56(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_25
# %bb.24:
	movq	40(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z33__device_stub__share_gpuTransposePfS_
.LBB7_25:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	8(%rsp), %rdi
	movl	$0, (%rdi)
	movq	32(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r14), %xmm0
	jne	.LBB7_31
	jnp	.LBB7_26
.LBB7_31:                               # %.critedge80
	movl	$.L.str.19, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB7_32
.LBB7_26:                               # %.lr.ph75.preheader
	movl	$1, %eax
	movl	$512, %ecx                      # imm = 0x200
.LBB7_27:                               # %.lr.ph75
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$262144, %rax                   # imm = 0x40000
	je	.LBB7_30
# %bb.28:                               #   in Loop: Header=BB7_27 Depth=1
	movl	%eax, %edx
	shrl	$9, %edx
	movl	%ecx, %esi
	andl	$261632, %esi                   # imm = 0x3FE00
	orl	%edx, %esi
	movss	(%rbx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	incq	%rax
	addl	$512, %ecx                      # imm = 0x200
	ucomiss	(%r14,%rsi,4), %xmm0
	jne	.LBB7_29
	jnp	.LBB7_27
.LBB7_29:                               # %_Z14checkTransposePfS_.exit59
	addq	$-2, %rax
	cmpq	$262143, %rax                   # imm = 0x3FFFF
	jb	.LBB7_31
.LBB7_30:                               # %_Z14checkTransposePfS_.exit59.thread
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0
	movl	$.L.str.15, %edi
	movl	$64, %esi
	movl	$8, %edx
	movb	$1, %al
	callq	printf
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	8(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.16, %edi
	movl	$64, %esi
	movl	$8, %edx
	movb	$1, %al
	callq	printf
	cvtss2sd	8(%rsp), %xmm1
	mulsd	.LCPI7_0(%rip), %xmm1
	movsd	.LCPI7_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$.L.str.17, %edi
	movl	$64, %esi
	movl	$8, %edx
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0
	mulsd	.LCPI7_0(%rip), %xmm0
	movsd	.LCPI7_1(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	24(%rsp), %xmm0                 # 4-byte Folded Reload
	divsd	%xmm0, %xmm1
	movapd	%xmm1, %xmm0
	movl	$.L.str.18, %edi
	movl	$64, %esi
	movl	$8, %edx
	movb	$1, %al
	callq	printf
.LBB7_32:
	movl	$.L.str.20, %edi
	callq	_Z14checkCUDAErrorPKc
	movq	32(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
.LBB7_33:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17glob_gpuTransposePfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18share_gpuTransposePfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f "
	.size	.L.str, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Cuda error: %s: %s.\n"
	.size	.L.str.2, 21

	.type	_Z17glob_gpuTransposePfS_,@object # @_Z17glob_gpuTransposePfS_
	.section	.rodata,"a",@progbits
	.globl	_Z17glob_gpuTransposePfS_
	.p2align	3, 0x0
_Z17glob_gpuTransposePfS_:
	.quad	_Z32__device_stub__glob_gpuTransposePfS_
	.size	_Z17glob_gpuTransposePfS_, 8

	.type	_Z18share_gpuTransposePfS_,@object # @_Z18share_gpuTransposePfS_
	.globl	_Z18share_gpuTransposePfS_
	.p2align	3, 0x0
_Z18share_gpuTransposePfS_:
	.quad	_Z33__device_stub__share_gpuTransposePfS_
	.size	_Z18share_gpuTransposePfS_, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"-------------------N = %d----------------\n"
	.size	.L.str.3, 43

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CPU: Run Time: %f ms\n"
	.size	.L.str.5, 22

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CPU: Speed Up: %fx\n"
	.size	.L.str.6, 20

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"CPU: Throughputs: %f GFLOP/s\n\n"
	.size	.L.str.7, 31

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Transpose failed (Sequential)"
	.size	.L.str.8, 30

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"GPU(Global): Run Time: %f ms\n"
	.size	.L.str.9, 30

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"GPU(Global): Speed Up: %fx\n"
	.size	.L.str.10, 28

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"GPU(Global): Throughputs: %f GFLOP/s\n"
	.size	.L.str.11, 38

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"GPU(Global): Ratio of Throughputs: %f\n\n"
	.size	.L.str.12, 40

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Transpose failed (Global)"
	.size	.L.str.13, 26

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"glob_gpuTranspose"
	.size	.L.str.14, 18

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"GPU (Shared) tile size = %d, block size = %d: Run Time: %f ms\n"
	.size	.L.str.15, 63

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"GPU (Shared) tile size = %d, block size = %d: Speed Up: %fx\n"
	.size	.L.str.16, 61

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"GPU (Shared) tile size = %d, block size = %d: Throughputs: %f GFLOPS/s\n\n"
	.size	.L.str.17, 73

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"GPU (Shared) tile size = %d, block size = %d: Throughput Ratio: %f GFLOPS/s\n\n"
	.size	.L.str.18, 78

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Transpose failed (Shared)"
	.size	.L.str.19, 26

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"share_gpuTranspose"
	.size	.L.str.20, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17glob_gpuTransposePfS_"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18share_gpuTransposePfS_"
	.size	.L__unnamed_2, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Couldn't allocate memory"
	.size	.Lstr, 25

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__glob_gpuTransposePfS_
	.addrsig_sym _Z33__device_stub__share_gpuTransposePfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17glob_gpuTransposePfS_
	.addrsig_sym _Z18share_gpuTransposePfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17glob_gpuTransposePfS_ ; -- Begin function _Z17glob_gpuTransposePfS_
	.globl	_Z17glob_gpuTransposePfS_
	.p2align	8
	.type	_Z17glob_gpuTransposePfS_,@function
_Z17glob_gpuTransposePfS_:              ; @_Z17glob_gpuTransposePfS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e32 0x40000, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v0, v[2:3], off
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 9, v1
	v_and_or_b32 v1, 0x3fe00, v2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 2, v1
	s_waitcnt vmcnt(0)
	global_store_b32 v1, v0, s[2:3]
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17glob_gpuTransposePfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17glob_gpuTransposePfS_, .Lfunc_end0-_Z17glob_gpuTransposePfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18share_gpuTransposePfS_ ; -- Begin function _Z18share_gpuTransposePfS_
	.globl	_Z18share_gpuTransposePfS_
	.p2align	8
	.type	_Z18share_gpuTransposePfS_,@function
_Z18share_gpuTransposePfS_:             ; @_Z18share_gpuTransposePfS_
; %bb.0:
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_lshl_b32 s2, s14, 6
	s_lshl_b32 s1, s15, 6
	v_add_nc_u32_e32 v0, s2, v2
	v_add_nc_u32_e32 v1, s1, v3
	v_lshlrev_b32_e32 v4, 9, v3
	s_mov_b32 s3, -8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v1, v0, v1
	v_cmp_gt_u32_e32 vcc_lo, 0x40000, v1
	v_mov_b32_e32 v1, 0
	v_lshlrev_b32_e32 v5, 2, v2
	v_lshl_or_b32 v6, s15, 15, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v5, v3, 8, v5
	v_add3_u32 v0, v6, v4, s2
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.2:                                ;   in Loop: Header=BB1_1 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, s0, s4, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v6
.LBB1_3:                                ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	v_add_nc_u32_e32 v5, 0x800, v5
	v_add_nc_u32_e32 v0, 0x1000, v0
	s_add_i32 s3, s3, 8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s3, 55
	s_cbranch_scc0 .LBB1_1
; %bb.4:
	v_add_nc_u32_e32 v0, s1, v2
	v_add_nc_u32_e32 v1, s2, v3
	v_lshl_or_b32 v5, s14, 15, v2
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_or_b32_e32 v1, v0, v1
	v_add3_u32 v0, v5, v4, s1
	v_lshl_add_u32 v2, v2, 8, v3
	s_mov_b32 s1, -8
	buffer_gl0_inv
	v_cmp_gt_u32_e32 vcc_lo, 0x40000, v1
	v_mov_b32_e32 v1, 0
.LBB1_5:                                ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_5 Depth=1
	ds_load_b32 v5, v2
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s6, v3
	v_add_co_ci_u32_e64 v4, s0, s7, v4, s0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB1_7:                                ;   in Loop: Header=BB1_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v0, 0x1000, v0
	v_add_nc_u32_e32 v2, 32, v2
	s_add_i32 s1, s1, 8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s1, 55
	s_cbranch_scc0 .LBB1_5
; %bb.8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18share_gpuTransposePfS_
		.amdhsa_group_segment_fixed_size 16384
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18share_gpuTransposePfS_, .Lfunc_end1-_Z18share_gpuTransposePfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 372
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 16384 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17glob_gpuTransposePfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17glob_gpuTransposePfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 16384
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18share_gpuTransposePfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18share_gpuTransposePfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
