#include <cuComplex.h>
#include <cuda.h>
#include <cuda_runtime.h>


__global__ void
corr_abs_kernel(cuFloatComplex* in, cuFloatComplex* out, float* mag, int n)
{
    int d = 16;

    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i < n) {
        cuFloatComplex m = cuCmulf((in[i + d]),cuConjf(in[i]));

        float cplx_mag = in[i].x*in[i].x + in[i].y*in[i].y;
        mag[i] = cplx_mag;
        out[i] = m;
    }
}


__global__ void
mov_avg_cplx_kernel(cuFloatComplex* in, float *mag, cuFloatComplex* out, float* cor, int n)
{
    // int d = 16;
    int w = 48;
    int w2 = 64;

    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i < n) {

        cuFloatComplex sum = make_cuFloatComplex(0,0);
        for (int j=0; j<w; j++)
        {   
            sum.x += in[i+j].x;
            sum.y += in[i+j].y;
        }
        
        float fsum = 0;
        for (int j=0; j<w2; j++)
        {
            fsum += mag[i+j];
        }

        // __syncthreads();
        // if (i < n-63-16) {
        out[i] = sum;
        // }
        if (fsum == 0)
          cor[i] = 0;
        else
            cor[i] = sqrt(sum.x*sum.x + sum.y*sum.y) / fsum;

    }
}

void exec_corr_abs(cuFloatComplex* in,
                cuFloatComplex* out,
                float* mag,
                int n,
                int grid_size,
                int block_size,
                cudaStream_t stream)
{
    corr_abs_kernel<<<grid_size, block_size, 0, stream>>>(in, out, mag, n+63);
}

void exec_mov_avg(cuFloatComplex* in,
    float *mag,
    cuFloatComplex* out,
    float* cor,
    int n,
    int grid_size,
    int block_size,
    cudaStream_t stream)
{
    mov_avg_cplx_kernel<<<grid_size, block_size, 0, stream>>>(in, mag, out, cor, n);
}

void get_block_and_grid(int* minGrid, int* minBlock)
{
    cudaOccupancyMaxPotentialBlockSize(minGrid, minBlock, mov_avg_cplx_kernel, 0, 0);
}
	.file	"tmpxft_002727c7_00000000-6_presync.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z18get_block_and_gridPiS_
	.type	_Z18get_block_and_gridPiS_, @function
_Z18get_block_and_gridPiS_:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	testq	%rdi, %rdi
	je	.L2
	movq	%rsi, %r12
	testq	%rsi, %rsi
	je	.L2
	movq	%rdi, %r13
	leaq	16(%rsp), %rdi
	call	cudaGetDevice@PLT
	testl	%eax, %eax
	jne	.L2
	movl	16(%rsp), %edx
	leaq	20(%rsp), %rdi
	movl	$39, %esi
	call	cudaDeviceGetAttribute@PLT
	testl	%eax, %eax
	jne	.L2
	movl	16(%rsp), %edx
	leaq	24(%rsp), %rdi
	movl	$10, %esi
	call	cudaDeviceGetAttribute@PLT
	testl	%eax, %eax
	jne	.L2
	movl	16(%rsp), %edx
	leaq	28(%rsp), %rdi
	movl	$1, %esi
	call	cudaDeviceGetAttribute@PLT
	testl	%eax, %eax
	jne	.L2
	movl	16(%rsp), %edx
	leaq	32(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	testl	%eax, %eax
	jne	.L2
	leaq	40(%rsp), %rdi
	leaq	_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i(%rip), %rsi
	call	cudaFuncGetAttributes@PLT
	testl	%eax, %eax
	jne	.L2
	movl	20(%rsp), %eax
	movl	64(%rsp), %ebp
	movl	24(%rsp), %r9d
	movl	%eax, (%rsp)
	movl	28(%rsp), %eax
	cmpl	%eax, %ebp
	cmovg	%eax, %ebp
	xorl	%r10d, %r10d
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
	leal	-1(%r9,%rbp), %ebx
	movl	%ebx, %eax
	cltd
	idivl	%r9d
	subl	%edx, %ebx
.L7:
	testl	%ebx, %ebx
	jle	.L9
	cmpl	%ebx, %ebp
	movl	%ebx, %edx
	leaq	36(%rsp), %rdi
	movl	%r10d, 12(%rsp)
	cmovle	%ebp, %edx
	leaq	_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i(%rip), %rsi
	xorl	%r8d, %r8d
	xorl	%ecx, %ecx
	movl	%r9d, 8(%rsp)
	movl	%edx, 4(%rsp)
	call	cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags@PLT
	testl	%eax, %eax
	jne	.L2
	movl	4(%rsp), %edx
	movl	36(%rsp), %eax
	movl	12(%rsp), %r10d
	movl	8(%rsp), %r9d
	movl	%edx, %ecx
	imull	%eax, %ecx
	cmpl	%r10d, %ecx
	jle	.L8
	movl	%ecx, %r10d
	movl	%eax, %r14d
	movl	%edx, %r15d
.L8:
	cmpl	%r10d, (%rsp)
	je	.L9
	subl	%r9d, %ebx
	jmp	.L7
.L9:
	imull	32(%rsp), %r14d
	movl	%r14d, 0(%r13)
	movl	%r15d, (%r12)
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z18get_block_and_gridPiS_, .-_Z18get_block_and_gridPiS_
	.globl	_Z47__device_stub__Z15corr_abs_kernelP6float2S0_PfiP6float2S0_Pfi
	.type	_Z47__device_stub__Z15corr_abs_kernelP6float2S0_PfiP6float2S0_Pfi, @function
_Z47__device_stub__Z15corr_abs_kernelP6float2S0_PfiP6float2S0_Pfi:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15corr_abs_kernelP6float2S0_Pfi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L15:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z47__device_stub__Z15corr_abs_kernelP6float2S0_PfiP6float2S0_Pfi, .-_Z47__device_stub__Z15corr_abs_kernelP6float2S0_PfiP6float2S0_Pfi
	.globl	_Z15corr_abs_kernelP6float2S0_Pfi
	.type	_Z15corr_abs_kernelP6float2S0_Pfi, @function
_Z15corr_abs_kernelP6float2S0_Pfi:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z15corr_abs_kernelP6float2S0_PfiP6float2S0_Pfi
	.cfi_endproc
.LFE2059:
	.size	_Z15corr_abs_kernelP6float2S0_Pfi, .-_Z15corr_abs_kernelP6float2S0_Pfi
	.globl	_Z13exec_corr_absP6float2S0_PfiiiP11CUstream_st
	.type	_Z13exec_corr_absP6float2S0_PfiiiP11CUstream_st, @function
_Z13exec_corr_absP6float2S0_PfiiiP11CUstream_st:
.LFB2031:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%ecx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	%r9d, 20(%rsp)
	movq	80(%rsp), %r9
	movq	%rax, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	%r8d, 8(%rsp)
	movq	20(%rsp), %rdx
	xorl	%r8d, %r8d
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	leal	63(%rbx), %ecx
	movq	%r13, %rdx
	movq	%r12, %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z47__device_stub__Z15corr_abs_kernelP6float2S0_PfiP6float2S0_Pfi
.L20:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z13exec_corr_absP6float2S0_PfiiiP11CUstream_st, .-_Z13exec_corr_absP6float2S0_PfiiiP11CUstream_st
	.globl	_Z54__device_stub__Z19mov_avg_cplx_kernelP6float2PfS0_S1_iP6float2PfS0_S1_i
	.type	_Z54__device_stub__Z19mov_avg_cplx_kernelP6float2PfS0_S1_iP6float2PfS0_S1_i, @function
_Z54__device_stub__Z19mov_avg_cplx_kernelP6float2PfS0_S1_iP6float2PfS0_S1_i:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L23:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z54__device_stub__Z19mov_avg_cplx_kernelP6float2PfS0_S1_iP6float2PfS0_S1_i, .-_Z54__device_stub__Z19mov_avg_cplx_kernelP6float2PfS0_S1_iP6float2PfS0_S1_i
	.globl	_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i
	.type	_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i, @function
_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z19mov_avg_cplx_kernelP6float2PfS0_S1_iP6float2PfS0_S1_i
	.cfi_endproc
.LFE2061:
	.size	_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i, .-_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i
	.globl	_Z12exec_mov_avgP6float2PfS0_S1_iiiP11CUstream_st
	.type	_Z12exec_mov_avgP6float2PfS0_S1_iiiP11CUstream_st, @function
_Z12exec_mov_avgP6float2PfS0_S1_iiiP11CUstream_st:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%r8d, %r14d
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	80(%rsp), %eax
	movl	%r9d, 8(%rsp)
	movq	88(%rsp), %r9
	movl	%eax, 20(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 24(%rsp)
	movl	28(%rsp), %ecx
	movq	%rax, 12(%rsp)
	movq	20(%rsp), %rdx
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	addq	$32, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	movl	%r14d, %r8d
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z54__device_stub__Z19mov_avg_cplx_kernelP6float2PfS0_S1_iP6float2PfS0_S1_i
.L28:
	.cfi_restore_state
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z12exec_mov_avgP6float2PfS0_S1_iiiP11CUstream_st, .-_Z12exec_mov_avgP6float2PfS0_S1_iiiP11CUstream_st
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i"
.LC1:
	.string	"_Z15corr_abs_kernelP6float2S0_Pfi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2063:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z19mov_avg_cplx_kernelP6float2PfS0_S1_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15corr_abs_kernelP6float2S0_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2063:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_complex.h>
#include <hip/hip_runtime.h>



__global__ void
corr_abs_kernel(hipFloatComplex* in, hipFloatComplex* out, float* mag, int n)
{
    int d = 16;

    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i < n) {
        hipFloatComplex m = hipCmulf((in[i + d]),hipConjf(in[i]));

        float cplx_mag = in[i].x*in[i].x + in[i].y*in[i].y;
        mag[i] = cplx_mag;
        out[i] = m;
    }
}


__global__ void
mov_avg_cplx_kernel(hipFloatComplex* in, float *mag, hipFloatComplex* out, float* cor, int n)
{
    // int d = 16;
    int w = 48;
    int w2 = 64;

    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i < n) {

        hipFloatComplex sum = make_hipFloatComplex(0,0);
        for (int j=0; j<w; j++)
        {   
            sum.x += in[i+j].x;
            sum.y += in[i+j].y;
        }
        
        float fsum = 0;
        for (int j=0; j<w2; j++)
        {
            fsum += mag[i+j];
        }

        // __syncthreads();
        // if (i < n-63-16) {
        out[i] = sum;
        // }
        if (fsum == 0)
          cor[i] = 0;
        else
            cor[i] = sqrt(sum.x*sum.x + sum.y*sum.y) / fsum;

    }
}

void exec_corr_abs(hipFloatComplex* in,
                hipFloatComplex* out,
                float* mag,
                int n,
                int grid_size,
                int block_size,
                hipStream_t stream)
{
    corr_abs_kernel<<<grid_size, block_size, 0, stream>>>(in, out, mag, n+63);
}

void exec_mov_avg(hipFloatComplex* in,
    float *mag,
    hipFloatComplex* out,
    float* cor,
    int n,
    int grid_size,
    int block_size,
    hipStream_t stream)
{
    mov_avg_cplx_kernel<<<grid_size, block_size, 0, stream>>>(in, mag, out, cor, n);
}

void get_block_and_grid(int* minGrid, int* minBlock)
{
    hipOccupancyMaxPotentialBlockSize(minGrid, minBlock, mov_avg_cplx_kernel, 0, 0);
}
	.text
	.file	"presync.hip"
	.globl	_Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi # -- Begin function _Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.type	_Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi,@function
_Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi: # @_Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi, .Lfunc_end0-_Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i # -- Begin function _Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.type	_Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i,@function
_Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i: # @_Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i, .Lfunc_end1-_Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z13exec_corr_absP15HIP_vector_typeIfLj2EES1_PfiiiP12ihipStream_t # -- Begin function _Z13exec_corr_absP15HIP_vector_typeIfLj2EES1_PfiiiP12ihipStream_t
	.type	_Z13exec_corr_absP15HIP_vector_typeIfLj2EES1_PfiiiP12ihipStream_t,@function
_Z13exec_corr_absP15HIP_vector_typeIfLj2EES1_PfiiiP12ihipStream_t: # @_Z13exec_corr_absP15HIP_vector_typeIfLj2EES1_PfiiiP12ihipStream_t
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %ebx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %r12
	movq	48(%rsp), %rax
	movl	%r8d, %edi
	btsq	$32, %rdi
	movl	%r9d, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rax, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB2_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_2:
	.cfi_def_cfa_offset 48
	addl	$63, %ebx
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi # TAILCALL
.Lfunc_end2:
	.size	_Z13exec_corr_absP15HIP_vector_typeIfLj2EES1_PfiiiP12ihipStream_t, .Lfunc_end2-_Z13exec_corr_absP15HIP_vector_typeIfLj2EES1_PfiiiP12ihipStream_t
	.cfi_endproc
                                        # -- End function
	.globl	_Z12exec_mov_avgP15HIP_vector_typeIfLj2EEPfS1_S2_iiiP12ihipStream_t # -- Begin function _Z12exec_mov_avgP15HIP_vector_typeIfLj2EEPfS1_S2_iiiP12ihipStream_t
	.type	_Z12exec_mov_avgP15HIP_vector_typeIfLj2EEPfS1_S2_iiiP12ihipStream_t,@function
_Z12exec_mov_avgP15HIP_vector_typeIfLj2EEPfS1_S2_iiiP12ihipStream_t: # @_Z12exec_mov_avgP15HIP_vector_typeIfLj2EEPfS1_S2_iiiP12ihipStream_t
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	48(%rsp), %edx
	movq	56(%rsp), %rax
	movl	%r9d, %edi
	btsq	$32, %rdi
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rax, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB3_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 48
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movl	%ebx, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i # TAILCALL
.Lfunc_end3:
	.size	_Z12exec_mov_avgP15HIP_vector_typeIfLj2EEPfS1_S2_iiiP12ihipStream_t, .Lfunc_end3-_Z12exec_mov_avgP15HIP_vector_typeIfLj2EEPfS1_S2_iiiP12ihipStream_t
	.cfi_endproc
                                        # -- End function
	.globl	_Z18get_block_and_gridPiS_      # -- Begin function _Z18get_block_and_gridPiS_
	.type	_Z18get_block_and_gridPiS_,@function
_Z18get_block_and_gridPiS_:             # @_Z18get_block_and_gridPiS_
	.cfi_startproc
# %bb.0:
	movl	$_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	jmp	hipOccupancyMaxPotentialBlockSize # TAILCALL
.Lfunc_end4:
	.size	_Z18get_block_and_gridPiS_, .Lfunc_end4-_Z18get_block_and_gridPiS_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi,@object # @_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.section	.rodata,"a",@progbits
	.globl	_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.p2align	3, 0x0
_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi:
	.quad	_Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.size	_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi, 8

	.type	_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i,@object # @_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.globl	_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.p2align	3, 0x0
_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i:
	.quad	_Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.size	_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi"
	.size	.L__unnamed_1, 51

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i"
	.size	.L__unnamed_2, 58

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.addrsig_sym _Z34__device_stub__mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.addrsig_sym _Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi ; -- Begin function _Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.globl	_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
	.p2align	8
	.type	_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi,@function
_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi: ; @_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[7:8], v[5:6], off offset:128
	global_load_b64 v[5:6], v[5:6], off
	v_add_co_u32 v9, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v4, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, v8, v6
	v_mul_f32_e32 v11, v7, v6
	v_mul_f32_e32 v6, v6, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, v7, v5
	v_fmac_f32_e32 v6, v5, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f32 v3, v8, v5, -v11
	global_store_b32 v[0:1], v6, off
	global_store_b64 v[9:10], v[2:3], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi, .Lfunc_end0-_Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i ; -- Begin function _Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.globl	_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
	.p2align	8
	.type	_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i,@function
_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i: ; @_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_8
; %bb.1:                                ; %.preheader36.preheader
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
.LBB1_2:                                ; %.preheader36
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v5, s8, v1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s8, 48
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v4, v4, v6 :: v_dual_add_f32 v3, v3, v5
	s_cbranch_scc1 .LBB1_2
; %bb.3:                                ; %.preheader.preheader
	v_mov_b32_e32 v0, 0
	s_mov_b32 s0, 0
.LBB1_4:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v5, s0, v1
	s_add_i32 s0, s0, 1
	s_cmp_eq_u32 s0, 64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v2, v[5:6], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v2
	s_cbranch_scc0 .LBB1_4
; %bb.5:
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	v_add_co_u32 v7, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
	v_mov_b32_e32 v5, 0
	global_store_b64 v[7:8], v[3:4], off
	v_cmpx_neq_f32_e32 0, v0
	s_cbranch_execz .LBB1_7
; %bb.6:
	v_mul_f32_e32 v3, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v4, v4
	v_mul_f32_e32 v4, 0x4f800000, v3
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_sqrt_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v5, -1, v4
	v_add_nc_u32_e32 v6, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v5, v4, v3
	v_fma_f32 v8, -v6, v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v7
	v_cndmask_b32_e64 v4, v4, v5, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v8
	v_cndmask_b32_e64 v4, v4, v6, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, 0x37800000, v4
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v3, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v4, v3, vcc_lo
	v_div_scale_f32 v4, null, v0, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v4, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v4, v4, v5, v7
	v_div_fixup_f32 v5, v4, v0, v3
.LBB1_7:                                ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
.LBB1_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i, .Lfunc_end1-_Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 580
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15corr_abs_kernelP15HIP_vector_typeIfLj2EES1_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19mov_avg_cplx_kernelP15HIP_vector_typeIfLj2EEPfS1_S2_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
