/* objective
 * 	c = A*b  // A[m][n] is a matrix, b[n] and c[m] are vectors
 * compile: nvcc --gpu-architecture=compute_60 --gpu-code=sm_60 -O3 matvec.cu -o matvec
 */

#include <iostream>
#include <cstdlib>


#define EC(ans) { chkerr((ans), __FILE__, __LINE__); }
inline void chkerr(cudaError_t code, const char *file, int line)
{
    if (code != cudaSuccess)
    {
        std::cerr << "ERROR!!!:" << cudaGetErrorString(code) << " File: " << file << " Line: " << line << '\n';
        exit(-1);
    }
}

void init (double *mat, double *vec, int m , int n)
{
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < n; ++j)
        {
            mat[i * n + j] = i * m + j;
        }
    }

    for (int j = 0; j < n; ++j)
    {
        vec[j] = 1;
    }
}


void matvec_h(double* mat, double*vec_in , double* vec_out, int m, int n)
{
    for (int i = 0; i < m; ++i)
    {
        vec_out[i] = 0;

        for (int j = 0; j < n; ++j)
        {
            vec_out[i] += mat[i * n + j] * vec_in[j];
        }
    }
}

__global__ void matvec_d(double* mat, double*vec_in , double* vec_out, int m, int n)
{
    int id = blockIdx.x * blockDim.x + threadIdx.x;

    
    if(id<n){
        double result = 0;
        #pragma unroll 4 
	for(int i=0;i<n;i++)
        	result+=mat[id*n+i] * vec_in[i];
        vec_out[id] = result;
    }


}

void validate (double *host, double *gpu, int m)
{

    for (int i = 0; i < m; ++i)
    {
        if(std::abs(host[i] - gpu[i]) > 1e-3)
        {
            std::cerr << "possible error at position " << i << " host: " << host[i] << " device " << gpu[i] << '\n';
        }
    }
}


int main(int argc, char *argv[])
{
    if(argc < 2)
    {
        std::cerr << "Usage: ./matvec M N\n";
        exit(-1);
    }

    int m = std::atoi(argv[1]);
    int n = std::atoi(argv[2]);

    /* Host alloc */
    double *mat = (double*) malloc (m * n * sizeof(double));
    double *vec_in = (double*) malloc (n * sizeof(double));
    double *vec_out = (double*) malloc (m * sizeof(double));
    double *vec_result = (double*) malloc (m * sizeof(double));

    /* Device alloc */
    double *d_mat, *d_vec_in, *d_vec_out;
    cudaMalloc(&d_mat, m*n*sizeof(double));
    cudaMalloc(&d_vec_in, n*sizeof(double));
    cudaMalloc(&d_vec_out, m*sizeof(double));

    /* Initialize host memory*/
    init(mat, vec_in, m, n);

    /* host compute */
    matvec_h(mat, vec_in, vec_out, m, n);


    /* Copy from host to device */
    cudaMemcpy(d_mat, mat, m*n*sizeof(double), cudaMemcpyHostToDevice);
    cudaMemcpy(d_vec_in, vec_in, n*sizeof(double), cudaMemcpyHostToDevice);

    /* call gpu kernel */
    dim3 threads(128);
    dim3 grid((int)ceil(m/128.00));    
    matvec_d<<<grid, threads>>>(d_mat, d_vec_in, d_vec_out,m,n);

    /* Copy from device to host */
    cudaMemcpy(vec_result, d_vec_out,m*sizeof(double), cudaMemcpyDeviceToHost); 


    /* host vs device validation */
    /// REPLACE one vec_out with the result array that you moved from device to host
    validate(vec_out, vec_result, m);


    /* be clean */
    free(mat);
    free(vec_in);
    free(vec_out);

    cudaFree(d_mat);
    cudaFree(d_vec_out);
    cudaFree(d_vec_in);

    return 0;
}





	.file	"tmpxft_00373aa8_00000000-6_matvec.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4initPdS_ii
	.type	_Z4initPdS_ii, @function
_Z4initPdS_ii:
.LFB3636:
	.cfi_startproc
	endbr64
	xorl	%r8d, %r8d
	xorl	%r10d, %r10d
	xorl	%r9d, %r9d
.L10:
	cmpl	%edx, %r9d
	jge	.L13
	movslq	%r8d, %rax
	leaq	(%rdi,%rax,8), %r11
	xorl	%eax, %eax
	cmpl	%eax, %ecx
	jg	.L17
	incl	%r9d
	addl	%edx, %r10d
	addl	%ecx, %r8d
	jmp	.L10
.L13:
	movsd	.LC0(%rip), %xmm0
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %ecx
	jle	.L20
	movsd	%xmm0, (%rsi,%rax,8)
	incq	%rax
	jmp	.L15
.L20:
	ret
.L17:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L4:
	leal	(%r10,%rax), %ebx
	cvtsi2sdl	%ebx, %xmm0
	movsd	%xmm0, (%r11,%rax,8)
	incq	%rax
.L6:
	cmpl	%eax, %ecx
	jg	.L4
	incl	%r9d
	addl	%edx, %r10d
	addl	%ecx, %r8d
	cmpl	%edx, %r9d
	jge	.L8
	movslq	%r8d, %rax
	leaq	(%rdi,%rax,8), %r11
	xorl	%eax, %eax
	jmp	.L6
.L8:
	movsd	.LC0(%rip), %xmm0
	xorl	%eax, %eax
.L5:
	cmpl	%eax, %ecx
	jle	.L21
	movsd	%xmm0, (%rsi,%rax,8)
	incq	%rax
	jmp	.L5
.L21:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z4initPdS_ii, .-_Z4initPdS_ii
	.globl	_Z8matvec_hPdS_S_ii
	.type	_Z8matvec_hPdS_S_ii, @function
_Z8matvec_hPdS_S_ii:
.LFB3637:
	.cfi_startproc
	endbr64
	movq	%rdi, %r9
	movq	%rsi, %r10
	xorl	%edi, %edi
	xorl	%esi, %esi
.L23:
	cmpl	%esi, %ecx
	jle	.L27
	movslq	%edi, %rax
	xorps	%xmm0, %xmm0
	leaq	(%r9,%rax,8), %r11
	xorl	%eax, %eax
.L24:
	movsd	%xmm0, (%rdx,%rsi,8)
	cmpl	%eax, %r8d
	jle	.L28
	movsd	(%r11,%rax,8), %xmm1
	mulsd	(%r10,%rax,8), %xmm1
	incq	%rax
	addsd	%xmm1, %xmm0
	jmp	.L24
.L28:
	incq	%rsi
	addl	%r8d, %edi
	jmp	.L23
.L27:
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z8matvec_hPdS_S_ii, .-_Z8matvec_hPdS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"possible error at position "
.LC5:
	.string	" host: "
.LC6:
	.string	" device "
	.text
	.globl	_Z8validatePdS_i
	.type	_Z8validatePdS_i, @function
_Z8validatePdS_i:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
.L30:
	cmpl	%ebx, %r13d
	jle	.L39
	movsd	0(%rbp,%rbx,8), %xmm0
	subsd	(%r12,%rbx,8), %xmm0
	andps	.LC2(%rip), %xmm0
	comisd	.LC3(%rip), %xmm0
	jbe	.L31
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	0(%rbp,%rbx,8), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%r12,%rbx,8), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movb	$10, 7(%rsp)
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.L33
	leaq	7(%rsp), %rsi
	movl	$1, %edx
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	jmp	.L31
.L33:
	movl	$10, %esi
	call	_ZNSo3putEc@PLT
.L31:
	incq	%rbx
	jmp	.L30
.L39:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z8validatePdS_i, .-_Z8validatePdS_i
	.globl	_Z33__device_stub__Z8matvec_dPdS_S_iiPdS_S_ii
	.type	_Z33__device_stub__Z8matvec_dPdS_S_iiPdS_S_ii, @function
_Z33__device_stub__Z8matvec_dPdS_S_iiPdS_S_ii:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8matvec_dPdS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L40:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z33__device_stub__Z8matvec_dPdS_S_iiPdS_S_ii, .-_Z33__device_stub__Z8matvec_dPdS_S_iiPdS_S_ii
	.globl	_Z8matvec_dPdS_S_ii
	.type	_Z8matvec_dPdS_S_ii, @function
_Z8matvec_dPdS_S_ii:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z8matvec_dPdS_S_iiPdS_S_ii
	.cfi_endproc
.LFE3665:
	.size	_Z8matvec_dPdS_S_ii, .-_Z8matvec_dPdS_S_ii
	.section	.rodata.str1.1
.LC7:
	.string	"Usage: ./matvec M N\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L46
	leaq	_ZSt4cerr(%rip), %rdi
	leaq	.LC7(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	orl	$-1, %edi
	call	exit@PLT
.L46:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%eax, %ebp
	movl	%ebx, %eax
	imull	%ebp, %eax
	cltq
	salq	$3, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, %r13
	movslq	%ebp, %rax
	salq	$3, %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	%rax, %r12
	movslq	%ebx, %rax
	salq	$3, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	16(%rsp), %rsi
	leaq	40(%rsp), %rdi
	movq	%rax, %r15
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r12, %rsi
	movq	%r13, %rdi
	movl	%ebp, %ecx
	movl	%ebx, %edx
	call	_Z4initPdS_ii
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	movq	%r14, %rdx
	call	_Z8matvec_hPdS_S_ii
	movq	16(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2sdl	%ebx, %xmm0
	mulsd	.LC8(%rip), %xmm0
	call	ceil@PLT
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttsd2sil	%xmm0, %eax
	salq	$7, %rdx
	movl	$1, %ecx
	movl	%eax, 76(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	76(%rsp), %rdi
	movl	84(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	movq	40(%rsp), %rdi
	call	_Z33__device_stub__Z8matvec_dPdS_S_iiPdS_S_ii
.L47:
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%r15, %rdi
	call	cudaMemcpy@PLT
	movl	%ebx, %edx
	movq	%r15, %rsi
	movq	%r14, %rdi
	call	_Z8validatePdS_i
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z8matvec_dPdS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8matvec_dPdS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1072693248
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC2:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC3:
	.long	-755914244
	.long	1062232653
	.align 8
.LC8:
	.long	0
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* objective
 * 	c = A*b  // A[m][n] is a matrix, b[n] and c[m] are vectors
 * compile: nvcc --gpu-architecture=compute_60 --gpu-code=sm_60 -O3 matvec.cu -o matvec
 */


#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>


#define EC(ans) { chkerr((ans), __FILE__, __LINE__); }
inline void chkerr(hipError_t code, const char *file, int line)
{
    if (code != hipSuccess)
    {
        std::cerr << "ERROR!!!:" << hipGetErrorString(code) << " File: " << file << " Line: " << line << '\n';
        exit(-1);
    }
}

void init (double *mat, double *vec, int m , int n)
{
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < n; ++j)
        {
            mat[i * n + j] = i * m + j;
        }
    }

    for (int j = 0; j < n; ++j)
    {
        vec[j] = 1;
    }
}


void matvec_h(double* mat, double*vec_in , double* vec_out, int m, int n)
{
    for (int i = 0; i < m; ++i)
    {
        vec_out[i] = 0;

        for (int j = 0; j < n; ++j)
        {
            vec_out[i] += mat[i * n + j] * vec_in[j];
        }
    }
}

__global__ void matvec_d(double* mat, double*vec_in , double* vec_out, int m, int n)
{
    int id = blockIdx.x * blockDim.x + threadIdx.x;

    
    if(id<n){
        double result = 0;
        #pragma unroll 4 
	for(int i=0;i<n;i++)
        	result+=mat[id*n+i] * vec_in[i];
        vec_out[id] = result;
    }


}

void validate (double *host, double *gpu, int m)
{

    for (int i = 0; i < m; ++i)
    {
        if(std::abs(host[i] - gpu[i]) > 1e-3)
        {
            std::cerr << "possible error at position " << i << " host: " << host[i] << " device " << gpu[i] << '\n';
        }
    }
}


int main(int argc, char *argv[])
{
    if(argc < 2)
    {
        std::cerr << "Usage: ./matvec M N\n";
        exit(-1);
    }

    int m = std::atoi(argv[1]);
    int n = std::atoi(argv[2]);

    /* Host alloc */
    double *mat = (double*) malloc (m * n * sizeof(double));
    double *vec_in = (double*) malloc (n * sizeof(double));
    double *vec_out = (double*) malloc (m * sizeof(double));
    double *vec_result = (double*) malloc (m * sizeof(double));

    /* Device alloc */
    double *d_mat, *d_vec_in, *d_vec_out;
    hipMalloc(&d_mat, m*n*sizeof(double));
    hipMalloc(&d_vec_in, n*sizeof(double));
    hipMalloc(&d_vec_out, m*sizeof(double));

    /* Initialize host memory*/
    init(mat, vec_in, m, n);

    /* host compute */
    matvec_h(mat, vec_in, vec_out, m, n);


    /* Copy from host to device */
    hipMemcpy(d_mat, mat, m*n*sizeof(double), hipMemcpyHostToDevice);
    hipMemcpy(d_vec_in, vec_in, n*sizeof(double), hipMemcpyHostToDevice);

    /* call gpu kernel */
    dim3 threads(128);
    dim3 grid((int)ceil(m/128.00));    
    matvec_d<<<grid, threads>>>(d_mat, d_vec_in, d_vec_out,m,n);

    /* Copy from device to host */
    hipMemcpy(vec_result, d_vec_out,m*sizeof(double), hipMemcpyDeviceToHost); 


    /* host vs device validation */
    /// REPLACE one vec_out with the result array that you moved from device to host
    validate(vec_out, vec_result, m);


    /* be clean */
    free(mat);
    free(vec_in);
    free(vec_out);

    hipFree(d_mat);
    hipFree(d_vec_out);
    hipFree(d_vec_in);

    return 0;
}





	.text
	.file	"matvec.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z4initPdS_ii                   # -- Begin function _Z4initPdS_ii
	.type	_Z4initPdS_ii,@function
_Z4initPdS_ii:                          # @_Z4initPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %eax
	testl	%edx, %edx
	jle	.LBB0_6
# %bb.1:                                # %.preheader21.lr.ph
	movl	%edx, %edx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB0_2:                                # %.preheader21
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB0_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	%r9d, %r11d
	leaq	(%rdi,%r11,8), %r11
	xorl	%ebx, %ebx
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r8,%rbx), %ebp
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	movsd	%xmm0, (%r11,%rbx,8)
	incq	%rbx
	cmpq	%rbx, %rax
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r10
	addl	%ecx, %r9d
	addq	%rdx, %r8
	cmpq	%rdx, %r10
	jne	.LBB0_2
.LBB0_6:                                # %.preheader
	testl	%ecx, %ecx
	jle	.LBB0_9
# %bb.7:                                # %.lr.ph25.preheader
	xorl	%ecx, %ecx
	movabsq	$4607182418800017408, %rdx      # imm = 0x3FF0000000000000
.LBB0_8:                                # %.lr.ph25
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, (%rsi,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_8
.LBB0_9:                                # %._crit_edge26
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z4initPdS_ii, .Lfunc_end0-_Z4initPdS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8matvec_hPdS_S_ii             # -- Begin function _Z8matvec_hPdS_S_ii
	.type	_Z8matvec_hPdS_S_ii,@function
_Z8matvec_hPdS_S_ii:                    # @_Z8matvec_hPdS_S_ii
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB1_7
# %bb.1:                                # %.lr.ph20
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%ecx, %eax
	movl	%r8d, %ecx
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB1_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	movq	$0, (%rdx,%r10,8)
	testl	%r8d, %r8d
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r9d, %r11d
	leaq	(%rdi,%r11,8), %r11
	xorpd	%xmm0, %xmm0
	xorl	%ebx, %ebx
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r11,%rbx,8), %xmm1            # xmm1 = mem[0],zero
	mulsd	(%rsi,%rbx,8), %xmm1
	addsd	%xmm1, %xmm0
	movsd	%xmm0, (%rdx,%r10,8)
	incq	%rbx
	cmpq	%rbx, %rcx
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r10
	addl	%r8d, %r9d
	cmpq	%rax, %r10
	jne	.LBB1_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB1_7:                                # %._crit_edge21
	retq
.Lfunc_end1:
	.size	_Z8matvec_hPdS_S_ii, .Lfunc_end1-_Z8matvec_hPdS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__matvec_dPdS_S_ii # -- Begin function _Z23__device_stub__matvec_dPdS_S_ii
	.type	_Z23__device_stub__matvec_dPdS_S_ii,@function
_Z23__device_stub__matvec_dPdS_S_ii:    # @_Z23__device_stub__matvec_dPdS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8matvec_dPdS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__matvec_dPdS_S_ii, .Lfunc_end2-_Z23__device_stub__matvec_dPdS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z8validatePdS_i
.LCPI3_0:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_1:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
	.text
	.globl	_Z8validatePdS_i
	.type	_Z8validatePdS_i,@function
_Z8validatePdS_i:                       # @_Z8validatePdS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB3_9
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	%edx, %ebp
	xorl	%r15d, %r15d
	movapd	.LCPI3_0(%rip), %xmm1           # xmm1 = [NaN,NaN]
	movsd	.LCPI3_1(%rip), %xmm2           # xmm2 = mem[0],zero
	leaq	7(%rsp), %r12
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r14,%r15,8), %xmm0            # xmm0 = mem[0],zero
	subsd	(%rbx,%r15,8), %xmm0
	andpd	%xmm1, %xmm0
	ucomisd	%xmm2, %xmm0
	jbe	.LBB3_7
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=1
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%r15d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r13
	movl	$.L.str.1, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r14,%r15,8), %xmm0            # xmm0 = mem[0],zero
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.2, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%rbx,%r15,8), %xmm0            # xmm0 = mem[0],zero
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movb	$10, 7(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB3_5
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	movq	%r12, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_6
.LBB3_5:                                #   in Loop: Header=BB3_2 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB3_6:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
                                        #   in Loop: Header=BB3_2 Depth=1
	movapd	.LCPI3_0(%rip), %xmm1           # xmm1 = [NaN,NaN]
	movsd	.LCPI3_1(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB3_7:                                #   in Loop: Header=BB3_2 Depth=1
	incq	%r15
	cmpq	%r15, %rbp
	jne	.LBB3_2
# %bb.8:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB3_9:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z8validatePdS_i, .Lfunc_end3-_Z8validatePdS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x3f80000000000000              # double 0.0078125
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jle	.LBB4_11
# %bb.1:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r14d
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	imull	%r14d, %eax
	movl	%r14d, %ebx
	movl	%r14d, 12(%rsp)                 # 4-byte Spill
	movslq	%eax, %r13
	shlq	$3, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movslq	%ebp, %r14
	shlq	$3, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r15
	movslq	%ebx, %rbx
	shlq	$3, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	leaq	32(%rsp), %rdi
	movq	%r13, 48(%rsp)                  # 8-byte Spill
	movq	%r13, %rsi
	movq	%r14, %r13
	movq	40(%rsp), %r14                  # 8-byte Reload
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, 64(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	12(%rsp), %ebx                  # 4-byte Reload
	movl	%ebx, %edx
	movl	%ebp, %ecx
	callq	_Z4initPdS_ii
	testl	%ebx, %ebx
	jle	.LBB4_8
# %bb.2:                                # %.lr.ph20.i
	movl	12(%rsp), %eax                  # 4-byte Reload
	movl	%ebp, %ecx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB4_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_5 Depth 2
	movq	$0, (%r12,%rsi,8)
	testl	%ebp, %ebp
	jle	.LBB4_7
# %bb.4:                                # %.lr.ph.i
                                        #   in Loop: Header=BB4_3 Depth=1
	movl	%edx, %edi
	leaq	(%r14,%rdi,8), %rdi
	xorpd	%xmm0, %xmm0
	xorl	%r8d, %r8d
.LBB4_5:                                #   Parent Loop BB4_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rdi,%r8,8), %xmm1             # xmm1 = mem[0],zero
	mulsd	(%r15,%r8,8), %xmm1
	addsd	%xmm1, %xmm0
	incq	%r8
	cmpq	%r8, %rcx
	jne	.LBB4_5
# %bb.6:                                # %._crit_edge.i.loopexit
                                        #   in Loop: Header=BB4_3 Depth=1
	movsd	%xmm0, (%r12,%rsi,8)
.LBB4_7:                                # %._crit_edge.i
                                        #   in Loop: Header=BB4_3 Depth=1
	incq	%rsi
	addl	%ebp, %edx
	cmpq	%rax, %rsi
	jne	.LBB4_3
.LBB4_8:                                # %_Z8matvec_hPdS_S_ii.exit
	movq	32(%rsp), %rdi
	movq	%r14, %rsi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	12(%rsp), %ebx                  # 4-byte Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebx, %xmm0
	mulsd	.LCPI4_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$128, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_10
# %bb.9:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%ebx, %ecx
	movl	%ebp, %r8d
	callq	_Z23__device_stub__matvec_dPdS_S_ii
.LBB4_10:
	movq	16(%rsp), %rsi
	movq	56(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	movq	%r13, %rsi
	movl	%ebx, %edx
	callq	_Z8validatePdS_i
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_11:
	.cfi_def_cfa_offset 128
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$-1, %edi
	callq	exit
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8matvec_dPdS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8matvec_dPdS_S_ii,@object     # @_Z8matvec_dPdS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z8matvec_dPdS_S_ii
	.p2align	3, 0x0
_Z8matvec_dPdS_S_ii:
	.quad	_Z23__device_stub__matvec_dPdS_S_ii
	.size	_Z8matvec_dPdS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"possible error at position "
	.size	.L.str, 28

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" host: "
	.size	.L.str.1, 8

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" device "
	.size	.L.str.2, 9

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Usage: ./matvec M N\n"
	.size	.L.str.3, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8matvec_dPdS_S_ii"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__matvec_dPdS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8matvec_dPdS_S_ii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8matvec_dPdS_S_ii     ; -- Begin function _Z8matvec_dPdS_S_ii
	.globl	_Z8matvec_dPdS_S_ii
	.p2align	8
	.type	_Z8matvec_dPdS_S_ii,@function
_Z8matvec_dPdS_S_ii:                    ; @_Z8matvec_dPdS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_11
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB0_5
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s3
	s_cmp_lt_u32 s3, 4
	s_cbranch_scc1 .LBB0_6
; %bb.3:                                ; %.lr.ph.new
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_and_b32 s10, s3, 0x7ffffffc
	s_mov_b32 s2, 0
	s_mov_b64 s[8:9], 0
	v_lshlrev_b64 v[5:6], 3, v[2:3]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v6, vcc_lo
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v5, vcc_lo
	s_add_u32 s12, s6, s8
	s_addc_u32 s13, s7, s9
	s_add_i32 s2, s2, 4
	s_clause 0x1
	global_load_b128 v[6:9], v[10:11], off
	global_load_b128 v[10:13], v[10:11], off offset:16
	s_load_b256 s[12:19], s[12:13], 0x0
	s_add_u32 s8, s8, 32
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s10, s2
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fma_f64 v[3:4], v[6:7], s[12:13], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[3:4], v[8:9], s[14:15], v[3:4]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[3:4], v[10:11], s[16:17], v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[3:4], v[12:13], s[18:19], v[3:4]
	s_cbranch_scc0 .LBB0_4
	s_branch .LBB0_7
.LBB0_5:
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_branch .LBB0_10
.LBB0_6:
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_mov_b32 s2, 0
.LBB0_7:                                ; %._crit_edge.loopexit.unr-lcssa
	s_and_b32 s8, s3, 3
	s_mov_b32 s3, 0
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc1 .LBB0_10
; %bb.8:                                ; %.epil.preheader.preheader
	v_add_nc_u32_e32 v5, s2, v2
	s_lshl_b64 s[2:3], s[2:3], 3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
.LBB0_9:                                ; %.epil.preheader
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[7:8], v[5:6], off
	s_load_b64 s[4:5], s[2:3], 0x0
	v_add_co_u32 v5, vcc_lo, v5, 8
	s_add_u32 s2, s2, 8
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_addc_u32 s3, s3, 0
	s_add_i32 s8, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f64 v[3:4], v[7:8], s[4:5], v[3:4]
	s_cbranch_scc1 .LBB0_9
.LBB0_10:                               ; %._crit_edge
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8matvec_dPdS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8matvec_dPdS_S_ii, .Lfunc_end0-_Z8matvec_dPdS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 500
; NumSgprs: 22
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8matvec_dPdS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z8matvec_dPdS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
