/*
Assignment: ECE 451 Programming Assignment 2
Code: GpuSumPrimes.cu
Group: David Swanson, Daniel Caballero, Michael Wilder

Description: This code adds all the prime numbers up to a certain number input by the user.
This code takes one parameter (SIZE) from the user and uses the CUDA library to run the 
calculations needed in parallel on 1024 threads.
*/
#include <stdio.h>
#define BLOCK_SIZE 1024


/* SumPrimes the function on the device that calculates if a number is prime. It takes a 
pointer to the allocated array on the GPU and the size of the array. */

__global__ void SumPrimes (int *device_array, int SIZE) {
  
  // Index is calculated based on which block and thread is being worked.
  int index = threadIdx.x + blockIdx.x * blockDim.x;
  int i;
  int Prime = 1;

  // If the index is valid, then we need to check if it is prime.
  if (index < SIZE) {
    if ((index) == 0 || (index) == 1) {
      device_array[index] = 0;
	}

    // If the number is not prime, the value in the array is set to 0
	else {
      for (i=2; i*i <= index; i++) {
        if (index % i == 0) {
		  Prime = 0;
		  device_array[index] = 0;
		  break;
		}
	  }

      // if the number is prime, the value in the array is set to the number.
	  if (Prime)
		device_array[index] = index;
	}
  }
}

/* The main function of the code allocates memory on the host and device, transfers data
between the two, and calls the SumPrimes function. */

int main(int argc, char* argv []){
 
  int SIZE = atoi(argv[1]) + 1; 	
  int i;
  long int sum;
  int *host_array;
  int *device_array;
	
  sum = 0;
	
  // Allocate memory for host array and device array then copy host array to device array.
  host_array = (int *)malloc(SIZE*sizeof(int));
  cudaMalloc(&device_array, SIZE*sizeof(int));
  cudaMemcpy(device_array, host_array, SIZE*sizeof(int), cudaMemcpyHostToDevice);

  // Define how many blocks and threads that need to be used when calling SumPrimes.
  // A 1D array is used. The size of blocksPerGrid is set in a way to prevent overflow.
  dim3 blocksPerGrid((SIZE + BLOCK_SIZE - 1)/BLOCK_SIZE,1,1);
  dim3 threadsPerBlock(BLOCK_SIZE,1,1);
	
  SumPrimes <<<blocksPerGrid, threadsPerBlock>>>(device_array, SIZE);

  // Copy final array from device to host then clear memory in the device.
  cudaMemcpy(host_array, device_array, SIZE*sizeof(int), cudaMemcpyDeviceToHost);
  cudaFree(device_array);

  // Testing print statement.
  printf("I am adding: ");
  
  // Add all the elements in the array. Only prime numbers will be non-zero.
  for (i = 0; i < SIZE; i++) {
    if (host_array[i] != 0)
	  printf("%d ", host_array[i]);
    sum += host_array[i];
  }

  printf("\nSum = %ld \n", sum);
	
  return 0;

}

	.file	"tmpxft_0036c6df_00000000-6_GpuSumPrimes.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z9SumPrimesPiiPii
	.type	_Z29__device_stub__Z9SumPrimesPiiPii, @function
_Z29__device_stub__Z9SumPrimesPiiPii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9SumPrimesPii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z9SumPrimesPiiPii, .-_Z29__device_stub__Z9SumPrimesPiiPii
	.globl	_Z9SumPrimesPii
	.type	_Z9SumPrimesPii, @function
_Z9SumPrimesPii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z9SumPrimesPiiPii
	.cfi_endproc
.LFE2053:
	.size	_Z9SumPrimesPii, .-_Z9SumPrimesPii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"I am adding: "
.LC1:
	.string	"%d "
.LC2:
	.string	"\nSum = %ld \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	leal	1(%rax), %r13d
	movl	%eax, %ebx
	movslq	%r13d, %r12
	salq	$2, %r12
	movq	%r12, %rdi
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$1024, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	leal	1024(%rbx), %eax
	cltd
	idivl	%ecx
	movl	$4194305, %edx
	movl	$1, %ecx
	salq	$10, %rdx
	movl	%eax, 16(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	8(%rsp), %rdi
	movl	%r13d, %esi
	call	_Z29__device_stub__Z9SumPrimesPiiPii
.L9:
	movq	8(%rsp), %rsi
	movq	%r12, %rdx
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	leaq	.LC1(%rip), %r14
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L10:
	cmpl	%ebx, %r13d
	jle	.L18
	movl	0(%rbp,%rbx,4), %edx
	testl	%edx, %edx
	je	.L11
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L11:
	movslq	0(%rbp,%rbx,4), %rax
	incq	%rbx
	addq	%rax, %r12
	jmp	.L10
.L18:
	xorl	%eax, %eax
	movq	%r12, %rdx
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	call	__printf_chk@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z9SumPrimesPii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9SumPrimesPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
Assignment: ECE 451 Programming Assignment 2
Code: GpuSumPrimes.cu
Group: David Swanson, Daniel Caballero, Michael Wilder

Description: This code adds all the prime numbers up to a certain number input by the user.
This code takes one parameter (SIZE) from the user and uses the CUDA library to run the 
calculations needed in parallel on 1024 threads.
*/

#include <hip/hip_runtime.h>
#include <stdio.h>
#define BLOCK_SIZE 1024


/* SumPrimes the function on the device that calculates if a number is prime. It takes a 
pointer to the allocated array on the GPU and the size of the array. */

__global__ void SumPrimes (int *device_array, int SIZE) {
  
  // Index is calculated based on which block and thread is being worked.
  int index = threadIdx.x + blockIdx.x * blockDim.x;
  int i;
  int Prime = 1;

  // If the index is valid, then we need to check if it is prime.
  if (index < SIZE) {
    if ((index) == 0 || (index) == 1) {
      device_array[index] = 0;
	}

    // If the number is not prime, the value in the array is set to 0
	else {
      for (i=2; i*i <= index; i++) {
        if (index % i == 0) {
		  Prime = 0;
		  device_array[index] = 0;
		  break;
		}
	  }

      // if the number is prime, the value in the array is set to the number.
	  if (Prime)
		device_array[index] = index;
	}
  }
}

/* The main function of the code allocates memory on the host and device, transfers data
between the two, and calls the SumPrimes function. */

int main(int argc, char* argv []){
 
  int SIZE = atoi(argv[1]) + 1; 	
  int i;
  long int sum;
  int *host_array;
  int *device_array;
	
  sum = 0;
	
  // Allocate memory for host array and device array then copy host array to device array.
  host_array = (int *)malloc(SIZE*sizeof(int));
  hipMalloc(&device_array, SIZE*sizeof(int));
  hipMemcpy(device_array, host_array, SIZE*sizeof(int), hipMemcpyHostToDevice);

  // Define how many blocks and threads that need to be used when calling SumPrimes.
  // A 1D array is used. The size of blocksPerGrid is set in a way to prevent overflow.
  dim3 blocksPerGrid((SIZE + BLOCK_SIZE - 1)/BLOCK_SIZE,1,1);
  dim3 threadsPerBlock(BLOCK_SIZE,1,1);
	
  SumPrimes <<<blocksPerGrid, threadsPerBlock>>>(device_array, SIZE);

  // Copy final array from device to host then clear memory in the device.
  hipMemcpy(host_array, device_array, SIZE*sizeof(int), hipMemcpyDeviceToHost);
  hipFree(device_array);

  // Testing print statement.
  printf("I am adding: ");
  
  // Add all the elements in the array. Only prime numbers will be non-zero.
  for (i = 0; i < SIZE; i++) {
    if (host_array[i] != 0)
	  printf("%d ", host_array[i]);
    sum += host_array[i];
  }

  printf("\nSum = %ld \n", sum);
	
  return 0;

}

	.text
	.file	"GpuSumPrimes.hip"
	.globl	_Z24__device_stub__SumPrimesPii # -- Begin function _Z24__device_stub__SumPrimesPii
	.type	_Z24__device_stub__SumPrimesPii,@function
_Z24__device_stub__SumPrimesPii:        # @_Z24__device_stub__SumPrimesPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9SumPrimesPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__SumPrimesPii, .Lfunc_end0-_Z24__device_stub__SumPrimesPii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r14d
	leal	1(%r14), %ebp
	movslq	%ebp, %r15
	shlq	$2, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	1024(%r14), %eax
	leal	2047(%r14), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$10, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	8(%rsp), %rdi
	movl	%ebp, %esi
	callq	_Z24__device_stub__SumPrimesPii
.LBB1_2:
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%r15d, %r15d
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	testl	%r14d, %r14d
	js	.LBB1_7
# %bb.3:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r12d, %r12d
	xorl	%r15d, %r15d
.LBB1_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r12,4), %esi
	movl	$0, %eax
	testl	%esi, %esi
	je	.LBB1_6
# %bb.5:                                #   in Loop: Header=BB1_4 Depth=1
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	(%rbx,%r12,4), %eax
.LBB1_6:                                #   in Loop: Header=BB1_4 Depth=1
	cltq
	addq	%rax, %r15
	incq	%r12
	cmpq	%r12, %r14
	jne	.LBB1_4
.LBB1_7:                                # %._crit_edge
	movl	$.L.str.2, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	printf
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9SumPrimesPii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9SumPrimesPii,@object         # @_Z9SumPrimesPii
	.section	.rodata,"a",@progbits
	.globl	_Z9SumPrimesPii
	.p2align	3, 0x0
_Z9SumPrimesPii:
	.quad	_Z24__device_stub__SumPrimesPii
	.size	_Z9SumPrimesPii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"I am adding: "
	.size	.L.str, 14

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d "
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\nSum = %ld \n"
	.size	.L.str.2, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9SumPrimesPii"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__SumPrimesPii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9SumPrimesPii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9SumPrimesPii         ; -- Begin function _Z9SumPrimesPii
	.globl	_Z9SumPrimesPii
	.p2align	8
	.type	_Z9SumPrimesPii,@function
_Z9SumPrimesPii:                        ; @_Z9SumPrimesPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_14
; %bb.1:
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_lt_u32_e32 1, v1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_11
; %bb.2:                                ; %.preheader
	s_mov_b32 s4, -1
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 3, v1
	s_cbranch_execz .LBB0_8
; %bb.3:                                ; %.lr.ph.preheader
	v_mov_b32_e32 v2, 0
	s_mov_b32 s4, 2
	s_mov_b32 s6, -2
	s_mov_b32 s5, 0
                                        ; implicit-def: $sgpr7
                                        ; implicit-def: $sgpr9
                                        ; implicit-def: $sgpr8
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_cvt_f32_u32_e32 v0, s4
	s_or_b32 s8, s8, exec_lo
	s_or_b32 s9, s9, exec_lo
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s6, v0
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v3
	v_mul_hi_u32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s4
	v_sub_nc_u32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, s6, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v0
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	s_add_i32 s4, s4, 1
	s_and_not1_b32 s9, s9, exec_lo
	s_mul_i32 s11, s4, s4
	s_add_i32 s6, s6, -1
	v_cmp_gt_i32_e32 vcc_lo, s11, v1
	s_and_not1_b32 s8, s8, exec_lo
	s_and_b32 s11, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s9, s9, s11
; %bb.6:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_xor_b32 s10, s8, -1
	s_and_b32 s11, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s11, s5
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s10, s10, exec_lo
	s_or_b32 s7, s7, s10
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_4
; %bb.7:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_or_not1_b32 s4, s7, exec_lo
.LBB0_8:                                ; %Flow29
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v0, s5
	s_and_saveexec_b32 s3, s4
; %bb.9:                                ; %.critedge
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v0, v1
; %bb.10:                               ; %Flow30
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_11:                               ; %Flow31
	s_and_not1_saveexec_b32 s2, s2
; %bb.12:
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v2, v0
; %bb.13:                               ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9SumPrimesPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9SumPrimesPii, .Lfunc_end0-_Z9SumPrimesPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 432
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9SumPrimesPii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9SumPrimesPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
