#include <cuda_runtime.h>
#include <stdio.h>
#include <sys/time.h>

double seconds(){
    struct timeval tp;
    struct timezone tzp;
    int i = gettimeofday(&tp,&tzp);
    return ((double)tp.tv_sec+(double)tp.tv_usec*1.e-6);
    }

__global__ void warmingup(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;

    if (tid % 2 == 0){
        a = 100.0f;}
    else{
        b = 200.0f;}
    
    c[tid] = a + b;
    }
    
__global__ void mathKernel(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;

    if (tid % 2 == 0){
        a = 100.0f;}
    else{
        b = 200.0f;}
    
    c[tid] = a + b;
    }

__global__ void mathKernel2(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;

    if ((tid/warpSize) % 2 == 0){
        a = 100.0f;}
    else{
        b = 200.0f;}
    c[tid] = a + b;
    }

__global__ void mathKernel3(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;
    bool ipred = (tid % 2 == 0);

    if (ipred){
        a = 100.0f;}
    if (!ipred){
        b = 200.0f;}
    c[tid] = a + b;
    }
    
__global__ void mathKernel4(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;
    int itid = tid >> 5;
    
    if (itid & 0x01 == 0){
        a = 100.0f;}
    else{
        b = 200.0f;}
    c[tid] = a + b;
    }

int main(int argc,char **argv){
    // set up device
    int dev = 0;
    cudaDeviceProp deviceProp;
    cudaGetDeviceProperties(&deviceProp,dev);
    printf("Using Device: %d : %s\n",dev,deviceProp.name);

    // set up data size
    int size =  1<<24;
    int blocksize = 64;
    if (argc > 1) blocksize = atoi(argv[1]);
    if (argc > 2) size = atoi(argv[2]);
    printf("Data size %d \n",size);

    // set up execution configuration
    dim3 block(blocksize,1);
    dim3 grid((size+block.x-1)/block.x,1);
    printf("Execution Configure (block %d grid %d) \n",block.x,grid.x);

    // alocate gpu memory
    float *d_C;
    size_t nBytes = size * sizeof(float);
    cudaMalloc((float **)&d_C,nBytes);

    // warmup kernel
    size_t iStart,iElaps;
    cudaDeviceSynchronize();
    iStart = seconds();
    warmingup <<<grid,block>>>(d_C);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("Warming up <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // kernel 1
    iStart = seconds();
    mathKernel<<<grid,block>>>(d_C);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("mathKernel <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // kernel 2
    iStart = seconds();
    mathKernel2<<<grid,block>>>(d_C);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("mathKernel2 <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // kernel 3
    iStart = seconds();
    mathKernel3<<<grid,block>>>(d_C);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("mathKernel3 <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // kernel 4
    iStart = seconds();
    mathKernel4<<<grid,block>>>(d_C);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("mathKernel4 <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // gpu free & reset
    cudaFree(d_C);
    cudaDeviceReset();
    return EXIT_SUCCESS;
    }


	.file	"tmpxft_0032f279_00000000-6_simpleDivergence.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7secondsv
	.type	_Z7secondsv, @function
_Z7secondsv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z7secondsv, .-_Z7secondsv
	.globl	_Z28__device_stub__Z9warmingupPfPf
	.type	_Z28__device_stub__Z9warmingupPfPf, @function
_Z28__device_stub__Z9warmingupPfPf:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z9warmingupPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L6:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z28__device_stub__Z9warmingupPfPf, .-_Z28__device_stub__Z9warmingupPfPf
	.globl	_Z9warmingupPf
	.type	_Z9warmingupPf, @function
_Z9warmingupPf:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z9warmingupPfPf
	.cfi_endproc
.LFE2054:
	.size	_Z9warmingupPf, .-_Z9warmingupPf
	.globl	_Z30__device_stub__Z10mathKernelPfPf
	.type	_Z30__device_stub__Z10mathKernelPfPf, @function
_Z30__device_stub__Z10mathKernelPfPf:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z10mathKernelPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L11:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z30__device_stub__Z10mathKernelPfPf, .-_Z30__device_stub__Z10mathKernelPfPf
	.globl	_Z10mathKernelPf
	.type	_Z10mathKernelPf, @function
_Z10mathKernelPf:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z10mathKernelPfPf
	.cfi_endproc
.LFE2056:
	.size	_Z10mathKernelPf, .-_Z10mathKernelPf
	.globl	_Z31__device_stub__Z11mathKernel2PfPf
	.type	_Z31__device_stub__Z11mathKernel2PfPf, @function
_Z31__device_stub__Z11mathKernel2PfPf:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z11mathKernel2Pf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L16:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z31__device_stub__Z11mathKernel2PfPf, .-_Z31__device_stub__Z11mathKernel2PfPf
	.globl	_Z11mathKernel2Pf
	.type	_Z11mathKernel2Pf, @function
_Z11mathKernel2Pf:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z11mathKernel2PfPf
	.cfi_endproc
.LFE2058:
	.size	_Z11mathKernel2Pf, .-_Z11mathKernel2Pf
	.globl	_Z31__device_stub__Z11mathKernel3PfPf
	.type	_Z31__device_stub__Z11mathKernel3PfPf, @function
_Z31__device_stub__Z11mathKernel3PfPf:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z11mathKernel3Pf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L21:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z31__device_stub__Z11mathKernel3PfPf, .-_Z31__device_stub__Z11mathKernel3PfPf
	.globl	_Z11mathKernel3Pf
	.type	_Z11mathKernel3Pf, @function
_Z11mathKernel3Pf:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z11mathKernel3PfPf
	.cfi_endproc
.LFE2060:
	.size	_Z11mathKernel3Pf, .-_Z11mathKernel3Pf
	.globl	_Z31__device_stub__Z11mathKernel4PfPf
	.type	_Z31__device_stub__Z11mathKernel4PfPf, @function
_Z31__device_stub__Z11mathKernel4PfPf:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z11mathKernel4Pf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L26:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z31__device_stub__Z11mathKernel4PfPf, .-_Z31__device_stub__Z11mathKernel4PfPf
	.globl	_Z11mathKernel4Pf
	.type	_Z11mathKernel4Pf, @function
_Z11mathKernel4Pf:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z11mathKernel4PfPf
	.cfi_endproc
.LFE2062:
	.size	_Z11mathKernel4Pf, .-_Z11mathKernel4Pf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Using Device: %d : %s\n"
.LC2:
	.string	"Data size %d \n"
.LC3:
	.string	"Execution Configure (block %d grid %d) \n"
.LC5:
	.string	"Warming up <<<%4d,%4d>>> elapsed %f sec\n"
.LC6:
	.string	"mathKernel <<<%4d,%4d>>> elapsed %f sec\n"
.LC7:
	.string	"mathKernel2 <<<%4d,%4d>>> elapsed %f sec\n"
.LC8:
	.string	"mathKernel3 <<<%4d,%4d>>> elapsed %f sec\n"
.LC9:
	.string	"mathKernel4 <<<%4d,%4d>>> elapsed %f sec\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	xorl	%esi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1080, %rsp
	.cfi_def_cfa_offset 1120
	movq	%fs:40, %rax
	movq	%rax, 1064(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	xorl	%edx, %edx
	xorl	%eax, %eax
	movq	%rbx, %rcx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$1, %r13d
	jle	.L69
	movq	8(%r12), %rdi
	movl	$16777216, %ebp
	call	atoi@PLT
	movl	%eax, %ebx
	cmpl	$2, %r13d
	je	.L32
	movq	16(%r12), %rdi
	call	atoi@PLT
	movl	%eax, %ebp
	jmp	.L32
.L69:
	movl	$64, %ebx
	movl	$16777216, %ebp
.L32:
	movl	%ebp, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edx, %edx
	movabsq	$4294967297, %rax
	leaq	.LC3(%rip), %rsi
	movq	%rax, 12(%rsp)
	leal	-1(%rbx,%rbp), %eax
	movl	$2, %edi
	divl	%ebx
	movl	$1, 24(%rsp)
	movl	$1, 28(%rsp)
	movl	%ebx, %edx
	movl	%eax, %ecx
	movl	%eax, %r12d
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movslq	%ebp, %rsi
	movq	%rsp, %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	comisd	.LC4(%rip), %xmm0
	jnb	.L33
	cvttsd2siq	%xmm0, %rbp
	jmp	.L34
.L33:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %rbp
	btcq	$63, %rbp
.L34:
	movl	%r12d, 20(%rsp)
	movl	16(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	20(%rsp), %rdi
	movl	28(%rsp), %esi
	movl	%ebx, 8(%rsp)
	movq	8(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	(%rsp), %rdi
	call	_Z28__device_stub__Z9warmingupPfPf
.L35:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	testq	%rbp, %rbp
	js	.L36
	cvtsi2sdq	%rbp, %xmm1
	jmp	.L37
.L36:
	movq	%rbp, %rax
	andl	$1, %ebp
	shrq	%rax
	orq	%rbp, %rax
	cvtsi2sdq	%rax, %xmm1
	addsd	%xmm1, %xmm1
.L37:
	subsd	%xmm1, %xmm0
	comisd	.LC4(%rip), %xmm0
	jnb	.L38
	cvttsd2siq	%xmm0, %r8
	jmp	.L39
.L38:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %r8
	btcq	$63, %r8
.L39:
	movl	%ebx, %ecx
	movl	%r12d, %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	call	_Z7secondsv
	comisd	.LC4(%rip), %xmm0
	jnb	.L40
	cvttsd2siq	%xmm0, %rbp
	jmp	.L41
.L40:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %rbp
	btcq	$63, %rbp
.L41:
	movl	16(%rsp), %ecx
	movq	8(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	20(%rsp), %rdi
	movl	28(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movq	(%rsp), %rdi
	call	_Z30__device_stub__Z10mathKernelPfPf
.L42:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	testq	%rbp, %rbp
	js	.L43
	cvtsi2sdq	%rbp, %xmm1
	jmp	.L44
.L43:
	movq	%rbp, %rax
	andl	$1, %ebp
	shrq	%rax
	orq	%rbp, %rax
	cvtsi2sdq	%rax, %xmm1
	addsd	%xmm1, %xmm1
.L44:
	subsd	%xmm1, %xmm0
	comisd	.LC4(%rip), %xmm0
	jnb	.L45
	cvttsd2siq	%xmm0, %r8
	jmp	.L46
.L45:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %r8
	btcq	$63, %r8
.L46:
	movl	%ebx, %ecx
	movl	%r12d, %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	call	_Z7secondsv
	comisd	.LC4(%rip), %xmm0
	jnb	.L47
	cvttsd2siq	%xmm0, %rbp
	jmp	.L48
.L47:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %rbp
	btcq	$63, %rbp
.L48:
	movl	16(%rsp), %ecx
	movq	8(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	20(%rsp), %rdi
	movl	28(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movq	(%rsp), %rdi
	call	_Z31__device_stub__Z11mathKernel2PfPf
.L49:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	testq	%rbp, %rbp
	js	.L50
	cvtsi2sdq	%rbp, %xmm1
	jmp	.L51
.L50:
	movq	%rbp, %rax
	andl	$1, %ebp
	shrq	%rax
	orq	%rbp, %rax
	cvtsi2sdq	%rax, %xmm1
	addsd	%xmm1, %xmm1
.L51:
	subsd	%xmm1, %xmm0
	comisd	.LC4(%rip), %xmm0
	jnb	.L52
	cvttsd2siq	%xmm0, %r8
	jmp	.L53
.L52:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %r8
	btcq	$63, %r8
.L53:
	movl	%ebx, %ecx
	movl	%r12d, %edx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	call	_Z7secondsv
	comisd	.LC4(%rip), %xmm0
	jnb	.L54
	cvttsd2siq	%xmm0, %rbp
	jmp	.L55
.L54:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %rbp
	btcq	$63, %rbp
.L55:
	movl	16(%rsp), %ecx
	movq	8(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	20(%rsp), %rdi
	movl	28(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	(%rsp), %rdi
	call	_Z31__device_stub__Z11mathKernel3PfPf
.L56:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	testq	%rbp, %rbp
	js	.L57
	cvtsi2sdq	%rbp, %xmm1
	jmp	.L58
.L57:
	movq	%rbp, %rax
	andl	$1, %ebp
	shrq	%rax
	orq	%rbp, %rax
	cvtsi2sdq	%rax, %xmm1
	addsd	%xmm1, %xmm1
.L58:
	subsd	%xmm1, %xmm0
	comisd	.LC4(%rip), %xmm0
	jnb	.L59
	cvttsd2siq	%xmm0, %r8
	jmp	.L60
.L59:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %r8
	btcq	$63, %r8
.L60:
	movl	%ebx, %ecx
	movl	%r12d, %edx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	call	_Z7secondsv
	comisd	.LC4(%rip), %xmm0
	jnb	.L61
	cvttsd2siq	%xmm0, %rbp
	jmp	.L62
.L61:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %rbp
	btcq	$63, %rbp
.L62:
	movl	16(%rsp), %ecx
	movq	8(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	20(%rsp), %rdi
	movl	28(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	movq	(%rsp), %rdi
	call	_Z31__device_stub__Z11mathKernel4PfPf
.L63:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	testq	%rbp, %rbp
	js	.L64
	cvtsi2sdq	%rbp, %xmm1
	jmp	.L65
.L64:
	movq	%rbp, %rax
	andl	$1, %ebp
	shrq	%rax
	orq	%rbp, %rax
	cvtsi2sdq	%rax, %xmm1
	addsd	%xmm1, %xmm1
.L65:
	subsd	%xmm1, %xmm0
	comisd	.LC4(%rip), %xmm0
	jnb	.L66
	cvttsd2siq	%xmm0, %r8
	jmp	.L67
.L66:
	subsd	.LC4(%rip), %xmm0
	cvttsd2siq	%xmm0, %r8
	btcq	$63, %r8
.L67:
	movl	%ebx, %ecx
	movl	%r12d, %edx
	leaq	.LC9(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaDeviceReset@PLT
	movq	1064(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	addq	$1080, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z11mathKernel4Pf"
.LC11:
	.string	"_Z11mathKernel3Pf"
.LC12:
	.string	"_Z11mathKernel2Pf"
.LC13:
	.string	"_Z10mathKernelPf"
.LC14:
	.string	"_Z9warmingupPf"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11mathKernel4Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11mathKernel3Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11mathKernel2Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10mathKernelPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9warmingupPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2064:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC4:
	.long	0
	.long	1138753536
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>

double seconds(){
    struct timeval tp;
    struct timezone tzp;
    int i = gettimeofday(&tp,&tzp);
    return ((double)tp.tv_sec+(double)tp.tv_usec*1.e-6);
    }

__global__ void warmingup(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;

    if (tid % 2 == 0){
        a = 100.0f;}
    else{
        b = 200.0f;}
    
    c[tid] = a + b;
    }
    
__global__ void mathKernel(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;

    if (tid % 2 == 0){
        a = 100.0f;}
    else{
        b = 200.0f;}
    
    c[tid] = a + b;
    }

__global__ void mathKernel2(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;

    if ((tid/warpSize) % 2 == 0){
        a = 100.0f;}
    else{
        b = 200.0f;}
    c[tid] = a + b;
    }

__global__ void mathKernel3(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;
    bool ipred = (tid % 2 == 0);

    if (ipred){
        a = 100.0f;}
    if (!ipred){
        b = 200.0f;}
    c[tid] = a + b;
    }
    
__global__ void mathKernel4(float *c){
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    float a,b;
    a = b = 0.0f;
    int itid = tid >> 5;
    
    if (itid & 0x01 == 0){
        a = 100.0f;}
    else{
        b = 200.0f;}
    c[tid] = a + b;
    }

int main(int argc,char **argv){
    // set up device
    int dev = 0;
    hipDeviceProp_t deviceProp;
    hipGetDeviceProperties(&deviceProp,dev);
    printf("Using Device: %d : %s\n",dev,deviceProp.name);

    // set up data size
    int size =  1<<24;
    int blocksize = 64;
    if (argc > 1) blocksize = atoi(argv[1]);
    if (argc > 2) size = atoi(argv[2]);
    printf("Data size %d \n",size);

    // set up execution configuration
    dim3 block(blocksize,1);
    dim3 grid((size+block.x-1)/block.x,1);
    printf("Execution Configure (block %d grid %d) \n",block.x,grid.x);

    // alocate gpu memory
    float *d_C;
    size_t nBytes = size * sizeof(float);
    hipMalloc((float **)&d_C,nBytes);

    // warmup kernel
    size_t iStart,iElaps;
    hipDeviceSynchronize();
    iStart = seconds();
    warmingup <<<grid,block>>>(d_C);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("Warming up <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // kernel 1
    iStart = seconds();
    mathKernel<<<grid,block>>>(d_C);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("mathKernel <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // kernel 2
    iStart = seconds();
    mathKernel2<<<grid,block>>>(d_C);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("mathKernel2 <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // kernel 3
    iStart = seconds();
    mathKernel3<<<grid,block>>>(d_C);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("mathKernel3 <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // kernel 4
    iStart = seconds();
    mathKernel4<<<grid,block>>>(d_C);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    printf("mathKernel4 <<<%4d,%4d>>> elapsed %f sec\n",grid.x,block.x,iElaps);

    // gpu free & reset
    hipFree(d_C);
    hipDeviceReset();
    return EXIT_SUCCESS;
    }


	.text
	.file	"simpleDivergence.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7secondsv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z7secondsv
	.type	_Z7secondsv,@function
_Z7secondsv:                            # @_Z7secondsv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	16(%rsp), %rbx
	leaq	8(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7secondsv, .Lfunc_end0-_Z7secondsv
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__warmingupPf  # -- Begin function _Z24__device_stub__warmingupPf
	.type	_Z24__device_stub__warmingupPf,@function
_Z24__device_stub__warmingupPf:         # @_Z24__device_stub__warmingupPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9warmingupPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__warmingupPf, .Lfunc_end1-_Z24__device_stub__warmingupPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__mathKernelPf # -- Begin function _Z25__device_stub__mathKernelPf
	.type	_Z25__device_stub__mathKernelPf,@function
_Z25__device_stub__mathKernelPf:        # @_Z25__device_stub__mathKernelPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10mathKernelPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__mathKernelPf, .Lfunc_end2-_Z25__device_stub__mathKernelPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__mathKernel2Pf # -- Begin function _Z26__device_stub__mathKernel2Pf
	.type	_Z26__device_stub__mathKernel2Pf,@function
_Z26__device_stub__mathKernel2Pf:       # @_Z26__device_stub__mathKernel2Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11mathKernel2Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__mathKernel2Pf, .Lfunc_end3-_Z26__device_stub__mathKernel2Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__mathKernel3Pf # -- Begin function _Z26__device_stub__mathKernel3Pf
	.type	_Z26__device_stub__mathKernel3Pf,@function
_Z26__device_stub__mathKernel3Pf:       # @_Z26__device_stub__mathKernel3Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11mathKernel3Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z26__device_stub__mathKernel3Pf, .Lfunc_end4-_Z26__device_stub__mathKernel3Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__mathKernel4Pf # -- Begin function _Z26__device_stub__mathKernel4Pf
	.type	_Z26__device_stub__mathKernel4Pf,@function
_Z26__device_stub__mathKernel4Pf:       # @_Z26__device_stub__mathKernel4Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11mathKernel4Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z26__device_stub__mathKernel4Pf, .Lfunc_end5-_Z26__device_stub__mathKernel4Pf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI6_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI6_1:
	.quad	0x43e0000000000000              # double 9.2233720368547758E+18
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI6_2:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI6_3:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %ebp
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str, %edi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$16777216, %r13d                # imm = 0x1000000
	movl	$64, %ebx
	cmpl	$2, %ebp
	jl	.LBB6_3
# %bb.1:
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
	cmpl	$2, %ebp
	je	.LBB6_3
# %bb.2:
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %r13d
.LBB6_3:                                # %.thread
	movl	$.L.str.1, %edi
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %r15d
	btsq	$32, %r15
	leal	(%rbx,%r13), %eax
	decl	%eax
	xorl	%edx, %edx
	divl	%ebx
	movl	%eax, %r14d
	movq	%r14, %r12
	btsq	$32, %r12
	movl	$.L.str.2, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	printf
	movslq	%r13d, %rsi
	shlq	$2, %rsi
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	callq	hipDeviceSynchronize
	leaq	24(%rsp), %r13
	leaq	8(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	cvtsi2sdq	(%r13), %xmm0
	cvtsi2sdq	8(%r13), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI6_1(%rip), %xmm1
	cvttsd2si	%xmm1, %rbp
	andq	%rcx, %rbp
	orq	%rax, %rbp
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_5
# %bb.4:
	movq	16(%rsp), %rdi
	callq	_Z24__device_stub__warmingupPf
.LBB6_5:
	callq	hipDeviceSynchronize
	leaq	24(%rsp), %r13
	leaq	8(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movq	%rbp, %xmm0
	punpckldq	.LCPI6_2(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI6_3(%rip), %xmm0
	movapd	%xmm0, %xmm2
	unpckhpd	%xmm0, %xmm2                    # xmm2 = xmm2[1],xmm0[1]
	addsd	%xmm0, %xmm2
	subsd	%xmm2, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rdx
	sarq	$63, %rdx
	subsd	.LCPI6_1(%rip), %xmm1
	cvttsd2si	%xmm1, %rcx
	andq	%rdx, %rcx
	orq	%rax, %rcx
	movl	$.L.str.3, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	leaq	24(%rsp), %r13
	leaq	8(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI6_1(%rip), %xmm1
	cvttsd2si	%xmm1, %rbp
	andq	%rcx, %rbp
	orq	%rax, %rbp
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_7
# %bb.6:
	movq	16(%rsp), %rdi
	callq	_Z25__device_stub__mathKernelPf
.LBB6_7:
	callq	hipDeviceSynchronize
	leaq	24(%rsp), %r13
	leaq	8(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	movsd	.LCPI6_0(%rip), %xmm2           # xmm2 = mem[0],zero
	mulsd	%xmm2, %xmm1
	addsd	%xmm0, %xmm1
	movq	%rbp, %xmm0
	punpckldq	.LCPI6_2(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI6_3(%rip), %xmm0
	movapd	%xmm0, %xmm2
	unpckhpd	%xmm0, %xmm2                    # xmm2 = xmm2[1],xmm0[1]
	addsd	%xmm0, %xmm2
	subsd	%xmm2, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rdx
	sarq	$63, %rdx
	movsd	.LCPI6_1(%rip), %xmm0           # xmm0 = mem[0],zero
	subsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rcx
	andq	%rdx, %rcx
	orq	%rax, %rcx
	movl	$.L.str.4, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	leaq	24(%rsp), %r13
	leaq	8(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI6_1(%rip), %xmm1
	cvttsd2si	%xmm1, %rbp
	andq	%rcx, %rbp
	orq	%rax, %rbp
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_9
# %bb.8:
	movq	16(%rsp), %rdi
	callq	_Z26__device_stub__mathKernel2Pf
.LBB6_9:
	callq	hipDeviceSynchronize
	leaq	24(%rsp), %r13
	leaq	8(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	movsd	.LCPI6_0(%rip), %xmm2           # xmm2 = mem[0],zero
	mulsd	%xmm2, %xmm1
	addsd	%xmm0, %xmm1
	movq	%rbp, %xmm0
	punpckldq	.LCPI6_2(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI6_3(%rip), %xmm0
	movapd	%xmm0, %xmm2
	unpckhpd	%xmm0, %xmm2                    # xmm2 = xmm2[1],xmm0[1]
	addsd	%xmm0, %xmm2
	subsd	%xmm2, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rdx
	sarq	$63, %rdx
	movsd	.LCPI6_1(%rip), %xmm0           # xmm0 = mem[0],zero
	subsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rcx
	andq	%rdx, %rcx
	orq	%rax, %rcx
	movl	$.L.str.5, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	leaq	24(%rsp), %r13
	leaq	8(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI6_1(%rip), %xmm1
	cvttsd2si	%xmm1, %rbp
	andq	%rcx, %rbp
	orq	%rax, %rbp
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_11
# %bb.10:
	movq	16(%rsp), %rdi
	callq	_Z26__device_stub__mathKernel3Pf
.LBB6_11:
	callq	hipDeviceSynchronize
	leaq	24(%rsp), %r13
	leaq	8(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movq	%rbp, %xmm0
	punpckldq	.LCPI6_2(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI6_3(%rip), %xmm0
	movapd	%xmm0, %xmm2
	unpckhpd	%xmm0, %xmm2                    # xmm2 = xmm2[1],xmm0[1]
	addsd	%xmm0, %xmm2
	subsd	%xmm2, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rdx
	sarq	$63, %rdx
	subsd	.LCPI6_1(%rip), %xmm1
	cvttsd2si	%xmm1, %rcx
	andq	%rdx, %rcx
	orq	%rax, %rcx
	movl	$.L.str.6, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	leaq	24(%rsp), %r13
	leaq	8(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	movq	(%r13), %rbp
	movq	8(%r13), %r13
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_13
# %bb.12:
	movq	16(%rsp), %rdi
	callq	_Z26__device_stub__mathKernel4Pf
.LBB6_13:
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r13, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rbp, %xmm1
	movsd	.LCPI6_0(%rip), %xmm2           # xmm2 = mem[0],zero
	mulsd	%xmm2, %xmm0
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	movsd	.LCPI6_1(%rip), %xmm0           # xmm0 = mem[0],zero
	subsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %r12
	andq	%rcx, %r12
	orq	%rax, %r12
	callq	hipDeviceSynchronize
	leaq	24(%rsp), %r15
	leaq	8(%rsp), %rsi
	movq	%r15, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r15), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r15), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movq	%r12, %xmm0
	punpckldq	.LCPI6_2(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI6_3(%rip), %xmm0
	movapd	%xmm0, %xmm2
	unpckhpd	%xmm0, %xmm2                    # xmm2 = xmm2[1],xmm0[1]
	addsd	%xmm0, %xmm2
	subsd	%xmm2, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rdx
	sarq	$63, %rdx
	subsd	.LCPI6_1(%rip), %xmm1
	cvttsd2si	%xmm1, %rcx
	andq	%rdx, %rcx
	orq	%rax, %rcx
	movl	$.L.str.7, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9warmingupPf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10mathKernelPf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11mathKernel2Pf, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11mathKernel3Pf, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11mathKernel4Pf, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9warmingupPf,@object          # @_Z9warmingupPf
	.section	.rodata,"a",@progbits
	.globl	_Z9warmingupPf
	.p2align	3, 0x0
_Z9warmingupPf:
	.quad	_Z24__device_stub__warmingupPf
	.size	_Z9warmingupPf, 8

	.type	_Z10mathKernelPf,@object        # @_Z10mathKernelPf
	.globl	_Z10mathKernelPf
	.p2align	3, 0x0
_Z10mathKernelPf:
	.quad	_Z25__device_stub__mathKernelPf
	.size	_Z10mathKernelPf, 8

	.type	_Z11mathKernel2Pf,@object       # @_Z11mathKernel2Pf
	.globl	_Z11mathKernel2Pf
	.p2align	3, 0x0
_Z11mathKernel2Pf:
	.quad	_Z26__device_stub__mathKernel2Pf
	.size	_Z11mathKernel2Pf, 8

	.type	_Z11mathKernel3Pf,@object       # @_Z11mathKernel3Pf
	.globl	_Z11mathKernel3Pf
	.p2align	3, 0x0
_Z11mathKernel3Pf:
	.quad	_Z26__device_stub__mathKernel3Pf
	.size	_Z11mathKernel3Pf, 8

	.type	_Z11mathKernel4Pf,@object       # @_Z11mathKernel4Pf
	.globl	_Z11mathKernel4Pf
	.p2align	3, 0x0
_Z11mathKernel4Pf:
	.quad	_Z26__device_stub__mathKernel4Pf
	.size	_Z11mathKernel4Pf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Using Device: %d : %s\n"
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Data size %d \n"
	.size	.L.str.1, 15

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Execution Configure (block %d grid %d) \n"
	.size	.L.str.2, 41

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Warming up <<<%4d,%4d>>> elapsed %f sec\n"
	.size	.L.str.3, 41

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"mathKernel <<<%4d,%4d>>> elapsed %f sec\n"
	.size	.L.str.4, 41

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"mathKernel2 <<<%4d,%4d>>> elapsed %f sec\n"
	.size	.L.str.5, 42

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"mathKernel3 <<<%4d,%4d>>> elapsed %f sec\n"
	.size	.L.str.6, 42

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"mathKernel4 <<<%4d,%4d>>> elapsed %f sec\n"
	.size	.L.str.7, 42

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9warmingupPf"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10mathKernelPf"
	.size	.L__unnamed_2, 17

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z11mathKernel2Pf"
	.size	.L__unnamed_3, 18

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z11mathKernel3Pf"
	.size	.L__unnamed_4, 18

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z11mathKernel4Pf"
	.size	.L__unnamed_5, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__warmingupPf
	.addrsig_sym _Z25__device_stub__mathKernelPf
	.addrsig_sym _Z26__device_stub__mathKernel2Pf
	.addrsig_sym _Z26__device_stub__mathKernel3Pf
	.addrsig_sym _Z26__device_stub__mathKernel4Pf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9warmingupPf
	.addrsig_sym _Z10mathKernelPf
	.addrsig_sym _Z11mathKernel2Pf
	.addrsig_sym _Z11mathKernel3Pf
	.addrsig_sym _Z11mathKernel4Pf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9warmingupPf          ; -- Begin function _Z9warmingupPf
	.globl	_Z9warmingupPf
	.p2align	8
	.type	_Z9warmingupPf,@function
_Z9warmingupPf:                         ; @_Z9warmingupPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x14
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v4, 0x42c80000
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_and_b32_e32 v3, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v2, 0x43480000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9warmingupPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9warmingupPf, .Lfunc_end0-_Z9warmingupPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10mathKernelPf        ; -- Begin function _Z10mathKernelPf
	.globl	_Z10mathKernelPf
	.p2align	8
	.type	_Z10mathKernelPf,@function
_Z10mathKernelPf:                       ; @_Z10mathKernelPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x14
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v4, 0x42c80000
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_and_b32_e32 v3, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v2, 0x43480000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10mathKernelPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10mathKernelPf, .Lfunc_end1-_Z10mathKernelPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11mathKernel2Pf       ; -- Begin function _Z11mathKernel2Pf
	.globl	_Z11mathKernel2Pf
	.p2align	8
	.type	_Z11mathKernel2Pf,@function
_Z11mathKernel2Pf:                      ; @_Z11mathKernel2Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x14
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v4, 0x42c80000
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 27, v2
	v_add_nc_u32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfe_u32 v3, v0, 5, 1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v2, 0x43480000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11mathKernel2Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z11mathKernel2Pf, .Lfunc_end2-_Z11mathKernel2Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 136
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11mathKernel3Pf       ; -- Begin function _Z11mathKernel3Pf
	.globl	_Z11mathKernel3Pf
	.p2align	8
	.type	_Z11mathKernel3Pf,@function
_Z11mathKernel3Pf:                      ; @_Z11mathKernel3Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x14
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v4, 0x42c80000
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_and_b32_e32 v3, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v2, 0x43480000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11mathKernel3Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z11mathKernel3Pf, .Lfunc_end3-_Z11mathKernel3Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11mathKernel4Pf       ; -- Begin function _Z11mathKernel4Pf
	.globl	_Z11mathKernel4Pf
	.p2align	8
	.type	_Z11mathKernel4Pf,@function
_Z11mathKernel4Pf:                      ; @_Z11mathKernel4Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x14
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, 0x43480000
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11mathKernel4Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z11mathKernel4Pf, .Lfunc_end4-_Z11mathKernel4Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 104
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9warmingupPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9warmingupPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10mathKernelPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10mathKernelPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11mathKernel2Pf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11mathKernel2Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11mathKernel3Pf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11mathKernel3Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11mathKernel4Pf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11mathKernel4Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
