#include "stdio.h"
#include "stdlib.h"
#include "time.h"
#include "math.h"
#define BLOCK_SIZE 32
int block_size;


void generate_matrix(float *mat, int a, int b)
{
	int i, j, m, n;
	m = a * block_size;
	n = b * block_size;

	for(i = 0; i < m; i++)
		for(j = 0; j < n; j++)
			mat[i * n + j] = (float)(rand() % 100) / 10.0;
}

void serial_compute(float *A, float *B, float *C)
{
	int i, j, k, m, n;
	m = 10 * block_size;
	n = 20 * block_size;

	for(i = 0; i < m; i++)
		for(j = 0;j < n; j++)
		{
			float sum = 0;
			for(k = 0; k < m; k++)
				sum += A[i * m + k] * B[k * n + j];
			C[i * n + j] = sum;
		}
}

bool check_result(float *C1, float *C2)
{
	int m = 10 * block_size, n = 20 * block_size;
	for(int i = 0; i < m; i++)
		for(int j = 0; j < n; j++)
			if(fabs(C1[i * n + j] - C2[i * n + j]) > 1e-2)
			{
				printf("C1:%lf, C2:%lf\n", C1[i * n + j], C2[i * n + j]);
				return false;
			}

	return true;
}

__global__ void tiled_parallel_compute(float *A, float *B, float *C, int block_size)
{
	__shared__ float block_A[BLOCK_SIZE][BLOCK_SIZE];
	__shared__ float block_B[BLOCK_SIZE][BLOCK_SIZE];

	int row = blockIdx.y * BLOCK_SIZE + threadIdx.y;
	int column = blockIdx.x * BLOCK_SIZE + threadIdx.x;
	int m = 10 * block_size, n = 20 * block_size;
	int t_x = threadIdx.x, t_y = threadIdx.y;
	float sum = 0;

	for(int i = 0; i < m / BLOCK_SIZE; i++)
	{
		block_A[t_y][t_x] = A[row * m + i * BLOCK_SIZE + t_x];
		block_B[t_y][t_x] = B[(i * BLOCK_SIZE + t_y) * n + column];
		__syncthreads();

		for(int j = 0; j < BLOCK_SIZE; j++)
			sum += block_A[t_y][j] * block_B[j][t_x];
		__syncthreads();
	}

	C[row * n + column] = sum;

}

__global__ void parallel_compute(float *A, float *B, float *C, int block_size)
{
	int row = blockIdx.y * BLOCK_SIZE + threadIdx.y;
	int column = blockIdx.x * BLOCK_SIZE + threadIdx.x;
	int m = 10 * block_size, n = 20 * block_size;
	float sum = 0;

	if(row < m && column < n)
	{
		for(int i = 0; i < m; i++)
			sum += A[row * m + i] * B[i * n + column];
		C[row * n + column] = sum;
	}

}

int main(int argc, char const *argv[])
{

	float *A, *B, *C1, *C2, *CUDA_A, *CUDA_B, *CUDA_C;
	clock_t start, end;
	double t0, t1, t2;
	int m, n;

	block_size = atoi(argv[1]) / BLOCK_SIZE * BLOCK_SIZE;
	m = 10 * block_size;
	n = 20 * block_size;
	A = (float*)malloc(sizeof(float) * m * m);
	B = (float*)malloc(sizeof(float) * m * n);
	C1 = (float*)malloc(sizeof(float) * m * n);
	C2 = (float*)malloc(sizeof(float) * m * n);
	srand(time(NULL));

	generate_matrix(A, 10, 10);
	generate_matrix(B, 10, 20);

	start = clock();
	serial_compute(A, B, C1);
	end = clock();
	t0 = (((double) (end - start)) / CLOCKS_PER_SEC );
	printf("Serial algorithm costs %lfs.\n", t0);

    dim3 threads(BLOCK_SIZE, BLOCK_SIZE, 1);
    dim3 blocks(n / BLOCK_SIZE, m / BLOCK_SIZE, 1);
	cudaMalloc(&CUDA_A, sizeof(float) * m * m);
	cudaMalloc(&CUDA_B, sizeof(float) * m * n);
	cudaMalloc(&CUDA_C, sizeof(float) * m * n);
	// Copy to GPU memory
	cudaMemcpy(CUDA_A, A, m * m * sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(CUDA_B, B, m * n * sizeof(float), cudaMemcpyHostToDevice);
	// parallel
	start = clock();
	parallel_compute<<<blocks, threads>>>(CUDA_A, CUDA_B, CUDA_C, block_size);
	end = clock();
	cudaMemcpy(C2, CUDA_C, m * n * sizeof(float), cudaMemcpyDeviceToHost);
	t1 = ((double) (clock() - start)) / CLOCKS_PER_SEC;

	bool right = check_result(C1, C2);
	if(right)
		printf("Parallel algorithm costs %lfs, speedup is %lf, result is right.\n", t1, t0 / t1 / 10);
	else
		printf("Result is wrong.\n");

	// tiled
	start = clock();
	tiled_parallel_compute<<<blocks, threads>>>(CUDA_A, CUDA_B, CUDA_C, block_size);
	end = clock();
	cudaMemcpy(C2, CUDA_C, m * n * sizeof(float), cudaMemcpyDeviceToHost);
	t2 = ((double) (clock() - start)) / CLOCKS_PER_SEC;

	right = check_result(C1, C2);
	if(right)
		printf("Parallel tiled algorithm costs %lfs, speedup is %lf, result is right.\n", t2, t0 / t2 / 10);
	else
		printf("Result is wrong.\n");

	return 0;
}
	.file	"tmpxft_00330c6f_00000000-6_matrix_mul.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15generate_matrixPfii
	.type	_Z15generate_matrixPfii, @function
_Z15generate_matrixPfii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	block_size(%rip), %ebx
	imull	%ebx, %esi
	imull	%edx, %ebx
	movl	%esi, %r15d
.L3:
	cmpl	%r15d, %r13d
	jge	.L2
	movslq	%r12d, %rax
	xorl	%ebp, %ebp
	leaq	(%r14,%rax,4), %rsi
.L6:
	cmpl	%ebp, %ebx
	jle	.L9
	movq	%rsi, 8(%rsp)
	call	rand@PLT
	movl	$100, %ecx
	movq	8(%rsp), %rsi
	cltd
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	divss	.LC0(%rip), %xmm0
	movss	%xmm0, (%rsi,%rbp,4)
	incq	%rbp
	jmp	.L6
.L9:
	incl	%r13d
	addl	%ebx, %r12d
	jmp	.L3
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z15generate_matrixPfii, .-_Z15generate_matrixPfii
	.globl	_Z14serial_computePfS_S_
	.type	_Z14serial_computePfS_S_, @function
_Z14serial_computePfS_S_:
.LFB2028:
	.cfi_startproc
	endbr64
	movl	block_size(%rip), %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdx, %r11
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	xorl	%esi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	imull	$10, %eax, %ebp
	imull	$20, %eax, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	xorl	%edi, %edi
	movslq	%eax, %r9
	salq	$2, %r9
.L11:
	cmpl	%ebp, %r8d
	jge	.L10
	movslq	%edi, %rdx
	leaq	(%rbx,%rdx,4), %r14
	movslq	%esi, %rdx
	leaq	(%r11,%rdx,4), %r13
	xorl	%edx, %edx
.L15:
	cmpl	%edx, %eax
	jle	.L18
	leaq	(%r12,%rdx,4), %r10
	xorl	%ecx, %ecx
	xorps	%xmm0, %xmm0
.L12:
	movss	(%r14,%rcx,4), %xmm1
	mulss	(%r10), %xmm1
	incq	%rcx
	addq	%r9, %r10
	addss	%xmm1, %xmm0
	cmpl	%ecx, %ebp
	jg	.L12
	movss	%xmm0, 0(%r13,%rdx,4)
	incq	%rdx
	jmp	.L15
.L18:
	incl	%r8d
	addl	%eax, %esi
	addl	%ebp, %edi
	jmp	.L11
.L10:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14serial_computePfS_S_, .-_Z14serial_computePfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"C1:%lf, C2:%lf\n"
	.text
	.globl	_Z12check_resultPfS_
	.type	_Z12check_resultPfS_, @function
_Z12check_resultPfS_:
.LFB2029:
	.cfi_startproc
	endbr64
	movl	block_size(%rip), %edx
	movsd	.LC3(%rip), %xmm4
	movq	%rdi, %r9
	xorl	%edi, %edi
	xorl	%r8d, %r8d
	movss	.LC2(%rip), %xmm3
	imull	$10, %edx, %r10d
	imull	$20, %edx, %edx
.L20:
	cmpl	%r10d, %r8d
	jge	.L26
	movslq	%edi, %rax
	xorl	%ecx, %ecx
	salq	$2, %rax
.L25:
	cmpl	%edx, %ecx
	jge	.L33
	movss	(%r9,%rax), %xmm0
	movss	(%rsi,%rax), %xmm1
	addq	$4, %rax
	movaps	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	andps	%xmm3, %xmm2
	cvtss2sd	%xmm2, %xmm2
	comisd	%xmm4, %xmm2
	jbe	.L28
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	leaq	.LC4(%rip), %rsi
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
.L28:
	incl	%ecx
	jmp	.L25
.L33:
	incl	%r8d
	addl	%edx, %edi
	jmp	.L20
.L26:
	movb	$1, %al
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z12check_resultPfS_, .-_Z12check_resultPfS_
	.globl	_Z47__device_stub__Z22tiled_parallel_computePfS_S_iPfS_S_i
	.type	_Z47__device_stub__Z22tiled_parallel_computePfS_S_iPfS_S_i, @function
_Z47__device_stub__Z22tiled_parallel_computePfS_S_iPfS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z22tiled_parallel_computePfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L34:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z47__device_stub__Z22tiled_parallel_computePfS_S_iPfS_S_i, .-_Z47__device_stub__Z22tiled_parallel_computePfS_S_iPfS_S_i
	.globl	_Z22tiled_parallel_computePfS_S_i
	.type	_Z22tiled_parallel_computePfS_S_i, @function
_Z22tiled_parallel_computePfS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z22tiled_parallel_computePfS_S_iPfS_S_i
	.cfi_endproc
.LFE2056:
	.size	_Z22tiled_parallel_computePfS_S_i, .-_Z22tiled_parallel_computePfS_S_i
	.globl	_Z41__device_stub__Z16parallel_computePfS_S_iPfS_S_i
	.type	_Z41__device_stub__Z16parallel_computePfS_S_iPfS_S_i, @function
_Z41__device_stub__Z16parallel_computePfS_S_iPfS_S_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16parallel_computePfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L39:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z41__device_stub__Z16parallel_computePfS_S_iPfS_S_i, .-_Z41__device_stub__Z16parallel_computePfS_S_iPfS_S_i
	.globl	_Z16parallel_computePfS_S_i
	.type	_Z16parallel_computePfS_S_i, @function
_Z16parallel_computePfS_S_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16parallel_computePfS_S_iPfS_S_i
	.cfi_endproc
.LFE2058:
	.size	_Z16parallel_computePfS_S_i, .-_Z16parallel_computePfS_S_i
	.section	.rodata.str1.1
.LC6:
	.string	"Serial algorithm costs %lfs.\n"
.LC8:
	.string	"Parallel algorithm costs %lfs, speedup is %lf, result is right.\n"
.LC9:
	.string	"Result is wrong.\n"
.LC10:
	.string	"Parallel tiled algorithm costs %lfs, speedup is %lf, result is right.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$32, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	cltd
	idivl	%r12d
	imull	$320, %eax, %r15d
	movl	%eax, %edx
	imull	$640, %eax, %ebx
	sall	$5, %edx
	movl	%edx, block_size(%rip)
	movslq	%r15d, %rbp
	movq	%rbp, %rax
	imulq	%rbp, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, %r14
	movslq	%ebx, %rax
	imulq	%rbp, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	xorl	%edi, %edi
	movq	%rax, 8(%rsp)
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	$10, %edx
	movl	$10, %esi
	movq	%r14, %rdi
	call	_Z15generate_matrixPfii
	movq	%r13, %rdi
	movl	$20, %edx
	movl	$10, %esi
	call	_Z15generate_matrixPfii
	call	clock@PLT
	movq	24(%rsp), %rdx
	movq	%r13, %rsi
	movq	%r14, %rdi
	movq	%rax, %rbp
	call	_Z14serial_computePfS_S_
	call	clock@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	subq	%rbp, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC5(%rip), %xmm0
	movq	%xmm0, %rbp
	call	__printf_chk@PLT
	movq	16(%rsp), %rsi
	movabsq	$137438953504, %rax
	leaq	40(%rsp), %rdi
	movq	%rax, 64(%rsp)
	movl	%ebx, %eax
	cltd
	movl	$1, 72(%rsp)
	idivl	%r12d
	movl	$1, 84(%rsp)
	movl	%eax, 76(%rsp)
	movl	%r15d, %eax
	cltd
	idivl	%r12d
	movl	%eax, 80(%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	call	clock@PLT
	movl	72(%rsp), %ecx
	movl	84(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	76(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %r13
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movl	block_size(%rip), %ecx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z41__device_stub__Z16parallel_computePfS_S_iPfS_S_i
.L45:
	call	clock@PLT
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movq	(%rsp), %rdx
	call	cudaMemcpy@PLT
	call	clock@PLT
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%rax, %rbx
	call	_Z12check_resultPfS_
	testb	%al, %al
	je	.L46
	subq	%r13, %rbx
	movq	%rbp, %xmm1
	movl	$2, %edi
	movb	$2, %al
	cvtsi2sdq	%rbx, %xmm0
	divsd	.LC5(%rip), %xmm0
	divsd	%xmm0, %xmm1
	leaq	.LC8(%rip), %rsi
	divsd	.LC7(%rip), %xmm1
	call	__printf_chk@PLT
	jmp	.L47
.L46:
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L47:
	call	clock@PLT
	movl	72(%rsp), %ecx
	movl	84(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	76(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %r13
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	movl	block_size(%rip), %ecx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z47__device_stub__Z22tiled_parallel_computePfS_S_iPfS_S_i
.L48:
	call	clock@PLT
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movq	(%rsp), %rdx
	call	cudaMemcpy@PLT
	call	clock@PLT
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%rax, %rbx
	call	_Z12check_resultPfS_
	testb	%al, %al
	je	.L49
	subq	%r13, %rbx
	movq	%rbp, %xmm1
	movl	$2, %edi
	movb	$2, %al
	cvtsi2sdq	%rbx, %xmm0
	divsd	.LC5(%rip), %xmm0
	divsd	%xmm0, %xmm1
	leaq	.LC10(%rip), %rsi
	divsd	.LC7(%rip), %xmm1
	call	__printf_chk@PLT
	jmp	.L50
.L49:
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L50:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z16parallel_computePfS_S_i"
.LC12:
	.string	"_Z22tiled_parallel_computePfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16parallel_computePfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z22tiled_parallel_computePfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	block_size
	.bss
	.align 4
	.type	block_size, @object
	.size	block_size, 4
block_size:
	.zero	4
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1092616192
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC2:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	1202590843
	.long	1065646817
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.align 8
.LC7:
	.long	0
	.long	1076101120
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "stdio.h"
#include "stdlib.h"
#include "time.h"
#include "math.h"
#define BLOCK_SIZE 32
int block_size;


void generate_matrix(float *mat, int a, int b)
{
	int i, j, m, n;
	m = a * block_size;
	n = b * block_size;

	for(i = 0; i < m; i++)
		for(j = 0; j < n; j++)
			mat[i * n + j] = (float)(rand() % 100) / 10.0;
}

void serial_compute(float *A, float *B, float *C)
{
	int i, j, k, m, n;
	m = 10 * block_size;
	n = 20 * block_size;

	for(i = 0; i < m; i++)
		for(j = 0;j < n; j++)
		{
			float sum = 0;
			for(k = 0; k < m; k++)
				sum += A[i * m + k] * B[k * n + j];
			C[i * n + j] = sum;
		}
}

bool check_result(float *C1, float *C2)
{
	int m = 10 * block_size, n = 20 * block_size;
	for(int i = 0; i < m; i++)
		for(int j = 0; j < n; j++)
			if(fabs(C1[i * n + j] - C2[i * n + j]) > 1e-2)
			{
				printf("C1:%lf, C2:%lf\n", C1[i * n + j], C2[i * n + j]);
				return false;
			}

	return true;
}

__global__ void tiled_parallel_compute(float *A, float *B, float *C, int block_size)
{
	__shared__ float block_A[BLOCK_SIZE][BLOCK_SIZE];
	__shared__ float block_B[BLOCK_SIZE][BLOCK_SIZE];

	int row = blockIdx.y * BLOCK_SIZE + threadIdx.y;
	int column = blockIdx.x * BLOCK_SIZE + threadIdx.x;
	int m = 10 * block_size, n = 20 * block_size;
	int t_x = threadIdx.x, t_y = threadIdx.y;
	float sum = 0;

	for(int i = 0; i < m / BLOCK_SIZE; i++)
	{
		block_A[t_y][t_x] = A[row * m + i * BLOCK_SIZE + t_x];
		block_B[t_y][t_x] = B[(i * BLOCK_SIZE + t_y) * n + column];
		__syncthreads();

		for(int j = 0; j < BLOCK_SIZE; j++)
			sum += block_A[t_y][j] * block_B[j][t_x];
		__syncthreads();
	}

	C[row * n + column] = sum;

}

__global__ void parallel_compute(float *A, float *B, float *C, int block_size)
{
	int row = blockIdx.y * BLOCK_SIZE + threadIdx.y;
	int column = blockIdx.x * BLOCK_SIZE + threadIdx.x;
	int m = 10 * block_size, n = 20 * block_size;
	float sum = 0;

	if(row < m && column < n)
	{
		for(int i = 0; i < m; i++)
			sum += A[row * m + i] * B[i * n + column];
		C[row * n + column] = sum;
	}

}

int main(int argc, char const *argv[])
{

	float *A, *B, *C1, *C2, *CUDA_A, *CUDA_B, *CUDA_C;
	clock_t start, end;
	double t0, t1, t2;
	int m, n;

	block_size = atoi(argv[1]) / BLOCK_SIZE * BLOCK_SIZE;
	m = 10 * block_size;
	n = 20 * block_size;
	A = (float*)malloc(sizeof(float) * m * m);
	B = (float*)malloc(sizeof(float) * m * n);
	C1 = (float*)malloc(sizeof(float) * m * n);
	C2 = (float*)malloc(sizeof(float) * m * n);
	srand(time(NULL));

	generate_matrix(A, 10, 10);
	generate_matrix(B, 10, 20);

	start = clock();
	serial_compute(A, B, C1);
	end = clock();
	t0 = (((double) (end - start)) / CLOCKS_PER_SEC );
	printf("Serial algorithm costs %lfs.\n", t0);

    dim3 threads(BLOCK_SIZE, BLOCK_SIZE, 1);
    dim3 blocks(n / BLOCK_SIZE, m / BLOCK_SIZE, 1);
	hipMalloc(&CUDA_A, sizeof(float) * m * m);
	hipMalloc(&CUDA_B, sizeof(float) * m * n);
	hipMalloc(&CUDA_C, sizeof(float) * m * n);
	// Copy to GPU memory
	hipMemcpy(CUDA_A, A, m * m * sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(CUDA_B, B, m * n * sizeof(float), hipMemcpyHostToDevice);
	// parallel
	start = clock();
	parallel_compute<<<blocks, threads>>>(CUDA_A, CUDA_B, CUDA_C, block_size);
	end = clock();
	hipMemcpy(C2, CUDA_C, m * n * sizeof(float), hipMemcpyDeviceToHost);
	t1 = ((double) (clock() - start)) / CLOCKS_PER_SEC;

	bool right = check_result(C1, C2);
	if(right)
		printf("Parallel algorithm costs %lfs, speedup is %lf, result is right.\n", t1, t0 / t1 / 10);
	else
		printf("Result is wrong.\n");

	// tiled
	start = clock();
	tiled_parallel_compute<<<blocks, threads>>>(CUDA_A, CUDA_B, CUDA_C, block_size);
	end = clock();
	hipMemcpy(C2, CUDA_C, m * n * sizeof(float), hipMemcpyDeviceToHost);
	t2 = ((double) (clock() - start)) / CLOCKS_PER_SEC;

	right = check_result(C1, C2);
	if(right)
		printf("Parallel tiled algorithm costs %lfs, speedup is %lf, result is right.\n", t2, t0 / t2 / 10);
	else
		printf("Result is wrong.\n");

	return 0;
}
	.text
	.file	"matrix_mul.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z15generate_matrixPfii
.LCPI0_0:
	.long	0x41200000                      # float 10
	.text
	.globl	_Z15generate_matrixPfii
	.type	_Z15generate_matrixPfii,@function
_Z15generate_matrixPfii:                # @_Z15generate_matrixPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movl	block_size(%rip), %ebp
	imull	%ebp, %esi
	testl	%esi, %esi
	jle	.LBB0_6
# %bb.1:                                # %.preheader.lr.ph
	imull	%edx, %ebp
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebp, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testl	%ebp, %ebp
	jle	.LBB0_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	%r12d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	xorl	%r14d, %r14d
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r13
	addl	%ebp, %r12d
	cmpq	16(%rsp), %r13                  # 8-byte Folded Reload
	jne	.LBB0_2
.LBB0_6:                                # %._crit_edge15
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z15generate_matrixPfii, .Lfunc_end0-_Z15generate_matrixPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14serial_computePfS_S_        # -- Begin function _Z14serial_computePfS_S_
	.type	_Z14serial_computePfS_S_,@function
_Z14serial_computePfS_S_:               # @_Z14serial_computePfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movl	block_size(%rip), %eax
	testl	%eax, %eax
	jle	.LBB1_7
# %bb.1:                                # %.preheader27.lr.ph
	leal	(,%rax,4), %ecx
	leal	(%rcx,%rcx,4), %ecx
	addl	%eax, %eax
	leal	(%rax,%rax,4), %edx
	movslq	%ecx, %rcx
	cmpl	$2, %edx
	movl	$1, %r8d
	cmovgel	%edx, %r8d
	movl	$1, %r9d
	cmpl	$2, %ecx
	cmovgel	%ecx, %r9d
	leaq	(,%rcx,4), %r10
	xorl	%r11d, %r11d
	xorl	%ebx, %ebx
.LBB1_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
	movl	%r11d, %eax
	leaq	(%rdi,%rax,4), %r14
	movq	%rbx, %rax
	imulq	%rcx, %rax
	movq	-8(%rsp), %r15                  # 8-byte Reload
	leaq	(%r15,%rax,4), %r15
	movq	%rsi, %r12
	xorl	%r13d, %r13d
.LBB1_3:                                # %.lr.ph.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
	xorps	%xmm0, %xmm0
	movq	%r12, %rbp
	xorl	%eax, %eax
.LBB1_4:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r14,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm1
	addss	%xmm1, %xmm0
	incq	%rax
	addq	%r10, %rbp
	cmpq	%rax, %r8
	jne	.LBB1_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=2
	movss	%xmm0, (%r15,%r13,4)
	incq	%r13
	addq	$4, %r12
	cmpq	%r9, %r13
	jne	.LBB1_3
# %bb.6:                                # %._crit_edge31
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%rbx
	addl	%edx, %r11d
	cmpq	%r8, %rbx
	jne	.LBB1_2
.LBB1_7:                                # %._crit_edge33
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z14serial_computePfS_S_, .Lfunc_end1-_Z14serial_computePfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z12check_resultPfS_
.LCPI2_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x3f847ae147ae147b              # double 0.01
	.text
	.globl	_Z12check_resultPfS_
	.type	_Z12check_resultPfS_,@function
_Z12check_resultPfS_:                   # @_Z12check_resultPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	block_size(%rip), %ecx
	testl	%ecx, %ecx
	jle	.LBB2_1
# %bb.2:                                # %.preheader.lr.ph
	leal	(,%rcx,4), %eax
	leal	(%rax,%rax,4), %eax
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %r8d
	cmpl	$2, %eax
	movl	$1, %ecx
	movl	$1, %edx
	cmovgel	%eax, %edx
	movslq	%r8d, %r8
	cmpl	$2, %r8d
	cmovgel	%r8d, %ecx
	xorl	%r9d, %r9d
	movaps	.LCPI2_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%r10d, %r10d
	xorl	%ebx, %ebx
.LBB2_3:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_5 Depth 2
	movl	%r9d, %r14d
	leaq	(%rsi,%r14,4), %r11
	leaq	(%rdi,%r14,4), %r14
	xorl	%r15d, %r15d
.LBB2_5:                                #   Parent Loop BB2_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r14,%r15,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movss	(%r11,%r15,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm4
	subss	%xmm3, %xmm4
	andps	%xmm0, %xmm4
	cvtss2sd	%xmm4, %xmm4
	ucomisd	%xmm1, %xmm4
	ja	.LBB2_6
# %bb.4:                                #   in Loop: Header=BB2_5 Depth=2
	incq	%r15
	cmpq	%r15, %rdx
	jne	.LBB2_5
# %bb.7:                                # %.critedge
                                        #   in Loop: Header=BB2_3 Depth=1
	incq	%r10
	cmpq	%r8, %r10
	setge	%bl
	addl	%eax, %r9d
	cmpq	%rcx, %r10
	jne	.LBB2_3
	jmp	.LBB2_8
.LBB2_6:
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm3, %xmm1
	movl	$.L.str, %edi
	movb	$2, %al
	callq	printf
	jmp	.LBB2_8
.LBB2_1:
	movb	$1, %bl
.LBB2_8:                                # %.critedge32
	andb	$1, %bl
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12check_resultPfS_, .Lfunc_end2-_Z12check_resultPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__tiled_parallel_computePfS_S_i # -- Begin function _Z37__device_stub__tiled_parallel_computePfS_S_i
	.type	_Z37__device_stub__tiled_parallel_computePfS_S_i,@function
_Z37__device_stub__tiled_parallel_computePfS_S_i: # @_Z37__device_stub__tiled_parallel_computePfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22tiled_parallel_computePfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z37__device_stub__tiled_parallel_computePfS_S_i, .Lfunc_end3-_Z37__device_stub__tiled_parallel_computePfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__parallel_computePfS_S_i # -- Begin function _Z31__device_stub__parallel_computePfS_S_i
	.type	_Z31__device_stub__parallel_computePfS_S_i,@function
_Z31__device_stub__parallel_computePfS_S_i: # @_Z31__device_stub__parallel_computePfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16parallel_computePfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z31__device_stub__parallel_computePfS_S_i, .Lfunc_end4-_Z31__device_stub__parallel_computePfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI5_1:
	.quad	0x4024000000000000              # double 10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	leal	31(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	movl	%ecx, %r15d
	sarl	$5, %r15d
	andl	$-32, %ecx
	movl	%ecx, block_size(%rip)
	movl	%r15d, %eax
	shll	$6, %eax
	leal	(%rax,%rax,4), %eax
	movl	%r15d, %ecx
	shll	$7, %ecx
	leal	(%rcx,%rcx,4), %r12d
	cltq
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rbx
	movq	%rbx, %rdi
	imulq	%rax, %rdi
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r13
	movslq	%r12d, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	imulq	%rax, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movq	%r13, %rdi
	movl	$10, %esi
	movl	$10, %edx
	callq	_Z15generate_matrixPfii
	movq	%r12, %rdi
	movq	%r12, 48(%rsp)                  # 8-byte Spill
	movl	$10, %esi
	movl	$20, %edx
	callq	_Z15generate_matrixPfii
	callq	clock
	movq	%rax, %r14
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdx
	callq	_Z14serial_computePfS_S_
	callq	clock
	subq	%r14, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI5_0(%rip), %xmm0
	movl	$.L.str.1, %edi
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movb	$1, %al
	callq	printf
	leal	(,%r15,4), %eax
	leal	(%rax,%rax,4), %eax
	addl	%r15d, %r15d
	leal	(%r15,%r15,4), %r12d
	shlq	$32, %r12
	orq	%rax, %r12
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	leaq	32(%rsp), %r14
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	64(%rsp), %rbx                  # 8-byte Reload
	movl	%ebx, %edx
	imull	%edx, %edx
	shlq	$2, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	16(%rsp), %rax                  # 8-byte Reload
	imull	%ebx, %eax
	movslq	%eax, %r13
	shlq	$2, %r13
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	movl	$1, %esi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	block_size(%rip), %ecx
	callq	_Z31__device_stub__parallel_computePfS_S_i
.LBB5_2:
	callq	clock
	movq	8(%rsp), %rsi
	movq	72(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %r14
	movq	80(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	movq	%r15, %rbx
	movq	%r15, %rsi
	callq	_Z12check_resultPfS_
	testb	%al, %al
	je	.LBB5_4
# %bb.3:
	subq	16(%rsp), %r14                  # 8-byte Folded Reload
	cvtsi2sd	%r14, %xmm0
	divsd	.LCPI5_0(%rip), %xmm0
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	divsd	.LCPI5_1(%rip), %xmm1
	movl	$.L.str.2, %edi
	movb	$2, %al
	callq	printf
	jmp	.LBB5_5
.LBB5_4:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB5_5:
	callq	clock
	movq	%rax, %r15
	movq	%r12, %rdi
	movl	$1, %esi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_7
# %bb.6:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	block_size(%rip), %ecx
	callq	_Z37__device_stub__tiled_parallel_computePfS_S_i
.LBB5_7:
	callq	clock
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %r14
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	_Z12check_resultPfS_
	testb	%al, %al
	je	.LBB5_9
# %bb.8:
	subq	%r15, %r14
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14, %xmm0
	divsd	.LCPI5_0(%rip), %xmm0
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	divsd	.LCPI5_1(%rip), %xmm1
	movl	$.L.str.4, %edi
	movb	$2, %al
	callq	printf
	jmp	.LBB5_10
.LBB5_9:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB5_10:
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22tiled_parallel_computePfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16parallel_computePfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	block_size,@object              # @block_size
	.bss
	.globl	block_size
	.p2align	2, 0x0
block_size:
	.long	0                               # 0x0
	.size	block_size, 4

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"C1:%lf, C2:%lf\n"
	.size	.L.str, 16

	.type	_Z22tiled_parallel_computePfS_S_i,@object # @_Z22tiled_parallel_computePfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z22tiled_parallel_computePfS_S_i
	.p2align	3, 0x0
_Z22tiled_parallel_computePfS_S_i:
	.quad	_Z37__device_stub__tiled_parallel_computePfS_S_i
	.size	_Z22tiled_parallel_computePfS_S_i, 8

	.type	_Z16parallel_computePfS_S_i,@object # @_Z16parallel_computePfS_S_i
	.globl	_Z16parallel_computePfS_S_i
	.p2align	3, 0x0
_Z16parallel_computePfS_S_i:
	.quad	_Z31__device_stub__parallel_computePfS_S_i
	.size	_Z16parallel_computePfS_S_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Serial algorithm costs %lfs.\n"
	.size	.L.str.1, 30

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Parallel algorithm costs %lfs, speedup is %lf, result is right.\n"
	.size	.L.str.2, 65

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Parallel tiled algorithm costs %lfs, speedup is %lf, result is right.\n"
	.size	.L.str.4, 71

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z22tiled_parallel_computePfS_S_i"
	.size	.L__unnamed_1, 34

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16parallel_computePfS_S_i"
	.size	.L__unnamed_2, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"Result is wrong."
	.size	.Lstr.1, 17

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z37__device_stub__tiled_parallel_computePfS_S_i
	.addrsig_sym _Z31__device_stub__parallel_computePfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z22tiled_parallel_computePfS_S_i
	.addrsig_sym _Z16parallel_computePfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z22tiled_parallel_computePfS_S_i ; -- Begin function _Z22tiled_parallel_computePfS_S_i
	.globl	_Z22tiled_parallel_computePfS_S_i
	.p2align	8
	.type	_Z22tiled_parallel_computePfS_S_i,@function
_Z22tiled_parallel_computePfS_S_i:      ; @_Z22tiled_parallel_computePfS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v5, v0, 10, 10
	v_dual_mov_b32 v2, 0 :: v_dual_and_b32 v3, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v4, s15, 5, v5
	v_lshl_add_u32 v0, s14, 5, v3
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s3, 4
	s_mul_i32 s2, s3, 20
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v8, 2, v3
	s_mul_i32 s3, s3, 10
	v_lshlrev_b32_e32 v6, 7, v5
	v_mad_u64_u32 v[1:2], null, s3, v4, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v7, 0x1000, v8
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, v6, v8
	s_lshr_b32 s8, s3, 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_max_i32 s3, s8, 1
	v_add_nc_u32_e32 v8, v7, v6
	s_mov_b32 s8, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s9, s8, 5
	v_add_nc_u32_e32 v10, s9, v5
	v_add_nc_u32_e32 v9, s9, v1
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[11:12], null, v10, s2, v[0:1]
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s4, v9
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	v_add_co_u32 v11, vcc_lo, s6, v11
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v10, v[9:10], off
	global_load_b32 v11, v[11:12], off
	v_mov_b32_e32 v9, v7
	s_waitcnt vmcnt(1)
	ds_store_b32 v3, v10
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v10, s9, v6
	s_add_i32 s9, s9, 4
	ds_load_b32 v11, v9
	ds_load_b32 v10, v10
	v_add_nc_u32_e32 v9, 0x80, v9
	s_cmpk_eq_i32 s9, 0x80
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, v10, v11
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, s3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %Flow54
	v_mad_u64_u32 v[5:6], null, s2, v4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[0:1], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22tiled_parallel_computePfS_S_i
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z22tiled_parallel_computePfS_S_i, .Lfunc_end0-_Z22tiled_parallel_computePfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16parallel_computePfS_S_i ; -- Begin function _Z16parallel_computePfS_S_i
	.globl	_Z16parallel_computePfS_S_i
	.p2align	8
	.type	_Z16parallel_computePfS_S_i,@function
_Z16parallel_computePfS_S_i:            ; @_Z16parallel_computePfS_S_i
; %bb.0:
	s_load_b32 s9, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v5, s15, 5, v1
	v_lshl_add_u32 v0, s14, 5, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, 10
	s_mul_i32 s3, s9, 20
	v_cmp_gt_i32_e32 vcc_lo, s8, v5
	v_cmp_gt_i32_e64 s2, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB1_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s9, 1
	s_cbranch_scc1 .LBB1_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v1, s8, v5
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v3, v0
	s_max_i32 s2, s8, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s2, 0
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_nc_u32_e32 v3, s3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v4, v[1:2], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v4, v7
	s_cbranch_scc0 .LBB1_3
	s_branch .LBB1_5
.LBB1_4:
	v_mov_b32_e32 v6, 0
.LBB1_5:                                ; %Flow46
	v_mad_u64_u32 v[1:2], null, s3, v5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16parallel_computePfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16parallel_computePfS_S_i, .Lfunc_end1-_Z16parallel_computePfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z22tiled_parallel_computePfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z22tiled_parallel_computePfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16parallel_computePfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16parallel_computePfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
