/*
   Author: Azali Saudi
   Email : azali@ums.edu.my
   Date Created : 3 March 2018
   Last Modified: 4 March 2018

   Task: The Kernal to solve Laplace's equation.
*/

#include <stdio.h>
#include <cuda_runtime.h>

extern "C"
__global__ void kjacobi(int Nx, int Ny, double *a, double *b) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
      b[i] = 0.25 * (a[c-1+r*Nx] + a[c+1+r*Nx] + a[c+(r-1)*Nx] + a[c+(r+1)*Nx]);
}

extern "C"
__global__ void kredjor(int Nx, int Ny, double *a, double *b, double w) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
   if((c+r) % 2 == 0)
   b[i] = w*0.25 * (a[c-1+r*Nx] + a[c+1+r*Nx] + a[c+(r-1)*Nx] + a[c+(r+1)*Nx]) +
                   (1-w)*a[i];
}

extern "C"
__global__ void kblacksor(int Nx, int Ny, double *a, double *b, double w) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
   if((c+r) % 2 == 1)
   b[i] = w*0.25 * (b[c-1+r*Nx] + b[c+1+r*Nx] + b[c+(r-1)*Nx] + b[c+(r+1)*Nx]) +
                   (1-w)*a[i];
}

extern "C"
__global__ void kredkjor(int Nx, int Ny, double *a, double *b, double w) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
   if((c+r) % 2 == 0)
   b[i] = 1.0 / (1.0 + w) *
          (w*0.25 * (a[c-1+r*Nx] + a[c+1+r*Nx] + a[c+(r-1)*Nx] + a[c+(r+1)*Nx]) + a[i]);
}

extern "C"
__global__ void kblackksor(int Nx, int Ny, double *a, double *b, double w) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
   if((c+r) % 2 == 1)
   b[i] = 1.0 / (1.0 + w) *
          (w*0.25 * (b[c-1+r*Nx] + b[c+1+r*Nx] + b[c+(r-1)*Nx] + b[c+(r+1)*Nx]) + a[i]);
}

extern "C"
__global__ void kupdate(int Nx, int Ny, double *a, double *b) 
{
   int col=blockIdx.x * blockDim.x + threadIdx.x;
   int row=blockIdx.y * blockDim.y + threadIdx.y;

   int i = col + row * Nx;
   if(col > 0 && row > 0 && col < Nx-1 && row < Ny-1)
      a[i] = b[i];
}

extern "C"
__global__ void kconverge(int Nx, int Ny, double *a, double *b, int *z, double eps) 
{
   int col=blockIdx.x * blockDim.x + threadIdx.x;
   int row=blockIdx.y * blockDim.y + threadIdx.y;

   int i = col + row * Nx;
   if(col > 0 && row > 0 && col < Nx-1 && row < Ny-1) {
      double diff = (a[i] > b[i]) ? a[i]-b[i] : b[i]-a[i];
      if(diff > eps) z[0] = 0;
   }
}

extern "C"
__global__ void kresetz(int *z)
{
   z[0] = 1;
}



// ---------------------------------------------------------------------------------------
//
// GLOBAL VARIABLES for BOTH CPU and GPU
//
// ---------------------------------------------------------------------------------------
const int Nx = 128;
const int Ny = 128;
const int Mx = 32;
const int My = 16;
const double EPS = 1e-6;

double w_sor = 1.70;
double w_ksor = -2.32;
double w_mksor = -2.22;

double *U, *V;
double *dU, *dV;
int *Z, *dZ;
dim3 dimBlock, dimGrid;

int SIZE = Nx * Ny * sizeof(double);

void (*solver)(void);
int  (*check_converge)(void);
void (*update_matrix )(void);



// ---------------------------------------------------------------------------------------
//
// CODE FOR BOTH CPU AND GPU
//
// ---------------------------------------------------------------------------------------
void setup_matrix(void)
{
   // Initialize boundary conditions
   for(int x=0; x < Nx; x++) {
     U[x+0*Nx] = U[x+(Ny-1)*Nx] = 1.0;
     V[x+0*Nx] = V[x+(Ny-1)*Nx] = 1.0;
   }
   for(int y=0; y < Ny; y++) {
     U[0+y*Nx] = U[(Nx-1)+y*Nx] = 1.0;
     V[0+y*Nx] = V[(Nx-1)+y*Nx] = 1.0;
   }

   // Intialize inner nodes to zeros
   for(int y=1; y < Ny-1; y++)
     for(int x=1; x < Nx-1; x++)
       U[x+y*Nx] = V[x+y*Nx] = 0.0;
}

void save_matrix(void)
{
   FILE *f = fopen("m.dat", "w");
   for(int j=0; j < Ny; j++) {
     for(int i=0; i < Nx; i++)
       fprintf(f, "%f ", U[i+j*Nx]);
     fprintf(f, "\n");
   }
}

void display_log(char* me, int k, float t)
{
   printf(">>> CPU %s\n", me);
   printf("Size: %d x %d\n", Nx, Ny);
   printf("Number of iteration: %d\n", k);
   printf("CPU time: %.5f\n", t);
}


// ---------------------------------------------------------------------------------------
//
// GPU WRAPPER START HERE
//
// ---------------------------------------------------------------------------------------
void gpu_jacobi(void)
{
   kjacobi<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV);
}

void gpu_gs(void)
{
   kredjor  <<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, 1.0);
   kblacksor<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, 1.0);
}

void gpu_sor(void)
{
   kredjor  <<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_sor);
   kblacksor<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_sor);
}

void gpu_ksor(void)
{
   kredkjor  <<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_ksor);
   kblackksor<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_ksor);
}

void gpu_mksor(void)
{
   kredkjor  <<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_ksor);
   kblackksor<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_mksor);
}

int gpu_check_converge(void)
{
   kresetz<<<1,1>>>(dZ);
   kconverge<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV,dZ,EPS);
   cudaMemcpy(Z, dZ, 2*sizeof(int), cudaMemcpyDeviceToHost);

   return Z[0];
}

void gpu_update_matrix(void)
{
     kupdate<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV);
}

void setup_gpu(void)
{
   cudaMalloc((void**)&dU, SIZE);
   cudaMalloc((void**)&dV, SIZE);
   cudaMalloc((void**)&dZ, 2 * sizeof(int));

   dimBlock.x = Mx; 
   dimBlock.y = My;
   dimBlock.z = 1;
   dimGrid.x = (int)ceil(Nx/dimBlock.x);
   dimGrid.y = (int)ceil(Ny/dimBlock.y);
   dimGrid.z = 1;

   cudaMemcpy(dU, U, SIZE, cudaMemcpyHostToDevice);
   cudaMemcpy(dV, V, SIZE, cudaMemcpyHostToDevice);
   cudaMemcpy(dZ, Z, 2*sizeof(int), cudaMemcpyHostToDevice);
}

void free_gpu(void)
{
   cudaFree(dU);
   cudaFree(dV);
   cudaFree(dZ);
}






// ---------------------------------------------------------------------------------------
//
// CPU CODE START HERE
//
// ---------------------------------------------------------------------------------------

int cpu_check_converge(void)
{
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++) {
      int i = x+y*Nx;
      double diff = (U[i] > V[i]) ? U[i]-V[i] : V[i]-U[i];
      if(diff > EPS) return 0;
   }
   return 1;
}

void cpu_update_matrix(void)
{
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++) 
      U[x+y*Nx] = V[x+y*Nx];
}

void cpu_jacobi(void)
{
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      V[x+y*Nx] = 0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]);
}

void cpu_gs(void)
{
   double w = 1.0;
   // RED nodes
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 0)
      V[x+y*Nx] = w*0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]) + (1-w)*U[x+y*Nx];
   // BLACK nodes   
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 1)
      V[x+y*Nx] = w*0.25 * (V[x-1+y*Nx] + V[x+1+y*Nx] + V[x+(y-1)*Nx] + V[x+(y+1)*Nx]) + (1-w)*U[x+y*Nx];
}

void cpu_sor(void)
{
   double w = w_sor;
   // RED nodes
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 0)
      V[x+y*Nx] = w*0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]) + (1-w)*U[x+y*Nx];
   // BLACK nodes   
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 1)
      V[x+y*Nx] = w*0.25 * (V[x-1+y*Nx] + V[x+1+y*Nx] + V[x+(y-1)*Nx] + V[x+(y+1)*Nx]) + (1-w)*U[x+y*Nx];
}

void cpu_ksor(void)
{
   double w = w_ksor;
   // RED nodes
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 0)
      V[x+y*Nx] = 1.0 / (1.0 + w) * (w*0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]) + U[x+y*Nx]);
   // BLACK nodes   
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 1)
      V[x+y*Nx] = 1.0 / (1.0 + w) * (w*0.25 * (V[x-1+y*Nx] + V[x+1+y*Nx] + V[x+(y-1)*Nx] + V[x+(y+1)*Nx]) + U[x+y*Nx]);
}

void cpu_mksor(void)
{
   double w = w_ksor;
   double wm = w_mksor;
   // RED nodes
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 0)
      V[x+y*Nx] = 1.0 / (1.0 + w) * (w*0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]) + U[x+y*Nx]);
   // BLACK nodes   
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 1)
      V[x+y*Nx] = 1.0 / (1.0 + wm) * (wm*0.25 * (V[x-1+y*Nx] + V[x+1+y*Nx] + V[x+(y-1)*Nx] + V[x+(y+1)*Nx]) + U[x+y*Nx]);
}



void set_solver(char *p, char *q)
{
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "jacobi") == 0)) {
      solver = &gpu_jacobi;
   } else
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "gs") == 0)) {
      solver = &gpu_gs;
   } else
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "sor") == 0)) {
      solver = &gpu_sor;
   } else   
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "ksor") == 0)) {
      solver = &gpu_ksor;
   } else
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "mksor") == 0)) {
      solver = &gpu_mksor;
   }   
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "jacobi") == 0)) {
      solver = &cpu_jacobi;
   } else
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "gs") == 0)) {
      solver = &cpu_gs;
   } else
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "sor") == 0)) {
      solver = &cpu_sor;
   } else   
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "ksor") == 0)) {
      solver = &cpu_ksor;
   } else
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "mksor") == 0)) {
      solver = &cpu_mksor;
   }   
}

// ---------------------------------------------------------------------------------------
//
// THE MAIN PROGRAM START HERE
//
// ---------------------------------------------------------------------------------------
int main(int argc, char** argv)
{
   if(argc <= 1) {
      printf("Help: laplace cpu|gpu jacobi|gs|sor|ksor|mksor\n");
      exit(0);
   }
   
   U = (double *) malloc(SIZE);
   V = (double *) malloc(SIZE);
   Z = (int *) malloc(2 * sizeof(int)); 
   
   setup_matrix();
   set_solver(argv[1], argv[2]);  
   if(strcmp(argv[1], "gpu") == 0) {
      setup_gpu();
      check_converge = &gpu_check_converge;
      update_matrix = &gpu_update_matrix;
   } else
   if(strcmp(argv[1], "cpu") == 0) {
      check_converge = &cpu_check_converge;
      update_matrix = &cpu_update_matrix;
   }   

   cudaEvent_t start, stop;
   cudaEventCreate(&start);
   cudaEventCreate(&stop);
   // start timer
   cudaEventRecord(start,0);

   int iter = 0;
   do {
     solver();
     Z[0] = check_converge();
     update_matrix();

     iter++;
     if(iter % 100 == 0) printf("%d\n", iter);
   } while(Z[0] == 0);
   
   if(strcmp(argv[1], "gpu") == 0) {
      cudaMemcpy(U, dU, SIZE, cudaMemcpyDeviceToHost);
   }

   // stop timer
   cudaEventRecord(stop,0);
   cudaEventSynchronize(stop);
   float cputime;
   cudaEventElapsedTime(&cputime, start, stop);

   save_matrix();
   display_log(argv[1], iter, cputime/1000.0);

   free(U);
   free(V);
   free(Z);
   
   return 0;
}

	.file	"tmpxft_0037dd49_00000000-6_laplace.cudafe1.cpp"
	.text
#APP

#NO_APP
	.globl	_Z18cpu_check_convergev
	.type	_Z18cpu_check_convergev, @function
_Z18cpu_check_convergev:
.LFB2039:
	.cfi_startproc
	endbr64
	movq	U(%rip), %rsi
	movq	V(%rip), %rdi
	movl	$1024, %edx
	movsd	.LC0(%rip), %xmm3
.L2:
	movq	%rdx, %rax
	movl	$1, %ecx
.L7:
	movsd	8(%rsi,%rax), %xmm0
	movsd	8(%rdi,%rax), %xmm1
	comisd	%xmm1, %xmm0
	jbe	.L12
	movaps	%xmm0, %xmm2
	subsd	%xmm1, %xmm2
	jmp	.L5
.L12:
	subsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm2
.L5:
	comisd	%xmm3, %xmm2
	ja	.L8
	incl	%ecx
	addq	$8, %rax
	cmpl	$127, %ecx
	jne	.L7
	addq	$1024, %rdx
	cmpq	$130048, %rdx
	jne	.L2
	movl	$1, %eax
	ret
.L8:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE2039:
	.size	_Z18cpu_check_convergev, .-_Z18cpu_check_convergev
	.globl	_Z17cpu_update_matrixv
	.type	_Z17cpu_update_matrixv, @function
_Z17cpu_update_matrixv:
.LFB2040:
	.cfi_startproc
	endbr64
	movq	V(%rip), %rsi
	movq	U(%rip), %rdi
	movl	$1024, %edx
.L15:
	movq	%rdx, %rax
	movl	$1, %ecx
.L16:
	movsd	8(%rsi,%rax), %xmm0
	incl	%ecx
	movsd	%xmm0, 8(%rdi,%rax)
	addq	$8, %rax
	cmpl	$127, %ecx
	jne	.L16
	addq	$1024, %rdx
	cmpq	$130048, %rdx
	jne	.L15
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z17cpu_update_matrixv, .-_Z17cpu_update_matrixv
	.globl	_Z10cpu_jacobiv
	.type	_Z10cpu_jacobiv, @function
_Z10cpu_jacobiv:
.LFB2041:
	.cfi_startproc
	endbr64
	movq	U(%rip), %rdx
	movl	$128, %edi
	movl	$1024, %esi
	movq	V(%rip), %r8
	movsd	.LC1(%rip), %xmm1
.L20:
	subl	$-128, %edi
	movq	%rsi, %rax
	movl	$1, %ecx
.L21:
	movsd	(%rdx,%rax), %xmm0
	addsd	16(%rdx,%rax), %xmm0
	incl	%ecx
	addsd	-1016(%rdx,%rax), %xmm0
	addsd	1032(%rdx,%rax), %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, 8(%r8,%rax)
	addq	$8, %rax
	cmpl	$127, %ecx
	jne	.L21
	addq	$1024, %rsi
	cmpl	$16256, %edi
	jne	.L20
	ret
	.cfi_endproc
.LFE2041:
	.size	_Z10cpu_jacobiv, .-_Z10cpu_jacobiv
	.globl	_Z6cpu_gsv
	.type	_Z6cpu_gsv, @function
_Z6cpu_gsv:
.LFB2042:
	.cfi_startproc
	endbr64
	movq	U(%rip), %rdx
	movq	V(%rip), %rcx
	movl	$1, %esi
	xorps	%xmm2, %xmm2
	movsd	.LC1(%rip), %xmm1
.L25:
	movl	%esi, %eax
	movl	$1, %edi
	sall	$7, %eax
.L27:
	leal	(%rdi,%rsi), %r8d
	incl	%edi
	leal	1(%rax), %r9d
	andl	$1, %r8d
	jne	.L26
	leal	2(%rax), %r8d
	movslq	%eax, %r11
	movslq	%r9d, %r10
	movslq	%r8d, %r8
	movsd	(%rdx,%r10,8), %xmm3
	movsd	(%rdx,%r8,8), %xmm0
	leal	-127(%rax), %r8d
	addl	$129, %eax
	addsd	(%rdx,%r11,8), %xmm0
	mulsd	%xmm2, %xmm3
	movslq	%r8d, %r8
	cltq
	addsd	(%rdx,%r8,8), %xmm0
	addsd	(%rdx,%rax,8), %xmm0
	mulsd	%xmm1, %xmm0
	addsd	%xmm3, %xmm0
	movsd	%xmm0, (%rcx,%r10,8)
.L26:
	movl	%r9d, %eax
	cmpl	$127, %edi
	jne	.L27
	incl	%esi
	cmpl	$127, %esi
	jne	.L25
	movsd	.LC1(%rip), %xmm1
	movl	$1, %esi
	xorps	%xmm2, %xmm2
.L28:
	movl	%esi, %eax
	movl	$1, %edi
	sall	$7, %eax
.L30:
	leal	(%rdi,%rsi), %r8d
	incl	%edi
	leal	1(%rax), %r9d
	andl	$1, %r8d
	je	.L29
	leal	2(%rax), %r8d
	movslq	%eax, %r11
	movslq	%r9d, %r10
	movslq	%r8d, %r8
	movsd	(%rdx,%r10,8), %xmm3
	movsd	(%rcx,%r8,8), %xmm0
	leal	-127(%rax), %r8d
	addl	$129, %eax
	addsd	(%rcx,%r11,8), %xmm0
	mulsd	%xmm2, %xmm3
	movslq	%r8d, %r8
	cltq
	addsd	(%rcx,%r8,8), %xmm0
	addsd	(%rcx,%rax,8), %xmm0
	mulsd	%xmm1, %xmm0
	addsd	%xmm3, %xmm0
	movsd	%xmm0, (%rcx,%r10,8)
.L29:
	movl	%r9d, %eax
	cmpl	$127, %edi
	jne	.L30
	incl	%esi
	cmpl	$127, %esi
	jne	.L28
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z6cpu_gsv, .-_Z6cpu_gsv
	.globl	_Z7cpu_sorv
	.type	_Z7cpu_sorv, @function
_Z7cpu_sorv:
.LFB2043:
	.cfi_startproc
	endbr64
	movsd	w_sor(%rip), %xmm2
	movq	U(%rip), %rdx
	movl	$1, %esi
	movq	V(%rip), %rcx
	movsd	.LC1(%rip), %xmm3
	movsd	.LC3(%rip), %xmm4
.L39:
	movl	%esi, %eax
	movl	$1, %edi
	sall	$7, %eax
.L41:
	leal	(%rdi,%rsi), %r8d
	incl	%edi
	leal	1(%rax), %r9d
	andl	$1, %r8d
	jne	.L40
	leal	2(%rax), %r8d
	movaps	%xmm2, %xmm1
	movslq	%eax, %r11
	movslq	%r9d, %r10
	mulsd	%xmm3, %xmm1
	movslq	%r8d, %r8
	movsd	(%rdx,%r8,8), %xmm0
	leal	-127(%rax), %r8d
	addl	$129, %eax
	addsd	(%rdx,%r11,8), %xmm0
	movslq	%r8d, %r8
	cltq
	addsd	(%rdx,%r8,8), %xmm0
	addsd	(%rdx,%rax,8), %xmm0
	mulsd	%xmm1, %xmm0
	movaps	%xmm4, %xmm1
	subsd	%xmm2, %xmm1
	mulsd	(%rdx,%r10,8), %xmm1
	addsd	%xmm1, %xmm0
	movsd	%xmm0, (%rcx,%r10,8)
.L40:
	movl	%r9d, %eax
	cmpl	$127, %edi
	jne	.L41
	incl	%esi
	cmpl	$127, %esi
	jne	.L39
	movsd	.LC1(%rip), %xmm3
	movsd	.LC3(%rip), %xmm4
	movl	$1, %esi
.L42:
	movl	%esi, %eax
	movl	$1, %edi
	sall	$7, %eax
.L44:
	leal	(%rdi,%rsi), %r8d
	incl	%edi
	leal	1(%rax), %r9d
	andl	$1, %r8d
	je	.L43
	leal	2(%rax), %r8d
	movaps	%xmm2, %xmm1
	movslq	%eax, %r11
	movslq	%r9d, %r10
	mulsd	%xmm3, %xmm1
	movslq	%r8d, %r8
	movsd	(%rcx,%r8,8), %xmm0
	leal	-127(%rax), %r8d
	addl	$129, %eax
	addsd	(%rcx,%r11,8), %xmm0
	movslq	%r8d, %r8
	cltq
	addsd	(%rcx,%r8,8), %xmm0
	addsd	(%rcx,%rax,8), %xmm0
	mulsd	%xmm1, %xmm0
	movaps	%xmm4, %xmm1
	subsd	%xmm2, %xmm1
	mulsd	(%rdx,%r10,8), %xmm1
	addsd	%xmm1, %xmm0
	movsd	%xmm0, (%rcx,%r10,8)
.L43:
	movl	%r9d, %eax
	cmpl	$127, %edi
	jne	.L44
	incl	%esi
	cmpl	$127, %esi
	jne	.L42
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z7cpu_sorv, .-_Z7cpu_sorv
	.globl	_Z8cpu_ksorv
	.type	_Z8cpu_ksorv, @function
_Z8cpu_ksorv:
.LFB2044:
	.cfi_startproc
	endbr64
	movsd	w_ksor(%rip), %xmm1
	movq	U(%rip), %rdx
	movl	$1, %esi
	movq	V(%rip), %rcx
	movsd	.LC1(%rip), %xmm3
	movsd	.LC3(%rip), %xmm2
.L53:
	movl	%esi, %eax
	movl	$1, %edi
	sall	$7, %eax
.L55:
	leal	(%rdi,%rsi), %r8d
	incl	%edi
	leal	1(%rax), %r9d
	andl	$1, %r8d
	jne	.L54
	leal	2(%rax), %r8d
	movaps	%xmm1, %xmm4
	movslq	%eax, %r11
	movslq	%r9d, %r10
	mulsd	%xmm3, %xmm4
	movslq	%r8d, %r8
	movaps	%xmm1, %xmm5
	movsd	(%rdx,%r8,8), %xmm0
	leal	-127(%rax), %r8d
	addl	$129, %eax
	addsd	(%rdx,%r11,8), %xmm0
	movslq	%r8d, %r8
	cltq
	addsd	%xmm2, %xmm5
	addsd	(%rdx,%r8,8), %xmm0
	addsd	(%rdx,%rax,8), %xmm0
	mulsd	%xmm4, %xmm0
	movaps	%xmm2, %xmm4
	divsd	%xmm5, %xmm4
	addsd	(%rdx,%r10,8), %xmm0
	mulsd	%xmm4, %xmm0
	movsd	%xmm0, (%rcx,%r10,8)
.L54:
	movl	%r9d, %eax
	cmpl	$127, %edi
	jne	.L55
	incl	%esi
	cmpl	$127, %esi
	jne	.L53
	movsd	.LC1(%rip), %xmm3
	movsd	.LC3(%rip), %xmm2
	movl	$1, %esi
.L56:
	movl	%esi, %eax
	movl	$1, %edi
	sall	$7, %eax
.L58:
	leal	(%rdi,%rsi), %r8d
	incl	%edi
	leal	1(%rax), %r9d
	andl	$1, %r8d
	je	.L57
	leal	2(%rax), %r8d
	movaps	%xmm1, %xmm4
	movslq	%eax, %r11
	movslq	%r9d, %r10
	mulsd	%xmm3, %xmm4
	movslq	%r8d, %r8
	movaps	%xmm1, %xmm5
	movsd	(%rcx,%r8,8), %xmm0
	leal	-127(%rax), %r8d
	addl	$129, %eax
	addsd	(%rcx,%r11,8), %xmm0
	movslq	%r8d, %r8
	cltq
	addsd	%xmm2, %xmm5
	addsd	(%rcx,%r8,8), %xmm0
	addsd	(%rcx,%rax,8), %xmm0
	mulsd	%xmm4, %xmm0
	movaps	%xmm2, %xmm4
	divsd	%xmm5, %xmm4
	addsd	(%rdx,%r10,8), %xmm0
	mulsd	%xmm4, %xmm0
	movsd	%xmm0, (%rcx,%r10,8)
.L57:
	movl	%r9d, %eax
	cmpl	$127, %edi
	jne	.L58
	incl	%esi
	cmpl	$127, %esi
	jne	.L56
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z8cpu_ksorv, .-_Z8cpu_ksorv
	.globl	_Z9cpu_mksorv
	.type	_Z9cpu_mksorv, @function
_Z9cpu_mksorv:
.LFB2045:
	.cfi_startproc
	endbr64
	movsd	w_ksor(%rip), %xmm2
	movsd	w_mksor(%rip), %xmm1
	movl	$1, %esi
	movq	U(%rip), %rdx
	movq	V(%rip), %rcx
	movsd	.LC1(%rip), %xmm4
	movsd	.LC3(%rip), %xmm3
.L67:
	movl	%esi, %eax
	movl	$1, %edi
	sall	$7, %eax
.L69:
	leal	(%rdi,%rsi), %r8d
	incl	%edi
	leal	1(%rax), %r9d
	andl	$1, %r8d
	jne	.L68
	leal	2(%rax), %r8d
	movaps	%xmm2, %xmm5
	movslq	%eax, %r11
	movslq	%r9d, %r10
	mulsd	%xmm4, %xmm5
	movslq	%r8d, %r8
	movaps	%xmm2, %xmm6
	movsd	(%rdx,%r8,8), %xmm0
	leal	-127(%rax), %r8d
	addl	$129, %eax
	addsd	(%rdx,%r11,8), %xmm0
	movslq	%r8d, %r8
	cltq
	addsd	%xmm3, %xmm6
	addsd	(%rdx,%r8,8), %xmm0
	addsd	(%rdx,%rax,8), %xmm0
	mulsd	%xmm5, %xmm0
	movaps	%xmm3, %xmm5
	divsd	%xmm6, %xmm5
	addsd	(%rdx,%r10,8), %xmm0
	mulsd	%xmm5, %xmm0
	movsd	%xmm0, (%rcx,%r10,8)
.L68:
	movl	%r9d, %eax
	cmpl	$127, %edi
	jne	.L69
	incl	%esi
	cmpl	$127, %esi
	jne	.L67
	movsd	.LC1(%rip), %xmm3
	movsd	.LC3(%rip), %xmm2
	movl	$1, %esi
.L70:
	movl	%esi, %eax
	movl	$1, %edi
	sall	$7, %eax
.L72:
	leal	(%rdi,%rsi), %r8d
	incl	%edi
	leal	1(%rax), %r9d
	andl	$1, %r8d
	je	.L71
	leal	2(%rax), %r8d
	movaps	%xmm1, %xmm4
	movslq	%eax, %r11
	movslq	%r9d, %r10
	mulsd	%xmm3, %xmm4
	movslq	%r8d, %r8
	movaps	%xmm1, %xmm5
	movsd	(%rcx,%r8,8), %xmm0
	leal	-127(%rax), %r8d
	addl	$129, %eax
	addsd	(%rcx,%r11,8), %xmm0
	movslq	%r8d, %r8
	cltq
	addsd	%xmm2, %xmm5
	addsd	(%rcx,%r8,8), %xmm0
	addsd	(%rcx,%rax,8), %xmm0
	mulsd	%xmm4, %xmm0
	movaps	%xmm2, %xmm4
	divsd	%xmm5, %xmm4
	addsd	(%rdx,%r10,8), %xmm0
	mulsd	%xmm4, %xmm0
	movsd	%xmm0, (%rcx,%r10,8)
.L71:
	movl	%r9d, %eax
	cmpl	$127, %edi
	jne	.L72
	incl	%esi
	cmpl	$127, %esi
	jne	.L70
	ret
	.cfi_endproc
.LFE2045:
	.size	_Z9cpu_mksorv, .-_Z9cpu_mksorv
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2050:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2050:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12setup_matrixv
	.type	_Z12setup_matrixv, @function
_Z12setup_matrixv:
.LFB2027:
	.cfi_startproc
	endbr64
	movq	U(%rip), %rdx
	movq	V(%rip), %r8
	xorl	%eax, %eax
	movsd	.LC3(%rip), %xmm0
.L82:
	movsd	%xmm0, 130048(%rdx,%rax)
	movsd	%xmm0, (%rdx,%rax)
	movsd	%xmm0, 130048(%r8,%rax)
	movsd	%xmm0, (%r8,%rax)
	addq	$8, %rax
	cmpq	$1024, %rax
	jne	.L82
	xorl	%eax, %eax
.L83:
	movsd	%xmm0, 1016(%rdx,%rax)
	movsd	%xmm0, (%rdx,%rax)
	movsd	%xmm0, 1016(%r8,%rax)
	movsd	%xmm0, (%r8,%rax)
	addq	$1024, %rax
	cmpq	$131072, %rax
	jne	.L83
	movq	$-8, %r11
	leaq	1032(%rdx), %rsi
	movl	$128, %r10d
	xorl	%eax, %eax
	leaq	1032(%r8), %r9
	subq	%rdx, %r11
.L84:
	leaq	1008(%r9), %rcx
	cmpq	%rcx, %rsi
	jb	.L94
.L88:
	movl	$252, %ecx
	movq	%r9, %rdi
	rep stosl
	movl	$252, %ecx
	movq	%rsi, %rdi
	rep stosl
.L86:
	subl	$-128, %r10d
	addq	$1024, %rsi
	addq	$1024, %r9
	cmpl	$16256, %r10d
	jne	.L84
	ret
.L94:
	leaq	1008(%rsi), %rcx
	cmpq	%rcx, %r9
	jnb	.L88
	leaq	(%r11,%rsi), %rcx
	movl	$1, %edi
.L85:
	movq	$0x000000000, 8(%r8,%rcx)
	incl	%edi
	movq	$0x000000000, 8(%rdx,%rcx)
	addq	$8, %rcx
	cmpl	$127, %edi
	jne	.L85
	jmp	.L86
	.cfi_endproc
.LFE2027:
	.size	_Z12setup_matrixv, .-_Z12setup_matrixv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"w"
.LC5:
	.string	"m.dat"
.LC6:
	.string	"%f "
.LC7:
	.string	"\n"
	.text
	.globl	_Z11save_matrixv
	.type	_Z11save_matrixv, @function
_Z11save_matrixv:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC4(%rip), %rsi
	leaq	.LC5(%rip), %rdi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	.LC6(%rip), %r14
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	fopen@PLT
	movq	%rax, %r12
.L96:
	movq	%rbp, %r13
	xorl	%ebx, %ebx
	salq	$10, %r13
.L97:
	leaq	0(,%rbx,8), %rax
	addq	U(%rip), %rax
	movq	%r14, %rdx
	movq	%r12, %rdi
	movsd	(%rax,%r13), %xmm0
	movl	$2, %esi
	movb	$1, %al
	incq	%rbx
	call	__fprintf_chk@PLT
	cmpq	$128, %rbx
	jne	.L97
	leaq	.LC7(%rip), %rdx
	movq	%r12, %rdi
	xorl	%eax, %eax
	incq	%rbp
	movl	$2, %esi
	call	__fprintf_chk@PLT
	cmpq	$128, %rbp
	jne	.L96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11save_matrixv, .-_Z11save_matrixv
	.section	.rodata.str1.1
.LC8:
	.string	">>> CPU %s\n"
.LC9:
	.string	"Size: %d x %d\n"
.LC10:
	.string	"Number of iteration: %d\n"
.LC11:
	.string	"CPU time: %.5f\n"
	.text
	.globl	_Z11display_logPcif
	.type	_Z11display_logPcif, @function
_Z11display_logPcif:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rdx
	movl	%esi, %ebx
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movss	%xmm0, 12(%rsp)
	call	__printf_chk@PLT
	movl	$128, %ecx
	movl	$128, %edx
	xorl	%eax, %eax
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	%ebx, %edx
	leaq	.LC10(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movss	12(%rsp), %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	movl	$2, %edi
	leaq	.LC11(%rip), %rsi
	movb	$1, %al
	popq	%rbx
	.cfi_def_cfa_offset 8
	cvtss2sd	%xmm0, %xmm0
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z11display_logPcif, .-_Z11display_logPcif
	.globl	_Z9setup_gpuv
	.type	_Z9setup_gpuv, @function
_Z9setup_gpuv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movslq	SIZE(%rip), %rsi
	leaq	dU(%rip), %rdi
	call	cudaMalloc@PLT
	movslq	SIZE(%rip), %rsi
	leaq	dV(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$8, %esi
	leaq	dZ(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$2147483649, %eax
	movslq	SIZE(%rip), %rdx
	movq	U(%rip), %rsi
	movq	dU(%rip), %rdi
	salq	$5, %rax
	movl	$1, %ecx
	movl	$1, 8+dimBlock(%rip)
	movq	%rax, dimBlock(%rip)
	movabsq	$34359738372, %rax
	movq	%rax, dimGrid(%rip)
	movl	$1, 8+dimGrid(%rip)
	call	cudaMemcpy@PLT
	movslq	SIZE(%rip), %rdx
	movl	$1, %ecx
	movq	V(%rip), %rsi
	movq	dV(%rip), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$8, %edx
	movq	Z(%rip), %rsi
	movq	dZ(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2037:
	.size	_Z9setup_gpuv, .-_Z9setup_gpuv
	.globl	_Z8free_gpuv
	.type	_Z8free_gpuv, @function
_Z8free_gpuv:
.LFB2038:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dU(%rip), %rdi
	call	cudaFree@PLT
	movq	dV(%rip), %rdi
	call	cudaFree@PLT
	movq	dZ(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2038:
	.size	_Z8free_gpuv, .-_Z8free_gpuv
	.section	.rodata.str1.1
.LC12:
	.string	"gpu"
.LC13:
	.string	"jacobi"
.LC14:
	.string	"gs"
.LC15:
	.string	"sor"
.LC16:
	.string	"ksor"
.LC17:
	.string	"mksor"
.LC18:
	.string	"cpu"
	.text
	.globl	_Z10set_solverPcS_
	.type	_Z10set_solverPcS_, @function
_Z10set_solverPcS_:
.LFB2046:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	leaq	.LC12(%rip), %rsi
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L108
	leaq	.LC13(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L109
	leaq	_Z10gpu_jacobiv(%rip), %rax
	jmp	.L119
.L109:
	leaq	.LC14(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L110
	leaq	_Z6gpu_gsv(%rip), %rax
	jmp	.L119
.L110:
	leaq	.LC15(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L111
	leaq	_Z7gpu_sorv(%rip), %rax
	jmp	.L119
.L111:
	leaq	.LC16(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L112
	leaq	_Z8gpu_ksorv(%rip), %rax
	jmp	.L119
.L112:
	leaq	.LC17(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L108
	leaq	_Z9gpu_mksorv(%rip), %rax
.L119:
	movq	%rax, solver(%rip)
.L108:
	leaq	.LC18(%rip), %rsi
	movq	%rbp, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L107
	leaq	.LC13(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L114
	leaq	_Z10cpu_jacobiv(%rip), %rax
	jmp	.L120
.L114:
	leaq	.LC14(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L115
	leaq	_Z6cpu_gsv(%rip), %rax
	jmp	.L120
.L115:
	leaq	.LC15(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L116
	leaq	_Z7cpu_sorv(%rip), %rax
	jmp	.L120
.L116:
	leaq	.LC16(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L117
	leaq	_Z8cpu_ksorv(%rip), %rax
	jmp	.L120
.L117:
	leaq	.LC17(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L107
	leaq	_Z9cpu_mksorv(%rip), %rax
.L120:
	movq	%rax, solver(%rip)
.L107:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2046:
	.size	_Z10set_solverPcS_, .-_Z10set_solverPcS_
	.section	.rodata.str1.1
.LC19:
	.string	"Help: laplace cpu|gpu jacobi|gs|sor|ksor|mksor\n"
.LC20:
	.string	"%d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2047:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L122
	movl	$2, %edi
	leaq	.LC19(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L122:
	movslq	SIZE(%rip), %rbx
	movq	%rsi, %rbp
	leaq	.LC12(%rip), %r12
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, U(%rip)
	call	malloc@PLT
	movl	$8, %edi
	movq	%rax, V(%rip)
	call	malloc@PLT
	movq	%rax, Z(%rip)
	call	_Z12setup_matrixv
	movq	8(%rbp), %rbx
	movq	16(%rbp), %rsi
	movq	%rbx, %rdi
	call	_Z10set_solverPcS_
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L123
	call	_Z9setup_gpuv
	leaq	_Z18gpu_check_convergev(%rip), %rax
	movq	%rax, check_converge(%rip)
	leaq	_Z17gpu_update_matrixv(%rip), %rax
	jmp	.L131
.L123:
	leaq	.LC18(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L124
	leaq	_Z18cpu_check_convergev(%rip), %rax
	movq	%rax, check_converge(%rip)
	leaq	_Z17cpu_update_matrixv(%rip), %rax
.L131:
	movq	%rax, update_matrix(%rip)
.L124:
	leaq	8(%rsp), %rdi
	xorl	%ebx, %ebx
	leaq	.LC20(%rip), %r13
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L126:
	call	*solver(%rip)
	movq	Z(%rip), %r14
	incl	%ebx
	call	*check_converge(%rip)
	movl	%eax, (%r14)
	call	*update_matrix(%rip)
	movl	%ebx, %eax
	movl	$100, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L125
	movl	%ebx, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L125:
	movq	Z(%rip), %rax
	cmpl	$0, (%rax)
	je	.L126
	movq	8(%rbp), %rdi
	movq	%r12, %rsi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L127
	movslq	SIZE(%rip), %rdx
	movq	dU(%rip), %rsi
	movl	$2, %ecx
	movq	U(%rip), %rdi
	call	cudaMemcpy@PLT
.L127:
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	call	_Z11save_matrixv
	movq	8(%rbp), %rdi
	movl	%ebx, %esi
	movss	4(%rsp), %xmm0
	divss	.LC21(%rip), %xmm0
	call	_Z11display_logPcif
	movq	U(%rip), %rdi
	call	free@PLT
	movq	V(%rip), %rdi
	call	free@PLT
	movq	Z(%rip), %rdi
	call	free@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L128
	call	__stack_chk_fail@PLT
.L128:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2047:
	.size	main, .-main
	.text
	.globl	_Z30__device_stub__Z7kjacobiiiPdS_iiPdS_
	.type	_Z30__device_stub__Z7kjacobiiiPdS_iiPdS_, @function
_Z30__device_stub__Z7kjacobiiiPdS_iiPdS_:
.LFB2072:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L132
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	kjacobi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L132:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L134
	call	__stack_chk_fail@PLT
.L134:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2072:
	.size	_Z30__device_stub__Z7kjacobiiiPdS_iiPdS_, .-_Z30__device_stub__Z7kjacobiiiPdS_iiPdS_
	.globl	kjacobi
	.type	kjacobi, @function
kjacobi:
.LFB2073:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7kjacobiiiPdS_iiPdS_
	.cfi_endproc
.LFE2073:
	.size	kjacobi, .-kjacobi
	.globl	_Z10gpu_jacobiv
	.type	_Z10gpu_jacobiv, @function
_Z10gpu_jacobiv:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r9
	.cfi_def_cfa_offset 16
	movl	8+dimBlock(%rip), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimBlock(%rip), %rdx
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L137
	movq	dV(%rip), %rcx
	movl	$128, %esi
	movl	$128, %edi
	movq	dU(%rip), %rdx
	popq	%r8
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_Z30__device_stub__Z7kjacobiiiPdS_iiPdS_
.L137:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z10gpu_jacobiv, .-_Z10gpu_jacobiv
	.globl	_Z31__device_stub__Z7kredjoriiPdS_diiPdS_d
	.type	_Z31__device_stub__Z7kredjoriiPdS_diiPdS_d, @function
_Z31__device_stub__Z7kredjoriiPdS_diiPdS_d:
.LFB2074:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L140
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	kredjor(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L140:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L142
	call	__stack_chk_fail@PLT
.L142:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2074:
	.size	_Z31__device_stub__Z7kredjoriiPdS_diiPdS_d, .-_Z31__device_stub__Z7kredjoriiPdS_diiPdS_d
	.globl	kredjor
	.type	kredjor, @function
kredjor:
.LFB2075:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7kredjoriiPdS_diiPdS_d
	.cfi_endproc
.LFE2075:
	.size	kredjor, .-kredjor
	.globl	_Z33__device_stub__Z9kblacksoriiPdS_diiPdS_d
	.type	_Z33__device_stub__Z9kblacksoriiPdS_diiPdS_d, @function
_Z33__device_stub__Z9kblacksoriiPdS_diiPdS_d:
.LFB2076:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L145
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	kblacksor(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L145:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L147
	call	__stack_chk_fail@PLT
.L147:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2076:
	.size	_Z33__device_stub__Z9kblacksoriiPdS_diiPdS_d, .-_Z33__device_stub__Z9kblacksoriiPdS_diiPdS_d
	.globl	kblacksor
	.type	kblacksor, @function
kblacksor:
.LFB2077:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9kblacksoriiPdS_diiPdS_d
	.cfi_endproc
.LFE2077:
	.size	kblacksor, .-kblacksor
	.globl	_Z6gpu_gsv
	.type	_Z6gpu_gsv, @function
_Z6gpu_gsv:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r9
	.cfi_def_cfa_offset 16
	movl	8+dimBlock(%rip), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimBlock(%rip), %rdx
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L151
	movsd	.LC3(%rip), %xmm0
	movl	$128, %esi
	movl	$128, %edi
	movq	dV(%rip), %rcx
	movq	dU(%rip), %rdx
	call	_Z31__device_stub__Z7kredjoriiPdS_diiPdS_d
.L151:
	movl	8+dimBlock(%rip), %ecx
	movq	dimBlock(%rip), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L150
	movsd	.LC3(%rip), %xmm0
	movl	$128, %esi
	movl	$128, %edi
	movq	dV(%rip), %rcx
	movq	dU(%rip), %rdx
	popq	%r8
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_Z33__device_stub__Z9kblacksoriiPdS_diiPdS_d
.L150:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z6gpu_gsv, .-_Z6gpu_gsv
	.globl	_Z7gpu_sorv
	.type	_Z7gpu_sorv, @function
_Z7gpu_sorv:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r9
	.cfi_def_cfa_offset 16
	movl	8+dimBlock(%rip), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimBlock(%rip), %rdx
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L155
	movsd	w_sor(%rip), %xmm0
	movl	$128, %esi
	movl	$128, %edi
	movq	dV(%rip), %rcx
	movq	dU(%rip), %rdx
	call	_Z31__device_stub__Z7kredjoriiPdS_diiPdS_d
.L155:
	movl	8+dimBlock(%rip), %ecx
	movq	dimBlock(%rip), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L154
	movsd	w_sor(%rip), %xmm0
	movl	$128, %esi
	movl	$128, %edi
	movq	dV(%rip), %rcx
	movq	dU(%rip), %rdx
	popq	%r8
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_Z33__device_stub__Z9kblacksoriiPdS_diiPdS_d
.L154:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z7gpu_sorv, .-_Z7gpu_sorv
	.globl	_Z32__device_stub__Z8kredkjoriiPdS_diiPdS_d
	.type	_Z32__device_stub__Z8kredkjoriiPdS_diiPdS_d, @function
_Z32__device_stub__Z8kredkjoriiPdS_diiPdS_d:
.LFB2078:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L158
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	kredkjor(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L158:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L160
	call	__stack_chk_fail@PLT
.L160:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2078:
	.size	_Z32__device_stub__Z8kredkjoriiPdS_diiPdS_d, .-_Z32__device_stub__Z8kredkjoriiPdS_diiPdS_d
	.globl	kredkjor
	.type	kredkjor, @function
kredkjor:
.LFB2079:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z8kredkjoriiPdS_diiPdS_d
	.cfi_endproc
.LFE2079:
	.size	kredkjor, .-kredkjor
	.globl	_Z35__device_stub__Z10kblackksoriiPdS_diiPdS_d
	.type	_Z35__device_stub__Z10kblackksoriiPdS_diiPdS_d, @function
_Z35__device_stub__Z10kblackksoriiPdS_diiPdS_d:
.LFB2080:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L163
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	kblackksor(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L163:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L165
	call	__stack_chk_fail@PLT
.L165:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2080:
	.size	_Z35__device_stub__Z10kblackksoriiPdS_diiPdS_d, .-_Z35__device_stub__Z10kblackksoriiPdS_diiPdS_d
	.globl	kblackksor
	.type	kblackksor, @function
kblackksor:
.LFB2081:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10kblackksoriiPdS_diiPdS_d
	.cfi_endproc
.LFE2081:
	.size	kblackksor, .-kblackksor
	.globl	_Z8gpu_ksorv
	.type	_Z8gpu_ksorv, @function
_Z8gpu_ksorv:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r9
	.cfi_def_cfa_offset 16
	movl	8+dimBlock(%rip), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimBlock(%rip), %rdx
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L169
	movsd	w_ksor(%rip), %xmm0
	movl	$128, %esi
	movl	$128, %edi
	movq	dV(%rip), %rcx
	movq	dU(%rip), %rdx
	call	_Z32__device_stub__Z8kredkjoriiPdS_diiPdS_d
.L169:
	movl	8+dimBlock(%rip), %ecx
	movq	dimBlock(%rip), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L168
	movsd	w_ksor(%rip), %xmm0
	movl	$128, %esi
	movl	$128, %edi
	movq	dV(%rip), %rcx
	movq	dU(%rip), %rdx
	popq	%r8
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_Z35__device_stub__Z10kblackksoriiPdS_diiPdS_d
.L168:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z8gpu_ksorv, .-_Z8gpu_ksorv
	.globl	_Z9gpu_mksorv
	.type	_Z9gpu_mksorv, @function
_Z9gpu_mksorv:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r9
	.cfi_def_cfa_offset 16
	movl	8+dimBlock(%rip), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimBlock(%rip), %rdx
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L173
	movsd	w_ksor(%rip), %xmm0
	movl	$128, %esi
	movl	$128, %edi
	movq	dV(%rip), %rcx
	movq	dU(%rip), %rdx
	call	_Z32__device_stub__Z8kredkjoriiPdS_diiPdS_d
.L173:
	movl	8+dimBlock(%rip), %ecx
	movq	dimBlock(%rip), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L172
	movsd	w_mksor(%rip), %xmm0
	movl	$128, %esi
	movl	$128, %edi
	movq	dV(%rip), %rcx
	movq	dU(%rip), %rdx
	popq	%r8
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_Z35__device_stub__Z10kblackksoriiPdS_diiPdS_d
.L172:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z9gpu_mksorv, .-_Z9gpu_mksorv
	.globl	_Z30__device_stub__Z7kupdateiiPdS_iiPdS_
	.type	_Z30__device_stub__Z7kupdateiiPdS_iiPdS_, @function
_Z30__device_stub__Z7kupdateiiPdS_iiPdS_:
.LFB2082:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L176
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	kupdate(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L176:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L178
	call	__stack_chk_fail@PLT
.L178:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2082:
	.size	_Z30__device_stub__Z7kupdateiiPdS_iiPdS_, .-_Z30__device_stub__Z7kupdateiiPdS_iiPdS_
	.globl	kupdate
	.type	kupdate, @function
kupdate:
.LFB2083:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7kupdateiiPdS_iiPdS_
	.cfi_endproc
.LFE2083:
	.size	kupdate, .-kupdate
	.globl	_Z17gpu_update_matrixv
	.type	_Z17gpu_update_matrixv, @function
_Z17gpu_update_matrixv:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r9
	.cfi_def_cfa_offset 16
	movl	8+dimBlock(%rip), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimBlock(%rip), %rdx
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L181
	movq	dV(%rip), %rcx
	movl	$128, %esi
	movl	$128, %edi
	movq	dU(%rip), %rdx
	popq	%r8
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_Z30__device_stub__Z7kupdateiiPdS_iiPdS_
.L181:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z17gpu_update_matrixv, .-_Z17gpu_update_matrixv
	.globl	_Z35__device_stub__Z9kconvergeiiPdS_PidiiPdS_Pid
	.type	_Z35__device_stub__Z9kconvergeiiPdS_PidiiPdS_Pid, @function
_Z35__device_stub__Z9kconvergeiiPdS_PidiiPdS_Pid:
.LFB2084:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L184
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	kconverge(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L184:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L186
	call	__stack_chk_fail@PLT
.L186:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2084:
	.size	_Z35__device_stub__Z9kconvergeiiPdS_PidiiPdS_Pid, .-_Z35__device_stub__Z9kconvergeiiPdS_PidiiPdS_Pid
	.globl	kconverge
	.type	kconverge, @function
kconverge:
.LFB2085:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z9kconvergeiiPdS_PidiiPdS_Pid
	.cfi_endproc
.LFE2085:
	.size	kconverge, .-kconverge
	.globl	_Z26__device_stub__Z7kresetzPiPi
	.type	_Z26__device_stub__Z7kresetzPiPi, @function
_Z26__device_stub__Z7kresetzPiPi:
.LFB2086:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L189
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	kresetz(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L189:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L191
	call	__stack_chk_fail@PLT
.L191:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2086:
	.size	_Z26__device_stub__Z7kresetzPiPi, .-_Z26__device_stub__Z7kresetzPiPi
	.globl	kresetz
	.type	kresetz, @function
kresetz:
.LFB2087:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z7kresetzPiPi
	.cfi_endproc
.LFE2087:
	.size	kresetz, .-kresetz
	.globl	_Z18gpu_check_convergev
	.type	_Z18gpu_check_convergev, @function
_Z18gpu_check_convergev:
.LFB2035:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movl	$1, 28(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 20(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L195
	movq	dZ(%rip), %rdi
	call	_Z26__device_stub__Z7kresetzPiPi
.L195:
	movl	8+dimBlock(%rip), %ecx
	movq	dimBlock(%rip), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L196
	movsd	.LC0(%rip), %xmm0
	movq	dZ(%rip), %r8
	movl	$128, %esi
	movl	$128, %edi
	movq	dV(%rip), %rcx
	movq	dU(%rip), %rdx
	call	_Z35__device_stub__Z9kconvergeiiPdS_PidiiPdS_Pid
.L196:
	movq	dZ(%rip), %rsi
	movl	$2, %ecx
	movl	$8, %edx
	movq	Z(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	Z(%rip), %rax
	movl	(%rax), %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z18gpu_check_convergev, .-_Z18gpu_check_convergev
	.section	.rodata.str1.1
.LC22:
	.string	"kresetz"
.LC23:
	.string	"kconverge"
.LC24:
	.string	"kupdate"
.LC25:
	.string	"kblackksor"
.LC26:
	.string	"kredkjor"
.LC27:
	.string	"kblacksor"
.LC28:
	.string	"kredjor"
.LC29:
	.string	"kjacobi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	kresetz(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	leaq	kconverge(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	leaq	kupdate(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	leaq	kblackksor(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	movq	%rbx, %rdi
	leaq	kredkjor(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	movq	%rbx, %rdi
	leaq	kblacksor(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	movq	%rbx, %rdi
	leaq	kredjor(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	movq	%rbx, %rdi
	leaq	kjacobi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2089:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	update_matrix
	.bss
	.align 8
	.type	update_matrix, @object
	.size	update_matrix, 8
update_matrix:
	.zero	8
	.globl	check_converge
	.align 8
	.type	check_converge, @object
	.size	check_converge, 8
check_converge:
	.zero	8
	.globl	solver
	.align 8
	.type	solver, @object
	.size	solver, 8
solver:
	.zero	8
	.globl	SIZE
	.data
	.align 4
	.type	SIZE, @object
	.size	SIZE, 4
SIZE:
	.long	131072
	.globl	dimGrid
	.align 8
	.type	dimGrid, @object
	.size	dimGrid, 12
dimGrid:
	.long	1
	.long	1
	.long	1
	.globl	dimBlock
	.align 8
	.type	dimBlock, @object
	.size	dimBlock, 12
dimBlock:
	.long	1
	.long	1
	.long	1
	.globl	dZ
	.bss
	.align 8
	.type	dZ, @object
	.size	dZ, 8
dZ:
	.zero	8
	.globl	Z
	.align 8
	.type	Z, @object
	.size	Z, 8
Z:
	.zero	8
	.globl	dV
	.align 8
	.type	dV, @object
	.size	dV, 8
dV:
	.zero	8
	.globl	dU
	.align 8
	.type	dU, @object
	.size	dU, 8
dU:
	.zero	8
	.globl	V
	.align 8
	.type	V, @object
	.size	V, 8
V:
	.zero	8
	.globl	U
	.align 8
	.type	U, @object
	.size	U, 8
U:
	.zero	8
	.globl	w_mksor
	.data
	.align 8
	.type	w_mksor, @object
	.size	w_mksor, 8
w_mksor:
	.long	1546188227
	.long	-1073626481
	.globl	w_ksor
	.align 8
	.type	w_ksor, @object
	.size	w_ksor, 8
w_ksor:
	.long	687194767
	.long	-1073574052
	.globl	w_sor
	.align 8
	.type	w_sor, @object
	.size	w_sor, 8
w_sor:
	.long	858993459
	.long	1073427251
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC1:
	.long	0
	.long	1070596096
	.align 8
.LC3:
	.long	0
	.long	1072693248
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC21:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
   Author: Azali Saudi
   Email : azali@ums.edu.my
   Date Created : 3 March 2018
   Last Modified: 4 March 2018

   Task: The Kernal to solve Laplace's equation.
*/

#include <stdio.h>
#include <hip/hip_runtime.h>

extern "C"
__global__ void kjacobi(int Nx, int Ny, double *a, double *b) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
      b[i] = 0.25 * (a[c-1+r*Nx] + a[c+1+r*Nx] + a[c+(r-1)*Nx] + a[c+(r+1)*Nx]);
}

extern "C"
__global__ void kredjor(int Nx, int Ny, double *a, double *b, double w) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
   if((c+r) % 2 == 0)
   b[i] = w*0.25 * (a[c-1+r*Nx] + a[c+1+r*Nx] + a[c+(r-1)*Nx] + a[c+(r+1)*Nx]) +
                   (1-w)*a[i];
}

extern "C"
__global__ void kblacksor(int Nx, int Ny, double *a, double *b, double w) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
   if((c+r) % 2 == 1)
   b[i] = w*0.25 * (b[c-1+r*Nx] + b[c+1+r*Nx] + b[c+(r-1)*Nx] + b[c+(r+1)*Nx]) +
                   (1-w)*a[i];
}

extern "C"
__global__ void kredkjor(int Nx, int Ny, double *a, double *b, double w) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
   if((c+r) % 2 == 0)
   b[i] = 1.0 / (1.0 + w) *
          (w*0.25 * (a[c-1+r*Nx] + a[c+1+r*Nx] + a[c+(r-1)*Nx] + a[c+(r+1)*Nx]) + a[i]);
}

extern "C"
__global__ void kblackksor(int Nx, int Ny, double *a, double *b, double w) 
{
   int c=blockIdx.x * blockDim.x + threadIdx.x;
   int r=blockIdx.y * blockDim.y + threadIdx.y;

   int i = c + r * Nx;
   if(c > 0 && r > 0 && c < Nx-1 && r < Ny-1)
   if((c+r) % 2 == 1)
   b[i] = 1.0 / (1.0 + w) *
          (w*0.25 * (b[c-1+r*Nx] + b[c+1+r*Nx] + b[c+(r-1)*Nx] + b[c+(r+1)*Nx]) + a[i]);
}

extern "C"
__global__ void kupdate(int Nx, int Ny, double *a, double *b) 
{
   int col=blockIdx.x * blockDim.x + threadIdx.x;
   int row=blockIdx.y * blockDim.y + threadIdx.y;

   int i = col + row * Nx;
   if(col > 0 && row > 0 && col < Nx-1 && row < Ny-1)
      a[i] = b[i];
}

extern "C"
__global__ void kconverge(int Nx, int Ny, double *a, double *b, int *z, double eps) 
{
   int col=blockIdx.x * blockDim.x + threadIdx.x;
   int row=blockIdx.y * blockDim.y + threadIdx.y;

   int i = col + row * Nx;
   if(col > 0 && row > 0 && col < Nx-1 && row < Ny-1) {
      double diff = (a[i] > b[i]) ? a[i]-b[i] : b[i]-a[i];
      if(diff > eps) z[0] = 0;
   }
}

extern "C"
__global__ void kresetz(int *z)
{
   z[0] = 1;
}



// ---------------------------------------------------------------------------------------
//
// GLOBAL VARIABLES for BOTH CPU and GPU
//
// ---------------------------------------------------------------------------------------
const int Nx = 128;
const int Ny = 128;
const int Mx = 32;
const int My = 16;
const double EPS = 1e-6;

double w_sor = 1.70;
double w_ksor = -2.32;
double w_mksor = -2.22;

double *U, *V;
double *dU, *dV;
int *Z, *dZ;
dim3 dimBlock, dimGrid;

int SIZE = Nx * Ny * sizeof(double);

void (*solver)(void);
int  (*check_converge)(void);
void (*update_matrix )(void);



// ---------------------------------------------------------------------------------------
//
// CODE FOR BOTH CPU AND GPU
//
// ---------------------------------------------------------------------------------------
void setup_matrix(void)
{
   // Initialize boundary conditions
   for(int x=0; x < Nx; x++) {
     U[x+0*Nx] = U[x+(Ny-1)*Nx] = 1.0;
     V[x+0*Nx] = V[x+(Ny-1)*Nx] = 1.0;
   }
   for(int y=0; y < Ny; y++) {
     U[0+y*Nx] = U[(Nx-1)+y*Nx] = 1.0;
     V[0+y*Nx] = V[(Nx-1)+y*Nx] = 1.0;
   }

   // Intialize inner nodes to zeros
   for(int y=1; y < Ny-1; y++)
     for(int x=1; x < Nx-1; x++)
       U[x+y*Nx] = V[x+y*Nx] = 0.0;
}

void save_matrix(void)
{
   FILE *f = fopen("m.dat", "w");
   for(int j=0; j < Ny; j++) {
     for(int i=0; i < Nx; i++)
       fprintf(f, "%f ", U[i+j*Nx]);
     fprintf(f, "\n");
   }
}

void display_log(char* me, int k, float t)
{
   printf(">>> CPU %s\n", me);
   printf("Size: %d x %d\n", Nx, Ny);
   printf("Number of iteration: %d\n", k);
   printf("CPU time: %.5f\n", t);
}


// ---------------------------------------------------------------------------------------
//
// GPU WRAPPER START HERE
//
// ---------------------------------------------------------------------------------------
void gpu_jacobi(void)
{
   kjacobi<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV);
}

void gpu_gs(void)
{
   kredjor  <<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, 1.0);
   kblacksor<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, 1.0);
}

void gpu_sor(void)
{
   kredjor  <<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_sor);
   kblacksor<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_sor);
}

void gpu_ksor(void)
{
   kredkjor  <<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_ksor);
   kblackksor<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_ksor);
}

void gpu_mksor(void)
{
   kredkjor  <<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_ksor);
   kblackksor<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV, w_mksor);
}

int gpu_check_converge(void)
{
   kresetz<<<1,1>>>(dZ);
   kconverge<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV,dZ,EPS);
   hipMemcpy(Z, dZ, 2*sizeof(int), hipMemcpyDeviceToHost);

   return Z[0];
}

void gpu_update_matrix(void)
{
     kupdate<<<dimGrid,dimBlock>>>(Nx,Ny, dU,dV);
}

void setup_gpu(void)
{
   hipMalloc((void**)&dU, SIZE);
   hipMalloc((void**)&dV, SIZE);
   hipMalloc((void**)&dZ, 2 * sizeof(int));

   dimBlock.x = Mx; 
   dimBlock.y = My;
   dimBlock.z = 1;
   dimGrid.x = (int)ceil(Nx/dimBlock.x);
   dimGrid.y = (int)ceil(Ny/dimBlock.y);
   dimGrid.z = 1;

   hipMemcpy(dU, U, SIZE, hipMemcpyHostToDevice);
   hipMemcpy(dV, V, SIZE, hipMemcpyHostToDevice);
   hipMemcpy(dZ, Z, 2*sizeof(int), hipMemcpyHostToDevice);
}

void free_gpu(void)
{
   hipFree(dU);
   hipFree(dV);
   hipFree(dZ);
}






// ---------------------------------------------------------------------------------------
//
// CPU CODE START HERE
//
// ---------------------------------------------------------------------------------------

int cpu_check_converge(void)
{
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++) {
      int i = x+y*Nx;
      double diff = (U[i] > V[i]) ? U[i]-V[i] : V[i]-U[i];
      if(diff > EPS) return 0;
   }
   return 1;
}

void cpu_update_matrix(void)
{
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++) 
      U[x+y*Nx] = V[x+y*Nx];
}

void cpu_jacobi(void)
{
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      V[x+y*Nx] = 0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]);
}

void cpu_gs(void)
{
   double w = 1.0;
   // RED nodes
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 0)
      V[x+y*Nx] = w*0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]) + (1-w)*U[x+y*Nx];
   // BLACK nodes   
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 1)
      V[x+y*Nx] = w*0.25 * (V[x-1+y*Nx] + V[x+1+y*Nx] + V[x+(y-1)*Nx] + V[x+(y+1)*Nx]) + (1-w)*U[x+y*Nx];
}

void cpu_sor(void)
{
   double w = w_sor;
   // RED nodes
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 0)
      V[x+y*Nx] = w*0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]) + (1-w)*U[x+y*Nx];
   // BLACK nodes   
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 1)
      V[x+y*Nx] = w*0.25 * (V[x-1+y*Nx] + V[x+1+y*Nx] + V[x+(y-1)*Nx] + V[x+(y+1)*Nx]) + (1-w)*U[x+y*Nx];
}

void cpu_ksor(void)
{
   double w = w_ksor;
   // RED nodes
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 0)
      V[x+y*Nx] = 1.0 / (1.0 + w) * (w*0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]) + U[x+y*Nx]);
   // BLACK nodes   
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 1)
      V[x+y*Nx] = 1.0 / (1.0 + w) * (w*0.25 * (V[x-1+y*Nx] + V[x+1+y*Nx] + V[x+(y-1)*Nx] + V[x+(y+1)*Nx]) + U[x+y*Nx]);
}

void cpu_mksor(void)
{
   double w = w_ksor;
   double wm = w_mksor;
   // RED nodes
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 0)
      V[x+y*Nx] = 1.0 / (1.0 + w) * (w*0.25 * (U[x-1+y*Nx] + U[x+1+y*Nx] + U[x+(y-1)*Nx] + U[x+(y+1)*Nx]) + U[x+y*Nx]);
   // BLACK nodes   
   for(int y = 1; y < Ny-1; y++)
   for(int x = 1; x < Nx-1; x++)
      if((x+y) % 2 == 1)
      V[x+y*Nx] = 1.0 / (1.0 + wm) * (wm*0.25 * (V[x-1+y*Nx] + V[x+1+y*Nx] + V[x+(y-1)*Nx] + V[x+(y+1)*Nx]) + U[x+y*Nx]);
}



void set_solver(char *p, char *q)
{
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "jacobi") == 0)) {
      solver = &gpu_jacobi;
   } else
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "gs") == 0)) {
      solver = &gpu_gs;
   } else
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "sor") == 0)) {
      solver = &gpu_sor;
   } else   
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "ksor") == 0)) {
      solver = &gpu_ksor;
   } else
   if((strcmp(p, "gpu") == 0) && (strcmp(q, "mksor") == 0)) {
      solver = &gpu_mksor;
   }   
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "jacobi") == 0)) {
      solver = &cpu_jacobi;
   } else
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "gs") == 0)) {
      solver = &cpu_gs;
   } else
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "sor") == 0)) {
      solver = &cpu_sor;
   } else   
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "ksor") == 0)) {
      solver = &cpu_ksor;
   } else
   if((strcmp(p, "cpu") == 0) && (strcmp(q, "mksor") == 0)) {
      solver = &cpu_mksor;
   }   
}

// ---------------------------------------------------------------------------------------
//
// THE MAIN PROGRAM START HERE
//
// ---------------------------------------------------------------------------------------
int main(int argc, char** argv)
{
   if(argc <= 1) {
      printf("Help: laplace cpu|gpu jacobi|gs|sor|ksor|mksor\n");
      exit(0);
   }
   
   U = (double *) malloc(SIZE);
   V = (double *) malloc(SIZE);
   Z = (int *) malloc(2 * sizeof(int)); 
   
   setup_matrix();
   set_solver(argv[1], argv[2]);  
   if(strcmp(argv[1], "gpu") == 0) {
      setup_gpu();
      check_converge = &gpu_check_converge;
      update_matrix = &gpu_update_matrix;
   } else
   if(strcmp(argv[1], "cpu") == 0) {
      check_converge = &cpu_check_converge;
      update_matrix = &cpu_update_matrix;
   }   

   hipEvent_t start, stop;
   hipEventCreate(&start);
   hipEventCreate(&stop);
   // start timer
   hipEventRecord(start,0);

   int iter = 0;
   do {
     solver();
     Z[0] = check_converge();
     update_matrix();

     iter++;
     if(iter % 100 == 0) printf("%d\n", iter);
   } while(Z[0] == 0);
   
   if(strcmp(argv[1], "gpu") == 0) {
      hipMemcpy(U, dU, SIZE, hipMemcpyDeviceToHost);
   }

   // stop timer
   hipEventRecord(stop,0);
   hipEventSynchronize(stop);
   float cputime;
   hipEventElapsedTime(&cputime, start, stop);

   save_matrix();
   display_log(argv[1], iter, cputime/1000.0);

   free(U);
   free(V);
   free(Z);
   
   return 0;
}

	.text
	.file	"laplace.hip"
	.globl	__device_stub__kjacobi          # -- Begin function __device_stub__kjacobi
	.type	__device_stub__kjacobi,@function
__device_stub__kjacobi:                 # @__device_stub__kjacobi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$kjacobi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__kjacobi, .Lfunc_end0-__device_stub__kjacobi
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__kredjor          # -- Begin function __device_stub__kredjor
	.type	__device_stub__kredjor,@function
__device_stub__kredjor:                 # @__device_stub__kredjor
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$kredjor, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	__device_stub__kredjor, .Lfunc_end1-__device_stub__kredjor
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__kblacksor        # -- Begin function __device_stub__kblacksor
	.type	__device_stub__kblacksor,@function
__device_stub__kblacksor:               # @__device_stub__kblacksor
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$kblacksor, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	__device_stub__kblacksor, .Lfunc_end2-__device_stub__kblacksor
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__kredkjor         # -- Begin function __device_stub__kredkjor
	.type	__device_stub__kredkjor,@function
__device_stub__kredkjor:                # @__device_stub__kredkjor
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$kredkjor, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	__device_stub__kredkjor, .Lfunc_end3-__device_stub__kredkjor
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__kblackksor       # -- Begin function __device_stub__kblackksor
	.type	__device_stub__kblackksor,@function
__device_stub__kblackksor:              # @__device_stub__kblackksor
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$kblackksor, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	__device_stub__kblackksor, .Lfunc_end4-__device_stub__kblackksor
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__kupdate          # -- Begin function __device_stub__kupdate
	.type	__device_stub__kupdate,@function
__device_stub__kupdate:                 # @__device_stub__kupdate
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$kupdate, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	__device_stub__kupdate, .Lfunc_end5-__device_stub__kupdate
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__kconverge        # -- Begin function __device_stub__kconverge
	.type	__device_stub__kconverge,@function
__device_stub__kconverge:               # @__device_stub__kconverge
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$kconverge, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	__device_stub__kconverge, .Lfunc_end6-__device_stub__kconverge
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__kresetz          # -- Begin function __device_stub__kresetz
	.type	__device_stub__kresetz,@function
__device_stub__kresetz:                 # @__device_stub__kresetz
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$kresetz, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	__device_stub__kresetz, .Lfunc_end7-__device_stub__kresetz
	.cfi_endproc
                                        # -- End function
	.globl	_Z12setup_matrixv               # -- Begin function _Z12setup_matrixv
	.type	_Z12setup_matrixv,@function
_Z12setup_matrixv:                      # @_Z12setup_matrixv
	.cfi_startproc
# %bb.0:
	movq	U(%rip), %rax
	movq	V(%rip), %rcx
	xorl	%esi, %esi
	movabsq	$4607182418800017408, %rdx      # imm = 0x3FF0000000000000
.LBB8_1:                                # =>This Inner Loop Header: Depth=1
	movq	%rdx, 130048(%rax,%rsi,8)
	movq	%rdx, (%rax,%rsi,8)
	movq	%rdx, 130048(%rcx,%rsi,8)
	movq	%rdx, (%rcx,%rsi,8)
	incq	%rsi
	cmpq	$128, %rsi
	jne	.LBB8_1
# %bb.2:                                # %.preheader24.preheader
	xorl	%esi, %esi
.LBB8_3:                                # %.preheader24
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, 1016(%rax,%rsi)
	movq	%rdx, (%rax,%rsi)
	movq	%rdx, 1016(%rcx,%rsi)
	movq	%rdx, (%rcx,%rsi)
	addq	$1024, %rsi                     # imm = 0x400
	cmpq	$131072, %rsi                   # imm = 0x20000
	jne	.LBB8_3
# %bb.4:                                # %.preheader.preheader
	movl	$1032, %edx                     # imm = 0x408
	addq	%rdx, %rax
	addq	%rdx, %rcx
	movl	$1, %edx
	xorl	%esi, %esi
	movl	$1024, %edi                     # imm = 0x400
.LBB8_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_6 Depth 2
	xorl	%r8d, %r8d
.LBB8_6:                                #   Parent Loop BB8_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rsi, (%rcx,%r8,8)
	movq	%rsi, (%rax,%r8,8)
	incq	%r8
	cmpq	$126, %r8
	jne	.LBB8_6
# %bb.7:                                #   in Loop: Header=BB8_5 Depth=1
	incq	%rdx
	addq	%rdi, %rax
	addq	%rdi, %rcx
	cmpq	$127, %rdx
	jne	.LBB8_5
# %bb.8:
	retq
.Lfunc_end8:
	.size	_Z12setup_matrixv, .Lfunc_end8-_Z12setup_matrixv
	.cfi_endproc
                                        # -- End function
	.globl	_Z11save_matrixv                # -- Begin function _Z11save_matrixv
	.type	_Z11save_matrixv,@function
_Z11save_matrixv:                       # @_Z11save_matrixv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB9_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_2 Depth 2
	xorl	%r12d, %r12d
.LBB9_2:                                #   Parent Loop BB9_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	U(%rip), %rax
	addq	%r14, %rax
	movsd	(%rax,%r12,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r12
	cmpq	$128, %r12
	jne	.LBB9_2
# %bb.3:                                #   in Loop: Header=BB9_1 Depth=1
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	incq	%r15
	addq	$1024, %r14                     # imm = 0x400
	cmpq	$128, %r15
	jne	.LBB9_1
# %bb.4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z11save_matrixv, .Lfunc_end9-_Z11save_matrixv
	.cfi_endproc
                                        # -- End function
	.globl	_Z11display_logPcif             # -- Begin function _Z11display_logPcif
	.type	_Z11display_logPcif,@function
_Z11display_logPcif:                    # @_Z11display_logPcif
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	%esi, %ebx
	movq	%rdi, %rsi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.5, %edi
	movl	$128, %esi
	movl	$128, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.7, %edi
	movb	$1, %al
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end10:
	.size	_Z11display_logPcif, .Lfunc_end10-_Z11display_logPcif
	.cfi_endproc
                                        # -- End function
	.globl	_Z10gpu_jacobiv                 # -- Begin function _Z10gpu_jacobiv
	.type	_Z10gpu_jacobiv,@function
_Z10gpu_jacobiv:                        # @_Z10gpu_jacobiv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB11_2
# %bb.1:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB11_2:
	.cfi_def_cfa_offset 16
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movl	$128, %edi
	movl	$128, %esi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	__device_stub__kjacobi          # TAILCALL
.Lfunc_end11:
	.size	_Z10gpu_jacobiv, .Lfunc_end11-_Z10gpu_jacobiv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z6gpu_gsv
.LCPI12_0:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	_Z6gpu_gsv
	.type	_Z6gpu_gsv,@function
_Z6gpu_gsv:                             # @_Z6gpu_gsv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_2
# %bb.1:
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movsd	.LCPI12_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$128, %edi
	movl	$128, %esi
	callq	__device_stub__kredjor
.LBB12_2:
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB12_4
# %bb.3:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB12_4:
	.cfi_def_cfa_offset 16
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movsd	.LCPI12_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$128, %edi
	movl	$128, %esi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	__device_stub__kblacksor        # TAILCALL
.Lfunc_end12:
	.size	_Z6gpu_gsv, .Lfunc_end12-_Z6gpu_gsv
	.cfi_endproc
                                        # -- End function
	.globl	_Z7gpu_sorv                     # -- Begin function _Z7gpu_sorv
	.type	_Z7gpu_sorv,@function
_Z7gpu_sorv:                            # @_Z7gpu_sorv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_2
# %bb.1:
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movsd	w_sor(%rip), %xmm0              # xmm0 = mem[0],zero
	movl	$128, %edi
	movl	$128, %esi
	callq	__device_stub__kredjor
.LBB13_2:
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB13_4
# %bb.3:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB13_4:
	.cfi_def_cfa_offset 16
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movsd	w_sor(%rip), %xmm0              # xmm0 = mem[0],zero
	movl	$128, %edi
	movl	$128, %esi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	__device_stub__kblacksor        # TAILCALL
.Lfunc_end13:
	.size	_Z7gpu_sorv, .Lfunc_end13-_Z7gpu_sorv
	.cfi_endproc
                                        # -- End function
	.globl	_Z8gpu_ksorv                    # -- Begin function _Z8gpu_ksorv
	.type	_Z8gpu_ksorv,@function
_Z8gpu_ksorv:                           # @_Z8gpu_ksorv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB14_2
# %bb.1:
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movsd	w_ksor(%rip), %xmm0             # xmm0 = mem[0],zero
	movl	$128, %edi
	movl	$128, %esi
	callq	__device_stub__kredkjor
.LBB14_2:
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB14_4
# %bb.3:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB14_4:
	.cfi_def_cfa_offset 16
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movsd	w_ksor(%rip), %xmm0             # xmm0 = mem[0],zero
	movl	$128, %edi
	movl	$128, %esi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	__device_stub__kblackksor       # TAILCALL
.Lfunc_end14:
	.size	_Z8gpu_ksorv, .Lfunc_end14-_Z8gpu_ksorv
	.cfi_endproc
                                        # -- End function
	.globl	_Z9gpu_mksorv                   # -- Begin function _Z9gpu_mksorv
	.type	_Z9gpu_mksorv,@function
_Z9gpu_mksorv:                          # @_Z9gpu_mksorv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB15_2
# %bb.1:
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movsd	w_ksor(%rip), %xmm0             # xmm0 = mem[0],zero
	movl	$128, %edi
	movl	$128, %esi
	callq	__device_stub__kredkjor
.LBB15_2:
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB15_4
# %bb.3:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB15_4:
	.cfi_def_cfa_offset 16
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movsd	w_mksor(%rip), %xmm0            # xmm0 = mem[0],zero
	movl	$128, %edi
	movl	$128, %esi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	__device_stub__kblackksor       # TAILCALL
.Lfunc_end15:
	.size	_Z9gpu_mksorv, .Lfunc_end15-_Z9gpu_mksorv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z18gpu_check_convergev
.LCPI16_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z18gpu_check_convergev
	.type	_Z18gpu_check_convergev,@function
_Z18gpu_check_convergev:                # @_Z18gpu_check_convergev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB16_2
# %bb.1:
	movq	dZ(%rip), %rdi
	callq	__device_stub__kresetz
.LBB16_2:
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB16_4
# %bb.3:
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movq	dZ(%rip), %r8
	movsd	.LCPI16_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$128, %edi
	movl	$128, %esi
	callq	__device_stub__kconverge
.LBB16_4:
	movq	Z(%rip), %rdi
	movq	dZ(%rip), %rsi
	movl	$8, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	Z(%rip), %rax
	movl	(%rax), %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z18gpu_check_convergev, .Lfunc_end16-_Z18gpu_check_convergev
	.cfi_endproc
                                        # -- End function
	.globl	_Z17gpu_update_matrixv          # -- Begin function _Z17gpu_update_matrixv
	.type	_Z17gpu_update_matrixv,@function
_Z17gpu_update_matrixv:                 # @_Z17gpu_update_matrixv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB17_2
# %bb.1:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB17_2:
	.cfi_def_cfa_offset 16
	movq	dU(%rip), %rdx
	movq	dV(%rip), %rcx
	movl	$128, %edi
	movl	$128, %esi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	__device_stub__kupdate          # TAILCALL
.Lfunc_end17:
	.size	_Z17gpu_update_matrixv, .Lfunc_end17-_Z17gpu_update_matrixv
	.cfi_endproc
                                        # -- End function
	.globl	_Z9setup_gpuv                   # -- Begin function _Z9setup_gpuv
	.type	_Z9setup_gpuv,@function
_Z9setup_gpuv:                          # @_Z9setup_gpuv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movslq	SIZE(%rip), %rsi
	movl	$dU, %edi
	callq	hipMalloc
	movslq	SIZE(%rip), %rsi
	movl	$dV, %edi
	callq	hipMalloc
	movl	$dZ, %edi
	movl	$8, %esi
	callq	hipMalloc
	movabsq	$68719476768, %rax              # imm = 0x1000000020
	movq	%rax, dimBlock(%rip)
	movl	$1, %eax
	movl	%eax, dimBlock+8(%rip)
	movabsq	$34359738372, %rcx              # imm = 0x800000004
	movq	%rcx, dimGrid(%rip)
	movl	%eax, dimGrid+8(%rip)
	movq	dU(%rip), %rdi
	movq	U(%rip), %rsi
	movslq	SIZE(%rip), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dV(%rip), %rdi
	movq	V(%rip), %rsi
	movslq	SIZE(%rip), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dZ(%rip), %rdi
	movq	Z(%rip), %rsi
	movl	$8, %edx
	movl	$1, %ecx
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end18:
	.size	_Z9setup_gpuv, .Lfunc_end18-_Z9setup_gpuv
	.cfi_endproc
                                        # -- End function
	.globl	_Z8free_gpuv                    # -- Begin function _Z8free_gpuv
	.type	_Z8free_gpuv,@function
_Z8free_gpuv:                           # @_Z8free_gpuv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dU(%rip), %rdi
	callq	hipFree
	movq	dV(%rip), %rdi
	callq	hipFree
	movq	dZ(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end19:
	.size	_Z8free_gpuv, .Lfunc_end19-_Z8free_gpuv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z18cpu_check_convergev
.LCPI20_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z18cpu_check_convergev
	.type	_Z18cpu_check_convergev,@function
_Z18cpu_check_convergev:                # @_Z18cpu_check_convergev
	.cfi_startproc
# %bb.0:
	movl	$1032, %eax                     # imm = 0x408
	movq	V(%rip), %rcx
	addq	%rax, %rcx
	addq	U(%rip), %rax
	movl	$1, %edi
	xorl	%edx, %edx
	movsd	.LCPI20_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$1024, %esi                     # imm = 0x400
.LBB20_1:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB20_3 Depth 2
	xorl	%r8d, %r8d
.LBB20_3:                               #   Parent Loop BB20_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rax,%r8,8), %xmm1             # xmm1 = mem[0],zero
	movsd	(%rcx,%r8,8), %xmm2             # xmm2 = mem[0],zero
	movapd	%xmm1, %xmm3
	subsd	%xmm2, %xmm3
	movapd	%xmm2, %xmm4
	subsd	%xmm1, %xmm4
	cmpltsd	%xmm1, %xmm2
	andpd	%xmm2, %xmm3
	andnpd	%xmm4, %xmm2
	orpd	%xmm3, %xmm2
	ucomisd	%xmm0, %xmm2
	ja	.LBB20_5
# %bb.2:                                #   in Loop: Header=BB20_3 Depth=2
	incq	%r8
	cmpq	$126, %r8
	jne	.LBB20_3
# %bb.4:                                #   in Loop: Header=BB20_1 Depth=1
	cmpq	$126, %rdi
	leaq	1(%rdi), %r8
	setae	%dl
	addq	%rsi, %rcx
	addq	%rsi, %rax
	movq	%r8, %rdi
	cmpq	$127, %r8
	jne	.LBB20_1
.LBB20_5:                               # %.loopexit
	movzbl	%dl, %eax
	andl	$1, %eax
	retq
.Lfunc_end20:
	.size	_Z18cpu_check_convergev, .Lfunc_end20-_Z18cpu_check_convergev
	.cfi_endproc
                                        # -- End function
	.globl	_Z17cpu_update_matrixv          # -- Begin function _Z17cpu_update_matrixv
	.type	_Z17cpu_update_matrixv,@function
_Z17cpu_update_matrixv:                 # @_Z17cpu_update_matrixv
	.cfi_startproc
# %bb.0:
	movl	$1032, %eax                     # imm = 0x408
	movq	U(%rip), %rcx
	addq	%rax, %rcx
	addq	V(%rip), %rax
	movl	$1, %edx
	movl	$1024, %esi                     # imm = 0x400
.LBB21_1:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB21_2 Depth 2
	xorl	%edi, %edi
.LBB21_2:                               #   Parent Loop BB21_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rax,%rdi,8), %xmm0            # xmm0 = mem[0],zero
	movsd	%xmm0, (%rcx,%rdi,8)
	incq	%rdi
	cmpq	$126, %rdi
	jne	.LBB21_2
# %bb.3:                                #   in Loop: Header=BB21_1 Depth=1
	incq	%rdx
	addq	%rsi, %rcx
	addq	%rsi, %rax
	cmpq	$127, %rdx
	jne	.LBB21_1
# %bb.4:
	retq
.Lfunc_end21:
	.size	_Z17cpu_update_matrixv, .Lfunc_end21-_Z17cpu_update_matrixv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10cpu_jacobiv
.LCPI22_0:
	.quad	0x3fd0000000000000              # double 0.25
	.text
	.globl	_Z10cpu_jacobiv
	.type	_Z10cpu_jacobiv,@function
_Z10cpu_jacobiv:                        # @_Z10cpu_jacobiv
	.cfi_startproc
# %bb.0:
	movl	$2056, %eax                     # imm = 0x808
	addq	U(%rip), %rax
	movl	$1032, %ecx                     # imm = 0x408
	addq	V(%rip), %rcx
	movl	$1, %edx
	movsd	.LCPI22_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$1024, %esi                     # imm = 0x400
.LBB22_1:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB22_2 Depth 2
	xorl	%edi, %edi
.LBB22_2:                               #   Parent Loop BB22_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-1032(%rax,%rdi,8), %xmm1       # xmm1 = mem[0],zero
	addsd	-1016(%rax,%rdi,8), %xmm1
	addsd	-2048(%rax,%rdi,8), %xmm1
	addsd	(%rax,%rdi,8), %xmm1
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, (%rcx,%rdi,8)
	incq	%rdi
	cmpq	$126, %rdi
	jne	.LBB22_2
# %bb.3:                                #   in Loop: Header=BB22_1 Depth=1
	incq	%rdx
	addq	%rsi, %rax
	addq	%rsi, %rcx
	cmpq	$127, %rdx
	jne	.LBB22_1
# %bb.4:
	retq
.Lfunc_end22:
	.size	_Z10cpu_jacobiv, .Lfunc_end22-_Z10cpu_jacobiv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z6cpu_gsv
.LCPI23_0:
	.quad	0x3fd0000000000000              # double 0.25
	.text
	.globl	_Z6cpu_gsv
	.type	_Z6cpu_gsv,@function
_Z6cpu_gsv:                             # @_Z6cpu_gsv
	.cfi_startproc
# %bb.0:
	movl	$1, %eax
	movl	$2056, %ecx                     # imm = 0x808
	movl	$2, %edx
	movl	$1032, %esi                     # imm = 0x408
	movsd	.LCPI23_0(%rip), %xmm0          # xmm0 = mem[0],zero
	xorpd	%xmm1, %xmm1
	movl	$1024, %edi                     # imm = 0x400
.LBB23_1:                               # %.preheader43
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB23_2 Depth 2
	movq	U(%rip), %r8
	addq	%rcx, %r8
	movq	V(%rip), %r9
	addq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB23_2:                               #   Parent Loop BB23_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%r10), %r11d
	testb	$1, %r11b
	jne	.LBB23_4
# %bb.3:                                #   in Loop: Header=BB23_2 Depth=2
	movsd	-1032(%r8,%r10,8), %xmm2        # xmm2 = mem[0],zero
	addsd	-1016(%r8,%r10,8), %xmm2
	addsd	-2048(%r8,%r10,8), %xmm2
	addsd	(%r8,%r10,8), %xmm2
	mulsd	%xmm0, %xmm2
	movsd	-1024(%r8,%r10,8), %xmm3        # xmm3 = mem[0],zero
	mulsd	%xmm1, %xmm3
	addsd	%xmm2, %xmm3
	movsd	%xmm3, (%r9,%r10,8)
.LBB23_4:                               #   in Loop: Header=BB23_2 Depth=2
	incq	%r10
	cmpq	$126, %r10
	jne	.LBB23_2
# %bb.5:                                #   in Loop: Header=BB23_1 Depth=1
	incq	%rax
	addq	%rdi, %rcx
	incq	%rdx
	addq	%rdi, %rsi
	cmpq	$127, %rax
	jne	.LBB23_1
# %bb.6:                                # %.preheader.preheader
	movl	$1, %eax
	movl	$2056, %ecx                     # imm = 0x808
	movl	$2, %edx
	movl	$1032, %esi                     # imm = 0x408
	movl	$1024, %edi                     # imm = 0x400
	xorpd	%xmm1, %xmm1
.LBB23_7:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB23_8 Depth 2
	movq	V(%rip), %r8
	addq	%rcx, %r8
	movq	U(%rip), %r9
	addq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB23_8:                               #   Parent Loop BB23_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%r10), %r11d
	testb	$1, %r11b
	je	.LBB23_10
# %bb.9:                                #   in Loop: Header=BB23_8 Depth=2
	movsd	-1032(%r8,%r10,8), %xmm2        # xmm2 = mem[0],zero
	addsd	-1016(%r8,%r10,8), %xmm2
	addsd	-2048(%r8,%r10,8), %xmm2
	addsd	(%r8,%r10,8), %xmm2
	mulsd	%xmm0, %xmm2
	movsd	(%r9,%r10,8), %xmm3             # xmm3 = mem[0],zero
	mulsd	%xmm1, %xmm3
	addsd	%xmm2, %xmm3
	movsd	%xmm3, -1024(%r8,%r10,8)
.LBB23_10:                              #   in Loop: Header=BB23_8 Depth=2
	incq	%r10
	cmpq	$126, %r10
	jne	.LBB23_8
# %bb.11:                               #   in Loop: Header=BB23_7 Depth=1
	incq	%rax
	addq	%rdi, %rcx
	incq	%rdx
	addq	%rdi, %rsi
	cmpq	$127, %rax
	jne	.LBB23_7
# %bb.12:
	retq
.Lfunc_end23:
	.size	_Z6cpu_gsv, .Lfunc_end23-_Z6cpu_gsv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7cpu_sorv
.LCPI24_0:
	.quad	0x3fd0000000000000              # double 0.25
.LCPI24_1:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	_Z7cpu_sorv
	.type	_Z7cpu_sorv,@function
_Z7cpu_sorv:                            # @_Z7cpu_sorv
	.cfi_startproc
# %bb.0:
	movsd	w_sor(%rip), %xmm2              # xmm2 = mem[0],zero
	movsd	.LCPI24_0(%rip), %xmm0          # xmm0 = mem[0],zero
	mulsd	%xmm2, %xmm0
	movsd	.LCPI24_1(%rip), %xmm1          # xmm1 = mem[0],zero
	subsd	%xmm2, %xmm1
	movl	$1, %eax
	movl	$2056, %ecx                     # imm = 0x808
	movl	$2, %edx
	movl	$1032, %esi                     # imm = 0x408
	movl	$1024, %edi                     # imm = 0x400
.LBB24_1:                               # %.preheader43
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB24_2 Depth 2
	movq	U(%rip), %r8
	addq	%rcx, %r8
	movq	V(%rip), %r9
	addq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB24_2:                               #   Parent Loop BB24_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%r10), %r11d
	testb	$1, %r11b
	jne	.LBB24_4
# %bb.3:                                #   in Loop: Header=BB24_2 Depth=2
	movsd	-1032(%r8,%r10,8), %xmm2        # xmm2 = mem[0],zero
	addsd	-1016(%r8,%r10,8), %xmm2
	addsd	-2048(%r8,%r10,8), %xmm2
	addsd	(%r8,%r10,8), %xmm2
	mulsd	%xmm0, %xmm2
	movsd	-1024(%r8,%r10,8), %xmm3        # xmm3 = mem[0],zero
	mulsd	%xmm1, %xmm3
	addsd	%xmm2, %xmm3
	movsd	%xmm3, (%r9,%r10,8)
.LBB24_4:                               #   in Loop: Header=BB24_2 Depth=2
	incq	%r10
	cmpq	$126, %r10
	jne	.LBB24_2
# %bb.5:                                #   in Loop: Header=BB24_1 Depth=1
	incq	%rax
	addq	%rdi, %rcx
	incq	%rdx
	addq	%rdi, %rsi
	cmpq	$127, %rax
	jne	.LBB24_1
# %bb.6:                                # %.preheader.preheader
	movl	$1, %eax
	movl	$2056, %ecx                     # imm = 0x808
	movl	$2, %edx
	movl	$1032, %esi                     # imm = 0x408
	movl	$1024, %edi                     # imm = 0x400
.LBB24_7:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB24_8 Depth 2
	movq	V(%rip), %r8
	addq	%rcx, %r8
	movq	U(%rip), %r9
	addq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB24_8:                               #   Parent Loop BB24_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%r10), %r11d
	testb	$1, %r11b
	je	.LBB24_10
# %bb.9:                                #   in Loop: Header=BB24_8 Depth=2
	movsd	-1032(%r8,%r10,8), %xmm2        # xmm2 = mem[0],zero
	addsd	-1016(%r8,%r10,8), %xmm2
	addsd	-2048(%r8,%r10,8), %xmm2
	addsd	(%r8,%r10,8), %xmm2
	mulsd	%xmm0, %xmm2
	movsd	(%r9,%r10,8), %xmm3             # xmm3 = mem[0],zero
	mulsd	%xmm1, %xmm3
	addsd	%xmm2, %xmm3
	movsd	%xmm3, -1024(%r8,%r10,8)
.LBB24_10:                              #   in Loop: Header=BB24_8 Depth=2
	incq	%r10
	cmpq	$126, %r10
	jne	.LBB24_8
# %bb.11:                               #   in Loop: Header=BB24_7 Depth=1
	incq	%rax
	addq	%rdi, %rcx
	incq	%rdx
	addq	%rdi, %rsi
	cmpq	$127, %rax
	jne	.LBB24_7
# %bb.12:
	retq
.Lfunc_end24:
	.size	_Z7cpu_sorv, .Lfunc_end24-_Z7cpu_sorv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8cpu_ksorv
.LCPI25_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI25_1:
	.quad	0x3fd0000000000000              # double 0.25
	.text
	.globl	_Z8cpu_ksorv
	.type	_Z8cpu_ksorv,@function
_Z8cpu_ksorv:                           # @_Z8cpu_ksorv
	.cfi_startproc
# %bb.0:
	movsd	w_ksor(%rip), %xmm0             # xmm0 = mem[0],zero
	movsd	.LCPI25_0(%rip), %xmm1          # xmm1 = mem[0],zero
	movapd	%xmm0, %xmm2
	addsd	%xmm1, %xmm2
	divsd	%xmm2, %xmm1
	mulsd	.LCPI25_1(%rip), %xmm0
	movl	$1, %eax
	movl	$2056, %ecx                     # imm = 0x808
	movl	$2, %edx
	movl	$1032, %esi                     # imm = 0x408
	movl	$1024, %edi                     # imm = 0x400
.LBB25_1:                               # %.preheader43
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB25_2 Depth 2
	movq	U(%rip), %r8
	addq	%rcx, %r8
	movq	V(%rip), %r9
	addq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB25_2:                               #   Parent Loop BB25_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%r10), %r11d
	testb	$1, %r11b
	jne	.LBB25_4
# %bb.3:                                #   in Loop: Header=BB25_2 Depth=2
	movsd	-1032(%r8,%r10,8), %xmm2        # xmm2 = mem[0],zero
	addsd	-1016(%r8,%r10,8), %xmm2
	addsd	-2048(%r8,%r10,8), %xmm2
	addsd	(%r8,%r10,8), %xmm2
	mulsd	%xmm0, %xmm2
	addsd	-1024(%r8,%r10,8), %xmm2
	mulsd	%xmm1, %xmm2
	movsd	%xmm2, (%r9,%r10,8)
.LBB25_4:                               #   in Loop: Header=BB25_2 Depth=2
	incq	%r10
	cmpq	$126, %r10
	jne	.LBB25_2
# %bb.5:                                #   in Loop: Header=BB25_1 Depth=1
	incq	%rax
	addq	%rdi, %rcx
	incq	%rdx
	addq	%rdi, %rsi
	cmpq	$127, %rax
	jne	.LBB25_1
# %bb.6:                                # %.preheader.preheader
	movl	$1, %eax
	movl	$2056, %ecx                     # imm = 0x808
	movl	$2, %edx
	movl	$1032, %esi                     # imm = 0x408
	movl	$1024, %edi                     # imm = 0x400
.LBB25_7:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB25_8 Depth 2
	movq	V(%rip), %r8
	addq	%rcx, %r8
	movq	U(%rip), %r9
	addq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB25_8:                               #   Parent Loop BB25_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%r10), %r11d
	testb	$1, %r11b
	je	.LBB25_10
# %bb.9:                                #   in Loop: Header=BB25_8 Depth=2
	movsd	-1032(%r8,%r10,8), %xmm2        # xmm2 = mem[0],zero
	addsd	-1016(%r8,%r10,8), %xmm2
	addsd	-2048(%r8,%r10,8), %xmm2
	addsd	(%r8,%r10,8), %xmm2
	mulsd	%xmm0, %xmm2
	addsd	(%r9,%r10,8), %xmm2
	mulsd	%xmm1, %xmm2
	movsd	%xmm2, -1024(%r8,%r10,8)
.LBB25_10:                              #   in Loop: Header=BB25_8 Depth=2
	incq	%r10
	cmpq	$126, %r10
	jne	.LBB25_8
# %bb.11:                               #   in Loop: Header=BB25_7 Depth=1
	incq	%rax
	addq	%rdi, %rcx
	incq	%rdx
	addq	%rdi, %rsi
	cmpq	$127, %rax
	jne	.LBB25_7
# %bb.12:
	retq
.Lfunc_end25:
	.size	_Z8cpu_ksorv, .Lfunc_end25-_Z8cpu_ksorv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9cpu_mksorv
.LCPI26_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI26_1:
	.quad	0x3fd0000000000000              # double 0.25
	.text
	.globl	_Z9cpu_mksorv
	.type	_Z9cpu_mksorv,@function
_Z9cpu_mksorv:                          # @_Z9cpu_mksorv
	.cfi_startproc
# %bb.0:
	movsd	w_ksor(%rip), %xmm2             # xmm2 = mem[0],zero
	movsd	w_mksor(%rip), %xmm0            # xmm0 = mem[0],zero
	movsd	.LCPI26_0(%rip), %xmm1          # xmm1 = mem[0],zero
	movapd	%xmm2, %xmm4
	addsd	%xmm1, %xmm4
	movapd	%xmm1, %xmm3
	divsd	%xmm4, %xmm3
	mulsd	.LCPI26_1(%rip), %xmm2
	movl	$1, %eax
	movl	$2056, %ecx                     # imm = 0x808
	movl	$2, %edx
	movl	$1032, %esi                     # imm = 0x408
	movl	$1024, %edi                     # imm = 0x400
.LBB26_1:                               # %.preheader43
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB26_2 Depth 2
	movq	U(%rip), %r8
	addq	%rcx, %r8
	movq	V(%rip), %r9
	addq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB26_2:                               #   Parent Loop BB26_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%r10), %r11d
	testb	$1, %r11b
	jne	.LBB26_4
# %bb.3:                                #   in Loop: Header=BB26_2 Depth=2
	movsd	-1032(%r8,%r10,8), %xmm4        # xmm4 = mem[0],zero
	addsd	-1016(%r8,%r10,8), %xmm4
	addsd	-2048(%r8,%r10,8), %xmm4
	addsd	(%r8,%r10,8), %xmm4
	mulsd	%xmm2, %xmm4
	addsd	-1024(%r8,%r10,8), %xmm4
	mulsd	%xmm3, %xmm4
	movsd	%xmm4, (%r9,%r10,8)
.LBB26_4:                               #   in Loop: Header=BB26_2 Depth=2
	incq	%r10
	cmpq	$126, %r10
	jne	.LBB26_2
# %bb.5:                                #   in Loop: Header=BB26_1 Depth=1
	incq	%rax
	addq	%rdi, %rcx
	incq	%rdx
	addq	%rdi, %rsi
	cmpq	$127, %rax
	jne	.LBB26_1
# %bb.6:                                # %.preheader42
	movapd	%xmm0, %xmm2
	addsd	%xmm1, %xmm2
	divsd	%xmm2, %xmm1
	mulsd	.LCPI26_1(%rip), %xmm0
	movl	$1, %eax
	movl	$2056, %ecx                     # imm = 0x808
	movl	$2, %edx
	movl	$1032, %esi                     # imm = 0x408
	movl	$1024, %edi                     # imm = 0x400
.LBB26_7:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB26_8 Depth 2
	movq	V(%rip), %r8
	addq	%rcx, %r8
	movq	U(%rip), %r9
	addq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB26_8:                               #   Parent Loop BB26_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%r10), %r11d
	testb	$1, %r11b
	je	.LBB26_10
# %bb.9:                                #   in Loop: Header=BB26_8 Depth=2
	movsd	-1032(%r8,%r10,8), %xmm2        # xmm2 = mem[0],zero
	addsd	-1016(%r8,%r10,8), %xmm2
	addsd	-2048(%r8,%r10,8), %xmm2
	addsd	(%r8,%r10,8), %xmm2
	mulsd	%xmm0, %xmm2
	addsd	(%r9,%r10,8), %xmm2
	mulsd	%xmm1, %xmm2
	movsd	%xmm2, -1024(%r8,%r10,8)
.LBB26_10:                              #   in Loop: Header=BB26_8 Depth=2
	incq	%r10
	cmpq	$126, %r10
	jne	.LBB26_8
# %bb.11:                               #   in Loop: Header=BB26_7 Depth=1
	incq	%rax
	addq	%rdi, %rcx
	incq	%rdx
	addq	%rdi, %rsi
	cmpq	$127, %rax
	jne	.LBB26_7
# %bb.12:
	retq
.Lfunc_end26:
	.size	_Z9cpu_mksorv, .Lfunc_end26-_Z9cpu_mksorv
	.cfi_endproc
                                        # -- End function
	.globl	_Z10set_solverPcS_              # -- Begin function _Z10set_solverPcS_
	.type	_Z10set_solverPcS_,@function
_Z10set_solverPcS_:                     # @_Z10set_solverPcS_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	$.L.str.8, %esi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB27_12
# %bb.1:
	movl	$.L.str.9, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB27_2
# %bb.3:
	movl	$.L.str.10, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB27_4
# %bb.5:
	movl	$.L.str.11, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB27_6
# %bb.7:
	movl	$.L.str.12, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB27_8
# %bb.9:
	movl	$.L.str.13, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB27_12
# %bb.10:
	movl	$_Z9gpu_mksorv, %eax
	jmp	.LBB27_11
.LBB27_2:
	movl	$_Z10gpu_jacobiv, %eax
	jmp	.LBB27_11
.LBB27_4:
	movl	$_Z6gpu_gsv, %eax
	jmp	.LBB27_11
.LBB27_6:
	movl	$_Z7gpu_sorv, %eax
	jmp	.LBB27_11
.LBB27_8:
	movl	$_Z8gpu_ksorv, %eax
.LBB27_11:                              # %.sink.split
	movq	%rax, solver(%rip)
.LBB27_12:
	movl	$.L.str.14, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB27_24
# %bb.13:
	movl	$.L.str.9, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB27_14
# %bb.15:
	movl	$.L.str.10, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB27_16
# %bb.17:
	movl	$.L.str.11, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB27_18
# %bb.19:
	movl	$.L.str.12, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB27_20
# %bb.21:
	movl	$.L.str.13, %esi
	movq	%rbx, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB27_24
# %bb.22:
	movl	$_Z9cpu_mksorv, %eax
	jmp	.LBB27_23
.LBB27_14:
	movl	$_Z10cpu_jacobiv, %eax
	jmp	.LBB27_23
.LBB27_16:
	movl	$_Z6cpu_gsv, %eax
	jmp	.LBB27_23
.LBB27_18:
	movl	$_Z7cpu_sorv, %eax
	jmp	.LBB27_23
.LBB27_20:
	movl	$_Z8cpu_ksorv, %eax
.LBB27_23:                              # %.sink.split27
	movq	%rax, solver(%rip)
.LBB27_24:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end27:
	.size	_Z10set_solverPcS_, .Lfunc_end27-_Z10set_solverPcS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI28_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jle	.LBB28_13
# %bb.1:
	movq	%rsi, %rbx
	movslq	SIZE(%rip), %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, U(%rip)
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, V(%rip)
	movl	$8, %edi
	callq	malloc
	movq	%rax, Z(%rip)
	callq	_Z12setup_matrixv
	movq	8(%rbx), %rdi
	movq	16(%rbx), %rsi
	callq	_Z10set_solverPcS_
	movq	8(%rbx), %r14
	movl	$.L.str.8, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB28_2
# %bb.3:
	movl	$.L.str.14, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB28_6
# %bb.4:
	movl	$_Z17cpu_update_matrixv, %eax
	movl	$_Z18cpu_check_convergev, %ecx
	jmp	.LBB28_5
.LBB28_2:
	callq	_Z9setup_gpuv
	movl	$_Z17gpu_update_matrixv, %eax
	movl	$_Z18gpu_check_convergev, %ecx
.LBB28_5:                               # %.sink.split
	movq	%rcx, check_converge(%rip)
	movq	%rax, update_matrix(%rip)
.LBB28_6:
	leaq	16(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$1, %r14d
	xorl	%ebp, %ebp
.LBB28_7:                               # =>This Inner Loop Header: Depth=1
	movl	%ebp, %r15d
	movl	%r14d, %eax
	imulq	$1374389535, %rax, %rax         # imm = 0x51EB851F
	shrq	$37, %rax
	imull	$100, %eax, %r12d
	decl	%r12d
	callq	*solver(%rip)
	callq	*check_converge(%rip)
	movq	Z(%rip), %rcx
	movl	%eax, (%rcx)
	callq	*update_matrix(%rip)
	leal	1(%r15), %ebp
	cmpl	%r15d, %r12d
	jne	.LBB28_9
# %bb.8:                                #   in Loop: Header=BB28_7 Depth=1
	movl	$.L.str.16, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
.LBB28_9:                               #   in Loop: Header=BB28_7 Depth=1
	movq	Z(%rip), %rax
	incl	%r14d
	cmpl	$0, (%rax)
	je	.LBB28_7
# %bb.10:
	movq	8(%rbx), %rdi
	movl	$.L.str.8, %esi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB28_12
# %bb.11:
	movq	U(%rip), %rdi
	movq	dU(%rip), %rsi
	movslq	SIZE(%rip), %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.LBB28_12:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	callq	_Z11save_matrixv
	movq	8(%rbx), %rdi
	movss	(%r14), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI28_0(%rip), %xmm0
	movl	%ebp, %esi
	callq	_Z11display_logPcif
	movq	U(%rip), %rdi
	callq	free
	movq	V(%rip), %rdi
	callq	free
	movq	Z(%rip), %rdi
	callq	free
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB28_13:
	.cfi_def_cfa_offset 80
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end28:
	.size	main, .Lfunc_end28-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB29_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB29_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$kjacobi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$kredjor, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$kblacksor, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$kredkjor, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$kblackksor, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$kupdate, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$kconverge, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$kresetz, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end29:
	.size	__hip_module_ctor, .Lfunc_end29-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB30_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB30_2:
	retq
.Lfunc_end30:
	.size	__hip_module_dtor, .Lfunc_end30-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	kjacobi,@object                 # @kjacobi
	.section	.rodata,"a",@progbits
	.globl	kjacobi
	.p2align	3, 0x0
kjacobi:
	.quad	__device_stub__kjacobi
	.size	kjacobi, 8

	.type	kredjor,@object                 # @kredjor
	.globl	kredjor
	.p2align	3, 0x0
kredjor:
	.quad	__device_stub__kredjor
	.size	kredjor, 8

	.type	kblacksor,@object               # @kblacksor
	.globl	kblacksor
	.p2align	3, 0x0
kblacksor:
	.quad	__device_stub__kblacksor
	.size	kblacksor, 8

	.type	kredkjor,@object                # @kredkjor
	.globl	kredkjor
	.p2align	3, 0x0
kredkjor:
	.quad	__device_stub__kredkjor
	.size	kredkjor, 8

	.type	kblackksor,@object              # @kblackksor
	.globl	kblackksor
	.p2align	3, 0x0
kblackksor:
	.quad	__device_stub__kblackksor
	.size	kblackksor, 8

	.type	kupdate,@object                 # @kupdate
	.globl	kupdate
	.p2align	3, 0x0
kupdate:
	.quad	__device_stub__kupdate
	.size	kupdate, 8

	.type	kconverge,@object               # @kconverge
	.globl	kconverge
	.p2align	3, 0x0
kconverge:
	.quad	__device_stub__kconverge
	.size	kconverge, 8

	.type	kresetz,@object                 # @kresetz
	.globl	kresetz
	.p2align	3, 0x0
kresetz:
	.quad	__device_stub__kresetz
	.size	kresetz, 8

	.type	w_sor,@object                   # @w_sor
	.data
	.globl	w_sor
	.p2align	3, 0x0
w_sor:
	.quad	0x3ffb333333333333              # double 1.7
	.size	w_sor, 8

	.type	w_ksor,@object                  # @w_ksor
	.globl	w_ksor
	.p2align	3, 0x0
w_ksor:
	.quad	0xc0028f5c28f5c28f              # double -2.3199999999999998
	.size	w_ksor, 8

	.type	w_mksor,@object                 # @w_mksor
	.globl	w_mksor
	.p2align	3, 0x0
w_mksor:
	.quad	0xc001c28f5c28f5c3              # double -2.2200000000000002
	.size	w_mksor, 8

	.type	U,@object                       # @U
	.bss
	.globl	U
	.p2align	3, 0x0
U:
	.quad	0
	.size	U, 8

	.type	V,@object                       # @V
	.globl	V
	.p2align	3, 0x0
V:
	.quad	0
	.size	V, 8

	.type	dU,@object                      # @dU
	.globl	dU
	.p2align	3, 0x0
dU:
	.quad	0
	.size	dU, 8

	.type	dV,@object                      # @dV
	.globl	dV
	.p2align	3, 0x0
dV:
	.quad	0
	.size	dV, 8

	.type	Z,@object                       # @Z
	.globl	Z
	.p2align	3, 0x0
Z:
	.quad	0
	.size	Z, 8

	.type	dZ,@object                      # @dZ
	.globl	dZ
	.p2align	3, 0x0
dZ:
	.quad	0
	.size	dZ, 8

	.type	dimBlock,@object                # @dimBlock
	.data
	.globl	dimBlock
	.p2align	3, 0x0
dimBlock:
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	1                               # 0x1
	.size	dimBlock, 12

	.type	dimGrid,@object                 # @dimGrid
	.globl	dimGrid
	.p2align	3, 0x0
dimGrid:
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	1                               # 0x1
	.size	dimGrid, 12

	.type	SIZE,@object                    # @SIZE
	.globl	SIZE
	.p2align	2, 0x0
SIZE:
	.long	131072                          # 0x20000
	.size	SIZE, 4

	.type	solver,@object                  # @solver
	.bss
	.globl	solver
	.p2align	3, 0x0
solver:
	.quad	0
	.size	solver, 8

	.type	check_converge,@object          # @check_converge
	.globl	check_converge
	.p2align	3, 0x0
check_converge:
	.quad	0
	.size	check_converge, 8

	.type	update_matrix,@object           # @update_matrix
	.globl	update_matrix
	.p2align	3, 0x0
update_matrix:
	.quad	0
	.size	update_matrix, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"m.dat"
	.size	.L.str, 6

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%f "
	.size	.L.str.2, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	">>> CPU %s\n"
	.size	.L.str.4, 12

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Size: %d x %d\n"
	.size	.L.str.5, 15

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Number of iteration: %d\n"
	.size	.L.str.6, 25

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"CPU time: %.5f\n"
	.size	.L.str.7, 16

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"gpu"
	.size	.L.str.8, 4

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"jacobi"
	.size	.L.str.9, 7

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"gs"
	.size	.L.str.10, 3

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"sor"
	.size	.L.str.11, 4

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"ksor"
	.size	.L.str.12, 5

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"mksor"
	.size	.L.str.13, 6

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"cpu"
	.size	.L.str.14, 4

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"%d\n"
	.size	.L.str.16, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"kjacobi"
	.size	.L__unnamed_1, 8

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"kredjor"
	.size	.L__unnamed_2, 8

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"kblacksor"
	.size	.L__unnamed_3, 10

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"kredkjor"
	.size	.L__unnamed_4, 9

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"kblackksor"
	.size	.L__unnamed_5, 11

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"kupdate"
	.size	.L__unnamed_6, 8

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"kconverge"
	.size	.L__unnamed_7, 10

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"kresetz"
	.size	.L__unnamed_8, 8

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Help: laplace cpu|gpu jacobi|gs|sor|ksor|mksor"
	.size	.Lstr, 47

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__kjacobi
	.addrsig_sym __device_stub__kredjor
	.addrsig_sym __device_stub__kblacksor
	.addrsig_sym __device_stub__kredkjor
	.addrsig_sym __device_stub__kblackksor
	.addrsig_sym __device_stub__kupdate
	.addrsig_sym __device_stub__kconverge
	.addrsig_sym __device_stub__kresetz
	.addrsig_sym _Z10gpu_jacobiv
	.addrsig_sym _Z6gpu_gsv
	.addrsig_sym _Z7gpu_sorv
	.addrsig_sym _Z8gpu_ksorv
	.addrsig_sym _Z9gpu_mksorv
	.addrsig_sym _Z18gpu_check_convergev
	.addrsig_sym _Z17gpu_update_matrixv
	.addrsig_sym _Z18cpu_check_convergev
	.addrsig_sym _Z17cpu_update_matrixv
	.addrsig_sym _Z10cpu_jacobiv
	.addrsig_sym _Z6cpu_gsv
	.addrsig_sym _Z7cpu_sorv
	.addrsig_sym _Z8cpu_ksorv
	.addrsig_sym _Z9cpu_mksorv
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym kjacobi
	.addrsig_sym kredjor
	.addrsig_sym kblacksor
	.addrsig_sym kredkjor
	.addrsig_sym kblackksor
	.addrsig_sym kupdate
	.addrsig_sym kconverge
	.addrsig_sym kresetz
	.addrsig_sym dU
	.addrsig_sym dV
	.addrsig_sym dZ
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	kjacobi                 ; -- Begin function kjacobi
	.globl	kjacobi
	.p2align	8
	.type	kjacobi,@function
kjacobi:                                ; @kjacobi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s4, -1
	s_add_i32 s3, s5, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_min_i32_e32 v2, v0, v1
	v_cmp_gt_i32_e64 s2, s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s3, 0, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mul_lo_u32 v7, v1, s4
	s_load_b128 s[0:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v7, v0
	v_subrev_nc_u32_e32 v7, s4, v7
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v7, v0
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshl_add_u32 v10, s4, 1, v7
	v_lshlrev_b64 v[8:9], 3, v[7:8]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_co_u32 v8, vcc_lo, s0, v8
	s_clause 0x1
	global_load_b64 v[5:6], v[3:4], off offset:-8
	global_load_b64 v[3:4], v[3:4], off offset:8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	global_load_b64 v[8:9], v[8:9], off
	v_add_co_u32 v10, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[3:4], v[5:6], v[3:4]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], v[8:9]
	s_waitcnt vmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[3:4], v[3:4], -2
	global_store_b64 v[0:1], v[3:4], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel kjacobi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	kjacobi, .Lfunc_end0-kjacobi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	kredjor                 ; -- Begin function kredjor
	.globl	kredjor
	.p2align	8
	.type	kredjor,@function
kredjor:                                ; @kredjor
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[8:9], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s8, -1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_add_i32 s2, s9, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v1, v0
	v_min_i32_e32 v3, v0, v1
	v_cmp_gt_i32_e64 s2, s2, v1
	v_and_b32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s3, 0, v3
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s4, 0, v2
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_mul_lo_u32 v9, v1, s8
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v9, v0
	v_subrev_nc_u32_e32 v9, s8, v9
	v_add_nc_u32_e32 v3, -1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v9, v9, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshl_add_u32 v12, s8, 1, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_lshlrev_b64 v[10:11], 3, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v13, 31, v12
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v10, vcc_lo, s4, v10
	s_clause 0x1
	global_load_b64 v[7:8], v[1:2], off
	global_load_b128 v[1:4], v[3:4], off
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	global_load_b64 v[10:11], v[10:11], off
	v_add_co_u32 v12, vcc_lo, s4, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[3:4], v[7:8], v[3:4]
	v_add_f64 v[7:8], -s[0:1], 1.0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[3:4], v[3:4], v[10:11]
	v_ldexp_f64 v[9:10], s[0:1], -2
	v_mul_f64 v[0:1], v[7:8], v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], v[12:13]
	v_fma_f64 v[0:1], v[9:10], v[3:4], v[0:1]
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v6, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel kredjor
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	kredjor, .Lfunc_end1-kredjor
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 484
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	kblacksor               ; -- Begin function kblacksor
	.globl	kblacksor
	.p2align	8
	.type	kblacksor,@function
kblacksor:                              ; @kblacksor
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[8:9], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s8, -1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_add_i32 s2, s9, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v1, v0
	v_min_i32_e32 v3, v0, v1
	v_cmp_gt_i32_e64 s2, s2, v1
	v_and_b32_e32 v2, 0x80000001, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s3, 0, v3
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s4, 1, v2
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_mul_lo_u32 v9, v1, s8
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v9, v0
	v_subrev_nc_u32_e32 v9, s8, v9
	v_add_nc_u32_e32 v3, -1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v9, v9, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshl_add_u32 v12, s8, 1, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_lshlrev_b64 v[10:11], 3, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v13, 31, v12
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v10, vcc_lo, s6, v10
	s_clause 0x1
	global_load_b64 v[3:4], v[3:4], off
	global_load_b64 v[7:8], v[5:6], off offset:8
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	global_load_b64 v[10:11], v[10:11], off
	v_add_co_u32 v12, vcc_lo, s6, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v2, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(3)
	v_add_f64 v[2:3], v[3:4], v[7:8]
	v_add_f64 v[7:8], -s[0:1], 1.0
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	v_ldexp_f64 v[9:10], s[0:1], -2
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[7:8], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[12:13]
	v_fma_f64 v[0:1], v[9:10], v[2:3], v[0:1]
	global_store_b64 v[5:6], v[0:1], off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel kblacksor
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	kblacksor, .Lfunc_end2-kblacksor
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 496
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	kredkjor                ; -- Begin function kredkjor
	.globl	kredkjor
	.p2align	8
	.type	kredkjor,@function
kredkjor:                               ; @kredkjor
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[8:9], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s8, -1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_add_i32 s2, s9, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v1, v0
	v_min_i32_e32 v3, v0, v1
	v_cmp_gt_i32_e64 s2, s2, v1
	v_and_b32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s3, 0, v3
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s4, 0, v2
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_2
; %bb.1:
	v_mul_lo_u32 v9, v1, s8
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v9, v0
	v_subrev_nc_u32_e32 v9, s8, v9
	v_add_nc_u32_e32 v3, -1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v9, v9, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshl_add_u32 v14, s8, 1, v9
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[12:13], s[0:1], 1.0
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_lshlrev_b64 v[10:11], 3, v[9:10]
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v10, vcc_lo, s4, v10
	s_clause 0x1
	global_load_b64 v[7:8], v[1:2], off
	global_load_b128 v[1:4], v[3:4], off
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	v_lshlrev_b64 v[14:15], 3, v[14:15]
	global_load_b64 v[10:11], v[10:11], off
	v_add_co_u32 v14, vcc_lo, s4, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	v_div_scale_f64 v[16:17], null, v[12:13], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19]
	v_div_scale_f64 v[20:21], vcc_lo, 1.0, v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f64 v[22:23], v[20:21], v[18:19]
	s_waitcnt vmcnt(2)
	v_add_f64 v[3:4], v[7:8], v[3:4]
	v_fma_f64 v[7:8], -v[16:17], v[22:23], v[20:21]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[3:4], v[10:11]
	v_div_fmas_f64 v[7:8], v[7:8], v[18:19], v[22:23]
	v_ldexp_f64 v[9:10], s[0:1], -2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[3:4], v[3:4], v[14:15]
	v_div_fixup_f64 v[7:8], v[7:8], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[0:1], v[9:10], v[3:4], v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v6, vcc_lo
	v_mul_f64 v[0:1], v[7:8], v[0:1]
	global_store_b64 v[2:3], v[0:1], off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel kredkjor
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	kredkjor, .Lfunc_end3-kredkjor
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 580
; NumSgprs: 18
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	kblackksor              ; -- Begin function kblackksor
	.globl	kblackksor
	.p2align	8
	.type	kblackksor,@function
kblackksor:                             ; @kblackksor
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[8:9], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s8, -1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_add_i32 s2, s9, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v1, v0
	v_min_i32_e32 v3, v0, v1
	v_cmp_gt_i32_e64 s2, s2, v1
	v_and_b32_e32 v2, 0x80000001, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s3, 0, v3
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s4, 1, v2
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB4_2
; %bb.1:
	v_mul_lo_u32 v9, v1, s8
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v9, v0
	v_subrev_nc_u32_e32 v9, s8, v9
	v_add_nc_u32_e32 v3, -1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v9, v9, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshl_add_u32 v14, s8, 1, v9
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[12:13], s[0:1], 1.0
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_lshlrev_b64 v[10:11], 3, v[9:10]
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v10, vcc_lo, s6, v10
	s_clause 0x1
	global_load_b64 v[3:4], v[3:4], off
	global_load_b64 v[7:8], v[5:6], off offset:8
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	v_lshlrev_b64 v[14:15], 3, v[14:15]
	global_load_b64 v[10:11], v[10:11], off
	v_add_co_u32 v14, vcc_lo, s6, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v2, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[0:1], v[0:1], off
	v_div_scale_f64 v[16:17], null, v[12:13], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19]
	v_div_scale_f64 v[20:21], vcc_lo, 1.0, v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f64 v[22:23], v[20:21], v[18:19]
	s_waitcnt vmcnt(3)
	v_add_f64 v[2:3], v[3:4], v[7:8]
	v_fma_f64 v[7:8], -v[16:17], v[22:23], v[20:21]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	v_div_fmas_f64 v[7:8], v[7:8], v[18:19], v[22:23]
	v_ldexp_f64 v[9:10], s[0:1], -2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[14:15]
	v_div_fixup_f64 v[7:8], v[7:8], v[12:13], 1.0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[9:10], v[2:3], v[0:1]
	v_mul_f64 v[0:1], v[7:8], v[0:1]
	global_store_b64 v[5:6], v[0:1], off
.LBB4_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel kblackksor
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	kblackksor, .Lfunc_end4-kblackksor
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 596
; NumSgprs: 18
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	kupdate                 ; -- Begin function kupdate
	.globl	kupdate
	.p2align	8
	.type	kupdate,@function
kupdate:                                ; @kupdate
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s4, -1
	s_add_i32 s3, s5, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_min_i32_e32 v2, v0, v1
	v_cmp_gt_i32_e64 s2, s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s3, 0, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x8
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB5_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel kupdate
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	kupdate, .Lfunc_end5-kupdate
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	kconverge               ; -- Begin function kconverge
	.globl	kconverge
	.p2align	8
	.type	kconverge,@function
kconverge:                              ; @kconverge
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[8:9], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s8, -1
	s_add_i32 s3, s9, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_min_i32_e32 v2, v0, v1
	v_cmp_gt_i32_e64 s2, s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s3, 0, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB6_7
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x8
	v_mad_u64_u32 v[2:3], null, v1, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[0:1], off
                                        ; implicit-def: $vgpr0_vgpr1
	s_waitcnt vmcnt(0)
	v_cmpx_ngt_f64_e32 v[2:3], v[4:5]
	s_xor_b32 s0, exec_lo, s0
; %bb.2:
	v_add_f64 v[0:1], v[4:5], -v[2:3]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
; %bb.3:                                ; %Flow55
	s_and_not1_saveexec_b32 s0, s0
; %bb.4:
	v_add_f64 v[0:1], v[2:3], -v[4:5]
; %bb.5:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, s[6:7], v[0:1]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB6_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	global_store_b32 v0, v0, s[4:5]
.LBB6_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel kconverge
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	kconverge, .Lfunc_end6-kconverge
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	kresetz                 ; -- Begin function kresetz
	.globl	kresetz
	.p2align	8
	.type	kresetz,@function
kresetz:                                ; @kresetz
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel kresetz
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 2
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	kresetz, .Lfunc_end7-kresetz
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 40
; NumSgprs: 2
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 2
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           kjacobi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         kjacobi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           kredjor
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         kredjor.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
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...

	.end_amdgpu_metadata
