#include <stdio.h>
#include <iostream>
#include <ctime>
using namespace std;

void host_init(float *arr, int n, float init_val){
	for (int i=0; i < n; i++)
		arr[i] = init_val;
}


void host_vec_add(float *h_a, float *h_b, float *h_c, int n){
	for (int i = 0; i < n; i++){
		h_c[i] = h_a[i] + h_b[i];
	}
}

__global__
void cuda_vec_add(float *d_a, float *d_b, float *d_c, int n, int m){
	int col = blockIdx.x*blockDim.x + threadIdx.x;
	int row = blockIdx.y*blockDim.y + threadIdx.y;
	if (col < m && row < n){
		d_c[row*m + col] = d_a[row*m + col] + d_b[row*m + col];
	}
}

void cudaError_check(cudaError_t err){
	if (err != cudaSuccess){
		printf("GPUassert: %s %s %d\n", cudaGetErrorString(err), __FILE__, __LINE__);
		exit(EXIT_FAILURE);
	}
}

int main(){
	float *h_a, *h_b, *h_c, *h_c_cpy;
	float *d_a, *d_b, *d_c;
	int n = 1024; // row
	int m = 1024; // col

	size_t size = n*m*sizeof(float);
	clock_t start, stop;

//################## HOST Start ###################//
	h_a = (float*) malloc (size);
	h_b = (float*) malloc (size);
	h_c = (float*) malloc (size);
	h_c_cpy = (float*) malloc (size);


	host_init(h_a, n*m, 1);
	host_init(h_b, n*m, 2);
	host_init(h_c, n*m, 0);
	host_init(h_c_cpy, n*m, 0);
	start = clock();
	host_vec_add(h_a, h_b, h_c, n*m);
	stop = clock();
	double cpu_duration = (stop - start) / (double) CLOCKS_PER_SEC;
//################## HOST End ###################//

//################## CUDA Start ###################//
	cudaError_t err ;
	err = cudaMalloc((void **) &d_a, size);
	cudaError_check(err);
	err = cudaMemcpy(d_a, h_a, size, cudaMemcpyHostToDevice);
	cudaError_check(err);
	err = cudaMalloc((void **) &d_b, size);
	cudaError_check(err);
	err = cudaMemcpy(d_b, h_b, size, cudaMemcpyHostToDevice);
	cudaError_check(err);
	err = cudaMalloc((void **) &d_c, size);
	cudaError_check(err);

	//Kernel invocation
	int num_threads_per_block = 32;
	dim3 gridDim  ((n-1)/num_threads_per_block + 1, (m-1)/num_threads_per_block + 1, 1);
	dim3 blockDim  (num_threads_per_block, num_threads_per_block, 1);
	start = clock();
	cuda_vec_add<<<gridDim, blockDim>>>(d_a, d_b, d_c, n, m);
	err = cudaDeviceSynchronize();
	stop = clock();
	cudaError_check(err);
	err = cudaMemcpy(h_c_cpy, d_c, size, cudaMemcpyDeviceToHost);
	cudaError_check(err);
	double gpu_duration = (stop - start) / (double) CLOCKS_PER_SEC;
//################## CUDA End ###################//
	int success = 1;
	for (int i = 0; i < n*m; i++){
		if (h_c[i] != h_c_cpy[i]){
			success = 0;
			printf("Failure at idx: %d\n", i);
			break;
		}
	}
	if (success == 1)
		printf("Success\n");
	printf("CPU Duration: %0.3f secs \n", cpu_duration);
	printf("GPU Duration: %0.3f secs \n", gpu_duration);
	return 1;
}

	.file	"tmpxft_0031cd77_00000000-6_gpu_vectorAddition2D.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9host_initPfif
	.type	_Z9host_initPfif, @function
_Z9host_initPfif:
.LFB3635:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %esi
	jle	.L6
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z9host_initPfif, .-_Z9host_initPfif
	.globl	_Z12host_vec_addPfS_S_i
	.type	_Z12host_vec_addPfS_S_i, @function
_Z12host_vec_addPfS_S_i:
.LFB3636:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %ecx
	jle	.L10
	movss	(%rdi,%rax,4), %xmm0
	addss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L8
.L10:
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z12host_vec_addPfS_S_i, .-_Z12host_vec_addPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/sandeep-skb/cuda_programs/master/gpu_vectorAddition2D.cu"
.LC1:
	.string	"GPUassert: %s %s %d\n"
	.text
	.globl	_Z15cudaError_check9cudaError
	.type	_Z15cudaError_check9cudaError, @function
_Z15cudaError_check9cudaError:
.LFB3637:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L11
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movl	$29, %r8d
	leaq	.LC0(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L11:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z15cudaError_check9cudaError, .-_Z15cudaError_check9cudaError
	.globl	_Z38__device_stub__Z12cuda_vec_addPfS_S_iiPfS_S_ii
	.type	_Z38__device_stub__Z12cuda_vec_addPfS_S_iiPfS_S_ii, @function
_Z38__device_stub__Z12cuda_vec_addPfS_S_iiPfS_S_ii:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12cuda_vec_addPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L16:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z38__device_stub__Z12cuda_vec_addPfS_S_iiPfS_S_ii, .-_Z38__device_stub__Z12cuda_vec_addPfS_S_iiPfS_S_ii
	.globl	_Z12cuda_vec_addPfS_S_ii
	.type	_Z12cuda_vec_addPfS_S_ii, @function
_Z12cuda_vec_addPfS_S_ii:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12cuda_vec_addPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE3664:
	.size	_Z12cuda_vec_addPfS_S_ii, .-_Z12cuda_vec_addPfS_S_ii
	.section	.rodata.str1.1
.LC6:
	.string	"Failure at idx: %d\n"
.LC7:
	.string	"Success\n"
.LC8:
	.string	"CPU Duration: %0.3f secs \n"
.LC9:
	.string	"GPU Duration: %0.3f secs \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4194304, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movss	.LC2(%rip), %xmm0
	movl	$1048576, %esi
	movq	%r13, %rdi
	movq	%rax, %rbp
	call	_Z9host_initPfif
	movss	.LC3(%rip), %xmm0
	movq	%r12, %rdi
	call	_Z9host_initPfif
	xorps	%xmm0, %xmm0
	movq	%rbx, %rdi
	call	_Z9host_initPfif
	movq	%rbp, %rdi
	call	_Z9host_initPfif
	call	clock@PLT
	movl	$1048576, %ecx
	movq	%rbx, %rdx
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%rax, %r14
	call	_Z12host_vec_addPfS_S_i
	call	clock@PLT
	movl	$4194304, %esi
	leaq	8(%rsp), %rdi
	subq	%r14, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC5(%rip), %xmm0
	movq	%xmm0, %r15
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z15cudaError_check9cudaError
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z15cudaError_check9cudaError
	movl	$4194304, %esi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z15cudaError_check9cudaError
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z15cudaError_check9cudaError
	movl	$4194304, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z15cudaError_check9cudaError
	movl	$1, 40(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	clock@PLT
	movl	52(%rsp), %ecx
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %r13
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1024, %ecx
	movl	$1024, %r8d
	movq	8(%rsp), %rdi
	call	_Z38__device_stub__Z12cuda_vec_addPfS_S_iiPfS_S_ii
.L22:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %r14d
	call	clock@PLT
	movl	%r14d, %edi
	movq	%rax, %r12
	call	_Z15cudaError_check9cudaError
	movq	24(%rsp), %rsi
	movq	%rbp, %rdi
	subq	%r13, %r12
	movl	$4194304, %edx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z15cudaError_check9cudaError
	cvtsi2sdq	%r12, %xmm0
	xorl	%edx, %edx
	divsd	.LC5(%rip), %xmm0
	movq	%xmm0, %r12
.L26:
	movss	(%rbx,%rdx,4), %xmm0
	ucomiss	0(%rbp,%rdx,4), %xmm0
	jp	.L28
	je	.L23
.L28:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L25
.L23:
	incq	%rdx
	cmpq	$1048576, %rdx
	jne	.L26
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L25:
	movq	%r15, %xmm0
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%r12, %xmm0
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movl	$1, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z12cuda_vec_addPfS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12cuda_vec_addPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1073741824
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <ctime>
using namespace std;

void host_init(float *arr, int n, float init_val){
	for (int i=0; i < n; i++)
		arr[i] = init_val;
}


void host_vec_add(float *h_a, float *h_b, float *h_c, int n){
	for (int i = 0; i < n; i++){
		h_c[i] = h_a[i] + h_b[i];
	}
}

__global__
void cuda_vec_add(float *d_a, float *d_b, float *d_c, int n, int m){
	int col = blockIdx.x*blockDim.x + threadIdx.x;
	int row = blockIdx.y*blockDim.y + threadIdx.y;
	if (col < m && row < n){
		d_c[row*m + col] = d_a[row*m + col] + d_b[row*m + col];
	}
}

void cudaError_check(hipError_t err){
	if (err != hipSuccess){
		printf("GPUassert: %s %s %d\n", hipGetErrorString(err), __FILE__, __LINE__);
		exit(EXIT_FAILURE);
	}
}

int main(){
	float *h_a, *h_b, *h_c, *h_c_cpy;
	float *d_a, *d_b, *d_c;
	int n = 1024; // row
	int m = 1024; // col

	size_t size = n*m*sizeof(float);
	clock_t start, stop;

//################## HOST Start ###################//
	h_a = (float*) malloc (size);
	h_b = (float*) malloc (size);
	h_c = (float*) malloc (size);
	h_c_cpy = (float*) malloc (size);


	host_init(h_a, n*m, 1);
	host_init(h_b, n*m, 2);
	host_init(h_c, n*m, 0);
	host_init(h_c_cpy, n*m, 0);
	start = clock();
	host_vec_add(h_a, h_b, h_c, n*m);
	stop = clock();
	double cpu_duration = (stop - start) / (double) CLOCKS_PER_SEC;
//################## HOST End ###################//

//################## CUDA Start ###################//
	hipError_t err ;
	err = hipMalloc((void **) &d_a, size);
	cudaError_check(err);
	err = hipMemcpy(d_a, h_a, size, hipMemcpyHostToDevice);
	cudaError_check(err);
	err = hipMalloc((void **) &d_b, size);
	cudaError_check(err);
	err = hipMemcpy(d_b, h_b, size, hipMemcpyHostToDevice);
	cudaError_check(err);
	err = hipMalloc((void **) &d_c, size);
	cudaError_check(err);

	//Kernel invocation
	int num_threads_per_block = 32;
	dim3 gridDim  ((n-1)/num_threads_per_block + 1, (m-1)/num_threads_per_block + 1, 1);
	dim3 blockDim  (num_threads_per_block, num_threads_per_block, 1);
	start = clock();
	cuda_vec_add<<<gridDim, blockDim>>>(d_a, d_b, d_c, n, m);
	err = hipDeviceSynchronize();
	stop = clock();
	cudaError_check(err);
	err = hipMemcpy(h_c_cpy, d_c, size, hipMemcpyDeviceToHost);
	cudaError_check(err);
	double gpu_duration = (stop - start) / (double) CLOCKS_PER_SEC;
//################## CUDA End ###################//
	int success = 1;
	for (int i = 0; i < n*m; i++){
		if (h_c[i] != h_c_cpy[i]){
			success = 0;
			printf("Failure at idx: %d\n", i);
			break;
		}
	}
	if (success == 1)
		printf("Success\n");
	printf("CPU Duration: %0.3f secs \n", cpu_duration);
	printf("GPU Duration: %0.3f secs \n", gpu_duration);
	return 1;
}

	.text
	.file	"gpu_vectorAddition2D.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z9host_initPfif                # -- Begin function _Z9host_initPfif
	.type	_Z9host_initPfif,@function
_Z9host_initPfif:                       # @_Z9host_initPfif
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z9host_initPfif, .Lfunc_end0-_Z9host_initPfif
	.cfi_endproc
                                        # -- End function
	.globl	_Z12host_vec_addPfS_S_i         # -- Begin function _Z12host_vec_addPfS_S_i
	.type	_Z12host_vec_addPfS_S_i,@function
_Z12host_vec_addPfS_S_i:                # @_Z12host_vec_addPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ecx, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rsi,%rcx,4), %xmm0
	movss	%xmm0, (%rdx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z12host_vec_addPfS_S_i, .Lfunc_end1-_Z12host_vec_addPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__cuda_vec_addPfS_S_ii # -- Begin function _Z27__device_stub__cuda_vec_addPfS_S_ii
	.type	_Z27__device_stub__cuda_vec_addPfS_S_ii,@function
_Z27__device_stub__cuda_vec_addPfS_S_ii: # @_Z27__device_stub__cuda_vec_addPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12cuda_vec_addPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__cuda_vec_addPfS_S_ii, .Lfunc_end2-_Z27__device_stub__cuda_vec_addPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15cudaError_check10hipError_t # -- Begin function _Z15cudaError_check10hipError_t
	.type	_Z15cudaError_check10hipError_t,@function
_Z15cudaError_check10hipError_t:        # @_Z15cudaError_check10hipError_t
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB3_2
# %bb.1:
	retq
.LBB3_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %edx
	movq	%rax, %rsi
	movl	$31, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z15cudaError_check10hipError_t, .Lfunc_end3-_Z15cudaError_check10hipError_t
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbp
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r13
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbx
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	xorl	%eax, %eax
.LBB4_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbp,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB4_1
# %bb.2:                                # %.lr.ph.i70.preheader
	xorl	%eax, %eax
.LBB4_3:                                # %.lr.ph.i70
                                        # =>This Inner Loop Header: Depth=1
	movl	$1073741824, (%r13,%rax,4)      # imm = 0x40000000
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB4_3
# %bb.4:                                # %.lr.ph.i75.preheader
	xorl	%r15d, %r15d
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	callq	clock
	movq	%rax, 16(%rsp)                  # 8-byte Spill
.LBB4_5:                                # %.lr.ph.i85
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rbp,%r15,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%r13,%r15,4), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$1048576, %r15                  # imm = 0x100000
	jne	.LBB4_5
# %bb.6:                                # %_Z12host_vec_addPfS_S_i.exit
	callq	clock
	movq	%rax, %r12
	leaq	32(%rsp), %r15
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z15cudaError_check10hipError_t
	movq	(%r15), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z15cudaError_check10hipError_t
	leaq	24(%rsp), %r15
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z15cudaError_check10hipError_t
	movq	(%r15), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z15cudaError_check10hipError_t
	movq	%rsp, %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z15cudaError_check10hipError_t
	callq	clock
	movq	%rax, %r13
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_8
# %bb.7:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movl	$1024, %r8d                     # imm = 0x400
	callq	_Z27__device_stub__cuda_vec_addPfS_S_ii
.LBB4_8:
	callq	hipDeviceSynchronize
	movl	%eax, %r15d
	callq	clock
	movq	%rax, %rbp
	movl	%r15d, %edi
	callq	_Z15cudaError_check10hipError_t
	movq	(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z15cudaError_check10hipError_t
	xorl	%esi, %esi
.LBB4_9:                                # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%rsi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r14,%rsi,4), %xmm0
	jne	.LBB4_10
	jp	.LBB4_10
# %bb.11:                               #   in Loop: Header=BB4_9 Depth=1
	incq	%rsi
	cmpq	$1048576, %rsi                  # imm = 0x100000
	jne	.LBB4_9
# %bb.12:                               # %.critedge
	movl	$.Lstr, %edi
	callq	puts@PLT
	jmp	.LBB4_13
.LBB4_10:
	movl	$.L.str.2, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
.LBB4_13:
	subq	%r13, %rbp
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rbp, %xmm0
	movsd	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm1, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	subq	16(%rsp), %r12                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12, %xmm0
	divsd	%xmm1, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.5, %edi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$1, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12cuda_vec_addPfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12cuda_vec_addPfS_S_ii,@object # @_Z12cuda_vec_addPfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z12cuda_vec_addPfS_S_ii
	.p2align	3, 0x0
_Z12cuda_vec_addPfS_S_ii:
	.quad	_Z27__device_stub__cuda_vec_addPfS_S_ii
	.size	_Z12cuda_vec_addPfS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str, 21

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/sandeep-skb/cuda_programs/master/gpu_vectorAddition2D.hip"
	.size	.L.str.1, 120

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failure at idx: %d\n"
	.size	.L.str.2, 20

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CPU Duration: %0.3f secs \n"
	.size	.L.str.4, 27

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"GPU Duration: %0.3f secs \n"
	.size	.L.str.5, 27

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12cuda_vec_addPfS_S_ii"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Success"
	.size	.Lstr, 8

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__cuda_vec_addPfS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12cuda_vec_addPfS_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12cuda_vec_addPfS_S_ii ; -- Begin function _Z12cuda_vec_addPfS_S_ii
	.globl	_Z12cuda_vec_addPfS_S_ii
	.p2align	8
	.type	_Z12cuda_vec_addPfS_S_ii,@function
_Z12cuda_vec_addPfS_S_ii:               ; @_Z12cuda_vec_addPfS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	v_cmp_gt_i32_e64 s2, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s3, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12cuda_vec_addPfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12cuda_vec_addPfS_S_ii, .Lfunc_end0-_Z12cuda_vec_addPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12cuda_vec_addPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12cuda_vec_addPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
