#define PI 3.141592653589793238462643
#define blocDim 512
#define powOfTwo 4
#define timerCount 10


// Device function used when evaluating the closed integral
__device__ double closedIntt(double s, double t, double A, double B, double C)
{
	double val;
	if(t==0){
		val = 0;
	}else{
		val = t/sqrt(A)*log(2*A*s+B*t+2*sqrt(A*(A*s*s+B*s*t+C*t*t)));
	}
	return val;
}

// Device function used when evaluating the closed integral
__device__ double closedInts(double s, double t, double A, double B, double C)
{
	double val;
	if(s==0){
		val = 0;
	}else{
		val = s/sqrt(C)*log(2*C*t+B*s+2*sqrt(C*(A*s*s+B*s*t+C*t*t)));
	}
	return val;
}

// Main GPU kernel
__global__ void guts(const long int N, const long int M,
	const double * zeta,const double * zetaX,const double * zetaY,
	const double * zetaHalf,const double * zetaXHalf,const double * zetaYHalf,
	const double * phi,const double * phiX,const double * phiHalf,const double * phiXHalf,const double * phiYHalf,
	const double * x,const double * y,const double * xHalf,const double * yHalf,
	const double * weiX,const double * weiY,const double * epsilon,const double * source, const bool * singType,const double Fr,
	const double n,double * Func)
{
	__shared__ double A, B, C,sUpper,sLower,tNegUpper,tNegLower,tPosUpper,tPosLower,xH,yH,thisBlock[blocDim];
	__shared__ long int k,l,blockPos;
	double xDiff, yNegDiff, yPosDiff,xDiffSq, yNegDiffSq, yPosDiffSq, zetaDiff,radiusSqNeg,
		radiusSqPos,K1,K2,S2,I1,I2,singInt,sqrtStuff,FuncTemp = 0;
	long int i,j,threadPos,applyBlockPos;

	// First thread initialises variables
	if(threadIdx.x==0){
		k = blockIdx.x;
		l = blockIdx.y;
		blockPos = k+(N-1)*l;	// Get position of the block for mesh half ponts
		xH = xHalf[k];
		yH = yHalf[l];
		A = 1 + zetaXHalf[blockPos]*zetaXHalf[blockPos];//
		B = 2*zetaXHalf[blockPos]*zetaYHalf[blockPos];	//
		C = 1 + zetaYHalf[blockPos]*zetaYHalf[blockPos];//
		sUpper = x[N-1]-xH;								//
		sLower = x[0]-xH;								// Calculate values needed for closed integral
		tNegUpper = y[M-1]-yH;							//
		tNegLower = y[0]-yH;							//
		tPosUpper = -y[M-1]-yH;							//
		tPosLower = -y[0]-yH;							//
	}

	// After initialising variables
	__syncthreads();


	// Have each thread sum over some values of the double integrals
	threadPos = threadIdx.x;
	i = threadPos%N;
	j = threadPos/N;
	// Each loop is one collocation point
	while(threadPos<(M*N)){		

		// Calculate nessesary values
		xDiff = x[i]-xH;
		xDiffSq = xDiff*xDiff;

		yNegDiff = y[j]-yH;
		yNegDiffSq = yNegDiff*yNegDiff;

		yPosDiff = y[j]+yH;
		yPosDiffSq = yPosDiff*yPosDiff;

		zetaDiff = zeta[threadPos]-zetaHalf[blockPos];
		
		radiusSqNeg = sqrt(xDiffSq+yNegDiffSq+zetaDiff*zetaDiff);
		radiusSqPos = sqrt(xDiffSq+yPosDiffSq+zetaDiff*zetaDiff);

		// First integral kernel function
		K1 = (zetaDiff-xDiff*zetaX[threadPos]-yNegDiff*zetaY[threadPos])/(radiusSqNeg*radiusSqNeg*radiusSqNeg)+
			(zetaDiff-xDiff*zetaX[threadPos]-yPosDiff*zetaY[threadPos])/(radiusSqPos*radiusSqPos*radiusSqPos);

		// Second integral kernel function
		K2 = 1/radiusSqNeg+1/radiusSqPos;


		S2 = 1/sqrt(A*xDiffSq+B*xDiff*yNegDiff+C*yNegDiffSq)+1/sqrt(A*xDiffSq-B*xDiff*yPosDiff+C*yPosDiffSq);

		// Calculate contributions to the first and second integrals
		I1 = weiX[i]*weiY[j]*(phi[threadPos]-phiHalf[blockPos]-xDiff)*K1;

		I2 = weiX[i]*weiY[j]*(zetaX[threadPos]*K2-zetaXHalf[blockPos]*S2);

		// Accumulate integral contributions
		FuncTemp -= I1;
		FuncTemp -= I2;
		
		// Update collocation point
		threadPos += blockDim.x;
		i = threadPos%N;
		j = threadPos/N;
	}

	// Calculation of the 16 parts to the closed integral split between differnt threads
	if(threadIdx.x==blockDim.x-1){
		singInt = closedIntt(sUpper,tNegUpper,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-2){
		singInt = closedInts(sUpper,tNegUpper,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-3){
		singInt = closedIntt(sLower,tNegUpper,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-4){
		singInt = closedInts(sLower,tNegUpper,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-5){
		singInt = closedIntt(sUpper,tNegLower,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-6){
		singInt = closedInts(sUpper,tNegLower,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-7){
		singInt = closedIntt(sLower,tNegLower,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-8){
		singInt = closedInts(sLower,tNegLower,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-9){
		singInt = closedIntt(sUpper,tPosUpper,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-10){
		singInt = closedInts(sUpper,tPosUpper,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-11){
		singInt = closedIntt(sLower,tPosUpper,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-12){
		singInt = closedInts(sLower,tPosUpper,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-13){
		singInt = closedIntt(sUpper,tPosLower,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-14){
		singInt = closedInts(sUpper,tPosLower,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-15){
		singInt = closedIntt(sLower,tPosLower,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-16){
		singInt = closedInts(sLower,tPosLower,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	// Add the phi part of the BIE
	}else if(threadIdx.x==blockDim.x-17){
		FuncTemp += 2*PI*(phiHalf[blockPos]-xHalf[k]);

	
	}
	// Add the source contribution
	if(threadIdx.x==blockDim.x-18){
		sqrtStuff = sqrt((xH-source[0])*(xH-source[0])
					+(yH-source[1])*(yH-source[1])
					+(zetaHalf[blockPos]-source[2])*(zetaHalf[blockPos]-source[2]));
			if(singType[0]){
				FuncTemp += epsilon[0]/sqrtStuff;
			}else{
				FuncTemp -= epsilon[0]*(xH-source[0])/(sqrtStuff*sqrtStuff*sqrtStuff);
			}
	}

	// Add total contribution from thread to a storage vector
	thisBlock[threadIdx.x] = FuncTemp;

	// All threads finished evaluating the BIE
	__syncthreads();
   
	// Sum up all thread contributions
	for(i=blocDim/2;i>0;i=i/2){
		if(threadIdx.x<i){
			thisBlock[threadIdx.x] += thisBlock[threadIdx.x+i];
		}
		__syncthreads();
	}

	// Store complete BIE in correct loction of output vector
	if(threadIdx.x==0){
		applyBlockPos = k+(N+1)*l+2;
		Func[applyBlockPos+M*(N+1)] = thisBlock[0];
	}

	// Split the Bernoulli's equation and radion conditions between 4 blocks

	// Fist block calculates Bernoulli's equation
	if(k==0&&l==0){

		// Have each thread compute Bernoulli's equation for a mesh half point
		threadPos = threadIdx.x;
		while(threadPos<(M*(N-1))){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = i+(N+1)*j+2;

			// Bernoulli's Equation
			Func[applyBlockPos]=((1+zetaXHalf[threadPos]*zetaXHalf[threadPos])*phiYHalf[threadPos]*phiYHalf[threadPos]
							+(1+zetaYHalf[threadPos]*zetaYHalf[threadPos])*phiXHalf[threadPos]*phiXHalf[threadPos]
							-2*zetaXHalf[threadPos]*zetaYHalf[threadPos]*phiXHalf[threadPos]*phiYHalf[threadPos])/
							(2*(1+zetaXHalf[threadPos]*zetaXHalf[threadPos]+zetaYHalf[threadPos]*zetaYHalf[threadPos]))
							+zetaHalf[threadPos]/(Fr*Fr)-0.5;
		
			threadPos += blockDim.x;
		}

	//  Second block calculates the phi radiation condition
	}else if(k==0&&l==1){
		threadPos = threadIdx.x;
		while(threadPos<M){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = (N+1)*i;

			// phi radiation condition
			Func[applyBlockPos]=x[0]*(phiX[threadPos*N]-1)+n*(phi[threadPos*N]-x[0]);
			threadPos += blockDim.x;
		}

	//  Third block calculates the phiX radiation condition
	}else if(k==0&&l==2){
		threadPos = threadIdx.x;
		while(threadPos<M){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = (N+1)*i+1;

			// phiX radiation condition
			Func[applyBlockPos]=x[0]/(x[1]-x[0])*(phiX[threadPos*N+1]-phiX[threadPos*N])+n*(phiX[threadPos*N]-1);
			threadPos += blockDim.x;
		}

	//  Fourth block calculates the zeta radiation condition
	}else if(k==0&&l==3){
		threadPos = threadIdx.x;
		while(threadPos<M){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = (N+1)*i;

			// zeta radiation condition
			Func[applyBlockPos+M*(N+1)]=x[0]*zetaX[threadPos*N]+n*zeta[threadPos*N];
			threadPos += blockDim.x;
		}

	//  Fifth block calculates the zetaX radiation condition
	}else if(k==0&&l==4){
		threadPos = threadIdx.x;
		while(threadPos<M){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = (N+1)*i+1;

			// zetaX radiation condition
			Func[applyBlockPos+M*(N+1)]=x[0]/(x[1]-x[0])*(zetaX[threadPos*N+1]-zetaX[threadPos*N])+n*zetaX[threadPos*N];
			threadPos += blockDim.x;
		}
	}

}

	.file	"tmpxft_003a2bd8_00000000-6_fGutsGPU.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10closedInttddddd
	.type	_Z10closedInttddddd, @function
_Z10closedInttddddd:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_Z10closedInttddddd, .-_Z10closedInttddddd
	.globl	_Z10closedIntsddddd
	.type	_Z10closedIntsddddd, @function
_Z10closedIntsddddd:
.LFB2154:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2154:
	.size	_Z10closedIntsddddd, .-_Z10closedIntsddddd
	.globl	_Z87__device_stub__Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPdllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.type	_Z87__device_stub__Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPdllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd, @function
_Z87__device_stub__Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPdllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$488, %rsp
	.cfi_def_cfa_offset 496
	movq	496(%rsp), %rax
	movq	%rdi, 200(%rsp)
	leaq	224(%rsp), %rdi
	movq	%rsi, 192(%rsp)
	leaq	236(%rsp), %rsi
	movq	%rax, 152(%rsp)
	movq	504(%rsp), %rax
	movq	%rdx, 184(%rsp)
	leaq	208(%rsp), %rdx
	movq	%rax, 144(%rsp)
	movq	512(%rsp), %rax
	movq	%rcx, 176(%rsp)
	leaq	216(%rsp), %rcx
	movq	%rax, 136(%rsp)
	movq	520(%rsp), %rax
	movq	%r8, 168(%rsp)
	movq	%rax, 128(%rsp)
	movq	528(%rsp), %rax
	movq	%r9, 160(%rsp)
	movq	%rax, 120(%rsp)
	movq	536(%rsp), %rax
	movsd	%xmm0, 24(%rsp)
	movq	%rax, 112(%rsp)
	movq	544(%rsp), %rax
	movsd	%xmm1, 16(%rsp)
	movq	%rax, 104(%rsp)
	movq	552(%rsp), %rax
	movq	%rax, 96(%rsp)
	movq	560(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	568(%rsp), %rax
	movq	%rax, 80(%rsp)
	movq	576(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	584(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	592(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	600(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	608(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	616(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	624(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 472(%rsp)
	xorl	%eax, %eax
	leaq	200(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 320(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 328(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 336(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 344(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 352(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 360(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 368(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 376(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 384(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 392(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 400(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 408(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 416(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 424(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 432(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 440(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 448(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 456(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 464(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 224(%rsp)
	movl	$1, 232(%rsp)
	movq	%rax, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	216(%rsp)
	.cfi_def_cfa_offset 504
	leaq	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd(%rip), %rdi
	pushq	216(%rsp)
	.cfi_def_cfa_offset 512
	movq	252(%rsp), %rcx
	movl	260(%rsp), %r8d
	movq	240(%rsp), %rsi
	movl	248(%rsp), %edx
	leaq	288(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 504
	popq	%rdx
	.cfi_def_cfa_offset 496
.L6:
	movq	472(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$488, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z87__device_stub__Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPdllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd, .-_Z87__device_stub__Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPdllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.globl	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.type	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd, @function
_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z87__device_stub__Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPdllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.cfi_endproc
.LFE2035:
	.size	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd, .-_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#define PI 3.141592653589793238462643
#define blocDim 512
#define powOfTwo 4
#define timerCount 10


// Device function used when evaluating the closed integral
__device__ double closedIntt(double s, double t, double A, double B, double C)
{
	double val;
	if(t==0){
		val = 0;
	}else{
		val = t/sqrt(A)*log(2*A*s+B*t+2*sqrt(A*(A*s*s+B*s*t+C*t*t)));
	}
	return val;
}

// Device function used when evaluating the closed integral
__device__ double closedInts(double s, double t, double A, double B, double C)
{
	double val;
	if(s==0){
		val = 0;
	}else{
		val = s/sqrt(C)*log(2*C*t+B*s+2*sqrt(C*(A*s*s+B*s*t+C*t*t)));
	}
	return val;
}

// Main GPU kernel
__global__ void guts(const long int N, const long int M,
	const double * zeta,const double * zetaX,const double * zetaY,
	const double * zetaHalf,const double * zetaXHalf,const double * zetaYHalf,
	const double * phi,const double * phiX,const double * phiHalf,const double * phiXHalf,const double * phiYHalf,
	const double * x,const double * y,const double * xHalf,const double * yHalf,
	const double * weiX,const double * weiY,const double * epsilon,const double * source, const bool * singType,const double Fr,
	const double n,double * Func)
{
	__shared__ double A, B, C,sUpper,sLower,tNegUpper,tNegLower,tPosUpper,tPosLower,xH,yH,thisBlock[blocDim];
	__shared__ long int k,l,blockPos;
	double xDiff, yNegDiff, yPosDiff,xDiffSq, yNegDiffSq, yPosDiffSq, zetaDiff,radiusSqNeg,
		radiusSqPos,K1,K2,S2,I1,I2,singInt,sqrtStuff,FuncTemp = 0;
	long int i,j,threadPos,applyBlockPos;

	// First thread initialises variables
	if(threadIdx.x==0){
		k = blockIdx.x;
		l = blockIdx.y;
		blockPos = k+(N-1)*l;	// Get position of the block for mesh half ponts
		xH = xHalf[k];
		yH = yHalf[l];
		A = 1 + zetaXHalf[blockPos]*zetaXHalf[blockPos];//
		B = 2*zetaXHalf[blockPos]*zetaYHalf[blockPos];	//
		C = 1 + zetaYHalf[blockPos]*zetaYHalf[blockPos];//
		sUpper = x[N-1]-xH;								//
		sLower = x[0]-xH;								// Calculate values needed for closed integral
		tNegUpper = y[M-1]-yH;							//
		tNegLower = y[0]-yH;							//
		tPosUpper = -y[M-1]-yH;							//
		tPosLower = -y[0]-yH;							//
	}

	// After initialising variables
	__syncthreads();


	// Have each thread sum over some values of the double integrals
	threadPos = threadIdx.x;
	i = threadPos%N;
	j = threadPos/N;
	// Each loop is one collocation point
	while(threadPos<(M*N)){		

		// Calculate nessesary values
		xDiff = x[i]-xH;
		xDiffSq = xDiff*xDiff;

		yNegDiff = y[j]-yH;
		yNegDiffSq = yNegDiff*yNegDiff;

		yPosDiff = y[j]+yH;
		yPosDiffSq = yPosDiff*yPosDiff;

		zetaDiff = zeta[threadPos]-zetaHalf[blockPos];
		
		radiusSqNeg = sqrt(xDiffSq+yNegDiffSq+zetaDiff*zetaDiff);
		radiusSqPos = sqrt(xDiffSq+yPosDiffSq+zetaDiff*zetaDiff);

		// First integral kernel function
		K1 = (zetaDiff-xDiff*zetaX[threadPos]-yNegDiff*zetaY[threadPos])/(radiusSqNeg*radiusSqNeg*radiusSqNeg)+
			(zetaDiff-xDiff*zetaX[threadPos]-yPosDiff*zetaY[threadPos])/(radiusSqPos*radiusSqPos*radiusSqPos);

		// Second integral kernel function
		K2 = 1/radiusSqNeg+1/radiusSqPos;


		S2 = 1/sqrt(A*xDiffSq+B*xDiff*yNegDiff+C*yNegDiffSq)+1/sqrt(A*xDiffSq-B*xDiff*yPosDiff+C*yPosDiffSq);

		// Calculate contributions to the first and second integrals
		I1 = weiX[i]*weiY[j]*(phi[threadPos]-phiHalf[blockPos]-xDiff)*K1;

		I2 = weiX[i]*weiY[j]*(zetaX[threadPos]*K2-zetaXHalf[blockPos]*S2);

		// Accumulate integral contributions
		FuncTemp -= I1;
		FuncTemp -= I2;
		
		// Update collocation point
		threadPos += blockDim.x;
		i = threadPos%N;
		j = threadPos/N;
	}

	// Calculation of the 16 parts to the closed integral split between differnt threads
	if(threadIdx.x==blockDim.x-1){
		singInt = closedIntt(sUpper,tNegUpper,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-2){
		singInt = closedInts(sUpper,tNegUpper,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-3){
		singInt = closedIntt(sLower,tNegUpper,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-4){
		singInt = closedInts(sLower,tNegUpper,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-5){
		singInt = closedIntt(sUpper,tNegLower,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-6){
		singInt = closedInts(sUpper,tNegLower,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-7){
		singInt = closedIntt(sLower,tNegLower,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-8){
		singInt = closedInts(sLower,tNegLower,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-9){
		singInt = closedIntt(sUpper,tPosUpper,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-10){
		singInt = closedInts(sUpper,tPosUpper,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-11){
		singInt = closedIntt(sLower,tPosUpper,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-12){
		singInt = closedInts(sLower,tPosUpper,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-13){
		singInt = closedIntt(sUpper,tPosLower,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-14){
		singInt = closedInts(sUpper,tPosLower,A,B,C);
		FuncTemp -= zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-15){
		singInt = closedIntt(sLower,tPosLower,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	}else if(threadIdx.x==blockDim.x-16){
		singInt = closedInts(sLower,tPosLower,A,B,C);
		FuncTemp += zetaXHalf[blockPos]*singInt;

	// Add the phi part of the BIE
	}else if(threadIdx.x==blockDim.x-17){
		FuncTemp += 2*PI*(phiHalf[blockPos]-xHalf[k]);

	
	}
	// Add the source contribution
	if(threadIdx.x==blockDim.x-18){
		sqrtStuff = sqrt((xH-source[0])*(xH-source[0])
					+(yH-source[1])*(yH-source[1])
					+(zetaHalf[blockPos]-source[2])*(zetaHalf[blockPos]-source[2]));
			if(singType[0]){
				FuncTemp += epsilon[0]/sqrtStuff;
			}else{
				FuncTemp -= epsilon[0]*(xH-source[0])/(sqrtStuff*sqrtStuff*sqrtStuff);
			}
	}

	// Add total contribution from thread to a storage vector
	thisBlock[threadIdx.x] = FuncTemp;

	// All threads finished evaluating the BIE
	__syncthreads();
   
	// Sum up all thread contributions
	for(i=blocDim/2;i>0;i=i/2){
		if(threadIdx.x<i){
			thisBlock[threadIdx.x] += thisBlock[threadIdx.x+i];
		}
		__syncthreads();
	}

	// Store complete BIE in correct loction of output vector
	if(threadIdx.x==0){
		applyBlockPos = k+(N+1)*l+2;
		Func[applyBlockPos+M*(N+1)] = thisBlock[0];
	}

	// Split the Bernoulli's equation and radion conditions between 4 blocks

	// Fist block calculates Bernoulli's equation
	if(k==0&&l==0){

		// Have each thread compute Bernoulli's equation for a mesh half point
		threadPos = threadIdx.x;
		while(threadPos<(M*(N-1))){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = i+(N+1)*j+2;

			// Bernoulli's Equation
			Func[applyBlockPos]=((1+zetaXHalf[threadPos]*zetaXHalf[threadPos])*phiYHalf[threadPos]*phiYHalf[threadPos]
							+(1+zetaYHalf[threadPos]*zetaYHalf[threadPos])*phiXHalf[threadPos]*phiXHalf[threadPos]
							-2*zetaXHalf[threadPos]*zetaYHalf[threadPos]*phiXHalf[threadPos]*phiYHalf[threadPos])/
							(2*(1+zetaXHalf[threadPos]*zetaXHalf[threadPos]+zetaYHalf[threadPos]*zetaYHalf[threadPos]))
							+zetaHalf[threadPos]/(Fr*Fr)-0.5;
		
			threadPos += blockDim.x;
		}

	//  Second block calculates the phi radiation condition
	}else if(k==0&&l==1){
		threadPos = threadIdx.x;
		while(threadPos<M){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = (N+1)*i;

			// phi radiation condition
			Func[applyBlockPos]=x[0]*(phiX[threadPos*N]-1)+n*(phi[threadPos*N]-x[0]);
			threadPos += blockDim.x;
		}

	//  Third block calculates the phiX radiation condition
	}else if(k==0&&l==2){
		threadPos = threadIdx.x;
		while(threadPos<M){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = (N+1)*i+1;

			// phiX radiation condition
			Func[applyBlockPos]=x[0]/(x[1]-x[0])*(phiX[threadPos*N+1]-phiX[threadPos*N])+n*(phiX[threadPos*N]-1);
			threadPos += blockDim.x;
		}

	//  Fourth block calculates the zeta radiation condition
	}else if(k==0&&l==3){
		threadPos = threadIdx.x;
		while(threadPos<M){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = (N+1)*i;

			// zeta radiation condition
			Func[applyBlockPos+M*(N+1)]=x[0]*zetaX[threadPos*N]+n*zeta[threadPos*N];
			threadPos += blockDim.x;
		}

	//  Fifth block calculates the zetaX radiation condition
	}else if(k==0&&l==4){
		threadPos = threadIdx.x;
		while(threadPos<M){
			i = threadPos%(N-1);
			j = threadPos/(N-1);
			applyBlockPos = (N+1)*i+1;

			// zetaX radiation condition
			Func[applyBlockPos+M*(N+1)]=x[0]/(x[1]-x[0])*(zetaX[threadPos*N+1]-zetaX[threadPos*N])+n*zetaX[threadPos*N];
			threadPos += blockDim.x;
		}
	}

}

	.text
	.file	"fGutsGPU.hip"
	.globl	_Z19__device_stub__gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd # -- Begin function _Z19__device_stub__gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.type	_Z19__device_stub__gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd,@function
_Z19__device_stub__gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd: # @_Z19__device_stub__gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$320, %rsp                      # imm = 0x140
	.cfi_def_cfa_offset 368
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %r10
	movq	%rdi, (%r10)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %r11
	movq	%r8, (%r11)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	24(%rsp), %rax
	movsd	%xmm0, (%rax)
	leaq	16(%rsp), %rcx
	movsd	%xmm1, (%rcx)
	leaq	112(%rsp), %rbx
	movq	%r10, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r11, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	368(%rsp), %rdx
	movq	%rdx, 48(%rbx)
	leaq	376(%rsp), %rdx
	movq	%rdx, 56(%rbx)
	leaq	384(%rsp), %rdx
	movq	%rdx, 64(%rbx)
	leaq	392(%rsp), %rdx
	movq	%rdx, 72(%rbx)
	leaq	400(%rsp), %rdx
	movq	%rdx, 80(%rbx)
	leaq	408(%rsp), %rdx
	movq	%rdx, 88(%rbx)
	leaq	416(%rsp), %rdx
	movq	%rdx, 96(%rbx)
	leaq	424(%rsp), %rdx
	movq	%rdx, 104(%rbx)
	leaq	432(%rsp), %rdx
	movq	%rdx, 112(%rbx)
	leaq	440(%rsp), %rdx
	movq	%rdx, 120(%rbx)
	leaq	448(%rsp), %rdx
	movq	%rdx, 128(%rbx)
	leaq	456(%rsp), %rdx
	movq	%rdx, 136(%rbx)
	leaq	464(%rsp), %rdx
	movq	%rdx, 144(%rbx)
	leaq	472(%rsp), %rdx
	movq	%rdx, 152(%rbx)
	leaq	480(%rsp), %rdx
	movq	%rdx, 160(%rbx)
	leaq	488(%rsp), %rdx
	movq	%rdx, 168(%rbx)
	movq	%rax, 176(%rbx)
	movq	%rcx, 184(%rbx)
	leaq	496(%rsp), %rax
	movq	%rax, 192(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$336, %rsp                      # imm = 0x150
	.cfi_adjust_cfa_offset -336
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd, .Lfunc_end0-_Z19__device_stub__gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd,@object # @_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.section	.rodata,"a",@progbits
	.globl	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.p2align	3, 0x0
_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd:
	.quad	_Z19__device_stub__gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.size	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd"
	.size	.L__unnamed_1, 74

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd ; -- Begin function _Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.globl	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
	.p2align	8
	.type	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd,@function
_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd: ; @_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
; %bb.0:
	s_clause 0x2
	s_load_b512 s[16:31], s[0:1], 0x0
	s_load_b512 s[36:51], s[0:1], 0x40
	s_load_b512 s[52:67], s[0:1], 0x80
	v_cmp_eq_u32_e64 s2, 0, v0
	s_mov_b32 s4, s15
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_waitcnt lgkmcnt(0)
	s_add_u32 s5, s16, -1
	s_addc_u32 s6, s17, -1
	s_mul_hi_u32 s7, s5, s4
	s_mul_i32 s6, s6, s4
	s_mul_i32 s5, s5, s4
	s_add_i32 s7, s7, s6
	s_add_u32 s6, s5, s14
	s_addc_u32 s7, s7, 0
	s_lshl_b64 s[8:9], s[14:15], 3
	s_mov_b32 s5, s15
	s_add_u32 s8, s50, s8
	s_addc_u32 s9, s51, s9
	s_lshl_b64 s[10:11], s[4:5], 3
	v_dual_mov_b32 v25, s4 :: v_dual_mov_b32 v26, 0
	s_add_u32 s10, s52, s10
	s_addc_u32 s11, s53, s11
	s_lshl_b64 s[12:13], s[6:7], 3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v23, s14 :: v_dual_mov_b32 v24, v26
	s_add_u32 s34, s28, s12
	s_addc_u32 s35, s29, s13
	s_load_b64 s[34:35], s[34:35], 0x0
	s_load_b64 s[52:53], s[46:47], 0x0
	s_add_u32 s12, s30, s12
	s_addc_u32 s13, s31, s13
	s_lshl_b64 s[70:71], s[16:17], 3
	s_load_b64 s[8:9], s[8:9], 0x0
	s_add_u32 s5, s46, s70
	s_addc_u32 s15, s47, s71
	s_add_u32 s70, s5, -8
	s_addc_u32 s71, s15, -1
	s_lshl_b64 s[72:73], s[18:19], 3
	s_load_b64 s[68:69], s[48:49], 0x0
	s_add_u32 s5, s48, s72
	s_addc_u32 s15, s49, s73
	s_add_u32 s72, s5, -8
	s_load_b64 s[10:11], s[10:11], 0x0
	s_addc_u32 s73, s15, -1
	s_load_b64 s[70:71], s[70:71], 0x0
	s_load_b64 s[72:73], s[72:73], 0x0
	s_load_b64 s[12:13], s[12:13], 0x0
	v_dual_mov_b32 v19, s6 :: v_dual_mov_b32 v20, s7
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], s[34:35], s[34:35]
	v_fma_f64 v[13:14], s[34:35], s[34:35], 1.0
	v_mov_b32_e32 v28, s9
	v_add_f64 v[3:4], s[52:53], -s[8:9]
	v_mov_b32_e32 v27, s8
	v_add_f64 v[17:18], s[70:71], -s[8:9]
	v_add_f64 v[5:6], s[68:69], -s[10:11]
	v_add_f64 v[7:8], s[72:73], -s[10:11]
	v_fma_f64 v[21:22], s[12:13], s[12:13], 1.0
	v_add_f64 v[9:10], -s[68:69], -s[10:11]
	v_add_f64 v[11:12], -s[72:73], -s[10:11]
	v_mul_f64 v[15:16], v[1:2], s[12:13]
	v_dual_mov_b32 v2, s11 :: v_dual_mov_b32 v1, s10
	ds_store_b128 v26, v[25:28] offset:4128
	ds_store_b128 v26, v[1:4] offset:4144
	ds_store_b128 v26, v[17:20] offset:4160
	ds_store_b128 v26, v[5:8] offset:4176
	ds_store_b128 v26, v[13:16] offset:4096
	ds_store_b128 v26, v[21:24] offset:4112
	ds_store_b128 v26, v[9:12] offset:4192
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s18, s17
	s_mul_hi_u32 s4, s18, s16
	v_mov_b32_e32 v1, 0
	s_add_i32 s3, s4, s3
	s_mul_i32 s4, s19, s16
	s_mul_i32 s8, s18, s16
	s_add_i32 s9, s3, s4
	s_mov_b32 s3, exec_lo
	s_barrier
	buffer_gl0_inv
                                        ; implicit-def: $sgpr6_sgpr7
                                        ; implicit-def: $sgpr4_sgpr5
	v_cmpx_le_i64_e64 s[8:9], v[0:1]
	s_xor_b32 s3, exec_lo, s3
; %bb.3:                                ; %.._crit_edge_crit_edge
	s_add_u32 s4, s0, 0xc8
	s_addc_u32 s5, s1, 0
	s_mov_b64 s[6:7], 0
; %bb.4:                                ; %Flow598
	s_or_saveexec_b32 s33, s3
	v_dual_mov_b32 v13, s7 :: v_dual_mov_b32 v12, s6
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_xor_b32 exec_lo, exec_lo, s33
	s_cbranch_execz .LBB0_8
; %bb.5:                                ; %.lr.ph
	v_add_nc_u32_e64 v2, 0x1000, 0
	v_mov_b32_e32 v6, 0x1028
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v17, v1
	s_load_b32 s3, s[0:1], 0xd4
	ds_load_2addr_b64 v[2:5], v2 offset0:2 offset1:9
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v13, 0
	v_lshlrev_b64 v[14:15], 3, v[0:1]
	v_mov_b32_e32 v16, v0
	s_mov_b32 s69, 0
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s26, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, s27, v5, vcc_lo
	v_add_co_u32 v10, vcc_lo, s40, v4
	v_add_co_ci_u32_e32 v11, vcc_lo, s41, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s28, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s29, v5, vcc_lo
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v9
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	v_readfirstlane_b32 s12, v4
	v_readfirstlane_b32 s13, v5
	ds_load_2addr_b64 v[4:7], v6 offset1:1
	ds_load_b128 v[8:11], v8 offset:4096
	s_load_b64 s[10:11], s[4:5], 0x0
	s_load_b64 s[14:15], s[6:7], 0x0
	s_load_b64 s[34:35], s[12:13], 0x0
	s_add_u32 s12, s0, 0xc8
	s_addc_u32 s13, s1, 0
	s_lshl_b64 s[4:5], s[16:17], 3
	s_and_b32 s68, s3, 0xffff
	s_sub_u32 s70, 0, s4
	s_subb_u32 s71, 0, s5
	s_lshl_b32 s72, s68, 3
	s_ashr_i32 s52, s17, 31
.LBB0_6:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_add_u32 s4, s16, s52
	s_mov_b32 s53, s52
	s_addc_u32 s5, s17, s52
	v_ashrrev_i32_e32 v18, 31, v17
	s_xor_b64 s[4:5], s[4:5], s[52:53]
	v_cvt_f32_u32_e32 v19, s4
	v_cvt_f32_u32_e32 v20, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v21, vcc_lo, v16, v18
	v_add_co_ci_u32_e32 v22, vcc_lo, v17, v18, vcc_lo
	v_fmac_f32_e32 v19, 0x4f800000, v20
	v_xor_b32_e32 v24, s52, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v26, v21, v18
	v_xor_b32_e32 v25, v22, v18
	s_sub_u32 s3, 0, s4
	v_rcp_f32_e32 v18, v19
	s_subb_u32 s6, 0, s5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v18, 0x5f7ffffc, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v19, 0x2f800000, v18
	v_trunc_f32_e32 v19, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v18, 0xcf800000, v19
	v_cvt_u32_f32_e32 v19, v19
	v_cvt_u32_f32_e32 v18, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v20, s3, v19
	v_mul_hi_u32 v21, s3, v18
	v_mul_lo_u32 v23, s6, v18
	v_mul_lo_u32 v22, s3, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v20, v21, v20
	v_mul_hi_u32 v21, v18, v22
	v_mul_hi_u32 v27, v19, v22
	v_mul_lo_u32 v22, v19, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v20, v20, v23
	v_mul_lo_u32 v23, v18, v20
	v_mul_hi_u32 v28, v18, v20
	v_mul_hi_u32 v29, v19, v20
	v_mul_lo_u32 v20, v19, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v21, vcc_lo, v21, v23
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v21, vcc_lo, v21, v22
	v_add_co_ci_u32_e32 v21, vcc_lo, v23, v27, vcc_lo
	v_add_co_ci_u32_e32 v22, vcc_lo, 0, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v21, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v18, v20
	v_add_co_ci_u32_e32 v19, vcc_lo, v19, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v21, s3, v18
	v_mul_lo_u32 v22, s6, v18
	v_mul_lo_u32 v23, s3, v19
	v_mul_lo_u32 v20, s3, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v21, v21, v23
	v_mul_hi_u32 v27, v19, v20
	v_mul_lo_u32 v28, v19, v20
	v_mul_hi_u32 v20, v18, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v21, v21, v22
	v_mul_lo_u32 v22, v18, v21
	v_mul_hi_u32 v23, v18, v21
	v_mul_hi_u32 v29, v19, v21
	v_mul_lo_u32 v21, v19, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v20, vcc_lo, v20, v22
	v_add_co_ci_u32_e32 v22, vcc_lo, 0, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v20, v28
	v_add_co_ci_u32_e32 v20, vcc_lo, v22, v27, vcc_lo
	v_add_co_ci_u32_e32 v22, vcc_lo, 0, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v20, v21
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v18, v20
	v_add_co_ci_u32_e32 v27, vcc_lo, v19, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v28, v26, v20
	v_mad_u64_u32 v[18:19], null, v25, v20, 0
	v_mad_u64_u32 v[20:21], null, v26, v27, 0
	v_mad_u64_u32 v[22:23], null, v25, v27, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v20, vcc_lo, v28, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v20, v18
	v_add_co_ci_u32_e32 v18, vcc_lo, v21, v19, vcc_lo
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v18, v22
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v22, s5, v20
	v_mad_u64_u32 v[18:19], null, s4, v20, 0
	v_mul_lo_u32 v28, s4, v21
	v_add_co_u32 v23, vcc_lo, v20, 1
	v_add_co_ci_u32_e32 v30, vcc_lo, 0, v21, vcc_lo
	v_add_co_u32 v27, s3, v20, 2
	v_sub_co_u32 v18, vcc_lo, v26, v18
	v_add3_u32 v19, v19, v28, v22
	v_add_co_ci_u32_e64 v29, s3, 0, v21, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v22, v25, v19
	v_subrev_co_ci_u32_e64 v22, s3, s5, v22, vcc_lo
	v_sub_co_ci_u32_e32 v19, vcc_lo, v25, v19, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v18
	v_sub_co_u32 v26, s3, v18, s4
	v_cndmask_b32_e64 v18, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v22, vcc_lo, 0, v22, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s4, v26
	v_cmp_le_u32_e64 s3, s5, v22
	v_cndmask_b32_e64 v25, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v19
	v_cndmask_b32_e64 v26, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s5, v19
	v_cndmask_b32_e64 v19, 0, -1, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v18, v26, v18, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s5, v22
	v_cndmask_b32_e32 v19, v19, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e64 s3, 0, v18
	v_cmp_ne_u32_e32 vcc_lo, 0, v19
	v_dual_cndmask_b32 v19, v30, v29 :: v_dual_cndmask_b32 v18, v23, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v19, v21, v19, s3
	v_cndmask_b32_e64 v18, v20, v18, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v19, v19, v24
	v_xor_b32_e32 v18, v18, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_co_u32 v18, vcc_lo, v18, v24
	v_sub_co_ci_u32_e32 v19, vcc_lo, v19, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v23, s71, v18
	v_mad_u64_u32 v[20:21], null, s70, v18, v[14:15]
	v_mul_lo_u32 v22, s70, v19
	v_lshlrev_b64 v[18:19], 3, v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add3_u32 v68, v23, v21, v22
	v_add_co_u32 v21, vcc_lo, s46, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v22, vcc_lo, s47, v68, vcc_lo
	v_add_co_u32 v23, vcc_lo, s48, v18
	v_add_co_ci_u32_e32 v24, vcc_lo, s49, v19, vcc_lo
	global_load_b64 v[21:22], v[21:22], off
	v_add_co_u32 v25, vcc_lo, s20, v14
	global_load_b64 v[23:24], v[23:24], off
	v_add_co_ci_u32_e32 v26, vcc_lo, s21, v15, vcc_lo
	global_load_b64 v[25:26], v[25:26], off
	s_waitcnt vmcnt(2) lgkmcnt(0)
	v_add_f64 v[21:22], v[21:22], -v[4:5]
	s_waitcnt vmcnt(1)
	v_add_f64 v[27:28], v[23:24], -v[6:7]
	v_add_f64 v[23:24], v[23:24], v[6:7]
	s_waitcnt vmcnt(0)
	v_add_f64 v[25:26], v[25:26], -s[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_f64 v[29:30], v[21:22], v[21:22]
	v_mul_f64 v[35:36], v[21:22], v[10:11]
	v_mul_f64 v[37:38], v[27:28], v[27:28]
	v_mul_f64 v[39:40], v[23:24], v[23:24]
	v_fma_f64 v[31:32], v[27:28], v[27:28], v[29:30]
	v_fma_f64 v[33:34], v[23:24], v[23:24], v[29:30]
	v_mul_f64 v[29:30], v[29:30], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[31:32], v[25:26], v[25:26], v[31:32]
	v_fma_f64 v[33:34], v[25:26], v[25:26], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[41:42], v[27:28], v[35:36], v[29:30]
	v_fma_f64 v[29:30], -v[23:24], v[35:36], v[29:30]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e64 s3, 0x10000000, v[33:34]
	v_fma_f64 v[29:30], v[39:40], v[2:3], v[29:30]
	v_cndmask_b32_e64 v35, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v36, 0, 1, s3
	v_cmp_gt_f64_e64 s6, 0x10000000, v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v35, 8, v35
	v_ldexp_f64 v[31:32], v[31:32], v35
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v36, 8, v36
	v_ldexp_f64 v[33:34], v[33:34], v36
	v_fma_f64 v[35:36], v[37:38], v[2:3], v[41:42]
	v_add_co_u32 v41, s4, s22, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v42, s4, s23, v15, s4
	v_add_co_u32 v43, s4, s24, v14
	global_load_b64 v[41:42], v[41:42], off
	v_cndmask_b32_e64 v45, 0, 1, s6
	v_rsq_f64_e32 v[37:38], v[31:32]
	v_rsq_f64_e32 v[39:40], v[33:34]
	v_cmp_gt_f64_e64 s5, 0x10000000, v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v44, 0, 1, s5
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[47:48], v[33:34], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_lshlrev_b32_e32 v44, 8, v44
	v_ldexp_f64 v[35:36], v[35:36], v44
	v_lshlrev_b32_e32 v49, 8, v45
	v_mul_f64 v[45:46], v[31:32], v[37:38]
	v_mul_f64 v[37:38], v[37:38], 0.5
	v_add_co_ci_u32_e64 v44, s4, s25, v15, s4
	s_delay_alu instid0(VALU_DEP_4)
	v_ldexp_f64 v[29:30], v[29:30], v49
	global_load_b64 v[43:44], v[43:44], off
	v_fma_f64 v[51:52], -v[39:40], v[47:48], 0.5
	v_rsq_f64_e32 v[53:54], v[35:36]
	v_fma_f64 v[49:50], -v[37:38], v[45:46], 0.5
	v_rsq_f64_e32 v[55:56], v[29:30]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[47:48], v[47:48], v[51:52], v[47:48]
	v_fma_f64 v[39:40], v[39:40], v[51:52], v[39:40]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[57:58], v[35:36], v[53:54]
	v_fma_f64 v[45:46], v[45:46], v[49:50], v[45:46]
	v_mul_f64 v[53:54], v[53:54], 0.5
	v_fma_f64 v[37:38], v[37:38], v[49:50], v[37:38]
	v_mul_f64 v[59:60], v[29:30], v[55:56]
	v_mul_f64 v[55:56], v[55:56], 0.5
	v_fma_f64 v[51:52], -v[47:48], v[47:48], v[33:34]
	v_fma_f64 v[49:50], -v[45:46], v[45:46], v[31:32]
	v_fma_f64 v[61:62], -v[53:54], v[57:58], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[63:64], -v[55:56], v[59:60], 0.5
	v_fma_f64 v[47:48], v[51:52], v[39:40], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[45:46], v[49:50], v[37:38], v[45:46]
	v_fma_f64 v[49:50], v[57:58], v[61:62], v[57:58]
	v_fma_f64 v[53:54], v[53:54], v[61:62], v[53:54]
	v_fma_f64 v[51:52], v[59:60], v[63:64], v[59:60]
	v_fma_f64 v[55:56], v[55:56], v[63:64], v[55:56]
	v_fma_f64 v[59:60], -v[47:48], v[47:48], v[33:34]
	v_fma_f64 v[57:58], -v[45:46], v[45:46], v[31:32]
	v_fma_f64 v[61:62], -v[49:50], v[49:50], v[35:36]
	v_fma_f64 v[63:64], -v[51:52], v[51:52], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[39:40], v[59:60], v[39:40], v[47:48]
	v_fma_f64 v[37:38], v[57:58], v[37:38], v[45:46]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[45:46], v[61:62], v[53:54], v[49:50]
	v_cndmask_b32_e64 v49, 0, 0xffffff80, vcc_lo
	v_cndmask_b32_e64 v50, 0, 0xffffff80, s3
	v_cmp_class_f64_e64 vcc_lo, v[31:32], 0x260
	v_cmp_class_f64_e64 s3, v[33:34], 0x260
	v_fma_f64 v[47:48], v[63:64], v[55:56], v[51:52]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[25:26], -v[21:22], v[41:42], v[25:26]
	v_ldexp_f64 v[39:40], v[39:40], v50
	v_ldexp_f64 v[37:38], v[37:38], v49
	v_fma_f64 v[49:50], -v[45:46], v[45:46], v[35:36]
	v_fma_f64 v[51:52], -v[47:48], v[47:48], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v34, v40, v34, s3
	v_cndmask_b32_e64 v33, v39, v33, s3
	v_cmp_class_f64_e64 s3, v[29:30], 0x260
	v_mul_f64 v[39:40], v[33:34], v[33:34]
	v_div_scale_f64 v[83:84], s4, 1.0, v[33:34], 1.0
	v_dual_cndmask_b32 v32, v38, v32 :: v_dual_cndmask_b32 v31, v37, v31
	v_fma_f64 v[45:46], v[49:50], v[53:54], v[45:46]
	v_cmp_class_f64_e64 vcc_lo, v[35:36], 0x260
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[37:38], v[31:32], v[31:32]
	v_fma_f64 v[47:48], v[51:52], v[55:56], v[47:48]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[27:28], -v[27:28], v[43:44], v[25:26]
	v_fma_f64 v[23:24], -v[23:24], v[43:44], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, s5
	v_cndmask_b32_e64 v43, 0, 0xffffff80, s6
	v_mul_f64 v[39:40], v[33:34], v[39:40]
	s_delay_alu instid0(VALU_DEP_3)
	v_ldexp_f64 v[25:26], v[45:46], v25
	v_div_scale_f64 v[45:46], null, v[31:32], v[31:32], 1.0
	v_mul_f64 v[37:38], v[31:32], v[37:38]
	v_ldexp_f64 v[43:44], v[47:48], v43
	v_div_scale_f64 v[47:48], null, v[33:34], v[33:34], 1.0
	v_div_scale_f64 v[51:52], null, v[39:40], v[39:40], v[23:24]
	v_div_scale_f64 v[89:90], s6, v[23:24], v[39:40], v[23:24]
	v_dual_cndmask_b32 v26, v26, v36 :: v_dual_cndmask_b32 v25, v25, v35
	v_add_co_u32 v53, vcc_lo, s36, v14
	v_div_scale_f64 v[49:50], null, v[37:38], v[37:38], v[27:28]
	v_cndmask_b32_e64 v30, v44, v30, s3
	v_cndmask_b32_e64 v29, v43, v29, s3
	v_div_scale_f64 v[35:36], null, v[25:26], v[25:26], 1.0
	v_add_co_ci_u32_e32 v54, vcc_lo, s37, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_scale_f64 v[43:44], null, v[29:30], v[29:30], 1.0
	v_rcp_f64_e32 v[59:60], v[45:46]
	global_load_b64 v[53:54], v[53:54], off
	v_rcp_f64_e32 v[61:62], v[47:48]
	v_add_co_u32 v18, vcc_lo, s56, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s57, v19, vcc_lo
	v_add_co_u32 v67, vcc_lo, s54, v20
	v_add_co_ci_u32_e32 v68, vcc_lo, s55, v68, vcc_lo
	global_load_b64 v[18:19], v[18:19], off
	v_div_scale_f64 v[87:88], vcc_lo, v[27:28], v[37:38], v[27:28]
	global_load_b64 v[67:68], v[67:68], off
	v_div_scale_f64 v[81:82], s3, 1.0, v[31:32], 1.0
	v_rcp_f64_e32 v[57:58], v[51:52]
	v_div_scale_f64 v[85:86], s5, 1.0, v[25:26], 1.0
	v_rcp_f64_e32 v[55:56], v[49:50]
	v_rcp_f64_e32 v[63:64], v[35:36]
	v_rcp_f64_e32 v[65:66], v[43:44]
	v_fma_f64 v[73:74], -v[45:46], v[59:60], 1.0
	v_fma_f64 v[75:76], -v[47:48], v[61:62], 1.0
	v_fma_f64 v[71:72], -v[51:52], v[57:58], 1.0
	s_delay_alu instid0(TRANS32_DEP_3)
	v_fma_f64 v[69:70], -v[49:50], v[55:56], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[77:78], -v[35:36], v[63:64], 1.0
	v_fma_f64 v[79:80], -v[43:44], v[65:66], 1.0
	v_fma_f64 v[59:60], v[59:60], v[73:74], v[59:60]
	v_fma_f64 v[61:62], v[61:62], v[75:76], v[61:62]
	v_fma_f64 v[57:58], v[57:58], v[71:72], v[57:58]
	v_fma_f64 v[55:56], v[55:56], v[69:70], v[55:56]
	v_fma_f64 v[63:64], v[63:64], v[77:78], v[63:64]
	v_fma_f64 v[65:66], v[65:66], v[79:80], v[65:66]
	v_fma_f64 v[73:74], -v[45:46], v[59:60], 1.0
	v_fma_f64 v[75:76], -v[47:48], v[61:62], 1.0
	v_fma_f64 v[71:72], -v[51:52], v[57:58], 1.0
	v_fma_f64 v[69:70], -v[49:50], v[55:56], 1.0
	v_fma_f64 v[77:78], -v[35:36], v[63:64], 1.0
	v_fma_f64 v[79:80], -v[43:44], v[65:66], 1.0
	v_fma_f64 v[59:60], v[59:60], v[73:74], v[59:60]
	v_fma_f64 v[61:62], v[61:62], v[75:76], v[61:62]
	v_fma_f64 v[57:58], v[57:58], v[71:72], v[57:58]
	v_fma_f64 v[55:56], v[55:56], v[69:70], v[55:56]
	v_div_scale_f64 v[69:70], s7, 1.0, v[29:30], 1.0
	v_fma_f64 v[63:64], v[63:64], v[77:78], v[63:64]
	v_fma_f64 v[65:66], v[65:66], v[79:80], v[65:66]
	v_mul_f64 v[75:76], v[81:82], v[59:60]
	v_mul_f64 v[77:78], v[83:84], v[61:62]
	v_mul_f64 v[73:74], v[89:90], v[57:58]
	v_mul_f64 v[71:72], v[87:88], v[55:56]
	v_mul_f64 v[79:80], v[85:86], v[63:64]
	v_mul_f64 v[91:92], v[69:70], v[65:66]
	v_fma_f64 v[45:46], -v[45:46], v[75:76], v[81:82]
	v_fma_f64 v[47:48], -v[47:48], v[77:78], v[83:84]
	v_fma_f64 v[51:52], -v[51:52], v[73:74], v[89:90]
	v_fma_f64 v[49:50], -v[49:50], v[71:72], v[87:88]
	v_fma_f64 v[35:36], -v[35:36], v[79:80], v[85:86]
	v_fma_f64 v[43:44], -v[43:44], v[91:92], v[69:70]
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fmas_f64 v[49:50], v[49:50], v[55:56], v[71:72]
	s_mov_b32 vcc_lo, s6
	v_div_fmas_f64 v[51:52], v[51:52], v[57:58], v[73:74]
	s_mov_b32 vcc_lo, s3
	v_add_co_u32 v14, s3, v14, s72
	v_div_fmas_f64 v[45:46], v[45:46], v[59:60], v[75:76]
	s_mov_b32 vcc_lo, s4
	v_add_co_ci_u32_e64 v15, s3, 0, v15, s3
	v_div_fmas_f64 v[47:48], v[47:48], v[61:62], v[77:78]
	s_mov_b32 vcc_lo, s5
	v_div_fmas_f64 v[35:36], v[35:36], v[63:64], v[79:80]
	s_mov_b32 vcc_lo, s7
	v_div_fmas_f64 v[43:44], v[43:44], v[65:66], v[91:92]
	v_add_co_u32 v16, vcc_lo, v16, s68
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	s_waitcnt vmcnt(2)
	v_add_f64 v[53:54], v[53:54], -s[14:15]
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_le_i64_e32 vcc_lo, s[8:9], v[16:17]
	s_or_b32 s69, vcc_lo, s69
	s_waitcnt vmcnt(0)
	v_mul_f64 v[18:19], v[67:68], v[18:19]
	v_div_fixup_f64 v[27:28], v[49:50], v[37:38], v[27:28]
	v_div_fixup_f64 v[31:32], v[45:46], v[31:32], 1.0
	v_div_fixup_f64 v[33:34], v[47:48], v[33:34], 1.0
	v_div_fixup_f64 v[25:26], v[35:36], v[25:26], 1.0
	v_div_fixup_f64 v[29:30], v[43:44], v[29:30], 1.0
	v_add_f64 v[20:21], v[53:54], -v[21:22]
	v_div_fixup_f64 v[22:23], v[51:52], v[39:40], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[25:26], v[29:30]
	v_mul_f64 v[20:21], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[27:28], v[22:23]
	v_add_f64 v[26:27], v[31:32], v[33:34]
	v_mul_f64 v[24:25], s[34:35], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], -v[22:23], v[20:21], v[12:13]
	v_fma_f64 v[20:21], v[41:42], v[26:27], -v[24:25]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[18:19], v[20:21], v[12:13]
	s_and_not1_b32 exec_lo, exec_lo, s69
	s_cbranch_execnz .LBB0_6
; %bb.7:                                ; %Flow597
	s_or_b32 exec_lo, exec_lo, s69
	v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v3, s13
.LBB0_8:                                ; %Flow599
	s_or_b32 exec_lo, exec_lo, s33
	global_load_u16 v8, v[2:3], off offset:12
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, -1, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s4, exec_lo, s3
	s_cbranch_execz .LBB0_102
; %bb.9:
	v_add_nc_u32_e32 v2, -2, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s5, exec_lo, s3
	s_cbranch_execz .LBB0_97
; %bb.10:
	v_add_nc_u32_e32 v2, -3, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s6, exec_lo, s3
	s_cbranch_execz .LBB0_92
; %bb.11:
	v_add_nc_u32_e32 v2, -4, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s7, exec_lo, s3
	s_cbranch_execz .LBB0_87
; %bb.12:
	v_add_nc_u32_e32 v2, -5, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s10, exec_lo, s3
	s_cbranch_execz .LBB0_82
; %bb.13:
	v_add_nc_u32_e32 v2, -6, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s11, exec_lo, s3
	s_cbranch_execz .LBB0_77
; %bb.14:
	v_add_nc_u32_e32 v2, -7, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s12, exec_lo, s3
	s_cbranch_execz .LBB0_72
; %bb.15:
	v_add_nc_u32_e32 v2, -8, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s13, exec_lo, s3
	s_cbranch_execz .LBB0_67
; %bb.16:
	v_add_nc_u32_e32 v2, -9, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s14, exec_lo, s3
	s_cbranch_execz .LBB0_62
; %bb.17:
	v_add_nc_u32_e32 v2, -10, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s15, exec_lo, s3
	s_cbranch_execz .LBB0_57
; %bb.18:
	v_add_nc_u32_e32 v2, -11, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s24, exec_lo, s3
	s_cbranch_execz .LBB0_52
; %bb.19:
	v_add_nc_u32_e32 v2, -12, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s25, exec_lo, s3
	s_cbranch_execz .LBB0_47
; %bb.20:
	v_add_nc_u32_e32 v2, -13, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s33, exec_lo, s3
	s_cbranch_execz .LBB0_42
; %bb.21:
	v_add_nc_u32_e32 v2, -14, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s34, exec_lo, s3
	s_cbranch_execz .LBB0_37
; %bb.22:
	v_add_nc_u32_e32 v2, -15, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s35, exec_lo, s3
	s_cbranch_execz .LBB0_32
; %bb.23:
	v_add_nc_u32_e32 v2, -16, v8
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v0, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_27
; %bb.24:
	v_subrev_nc_u32_e32 v2, 17, v8
	s_mov_b32 s48, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 v0, v2
	s_cbranch_execz .LBB0_26
; %bb.25:
	v_add_nc_u32_e64 v2, 0x1000, 0
	ds_load_2addr_b64 v[2:5], v2 offset0:3 offset1:9
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s40, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s41, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s50, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s51, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_readfirstlane_b32 s40, v4
	v_readfirstlane_b32 s41, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_readfirstlane_b32 s50, v2
	v_readfirstlane_b32 s51, v3
	s_load_b64 s[40:41], s[40:41], 0x0
	s_load_b64 s[50:51], s[50:51], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], s[40:41], -s[50:51]
	s_mov_b32 s40, 0x54442d18
	s_mov_b32 s41, 0x401921fb
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[2:3], s[40:41], v[12:13]
.LBB0_26:                               ; %Flow564
	s_or_b32 exec_lo, exec_lo, s48
.LBB0_27:                               ; %Flow565
	s_and_not1_saveexec_b32 s40, s3
	s_cbranch_execz .LBB0_31
; %bb.28:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4152
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_30
; %bb.29:
	ds_load_b128 v[14:17], v6 offset:4096
	v_add_nc_u32_e64 v7, 0x1000, 0
	s_mov_b32 s49, 0x3fe55555
	s_mov_b32 s48, 0x55555555
	s_mov_b32 s50, 0x6b47b09a
	s_mov_b32 s52, 0xbf559e2b
	s_mov_b32 s51, 0x3fc38538
	s_mov_b32 s53, 0x3fc3ab76
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[2:3], v[16:17]
	ds_load_2addr_b64 v[16:19], v7 offset0:2 offset1:12
	v_mul_f64 v[9:10], v[2:3], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[16:17]
	v_mul_f64 v[14:15], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[9:10], v[14:15]
	v_fma_f64 v[9:10], v[18:19], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[16:17], v[9:10]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[9:10], v[9:10], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s41, vcc_lo, exec_lo
	s_cselect_b32 s41, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[14:15], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[9:10], v[14:15]
	v_mul_f64 v[14:15], v[14:15], 0.5
	v_fma_f64 v[22:23], -v[14:15], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[14:15], v[14:15], v[22:23], v[14:15]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[14:15], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[16:17], v[16:17]
	v_ldexp_f64 v[16:17], v[16:17], v7
	v_ldexp_f64 v[14:15], v[14:15], s41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[18:19], v[4:5]
	v_dual_cndmask_b32 v10, v15, v10 :: v_dual_cndmask_b32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[9:10], 2.0, v[4:5]
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[48:49], v[9:10]
	s_mov_b32 s48, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[9:10], v[9:10], v11
	v_cvt_f64_i32_e32 v[30:31], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	v_rcp_f64_e32 v[18:19], v[14:15]
	v_add_f64 v[24:25], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	v_mul_f64 v[26:27], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], v[14:15], -v[26:27]
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[26:27], v[9:10]
	v_add_f64 v[24:25], v[22:23], -v[14:15]
	v_add_f64 v[26:27], v[14:15], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[9:10], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[16:17]
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[20:21], v[9:10]
	v_mul_f64 v[18:19], v[14:15], v[14:15]
	v_ldexp_f64 v[28:29], v[14:15], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], s[52:53], s[50:51]
	s_mov_b32 s50, 0xd7f4df2e
	s_mov_b32 s51, 0x3fc7474d
	v_mul_f64 v[26:27], v[14:15], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[50:51]
	s_mov_b32 s50, 0x16291751
	s_mov_b32 s51, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[14:15]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[50:51]
	s_mov_b32 s50, 0x9b27acf1
	s_mov_b32 s51, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[50:51]
	s_mov_b32 s50, 0x998ef7b6
	s_mov_b32 s51, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[48:49]
	v_mul_f64 v[22:23], v[16:17], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s48, 0xfefa39ef
	s_mov_b32 s49, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[48:49]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[14:15], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[48:49], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[16:17]
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s49, 0x3c7abc9e
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[48:49], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[14:15]
	v_fma_f64 v[14:15], -v[18:19], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[14:15], v[14:15], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v14, v16 :: v_dual_cndmask_b32 v15, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_30:                               ; %_Z10closedIntsddddd.exit390
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s48, v2
	v_readfirstlane_b32 s49, v3
	s_load_b64 s[48:49], s[48:49], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[4:5], s[48:49], v[12:13]
.LBB0_31:                               ; %Flow566
	s_or_b32 exec_lo, exec_lo, s40
.LBB0_32:                               ; %Flow567
	s_and_not1_saveexec_b32 s35, s35
	s_cbranch_execz .LBB0_36
; %bb.33:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4192
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_35
; %bb.34:
	v_add_nc_u32_e64 v4, 0x1000, 0
	s_mov_b32 s41, 0x3fe55555
	s_mov_b32 s48, 0x6b47b09a
	s_mov_b32 s50, 0xbf559e2b
	ds_load_b128 v[14:17], v6 offset:4096
	ds_load_2addr_b64 v[18:21], v4 offset0:2 offset1:7
	s_mov_b32 s49, 0x3fc38538
	s_mov_b32 s51, 0x3fc3ab76
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[24:25], v[14:15], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[16:17], v[20:21]
	v_mul_f64 v[9:10], v[14:15], v[20:21]
	v_mul_f64 v[18:19], v[2:3], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[20:21], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[18:19], v[4:5]
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s40, vcc_lo, exec_lo
	s_cselect_b32 s40, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[14:15], v[14:15], v7
	v_rsq_f64_e32 v[9:10], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[4:5], v[9:10]
	v_mul_f64 v[9:10], v[9:10], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[9:10], v[18:19], 0.5
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[9:10], v[9:10], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[18:19], v[22:23], v[9:10], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[9:10], v[22:23], v[9:10], v[18:19]
	v_mul_f64 v[18:19], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], s40
	v_fma_f64 v[16:17], v[2:3], v[16:17], v[18:19]
	s_mov_b32 s40, 0x55555555
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	v_fma_f64 v[4:5], v[4:5], 2.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	v_cmp_gt_f64_e32 vcc_lo, s[40:41], v[9:10]
	s_mov_b32 s40, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x260
	v_ldexp_f64 v[9:10], v[9:10], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[30:31], v7
	v_add_f64 v[16:17], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	v_add_f64 v[24:25], v[16:17], -1.0
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[16:17], v[20:21]
	v_fma_f64 v[16:17], v[20:21], v[16:17], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[16:17]
	v_add_f64 v[16:17], v[26:27], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[22:23], -v[16:17]
	v_add_f64 v[26:27], v[16:17], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	v_add_f64 v[16:17], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[16:17], v[16:17]
	v_ldexp_f64 v[28:29], v[16:17], 1
	v_fma_f64 v[22:23], v[18:19], s[50:51], s[48:49]
	s_mov_b32 s48, 0xd7f4df2e
	s_mov_b32 s49, 0x3fc7474d
	v_mul_f64 v[26:27], v[16:17], v[18:19]
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[48:49]
	s_mov_b32 s48, 0x16291751
	s_mov_b32 s49, 0x3fcc71c0
	v_add_f64 v[9:10], v[9:10], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[48:49]
	s_mov_b32 s48, 0x9b27acf1
	s_mov_b32 s49, 0x3fd24924
	v_ldexp_f64 v[9:10], v[9:10], 1
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[48:49]
	s_mov_b32 s48, 0x998ef7b6
	s_mov_b32 s49, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[40:41]
	v_mul_f64 v[22:23], v[14:15], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s40, 0xfefa39ef
	s_mov_b32 s41, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[40:41]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[16:17], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[40:41], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[14:15]
	s_mov_b32 s40, 0x3b39803f
	s_mov_b32 s41, 0x3c7abc9e
	v_add_f64 v[16:17], v[18:19], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[40:41], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_fma_f64 v[16:17], -v[18:19], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[16:17], v[16:17], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v16, v14 :: v_dual_cndmask_b32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_35:                               ; %_Z10closedInttddddd.exit388
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s40, v2
	v_readfirstlane_b32 s41, v3
	s_load_b64 s[40:41], s[40:41], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[4:5], s[40:41], v[12:13]
.LBB0_36:                               ; %Flow568
	s_or_b32 exec_lo, exec_lo, s35
.LBB0_37:                               ; %Flow569
	s_and_not1_saveexec_b32 s34, s34
	s_cbranch_execz .LBB0_41
; %bb.38:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4160
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_40
; %bb.39:
	ds_load_b128 v[14:17], v6 offset:4096
	v_add_nc_u32_e64 v7, 0x1000, 0
	s_mov_b32 s41, 0x3fe55555
	s_mov_b32 s40, 0x55555555
	s_mov_b32 s48, 0x6b47b09a
	s_mov_b32 s50, 0xbf559e2b
	s_mov_b32 s49, 0x3fc38538
	s_mov_b32 s51, 0x3fc3ab76
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[2:3], v[16:17]
	ds_load_2addr_b64 v[16:19], v7 offset0:2 offset1:12
	v_mul_f64 v[9:10], v[2:3], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[16:17]
	v_mul_f64 v[14:15], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[9:10], v[14:15]
	v_fma_f64 v[9:10], v[18:19], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[16:17], v[9:10]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[9:10], v[9:10], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s35, vcc_lo, exec_lo
	s_cselect_b32 s35, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[14:15], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[9:10], v[14:15]
	v_mul_f64 v[14:15], v[14:15], 0.5
	v_fma_f64 v[22:23], -v[14:15], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[14:15], v[14:15], v[22:23], v[14:15]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[14:15], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[16:17], v[16:17]
	v_ldexp_f64 v[16:17], v[16:17], v7
	v_ldexp_f64 v[14:15], v[14:15], s35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[18:19], v[4:5]
	v_dual_cndmask_b32 v10, v15, v10 :: v_dual_cndmask_b32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[9:10], 2.0, v[4:5]
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[40:41], v[9:10]
	s_mov_b32 s40, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[9:10], v[9:10], v11
	v_cvt_f64_i32_e32 v[30:31], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	v_rcp_f64_e32 v[18:19], v[14:15]
	v_add_f64 v[24:25], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	v_mul_f64 v[26:27], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], v[14:15], -v[26:27]
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[26:27], v[9:10]
	v_add_f64 v[24:25], v[22:23], -v[14:15]
	v_add_f64 v[26:27], v[14:15], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[9:10], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[16:17]
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[20:21], v[9:10]
	v_mul_f64 v[18:19], v[14:15], v[14:15]
	v_ldexp_f64 v[28:29], v[14:15], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], s[50:51], s[48:49]
	s_mov_b32 s48, 0xd7f4df2e
	s_mov_b32 s49, 0x3fc7474d
	v_mul_f64 v[26:27], v[14:15], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[48:49]
	s_mov_b32 s48, 0x16291751
	s_mov_b32 s49, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[14:15]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[48:49]
	s_mov_b32 s48, 0x9b27acf1
	s_mov_b32 s49, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[48:49]
	s_mov_b32 s48, 0x998ef7b6
	s_mov_b32 s49, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[40:41]
	v_mul_f64 v[22:23], v[16:17], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s40, 0xfefa39ef
	s_mov_b32 s41, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[40:41]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[14:15], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[40:41], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[16:17]
	s_mov_b32 s40, 0x3b39803f
	s_mov_b32 s41, 0x3c7abc9e
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[40:41], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[14:15]
	v_fma_f64 v[14:15], -v[18:19], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[14:15], v[14:15], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v14, v16 :: v_dual_cndmask_b32 v15, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_40:                               ; %_Z10closedIntsddddd.exit386
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s40, v2
	v_readfirstlane_b32 s41, v3
	s_load_b64 s[40:41], s[40:41], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[4:5], s[40:41], v[12:13]
.LBB0_41:                               ; %Flow570
	s_or_b32 exec_lo, exec_lo, s34
.LBB0_42:                               ; %Flow571
	s_and_not1_saveexec_b32 s33, s33
	s_cbranch_execz .LBB0_46
; %bb.43:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4192
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_45
; %bb.44:
	v_add_nc_u32_e64 v4, 0x1000, 0
	s_mov_b32 s35, 0x3fe55555
	s_mov_b32 s40, 0x6b47b09a
	s_mov_b32 s48, 0xbf559e2b
	ds_load_b128 v[14:17], v6 offset:4096
	ds_load_2addr_b64 v[18:21], v4 offset0:2 offset1:8
	s_mov_b32 s41, 0x3fc38538
	s_mov_b32 s49, 0x3fc3ab76
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[24:25], v[14:15], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[16:17], v[20:21]
	v_mul_f64 v[9:10], v[14:15], v[20:21]
	v_mul_f64 v[18:19], v[2:3], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[20:21], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[18:19], v[4:5]
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s34, vcc_lo, exec_lo
	s_cselect_b32 s34, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[14:15], v[14:15], v7
	v_rsq_f64_e32 v[9:10], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[4:5], v[9:10]
	v_mul_f64 v[9:10], v[9:10], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[9:10], v[18:19], 0.5
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[9:10], v[9:10], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[18:19], v[22:23], v[9:10], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[9:10], v[22:23], v[9:10], v[18:19]
	v_mul_f64 v[18:19], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], s34
	v_fma_f64 v[16:17], v[2:3], v[16:17], v[18:19]
	s_mov_b32 s34, 0x55555555
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	v_fma_f64 v[4:5], v[4:5], 2.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	v_cmp_gt_f64_e32 vcc_lo, s[34:35], v[9:10]
	s_mov_b32 s34, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x260
	v_ldexp_f64 v[9:10], v[9:10], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[30:31], v7
	v_add_f64 v[16:17], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	v_add_f64 v[24:25], v[16:17], -1.0
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[16:17], v[20:21]
	v_fma_f64 v[16:17], v[20:21], v[16:17], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[16:17]
	v_add_f64 v[16:17], v[26:27], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[22:23], -v[16:17]
	v_add_f64 v[26:27], v[16:17], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	v_add_f64 v[16:17], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[16:17], v[16:17]
	v_ldexp_f64 v[28:29], v[16:17], 1
	v_fma_f64 v[22:23], v[18:19], s[48:49], s[40:41]
	s_mov_b32 s40, 0xd7f4df2e
	s_mov_b32 s41, 0x3fc7474d
	v_mul_f64 v[26:27], v[16:17], v[18:19]
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s41, 0x3fcc71c0
	v_add_f64 v[9:10], v[9:10], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s41, 0x3fd24924
	v_ldexp_f64 v[9:10], v[9:10], 1
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_mov_b32 s40, 0x998ef7b6
	s_mov_b32 s41, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[34:35]
	v_mul_f64 v[22:23], v[14:15], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s34, 0xfefa39ef
	s_mov_b32 s35, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[34:35]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[16:17], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[34:35], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[14:15]
	s_mov_b32 s34, 0x3b39803f
	s_mov_b32 s35, 0x3c7abc9e
	v_add_f64 v[16:17], v[18:19], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_fma_f64 v[16:17], -v[18:19], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[16:17], v[16:17], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v16, v14 :: v_dual_cndmask_b32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_45:                               ; %_Z10closedInttddddd.exit384
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s34, v2
	v_readfirstlane_b32 s35, v3
	s_load_b64 s[34:35], s[34:35], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[4:5], s[34:35], v[12:13]
.LBB0_46:                               ; %Flow572
	s_or_b32 exec_lo, exec_lo, s33
.LBB0_47:                               ; %Flow573
	s_and_not1_saveexec_b32 s25, s25
	s_cbranch_execz .LBB0_51
; %bb.48:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4152
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_50
; %bb.49:
	ds_load_b128 v[14:17], v6 offset:4096
	v_add_nc_u32_e64 v7, 0x1000, 0
	s_mov_b32 s35, 0x3fe55555
	s_mov_b32 s34, 0x55555555
	s_mov_b32 s40, 0x6b47b09a
	s_mov_b32 s48, 0xbf559e2b
	s_mov_b32 s41, 0x3fc38538
	s_mov_b32 s49, 0x3fc3ab76
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[2:3], v[16:17]
	ds_load_2addr_b64 v[16:19], v7 offset0:2 offset1:13
	v_mul_f64 v[9:10], v[2:3], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[16:17]
	v_mul_f64 v[14:15], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[9:10], v[14:15]
	v_fma_f64 v[9:10], v[18:19], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[16:17], v[9:10]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[9:10], v[9:10], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s33, vcc_lo, exec_lo
	s_cselect_b32 s33, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[14:15], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[9:10], v[14:15]
	v_mul_f64 v[14:15], v[14:15], 0.5
	v_fma_f64 v[22:23], -v[14:15], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[14:15], v[14:15], v[22:23], v[14:15]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[14:15], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[16:17], v[16:17]
	v_ldexp_f64 v[16:17], v[16:17], v7
	v_ldexp_f64 v[14:15], v[14:15], s33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[18:19], v[4:5]
	v_dual_cndmask_b32 v10, v15, v10 :: v_dual_cndmask_b32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[9:10], 2.0, v[4:5]
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[34:35], v[9:10]
	s_mov_b32 s34, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[9:10], v[9:10], v11
	v_cvt_f64_i32_e32 v[30:31], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	v_rcp_f64_e32 v[18:19], v[14:15]
	v_add_f64 v[24:25], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	v_mul_f64 v[26:27], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], v[14:15], -v[26:27]
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[26:27], v[9:10]
	v_add_f64 v[24:25], v[22:23], -v[14:15]
	v_add_f64 v[26:27], v[14:15], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[9:10], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[16:17]
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[20:21], v[9:10]
	v_mul_f64 v[18:19], v[14:15], v[14:15]
	v_ldexp_f64 v[28:29], v[14:15], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], s[48:49], s[40:41]
	s_mov_b32 s40, 0xd7f4df2e
	s_mov_b32 s41, 0x3fc7474d
	v_mul_f64 v[26:27], v[14:15], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s41, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[14:15]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s41, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_mov_b32 s40, 0x998ef7b6
	s_mov_b32 s41, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[34:35]
	v_mul_f64 v[22:23], v[16:17], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s34, 0xfefa39ef
	s_mov_b32 s35, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[34:35]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[14:15], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[34:35], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[16:17]
	s_mov_b32 s34, 0x3b39803f
	s_mov_b32 s35, 0x3c7abc9e
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[14:15]
	v_fma_f64 v[14:15], -v[18:19], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[14:15], v[14:15], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v14, v16 :: v_dual_cndmask_b32 v15, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_50:                               ; %_Z10closedIntsddddd.exit382
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s34, v2
	v_readfirstlane_b32 s35, v3
	s_load_b64 s[34:35], s[34:35], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[4:5], s[34:35], v[12:13]
.LBB0_51:                               ; %Flow574
	s_or_b32 exec_lo, exec_lo, s25
.LBB0_52:                               ; %Flow575
	s_and_not1_saveexec_b32 s24, s24
	s_cbranch_execz .LBB0_56
; %bb.53:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4200
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_55
; %bb.54:
	v_add_nc_u32_e64 v4, 0x1000, 0
	s_mov_b32 s35, 0x3fe55555
	s_mov_b32 s34, 0x55555555
	s_mov_b32 s40, 0x6b47b09a
	ds_load_b128 v[14:17], v6 offset:4096
	ds_load_2addr_b64 v[18:21], v4 offset0:2 offset1:7
	s_mov_b32 s48, 0xbf559e2b
	s_mov_b32 s41, 0x3fc38538
	s_mov_b32 s49, 0x3fc3ab76
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[24:25], v[14:15], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[16:17], v[20:21]
	v_mul_f64 v[9:10], v[14:15], v[20:21]
	v_mul_f64 v[18:19], v[2:3], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[20:21], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[18:19], v[4:5]
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s25, vcc_lo, exec_lo
	s_cselect_b32 s25, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[14:15], v[14:15], v7
	v_rsq_f64_e32 v[9:10], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[4:5], v[9:10]
	v_mul_f64 v[9:10], v[9:10], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[9:10], v[18:19], 0.5
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[9:10], v[9:10], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[18:19], v[22:23], v[9:10], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[9:10], v[22:23], v[9:10], v[18:19]
	v_mul_f64 v[18:19], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], s25
	v_fma_f64 v[16:17], v[2:3], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	v_fma_f64 v[4:5], v[4:5], 2.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	v_cmp_gt_f64_e32 vcc_lo, s[34:35], v[9:10]
	s_mov_b32 s34, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x260
	v_ldexp_f64 v[9:10], v[9:10], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[30:31], v7
	v_add_f64 v[16:17], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	v_add_f64 v[24:25], v[16:17], -1.0
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[16:17], v[20:21]
	v_fma_f64 v[16:17], v[20:21], v[16:17], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[16:17]
	v_add_f64 v[16:17], v[26:27], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[22:23], -v[16:17]
	v_add_f64 v[26:27], v[16:17], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	v_add_f64 v[16:17], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[16:17], v[16:17]
	v_ldexp_f64 v[28:29], v[16:17], 1
	v_fma_f64 v[22:23], v[18:19], s[48:49], s[40:41]
	s_mov_b32 s40, 0xd7f4df2e
	s_mov_b32 s41, 0x3fc7474d
	v_mul_f64 v[26:27], v[16:17], v[18:19]
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s41, 0x3fcc71c0
	v_add_f64 v[9:10], v[9:10], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s41, 0x3fd24924
	v_ldexp_f64 v[9:10], v[9:10], 1
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_mov_b32 s40, 0x998ef7b6
	s_mov_b32 s41, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[34:35]
	v_mul_f64 v[22:23], v[14:15], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s34, 0xfefa39ef
	s_mov_b32 s35, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[34:35]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[16:17], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[34:35], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[14:15]
	s_mov_b32 s34, 0x3b39803f
	s_mov_b32 s35, 0x3c7abc9e
	v_add_f64 v[16:17], v[18:19], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_fma_f64 v[16:17], -v[18:19], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[16:17], v[16:17], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v16, v14 :: v_dual_cndmask_b32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_55:                               ; %_Z10closedInttddddd.exit380
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s34, v2
	v_readfirstlane_b32 s35, v3
	s_load_b64 s[34:35], s[34:35], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[4:5], s[34:35], v[12:13]
.LBB0_56:                               ; %Flow576
	s_or_b32 exec_lo, exec_lo, s24
.LBB0_57:                               ; %Flow577
	s_and_not1_saveexec_b32 s15, s15
	s_cbranch_execz .LBB0_61
; %bb.58:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4160
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_60
; %bb.59:
	ds_load_b128 v[14:17], v6 offset:4096
	v_add_nc_u32_e64 v7, 0x1000, 0
	s_mov_b32 s25, 0x3fe55555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s40, 0xbf559e2b
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s41, 0x3fc3ab76
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[2:3], v[16:17]
	ds_load_2addr_b64 v[16:19], v7 offset0:2 offset1:13
	v_mul_f64 v[9:10], v[2:3], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[16:17]
	v_mul_f64 v[14:15], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[9:10], v[14:15]
	v_fma_f64 v[9:10], v[18:19], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[16:17], v[9:10]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[9:10], v[9:10], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s24, vcc_lo, exec_lo
	s_cselect_b32 s24, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[14:15], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[9:10], v[14:15]
	v_mul_f64 v[14:15], v[14:15], 0.5
	v_fma_f64 v[22:23], -v[14:15], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[14:15], v[14:15], v[22:23], v[14:15]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[14:15], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[16:17], v[16:17]
	v_ldexp_f64 v[16:17], v[16:17], v7
	v_ldexp_f64 v[14:15], v[14:15], s24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[18:19], v[4:5]
	s_mov_b32 s24, 0x55555555
	v_dual_cndmask_b32 v10, v15, v10 :: v_dual_cndmask_b32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[9:10], 2.0, v[4:5]
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[24:25], v[9:10]
	s_mov_b32 s24, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[9:10], v[9:10], v11
	v_cvt_f64_i32_e32 v[30:31], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	v_rcp_f64_e32 v[18:19], v[14:15]
	v_add_f64 v[24:25], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	v_mul_f64 v[26:27], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], v[14:15], -v[26:27]
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[26:27], v[9:10]
	v_add_f64 v[24:25], v[22:23], -v[14:15]
	v_add_f64 v[26:27], v[14:15], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[9:10], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[16:17]
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[20:21], v[9:10]
	v_mul_f64 v[18:19], v[14:15], v[14:15]
	v_ldexp_f64 v[28:29], v[14:15], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], s[40:41], s[34:35]
	s_mov_b32 s34, 0xd7f4df2e
	s_mov_b32 s35, 0x3fc7474d
	v_mul_f64 v[26:27], v[14:15], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[34:35]
	s_mov_b32 s34, 0x16291751
	s_mov_b32 s35, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[14:15]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[34:35]
	s_mov_b32 s34, 0x9b27acf1
	s_mov_b32 s35, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[34:35]
	s_mov_b32 s34, 0x998ef7b6
	s_mov_b32 s35, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[24:25]
	v_mul_f64 v[22:23], v[16:17], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s24, 0xfefa39ef
	s_mov_b32 s25, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[24:25]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[14:15], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[24:25], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[16:17]
	s_mov_b32 s24, 0x3b39803f
	s_mov_b32 s25, 0x3c7abc9e
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[24:25], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[14:15]
	v_fma_f64 v[14:15], -v[18:19], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[14:15], v[14:15], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v14, v16 :: v_dual_cndmask_b32 v15, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_60:                               ; %_Z10closedIntsddddd.exit378
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s24, v2
	v_readfirstlane_b32 s25, v3
	s_load_b64 s[24:25], s[24:25], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[4:5], s[24:25], v[12:13]
.LBB0_61:                               ; %Flow578
	s_or_b32 exec_lo, exec_lo, s15
.LBB0_62:                               ; %Flow579
	s_and_not1_saveexec_b32 s14, s14
	s_cbranch_execz .LBB0_66
; %bb.63:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4200
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_65
; %bb.64:
	v_add_nc_u32_e64 v4, 0x1000, 0
	s_mov_b32 s25, 0x3fe55555
	s_mov_b32 s24, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	ds_load_b128 v[14:17], v6 offset:4096
	ds_load_2addr_b64 v[18:21], v4 offset0:2 offset1:8
	s_mov_b32 s40, 0xbf559e2b
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s41, 0x3fc3ab76
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[24:25], v[14:15], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[16:17], v[20:21]
	v_mul_f64 v[9:10], v[14:15], v[20:21]
	v_mul_f64 v[18:19], v[2:3], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[20:21], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[18:19], v[4:5]
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s15, vcc_lo, exec_lo
	s_cselect_b32 s15, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[14:15], v[14:15], v7
	v_rsq_f64_e32 v[9:10], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[4:5], v[9:10]
	v_mul_f64 v[9:10], v[9:10], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[9:10], v[18:19], 0.5
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[9:10], v[9:10], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[18:19], v[22:23], v[9:10], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[9:10], v[22:23], v[9:10], v[18:19]
	v_mul_f64 v[18:19], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], s15
	v_fma_f64 v[16:17], v[2:3], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	v_fma_f64 v[4:5], v[4:5], 2.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	v_cmp_gt_f64_e32 vcc_lo, s[24:25], v[9:10]
	s_mov_b32 s24, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x260
	v_ldexp_f64 v[9:10], v[9:10], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[30:31], v7
	v_add_f64 v[16:17], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	v_add_f64 v[24:25], v[16:17], -1.0
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[16:17], v[20:21]
	v_fma_f64 v[16:17], v[20:21], v[16:17], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[16:17]
	v_add_f64 v[16:17], v[26:27], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[22:23], -v[16:17]
	v_add_f64 v[26:27], v[16:17], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	v_add_f64 v[16:17], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[16:17], v[16:17]
	v_ldexp_f64 v[28:29], v[16:17], 1
	v_fma_f64 v[22:23], v[18:19], s[40:41], s[34:35]
	s_mov_b32 s34, 0xd7f4df2e
	s_mov_b32 s35, 0x3fc7474d
	v_mul_f64 v[26:27], v[16:17], v[18:19]
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[34:35]
	s_mov_b32 s34, 0x16291751
	s_mov_b32 s35, 0x3fcc71c0
	v_add_f64 v[9:10], v[9:10], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[34:35]
	s_mov_b32 s34, 0x9b27acf1
	s_mov_b32 s35, 0x3fd24924
	v_ldexp_f64 v[9:10], v[9:10], 1
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[34:35]
	s_mov_b32 s34, 0x998ef7b6
	s_mov_b32 s35, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[24:25]
	v_mul_f64 v[22:23], v[14:15], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s24, 0xfefa39ef
	s_mov_b32 s25, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[24:25]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[16:17], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[24:25], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[14:15]
	s_mov_b32 s24, 0x3b39803f
	s_mov_b32 s25, 0x3c7abc9e
	v_add_f64 v[16:17], v[18:19], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[24:25], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_fma_f64 v[16:17], -v[18:19], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[16:17], v[16:17], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v16, v14 :: v_dual_cndmask_b32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_65:                               ; %_Z10closedInttddddd.exit376
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s24, v2
	v_readfirstlane_b32 s25, v3
	s_load_b64 s[24:25], s[24:25], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[4:5], s[24:25], v[12:13]
.LBB0_66:                               ; %Flow580
	s_or_b32 exec_lo, exec_lo, s14
.LBB0_67:                               ; %Flow581
	s_and_not1_saveexec_b32 s13, s13
	s_cbranch_execz .LBB0_71
; %bb.68:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4152
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_70
; %bb.69:
	ds_load_b128 v[14:17], v6 offset:4096
	v_add_nc_u32_e64 v7, 0x1000, 0
	s_mov_b32 s15, 0x3fe55555
	s_mov_b32 s24, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s25, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[2:3], v[16:17]
	ds_load_2addr_b64 v[16:19], v7 offset0:2 offset1:10
	v_mul_f64 v[9:10], v[2:3], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[16:17]
	v_mul_f64 v[14:15], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[9:10], v[14:15]
	v_fma_f64 v[9:10], v[18:19], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[16:17], v[9:10]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[9:10], v[9:10], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s14, vcc_lo, exec_lo
	s_cselect_b32 s14, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[14:15], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[9:10], v[14:15]
	v_mul_f64 v[14:15], v[14:15], 0.5
	v_fma_f64 v[22:23], -v[14:15], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[14:15], v[14:15], v[22:23], v[14:15]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[14:15], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[16:17], v[16:17]
	v_ldexp_f64 v[16:17], v[16:17], v7
	v_ldexp_f64 v[14:15], v[14:15], s14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[18:19], v[4:5]
	s_mov_b32 s14, 0x55555555
	v_dual_cndmask_b32 v10, v15, v10 :: v_dual_cndmask_b32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[9:10], 2.0, v[4:5]
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[14:15], v[9:10]
	s_mov_b32 s14, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[9:10], v[9:10], v11
	v_cvt_f64_i32_e32 v[30:31], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	v_rcp_f64_e32 v[18:19], v[14:15]
	v_add_f64 v[24:25], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	v_mul_f64 v[26:27], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], v[14:15], -v[26:27]
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[26:27], v[9:10]
	v_add_f64 v[24:25], v[22:23], -v[14:15]
	v_add_f64 v[26:27], v[14:15], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[9:10], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[16:17]
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[20:21], v[9:10]
	v_mul_f64 v[18:19], v[14:15], v[14:15]
	v_ldexp_f64 v[28:29], v[14:15], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], s[34:35], s[24:25]
	s_mov_b32 s24, 0xd7f4df2e
	s_mov_b32 s25, 0x3fc7474d
	v_mul_f64 v[26:27], v[14:15], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[24:25]
	s_mov_b32 s24, 0x16291751
	s_mov_b32 s25, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[14:15]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[24:25]
	s_mov_b32 s24, 0x9b27acf1
	s_mov_b32 s25, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[24:25]
	s_mov_b32 s24, 0x998ef7b6
	s_mov_b32 s25, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[14:15]
	v_mul_f64 v[22:23], v[16:17], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s14, 0xfefa39ef
	s_mov_b32 s15, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[14:15]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[14:15], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[14:15], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[16:17]
	s_mov_b32 s14, 0x3b39803f
	s_mov_b32 s15, 0x3c7abc9e
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[14:15], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[14:15]
	v_fma_f64 v[14:15], -v[18:19], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[14:15], v[14:15], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v14, v16 :: v_dual_cndmask_b32 v15, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_70:                               ; %_Z10closedIntsddddd.exit374
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s14, v2
	v_readfirstlane_b32 s15, v3
	s_load_b64 s[14:15], s[14:15], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[4:5], s[14:15], v[12:13]
.LBB0_71:                               ; %Flow582
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_72:                               ; %Flow583
	s_and_not1_saveexec_b32 s12, s12
	s_cbranch_execz .LBB0_76
; %bb.73:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4176
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_75
; %bb.74:
	v_add_nc_u32_e64 v4, 0x1000, 0
	s_mov_b32 s15, 0x3fe55555
	s_mov_b32 s14, 0x55555555
	s_mov_b32 s24, 0x6b47b09a
	ds_load_b128 v[14:17], v6 offset:4096
	ds_load_2addr_b64 v[18:21], v4 offset0:2 offset1:7
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s25, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[24:25], v[14:15], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[16:17], v[20:21]
	v_mul_f64 v[9:10], v[14:15], v[20:21]
	v_mul_f64 v[18:19], v[2:3], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[20:21], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[18:19], v[4:5]
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s13, vcc_lo, exec_lo
	s_cselect_b32 s13, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[14:15], v[14:15], v7
	v_rsq_f64_e32 v[9:10], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[4:5], v[9:10]
	v_mul_f64 v[9:10], v[9:10], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[9:10], v[18:19], 0.5
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[9:10], v[9:10], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[18:19], v[22:23], v[9:10], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[9:10], v[22:23], v[9:10], v[18:19]
	v_mul_f64 v[18:19], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], s13
	v_fma_f64 v[16:17], v[2:3], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	v_fma_f64 v[4:5], v[4:5], 2.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	v_cmp_gt_f64_e32 vcc_lo, s[14:15], v[9:10]
	s_mov_b32 s14, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x260
	v_ldexp_f64 v[9:10], v[9:10], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[30:31], v7
	v_add_f64 v[16:17], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	v_add_f64 v[24:25], v[16:17], -1.0
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[16:17], v[20:21]
	v_fma_f64 v[16:17], v[20:21], v[16:17], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[16:17]
	v_add_f64 v[16:17], v[26:27], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[22:23], -v[16:17]
	v_add_f64 v[26:27], v[16:17], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	v_add_f64 v[16:17], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[16:17], v[16:17]
	v_ldexp_f64 v[28:29], v[16:17], 1
	v_fma_f64 v[22:23], v[18:19], s[34:35], s[24:25]
	s_mov_b32 s24, 0xd7f4df2e
	s_mov_b32 s25, 0x3fc7474d
	v_mul_f64 v[26:27], v[16:17], v[18:19]
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[24:25]
	s_mov_b32 s24, 0x16291751
	s_mov_b32 s25, 0x3fcc71c0
	v_add_f64 v[9:10], v[9:10], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[24:25]
	s_mov_b32 s24, 0x9b27acf1
	s_mov_b32 s25, 0x3fd24924
	v_ldexp_f64 v[9:10], v[9:10], 1
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[24:25]
	s_mov_b32 s24, 0x998ef7b6
	s_mov_b32 s25, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[14:15]
	v_mul_f64 v[22:23], v[14:15], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s14, 0xfefa39ef
	s_mov_b32 s15, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[14:15]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[16:17], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[14:15], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[14:15]
	s_mov_b32 s14, 0x3b39803f
	s_mov_b32 s15, 0x3c7abc9e
	v_add_f64 v[16:17], v[18:19], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[14:15], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_fma_f64 v[16:17], -v[18:19], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[16:17], v[16:17], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v16, v14 :: v_dual_cndmask_b32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_75:                               ; %_Z10closedInttddddd.exit372
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s14, v2
	v_readfirstlane_b32 s15, v3
	s_load_b64 s[14:15], s[14:15], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[4:5], s[14:15], v[12:13]
.LBB0_76:                               ; %Flow584
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_77:                               ; %Flow585
	s_and_not1_saveexec_b32 s11, s11
	s_cbranch_execz .LBB0_81
; %bb.78:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4160
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_80
; %bb.79:
	ds_load_b128 v[14:17], v6 offset:4096
	v_add_nc_u32_e64 v7, 0x1000, 0
	s_mov_b32 s13, 0x3fe55555
	s_mov_b32 s14, 0x6b47b09a
	s_mov_b32 s24, 0xbf559e2b
	s_mov_b32 s15, 0x3fc38538
	s_mov_b32 s25, 0x3fc3ab76
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[2:3], v[16:17]
	ds_load_2addr_b64 v[16:19], v7 offset0:2 offset1:10
	v_mul_f64 v[9:10], v[2:3], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[16:17]
	v_mul_f64 v[14:15], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[9:10], v[14:15]
	v_fma_f64 v[9:10], v[18:19], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[16:17], v[9:10]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[9:10], v[9:10], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s12, vcc_lo, exec_lo
	s_cselect_b32 s12, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[14:15], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[9:10], v[14:15]
	v_mul_f64 v[14:15], v[14:15], 0.5
	v_fma_f64 v[22:23], -v[14:15], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[14:15], v[14:15], v[22:23], v[14:15]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[14:15], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[16:17], v[16:17]
	v_ldexp_f64 v[16:17], v[16:17], v7
	v_ldexp_f64 v[14:15], v[14:15], s12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[18:19], v[4:5]
	s_mov_b32 s12, 0x55555555
	v_dual_cndmask_b32 v10, v15, v10 :: v_dual_cndmask_b32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[9:10], 2.0, v[4:5]
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[12:13], v[9:10]
	s_mov_b32 s12, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[9:10], v[9:10], v11
	v_cvt_f64_i32_e32 v[30:31], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	v_rcp_f64_e32 v[18:19], v[14:15]
	v_add_f64 v[24:25], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	v_mul_f64 v[26:27], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], v[14:15], -v[26:27]
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[26:27], v[9:10]
	v_add_f64 v[24:25], v[22:23], -v[14:15]
	v_add_f64 v[26:27], v[14:15], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[9:10], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[16:17]
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[20:21], v[9:10]
	v_mul_f64 v[18:19], v[14:15], v[14:15]
	v_ldexp_f64 v[28:29], v[14:15], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], s[24:25], s[14:15]
	s_mov_b32 s14, 0xd7f4df2e
	s_mov_b32 s15, 0x3fc7474d
	v_mul_f64 v[26:27], v[14:15], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[14:15]
	s_mov_b32 s14, 0x16291751
	s_mov_b32 s15, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[14:15]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[14:15]
	s_mov_b32 s14, 0x9b27acf1
	s_mov_b32 s15, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[14:15]
	s_mov_b32 s14, 0x998ef7b6
	s_mov_b32 s15, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[12:13]
	v_mul_f64 v[22:23], v[16:17], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s12, 0xfefa39ef
	s_mov_b32 s13, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[12:13]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[14:15], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[12:13], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[16:17]
	s_mov_b32 s12, 0x3b39803f
	s_mov_b32 s13, 0x3c7abc9e
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[12:13], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[14:15]
	v_fma_f64 v[14:15], -v[18:19], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[14:15], v[14:15], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v14, v16 :: v_dual_cndmask_b32 v15, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_80:                               ; %_Z10closedIntsddddd.exit370
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s12, v2
	v_readfirstlane_b32 s13, v3
	s_load_b64 s[12:13], s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[4:5], s[12:13], v[12:13]
.LBB0_81:                               ; %Flow586
	s_or_b32 exec_lo, exec_lo, s11
.LBB0_82:                               ; %Flow587
	s_and_not1_saveexec_b32 s10, s10
	s_cbranch_execz .LBB0_86
; %bb.83:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4176
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_85
; %bb.84:
	v_add_nc_u32_e64 v4, 0x1000, 0
	s_mov_b32 s13, 0x3fe55555
	s_mov_b32 s12, 0x55555555
	s_mov_b32 s14, 0x6b47b09a
	ds_load_b128 v[14:17], v6 offset:4096
	ds_load_2addr_b64 v[18:21], v4 offset0:2 offset1:8
	s_mov_b32 s24, 0xbf559e2b
	s_mov_b32 s15, 0x3fc38538
	s_mov_b32 s25, 0x3fc3ab76
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[24:25], v[14:15], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[16:17], v[20:21]
	v_mul_f64 v[9:10], v[14:15], v[20:21]
	v_mul_f64 v[18:19], v[2:3], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[20:21], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[18:19], v[4:5]
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s11, vcc_lo, exec_lo
	s_cselect_b32 s11, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[14:15], v[14:15], v7
	v_rsq_f64_e32 v[9:10], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[4:5], v[9:10]
	v_mul_f64 v[9:10], v[9:10], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[9:10], v[18:19], 0.5
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[9:10], v[9:10], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[18:19], v[22:23], v[9:10], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[9:10], v[22:23], v[9:10], v[18:19]
	v_mul_f64 v[18:19], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], s11
	v_fma_f64 v[16:17], v[2:3], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	v_fma_f64 v[4:5], v[4:5], 2.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	v_cmp_gt_f64_e32 vcc_lo, s[12:13], v[9:10]
	s_mov_b32 s12, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x260
	v_ldexp_f64 v[9:10], v[9:10], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[30:31], v7
	v_add_f64 v[16:17], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	v_add_f64 v[24:25], v[16:17], -1.0
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[16:17], v[20:21]
	v_fma_f64 v[16:17], v[20:21], v[16:17], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[16:17]
	v_add_f64 v[16:17], v[26:27], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[22:23], -v[16:17]
	v_add_f64 v[26:27], v[16:17], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	v_add_f64 v[16:17], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[16:17], v[16:17]
	v_ldexp_f64 v[28:29], v[16:17], 1
	v_fma_f64 v[22:23], v[18:19], s[24:25], s[14:15]
	s_mov_b32 s14, 0xd7f4df2e
	s_mov_b32 s15, 0x3fc7474d
	v_mul_f64 v[26:27], v[16:17], v[18:19]
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[14:15]
	s_mov_b32 s14, 0x16291751
	s_mov_b32 s15, 0x3fcc71c0
	v_add_f64 v[9:10], v[9:10], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[14:15]
	s_mov_b32 s14, 0x9b27acf1
	s_mov_b32 s15, 0x3fd24924
	v_ldexp_f64 v[9:10], v[9:10], 1
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[14:15]
	s_mov_b32 s14, 0x998ef7b6
	s_mov_b32 s15, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[12:13]
	v_mul_f64 v[22:23], v[14:15], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s12, 0xfefa39ef
	s_mov_b32 s13, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[12:13]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[16:17], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[12:13], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[14:15]
	s_mov_b32 s12, 0x3b39803f
	s_mov_b32 s13, 0x3c7abc9e
	v_add_f64 v[16:17], v[18:19], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[12:13], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_fma_f64 v[16:17], -v[18:19], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[16:17], v[16:17], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v16, v14 :: v_dual_cndmask_b32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_85:                               ; %_Z10closedInttddddd.exit368
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s12, v2
	v_readfirstlane_b32 s13, v3
	s_load_b64 s[12:13], s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[4:5], s[12:13], v[12:13]
.LBB0_86:                               ; %Flow588
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_87:                               ; %Flow589
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB0_91
; %bb.88:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4152
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_90
; %bb.89:
	ds_load_b128 v[14:17], v6 offset:4096
	v_add_nc_u32_e64 v7, 0x1000, 0
	s_mov_b32 s11, 0x3fe55555
	s_mov_b32 s12, 0x6b47b09a
	s_mov_b32 s14, 0xbf559e2b
	s_mov_b32 s13, 0x3fc38538
	s_mov_b32 s15, 0x3fc3ab76
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[2:3], v[16:17]
	ds_load_2addr_b64 v[16:19], v7 offset0:2 offset1:11
	v_mul_f64 v[9:10], v[2:3], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[16:17]
	v_mul_f64 v[14:15], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[9:10], v[14:15]
	v_fma_f64 v[9:10], v[18:19], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[16:17], v[9:10]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[9:10], v[9:10], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s10, vcc_lo, exec_lo
	s_cselect_b32 s10, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[14:15], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[9:10], v[14:15]
	v_mul_f64 v[14:15], v[14:15], 0.5
	v_fma_f64 v[22:23], -v[14:15], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[14:15], v[14:15], v[22:23], v[14:15]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[14:15], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[16:17], v[16:17]
	v_ldexp_f64 v[16:17], v[16:17], v7
	v_ldexp_f64 v[14:15], v[14:15], s10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[18:19], v[4:5]
	s_mov_b32 s10, 0x55555555
	v_dual_cndmask_b32 v10, v15, v10 :: v_dual_cndmask_b32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[9:10], 2.0, v[4:5]
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[10:11], v[9:10]
	s_mov_b32 s10, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[9:10], v[9:10], v11
	v_cvt_f64_i32_e32 v[30:31], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	v_rcp_f64_e32 v[18:19], v[14:15]
	v_add_f64 v[24:25], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	v_mul_f64 v[26:27], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], v[14:15], -v[26:27]
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[26:27], v[9:10]
	v_add_f64 v[24:25], v[22:23], -v[14:15]
	v_add_f64 v[26:27], v[14:15], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[9:10], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[16:17]
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[20:21], v[9:10]
	v_mul_f64 v[18:19], v[14:15], v[14:15]
	v_ldexp_f64 v[28:29], v[14:15], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], s[14:15], s[12:13]
	s_mov_b32 s12, 0xd7f4df2e
	s_mov_b32 s13, 0x3fc7474d
	v_mul_f64 v[26:27], v[14:15], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[12:13]
	s_mov_b32 s12, 0x16291751
	s_mov_b32 s13, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[14:15]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[12:13]
	s_mov_b32 s12, 0x9b27acf1
	s_mov_b32 s13, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[12:13]
	s_mov_b32 s12, 0x998ef7b6
	s_mov_b32 s13, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[10:11]
	v_mul_f64 v[22:23], v[16:17], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s10, 0xfefa39ef
	s_mov_b32 s11, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[10:11]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[14:15], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[10:11], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[16:17]
	s_mov_b32 s10, 0x3b39803f
	s_mov_b32 s11, 0x3c7abc9e
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[10:11], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[14:15]
	v_fma_f64 v[14:15], -v[18:19], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[14:15], v[14:15], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v14, v16 :: v_dual_cndmask_b32 v15, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_90:                               ; %_Z10closedIntsddddd.exit366
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s10, v2
	v_readfirstlane_b32 s11, v3
	s_load_b64 s[10:11], s[10:11], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[4:5], s[10:11], v[12:13]
.LBB0_91:                               ; %Flow590
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_92:                               ; %Flow591
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB0_96
; %bb.93:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4184
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_95
; %bb.94:
	v_add_nc_u32_e64 v4, 0x1000, 0
	s_mov_b32 s11, 0x3fe55555
	s_mov_b32 s10, 0x55555555
	s_mov_b32 s12, 0x6b47b09a
	ds_load_b128 v[14:17], v6 offset:4096
	ds_load_2addr_b64 v[18:21], v4 offset0:2 offset1:7
	s_mov_b32 s14, 0xbf559e2b
	s_mov_b32 s13, 0x3fc38538
	s_mov_b32 s15, 0x3fc3ab76
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[24:25], v[14:15], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[16:17], v[20:21]
	v_mul_f64 v[9:10], v[14:15], v[20:21]
	v_mul_f64 v[18:19], v[2:3], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[20:21], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[18:19], v[4:5]
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s7, vcc_lo, exec_lo
	s_cselect_b32 s7, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[14:15], v[14:15], v7
	v_rsq_f64_e32 v[9:10], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[4:5], v[9:10]
	v_mul_f64 v[9:10], v[9:10], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[9:10], v[18:19], 0.5
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[9:10], v[9:10], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[18:19], v[22:23], v[9:10], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[9:10], v[22:23], v[9:10], v[18:19]
	v_mul_f64 v[18:19], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], s7
	v_fma_f64 v[16:17], v[2:3], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	v_fma_f64 v[4:5], v[4:5], 2.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	v_cmp_gt_f64_e32 vcc_lo, s[10:11], v[9:10]
	s_mov_b32 s10, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x260
	v_ldexp_f64 v[9:10], v[9:10], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[30:31], v7
	v_add_f64 v[16:17], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	v_add_f64 v[24:25], v[16:17], -1.0
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[16:17], v[20:21]
	v_fma_f64 v[16:17], v[20:21], v[16:17], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[16:17]
	v_add_f64 v[16:17], v[26:27], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[22:23], -v[16:17]
	v_add_f64 v[26:27], v[16:17], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	v_add_f64 v[16:17], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[16:17], v[16:17]
	v_ldexp_f64 v[28:29], v[16:17], 1
	v_fma_f64 v[22:23], v[18:19], s[14:15], s[12:13]
	s_mov_b32 s12, 0xd7f4df2e
	s_mov_b32 s13, 0x3fc7474d
	v_mul_f64 v[26:27], v[16:17], v[18:19]
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[12:13]
	s_mov_b32 s12, 0x16291751
	s_mov_b32 s13, 0x3fcc71c0
	v_add_f64 v[9:10], v[9:10], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[12:13]
	s_mov_b32 s12, 0x9b27acf1
	s_mov_b32 s13, 0x3fd24924
	v_ldexp_f64 v[9:10], v[9:10], 1
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[12:13]
	s_mov_b32 s12, 0x998ef7b6
	s_mov_b32 s13, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[10:11]
	v_mul_f64 v[22:23], v[14:15], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s10, 0xfefa39ef
	s_mov_b32 s11, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[10:11]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[16:17], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[10:11], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[14:15]
	s_mov_b32 s10, 0x3b39803f
	s_mov_b32 s11, 0x3c7abc9e
	v_add_f64 v[16:17], v[18:19], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[10:11], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_fma_f64 v[16:17], -v[18:19], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[16:17], v[16:17], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v16, v14 :: v_dual_cndmask_b32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_95:                               ; %_Z10closedInttddddd.exit364
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s10, v2
	v_readfirstlane_b32 s11, v3
	s_load_b64 s[10:11], s[10:11], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[4:5], s[10:11], v[12:13]
.LBB0_96:                               ; %Flow592
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_97:                               ; %Flow593
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB0_101
; %bb.98:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4160
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_100
; %bb.99:
	ds_load_b128 v[14:17], v6 offset:4096
	v_add_nc_u32_e64 v7, 0x1000, 0
	s_mov_b32 s7, 0x3fe55555
	s_mov_b32 s10, 0x6b47b09a
	s_mov_b32 s12, 0xbf559e2b
	s_mov_b32 s11, 0x3fc38538
	s_mov_b32 s13, 0x3fc3ab76
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[2:3], v[16:17]
	ds_load_2addr_b64 v[16:19], v7 offset0:2 offset1:11
	v_mul_f64 v[9:10], v[2:3], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[16:17]
	v_mul_f64 v[14:15], v[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[9:10], v[14:15]
	v_fma_f64 v[9:10], v[18:19], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[16:17], v[9:10]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[9:10], v[9:10], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s6, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[14:15], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[9:10], v[14:15]
	v_mul_f64 v[14:15], v[14:15], 0.5
	v_fma_f64 v[22:23], -v[14:15], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[14:15], v[14:15], v[22:23], v[14:15]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[14:15], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[16:17], v[16:17]
	v_ldexp_f64 v[16:17], v[16:17], v7
	v_ldexp_f64 v[14:15], v[14:15], s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[18:19], v[4:5]
	s_mov_b32 s6, 0x55555555
	v_dual_cndmask_b32 v10, v15, v10 :: v_dual_cndmask_b32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[9:10], 2.0, v[4:5]
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[6:7], v[9:10]
	s_mov_b32 s6, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[9:10], v[9:10], v11
	v_cvt_f64_i32_e32 v[30:31], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	v_rcp_f64_e32 v[18:19], v[14:15]
	v_add_f64 v[24:25], v[14:15], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[14:15], v[18:19], 1.0
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	v_mul_f64 v[26:27], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], v[14:15], -v[26:27]
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[26:27], v[9:10]
	v_add_f64 v[24:25], v[22:23], -v[14:15]
	v_add_f64 v[26:27], v[14:15], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[9:10], v[9:10], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[16:17]
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[20:21], v[9:10]
	v_mul_f64 v[18:19], v[14:15], v[14:15]
	v_ldexp_f64 v[28:29], v[14:15], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], s[12:13], s[10:11]
	s_mov_b32 s10, 0xd7f4df2e
	s_mov_b32 s11, 0x3fc7474d
	v_mul_f64 v[26:27], v[14:15], v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[10:11]
	s_mov_b32 s10, 0x16291751
	s_mov_b32 s11, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[14:15]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[10:11]
	s_mov_b32 s10, 0x9b27acf1
	s_mov_b32 s11, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], 1
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[10:11]
	s_mov_b32 s10, 0x998ef7b6
	s_mov_b32 s11, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[6:7]
	v_mul_f64 v[22:23], v[16:17], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s6, 0xfefa39ef
	s_mov_b32 s7, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[6:7]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[14:15], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[6:7], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[16:17]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[6:7], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[14:15]
	v_fma_f64 v[14:15], -v[18:19], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[14:15], v[14:15], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v14, v16 :: v_dual_cndmask_b32 v15, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_100:                              ; %_Z10closedIntsddddd.exit
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s6, v2
	v_readfirstlane_b32 s7, v3
	s_load_b64 s[6:7], s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[4:5], s[6:7], v[12:13]
.LBB0_101:                              ; %Flow594
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_102:                              ; %Flow595
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB0_106
; %bb.103:
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	ds_load_b64 v[2:3], v6 offset:4184
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_105
; %bb.104:
	v_add_nc_u32_e64 v4, 0x1000, 0
	s_mov_b32 s7, 0x3fe55555
	s_mov_b32 s6, 0x55555555
	s_mov_b32 s10, 0x6b47b09a
	ds_load_b128 v[14:17], v6 offset:4096
	ds_load_2addr_b64 v[18:21], v4 offset0:2 offset1:8
	s_mov_b32 s12, 0xbf559e2b
	s_mov_b32 s11, 0x3fc38538
	s_mov_b32 s13, 0x3fc3ab76
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[24:25], v[14:15], v[14:15]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], v[16:17], v[20:21]
	v_mul_f64 v[9:10], v[14:15], v[20:21]
	v_mul_f64 v[18:19], v[2:3], v[18:19]
	v_cmp_gt_f64_e64 s3, 0x10000000, v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[20:21], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[18:19], v[4:5]
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v7
	v_cndmask_b32_e64 v7, 0, 1, s3
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	s_and_b32 s5, vcc_lo, exec_lo
	s_cselect_b32 s5, 0xffffff80, 0
	v_lshlrev_b32_e32 v7, 8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[14:15], v[14:15], v7
	v_rsq_f64_e32 v[9:10], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[18:19], v[4:5], v[9:10]
	v_mul_f64 v[9:10], v[9:10], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[9:10], v[18:19], 0.5
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[9:10], v[9:10], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[18:19], v[22:23], v[9:10], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[18:19], v[4:5]
	v_fma_f64 v[9:10], v[22:23], v[9:10], v[18:19]
	v_mul_f64 v[18:19], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[9:10], v[9:10], s5
	v_fma_f64 v[16:17], v[2:3], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	v_fma_f64 v[4:5], v[4:5], 2.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e32 v[9:10], v[4:5]
	v_frexp_exp_i32_f64_e32 v7, v[4:5]
	v_cmp_gt_f64_e32 vcc_lo, s[6:7], v[9:10]
	s_mov_b32 s6, 0x55555780
	v_cndmask_b32_e64 v11, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x260
	v_ldexp_f64 v[9:10], v[9:10], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[30:31], v7
	v_add_f64 v[16:17], v[9:10], 1.0
	v_add_f64 v[22:23], v[9:10], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[16:17]
	v_add_f64 v[24:25], v[16:17], -1.0
	v_add_f64 v[9:10], v[9:10], -v[24:25]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[20:21], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[16:17], v[20:21]
	v_fma_f64 v[16:17], v[20:21], v[16:17], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[20:21], v[9:10], v[16:17]
	v_add_f64 v[16:17], v[26:27], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[22:23], -v[16:17]
	v_add_f64 v[26:27], v[16:17], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[26:27], -v[9:10]
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_add_f64 v[9:10], v[24:25], v[9:10]
	v_rsq_f64_e32 v[24:25], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[18:19], v[9:10]
	v_add_f64 v[16:17], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[16:17], v[16:17]
	v_ldexp_f64 v[28:29], v[16:17], 1
	v_fma_f64 v[22:23], v[18:19], s[12:13], s[10:11]
	s_mov_b32 s10, 0xd7f4df2e
	s_mov_b32 s11, 0x3fc7474d
	v_mul_f64 v[26:27], v[16:17], v[18:19]
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[10:11]
	s_mov_b32 s10, 0x16291751
	s_mov_b32 s11, 0x3fcc71c0
	v_add_f64 v[9:10], v[9:10], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[10:11]
	s_mov_b32 s10, 0x9b27acf1
	s_mov_b32 s11, 0x3fd24924
	v_ldexp_f64 v[9:10], v[9:10], 1
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[10:11]
	s_mov_b32 s10, 0x998ef7b6
	s_mov_b32 s11, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[18:19], v[18:19], v[22:23], s[6:7]
	v_mul_f64 v[22:23], v[14:15], v[24:25]
	v_mul_f64 v[24:25], v[24:25], 0.5
	s_mov_b32 s6, 0xfefa39ef
	s_mov_b32 s7, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[30:31], s[6:7]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[24:25], v[22:23], 0.5
	v_add_f64 v[20:21], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_add_f64 v[16:17], v[20:21], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[6:7], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[14:15]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_add_f64 v[16:17], v[18:19], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[26:27], v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[30:31], s[6:7], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[16:17]
	v_fma_f64 v[16:17], -v[18:19], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[32:33], v[22:23]
	v_add_f64 v[28:29], v[20:21], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[18:19]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[26:27], v[28:29]
	v_add_f64 v[20:21], v[28:29], -v[20:21]
	v_ldexp_f64 v[16:17], v[16:17], s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[24:25], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[20:21]
	v_dual_cndmask_b32 v14, v16, v14 :: v_dual_cndmask_b32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], v[2:3]
	v_add_f64 v[32:33], v[18:19], -v[24:25]
	v_add_f64 v[20:21], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[22:23], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[34:35], v[16:17]
	v_add_f64 v[24:25], v[26:27], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[16:17], v[34:35], 1.0
	v_add_f64 v[20:21], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[34:35], v[26:27], v[34:35]
	v_add_f64 v[26:27], v[28:29], -v[22:23]
	v_div_scale_f64 v[34:35], vcc_lo, v[2:3], v[14:15], v[2:3]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], -v[16:17], v[24:25], 1.0
	v_add_f64 v[28:29], v[28:29], -v[26:27]
	v_add_f64 v[9:10], v[9:10], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[18:19], v[20:21]
	v_fma_f64 v[24:25], v[24:25], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[18:19], v[32:33], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[26:27], v[34:35], v[24:25]
	v_add_f64 v[9:10], v[9:10], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_fma_f64 v[16:17], -v[16:17], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[18:19]
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_div_fixup_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v9, v4, vcc_lo
	v_cndmask_b32_e32 v9, v10, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7ff80000, v9, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v9, 0, v7, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v10, 0xfff00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[4:5], v[2:3], v[9:10]
.LBB0_105:                              ; %_Z10closedInttddddd.exit
	ds_load_b64 v[2:3], v6 offset:4168
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s28, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s6, v2
	v_readfirstlane_b32 s7, v3
	s_load_b64 s[6:7], s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[4:5], s[6:7], v[12:13]
.LBB0_106:                              ; %Flow596
	s_or_b32 exec_lo, exec_lo, s4
	v_subrev_nc_u32_e32 v2, 18, v8
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 v0, v2
	s_cbranch_execz .LBB0_113
; %bb.107:
	v_dual_mov_b32 v2, 0x1028 :: v_dual_mov_b32 v9, 0
	s_load_b128 s[12:15], s[60:61], 0x0
	ds_load_2addr_b64 v[2:5], v2 offset1:1
	ds_load_b64 v[6:7], v9 offset:4168
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[4:5], v[4:5], -s[14:15]
	v_add_f64 v[2:3], v[2:3], -s[12:13]
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s26, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s27, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_load_b64 s[10:11], s[60:61], 0x10
	s_load_b64 s[4:5], s[4:5], 0x0
	global_load_u8 v11, v9, s[62:63]
	v_mul_f64 v[4:5], v[4:5], v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[6:7], s[4:5], -s[10:11]
	s_load_b64 s[4:5], s[58:59], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[6:7], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_and_b32 s3, vcc_lo, exec_lo
	s_cselect_b32 s3, 0xffffff80, 0
	v_lshlrev_b32_e32 v6, 8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v6
	v_rsq_f64_e32 v[6:7], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[9:10], v[4:5], v[6:7]
	v_mul_f64 v[6:7], v[6:7], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], -v[6:7], v[9:10], 0.5
	v_fma_f64 v[9:10], v[9:10], v[14:15], v[9:10]
	v_fma_f64 v[6:7], v[6:7], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], -v[9:10], v[9:10], v[4:5]
	v_fma_f64 v[9:10], v[14:15], v[6:7], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], -v[9:10], v[9:10], v[4:5]
	v_fma_f64 v[6:7], v[14:15], v[6:7], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[6:7], v[6:7], s3
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 0, v11
	v_dual_cndmask_b32 v5, v7, v5 :: v_dual_cndmask_b32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s3
	s_mov_b32 s3, 0
	s_cbranch_vccnz .LBB0_109
; %bb.108:
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[6:7], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[14:15], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], -v[6:7], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[14:15], v[9:10]
	v_div_scale_f64 v[14:15], vcc_lo, s[4:5], v[4:5], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[14:15], v[9:10]
	v_fma_f64 v[6:7], -v[6:7], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[6:7], v[6:7], v[9:10], v[16:17]
	v_div_fixup_f64 v[6:7], v[6:7], v[4:5], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[12:13], v[6:7]
	s_branch .LBB0_110
.LBB0_109:
	s_mov_b32 s3, -1
                                        ; implicit-def: $vgpr6_vgpr7
.LBB0_110:                              ; %Flow562
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_112
; %bb.111:
	v_mul_f64 v[6:7], v[4:5], v[4:5]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[2:3], v[2:3], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], v[6:7]
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[6:7], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[14:15], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], -v[6:7], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[14:15], v[9:10]
	v_div_scale_f64 v[14:15], vcc_lo, v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[14:15], v[9:10]
	v_fma_f64 v[6:7], -v[6:7], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[6:7], v[6:7], v[9:10], v[16:17]
	v_div_fixup_f64 v[2:3], v[6:7], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[12:13], -v[2:3]
.LBB0_112:                              ; %Flow563
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v13, v7 :: v_dual_mov_b32 v12, v6
.LBB0_113:
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b32_e32 v2, 3, v0
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[4:5], 0x100
	ds_store_b64 v2, v[12:13]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_114:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u64_e64 s[4:5], v[0:1]
	s_cbranch_execz .LBB0_116
; %bb.115:                              ;   in Loop: Header=BB0_114 Depth=1
	v_lshl_add_u32 v3, s4, 3, v2
	ds_load_b64 v[3:4], v3
	ds_load_b64 v[5:6], v2
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[5:6]
	ds_store_b64 v2, v[3:4]
.LBB0_116:                              ;   in Loop: Header=BB0_114 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_u64_e64 s3, s[4:5], 1
	s_lshr_b64 s[4:5], s[4:5], 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_114
; %bb.117:
	v_mov_b32_e32 v2, 0x1018
	s_load_b64 s[4:5], s[0:1], 0xc0
	ds_load_2addr_b64 v[2:5], v2 offset1:1
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s7, v3
	v_readfirstlane_b32 s6, v2
	v_readfirstlane_b32 s1, v5
	v_readfirstlane_b32 s0, v4
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_119
; %bb.118:
	v_mov_b32_e32 v4, 0
	s_add_u32 s2, s16, 1
	s_addc_u32 s10, s17, 0
	s_mul_hi_u32 s11, s0, s2
	s_mul_i32 s10, s0, s10
	ds_load_b64 v[2:3], v4
	s_add_i32 s10, s11, s10
	s_mul_i32 s11, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s11, s10, s11
	s_add_u32 s12, s8, s18
	s_addc_u32 s13, s9, s19
	s_lshl_b64 s[14:15], s[6:7], 3
	s_mul_i32 s10, s0, s2
	s_add_u32 s2, s4, s14
	s_addc_u32 s14, s5, s15
	s_lshl_b64 s[10:11], s[10:11], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s2, s2, s10
	s_addc_u32 s14, s14, s11
	s_lshl_b64 s[10:11], s[12:13], 3
	s_add_u32 s10, s2, s10
	s_addc_u32 s11, s14, s11
	s_waitcnt lgkmcnt(0)
	global_store_b64 v4, v[2:3], s[10:11] offset:16
.LBB0_119:
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	s_or_b64 s[10:11], s[6:7], s[0:1]
	s_cmp_eq_u64 s[6:7], 0
	s_mov_b32 s3, -1
	s_cselect_b32 s2, -1, 0
	s_cmp_lg_u64 s[10:11], 0
	s_cbranch_scc0 .LBB0_145
; %bb.120:
	s_cmp_eq_u64 s[0:1], 1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s2, s3
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_mov_b32 s3, -1
	s_cbranch_vccz .LBB0_139
; %bb.121:
	s_cmp_eq_u64 s[0:1], 2
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s2, s3
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_mov_b32 s3, -1
	s_cbranch_vccz .LBB0_133
; %bb.122:
	s_cmp_eq_u64 s[0:1], 3
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s2, s3
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_mov_b32 s3, -1
	s_cbranch_vccz .LBB0_127
; %bb.123:
	s_cmp_eq_u64 s[0:1], 4
	v_cmp_gt_i64_e32 vcc_lo, s[18:19], v[0:1]
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s2, s0
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s10, s0
	s_cbranch_execz .LBB0_126
; %bb.124:                              ; %.lr.ph403
	v_mad_u64_u32 v[2:3], null, s16, v0, 0
	v_mad_u64_u32 v[4:5], null, s16, v8, 0
	s_add_u32 s11, s16, -1
	s_addc_u32 s12, s17, -1
	s_add_u32 s13, s16, 1
	s_addc_u32 s14, s17, 0
	s_mul_i32 s1, s13, s19
	s_mul_hi_u32 s2, s13, s18
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s17, v0, v[3:4]
	s_mul_i32 s3, s14, s18
	s_add_i32 s1, s2, s1
	s_mul_i32 s0, s13, s18
	s_add_i32 s1, s1, s3
	v_mov_b32_e32 v9, 0
	s_lshl_b64 s[0:1], s[0:1], 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v6
	v_mad_u64_u32 v[6:7], null, s17, v8, v[5:6]
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_add_u32 s15, s0, 8
	s_addc_u32 s24, s1, 0
	s_mov_b32 s25, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v5, v6
	s_ashr_i32 s2, s12, 31
	v_add_co_u32 v6, vcc_lo, v2, s22
	v_add_co_ci_u32_e32 v7, vcc_lo, s23, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v7, vcc_lo
	v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
.LBB0_125:                              ; =>This Inner Loop Header: Depth=1
	global_load_b128 v[10:13], v9, s[46:47]
	s_add_u32 s0, s11, s2
	s_mov_b32 s3, s2
	s_addc_u32 s1, s12, s2
	v_ashrrev_i32_e32 v30, 31, v7
	s_xor_b64 s[6:7], s[0:1], s[2:3]
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_sub_u32 s1, 0, s6
	s_subb_u32 s3, 0, s7
	v_add_co_u32 v24, vcc_lo, v6, v30
	v_add_co_ci_u32_e32 v25, vcc_lo, v7, v30, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v32, v24, v30
	v_xor_b32_e32 v31, v25, v30
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[12:13], -v[10:11]
	global_load_b128 v[12:15], v[4:5], off offset:-8
	v_div_scale_f64 v[18:19], null, v[16:17], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_cvt_f32_u32_e32 v22, s6
	v_cvt_f32_u32_e32 v23, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, 0x4f800000, v23
	v_rcp_f32_e32 v24, v22
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v24, 0x5f7ffffc, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v25, 0x2f800000, v24
	v_trunc_f32_e32 v25, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v24, 0xcf800000, v25
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_cvt_u32_f32_e32 v26, v25
	v_cvt_u32_f32_e32 v27, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v24, s1, v26
	v_mul_hi_u32 v25, s1, v27
	v_mul_lo_u32 v29, s3, v27
	v_mul_lo_u32 v28, s1, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v33, v25, v24
	v_div_scale_f64 v[24:25], s0, v[10:11], v[16:17], v[10:11]
	v_mul_hi_u32 v34, v27, v28
	v_mul_hi_u32 v35, v26, v28
	v_mul_lo_u32 v28, v26, v28
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_add_nc_u32_e32 v22, v33, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v23, v27, v22
	v_mul_hi_u32 v29, v27, v22
	v_mul_hi_u32 v33, v26, v22
	v_mul_lo_u32 v22, v26, v22
	v_add_co_u32 v23, vcc_lo, v34, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v29, vcc_lo, 0, v29, vcc_lo
	v_add_co_u32 v23, vcc_lo, v23, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, v29, v35, vcc_lo
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v33, vcc_lo
	v_add_co_u32 v22, vcc_lo, v23, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v28, vcc_lo
	v_add_co_u32 v27, vcc_lo, v27, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v26, vcc_lo, v26, v23, vcc_lo
	v_mul_hi_u32 v28, s1, v27
	v_mul_lo_u32 v33, s3, v27
	v_mul_f64 v[22:23], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v34, s1, v26
	v_mul_lo_u32 v29, s1, v27
	v_add_nc_u32_e32 v28, v28, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v35, v26, v29
	v_mul_lo_u32 v36, v26, v29
	v_mul_hi_u32 v29, v27, v29
	v_add_nc_u32_e32 v28, v28, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v33, v27, v28
	v_mul_hi_u32 v34, v27, v28
	v_mul_hi_u32 v37, v26, v28
	v_mul_lo_u32 v28, v26, v28
	v_add_co_u32 v29, vcc_lo, v29, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v34, vcc_lo
	v_add_co_u32 v29, vcc_lo, v29, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v29, vcc_lo, v33, v35, vcc_lo
	v_fma_f64 v[18:19], -v[18:19], v[22:23], v[24:25]
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v37, vcc_lo
	v_add_co_u32 v25, vcc_lo, v29, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v24, vcc_lo
	v_add_co_u32 v28, vcc_lo, v27, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v33, vcc_lo, v26, v24, vcc_lo
	v_mul_hi_u32 v34, v32, v28
	v_mad_u64_u32 v[26:27], null, v31, v28, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[24:25], null, v32, v33, 0
	v_mad_u64_u32 v[28:29], null, v31, v33, 0
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[14:15], -v[12:13]
	v_add_co_u32 v24, vcc_lo, v34, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v25, vcc_lo
	v_add_co_u32 v24, vcc_lo, v24, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v24, vcc_lo, v25, v27, vcc_lo
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v29, vcc_lo
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[18:19], v[18:19], v[20:21], v[22:23]
	v_div_fixup_f64 v[10:11], v[18:19], v[16:17], v[10:11]
	v_add_co_u32 v18, vcc_lo, v24, v28
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v20, s7, v18
	v_mad_u64_u32 v[16:17], null, s6, v18, 0
	v_mul_lo_u32 v18, s6, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v16, vcc_lo, v32, v16
	v_add3_u32 v17, v17, v18, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v18, v31, v17
	v_subrev_co_ci_u32_e64 v18, s0, s7, v18, vcc_lo
	v_sub_co_ci_u32_e32 v17, vcc_lo, v31, v17, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s6, v16
	v_sub_co_u32 v19, s0, v16, s6
	v_cndmask_b32_e64 v20, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v21, vcc_lo, 0, v18, s0
	v_mul_f64 v[10:11], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s6, v19
	v_cmp_le_u32_e64 s1, s7, v21
	v_cndmask_b32_e64 v22, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v14, vcc_lo, s7, v18, s0
	v_cmp_le_u32_e64 s0, s7, v17
	v_sub_co_u32 v15, vcc_lo, v19, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	v_cndmask_b32_e64 v18, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s7, v17
	v_cndmask_b32_e64 v23, 0, -1, s1
	v_cmp_eq_u32_e32 vcc_lo, s7, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v18, v18, v20, s0
	v_cndmask_b32_e32 v20, v23, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e64 s0, 0, v18
	v_cmp_ne_u32_e32 vcc_lo, 0, v20
	v_dual_cndmask_b32 v15, v19, v15 :: v_dual_cndmask_b32 v14, v21, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v15, v16, v15, s0
	v_cndmask_b32_e64 v14, v17, v14, s0
	v_fma_f64 v[10:11], v[12:13], s[66:67], v[10:11]
	v_add_co_u32 v6, s0, v6, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v15, v15, v30
	v_xor_b32_e32 v14, v14, v30
	v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_co_u32 v15, vcc_lo, v15, v30
	v_sub_co_ci_u32_e32 v12, vcc_lo, v14, v30, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i64_e64 s0, s[18:19], v[6:7]
	v_mul_lo_u32 v16, v15, s14
	v_add_co_u32 v4, vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v14, v12, s13
	v_mad_u64_u32 v[12:13], null, v15, s13, 0
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	s_or_b32 s25, s0, s25
	v_add3_u32 v13, v13, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v12, s1, s15, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s24, v13, s1
	global_store_b64 v[12:13], v[10:11], off
	s_and_not1_b32 exec_lo, exec_lo, s25
	s_cbranch_execnz .LBB0_125
.LBB0_126:                              ; %Flow546
	s_or_b32 exec_lo, exec_lo, s10
	s_mov_b32 s3, 0
.LBB0_127:                              ; %Flow549
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_132
; %bb.128:                              ; %.preheader395
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_i64_e64 s[18:19], v[0:1]
	s_cbranch_execz .LBB0_131
; %bb.129:                              ; %.lr.ph407
	v_mad_u64_u32 v[2:3], null, s16, v0, 0
	v_mad_u64_u32 v[4:5], null, s16, v8, 0
	s_add_u32 s7, s16, -1
	s_addc_u32 s10, s17, -1
	s_add_u32 s11, s16, 1
	s_addc_u32 s12, s17, 0
	s_mov_b32 s13, 0
	s_ashr_i32 s2, s10, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s17, v0, v[3:4]
	v_mad_u64_u32 v[9:10], null, s17, v8, v[5:6]
	v_mov_b32_e32 v3, v6
	v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_mov_b32_e32 v5, v9
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
.LBB0_130:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v10, vcc_lo, s20, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v3, vcc_lo
	v_add_co_u32 v12, vcc_lo, s22, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s23, v3, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	global_load_b64 v[14:15], v9, s[46:47]
	global_load_b64 v[12:13], v[12:13], off
	s_add_u32 s0, s7, s2
	s_mov_b32 s3, s2
	s_addc_u32 s1, s10, s2
	v_ashrrev_i32_e32 v22, 31, v7
	s_xor_b64 s[14:15], s[0:1], s[2:3]
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cvt_f32_u32_e32 v16, s14
	v_cvt_f32_u32_e32 v17, s15
	v_add_co_u32 v18, vcc_lo, v6, v22
	v_add_co_ci_u32_e32 v19, vcc_lo, v7, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v16, 0x4f800000, v17
	s_sub_u32 s0, 0, s14
	v_xor_b32_e32 v24, v18, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v23, v19, v22
	s_subb_u32 s1, 0, s15
	v_rcp_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, 0x5f7ffffc, v16
	v_mul_f32_e32 v17, 0x2f800000, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v17, v17
	v_fmac_f32_e32 v16, 0xcf800000, v17
	v_cvt_u32_f32_e32 v17, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v16, v16
	v_mul_lo_u32 v18, s0, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v19, s0, v16
	v_mul_lo_u32 v21, s1, v16
	v_mul_lo_u32 v20, s0, v16
	v_add_nc_u32_e32 v18, v19, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v19, v16, v20
	v_mul_hi_u32 v25, v17, v20
	v_mul_lo_u32 v20, v17, v20
	v_add_nc_u32_e32 v18, v18, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v21, v16, v18
	v_mul_hi_u32 v26, v16, v18
	v_mul_hi_u32 v27, v17, v18
	v_mul_lo_u32 v18, v17, v18
	v_add_co_u32 v19, vcc_lo, v19, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v26, vcc_lo
	v_add_co_u32 v19, vcc_lo, v19, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, v21, v25, vcc_lo
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v27, vcc_lo
	v_add_co_u32 v18, vcc_lo, v19, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v20, vcc_lo
	v_add_co_u32 v16, vcc_lo, v16, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, v17, v19, vcc_lo
	v_mul_hi_u32 v19, s0, v16
	v_mul_lo_u32 v20, s1, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v21, s0, v17
	v_mul_lo_u32 v18, s0, v16
	v_add_nc_u32_e32 v19, v19, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v25, v17, v18
	v_mul_lo_u32 v26, v17, v18
	v_mul_hi_u32 v18, v16, v18
	v_add_nc_u32_e32 v19, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v20, v16, v19
	v_mul_hi_u32 v21, v16, v19
	v_mul_hi_u32 v27, v17, v19
	v_mul_lo_u32 v19, v17, v19
	v_add_co_u32 v18, vcc_lo, v18, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v21, vcc_lo
	v_add_co_u32 v18, vcc_lo, v18, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v18, vcc_lo, v20, v25, vcc_lo
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v27, vcc_lo
	v_add_co_u32 v18, vcc_lo, v18, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v20, vcc_lo
	v_add_co_u32 v18, vcc_lo, v16, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v25, vcc_lo, v17, v19, vcc_lo
	v_mul_hi_u32 v26, v24, v18
	v_mad_u64_u32 v[16:17], null, v23, v18, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[18:19], null, v24, v25, 0
	v_mad_u64_u32 v[20:21], null, v23, v25, 0
	v_add_co_u32 v18, vcc_lo, v26, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v19, vcc_lo
	v_add_co_u32 v16, vcc_lo, v18, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, v19, v17, vcc_lo
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v21, vcc_lo
	v_add_co_u32 v18, vcc_lo, v16, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v17, vcc_lo
	v_mul_lo_u32 v20, s15, v18
	v_mad_u64_u32 v[16:17], null, s14, v18, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v18, s14, v19
	v_sub_co_u32 v16, vcc_lo, v24, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, v20
	v_sub_nc_u32_e32 v18, v23, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_subrev_co_ci_u32_e64 v18, s0, s15, v18, vcc_lo
	v_sub_co_ci_u32_e32 v17, vcc_lo, v23, v17, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s14, v16
	v_sub_co_u32 v19, s0, v16, s14
	v_cndmask_b32_e64 v20, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v21, vcc_lo, 0, v18, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s14, v19
	v_cmp_le_u32_e64 s1, s15, v21
	v_cndmask_b32_e64 v23, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v18, vcc_lo, s15, v18, s0
	v_sub_co_u32 v24, vcc_lo, v19, s14
	v_cmp_le_u32_e64 s0, s15, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v18, vcc_lo, 0, v18, vcc_lo
	v_cndmask_b32_e64 v26, 0, -1, s1
	v_cmp_eq_u32_e32 vcc_lo, s15, v21
	v_cndmask_b32_e64 v25, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s15, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v23, v26, v23, vcc_lo
	v_cndmask_b32_e64 v20, v25, v20, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 0, v23
	v_cmp_ne_u32_e64 s0, 0, v20
	v_dual_cndmask_b32 v19, v19, v24 :: v_dual_cndmask_b32 v18, v21, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v16, v16, v19, s0
	v_cndmask_b32_e64 v17, v17, v18, s0
	v_add_co_u32 v6, s0, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
	v_xor_b32_e32 v16, v16, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v17, v17, v22
	v_cmp_le_i64_e64 s0, s[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_co_u32 v16, vcc_lo, v16, v22
	v_sub_co_ci_u32_e32 v17, vcc_lo, v17, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 s13, s0, s13
	s_waitcnt vmcnt(2)
	v_mul_f64 v[10:11], v[10:11], s[66:67]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[10:11], v[14:15], v[12:13], v[10:11]
	v_add_co_u32 v14, vcc_lo, v16, s18
	v_add_co_ci_u32_e32 v12, vcc_lo, s19, v17, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v16, v14, s12
	v_mul_lo_u32 v15, v12, s11
	v_mad_u64_u32 v[12:13], null, v14, s11, 0
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v13, v13, v16, v15
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v12, s1, s4, v12
	v_add_co_ci_u32_e64 v13, s1, s5, v13, s1
	global_store_b64 v[12:13], v[10:11], off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_130
.LBB0_131:                              ; %Flow548
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_132:                              ; %Flow550
	s_mov_b32 s3, 0
.LBB0_133:                              ; %Flow553
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_138
; %bb.134:                              ; %.preheader393
	s_mov_b32 s10, exec_lo
	v_cmpx_gt_i64_e64 s[18:19], v[0:1]
	s_cbranch_execz .LBB0_137
; %bb.135:                              ; %.lr.ph410
	v_mad_u64_u32 v[2:3], null, s16, v0, 0
	v_mad_u64_u32 v[4:5], null, s16, v8, 0
	s_add_u32 s11, s16, -1
	s_addc_u32 s12, s17, -1
	v_mov_b32_e32 v9, 0
	s_add_u32 s13, s16, 1
	s_addc_u32 s14, s17, 0
	s_add_u32 s15, s4, 8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s17, v0, v[3:4]
	s_addc_u32 s20, s5, 0
	s_mov_b32 s21, 0
	s_ashr_i32 s2, s12, 31
	v_mov_b32_e32 v3, v6
	v_mad_u64_u32 v[6:7], null, s17, v8, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_mov_b32_e32 v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v2, s38
	v_add_co_ci_u32_e32 v7, vcc_lo, s39, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 3, v[4:5]
	v_add_co_u32 v4, vcc_lo, v6, 8
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v7, vcc_lo
	v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
.LBB0_136:                              ; =>This Inner Loop Header: Depth=1
	global_load_b128 v[10:13], v9, s[46:47]
	s_add_u32 s0, s11, s2
	s_mov_b32 s3, s2
	s_addc_u32 s1, s12, s2
	v_ashrrev_i32_e32 v30, 31, v7
	s_xor_b64 s[6:7], s[0:1], s[2:3]
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_sub_u32 s1, 0, s6
	s_subb_u32 s3, 0, s7
	v_add_co_u32 v24, vcc_lo, v6, v30
	v_add_co_ci_u32_e32 v25, vcc_lo, v7, v30, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v32, v24, v30
	v_xor_b32_e32 v31, v25, v30
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[12:13], -v[10:11]
	global_load_b128 v[12:15], v[4:5], off offset:-8
	v_div_scale_f64 v[18:19], null, v[16:17], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_cvt_f32_u32_e32 v22, s6
	v_cvt_f32_u32_e32 v23, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, 0x4f800000, v23
	v_rcp_f32_e32 v22, v22
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v24, 0x5f7ffffc, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v25, 0x2f800000, v24
	v_trunc_f32_e32 v25, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v24, 0xcf800000, v25
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_cvt_u32_f32_e32 v26, v25
	v_cvt_u32_f32_e32 v27, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v24, s1, v26
	v_mul_hi_u32 v25, s1, v27
	v_mul_lo_u32 v29, s3, v27
	v_mul_lo_u32 v28, s1, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v33, v25, v24
	v_div_scale_f64 v[24:25], s0, v[10:11], v[16:17], v[10:11]
	v_mul_hi_u32 v34, v27, v28
	v_mul_hi_u32 v35, v26, v28
	v_mul_lo_u32 v28, v26, v28
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_add_nc_u32_e32 v22, v33, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v23, v27, v22
	v_mul_hi_u32 v29, v27, v22
	v_mul_hi_u32 v33, v26, v22
	v_mul_lo_u32 v22, v26, v22
	v_add_co_u32 v23, vcc_lo, v34, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v29, vcc_lo, 0, v29, vcc_lo
	v_add_co_u32 v23, vcc_lo, v23, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, v29, v35, vcc_lo
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v33, vcc_lo
	v_add_co_u32 v22, vcc_lo, v23, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v28, vcc_lo
	v_add_co_u32 v27, vcc_lo, v27, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v26, vcc_lo, v26, v23, vcc_lo
	v_mul_hi_u32 v28, s1, v27
	v_mul_lo_u32 v33, s3, v27
	v_mul_f64 v[22:23], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v34, s1, v26
	v_mul_lo_u32 v29, s1, v27
	v_add_nc_u32_e32 v28, v28, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v35, v26, v29
	v_mul_lo_u32 v36, v26, v29
	v_mul_hi_u32 v29, v27, v29
	v_add_nc_u32_e32 v28, v28, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v33, v27, v28
	v_mul_hi_u32 v34, v27, v28
	v_mul_hi_u32 v37, v26, v28
	v_mul_lo_u32 v28, v26, v28
	v_add_co_u32 v29, vcc_lo, v29, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v34, vcc_lo
	v_add_co_u32 v29, vcc_lo, v29, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v29, vcc_lo, v33, v35, vcc_lo
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v37, vcc_lo
	v_fma_f64 v[18:19], -v[18:19], v[22:23], v[24:25]
	v_add_co_u32 v28, vcc_lo, v29, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v33, vcc_lo
	v_add_co_u32 v27, vcc_lo, v27, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v33, vcc_lo, v26, v24, vcc_lo
	v_mul_hi_u32 v34, v32, v27
	v_mad_u64_u32 v[24:25], null, v31, v27, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[26:27], null, v32, v33, 0
	v_mad_u64_u32 v[28:29], null, v31, v33, 0
	v_add_co_u32 v26, vcc_lo, v34, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v27, vcc_lo
	v_add_co_u32 v24, vcc_lo, v26, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v24, vcc_lo, v27, v25, vcc_lo
	v_add_co_ci_u32_e32 v26, vcc_lo, 0, v29, vcc_lo
	s_mov_b32 vcc_lo, s0
	v_add_co_u32 v27, s1, v24, v28
	s_waitcnt vmcnt(0)
	v_add_f64 v[24:25], v[12:13], -1.0
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_div_fmas_f64 v[18:19], v[18:19], v[20:21], v[22:23]
	v_add_co_ci_u32_e64 v22, vcc_lo, 0, v26, s1
	v_mul_lo_u32 v23, s7, v27
	v_mad_u64_u32 v[20:21], null, s6, v27, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v22, s6, v22
	v_sub_co_u32 v20, vcc_lo, v32, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v21, v21, v22, v23
	v_sub_nc_u32_e32 v22, v31, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_subrev_co_ci_u32_e64 v22, s0, s7, v22, vcc_lo
	v_sub_co_ci_u32_e32 v21, vcc_lo, v31, v21, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s6, v20
	v_sub_co_u32 v23, s0, v20, s6
	v_cndmask_b32_e64 v26, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v27, vcc_lo, 0, v22, s0
	v_mul_f64 v[14:15], v[24:25], s[66:67]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_le_u32_e32 vcc_lo, s6, v23
	v_div_fixup_f64 v[10:11], v[18:19], v[16:17], v[10:11]
	v_cmp_le_u32_e64 s1, s7, v27
	v_cndmask_b32_e64 v28, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v16, vcc_lo, s7, v22, s0
	v_sub_co_u32 v17, vcc_lo, v23, s6
	v_cmp_le_u32_e64 s0, s7, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v16, vcc_lo, 0, v16, vcc_lo
	v_cndmask_b32_e64 v19, 0, -1, s1
	v_cmp_eq_u32_e32 vcc_lo, s7, v27
	v_cndmask_b32_e64 v18, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s7, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v19, v19, v28, vcc_lo
	v_cndmask_b32_e64 v18, v18, v26, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 0, v19
	v_cmp_ne_u32_e64 s0, 0, v18
	v_cndmask_b32_e32 v17, v23, v17, vcc_lo
	v_cndmask_b32_e32 v16, v27, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v17, v20, v17, s0
	v_cndmask_b32_e64 v16, v21, v16, s0
	v_add_co_u32 v6, s0, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
	v_xor_b32_e32 v17, v17, v30
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[14:15]
	v_xor_b32_e32 v16, v16, v30
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_le_i64_e64 s0, s[18:19], v[6:7]
	v_sub_co_u32 v14, vcc_lo, v17, v30
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_co_ci_u32_e32 v12, vcc_lo, v16, v30, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mul_lo_u32 v16, v14, s14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v15, v12, s13
	v_mad_u64_u32 v[12:13], null, v14, s13, 0
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	s_or_b32 s21, s0, s21
	v_add3_u32 v13, v13, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v12, s1, s15, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s20, v13, s1
	global_store_b64 v[12:13], v[10:11], off
	s_and_not1_b32 exec_lo, exec_lo, s21
	s_cbranch_execnz .LBB0_136
.LBB0_137:                              ; %Flow552
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_138:                              ; %Flow554
	s_mov_b32 s3, 0
.LBB0_139:                              ; %Flow557
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_144
; %bb.140:                              ; %.preheader391
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_i64_e64 s[18:19], v[0:1]
	s_cbranch_execz .LBB0_143
; %bb.141:                              ; %.lr.ph412
	v_mad_u64_u32 v[2:3], null, s16, v0, 0
	v_mad_u64_u32 v[4:5], null, s16, v8, 0
	s_add_u32 s7, s16, -1
	s_addc_u32 s10, s17, -1
	s_add_u32 s11, s16, 1
	s_addc_u32 s12, s17, 0
	s_mov_b32 s13, 0
	s_ashr_i32 s2, s10, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s17, v0, v[3:4]
	v_mad_u64_u32 v[9:10], null, s17, v8, v[5:6]
	v_mov_b32_e32 v3, v6
	v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_mov_b32_e32 v5, v9
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
.LBB0_142:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v10, vcc_lo, s36, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s37, v3, vcc_lo
	v_add_co_u32 v14, vcc_lo, s38, v2
	global_load_b64 v[12:13], v9, s[46:47]
	global_load_b64 v[10:11], v[10:11], off
	v_add_co_ci_u32_e32 v15, vcc_lo, s39, v3, vcc_lo
	s_add_u32 s0, s7, s2
	s_mov_b32 s3, s2
	s_addc_u32 s1, s10, s2
	global_load_b64 v[14:15], v[14:15], off
	s_xor_b64 s[14:15], s[0:1], s[2:3]
	v_ashrrev_i32_e32 v22, 31, v7
	v_cvt_f32_u32_e32 v16, s14
	v_cvt_f32_u32_e32 v17, s15
	s_sub_u32 s0, 0, s14
	s_subb_u32 s1, 0, s15
	v_add_co_u32 v18, vcc_lo, v6, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v16, 0x4f800000, v17
	v_add_co_ci_u32_e32 v19, vcc_lo, v7, v22, vcc_lo
	v_xor_b32_e32 v24, v18, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v16, v16
	v_xor_b32_e32 v23, v19, v22
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v16, 0x5f7ffffc, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, 0x2f800000, v16
	v_trunc_f32_e32 v17, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v16, 0xcf800000, v17
	v_cvt_u32_f32_e32 v17, v17
	v_cvt_u32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v18, s0, v17
	v_mul_hi_u32 v19, s0, v16
	v_mul_lo_u32 v21, s1, v16
	v_mul_lo_u32 v20, s0, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v18, v19, v18
	v_mul_hi_u32 v19, v16, v20
	v_mul_hi_u32 v25, v17, v20
	v_mul_lo_u32 v20, v17, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v18, v18, v21
	v_mul_lo_u32 v21, v16, v18
	v_mul_hi_u32 v26, v16, v18
	v_mul_hi_u32 v27, v17, v18
	v_mul_lo_u32 v18, v17, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v19, vcc_lo, v19, v21
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v19, vcc_lo, v19, v20
	v_add_co_ci_u32_e32 v19, vcc_lo, v21, v25, vcc_lo
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v19, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, v16, v18
	v_add_co_ci_u32_e32 v17, vcc_lo, v17, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v19, s0, v16
	v_mul_lo_u32 v20, s1, v16
	v_mul_lo_u32 v21, s0, v17
	v_mul_lo_u32 v18, s0, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v19, v19, v21
	v_mul_hi_u32 v25, v17, v18
	v_mul_lo_u32 v26, v17, v18
	v_mul_hi_u32 v18, v16, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, v19, v20
	v_mul_lo_u32 v20, v16, v19
	v_mul_hi_u32 v21, v16, v19
	v_mul_hi_u32 v27, v17, v19
	v_mul_lo_u32 v19, v17, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v18, vcc_lo, v18, v20
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v18, v26
	v_add_co_ci_u32_e32 v18, vcc_lo, v20, v25, vcc_lo
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v18, v19
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v16, v18
	v_add_co_ci_u32_e32 v25, vcc_lo, v17, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v26, v24, v18
	v_mad_u64_u32 v[16:17], null, v23, v18, 0
	v_mad_u64_u32 v[18:19], null, v24, v25, 0
	v_mad_u64_u32 v[20:21], null, v23, v25, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v26, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, v18, v16
	v_add_co_ci_u32_e32 v16, vcc_lo, v19, v17, vcc_lo
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v16, v20
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v20, s15, v18
	v_mad_u64_u32 v[16:17], null, s14, v18, 0
	v_mul_lo_u32 v18, s14, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v16, vcc_lo, v24, v16
	v_add3_u32 v17, v17, v18, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v18, v23, v17
	v_subrev_co_ci_u32_e64 v18, s0, s15, v18, vcc_lo
	v_sub_co_ci_u32_e32 v17, vcc_lo, v23, v17, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s14, v16
	v_sub_co_u32 v19, s0, v16, s14
	v_cndmask_b32_e64 v20, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v21, vcc_lo, 0, v18, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s14, v19
	v_cmp_le_u32_e64 s1, s15, v21
	v_cndmask_b32_e64 v23, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v18, vcc_lo, s15, v18, s0
	v_sub_co_u32 v24, vcc_lo, v19, s14
	v_cmp_le_u32_e64 s0, s15, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v18, vcc_lo, 0, v18, vcc_lo
	v_cndmask_b32_e64 v26, 0, -1, s1
	v_cmp_eq_u32_e32 vcc_lo, s15, v21
	v_cndmask_b32_e64 v25, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s15, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v23, v26, v23, vcc_lo
	v_cndmask_b32_e64 v20, v25, v20, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 0, v23
	v_cmp_ne_u32_e64 s0, 0, v20
	v_dual_cndmask_b32 v19, v19, v24 :: v_dual_cndmask_b32 v18, v21, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v16, v16, v19, s0
	v_cndmask_b32_e64 v17, v17, v18, s0
	v_add_co_u32 v6, s0, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
	v_xor_b32_e32 v16, v16, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v17, v17, v22
	v_cmp_le_i64_e64 s0, s[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_or_b32 s13, s0, s13
	s_waitcnt vmcnt(1)
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[14:15], -1.0
	v_mul_f64 v[10:11], v[10:11], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[12:13], v[14:15], v[10:11]
	v_sub_co_u32 v14, vcc_lo, v16, v22
	v_sub_co_ci_u32_e32 v12, vcc_lo, v17, v22, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v4
	v_mul_lo_u32 v16, v14, s12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v15, v12, s11
	v_mad_u64_u32 v[12:13], null, v14, s11, 0
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	v_add3_u32 v13, v13, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v12, s1, s4, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s5, v13, s1
	global_store_b64 v[12:13], v[10:11], off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_142
.LBB0_143:                              ; %Flow556
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_144:                              ; %Flow558
	s_mov_b32 s3, 0
.LBB0_145:                              ; %Flow561
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_149
; %bb.146:                              ; %.preheader
	s_sub_u32 s2, s8, s18
	s_subb_u32 s3, s9, s19
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i64_e64 s[2:3], v[0:1]
	s_cbranch_execz .LBB0_149
; %bb.147:                              ; %.lr.ph414
	v_mul_f64 v[2:3], s[64:65], s[64:65]
	s_add_u32 s6, s16, -1
	s_addc_u32 s7, s17, -1
	v_and_b32_e32 v6, 0xffff, v8
	s_lshl_b64 s[0:1], s[16:17], 3
	s_lshl_b64 s[8:9], s[6:7], 3
	v_lshlrev_b64 v[4:5], 3, v[0:1]
	s_sub_u32 s0, s0, s8
	s_subb_u32 s1, s1, s9
	s_add_u32 s11, s0, 8
	v_lshlrev_b32_e32 v7, 3, v6
	s_addc_u32 s12, s1, 0
	s_add_u32 s13, s4, 16
	s_mov_b32 s10, 0
	s_addc_u32 s14, s5, 0
	s_ashr_i32 s4, s7, 31
.LBB0_148:                              ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v8, vcc_lo, s30, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, s31, v5, vcc_lo
	v_add_co_u32 v10, vcc_lo, s28, v4
	v_add_co_ci_u32_e32 v11, vcc_lo, s29, v5, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	v_add_co_u32 v12, vcc_lo, s42, v4
	v_add_co_ci_u32_e32 v13, vcc_lo, s43, v5, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	global_load_b64 v[12:13], v[12:13], off
	v_add_co_u32 v14, vcc_lo, s44, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s45, v5, vcc_lo
	v_add_co_u32 v16, vcc_lo, s26, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s27, v5, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	s_add_u32 s0, s6, s4
	s_mov_b32 s5, s4
	global_load_b64 v[16:17], v[16:17], off
	s_addc_u32 s1, s7, s4
	v_ashrrev_i32_e32 v32, 31, v1
	s_xor_b64 s[8:9], s[0:1], s[4:5]
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_u32 s5, 0, s8
	s_subb_u32 s15, 0, s9
	s_waitcnt vmcnt(4)
	v_fma_f64 v[18:19], v[8:9], v[8:9], 1.0
	s_waitcnt vmcnt(3)
	v_fma_f64 v[20:21], v[10:11], v[10:11], 1.0
	v_add_f64 v[10:11], v[10:11], v[10:11]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[18:19], v[12:13], v[18:19]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[22:23], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[10:11], v[8:9]
	v_fma_f64 v[8:9], v[8:9], v[8:9], v[20:21]
	v_mul_f64 v[18:19], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[10:11], v[12:13]
	v_add_f64 v[8:9], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[14:15], v[22:23], v[18:19]
	v_fma_f64 v[10:11], -v[14:15], v[10:11], v[12:13]
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[14:15], null, v[2:3], v[2:3], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[12:13], null, v[8:9], v[8:9], v[10:11]
	v_rcp_f64_e32 v[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[18:19], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[24:25], -v[14:15], v[20:21], 1.0
	v_fma_f64 v[22:23], -v[12:13], v[18:19], 1.0
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	v_add_co_u32 v24, vcc_lo, v0, v32
	v_add_co_ci_u32_e32 v30, vcc_lo, v1, v32, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v33, v24, v32
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_cvt_f32_u32_e32 v22, s8
	v_cvt_f32_u32_e32 v23, s9
	v_fma_f64 v[24:25], -v[14:15], v[20:21], 1.0
	v_fmac_f32_e32 v22, 0x4f800000, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v22, v22
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v26, 0x5f7ffffc, v22
	v_mul_f32_e32 v27, 0x2f800000, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v27, v27
	v_fmac_f32_e32 v26, 0xcf800000, v27
	v_fma_f64 v[22:23], -v[12:13], v[18:19], 1.0
	v_cvt_u32_f32_e32 v31, v27
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_u32_f32_e32 v34, v26
	v_mul_lo_u32 v26, s5, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v27, s5, v34
	v_mul_lo_u32 v28, s5, v34
	v_mul_lo_u32 v29, s15, v34
	v_add_nc_u32_e32 v26, v27, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v35, v34, v28
	v_mul_hi_u32 v36, v31, v28
	v_mul_lo_u32 v37, v31, v28
	v_add_nc_u32_e32 v38, v26, v29
	v_div_scale_f64 v[28:29], s1, v[10:11], v[8:9], v[10:11]
	v_div_scale_f64 v[26:27], s0, v[16:17], v[2:3], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v24, v31, v38
	v_mul_lo_u32 v25, v31, v38
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_mul_lo_u32 v22, v34, v38
	v_mul_hi_u32 v23, v34, v38
	v_add_co_u32 v22, vcc_lo, v35, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v23, vcc_lo
	v_add_co_u32 v22, vcc_lo, v22, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v22, vcc_lo, v23, v36, vcc_lo
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v24, vcc_lo
	v_add_co_u32 v22, vcc_lo, v22, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v23, vcc_lo
	v_mul_f64 v[24:25], v[26:27], v[20:21]
	v_add_co_u32 v34, vcc_lo, v34, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v31, vcc_lo, v31, v23, vcc_lo
	v_mul_hi_u32 v35, s5, v34
	v_mul_lo_u32 v36, s15, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v38, s5, v31
	v_mul_lo_u32 v37, s5, v34
	v_mul_f64 v[22:23], v[28:29], v[18:19]
	v_add_nc_u32_e32 v35, v35, v38
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v39, v31, v37
	v_mul_lo_u32 v40, v31, v37
	v_mul_hi_u32 v37, v34, v37
	v_add_nc_u32_e32 v35, v35, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v36, v34, v35
	v_mul_hi_u32 v38, v34, v35
	v_mul_hi_u32 v41, v31, v35
	v_mul_lo_u32 v35, v31, v35
	v_add_co_u32 v36, vcc_lo, v37, v36
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v38, vcc_lo
	v_fma_f64 v[14:15], -v[14:15], v[24:25], v[26:27]
	v_add_co_u32 v36, vcc_lo, v36, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v36, vcc_lo, v37, v39, vcc_lo
	v_add_co_ci_u32_e32 v26, vcc_lo, 0, v41, vcc_lo
	v_add_co_u32 v27, vcc_lo, v36, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v26, vcc_lo, 0, v26, vcc_lo
	v_xor_b32_e32 v36, v30, v32
	v_fma_f64 v[12:13], -v[12:13], v[22:23], v[28:29]
	v_add_co_u32 v34, vcc_lo, v34, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v35, vcc_lo, v31, v26, vcc_lo
	v_mul_hi_u32 v37, v33, v34
	v_mad_u64_u32 v[28:29], null, v36, v34, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[26:27], null, v33, v35, 0
	v_mad_u64_u32 v[30:31], null, v36, v35, 0
	v_add_co_u32 v26, vcc_lo, v37, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v27, vcc_lo
	v_add_co_u32 v26, vcc_lo, v26, v28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v26, vcc_lo, v27, v29, vcc_lo
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v31, vcc_lo
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f64 v[12:13], v[12:13], v[18:19], v[22:23]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[14:15], v[14:15], v[20:21], v[24:25]
	v_add_co_u32 v0, vcc_lo, v0, v6
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_i64_e32 vcc_lo, s[2:3], v[0:1]
	s_or_b32 s10, vcc_lo, s10
	v_div_fixup_f64 v[8:9], v[12:13], v[8:9], v[10:11]
	v_div_fixup_f64 v[10:11], v[14:15], v[2:3], v[16:17]
	v_add_co_u32 v15, s0, v26, v30
	v_add_co_ci_u32_e64 v16, s0, 0, v27, s0
	v_xor_b32_e32 v14, s4, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v17, s9, v15
	v_mad_u64_u32 v[12:13], null, s8, v15, 0
	v_mul_lo_u32 v20, s8, v16
	v_add_co_u32 v18, s0, v15, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v22, s0, 0, v16, s0
	v_add_co_u32 v19, s1, v15, 2
	v_sub_co_u32 v12, s0, v33, v12
	v_add3_u32 v13, v13, v20, v17
	v_add_co_ci_u32_e64 v21, s1, 0, v16, s1
	v_sub_nc_u32_e32 v17, v36, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e64 v17, s1, s9, v17, s0
	v_add_f64 v[8:9], v[10:11], v[8:9]
	v_sub_co_ci_u32_e64 v11, s0, v36, v13, s0
	v_cmp_le_u32_e64 s0, s8, v12
	v_sub_co_u32 v10, s1, v12, s8
	v_cndmask_b32_e64 v12, 0, -1, s0
	v_subrev_co_ci_u32_e64 v13, s0, 0, v17, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s0, s8, v10
	v_cmp_le_u32_e64 s1, s9, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, 0, -1, s0
	v_cmp_le_u32_e64 s0, s9, v11
	v_cndmask_b32_e64 v17, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s9, v11
	v_cndmask_b32_e64 v11, 0, -1, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v12, v17, v12, s0
	v_cmp_eq_u32_e64 s0, s9, v13
	v_cmp_ne_u32_e64 s1, 0, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, v11, v10, s0
	v_add_f64 v[8:9], v[8:9], -0.5
	v_cmp_ne_u32_e64 s0, 0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, v18, v19, s0
	v_cndmask_b32_e64 v10, v22, v21, s0
	v_cndmask_b32_e64 v11, v15, v11, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, v16, v10, s1
	v_xor_b32_e32 v11, v11, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v10, v10, v14
	v_sub_co_u32 v12, s0, v11, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_ci_u32_e64 v10, s0, v10, v14, s0
	v_mul_lo_u32 v14, s12, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v13, s11, v10
	v_mad_u64_u32 v[10:11], null, s11, v12, v[4:5]
	v_add_co_u32 v4, s0, v4, v7
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add3_u32 v11, v14, v11, v13
	v_add_co_u32 v10, s1, s13, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s1, s14, v11, s1
	global_store_b64 v[10:11], v[8:9], off
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_148
.LBB0_149:                              ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
		.amdhsa_group_segment_fixed_size 4208
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 456
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 93
		.amdhsa_next_free_sgpr 74
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd, .Lfunc_end0-_Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 37496
; NumSgprs: 76
; NumVgprs: 93
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4208 bytes/workgroup (compile time only)
; SGPRBlocks: 9
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 76
; NumVGPRsForWavesPerEU: 93
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         128
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         136
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         144
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         152
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         160
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         168
        .size:           8
        .value_kind:     global_buffer
      - .offset:         176
        .size:           8
        .value_kind:     by_value
      - .offset:         184
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         192
        .size:           8
        .value_kind:     global_buffer
      - .offset:         200
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         204
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         208
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         212
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         214
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         216
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         218
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         220
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         222
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         240
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         248
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         256
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         264
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4208
    .kernarg_segment_align: 8
    .kernarg_segment_size: 456
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd
    .private_segment_fixed_size: 0
    .sgpr_count:     76
    .sgpr_spill_count: 0
    .symbol:         _Z4gutsllPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PKbddPd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     93
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
