#include <cuda.h>
#include <cuda_runtime_api.h>
#include <device_launch_parameters.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#define TILE_SIZE 4 

__global__ void meanFilter(float *deviceinputimage, float *deviceOutputImage, int dim)
{
	int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    
    __shared__ float mem_shared[(TILE_SIZE+2)][(TILE_SIZE+2)];
    
	bool is_x_left = (threadIdx.x == 0), is_x_right = (threadIdx.x == TILE_SIZE-1);
    bool is_y_top = (threadIdx.y == 0), is_y_bottom = (threadIdx.y == TILE_SIZE-1);

	if(is_x_left)
		mem_shared[threadIdx.x][threadIdx.y+1] = 0;
	else if(is_x_right)
		mem_shared[threadIdx.x + 2][threadIdx.y+1]=0;
	if (is_y_top){
		mem_shared[threadIdx.x+1][threadIdx.y] = 0;
		if(is_x_left)
			mem_shared[threadIdx.x][threadIdx.y] = 0;
		else if(is_x_right)
			mem_shared[threadIdx.x+2][threadIdx.y] = 0;
	}
	else if (is_y_bottom){
		mem_shared[threadIdx.x+1][threadIdx.y+2] = 0;
		if(is_x_right)
			mem_shared[threadIdx.x+2][threadIdx.y+2] = 0;
		else if(is_x_left)
			mem_shared[threadIdx.x][threadIdx.y+2] = 0;
	}

	mem_shared[threadIdx.x+1][threadIdx.y+1] = deviceinputimage[row*dim+col];

	if(is_x_left && (col>0))
		mem_shared[threadIdx.x][threadIdx.y+1] = deviceinputimage[row*dim+(col-1)];
	else if(is_x_right && (col<dim-1))
		mem_shared[threadIdx.x + 2][threadIdx.y+1]= deviceinputimage[row*dim+(col+1)];
	if (is_y_top && (row>0)){
		mem_shared[threadIdx.x+1][threadIdx.y] = deviceinputimage[(row-1)*dim+col];
		if(is_x_left)
			mem_shared[threadIdx.x][threadIdx.y] = deviceinputimage[(row-1)*dim+(col-1)];
		else if(is_x_right )
			mem_shared[threadIdx.x+2][threadIdx.y] = deviceinputimage[(row-1)*dim+(col+1)];
	}
	else if (is_y_bottom && (row<dim-1)){
		mem_shared[threadIdx.x+1][threadIdx.y+2] = deviceinputimage[(row+1)*dim + col];
		if(is_x_right)
			mem_shared[threadIdx.x+2][threadIdx.y+2] = deviceinputimage[(row+1)*dim+(col+1)];
		else if(is_x_left)
			mem_shared[threadIdx.x][threadIdx.y+2] = deviceinputimage[(row+1)*dim+(col-1)];
	}

	__syncthreads();

    float filterVector[9] = {mem_shared[threadIdx.x][threadIdx.y], mem_shared[threadIdx.x+1][threadIdx.y],
							mem_shared[threadIdx.x+2][threadIdx.y], mem_shared[threadIdx.x][threadIdx.y+1],
							mem_shared[threadIdx.x+1][threadIdx.y+1], mem_shared[threadIdx.x+2][threadIdx.y+1],
							mem_shared[threadIdx.x] [threadIdx.y+2], mem_shared[threadIdx.x+1][threadIdx.y+2],
							mem_shared[threadIdx.x+2][threadIdx.y+2]};

	
	{

    float element = 0.0;
    for (int i = 0; i < 9; i++) {
        element += filterVector[i];
    }
	deviceOutputImage[row*dim+col] = element/9.0;
	}
}

bool meanFilterGPU(float* image, float* outputImage){
	cudaEvent_t start,stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	cudaEventRecord(start);
	cudaError_t status;
	int dim = 1280;

    int size =  dim * dim * sizeof(float);
    
	float *inputimage_D;
    cudaMalloc((void**) &inputimage_D, size);
    
	status = cudaGetLastError();              
	if (status != cudaSuccess) {                     
		return false;
    }
    
	cudaMemcpy(inputimage_D, image, size, cudaMemcpyHostToDevice);
	status = cudaGetLastError();              
	if (status != cudaSuccess) {                     
		cudaFree(inputimage_D);
		return false;
	}
    
    float *outputImage_D;
    cudaMalloc((void**) &outputImage_D, size);
    
	dim3 dimBlock(TILE_SIZE, TILE_SIZE);
	dim3 dimGrid((int)ceil((float) dim / (float)TILE_SIZE), (int)ceil((float) dim / (float)TILE_SIZE));
    
    clock_t start_filter = clock();
    meanFilter<<<dimGrid, dimBlock>>>(inputimage_D, outputImage_D, dim);
    clock_t end_filter = clock();

    double time_filter = (double)(end_filter-start_filter)/CLOCKS_PER_SEC;
    
    printf("Image size : %d Window size : %d GPU Filter Time: %f\n", dim, 3 , time_filter);
	
	cudaMemcpy(outputImage, outputImage_D, size, cudaMemcpyDeviceToHost);
	status = cudaGetLastError();              
	


if (status != cudaSuccess) {                     
		cudaFree(inputimage_D);
		cudaFree(outputImage_D);
		return false;
	}
	cudaFree(inputimage_D);
	cudaFree(outputImage_D);
	cudaEventRecord(stop);
	cudaEventSynchronize(stop);
	float time = 0;
	cudaEventElapsedTime(&time,start,stop);
	return true;
}

int main()
{
    // freopen("filtered640GPU.txt","w",stdout);
    int size = 1280*1280;
    float *img, *filtered_img;
    img = (float *)malloc(size * sizeof(float));
	filtered_img = (float *)malloc(size * sizeof(float));

    FILE* inp;
    inp = fopen("img1280.txt","r");
    char line[6];
    char *endptr;
    int i = 0;
    while(1){
        char r = (char)fgetc(inp);
        int k = 0;
        while(r!='\n' && !feof(inp)){
            line[k++] = r;
            r = (char)fgetc(inp);
        }
        line[k]=0;
        if(feof(inp)){
            break;
        }
        img[i] = strtof(line, &endptr);
        i++;
    }

	meanFilterGPU(img, filtered_img); //GPU call for median Filtering with shared Kernel.
    
    // for (int i = 0; i < size; i++)
	// 	printf ("%f\n", filtered_img[i]);
}
	.file	"tmpxft_0029c4d4_00000000-6_mean_filterGPU.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z33__device_stub__Z10meanFilterPfS_iPfS_i
	.type	_Z33__device_stub__Z10meanFilterPfS_iPfS_i, @function
_Z33__device_stub__Z10meanFilterPfS_iPfS_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10meanFilterPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z33__device_stub__Z10meanFilterPfS_iPfS_i, .-_Z33__device_stub__Z10meanFilterPfS_iPfS_i
	.globl	_Z10meanFilterPfS_i
	.type	_Z10meanFilterPfS_i, @function
_Z10meanFilterPfS_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10meanFilterPfS_iPfS_i
	.cfi_endproc
.LFE2054:
	.size	_Z10meanFilterPfS_i, .-_Z10meanFilterPfS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Image size : %d Window size : %d GPU Filter Time: %f\n"
	.text
	.globl	_Z13meanFilterGPUPfS_
	.type	_Z13meanFilterGPUPfS_, @function
_Z13meanFilterGPUPfS_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	32(%rsp), %rdi
	movl	$6553600, %esi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L9
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$6553600, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L10
	movq	32(%rsp), %rdi
.L16:
	call	cudaFree@PLT
.L9:
	xorl	%eax, %eax
	jmp	.L8
.L10:
	leaq	40(%rsp), %rdi
	movl	$6553600, %esi
	call	cudaMalloc@PLT
	movl	$1, 56(%rsp)
	movabsq	$17179869188, %rax
	movq	%rax, 48(%rsp)
	movabsq	$1374389535040, %rax
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	clock@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %rbp
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1280, %edx
	call	_Z33__device_stub__Z10meanFilterPfS_iPfS_i
.L12:
	call	clock@PLT
	movl	$3, %ecx
	movl	$1280, %edx
	leaq	.LC1(%rip), %rsi
	subq	%rbp, %rax
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC0(%rip), %xmm0
	call	__printf_chk@PLT
	movq	40(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$6553600, %edx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movq	32(%rsp), %rdi
	testl	%eax, %eax
	je	.L13
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	jmp	.L16
.L13:
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	call	cudaEventElapsedTime@PLT
	movb	$1, %al
.L8:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13meanFilterGPUPfS_, .-_Z13meanFilterGPUPfS_
	.section	.rodata.str1.1
.LC3:
	.string	"r"
.LC4:
	.string	"img1280.txt"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$6553600, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %r15
	call	malloc@PLT
	movl	$6553600, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	.LC3(%rip), %rsi
	leaq	.LC4(%rip), %rdi
	movq	%r12, %r14
	movq	%rax, %r13
	call	fopen@PLT
	movq	%rax, 8(%rsp)
.L21:
	movq	8(%rsp), %rdi
	xorl	%ebp, %ebp
	call	fgetc@PLT
	movl	%eax, %ebx
.L19:
	cmpb	$10, %bl
	je	.L18
	movq	8(%rsp), %rdi
	call	feof@PLT
	testl	%eax, %eax
	jne	.L18
	movq	8(%rsp), %rdi
	movb	%bl, 34(%rsp,%rbp)
	incq	%rbp
	call	fgetc@PLT
	movl	%eax, %ebx
	jmp	.L19
.L18:
	movq	8(%rsp), %rdi
	movslq	%ebp, %rbp
	movb	$0, 34(%rsp,%rbp)
	call	feof@PLT
	testl	%eax, %eax
	jne	.L20
	leaq	34(%rsp), %rdi
	movq	%r15, %rsi
	addq	$4, %r14
	call	strtof@PLT
	movss	%xmm0, -4(%r14)
	jmp	.L21
.L20:
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	_Z13meanFilterGPUPfS_
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z10meanFilterPfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10meanFilterPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>

#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#define TILE_SIZE 4 

__global__ void meanFilter(float *deviceinputimage, float *deviceOutputImage, int dim)
{
	int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    
    __shared__ float mem_shared[(TILE_SIZE+2)][(TILE_SIZE+2)];
    
	bool is_x_left = (threadIdx.x == 0), is_x_right = (threadIdx.x == TILE_SIZE-1);
    bool is_y_top = (threadIdx.y == 0), is_y_bottom = (threadIdx.y == TILE_SIZE-1);

	if(is_x_left)
		mem_shared[threadIdx.x][threadIdx.y+1] = 0;
	else if(is_x_right)
		mem_shared[threadIdx.x + 2][threadIdx.y+1]=0;
	if (is_y_top){
		mem_shared[threadIdx.x+1][threadIdx.y] = 0;
		if(is_x_left)
			mem_shared[threadIdx.x][threadIdx.y] = 0;
		else if(is_x_right)
			mem_shared[threadIdx.x+2][threadIdx.y] = 0;
	}
	else if (is_y_bottom){
		mem_shared[threadIdx.x+1][threadIdx.y+2] = 0;
		if(is_x_right)
			mem_shared[threadIdx.x+2][threadIdx.y+2] = 0;
		else if(is_x_left)
			mem_shared[threadIdx.x][threadIdx.y+2] = 0;
	}

	mem_shared[threadIdx.x+1][threadIdx.y+1] = deviceinputimage[row*dim+col];

	if(is_x_left && (col>0))
		mem_shared[threadIdx.x][threadIdx.y+1] = deviceinputimage[row*dim+(col-1)];
	else if(is_x_right && (col<dim-1))
		mem_shared[threadIdx.x + 2][threadIdx.y+1]= deviceinputimage[row*dim+(col+1)];
	if (is_y_top && (row>0)){
		mem_shared[threadIdx.x+1][threadIdx.y] = deviceinputimage[(row-1)*dim+col];
		if(is_x_left)
			mem_shared[threadIdx.x][threadIdx.y] = deviceinputimage[(row-1)*dim+(col-1)];
		else if(is_x_right )
			mem_shared[threadIdx.x+2][threadIdx.y] = deviceinputimage[(row-1)*dim+(col+1)];
	}
	else if (is_y_bottom && (row<dim-1)){
		mem_shared[threadIdx.x+1][threadIdx.y+2] = deviceinputimage[(row+1)*dim + col];
		if(is_x_right)
			mem_shared[threadIdx.x+2][threadIdx.y+2] = deviceinputimage[(row+1)*dim+(col+1)];
		else if(is_x_left)
			mem_shared[threadIdx.x][threadIdx.y+2] = deviceinputimage[(row+1)*dim+(col-1)];
	}

	__syncthreads();

    float filterVector[9] = {mem_shared[threadIdx.x][threadIdx.y], mem_shared[threadIdx.x+1][threadIdx.y],
							mem_shared[threadIdx.x+2][threadIdx.y], mem_shared[threadIdx.x][threadIdx.y+1],
							mem_shared[threadIdx.x+1][threadIdx.y+1], mem_shared[threadIdx.x+2][threadIdx.y+1],
							mem_shared[threadIdx.x] [threadIdx.y+2], mem_shared[threadIdx.x+1][threadIdx.y+2],
							mem_shared[threadIdx.x+2][threadIdx.y+2]};

	
	{

    float element = 0.0;
    for (int i = 0; i < 9; i++) {
        element += filterVector[i];
    }
	deviceOutputImage[row*dim+col] = element/9.0;
	}
}

bool meanFilterGPU(float* image, float* outputImage){
	hipEvent_t start,stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	hipEventRecord(start);
	hipError_t status;
	int dim = 1280;

    int size =  dim * dim * sizeof(float);
    
	float *inputimage_D;
    hipMalloc((void**) &inputimage_D, size);
    
	status = hipGetLastError();              
	if (status != hipSuccess) {                     
		return false;
    }
    
	hipMemcpy(inputimage_D, image, size, hipMemcpyHostToDevice);
	status = hipGetLastError();              
	if (status != hipSuccess) {                     
		hipFree(inputimage_D);
		return false;
	}
    
    float *outputImage_D;
    hipMalloc((void**) &outputImage_D, size);
    
	dim3 dimBlock(TILE_SIZE, TILE_SIZE);
	dim3 dimGrid((int)ceil((float) dim / (float)TILE_SIZE), (int)ceil((float) dim / (float)TILE_SIZE));
    
    clock_t start_filter = clock();
    meanFilter<<<dimGrid, dimBlock>>>(inputimage_D, outputImage_D, dim);
    clock_t end_filter = clock();

    double time_filter = (double)(end_filter-start_filter)/CLOCKS_PER_SEC;
    
    printf("Image size : %d Window size : %d GPU Filter Time: %f\n", dim, 3 , time_filter);
	
	hipMemcpy(outputImage, outputImage_D, size, hipMemcpyDeviceToHost);
	status = hipGetLastError();              
	


if (status != hipSuccess) {                     
		hipFree(inputimage_D);
		hipFree(outputImage_D);
		return false;
	}
	hipFree(inputimage_D);
	hipFree(outputImage_D);
	hipEventRecord(stop);
	hipEventSynchronize(stop);
	float time = 0;
	hipEventElapsedTime(&time,start,stop);
	return true;
}

int main()
{
    // freopen("filtered640GPU.txt","w",stdout);
    int size = 1280*1280;
    float *img, *filtered_img;
    img = (float *)malloc(size * sizeof(float));
	filtered_img = (float *)malloc(size * sizeof(float));

    FILE* inp;
    inp = fopen("img1280.txt","r");
    char line[6];
    char *endptr;
    int i = 0;
    while(1){
        char r = (char)fgetc(inp);
        int k = 0;
        while(r!='\n' && !feof(inp)){
            line[k++] = r;
            r = (char)fgetc(inp);
        }
        line[k]=0;
        if(feof(inp)){
            break;
        }
        img[i] = strtof(line, &endptr);
        i++;
    }

	meanFilterGPU(img, filtered_img); //GPU call for median Filtering with shared Kernel.
    
    // for (int i = 0; i < size; i++)
	// 	printf ("%f\n", filtered_img[i]);
}
	.text
	.file	"mean_filterGPU.hip"
	.globl	_Z25__device_stub__meanFilterPfS_i # -- Begin function _Z25__device_stub__meanFilterPfS_i
	.type	_Z25__device_stub__meanFilterPfS_i,@function
_Z25__device_stub__meanFilterPfS_i:     # @_Z25__device_stub__meanFilterPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10meanFilterPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__meanFilterPfS_i, .Lfunc_end0-_Z25__device_stub__meanFilterPfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13meanFilterGPUPfS_
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z13meanFilterGPUPfS_
	.type	_Z13meanFilterGPUPfS_,@function
_Z13meanFilterGPUPfS_:                  # @_Z13meanFilterGPUPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r15
	leaq	32(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	8(%rsp), %rdi
	movl	$6553600, %esi                  # imm = 0x640000
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.1:
	movq	8(%rsp), %rdi
	movl	$6553600, %edx                  # imm = 0x640000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_3
# %bb.2:
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%r14d, %r14d
	jmp	.LBB1_7
.LBB1_3:
	leaq	16(%rsp), %rdi
	movl	$6553600, %esi                  # imm = 0x640000
	callq	hipMalloc
	callq	clock
	movq	%rax, %r14
	movabsq	$1374389535040, %rdi            # imm = 0x14000000140
	movabsq	$17179869188, %rdx              # imm = 0x400000004
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.4:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$1280, %edx                     # imm = 0x500
	callq	_Z25__device_stub__meanFilterPfS_i
.LBB1_5:
	callq	clock
	subq	%r14, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	movl	$.L.str, %edi
	movl	$1280, %esi                     # imm = 0x500
	movl	$3, %edx
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rsi
	movl	$6553600, %edx                  # imm = 0x640000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	movl	%eax, %ebx
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%ebx, %ebx
	sete	%r14b
	jne	.LBB1_7
# %bb.6:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	44(%rsp), %rdi
	movl	$0, (%rdi)
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	callq	hipEventElapsedTime
.LBB1_7:
	movl	%r14d, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z13meanFilterGPUPfS_, .Lfunc_end1-_Z13meanFilterGPUPfS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$6553600, %edi                  # imm = 0x640000
	callq	malloc
	movq	%rax, %rbx
	movl	$6553600, %edi                  # imm = 0x640000
	callq	malloc
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r15
	xorl	%r14d, %r14d
	leaq	16(%rsp), %r13
.LBB2_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	movq	%r15, %rdi
	callq	fgetc
	movl	%eax, %ebp
	xorl	%r12d, %r12d
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpb	$10, %bpl
	je	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=2
	movq	%r15, %rdi
	callq	feof
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_2 Depth=2
	movb	%bpl, 2(%rsp,%r12)
	incq	%r12
	movq	%r15, %rdi
	callq	fgetc
	movl	%eax, %ebp
	jmp	.LBB2_2
.LBB2_5:                                # %.critedge
                                        #   in Loop: Header=BB2_1 Depth=1
	movl	%r12d, %eax
	movb	$0, 2(%rsp,%rax)
	movq	%r15, %rdi
	callq	feof
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.6:                                #   in Loop: Header=BB2_1 Depth=1
	leaq	2(%rsp), %rdi
	movq	%r13, %rsi
	callq	strtof
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	jmp	.LBB2_1
.LBB2_7:
	movq	%rbx, %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	callq	_Z13meanFilterGPUPfS_
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10meanFilterPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10meanFilterPfS_i,@object     # @_Z10meanFilterPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z10meanFilterPfS_i
	.p2align	3, 0x0
_Z10meanFilterPfS_i:
	.quad	_Z25__device_stub__meanFilterPfS_i
	.size	_Z10meanFilterPfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Image size : %d Window size : %d GPU Filter Time: %f\n"
	.size	.L.str, 54

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"img1280.txt"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10meanFilterPfS_i"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__meanFilterPfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10meanFilterPfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10meanFilterPfS_i     ; -- Begin function _Z10meanFilterPfS_i
	.globl	_Z10meanFilterPfS_i
	.p2align	8
	.type	_Z10meanFilterPfS_i,@function
_Z10meanFilterPfS_i:                    ; @_Z10meanFilterPfS_i
; %bb.0:
	v_and_b32_e32 v1, 0x3ff, v0
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	v_cmpx_lt_i32_e32 2, v1
	s_xor_b32 s4, exec_lo, s4
; %bb.1:                                ; %LeafBlock121
	v_cmp_eq_u32_e64 s2, 3, v1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s3, s2, exec_lo
; %bb.2:                                ; %Flow162
	s_and_not1_saveexec_b32 s4, s4
; %bb.3:                                ; %LeafBlock
	v_cmp_eq_u32_e64 s2, 0, v1
	s_and_not1_b32 s3, s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s3, s3, s2
; %bb.4:                                ; %Flow163
	s_or_b32 exec_lo, exec_lo, s4
	v_bfe_u32 v0, v0, 10, 10
	v_cndmask_b32_e64 v7, 0x78, 0, vcc_lo
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_6
; %bb.5:                                ; %.sink.split
	v_cndmask_b32_e64 v2, 0x78, 0, vcc_lo
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v2, v0, 2, v2
	ds_store_b32 v2, v3 offset:4
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b32 s7, s[0:1], 0x24
	v_cmp_eq_u32_e64 s2, 3, v1
	v_cmp_eq_u32_e64 s4, 0, v0
	v_cmp_eq_u32_e64 s3, 3, v0
	v_add_nc_u32_e32 v8, 1, v1
	s_mov_b32 s6, 0
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr2
	v_cmpx_ne_u32_e32 0, v0
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_14
; %bb.7:
	s_mov_b32 s5, 0
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s6, s3
	s_cbranch_execz .LBB0_13
; %bb.8:
	v_mul_u32_u24_e32 v2, 24, v1
	v_mov_b32_e32 v3, 0
	s_mov_b32 s9, 0
	s_mov_b32 s10, exec_lo
	ds_store_b32 v2, v3 offset:44
	v_cndmask_b32_e64 v2, 20, 0x8c, s2
	v_cndmask_b32_e64 v3, 1, 4, s2
	v_cmpx_lt_i32_e32 2, v1
	s_xor_b32 s10, exec_lo, s10
; %bb.9:                                ; %LeafBlock131
	v_cmp_eq_u32_e64 s5, 3, v1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s5, exec_lo
; %bb.10:                               ; %Flow157
	s_and_not1_saveexec_b32 s10, s10
; %bb.11:                               ; %LeafBlock129
	v_cmp_eq_u32_e64 s5, 0, v1
	s_and_not1_b32 s9, s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, exec_lo
	s_or_b32 s9, s9, s5
; %bb.12:                               ; %Flow158
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s5, s9, exec_lo
.LBB0_13:                               ; %Flow156
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s6, s5, exec_lo
.LBB0_14:                               ; %Flow155
	s_and_not1_saveexec_b32 s8, s8
	s_cbranch_execz .LBB0_20
; %bb.15:
	v_mul_u32_u24_e32 v2, 24, v1
	v_mov_b32_e32 v3, 0
	s_mov_b32 s9, s6
	s_mov_b32 s10, exec_lo
	ds_store_b32 v2, v3 offset:24
	v_cndmask_b32_e64 v2, 0x78, 0, vcc_lo
	v_cndmask_b32_e64 v3, 4, 1, vcc_lo
	v_cmpx_lt_i32_e32 2, v1
	s_xor_b32 s10, exec_lo, s10
; %bb.16:                               ; %LeafBlock125
	v_cmp_eq_u32_e64 s5, 3, v1
	s_and_not1_b32 s9, s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, exec_lo
	s_or_b32 s9, s9, s5
; %bb.17:                               ; %Flow160
	s_and_not1_saveexec_b32 s10, s10
; %bb.18:                               ; %LeafBlock123
	v_cmp_eq_u32_e64 s5, 0, v1
	s_and_not1_b32 s9, s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, exec_lo
	s_or_b32 s9, s9, s5
; %bb.19:                               ; %Flow161
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s5, s6, exec_lo
	s_and_b32 s6, s9, exec_lo
	s_or_b32 s6, s5, s6
.LBB0_20:                               ; %Flow159
	s_or_b32 exec_lo, exec_lo, s8
	s_and_saveexec_b32 s5, s6
	s_cbranch_execz .LBB0_22
; %bb.21:                               ; %._crit_edge.sink.split
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v8, v3
	ds_store_b32 v2, v4
.LBB0_22:                               ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s5
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x10
	s_load_b128 s[8:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s7, 16
	v_mul_lo_u32 v8, v8, 24
	v_mad_u64_u32 v[5:6], null, s15, s5, v[0:1]
	s_and_b32 s5, s7, 0xffff
	s_xor_b32 s1, vcc_lo, -1
	v_mad_u64_u32 v[2:3], null, s14, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v6, v0, 2, v8
	v_mul_lo_u32 v11, v5, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v11, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[3:4]
	v_add_co_u32 v3, s0, s8, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s9, v10, s0
	v_cmp_gt_i32_e64 s0, 1, v2
	global_load_b32 v12, v[3:4], off
	s_or_b32 s0, s1, s0
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v12 offset:4
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_26
; %bb.23:
	s_add_i32 s0, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, s0, v2
	s_and_b32 s5, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB0_25
; %bb.24:
	global_load_b32 v3, v[3:4], off offset:4
	v_lshlrev_b32_e32 v4, 2, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v3 offset:124
.LBB0_25:                               ; %Flow153
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3_vgpr4
.LBB0_26:                               ; %Flow154
	s_or_saveexec_b32 s0, s1
	v_lshlrev_b32_e32 v0, 2, v0
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_28
; %bb.27:
	global_load_b32 v3, v[3:4], off offset:-4
	s_waitcnt vmcnt(0)
	ds_store_b32 v0, v3 offset:4
.LBB0_28:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_i32_e64 s0, 1, v5
	s_xor_b32 s1, s4, -1
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s1, s0
	s_mov_b32 s1, 0
	s_and_saveexec_b32 s4, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_36
; %bb.29:
	s_add_i32 s0, s6, -1
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, s0, v5
	s_and_b32 s3, s3, s0
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s1, s3
	s_cbranch_execz .LBB0_35
; %bb.30:
	v_mad_u64_u32 v[3:4], null, s6, v5, s[6:7]
	v_cndmask_b32_e64 v7, 20, 0x8c, s2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v3, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, s0, s8, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s9, v5, s0
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v4 offset:20
	v_cndmask_b32_e64 v4, -1, 1, s2
	s_mov_b32 s2, 0
	v_cmpx_lt_i32_e32 2, v1
	s_xor_b32 s3, exec_lo, s3
; %bb.31:                               ; %LeafBlock143
	v_cmp_eq_u32_e64 s0, 3, v1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s2, s0, exec_lo
; %bb.32:                               ; %Flow148
	s_and_not1_saveexec_b32 s3, s3
; %bb.33:                               ; %LeafBlock141
	v_cmp_eq_u32_e64 s0, 0, v1
	s_and_not1_b32 s2, s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s2, s2, s0
; %bb.34:                               ; %Flow149
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s2, exec_lo
.LBB0_35:                               ; %Flow147
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s0, exec_lo
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr8
.LBB0_36:                               ; %Flow
	s_and_not1_saveexec_b32 s2, s4
	s_cbranch_execz .LBB0_42
; %bb.37:
	v_subrev_nc_u32_e32 v3, s6, v11
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v3, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, s0, s8, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s9, v5, s0
	s_mov_b32 s0, s1
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v4
	v_cndmask_b32_e64 v4, 1, -1, vcc_lo
	v_cmpx_lt_i32_e32 2, v1
	s_xor_b32 s3, exec_lo, s3
; %bb.38:                               ; %LeafBlock137
	v_cmp_eq_u32_e32 vcc_lo, 3, v1
	s_and_not1_b32 s0, s1, exec_lo
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s4
; %bb.39:                               ; %Flow151
	s_and_not1_saveexec_b32 s3, s3
; %bb.40:                               ; %LeafBlock135
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s4
; %bb.41:                               ; %Flow152
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s1, s1, s0
.LBB0_42:                               ; %Flow150
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_44
; %bb.43:                               ; %.sink.split84
	v_add3_u32 v2, v2, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v2
.LBB0_44:
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u32_u24 v0, v1, 24, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[11:12], v6 offset1:1
	ds_load_2addr_b32 v[2:3], v0 offset1:1
	ds_load_2addr_b32 v[4:5], v0 offset0:12 offset1:13
	ds_load_2addr_b32 v[13:14], v0 offset0:2 offset1:14
	ds_load_b32 v7, v6 offset:8
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(3)
	v_dual_mov_b32 v1, v11 :: v_dual_mov_b32 v0, v2
	s_waitcnt lgkmcnt(2)
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v11, 0
	v_mov_b32_e32 v4, v12
	s_waitcnt lgkmcnt(1)
	v_mov_b32_e32 v6, v13
	v_mov_b32_e32 v8, v14
.LBB0_45:                               ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_waitcnt lgkmcnt(0)
	v_movrels_b32_e32 v12, v0
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v11, v11, v12
	s_cbranch_scc0 .LBB0_45
; %bb.46:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v0, null, 0x41100000, 0x41100000, v11
	v_div_scale_f32 v3, vcc_lo, v11, 0x41100000, v11
	v_rcp_f32_e32 v1, v0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v2, -v0, v1, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, v2, v1
	v_mul_f32_e32 v2, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, -v0, v2, v3
	v_fmac_f32_e32 v2, v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v0, -v0, v2, v3
	v_div_fmas_f32 v0, v0, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v2, v0, 0x41100000, v11
	v_add_co_u32 v0, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v10, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10meanFilterPfS_i
		.amdhsa_group_segment_fixed_size 144
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10meanFilterPfS_i, .Lfunc_end0-_Z10meanFilterPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1548
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 144 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 144
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10meanFilterPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10meanFilterPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
