#include<iostream>
#include<cstdlib>
#include<fstream>
#include<string>
#include<sys/time.h>

typedef unsigned long long int UINT;

using namespace std;

__global__ void GPU(int *dev_table, int startIdx, int curjobs, const int rowsize, int startx, int starty){
	int thread = blockIdx.x * blockDim.x + threadIdx.x;
	
	if (thread < curjobs){
		int idx = startIdx + (thread * rowsize - thread);
		dev_table[idx] = (dev_table[idx-1] + dev_table[idx-rowsize] + dev_table[idx]
				+ dev_table[idx+1] + dev_table[idx+rowsize]) / 5;	
	}		
}

void checkGPUError(cudaError err){
	if (cudaSuccess != err){
		printf("CUDA error in file %s, in line %i: %s\n", __FILE__, __LINE__, cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}
}

void SOR(int n1, int n2, int *arr){
	int paddsize = 1;
	int rowsize = n1 + 2 * paddsize;
	int colsize = n2 + 2 * paddsize;

	int *dev_table;
	size_t freeMem, totalMem;

	cudaMemGetInfo(&freeMem, &totalMem);
	int tablesize = rowsize * colsize;
	cout << "current GPU memory info FREE: " << freeMem << " Bytes, Total: " << totalMem << " Bytes.";
	cout << "colsize: " << colsize << ", rowsize: " << rowsize << ", allocates: " << tablesize * sizeof(int)<< " Bytes." << endl;
	cudaError err = cudaMalloc(&dev_table, tablesize * sizeof(int));
	checkGPUError(err);
	
	cudaMemcpy(dev_table, arr, tablesize * sizeof(int), cudaMemcpyHostToDevice);

	int maxthreads = min(n1 ,n2);
	int maxlevel = n1 + n2 - 1;	
	int curlevel = 1;
	int curjobs = 1;
	int startx, starty;
	int threadPerBlock = 128, blockPerGrid;

	cudaDeviceSetCacheConfig(cudaFuncCachePreferL1);

	//suppose n1 is the row size and the longer array
	while(curlevel <= maxlevel){
//		cout << "level: " << curlevel << endl;
		int startIdx;
		if (curlevel <= n1){
			startIdx = curlevel - 1; 
			curjobs = curlevel;
			startx = startIdx;
			starty = 0;
		}
		else{
			startIdx = n1 - 1 + rowsize * (curlevel - n1);
			curjobs = 2 * n1 - curlevel;
			startx = n1 - 1;
			starty = curlevel - n1;
		}

		int numthreads = (curjobs + 31) / 32;
		numthreads *= 32;
	
		blockPerGrid = (numthreads + threadPerBlock - 1) / threadPerBlock;

		GPU<<<blockPerGrid, threadPerBlock>>>(&dev_table[paddsize*rowsize+paddsize], startIdx, curjobs, rowsize, startx, starty);		
		
		cudaDeviceSynchronize();		

		curlevel++;
	}

//	cudaMemcpy(table, dev_table, (n1+paddsize)*rowsize*sizeof(int), cudaMemcpyDeviceToHost);
/*
	//display table
	cout << "full table: " << endl;
	for (int i=0; i<n1+paddsize; i++){
		for (int j=0; j<n2+paddsize; j++){
			cout << table[i * rowsize + j] << " ";
		}
		cout << endl;
	}
*/	

	cudaFree(dev_table);
}


	.file	"tmpxft_002f9f24_00000000-6_GPU.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3770:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3770:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/zzzhe1990/GPUMemEfficient/master/2D-HEAT/GPU.cu"
.LC1:
	.string	"CUDA error in file %s, in line %i: %s\n"
	.text
	.globl	_Z13checkGPUError9cudaError
	.type	_Z13checkGPUError9cudaError, @function
_Z13checkGPUError9cudaError:
.LFB3766:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movl	$23, %ecx
	leaq	.LC0(%rip), %rdx
	movq	%rax, %r8
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z13checkGPUError9cudaError, .-_Z13checkGPUError9cudaError
	.globl	_Z27__device_stub__Z3GPUPiiiiiiPiiiiii
	.type	_Z27__device_stub__Z3GPUPiiiiiiPiiiiii, @function
_Z27__device_stub__Z3GPUPiiiiiiPiiiiii:
.LFB3792:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z3GPUPiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L8:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3792:
	.size	_Z27__device_stub__Z3GPUPiiiiiiPiiiiii, .-_Z27__device_stub__Z3GPUPiiiiiiPiiiiii
	.globl	_Z3GPUPiiiiii
	.type	_Z3GPUPiiiiii, @function
_Z3GPUPiiiiii:
.LFB3793:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z3GPUPiiiiiiPiiiiii
	.cfi_endproc
.LFE3793:
	.size	_Z3GPUPiiiiii, .-_Z3GPUPiiiiii
	.section	.rodata.str1.1
.LC2:
	.string	"current GPU memory info FREE: "
.LC3:
	.string	" Bytes, Total: "
.LC4:
	.string	" Bytes."
.LC5:
	.string	"colsize: "
.LC6:
	.string	", rowsize: "
.LC7:
	.string	", allocates: "
	.text
	.globl	_Z3SORiiPi
	.type	_Z3SORiiPi, @function
_Z3SORiiPi:
.LFB3767:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	_ZSt4cout(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leal	2(%rsi), %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leal	2(%rdi), %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r13d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	imull	%r14d, %ebp
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movslq	%ebp, %rbp
	movq	%rdx, (%rsp)
	leaq	56(%rsp), %rsi
	leaq	48(%rsp), %rdi
	salq	$2, %rbp
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	cudaMemGetInfo@PLT
	leaq	.LC2(%rip), %rsi
	movq	%r15, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	48(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	56(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC5(%rip), %rsi
	movq	%r15, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbp, %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z13checkGPUError9cudaError
	movq	(%rsp), %rsi
	movq	40(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movl	$1, %ebp
	call	cudaMemcpy@PLT
	leal	(%rbx,%r12), %eax
	movl	$2, %edi
	subl	%ebx, %ebp
	movl	%eax, 12(%rsp)
	movl	$1, %r12d
	call	cudaDeviceSetCacheConfig@PLT
	leal	3(%rbx), %eax
	cltq
	salq	$2, %rax
	movq	%rax, 16(%rsp)
	movl	%r13d, %eax
	imull	%ebp, %eax
	leal	-1(%rbx,%rax), %eax
	movl	%eax, (%rsp)
.L14:
	cmpl	%r12d, 12(%rsp)
	jle	.L21
	cmpl	%ebx, %r12d
	jg	.L15
	leal	-1(%r12), %r15d
	movl	%r12d, %r14d
	xorl	%r10d, %r10d
	movl	%r15d, %r11d
	jmp	.L16
.L15:
	movl	%ebx, %r14d
	movl	(%rsp), %r11d
	leal	-1(%rbx), %r15d
	movl	%ebp, %r10d
	subl	%ebp, %r14d
.L16:
	leal	31(%r14), %eax
	movl	$32, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cltd
	movl	%r11d, 28(%rsp)
	idivl	%ecx
	movl	%r10d, 24(%rsp)
	movl	$128, %ecx
	sall	$5, %eax
	addl	$127, %eax
	cltd
	idivl	%ecx
	movl	$33554433, %edx
	movl	$1, %ecx
	salq	$7, %rdx
	movl	%eax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 68(%rsp)
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movl	24(%rsp), %r10d
	movl	28(%rsp), %r11d
	testl	%eax, %eax
	jne	.L17
	movq	16(%rsp), %rdi
	movl	%r10d, %r9d
	addq	40(%rsp), %rdi
	movl	%r15d, %r8d
	movl	%r13d, %ecx
	movl	%r14d, %edx
	movl	%r11d, %esi
	call	_Z27__device_stub__Z3GPUPiiiiiiPiiiiii
.L17:
	call	cudaDeviceSynchronize@PLT
	incl	%r12d
	addl	%r13d, (%rsp)
	incl	%ebp
	jmp	.L14
.L21:
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.size	_Z3SORiiPi, .-_Z3SORiiPi
	.section	.rodata.str1.1
.LC8:
	.string	"_Z3GPUPiiiiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3795:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3GPUPiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3795:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<iostream>
#include<cstdlib>
#include<fstream>
#include<string>
#include<sys/time.h>

typedef unsigned long long int UINT;

using namespace std;

__global__ void GPU(int *dev_table, int startIdx, int curjobs, const int rowsize, int startx, int starty){
	int thread = blockIdx.x * blockDim.x + threadIdx.x;
	
	if (thread < curjobs){
		int idx = startIdx + (thread * rowsize - thread);
		dev_table[idx] = (dev_table[idx-1] + dev_table[idx-rowsize] + dev_table[idx]
				+ dev_table[idx+1] + dev_table[idx+rowsize]) / 5;	
	}		
}

void checkGPUError(hipError_t err){
	if (hipSuccess != err){
		printf("CUDA error in file %s, in line %i: %s\n", __FILE__, __LINE__, hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}
}

void SOR(int n1, int n2, int *arr){
	int paddsize = 1;
	int rowsize = n1 + 2 * paddsize;
	int colsize = n2 + 2 * paddsize;

	int *dev_table;
	size_t freeMem, totalMem;

	hipMemGetInfo(&freeMem, &totalMem);
	int tablesize = rowsize * colsize;
	cout << "current GPU memory info FREE: " << freeMem << " Bytes, Total: " << totalMem << " Bytes.";
	cout << "colsize: " << colsize << ", rowsize: " << rowsize << ", allocates: " << tablesize * sizeof(int)<< " Bytes." << endl;
	hipError_t err = hipMalloc(&dev_table, tablesize * sizeof(int));
	checkGPUError(err);
	
	hipMemcpy(dev_table, arr, tablesize * sizeof(int), hipMemcpyHostToDevice);

	int maxthreads = min(n1 ,n2);
	int maxlevel = n1 + n2 - 1;	
	int curlevel = 1;
	int curjobs = 1;
	int startx, starty;
	int threadPerBlock = 128, blockPerGrid;

	hipDeviceSetCacheConfig(hipFuncCachePreferL1);

	//suppose n1 is the row size and the longer array
	while(curlevel <= maxlevel){
//		cout << "level: " << curlevel << endl;
		int startIdx;
		if (curlevel <= n1){
			startIdx = curlevel - 1; 
			curjobs = curlevel;
			startx = startIdx;
			starty = 0;
		}
		else{
			startIdx = n1 - 1 + rowsize * (curlevel - n1);
			curjobs = 2 * n1 - curlevel;
			startx = n1 - 1;
			starty = curlevel - n1;
		}

		int numthreads = (curjobs + 31) / 32;
		numthreads *= 32;
	
		blockPerGrid = (numthreads + threadPerBlock - 1) / threadPerBlock;

		GPU<<<blockPerGrid, threadPerBlock>>>(&dev_table[paddsize*rowsize+paddsize], startIdx, curjobs, rowsize, startx, starty);		
		
		hipDeviceSynchronize();		

		curlevel++;
	}

//	cudaMemcpy(table, dev_table, (n1+paddsize)*rowsize*sizeof(int), cudaMemcpyDeviceToHost);
/*
	//display table
	cout << "full table: " << endl;
	for (int i=0; i<n1+paddsize; i++){
		for (int j=0; j<n2+paddsize; j++){
			cout << table[i * rowsize + j] << " ";
		}
		cout << endl;
	}
*/	

	hipFree(dev_table);
}


	.text
	.file	"GPU.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z18__device_stub__GPUPiiiiii   # -- Begin function _Z18__device_stub__GPUPiiiiii
	.type	_Z18__device_stub__GPUPiiiiii,@function
_Z18__device_stub__GPUPiiiiii:          # @_Z18__device_stub__GPUPiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3GPUPiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__GPUPiiiiii, .Lfunc_end0-_Z18__device_stub__GPUPiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13checkGPUError10hipError_t   # -- Begin function _Z13checkGPUError10hipError_t
	.type	_Z13checkGPUError10hipError_t,@function
_Z13checkGPUError10hipError_t:          # @_Z13checkGPUError10hipError_t
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$25, %edx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z13checkGPUError10hipError_t, .Lfunc_end1-_Z13checkGPUError10hipError_t
	.cfi_endproc
                                        # -- End function
	.globl	_Z3SORiiPi                      # -- Begin function _Z3SORiiPi
	.type	_Z3SORiiPi,@function
_Z3SORiiPi:                             # @_Z3SORiiPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movl	%esi, %r13d
                                        # kill: def $edi killed $edi def $rdi
	movq	%rdi, 24(%rsp)                  # 8-byte Spill
	leal	2(%rdi), %r15d
	leal	2(%r13), %r12d
	leaq	80(%rsp), %rbx
	leaq	72(%rsp), %r14
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMemGetInfo
	movl	%r12d, %ebp
	imull	%r15d, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$30, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rsi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$15, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r14), %rsi
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.4, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r12d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.6, %esi
	movl	$11, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	%r15d, 12(%rsp)                 # 4-byte Spill
	movl	%r15d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$13, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movslq	%ebp, %r12
	shlq	$2, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.4, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z13checkGPUError10hipError_t
	movq	(%rbx), %rdi
	movl	$1, %ebx
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	addl	24(%rsp), %r13d                 # 4-byte Folded Reload
	movl	$2, %edi
	callq	hipDeviceSetCacheConfig
	movq	%r13, 16(%rsp)                  # 8-byte Spill
	cmpl	$2, %r13d
	jl	.LBB2_8
# %bb.1:                                # %.lr.ph
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	movq	24(%rsp), %rcx                  # 8-byte Reload
	leal	-1(%rcx), %eax
	movl	%eax, 36(%rsp)                  # 4-byte Spill
	leal	(%rcx,%rcx), %eax
	movl	%eax, 32(%rsp)                  # 4-byte Spill
	movslq	%ecx, %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	negl	%eax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movl	$1, %eax
	subl	%ecx, %eax
	imull	12(%rsp), %eax                  # 4-byte Folded Reload
	leal	(%rcx,%rax), %r13d
	decl	%r13d
	leaq	128(%rdx), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
.LBB2_2:                                # =>This Inner Loop Header: Depth=1
	cmpl	24(%rsp), %ebx                  # 4-byte Folded Reload
	jle	.LBB2_3
# %bb.4:                                #   in Loop: Header=BB2_2 Depth=1
	movq	56(%rsp), %rax                  # 8-byte Reload
	leal	(%rax,%rbx), %r12d
	movl	32(%rsp), %eax                  # 4-byte Reload
	movl	%eax, %ebp
	subl	%ebx, %ebp
	movl	%r13d, %r14d
	movl	36(%rsp), %r15d                 # 4-byte Reload
	jmp	.LBB2_5
.LBB2_3:                                #   in Loop: Header=BB2_2 Depth=1
	leal	-1(%rbx), %r14d
	xorl	%r12d, %r12d
	movl	%r14d, %r15d
	movl	%ebx, %ebp
.LBB2_5:                                #   in Loop: Header=BB2_2 Depth=1
	leal	31(%rbp), %eax
	leal	62(%rbp), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	andl	$-32, %edi
	leal	127(%rdi), %eax
	addl	$254, %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$7, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.6:                                #   in Loop: Header=BB2_2 Depth=1
	movq	40(%rsp), %rax
	movq	48(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rax,%rcx,4), %rdi
	addq	$12, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r15d, %r8d
	movl	%r12d, %r9d
	callq	_Z18__device_stub__GPUPiiiiii
.LBB2_7:                                #   in Loop: Header=BB2_2 Depth=1
	callq	hipDeviceSynchronize
	incl	%ebx
	addl	12(%rsp), %r13d                 # 4-byte Folded Reload
	cmpl	%ebx, 16(%rsp)                  # 4-byte Folded Reload
	jne	.LBB2_2
.LBB2_8:                                # %._crit_edge
	movq	40(%rsp), %rdi
	callq	hipFree
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z3SORiiPi, .Lfunc_end2-_Z3SORiiPi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3GPUPiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3GPUPiiiiii,@object           # @_Z3GPUPiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z3GPUPiiiiii
	.p2align	3, 0x0
_Z3GPUPiiiiii:
	.quad	_Z18__device_stub__GPUPiiiiii
	.size	_Z3GPUPiiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error in file %s, in line %i: %s\n"
	.size	.L.str, 39

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/zzzhe1990/GPUMemEfficient/master/2D-HEAT/GPU.hip"
	.size	.L.str.1, 111

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"current GPU memory info FREE: "
	.size	.L.str.2, 31

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" Bytes, Total: "
	.size	.L.str.3, 16

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" Bytes."
	.size	.L.str.4, 8

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"colsize: "
	.size	.L.str.5, 10

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	", rowsize: "
	.size	.L.str.6, 12

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	", allocates: "
	.size	.L.str.7, 14

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3GPUPiiiiii"
	.size	.L__unnamed_1, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__GPUPiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3GPUPiiiiii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3GPUPiiiiii           ; -- Begin function _Z3GPUPiiiiii
	.globl	_Z3GPUPiiiiii
	.p2align	8
	.type	_Z3GPUPiiiiii,@function
_Z3GPUPiiiiii:                          ; @_Z3GPUPiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_add_i32 s2, s6, -1
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s2, s[4:5]
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[2:3], s[6:7], 2
	v_subrev_nc_u32_e32 v0, s6, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, v4, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v5, vcc_lo
	s_clause 0x2
	global_load_b96 v[0:2], v[4:5], off offset:-4
	global_load_b32 v3, v[6:7], off
	global_load_b32 v6, v[8:9], off
	s_waitcnt vmcnt(1)
	v_add3_u32 v0, v3, v0, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v0, v2, v6
	v_mul_hi_i32 v0, 0x66666667, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v0, 1, v0
	v_add_nc_u32_e32 v0, v0, v1
	global_store_b32 v[4:5], v0, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3GPUPiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3GPUPiiiiii, .Lfunc_end0-_Z3GPUPiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3GPUPiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3GPUPiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
