#include <cuda.h>
#include <stdio.h>
#include <iostream>
#include <sys/time.h>

using namespace std;

const int BLOCK_WIDTH = 16;
const int BLOCK_HEIGHT = 16;
const int DEFAULT_ELE = 16;

typedef struct __align__(8) linkNode
{
	int edge;
	linkNode* next;
} linkNode;

//HACK: This will be incredibly slow  on CUDA!
__device__ int findNext(int* edges, int numEdge, int v, int* destination)
{
	int count = 0;

	for(int i = 0; i < numEdge * 2; i+=2)
	{
		if(edges[i] == v)
			destination[count++] = edges[i + 1];
	}

	return count;
}

__device__ void pushQueue(int element, int* queue, int queueSize, int* head, int* tail)
{
	queue[*tail] = element;
	*tail = (*tail + 1) % queueSize;
}

__device__ int popQueue(int* queue, int queueSize, int* head, int* tail)
{
	int retn = queue[*head];
	*head = (*head + 1) % queueSize;
	
	return retn;
}

__device__ void pushStack(int element, int* stack, int* head)
{
	stack[*head] = element;
	*head = *head + 1;
}

__device__ int popStack(int* stack, int* head)
{
	*head = *head - 1;
	int retn = stack[*head];
	
	return retn;
}

__device__ int ELEMENTS = DEFAULT_ELE;
__device__ int S_SIZE;
__device__ int P_SIZE;
__device__ int PATH_SIZE;
__device__ int D_SIZE;
__device__ int Q_SIZE;

__device__ void doAlg(int numVert, int* edges, int numEdges, linkNode* pList, float* BC, int* glob, float* globDep)
{
	S_SIZE = numVert;
	P_SIZE = numEdges + numVert;
	D_SIZE = numVert;
	Q_SIZE = numVert;
	PATH_SIZE = numVert;
	ELEMENTS = numVert;

	int x = blockDim.x * blockIdx.x + threadIdx.x;	
	int y = blockDim.y * blockIdx.y + threadIdx.y;	
	int idx = x + y * blockDim.x * gridDim.x;

	unsigned int PTR_OFFSET = idx * (S_SIZE + D_SIZE + Q_SIZE + PATH_SIZE);
	
	int* S = &glob[PTR_OFFSET];
	int S_head = 0;
	PTR_OFFSET += S_SIZE;
	
	linkNode* P = &pList[idx * P_SIZE];
	//Blank the previous items
	for(int i = 0; i < P_SIZE; i++)
	{
		P[i].edge = -1;
		P[i].next = NULL;
	}

	int* pathCount = &glob[PTR_OFFSET];
	for(int i = 0; i < PATH_SIZE; i++)
	{
		pathCount[i] = 0;
	}
	pathCount[idx] = 1;
	PTR_OFFSET += PATH_SIZE;

	int* d = &glob[PTR_OFFSET];
	for(int i = 0; i < D_SIZE; i++)
	{
		d[i] = -1;
	}
	d[idx] = 0;
	PTR_OFFSET += D_SIZE;
	
	int* Q = &glob[PTR_OFFSET];
	int Q_head = 0;
	int Q_tail = 0;
	PTR_OFFSET += Q_SIZE;
	
	pushQueue(idx, Q, Q_SIZE, &Q_head, &Q_tail);

	while(Q_head != Q_tail)
	{
		int v = popQueue(Q, Q_SIZE, &Q_head, &Q_tail);
		pushStack(v, S, &S_head);

		int w[1024];
		int edgeCount = findNext(edges, numEdges, v, w);

		for(int i = 0; i < edgeCount; i++)
		{
			int wNode = w[i];
			if(d[wNode] < 0)
			{
				pushQueue(wNode, Q, Q_SIZE, &Q_head, &Q_tail);
				d[wNode] = d[v] + 1;
			}
			
			if(d[wNode] == d[v] + 1)
			{
				pathCount[wNode] = pathCount[wNode] + pathCount[v];
				
				//Append v to the PrevNode list

				//Find the next empty slot. Start after the initial lookup indices
				if(P[wNode].edge < 0) P[wNode].edge = v;
				else
				{
					linkNode* empty;
					for(empty = &P[numVert]; empty->edge >= 0; empty++);

					linkNode* j = &P[wNode];
					linkNode* last = NULL;
					while(j !=  NULL)
					{
						last = j;
						j = j->next;
					}
					last->next = empty;
					empty->edge = v;
				}
				
				
			}
		}

	}
	
	float* dep = &globDep[idx * ELEMENTS];
	
	while(S_head > 0)
	{
		int w = popStack(S, &S_head);
		
		//Loop through each v in P[w]
		linkNode* node = &P[w];
		do
		{
			int v = node->edge;
			node = node->next;
			if(v < 0) continue;

			dep[v] = dep[v] + ((float)pathCount[v]/(float)pathCount[w]) * (1 + dep[w]);
		}while(node != NULL);
		
		if(w != idx)
		{
			atomicAdd(&BC[w], dep[w]);
		}
	}
	
}

__global__ void betweennessCentrality(int numVert, int numEdges, int *edges, linkNode* pList, float* BC, int* glob, float* dep)
{
	//extern __shared__ int path[];
	
	//sortEdges(edges, path);
	int x = blockDim.x * blockIdx.x + threadIdx.x;	
	int y = blockDim.y * blockIdx.y + threadIdx.y;	
	int idx = x + y * blockDim.x * gridDim.x;

	if(idx >= numVert) return;

	BC[idx] = 0.0f;

	__syncthreads();

	doAlg(numVert, edges, numEdges, pList, BC, glob, dep);

		
}

int main(int argc, char* argv[])
{
	int elements = DEFAULT_ELE;

	//cudaProfilerStart();
	int *d_mem;
	int *h_edge;
	int *d_edge;
	linkNode* pList;
	float *d_bc;
	float *h_bc;
	int *d_glob;
	float *d_dep;

	int numVert = elements;
	int numEdge = elements - 1;

	if(argc < 2)
	{

		FILE *grFile;
		grFile = fopen("test.gr", "w");
		fprintf(grFile, "p %d %d d u 0\n", numVert, numEdge);
		h_edge = (int*)malloc(sizeof(int) * numEdge * 2);
		
		//Init edges
		for(int i = 0; i < numEdge; i++)
		{
			h_edge[i * 2] = i % numVert;
			h_edge[i * 2 + 1] = (i + 1) % numVert;
			fprintf(grFile, "%d %d\n", h_edge[i * 2], h_edge[i * 2 + 1]);
		}
		fclose(grFile);
	}
	else
	{
		FILE *grFile;
		char buff[1024];
		int edgeCnt = 0;
		grFile = fopen(argv[1], "r");
		while(!feof(grFile))
		{
			fgets(buff, 1024, grFile);
			if(feof(grFile))break;

			//This is the  "problem" line
			if(buff[0] == 'p')
			{
				char* token = strtok(buff, " ");

				token = strtok(NULL, " ");
				token = strtok(NULL, " ");
				numVert = atoi(token);
				
				token = strtok(NULL, " ");
				numEdge = atoi(token) * 2;

				h_edge = (int*)malloc(sizeof(int) * numEdge * 2);

			}
			else if(buff[0] == '#' || buff[0] == 'c')
				continue;
			else if(buff[0] == 'a')
			{
				char* token = strtok(buff, " ");

				//Skip 'a'
				token = strtok(NULL, " ");
				int e1 = atoi(token) - 1;
				h_edge[edgeCnt] = e1;
				h_edge[edgeCnt + 3] = e1;
				token = strtok(NULL, " ");
				int e2 = atoi(token) - 1;
				h_edge[edgeCnt + 1] = e2;
				h_edge[edgeCnt + 2] = e2;
				edgeCnt += 4;
			}
		}
	}
	struct timeval totalStart, totalEnd;
	gettimeofday(&totalStart, NULL);

	long totalMem = 0;
	h_bc = (float*)malloc(sizeof(float) * numVert);
	cudaMalloc((void**)&d_mem, sizeof(int) * numVert);
	totalMem += sizeof(int) * numVert;
	
	cudaMalloc((void**)&d_edge, sizeof(int) * numEdge * 2);
	totalMem += sizeof(int) * numEdge * 2;

	cudaMalloc((void**)&d_bc, sizeof(float) * numVert);
	totalMem += sizeof(float) * numVert;

	cudaMalloc((void**)&d_glob, sizeof(int) * numVert * (numVert * 5));
	totalMem += sizeof(int) * numVert * ((numVert * 5));

	cudaMalloc((void**)&pList, sizeof(linkNode) * numEdge * (numVert + numVert));
	totalMem += sizeof(linkNode) * numEdge * (numVert + numVert);

	cudaMalloc((void**)&d_dep, sizeof(float) * numVert * numVert);
	totalMem += sizeof(float) * numVert * numVert;

	cudaMemcpy(d_edge, h_edge, sizeof(int) * numEdge * 2, cudaMemcpyHostToDevice);
	
	dim3 block(BLOCK_WIDTH, BLOCK_HEIGHT);
	int gridSize = ceil(numVert / (float)(BLOCK_WIDTH * BLOCK_HEIGHT));
	dim3 grid(gridSize);

	struct timeval start, end;

	gettimeofday(&start, NULL);
	betweennessCentrality<<<grid,block>>>(numVert, numEdge, d_edge, pList, d_bc, d_glob, d_dep);
	cudaDeviceSynchronize();
	gettimeofday(&end, NULL);
	long elapsed = (end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec);

	cudaError_t error = cudaGetLastError();
	
	int* h_mem = (int*)malloc(sizeof(int) * numVert);
	cudaMemcpy(h_mem, d_mem, sizeof(int) * numVert, cudaMemcpyDeviceToHost);
	cudaMemcpy(h_bc, d_bc, sizeof(float) * numVert, cudaMemcpyDeviceToHost);

	gettimeofday(&totalEnd, NULL);
	long totalElapsed = (totalEnd.tv_sec * 1000000 + totalEnd.tv_usec) - 
		( totalStart.tv_sec * 1000000 + totalStart.tv_usec); 

	for(int i = 0; i < numVert; i++)
	{
		cout << h_bc[i] << endl;
	}
	//cout<<elements<<endl;
	
	//cudaProfilerStop();
	
	cudaDeviceReset();
	cout << cudaGetErrorString(error) << endl;
	cout << "Mem Used: " << totalMem << endl;
	cout << "Time(usec): " << elapsed << endl;
	cout << "Total Time(usec): " << totalElapsed << endl;
	
	return 0;
}

	.file	"tmpxft_0021bd71_00000000-6_bc_cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3644:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3644:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4300:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4300:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z8findNextPiiiS_
	.type	_Z8findNextPiiiS_, @function
_Z8findNextPiiiS_:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z8findNextPiiiS_, .-_Z8findNextPiiiS_
	.globl	_Z9pushQueueiPiiS_S_
	.type	_Z9pushQueueiPiiS_S_, @function
_Z9pushQueueiPiiS_S_:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z9pushQueueiPiiS_S_, .-_Z9pushQueueiPiiS_S_
	.globl	_Z8popQueuePiiS_S_
	.type	_Z8popQueuePiiS_S_, @function
_Z8popQueuePiiS_S_:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3637:
	.size	_Z8popQueuePiiS_S_, .-_Z8popQueuePiiS_S_
	.globl	_Z9pushStackiPiS_
	.type	_Z9pushStackiPiS_, @function
_Z9pushStackiPiS_:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3638:
	.size	_Z9pushStackiPiS_, .-_Z9pushStackiPiS_
	.globl	_Z8popStackPiS_
	.type	_Z8popStackPiS_, @function
_Z8popStackPiS_:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3639:
	.size	_Z8popStackPiS_, .-_Z8popStackPiS_
	.globl	_Z5doAlgiPiiP8linkNodePfS_S2_
	.type	_Z5doAlgiPiiP8linkNodePfS_S2_, @function
_Z5doAlgiPiiP8linkNodePfS_S2_:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3640:
	.size	_Z5doAlgiPiiP8linkNodePfS_S2_, .-_Z5doAlgiPiiP8linkNodePfS_S2_
	.globl	_Z60__device_stub__Z21betweennessCentralityiiPiP8linkNodePfS_S2_iiPiP8linkNodePfS_S2_
	.type	_Z60__device_stub__Z21betweennessCentralityiiPiP8linkNodePfS_S2_iiPiP8linkNodePfS_S2_, @function
_Z60__device_stub__Z21betweennessCentralityiiPiP8linkNodePfS_S2_iiPiP8linkNodePfS_S2_:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L15:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z60__device_stub__Z21betweennessCentralityiiPiP8linkNodePfS_S2_iiPiP8linkNodePfS_S2_, .-_Z60__device_stub__Z21betweennessCentralityiiPiP8linkNodePfS_S2_iiPiP8linkNodePfS_S2_
	.globl	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_
	.type	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_, @function
_Z21betweennessCentralityiiPiP8linkNodePfS_S2_:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z21betweennessCentralityiiPiP8linkNodePfS_S2_iiPiP8linkNodePfS_S2_
	.cfi_endproc
.LFE3667:
	.size	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_, .-_Z21betweennessCentralityiiPiP8linkNodePfS_S2_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"w"
.LC1:
	.string	"test.gr"
.LC2:
	.string	"p %d %d d u 0\n"
.LC3:
	.string	"%d %d\n"
.LC4:
	.string	"r"
.LC5:
	.string	" "
.LC7:
	.string	"Mem Used: "
.LC8:
	.string	"Time(usec): "
.LC9:
	.string	"Total Time(usec): "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1208, %rsp
	.cfi_def_cfa_offset 1264
	movq	%fs:40, %rax
	movq	%rax, 1192(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L22
	leaq	.LC0(%rip), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%ebp, %ebp
	call	fopen@PLT
	movl	$15, %r8d
	movl	$16, %ecx
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movl	$2, %esi
	movq	%rax, %r12
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$120, %edi
	leaq	.LC3(%rip), %r13
	call	malloc@PLT
	movq	%rax, %rbx
.L23:
	leal	1(%rbp), %r8d
	movl	%ebp, (%rbx,%rbp,8)
	movl	%ebp, %ecx
	movq	%r13, %rdx
	movl	%r8d, 4(%rbx,%rbp,8)
	movl	$2, %esi
	movq	%r12, %rdi
	xorl	%eax, %eax
	incq	%rbp
	call	__fprintf_chk@PLT
	cmpq	$15, %rbp
	jne	.L23
	movq	%r12, %rdi
	movl	$15, %r13d
	movl	$16, %ebp
	call	fclose@PLT
	jmp	.L24
.L22:
	movq	8(%rsi), %rdi
	leaq	.LC4(%rip), %rsi
	xorl	%r12d, %r12d
	movl	$15, %r13d
	movl	$16, %ebp
	call	fopen@PLT
	movq	%rax, (%rsp)
.L25:
	movq	(%rsp), %rdi
	call	feof@PLT
	testl	%eax, %eax
	jne	.L24
	movq	(%rsp), %rcx
	movl	$1024, %edx
	movl	$1024, %esi
	leaq	168(%rsp), %r15
	movq	%r15, %rdi
	call	__fgets_chk@PLT
	movq	(%rsp), %rdi
	call	feof@PLT
	testl	%eax, %eax
	jne	.L24
	movb	168(%rsp), %al
	cmpb	$112, %al
	jne	.L27
	leaq	.LC5(%rip), %rsi
	movq	%r15, %rdi
	call	strtok@PLT
	leaq	.LC5(%rip), %rsi
	xorl	%edi, %edi
	call	strtok@PLT
	leaq	.LC5(%rip), %rsi
	xorl	%edi, %edi
	call	strtok@PLT
	movq	%rax, %rdi
	call	atoi@PLT
	leaq	.LC5(%rip), %rsi
	xorl	%edi, %edi
	movl	%eax, %ebp
	call	strtok@PLT
	movq	%rax, %rdi
	call	atoi@PLT
	leal	(%rax,%rax), %r13d
	movslq	%r13d, %rdi
	salq	$3, %rdi
	call	malloc@PLT
	movq	%rax, %rbx
	jmp	.L25
.L27:
	cmpb	$97, %al
	jne	.L25
	leaq	.LC5(%rip), %r14
	movq	%r15, %rdi
	movq	%r14, %rsi
	call	strtok@PLT
	movq	%r14, %rsi
	xorl	%edi, %edi
	call	strtok@PLT
	movq	%rax, %rdi
	call	atoi@PLT
	movslq	%r12d, %rdx
	movq	%r14, %rsi
	xorl	%edi, %edi
	leaq	0(,%rdx,4), %r15
	decl	%eax
	addl	$4, %r12d
	movl	%eax, (%rbx,%rdx,4)
	movl	%eax, 12(%rbx,%r15)
	call	strtok@PLT
	movq	%rax, %rdi
	call	atoi@PLT
	decl	%eax
	movl	%eax, 4(%rbx,%r15)
	movl	%eax, 8(%rbx,%r15)
	jmp	.L25
.L24:
	movslq	%ebp, %r14
	xorl	%esi, %esi
	leaq	104(%rsp), %rdi
	call	gettimeofday@PLT
	leaq	0(,%r14,4), %r12
	movq	%r12, %rdi
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	movslq	%r13d, %rcx
	leaq	40(%rsp), %rdi
	leaq	0(,%rcx,8), %r15
	movq	%rcx, 8(%rsp)
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	(%r15,%r14,8), %rax
	leaq	64(%rsp), %rdi
	movq	%rax, 24(%rsp)
	leal	0(%rbp,%rbp,4), %eax
	cltq
	imulq	%r12, %rax
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rcx
	leal	(%rbp,%rbp), %eax
	leaq	48(%rsp), %rdi
	cltq
	imulq	%rcx, %rax
	salq	$4, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	%r14, %rdx
	movq	24(%rsp), %rax
	leaq	72(%rsp), %rdi
	imulq	%r14, %rdx
	leaq	0(,%rdx,4), %rsi
	leaq	(%rsi,%rax), %r14
	movq	(%rsp), %rax
	addq	%rax, %r14
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	movq	%r15, %rdx
	movq	%rbx, %rsi
	movq	8(%rsp), %rax
	movl	$1, %ecx
	addq	%rax, %r14
	call	cudaMemcpy@PLT
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC6(%rip), %xmm0
	movabsq	$68719476752, %rax
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	call	ceilf@PLT
	xorl	%esi, %esi
	leaq	136(%rsp), %rdi
	cvttss2sil	%xmm0, %eax
	movl	%eax, 92(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	call	gettimeofday@PLT
	movl	88(%rsp), %ecx
	movl	100(%rsp), %esi
	xorl	%r9d, %r9d
	movq	80(%rsp), %rdx
	movq	92(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	%rax
	.cfi_def_cfa_offset 1272
	movl	%r13d, %esi
	movl	%ebp, %edi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 1280
	movq	80(%rsp), %r9
	movq	72(%rsp), %r8
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	call	_Z60__device_stub__Z21betweennessCentralityiiPiP8linkNodePfS_S2_iiPiP8linkNodePfS_S2_
	popq	%rdx
	.cfi_def_cfa_offset 1272
	popq	%rcx
	.cfi_def_cfa_offset 1264
.L31:
	call	cudaDeviceSynchronize@PLT
	xorl	%esi, %esi
	leaq	152(%rsp), %rdi
	xorl	%r15d, %r15d
	call	gettimeofday@PLT
	imulq	$1000000, 152(%rsp), %rbx
	addq	160(%rsp), %rbx
	imulq	$1000000, 136(%rsp), %rax
	addq	144(%rsp), %rax
	subq	%rax, %rbx
	call	cudaGetLastError@PLT
	movq	%r12, %rdi
	movl	%eax, %r13d
	call	malloc@PLT
	movq	32(%rsp), %rsi
	movq	%r12, %rdx
	movl	$2, %ecx
	movq	%rax, %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	leaq	_ZSt4cout(%rip), %r12
	call	cudaMemcpy@PLT
	leaq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	imulq	$1000000, 120(%rsp), %rdx
	addq	128(%rsp), %rdx
	imulq	$1000000, 104(%rsp), %rax
	addq	112(%rsp), %rax
	subq	%rax, %rdx
	movq	%rdx, (%rsp)
.L32:
	cmpl	%r15d, %ebp
	jle	.L37
	movq	16(%rsp), %rax
	movq	%r12, %rdi
	cvtss2sd	(%rax,%r15,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	incq	%r15
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L32
.L37:
	call	cudaDeviceReset@PLT
	movl	%r13d, %edi
	call	cudaGetErrorString@PLT
	movq	%r12, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC7(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC8(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC9(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	1192(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$1208, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3641:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z21betweennessCentralityiiPiP8linkNodePfS_S2_"
.LC11:
	.string	"ELEMENTS"
.LC12:
	.string	"S_SIZE"
.LC13:
	.string	"P_SIZE"
.LC14:
	.string	"PATH_SIZE"
.LC15:
	.string	"D_SIZE"
.LC16:
	.string	"Q_SIZE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3669:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	movl	$4, %r9d
	leaq	_ZL8ELEMENTS(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6S_SIZE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6P_SIZE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9PATH_SIZE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6D_SIZE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6Q_SIZE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3669:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL6Q_SIZE
	.comm	_ZL6Q_SIZE,4,4
	.local	_ZL6D_SIZE
	.comm	_ZL6D_SIZE,4,4
	.local	_ZL9PATH_SIZE
	.comm	_ZL9PATH_SIZE,4,4
	.local	_ZL6P_SIZE
	.comm	_ZL6P_SIZE,4,4
	.local	_ZL6S_SIZE
	.comm	_ZL6S_SIZE,4,4
	.local	_ZL8ELEMENTS
	.comm	_ZL8ELEMENTS,4,4
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	998244352
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <sys/time.h>

using namespace std;

const int BLOCK_WIDTH = 16;
const int BLOCK_HEIGHT = 16;
const int DEFAULT_ELE = 16;

typedef struct __align__(8) linkNode
{
	int edge;
	linkNode* next;
} linkNode;

//HACK: This will be incredibly slow  on CUDA!
__device__ int findNext(int* edges, int numEdge, int v, int* destination)
{
	int count = 0;

	for(int i = 0; i < numEdge * 2; i+=2)
	{
		if(edges[i] == v)
			destination[count++] = edges[i + 1];
	}

	return count;
}

__device__ void pushQueue(int element, int* queue, int queueSize, int* head, int* tail)
{
	queue[*tail] = element;
	*tail = (*tail + 1) % queueSize;
}

__device__ int popQueue(int* queue, int queueSize, int* head, int* tail)
{
	int retn = queue[*head];
	*head = (*head + 1) % queueSize;
	
	return retn;
}

__device__ void pushStack(int element, int* stack, int* head)
{
	stack[*head] = element;
	*head = *head + 1;
}

__device__ int popStack(int* stack, int* head)
{
	*head = *head - 1;
	int retn = stack[*head];
	
	return retn;
}

__device__ int ELEMENTS = DEFAULT_ELE;
__device__ int S_SIZE;
__device__ int P_SIZE;
__device__ int PATH_SIZE;
__device__ int D_SIZE;
__device__ int Q_SIZE;

__device__ void doAlg(int numVert, int* edges, int numEdges, linkNode* pList, float* BC, int* glob, float* globDep)
{
	S_SIZE = numVert;
	P_SIZE = numEdges + numVert;
	D_SIZE = numVert;
	Q_SIZE = numVert;
	PATH_SIZE = numVert;
	ELEMENTS = numVert;

	int x = blockDim.x * blockIdx.x + threadIdx.x;	
	int y = blockDim.y * blockIdx.y + threadIdx.y;	
	int idx = x + y * blockDim.x * gridDim.x;

	unsigned int PTR_OFFSET = idx * (S_SIZE + D_SIZE + Q_SIZE + PATH_SIZE);
	
	int* S = &glob[PTR_OFFSET];
	int S_head = 0;
	PTR_OFFSET += S_SIZE;
	
	linkNode* P = &pList[idx * P_SIZE];
	//Blank the previous items
	for(int i = 0; i < P_SIZE; i++)
	{
		P[i].edge = -1;
		P[i].next = NULL;
	}

	int* pathCount = &glob[PTR_OFFSET];
	for(int i = 0; i < PATH_SIZE; i++)
	{
		pathCount[i] = 0;
	}
	pathCount[idx] = 1;
	PTR_OFFSET += PATH_SIZE;

	int* d = &glob[PTR_OFFSET];
	for(int i = 0; i < D_SIZE; i++)
	{
		d[i] = -1;
	}
	d[idx] = 0;
	PTR_OFFSET += D_SIZE;
	
	int* Q = &glob[PTR_OFFSET];
	int Q_head = 0;
	int Q_tail = 0;
	PTR_OFFSET += Q_SIZE;
	
	pushQueue(idx, Q, Q_SIZE, &Q_head, &Q_tail);

	while(Q_head != Q_tail)
	{
		int v = popQueue(Q, Q_SIZE, &Q_head, &Q_tail);
		pushStack(v, S, &S_head);

		int w[1024];
		int edgeCount = findNext(edges, numEdges, v, w);

		for(int i = 0; i < edgeCount; i++)
		{
			int wNode = w[i];
			if(d[wNode] < 0)
			{
				pushQueue(wNode, Q, Q_SIZE, &Q_head, &Q_tail);
				d[wNode] = d[v] + 1;
			}
			
			if(d[wNode] == d[v] + 1)
			{
				pathCount[wNode] = pathCount[wNode] + pathCount[v];
				
				//Append v to the PrevNode list

				//Find the next empty slot. Start after the initial lookup indices
				if(P[wNode].edge < 0) P[wNode].edge = v;
				else
				{
					linkNode* empty;
					for(empty = &P[numVert]; empty->edge >= 0; empty++);

					linkNode* j = &P[wNode];
					linkNode* last = NULL;
					while(j !=  NULL)
					{
						last = j;
						j = j->next;
					}
					last->next = empty;
					empty->edge = v;
				}
				
				
			}
		}

	}
	
	float* dep = &globDep[idx * ELEMENTS];
	
	while(S_head > 0)
	{
		int w = popStack(S, &S_head);
		
		//Loop through each v in P[w]
		linkNode* node = &P[w];
		do
		{
			int v = node->edge;
			node = node->next;
			if(v < 0) continue;

			dep[v] = dep[v] + ((float)pathCount[v]/(float)pathCount[w]) * (1 + dep[w]);
		}while(node != NULL);
		
		if(w != idx)
		{
			atomicAdd(&BC[w], dep[w]);
		}
	}
	
}

__global__ void betweennessCentrality(int numVert, int numEdges, int *edges, linkNode* pList, float* BC, int* glob, float* dep)
{
	//extern __shared__ int path[];
	
	//sortEdges(edges, path);
	int x = blockDim.x * blockIdx.x + threadIdx.x;	
	int y = blockDim.y * blockIdx.y + threadIdx.y;	
	int idx = x + y * blockDim.x * gridDim.x;

	if(idx >= numVert) return;

	BC[idx] = 0.0f;

	__syncthreads();

	doAlg(numVert, edges, numEdges, pList, BC, glob, dep);

		
}

int main(int argc, char* argv[])
{
	int elements = DEFAULT_ELE;

	//cudaProfilerStart();
	int *d_mem;
	int *h_edge;
	int *d_edge;
	linkNode* pList;
	float *d_bc;
	float *h_bc;
	int *d_glob;
	float *d_dep;

	int numVert = elements;
	int numEdge = elements - 1;

	if(argc < 2)
	{

		FILE *grFile;
		grFile = fopen("test.gr", "w");
		fprintf(grFile, "p %d %d d u 0\n", numVert, numEdge);
		h_edge = (int*)malloc(sizeof(int) * numEdge * 2);
		
		//Init edges
		for(int i = 0; i < numEdge; i++)
		{
			h_edge[i * 2] = i % numVert;
			h_edge[i * 2 + 1] = (i + 1) % numVert;
			fprintf(grFile, "%d %d\n", h_edge[i * 2], h_edge[i * 2 + 1]);
		}
		fclose(grFile);
	}
	else
	{
		FILE *grFile;
		char buff[1024];
		int edgeCnt = 0;
		grFile = fopen(argv[1], "r");
		while(!feof(grFile))
		{
			fgets(buff, 1024, grFile);
			if(feof(grFile))break;

			//This is the  "problem" line
			if(buff[0] == 'p')
			{
				char* token = strtok(buff, " ");

				token = strtok(NULL, " ");
				token = strtok(NULL, " ");
				numVert = atoi(token);
				
				token = strtok(NULL, " ");
				numEdge = atoi(token) * 2;

				h_edge = (int*)malloc(sizeof(int) * numEdge * 2);

			}
			else if(buff[0] == '#' || buff[0] == 'c')
				continue;
			else if(buff[0] == 'a')
			{
				char* token = strtok(buff, " ");

				//Skip 'a'
				token = strtok(NULL, " ");
				int e1 = atoi(token) - 1;
				h_edge[edgeCnt] = e1;
				h_edge[edgeCnt + 3] = e1;
				token = strtok(NULL, " ");
				int e2 = atoi(token) - 1;
				h_edge[edgeCnt + 1] = e2;
				h_edge[edgeCnt + 2] = e2;
				edgeCnt += 4;
			}
		}
	}
	struct timeval totalStart, totalEnd;
	gettimeofday(&totalStart, NULL);

	long totalMem = 0;
	h_bc = (float*)malloc(sizeof(float) * numVert);
	hipMalloc((void**)&d_mem, sizeof(int) * numVert);
	totalMem += sizeof(int) * numVert;
	
	hipMalloc((void**)&d_edge, sizeof(int) * numEdge * 2);
	totalMem += sizeof(int) * numEdge * 2;

	hipMalloc((void**)&d_bc, sizeof(float) * numVert);
	totalMem += sizeof(float) * numVert;

	hipMalloc((void**)&d_glob, sizeof(int) * numVert * (numVert * 5));
	totalMem += sizeof(int) * numVert * ((numVert * 5));

	hipMalloc((void**)&pList, sizeof(linkNode) * numEdge * (numVert + numVert));
	totalMem += sizeof(linkNode) * numEdge * (numVert + numVert);

	hipMalloc((void**)&d_dep, sizeof(float) * numVert * numVert);
	totalMem += sizeof(float) * numVert * numVert;

	hipMemcpy(d_edge, h_edge, sizeof(int) * numEdge * 2, hipMemcpyHostToDevice);
	
	dim3 block(BLOCK_WIDTH, BLOCK_HEIGHT);
	int gridSize = ceil(numVert / (float)(BLOCK_WIDTH * BLOCK_HEIGHT));
	dim3 grid(gridSize);

	struct timeval start, end;

	gettimeofday(&start, NULL);
	betweennessCentrality<<<grid,block>>>(numVert, numEdge, d_edge, pList, d_bc, d_glob, d_dep);
	hipDeviceSynchronize();
	gettimeofday(&end, NULL);
	long elapsed = (end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec);

	hipError_t error = hipGetLastError();
	
	int* h_mem = (int*)malloc(sizeof(int) * numVert);
	hipMemcpy(h_mem, d_mem, sizeof(int) * numVert, hipMemcpyDeviceToHost);
	hipMemcpy(h_bc, d_bc, sizeof(float) * numVert, hipMemcpyDeviceToHost);

	gettimeofday(&totalEnd, NULL);
	long totalElapsed = (totalEnd.tv_sec * 1000000 + totalEnd.tv_usec) - 
		( totalStart.tv_sec * 1000000 + totalStart.tv_usec); 

	for(int i = 0; i < numVert; i++)
	{
		cout << h_bc[i] << endl;
	}
	//cout<<elements<<endl;
	
	//cudaProfilerStop();
	
	hipDeviceReset();
	cout << hipGetErrorString(error) << endl;
	cout << "Mem Used: " << totalMem << endl;
	cout << "Time(usec): " << elapsed << endl;
	cout << "Total Time(usec): " << totalElapsed << endl;
	
	return 0;
}

	.text
	.file	"bc_cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_ # -- Begin function _Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_
	.type	_Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_,@function
_Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_: # @_Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21betweennessCentralityiiPiP8linkNodePfS_S2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_, .Lfunc_end0-_Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3b800000                      # float 0.00390625
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1240, %rsp                     # imm = 0x4D8
	.cfi_def_cfa_offset 1296
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jg	.LBB1_4
# %bb.1:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	movl	$16, %edx
	movl	$15, %ecx
	xorl	%eax, %eax
	callq	fprintf
	movl	$120, %edi
	callq	malloc
	movq	%rax, %r14
	xorl	%eax, %eax
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%r14,%rax,8)
	leaq	1(%rax), %r15
	movl	%r15d, 4(%r14,%rax,8)
	leal	-1(%r15), %edx
	movl	$.L.str.3, %esi
	movq	%rbx, %rdi
	movl	%r15d, %ecx
	xorl	%eax, %eax
	callq	fprintf
	movq	%r15, %rax
	cmpq	$15, %r15
	jne	.LBB1_2
# %bb.3:
	movq	%rbx, %rdi
	callq	fclose
	movl	$16, %ebp
	movl	$15, %r15d
	jmp	.LBB1_13
.LBB1_4:
	movq	8(%rsi), %rdi
	movl	$.L.str.4, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$16, %ebp
	movl	$15, %r13d
	xorl	%r12d, %r12d
	leaq	208(%rsp), %r15
                                        # implicit-def: $r14
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	feof
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.6:                                #   in Loop: Header=BB1_5 Depth=1
	movq	%r15, %rdi
	movl	$1024, %esi                     # imm = 0x400
	movq	%rbx, %rdx
	callq	fgets
	movq	%rbx, %rdi
	callq	feof
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.7:                                #   in Loop: Header=BB1_5 Depth=1
	movb	208(%rsp), %al
	cmpb	$112, %al
	je	.LBB1_8
# %bb.9:                                #   in Loop: Header=BB1_5 Depth=1
	movl	%eax, %ecx
	andb	$-65, %cl
	cmpb	$35, %cl
	je	.LBB1_5
# %bb.10:                               #   in Loop: Header=BB1_5 Depth=1
	cmpb	$97, %al
	jne	.LBB1_5
# %bb.11:                               #   in Loop: Header=BB1_5 Depth=1
	movl	$.L.str.5, %esi
	movq	%r15, %rdi
	callq	strtok
	movl	$.L.str.5, %esi
	xorl	%edi, %edi
	callq	strtok
	movq	%rax, %rdi
	callq	atoi
	decl	%eax
	movl	%r12d, %ecx
	movl	%eax, (%r14,%rcx,4)
	movl	%r12d, %ecx
	orl	$3, %ecx
	movl	%eax, (%r14,%rcx,4)
	movl	$.L.str.5, %esi
	xorl	%edi, %edi
	callq	strtok
	movq	%rax, %rdi
	callq	atoi
	decl	%eax
	movl	%r12d, %ecx
	orl	$1, %ecx
	movl	%eax, (%r14,%rcx,4)
	movl	%r12d, %ecx
	orl	$2, %ecx
	movl	%eax, (%r14,%rcx,4)
	addl	$4, %r12d
	jmp	.LBB1_5
.LBB1_8:                                #   in Loop: Header=BB1_5 Depth=1
	movl	$.L.str.5, %esi
	movq	%r15, %rdi
	callq	strtok
	movl	$.L.str.5, %esi
	xorl	%edi, %edi
	callq	strtok
	movl	$.L.str.5, %esi
	xorl	%edi, %edi
	callq	strtok
	movq	%rax, %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	$.L.str.5, %esi
	xorl	%edi, %edi
	callq	strtok
	movq	%rax, %rdi
	callq	atoi
	addl	%eax, %eax
	movl	%eax, %r13d
	movslq	%eax, %rdi
	shlq	$3, %rdi
	callq	malloc
	movq	%rax, %r14
	jmp	.LBB1_5
.LBB1_12:
	movl	%r13d, %r15d
.LBB1_13:
	movl	%r15d, 16(%rsp)                 # 4-byte Spill
	movl	%ebp, 28(%rsp)                  # 4-byte Spill
	leaq	208(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movslq	%ebp, %rbp
	leaq	(,%rbp,4), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	leaq	152(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movslq	%r15d, %r12
	leaq	(,%r12,8), %r15
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leal	(%rbp,%rbp,4), %eax
	movslq	%eax, %rsi
	imulq	%rbx, %rsi
	leaq	136(%rsp), %rdi
	movq	%rsi, 112(%rsp)                 # 8-byte Spill
	callq	hipMalloc
	leal	(,%rbp,2), %eax
	movslq	%eax, %rsi
	movq	%r12, 120(%rsp)                 # 8-byte Spill
	imulq	%r12, %rsi
	movl	28(%rsp), %r12d                 # 4-byte Reload
	shlq	$4, %rsi
	leaq	144(%rsp), %rdi
	movq	%rsi, 104(%rsp)                 # 8-byte Spill
	callq	hipMalloc
	movq	%rbx, %rsi
	imulq	%rbp, %rsi
	leaq	128(%rsp), %rdi
	movq	%rsi, 96(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r14d
	btsq	$32, %r14
	leaq	160(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.14:
	movq	40(%rsp), %rdx
	movq	144(%rsp), %rcx
	movq	32(%rsp), %r8
	movq	136(%rsp), %r9
	movq	128(%rsp), %rax
	movq	%rax, (%rsp)
	movl	%r12d, %edi
	movl	16(%rsp), %esi                  # 4-byte Reload
	callq	_Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_
.LBB1_15:
	callq	hipDeviceSynchronize
	leaq	176(%rsp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r14), %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	8(%r14), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	160(%rsp), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	168(%rsp), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	callq	hipGetLastError
	movl	%eax, 24(%rsp)                  # 4-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	152(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	movq	%r13, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	192(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbx), %r14
	movq	8(%rbx), %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movq	208(%rsp), %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	216(%rsp), %rax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	testl	%r12d, %r12d
	jle	.LBB1_18
# %bb.16:                               # %.lr.ph.preheader
	movl	%r12d, %ebx
	xorl	%r12d, %r12d
.LBB1_17:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	cmpq	%r12, %rbx
	jne	.LBB1_17
.LBB1_18:                               # %._crit_edge
	callq	hipDeviceReset
	movl	24(%rsp), %edi                  # 4-byte Reload
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_19
# %bb.20:
	movq	%rax, %r15
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_21
.LBB1_19:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_21:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	addq	120(%rsp), %rbp                 # 8-byte Folded Reload
	movq	112(%rsp), %rax                 # 8-byte Reload
	leaq	(%rax,%rbp,8), %r15
	addq	104(%rsp), %r15                 # 8-byte Folded Reload
	addq	96(%rsp), %r15                  # 8-byte Folded Reload
	movq	80(%rsp), %rax                  # 8-byte Reload
	subq	64(%rsp), %rax                  # 8-byte Folded Reload
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	movq	16(%rsp), %rbx                  # 8-byte Reload
	subq	72(%rsp), %rbx                  # 8-byte Folded Reload
	addq	%rax, %rbx
	subq	48(%rsp), %r14                  # 8-byte Folded Reload
	imulq	$1000000, %r14, %rax            # imm = 0xF4240
	movq	88(%rsp), %r12                  # 8-byte Reload
	subq	56(%rsp), %r12                  # 8-byte Folded Reload
	addq	%rax, %r12
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertIlEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	callq	_ZNSo9_M_insertIlEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertIlEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$1240, %rsp                     # imm = 0x4D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21betweennessCentralityiiPiP8linkNodePfS_S2_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$ELEMENTS, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$S_SIZE, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$P_SIZE, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$PATH_SIZE, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$D_SIZE, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$Q_SIZE, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	ELEMENTS,@object                # @ELEMENTS
	.local	ELEMENTS
	.comm	ELEMENTS,4,4
	.type	S_SIZE,@object                  # @S_SIZE
	.local	S_SIZE
	.comm	S_SIZE,4,4
	.type	P_SIZE,@object                  # @P_SIZE
	.local	P_SIZE
	.comm	P_SIZE,4,4
	.type	PATH_SIZE,@object               # @PATH_SIZE
	.local	PATH_SIZE
	.comm	PATH_SIZE,4,4
	.type	D_SIZE,@object                  # @D_SIZE
	.local	D_SIZE
	.comm	D_SIZE,4,4
	.type	Q_SIZE,@object                  # @Q_SIZE
	.local	Q_SIZE
	.comm	Q_SIZE,4,4
	.type	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_,@object # @_Z21betweennessCentralityiiPiP8linkNodePfS_S2_
	.section	.rodata,"a",@progbits
	.globl	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_
	.p2align	3, 0x0
_Z21betweennessCentralityiiPiP8linkNodePfS_S2_:
	.quad	_Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_
	.size	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"test.gr"
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"p %d %d d u 0\n"
	.size	.L.str.2, 15

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d %d\n"
	.size	.L.str.3, 7

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"r"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	" "
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Mem Used: "
	.size	.L.str.6, 11

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Time(usec): "
	.size	.L.str.7, 13

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Total Time(usec): "
	.size	.L.str.8, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z21betweennessCentralityiiPiP8linkNodePfS_S2_"
	.size	.L__unnamed_1, 47

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"ELEMENTS"
	.size	.L__unnamed_2, 9

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"S_SIZE"
	.size	.L__unnamed_3, 7

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"P_SIZE"
	.size	.L__unnamed_4, 7

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"PATH_SIZE"
	.size	.L__unnamed_5, 10

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"D_SIZE"
	.size	.L__unnamed_6, 7

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"Q_SIZE"
	.size	.L__unnamed_7, 7

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__betweennessCentralityiiPiP8linkNodePfS_S2_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym ELEMENTS
	.addrsig_sym S_SIZE
	.addrsig_sym P_SIZE
	.addrsig_sym PATH_SIZE
	.addrsig_sym D_SIZE
	.addrsig_sym Q_SIZE
	.addrsig_sym _Z21betweennessCentralityiiPiP8linkNodePfS_S2_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_ ; -- Begin function _Z21betweennessCentralityiiPiP8linkNodePfS_S2_
	.globl	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_
	.p2align	8
	.type	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_,@function
_Z21betweennessCentralityiiPiP8linkNodePfS_S2_: ; @_Z21betweennessCentralityiiPiP8linkNodePfS_S2_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b32 s16, s[0:1], 0x30
	v_bfe_u32 v1, v0, 10, 10
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_load_b64 s[12:13], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s16, s[14:15]
	v_and_b32_e32 v4, 0x3ff, v0
	v_mad_u64_u32 v[0:1], null, v3, s4, v[4:5]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v0
	s_cbranch_execz .LBB0_44
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x8
	v_ashrrev_i32_e32 v1, 31, v0
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, S_SIZE@rel32@lo+4
	s_addc_u32 s19, s19, S_SIZE@rel32@hi+12
	s_add_i32 s15, s13, s12
	s_getpc_b64 s[20:21]
	s_add_u32 s20, s20, P_SIZE@rel32@lo+4
	s_addc_u32 s21, s21, P_SIZE@rel32@hi+12
	s_getpc_b64 s[22:23]
	s_add_u32 s22, s22, D_SIZE@rel32@lo+4
	s_addc_u32 s23, s23, D_SIZE@rel32@hi+12
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_getpc_b64 s[24:25]
	s_add_u32 s24, s24, Q_SIZE@rel32@lo+4
	s_addc_u32 s25, s25, Q_SIZE@rel32@hi+12
	s_getpc_b64 s[26:27]
	s_add_u32 s26, s26, PATH_SIZE@rel32@lo+4
	s_addc_u32 s27, s27, PATH_SIZE@rel32@hi+12
	s_getpc_b64 s[28:29]
	s_add_u32 s28, s28, ELEMENTS@rel32@lo+4
	s_addc_u32 s29, s29, ELEMENTS@rel32@hi+12
	s_cmp_lt_u32 s14, s16
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v5, s12
	s_cselect_b32 s14, 12, 18
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v7, s14
	s_cmp_lt_i32 s15, 1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_clause 0x5
	global_store_b32 v2, v5, s[18:19]
	global_store_b32 v2, v6, s[20:21]
	global_store_b32 v2, v5, s[22:23]
	global_store_b32 v2, v5, s[24:25]
	global_store_b32 v2, v5, s[26:27]
	global_store_b32 v2, v5, s[28:29]
	global_load_u16 v6, v7, s[2:3]
	s_load_b64 s[2:3], s[0:1], 0x28
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v3, v6, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s15
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 4, v[3:4]
	s_cbranch_scc1 .LBB0_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v8, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v9, vcc_lo
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v1, 8
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	v_mov_b32_e32 v1, -1
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, P_SIZE@rel32@lo+4
	s_addc_u32 s15, s15, P_SIZE@rel32@hi+12
.LBB0_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v3, v2
	global_store_b32 v[4:5], v1, off offset:-8
	global_load_b32 v6, v2, s[14:15]
	s_add_i32 s1, s1, 1
	global_store_b64 v[4:5], v[2:3], off
	v_add_co_u32 v4, s0, v4, 16
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s1, v6
	s_cbranch_vccz .LBB0_3
; %bb.4:                                ; %._crit_edge.loopexit.i
	v_mov_b32_e32 v1, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, PATH_SIZE@rel32@lo+4
	s_addc_u32 s1, s1, PATH_SIZE@rel32@hi+12
	global_load_b32 v5, v1, s[0:1]
.LBB0_5:                                ; %._crit_edge.i
	v_mul_lo_u32 v1, s12, v0
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 1, v5
	v_mov_b32_e32 v7, 0
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v10, 2, v1
	v_add_nc_u32_e32 v6, s12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[6:7]
	v_add_co_u32 v2, s0, s10, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
	s_cbranch_vccnz .LBB0_8
; %bb.6:                                ; %.lr.ph145.i.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_mov_b32 s1, 0
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, PATH_SIZE@rel32@lo+4
	s_addc_u32 s15, s15, PATH_SIZE@rel32@hi+12
.LBB0_7:                                ; %.lr.ph145.i
                                        ; =>This Inner Loop Header: Depth=1
	global_store_b32 v[4:5], v7, off
	global_load_b32 v1, v7, s[14:15]
	s_add_i32 s1, s1, 1
	v_add_co_u32 v4, s0, v4, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s1, v1
	s_cbranch_vccz .LBB0_7
.LBB0_8:                                ; %._crit_edge146.i
	v_ashrrev_i32_e32 v1, 31, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, PATH_SIZE@rel32@lo+4
	s_addc_u32 s1, s1, PATH_SIZE@rel32@hi+12
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, D_SIZE@rel32@lo+4
	s_addc_u32 s15, s15, D_SIZE@rel32@hi+12
	v_lshlrev_b64 v[12:13], 2, v[0:1]
	v_mov_b32_e32 v1, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v2, v12
	v_add_co_ci_u32_e32 v5, vcc_lo, v3, v13, vcc_lo
	global_store_b32 v[4:5], v1, off
	s_clause 0x1
	global_load_b32 v1, v7, s[0:1]
	global_load_b32 v11, v7, s[14:15]
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v6, v1, v6
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 1, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[6:7]
	v_add_co_u32 v4, s0, s10, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s11, v5, s0
	s_cbranch_vccnz .LBB0_11
; %bb.9:                                ; %.lr.ph149.i.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v15, v5
	v_dual_mov_b32 v1, -1 :: v_dual_mov_b32 v14, v4
	v_mov_b32_e32 v7, 0
	s_mov_b32 s1, 0
	s_getpc_b64 s[16:17]
	s_add_u32 s16, s16, D_SIZE@rel32@lo+4
	s_addc_u32 s17, s17, D_SIZE@rel32@hi+12
.LBB0_10:                               ; %.lr.ph149.i
                                        ; =>This Inner Loop Header: Depth=1
	global_store_b32 v[14:15], v1, off
	global_load_b32 v11, v7, s[16:17]
	s_add_i32 s1, s1, 1
	v_add_co_u32 v14, s0, v14, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v15, s0, 0, v15, s0
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s1, v11
	s_cbranch_vccz .LBB0_10
.LBB0_11:                               ; %._crit_edge150.i
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, v4, v12
	v_mov_b32_e32 v11, 0
	v_add_co_ci_u32_e32 v13, vcc_lo, v5, v13, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, Q_SIZE@rel32@lo+4
	s_addc_u32 s1, s1, Q_SIZE@rel32@hi+12
	global_store_b32 v[12:13], v11, off
	s_clause 0x1
	global_load_b32 v1, v11, s[0:1]
	global_load_b32 v7, v11, s[14:15]
	v_lshlrev_b64 v[12:13], 2, v[10:11]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s0, v1
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v10, v7, v6
	v_add_co_u32 v1, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v23, vcc_lo, s7, v9, vcc_lo
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[10:11]
	s_add_i32 s0, s0, s1
	v_add_co_u32 v24, vcc_lo, s10, v12
	s_xor_b32 s0, s0, s1
	v_add_co_ci_u32_e32 v25, vcc_lo, s11, v13, vcc_lo
	s_sub_i32 s1, 1, s0
	s_cmp_lt_u32 s0, 2
	v_add_co_u32 v6, vcc_lo, s10, v6
	s_cselect_b32 s1, s1, 1
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	s_sub_i32 s14, s1, s0
	s_cmp_ge_u32 s1, s0
	s_mov_b32 s11, 0
	s_cselect_b32 s0, s14, s1
	global_store_b32 v[6:7], v0, off
	s_cmp_eq_u32 s0, 0
	s_cbranch_scc1 .LBB0_34
; %bb.12:                               ; %.lr.ph161.i
	s_lshl_b32 s14, s13, 1
	s_cmp_gt_i32 s13, 0
	v_mov_b32_e32 v10, 1
	s_cselect_b32 s15, -1, 0
	s_ashr_i32 s13, s12, 31
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_lshl_b64 s[0:1], s[12:13], 4
	v_mov_b32_e32 v26, 0
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v8, -16
	v_add_co_ci_u32_e32 v9, vcc_lo, -1, v9, vcc_lo
	s_mov_b32 s6, s11
	s_mov_b32 s10, s11
.LBB0_13:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_15 Depth 2
                                        ;     Child Loop BB0_20 Depth 2
                                        ;       Child Loop BB0_25 Depth 3
                                        ;       Child Loop BB0_27 Depth 3
	s_ashr_i32 s7, s6, 31
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, Q_SIZE@rel32@lo+4
	s_addc_u32 s1, s1, Q_SIZE@rel32@hi+12
	s_lshl_b64 s[16:17], s[6:7], 2
	v_mov_b32_e32 v27, 0
	v_add_co_u32 v11, vcc_lo, v6, s16
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v7, vcc_lo
	global_load_b32 v15, v26, s[0:1]
	global_load_b32 v12, v[11:12], off
	s_lshl_b64 s[0:1], s[10:11], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v13, vcc_lo, v24, s0
	v_add_co_ci_u32_e32 v14, vcc_lo, s1, v25, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s15
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s7, v15
	s_waitcnt vmcnt(0)
	global_store_b32 v[13:14], v12, off
	s_cbranch_vccnz .LBB0_18
; %bb.14:                               ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB0_13 Depth=1
	v_mov_b32_e32 v27, 0
	s_mov_b32 s13, 0
	s_mov_b64 s[0:1], s[4:5]
.LBB0_15:                               ; %.lr.ph.i.i
                                        ;   Parent Loop BB0_13 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v11, v26, s[0:1] offset:-4
	s_mov_b32 s16, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e64 v11, v12
	s_cbranch_execz .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=2
	global_load_b32 v11, v26, s[0:1]
	v_lshl_add_u32 v13, v27, 2, 16
	v_add_nc_u32_e32 v27, 1, v27
	s_waitcnt vmcnt(0)
	scratch_store_b32 v13, v11, off
.LBB0_17:                               ;   in Loop: Header=BB0_15 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_add_i32 s13, s13, 2
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmp_lt_i32 s13, s14
	s_cbranch_scc1 .LBB0_15
.LBB0_18:                               ; %_Z8findNextPiiiS_.exit.i
                                        ;   in Loop: Header=BB0_13 Depth=1
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e32 0, v27
	s_cbranch_execz .LBB0_32
; %bb.19:                               ; %.lr.ph154.i
                                        ;   in Loop: Header=BB0_13 Depth=1
	v_ashrrev_i32_e32 v13, 31, v12
	s_mov_b32 s13, 0
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 2, v[12:13]
	v_add_co_u32 v13, vcc_lo, v4, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, v5, v16, vcc_lo
	v_add_co_u32 v15, vcc_lo, v2, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, v3, v16, vcc_lo
.LBB0_20:                               ;   Parent Loop BB0_13 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_25 Depth 3
                                        ;       Child Loop BB0_27 Depth 3
	s_lshl_b32 s0, s16, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, 16
	scratch_load_b32 v17, off, s0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v18, 31, v17
	v_lshlrev_b64 v[19:20], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v21, vcc_lo, v4, v19
	v_add_co_ci_u32_e32 v22, vcc_lo, v5, v20, vcc_lo
	global_load_b32 v11, v[21:22], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e32 0, v11
	s_cbranch_execz .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_20 Depth=2
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, Q_SIZE@rel32@lo+4
	s_addc_u32 s19, s19, Q_SIZE@rel32@hi+12
	v_ashrrev_i32_e32 v11, 31, v10
	global_load_b32 v30, v26, s[18:19]
	v_lshlrev_b64 v[28:29], 2, v[10:11]
	v_add_nc_u32_e32 v10, 1, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v28, vcc_lo, v6, v28
	v_add_co_ci_u32_e32 v29, vcc_lo, v7, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v31, 31, v10
	global_store_b32 v[28:29], v17, off
	global_load_b32 v11, v[13:14], off
	v_add_nc_u32_e32 v10, v10, v31
	v_xor_b32_e32 v10, v10, v31
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v28, 31, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v29, v30, v28
	v_xor_b32_e32 v28, v29, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cvt_f32_u32_e32 v29, v28
	v_sub_nc_u32_e32 v30, 0, v28
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v11, 1, v11
	v_rcp_iflag_f32_e32 v29, v29
	global_store_b32 v[21:22], v11, off
	v_mul_f32_e32 v29, 0x4f7ffffe, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v29, v29
	v_mul_lo_u32 v30, v30, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v30, v29, v30
	v_add_nc_u32_e32 v29, v29, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v29, v10, v29
	v_mul_lo_u32 v29, v29, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v10, v10, v29
	v_sub_nc_u32_e32 v29, v10, v28
	v_cmp_ge_u32_e32 vcc_lo, v10, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v29, vcc_lo
	v_sub_nc_u32_e32 v29, v10, v28
	v_cmp_ge_u32_e32 vcc_lo, v10, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v29, vcc_lo
	v_xor_b32_e32 v10, v10, v31
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v10, v10, v31
.LBB0_22:                               ;   in Loop: Header=BB0_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v21, v[13:14], off
	s_mov_b32 s17, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v21, 1, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 v11, v21
	s_cbranch_execz .LBB0_30
; %bb.23:                               ;   in Loop: Header=BB0_20 Depth=2
	v_add_co_u32 v19, vcc_lo, v2, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, v3, v20, vcc_lo
	v_lshlrev_b64 v[17:18], 4, v[17:18]
	s_mov_b32 s18, exec_lo
	s_clause 0x1
	global_load_b32 v11, v[19:20], off
	global_load_b32 v21, v[15:16], off
	v_add_co_u32 v17, vcc_lo, v1, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, v23, v18, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v11, v21, v11
	global_store_b32 v[19:20], v11, off
	global_load_b32 v11, v[17:18], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v11
	s_cbranch_execz .LBB0_29
; %bb.24:                               ; %.preheader168.i.preheader
                                        ;   in Loop: Header=BB0_20 Depth=2
	v_dual_mov_b32 v20, v9 :: v_dual_mov_b32 v19, v8
	s_mov_b32 s19, 0
.LBB0_25:                               ; %.preheader168.i
                                        ;   Parent Loop BB0_13 Depth=1
                                        ;     Parent Loop BB0_20 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v11, v[19:20], off offset:16
	v_add_co_u32 v19, s0, v19, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v20, s0, 0, v20, s0
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 0, v11
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_25
; %bb.26:                               ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB0_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_mov_b32 s0, 0
.LBB0_27:                               ; %.preheader.i
                                        ;   Parent Loop BB0_13 Depth=1
                                        ;     Parent Loop BB0_20 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v22, v18 :: v_dual_mov_b32 v21, v17
	flat_load_b64 v[17:18], v[17:18] offset:8
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[17:18]
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_27
; %bb.28:                               ;   in Loop: Header=BB0_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v17, v19 :: v_dual_mov_b32 v18, v20
	flat_store_b64 v[21:22], v[19:20] offset:8
.LBB0_29:                               ; %Flow64
                                        ;   in Loop: Header=BB0_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	global_store_b32 v[17:18], v12, off
.LBB0_30:                               ; %Flow65
                                        ;   in Loop: Header=BB0_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	s_add_i32 s16, s16, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s16, v27
	s_or_b32 s13, vcc_lo, s13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_20
; %bb.31:                               ; %Flow66
                                        ;   in Loop: Header=BB0_13 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_32:                               ; %Flow67
                                        ;   in Loop: Header=BB0_13 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_ashr_i32 s0, s7, 31
	s_add_i32 s6, s6, 1
	s_add_i32 s7, s7, s0
	s_ashr_i32 s13, s6, 31
	s_xor_b32 s0, s7, s0
	s_add_i32 s6, s6, s13
	v_cvt_f32_u32_e32 v11, s0
	s_sub_i32 s7, 0, s0
	s_xor_b32 s6, s6, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v11, v11
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v11, 0x4f7ffffe, v11
	v_cvt_u32_f32_e32 v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v11
	s_mul_i32 s7, s7, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s7, s1, s7
	s_add_i32 s1, s1, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s1, s6, s1
	s_mul_i32 s1, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s1, s6, s1
	s_sub_i32 s6, s1, s0
	s_cmp_ge_u32 s1, s0
	s_cselect_b32 s1, s6, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s6, s1, s0
	s_cmp_ge_u32 s1, s0
	s_cselect_b32 s0, s6, s1
	s_add_i32 s10, s10, 1
	s_xor_b32 s0, s0, s13
	v_mov_b32_e32 v11, s10
	s_sub_i32 s6, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s6, v10
	s_or_b32 s12, vcc_lo, s12
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_13
; %bb.33:                               ; %Flow70
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_34:                               ; %._crit_edge162.i
	v_cmp_lt_i32_e32 vcc_lo, 0, v11
	s_mov_b32 s0, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_44
; %bb.35:                               ; %.lr.ph166.i.preheader
	v_mov_b32_e32 v5, 0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, ELEMENTS@rel32@lo+4
	s_addc_u32 s5, s5, ELEMENTS@rel32@hi+12
	global_load_b32 v4, v5, s[4:5]
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v6, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v7, vcc_lo
.LBB0_36:                               ; %.lr.ph166.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_37 Depth 2
                                        ;     Child Loop BB0_42 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, v5 :: v_dual_add_nc_u32 v6, -1, v11
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v24, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, v25, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 4, v[7:8]
	v_lshlrev_b64 v[8:9], 2, v[7:8]
	v_add_co_u32 v14, vcc_lo, v1, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v15, vcc_lo, v23, v13, vcc_lo
	v_add_co_u32 v16, vcc_lo, v2, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v17, vcc_lo, v3, v9, vcc_lo
	v_add_co_u32 v12, vcc_lo, v18, v8
	v_add_co_ci_u32_e32 v13, vcc_lo, v19, v9, vcc_lo
.LBB0_37:                               ;   Parent Loop BB0_36 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_clause 0x1
	flat_load_b32 v4, v[14:15]
	flat_load_b64 v[14:15], v[14:15] offset:8
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_cmpx_lt_i32_e32 -1, v4
	s_cbranch_execz .LBB0_39
; %bb.38:                               ;   in Loop: Header=BB0_37 Depth=2
	v_lshlrev_b64 v[20:21], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v26, vcc_lo, v2, v20
	v_add_co_ci_u32_e32 v27, vcc_lo, v3, v21, vcc_lo
	v_add_co_u32 v20, vcc_lo, v18, v20
	s_clause 0x1
	global_load_b32 v4, v[16:17], off
	global_load_b32 v10, v[26:27], off
	v_add_co_ci_u32_e32 v21, vcc_lo, v19, v21, vcc_lo
	s_clause 0x1
	global_load_b32 v22, v[12:13], off
	global_load_b32 v26, v[20:21], off
	s_waitcnt vmcnt(3)
	v_cvt_f32_i32_e32 v4, v4
	s_waitcnt vmcnt(2)
	v_cvt_f32_i32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v27, null, v4, v4, v10
	v_div_scale_f32 v30, vcc_lo, v10, v4, v10
	v_rcp_f32_e32 v28, v27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v29, -v27, v28, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v28, v29, v28
	v_mul_f32_e32 v29, v30, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v31, -v27, v29, v30
	v_fmac_f32_e32 v29, v31, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v27, -v27, v29, v30
	v_div_fmas_f32 v27, v27, v28, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v4, v27, v4, v10
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v10, 1.0, v22
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v26, v4, v10
	global_store_b32 v[20:21], v26, off
.LBB0_39:                               ;   in Loop: Header=BB0_37 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15]
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_37
; %bb.40:                               ;   in Loop: Header=BB0_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u32_e64 v7, v0
	s_cbranch_execz .LBB0_43
; %bb.41:                               ;   in Loop: Header=BB0_36 Depth=1
	v_add_co_u32 v7, vcc_lo, s8, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v9, vcc_lo
	s_mov_b32 s2, 0
	global_load_b32 v4, v[12:13], off
	global_load_b32 v10, v[7:8], off
.LBB0_42:                               ; %atomicrmw.start
                                        ;   Parent Loop BB0_36 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v9, v10, v4
	global_atomic_cmpswap_b32 v9, v[7:8], v[9:10], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v9, v10
	v_mov_b32_e32 v10, v9
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_42
.LBB0_43:                               ; %Flow61
                                        ;   in Loop: Header=BB0_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_i32_e32 vcc_lo, 2, v11
	v_mov_b32_e32 v11, v6
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_36
.LBB0_44:                               ; %_Z5doAlgiPiiP8linkNodePfS_S2_.exit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21betweennessCentralityiiPiP8linkNodePfS_S2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 4112
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 32
		.amdhsa_next_free_sgpr 30
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21betweennessCentralityiiPiP8linkNodePfS_S2_, .Lfunc_end0-_Z21betweennessCentralityiiPiP8linkNodePfS_S2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2996
; NumSgprs: 32
; NumVgprs: 32
; ScratchSize: 4112
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 32
; NumVGPRsForWavesPerEU: 32
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	ELEMENTS                ; @ELEMENTS
	.type	ELEMENTS,@object
	.data
	.globl	ELEMENTS
	.p2align	2, 0x0
ELEMENTS:
	.long	16                              ; 0x10
	.size	ELEMENTS, 4

	.protected	S_SIZE                  ; @S_SIZE
	.type	S_SIZE,@object
	.section	.bss,"aw",@nobits
	.globl	S_SIZE
	.p2align	2, 0x0
S_SIZE:
	.long	0                               ; 0x0
	.size	S_SIZE, 4

	.protected	P_SIZE                  ; @P_SIZE
	.type	P_SIZE,@object
	.globl	P_SIZE
	.p2align	2, 0x0
P_SIZE:
	.long	0                               ; 0x0
	.size	P_SIZE, 4

	.protected	PATH_SIZE               ; @PATH_SIZE
	.type	PATH_SIZE,@object
	.globl	PATH_SIZE
	.p2align	2, 0x0
PATH_SIZE:
	.long	0                               ; 0x0
	.size	PATH_SIZE, 4

	.protected	D_SIZE                  ; @D_SIZE
	.type	D_SIZE,@object
	.globl	D_SIZE
	.p2align	2, 0x0
D_SIZE:
	.long	0                               ; 0x0
	.size	D_SIZE, 4

	.protected	Q_SIZE                  ; @Q_SIZE
	.type	Q_SIZE,@object
	.globl	Q_SIZE
	.p2align	2, 0x0
Q_SIZE:
	.long	0                               ; 0x0
	.size	Q_SIZE, 4

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym ELEMENTS
	.addrsig_sym S_SIZE
	.addrsig_sym P_SIZE
	.addrsig_sym PATH_SIZE
	.addrsig_sym D_SIZE
	.addrsig_sym Q_SIZE
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21betweennessCentralityiiPiP8linkNodePfS_S2_
    .private_segment_fixed_size: 4112
    .sgpr_count:     32
    .sgpr_spill_count: 0
    .symbol:         _Z21betweennessCentralityiiPiP8linkNodePfS_S2_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     32
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
