#include <math.h>
#include <stdio.h>
#include <stdlib.h>

__device__ void helper(float const *J,float *If,float *Z,int size,int icenter,int jcenter,int xcenter,int ycenter,int rows,int columns,float const filtSigma,float const *H);
__device__ void adjFunction(float const *J,float *If,float *Z,int icenter ,int jcenter,float const filtSigma,int rows,int columns,int size,float const *H);




__global__ void nonLocalMeans(float const *J,float *If,float *Z,float const filtSigma,int const patchSize,int rows,int columns,float const *H) {




  int p = blockIdx.x * blockDim.x + threadIdx.x;
  int q = blockIdx.y * blockDim.y + threadIdx.y;


  if( p<rows && q<columns) {

      adjFunction(J,If,Z,p,q,filtSigma,rows,columns,patchSize,H);


  }

  __syncthreads();
}





__device__ void helper(float const *J,float *If,float *Z,int size,int icenter,int jcenter,int xcenter,int ycenter,int rows,int columns,float const filtSigma,float const *H){
  int i,j,z=0;
  float w=0;
  int ki,lj,kx,ly;
   for (i=-size/2; i<=size/2; i++){
     for (j=-size/2; j<=size/2; j++){
       //AN den yparxoun ta shmeia pairnoume ta diametrika tous
       if((icenter+i)>=0&&(icenter+i)<rows){
         ki=i;
       }else{
         ki=-i;
       }
       if((jcenter+j)>=0&&(jcenter+j)<rows){
         lj=j;
       }else{
         lj=-j;
       }

       if((xcenter+i)>=0&&(xcenter+i)<rows){
         kx=i;
       }else{
         kx=-i;
       }
       if((ycenter+j)>=0&&(ycenter+j)<rows){
         ly=j;
       }else{
         ly=-j;
       }
       w+=((J[(icenter+ki)*rows+(jcenter+lj)]-J[(xcenter+kx)*rows+(ycenter+ly)])*(J[(icenter+ki)*rows+(jcenter+lj)]-J[(xcenter+kx)*rows+(ycenter+ly)]))*(H[z]*H[z]);

       z++;
       }


   }
   w=exp(-(w*w)/(filtSigma));
   Z[icenter*rows+jcenter]+=w;
   If[icenter*rows+jcenter]+=w*J[xcenter*rows+ycenter];

}


__device__ void adjFunction(float const *J,float *If,float *Z,int icenter ,int jcenter,float const filtSigma,int rows,int columns,int size,float const *H){
  int i,j;
    for(i=0;i<rows;i++){
      for(j=0;j<columns;j++){
          helper(J,If,Z,size,icenter,jcenter,i,j,rows,columns,filtSigma,H);
      }
    }
    If[icenter*rows+jcenter]=If[icenter*rows+jcenter]/Z[icenter*rows+jcenter];


}

	.file	"tmpxft_00241984_00000000-6_nonLocalMeansKernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z6helperPKfPfS1_iiiiiiifS0_
	.type	_Z6helperPKfPfS1_iiiiiiifS0_, @function
_Z6helperPKfPfS1_iiiiiiifS0_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z6helperPKfPfS1_iiiiiiifS0_, .-_Z6helperPKfPfS1_iiiiiiifS0_
	.globl	_Z11adjFunctionPKfPfS1_iifiiiS0_
	.type	_Z11adjFunctionPKfPfS1_iifiiiS0_, @function
_Z11adjFunctionPKfPfS1_iifiiiS0_:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z11adjFunctionPKfPfS1_iifiiiS0_, .-_Z11adjFunctionPKfPfS1_iifiiiS0_
	.globl	_Z46__device_stub__Z13nonLocalMeansPKfPfS1_fiiiS0_PKfPfS1_fiiiS0_
	.type	_Z46__device_stub__Z13nonLocalMeansPKfPfS1_fiiiS0_PKfPfS1_fiiiS0_, @function
_Z46__device_stub__Z13nonLocalMeansPKfPfS1_fiiiS0_PKfPfS1_fiiiS0_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%rax, (%rsp)
	movss	%xmm0, 20(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z13nonLocalMeansPKfPfS1_fiiiS0_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L6:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z46__device_stub__Z13nonLocalMeansPKfPfS1_fiiiS0_PKfPfS1_fiiiS0_, .-_Z46__device_stub__Z13nonLocalMeansPKfPfS1_fiiiS0_PKfPfS1_fiiiS0_
	.globl	_Z13nonLocalMeansPKfPfS1_fiiiS0_
	.type	_Z13nonLocalMeansPKfPfS1_fiiiS0_, @function
_Z13nonLocalMeansPKfPfS1_fiiiS0_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z13nonLocalMeansPKfPfS1_fiiiS0_PKfPfS1_fiiiS0_
	.cfi_endproc
.LFE2054:
	.size	_Z13nonLocalMeansPKfPfS1_fiiiS0_, .-_Z13nonLocalMeansPKfPfS1_fiiiS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13nonLocalMeansPKfPfS1_fiiiS0_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13nonLocalMeansPKfPfS1_fiiiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>

__device__ void helper(float const *J,float *If,float *Z,int size,int icenter,int jcenter,int xcenter,int ycenter,int rows,int columns,float const filtSigma,float const *H);
__device__ void adjFunction(float const *J,float *If,float *Z,int icenter ,int jcenter,float const filtSigma,int rows,int columns,int size,float const *H);




__global__ void nonLocalMeans(float const *J,float *If,float *Z,float const filtSigma,int const patchSize,int rows,int columns,float const *H) {




  int p = blockIdx.x * blockDim.x + threadIdx.x;
  int q = blockIdx.y * blockDim.y + threadIdx.y;


  if( p<rows && q<columns) {

      adjFunction(J,If,Z,p,q,filtSigma,rows,columns,patchSize,H);


  }

  __syncthreads();
}





__device__ void helper(float const *J,float *If,float *Z,int size,int icenter,int jcenter,int xcenter,int ycenter,int rows,int columns,float const filtSigma,float const *H){
  int i,j,z=0;
  float w=0;
  int ki,lj,kx,ly;
   for (i=-size/2; i<=size/2; i++){
     for (j=-size/2; j<=size/2; j++){
       //AN den yparxoun ta shmeia pairnoume ta diametrika tous
       if((icenter+i)>=0&&(icenter+i)<rows){
         ki=i;
       }else{
         ki=-i;
       }
       if((jcenter+j)>=0&&(jcenter+j)<rows){
         lj=j;
       }else{
         lj=-j;
       }

       if((xcenter+i)>=0&&(xcenter+i)<rows){
         kx=i;
       }else{
         kx=-i;
       }
       if((ycenter+j)>=0&&(ycenter+j)<rows){
         ly=j;
       }else{
         ly=-j;
       }
       w+=((J[(icenter+ki)*rows+(jcenter+lj)]-J[(xcenter+kx)*rows+(ycenter+ly)])*(J[(icenter+ki)*rows+(jcenter+lj)]-J[(xcenter+kx)*rows+(ycenter+ly)]))*(H[z]*H[z]);

       z++;
       }


   }
   w=exp(-(w*w)/(filtSigma));
   Z[icenter*rows+jcenter]+=w;
   If[icenter*rows+jcenter]+=w*J[xcenter*rows+ycenter];

}


__device__ void adjFunction(float const *J,float *If,float *Z,int icenter ,int jcenter,float const filtSigma,int rows,int columns,int size,float const *H){
  int i,j;
    for(i=0;i<rows;i++){
      for(j=0;j<columns;j++){
          helper(J,If,Z,size,icenter,jcenter,i,j,rows,columns,filtSigma,H);
      }
    }
    If[icenter*rows+jcenter]=If[icenter*rows+jcenter]/Z[icenter*rows+jcenter];


}

	.text
	.file	"nonLocalMeansKernel.hip"
	.globl	_Z28__device_stub__nonLocalMeansPKfPfS1_fiiiS0_ # -- Begin function _Z28__device_stub__nonLocalMeansPKfPfS1_fiiiS0_
	.type	_Z28__device_stub__nonLocalMeansPKfPfS1_fiiiS0_,@function
_Z28__device_stub__nonLocalMeansPKfPfS1_fiiiS0_: # @_Z28__device_stub__nonLocalMeansPKfPfS1_fiiiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	16(%rsp), %r10
	movl	%ecx, (%r10)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13nonLocalMeansPKfPfS1_fiiiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__nonLocalMeansPKfPfS1_fiiiS0_, .Lfunc_end0-_Z28__device_stub__nonLocalMeansPKfPfS1_fiiiS0_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13nonLocalMeansPKfPfS1_fiiiS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13nonLocalMeansPKfPfS1_fiiiS0_,@object # @_Z13nonLocalMeansPKfPfS1_fiiiS0_
	.section	.rodata,"a",@progbits
	.globl	_Z13nonLocalMeansPKfPfS1_fiiiS0_
	.p2align	3, 0x0
_Z13nonLocalMeansPKfPfS1_fiiiS0_:
	.quad	_Z28__device_stub__nonLocalMeansPKfPfS1_fiiiS0_
	.size	_Z13nonLocalMeansPKfPfS1_fiiiS0_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13nonLocalMeansPKfPfS1_fiiiS0_"
	.size	.L__unnamed_1, 33

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__nonLocalMeansPKfPfS1_fiiiS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13nonLocalMeansPKfPfS1_fiiiS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13nonLocalMeansPKfPfS1_fiiiS0_ ; -- Begin function _Z13nonLocalMeansPKfPfS1_fiiiS0_
	.globl	_Z13nonLocalMeansPKfPfS1_fiiiS0_
	.p2align	8
	.type	_Z13nonLocalMeansPKfPfS1_fiiiS0_,@function
_Z13nonLocalMeansPKfPfS1_fiiiS0_:       ; @_Z13nonLocalMeansPKfPfS1_fiiiS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_gt_i32_e64 s2, s7, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s18, s2
	s_cbranch_execz .LBB0_17
; %bb.1:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_cmp_gt_i32 s6, 0
	s_mov_b32 s12, 0
	s_cbranch_scc1 .LBB0_3
; %bb.2:                                ; %.._crit_edge35_crit_edge.i
	v_mad_u64_u32 v[2:3], null, v0, s6, v[1:2]
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_branch .LBB0_4
.LBB0_3:
	s_mov_b32 s12, -1
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_4:                                ; %Flow58
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_16
; %bb.5:                                ; %.preheader.lr.ph.i
	v_mad_u64_u32 v[2:3], null, v0, s6, v[1:2]
	s_load_b64 s[0:1], s[0:1], 0x28
	s_cmp_gt_i32 s7, 0
	v_mov_b32_e32 v10, 0
	s_cselect_b32 s19, -1, 0
	s_lshr_b32 s12, s5, 31
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s5, s5, s12
	s_mov_b32 s23, 0
	s_ashr_i32 s5, s5, 1
	s_sub_i32 s20, 0, s5
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	s_cmp_ge_i32 s5, s20
	s_cselect_b32 s21, -1, 0
	s_add_i32 s22, s5, s5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	s_add_i32 s22, s22, 1
.LBB0_6:                                ; %.preheader.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_8 Depth 2
                                        ;       Child Loop BB0_10 Depth 3
                                        ;         Child Loop BB0_11 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_15
; %bb.7:                                ; %.lr.ph.i
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_mul_i32 s24, s23, s6
	s_mov_b32 s25, 0
.LBB0_8:                                ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_10 Depth 3
                                        ;         Child Loop BB0_11 Depth 4
	v_mov_b32_e32 v11, 0
	s_and_not1_b32 vcc_lo, exec_lo, s21
	s_cbranch_vccnz .LBB0_14
; %bb.9:                                ; %.preheader.i.i.preheader
                                        ;   in Loop: Header=BB0_8 Depth=2
	v_mov_b32_e32 v11, 0
	s_mov_b32 s14, 0
	s_mov_b32 s12, s20
.LBB0_10:                               ; %.preheader.i.i
                                        ;   Parent Loop BB0_6 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_11 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v9, s12 :: v_dual_add_nc_u32 v8, s12, v0
	s_sub_i32 s15, 0, s12
	s_add_i32 s16, s12, s23
	s_mov_b32 s27, s20
	v_cmp_gt_u32_e32 vcc_lo, s6, v8
	s_cmp_lt_u32 s16, s6
	s_cselect_b32 s16, s12, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s16, s16, s23
	v_cndmask_b32_e32 v8, s15, v9, vcc_lo
	s_ashr_i32 s15, s14, 31
	s_mul_i32 s26, s16, s6
	s_lshl_b64 s[16:17], s[14:15], 2
	s_add_i32 s15, s26, s25
	v_add_nc_u32_e32 v12, v8, v0
	s_add_u32 s16, s0, s16
	s_addc_u32 s17, s1, s17
	s_mov_b32 s26, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v12, s6, v[1:2]
.LBB0_11:                               ;   Parent Loop BB0_6 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ;       Parent Loop BB0_10 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_dual_mov_b32 v12, s27 :: v_dual_add_nc_u32 v9, s27, v1
	s_add_i32 s28, s25, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lt_u32 s28, s6
	v_cmp_gt_u32_e32 vcc_lo, s6, v9
	s_cselect_b32 s28, s27, s26
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s28, s15, s28
	s_ashr_i32 s29, s28, 31
	v_cndmask_b32_e32 v9, s26, v12, vcc_lo
	s_lshl_b64 s[28:29], s[28:29], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s28, s8, s28
	s_addc_u32 s29, s9, s29
	v_add_nc_u32_e32 v12, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s8, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
	s_clause 0x2
	global_load_b32 v9, v[12:13], off
	global_load_b32 v12, v10, s[28:29]
	global_load_b32 v13, v10, s[16:17]
	s_add_i32 s28, s27, 1
	s_add_u32 s16, s16, 4
	s_addc_u32 s17, s17, 0
	s_add_i32 s26, s26, -1
	s_cmp_lt_i32 s27, s5
	s_mov_b32 s27, s28
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v9, v9, v12
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v12, v13, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v9, v9
	v_fmac_f32_e32 v11, v9, v12
	s_cbranch_scc1 .LBB0_11
; %bb.12:                               ; %._crit_edge.i.i
                                        ;   in Loop: Header=BB0_10 Depth=3
	s_add_i32 s14, s22, s14
	s_add_i32 s15, s12, 1
	s_cmp_lt_i32 s12, s5
	s_cbranch_scc0 .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_10 Depth=3
	s_mov_b32 s12, s15
	s_branch .LBB0_10
.LBB0_14:                               ; %_Z6helperPKfPfS1_iiiiiiifS0_.exit.i
                                        ;   in Loop: Header=BB0_8 Depth=2
	global_load_b32 v8, v[4:5], off
	v_mul_f32_e64 v9, v11, -v11
	s_add_i32 s12, s25, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[14:15], s[12:13], 2
	v_div_scale_f32 v11, null, s4, s4, v9
	v_div_scale_f32 v14, vcc_lo, v9, s4, v9
	s_add_u32 s14, s8, s14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_rcp_f32_e32 v12, v11
	s_addc_u32 s15, s9, s15
	s_add_i32 s25, s25, 1
	s_cmp_lg_u32 s25, s7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v11, v12, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v12
	v_mul_f32_e32 v13, v14, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v11, v13, v14
	v_fmac_f32_e32 v13, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v11, v13, v14
	v_div_fmas_f32 v11, v11, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v9, v11, s4, v9
	v_mul_f32_e32 v11, 0x3fb8aa3b, v9
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v12, 0x3fb8aa3b, v9, -v11
	v_rndne_f32_e32 v13, v11
	v_fmac_f32_e32 v12, 0x32a5705f, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v11, v13
	v_add_f32_e32 v11, v11, v12
	v_cvt_i32_f32_e32 v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v11, v11
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v11, v11, v12
	v_cndmask_b32_e32 v11, 0, v11, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v9, 0x7f800000, v11, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v8, v9
	global_store_b32 v[4:5], v8, off
	global_load_b32 v8, v10, s[14:15]
	global_load_b32 v11, v[6:7], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, v9, v8
	global_store_b32 v[6:7], v11, off
	s_cbranch_scc1 .LBB0_8
.LBB0_15:                               ; %._crit_edge.i
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_add_i32 s23, s23, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s23, s6
	s_cbranch_scc1 .LBB0_6
.LBB0_16:                               ; %_Z11adjFunctionPKfPfS1_iifiiiS0_.exit
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v1, null, v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v1, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v1, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v1, -v1, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v1, v1, v5, v7
	v_div_fixup_f32 v0, v1, v0, v4
	global_store_b32 v[2:3], v0, off
.LBB0_17:                               ; %Flow60
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13nonLocalMeansPKfPfS1_fiiiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 30
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13nonLocalMeansPKfPfS1_fiiiS0_, .Lfunc_end0-_Z13nonLocalMeansPKfPfS1_fiiiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1124
; NumSgprs: 32
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 32
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13nonLocalMeansPKfPfS1_fiiiS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     32
    .sgpr_spill_count: 0
    .symbol:         _Z13nonLocalMeansPKfPfS1_fiiiS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
