#include <stdlib.h>			
#include <iostream>
#include <math.h>
#include <time.h>
#include <sys/time.h>

timeval t1, t2;

__global__ void Submanifold_conv(float* image, float* filter, float* result, int image_Rows, int image_Cols, int filterRC, int filter_Depth, int result_Rows, int result_Cols, int padding)
{
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	float sum = 0.0;

	if (row < result_Rows && col < result_Cols)
	{       //printf("row %d col %d\n",row,col);
		int image_Row_Cols = image_Rows * image_Cols;

		for (int filterRow = 0; filterRow < filterRC; filterRow++) 
                {
			for (int filterCol = 0; filterCol < filterRC; filterCol++)
                        {
	                   for (int dep = 0; dep < filter_Depth; dep++)
                           {
                    
			    sum += image[(row + filterRow) * image_Cols + col + filterCol + dep * image_Row_Cols] * filter[filterRow * filterRC + filterCol + dep * filter_Depth];
                           }
			}
		}
                if(image[(row+padding) * (result_Cols+(padding*2)) + (col+padding)]!=0)
		result[row * result_Cols + col] = sum;
	}
}


void Convolution3D( float* image,  float* filter,  float* result, int padding, int image_Rows, int image_Cols, int filter_Rows, int filter_Depth,int result_Rows, int result_Cols)
{	int threadsPerBlock =32;

	int grid_Cols = ceil(float(result_Cols) / float(threadsPerBlock));
	int grid_Rows = ceil(float(result_Rows) / float(threadsPerBlock));

	dim3 gridDim(grid_Cols, grid_Rows);
	dim3 blockDim(threadsPerBlock,threadsPerBlock);		// total 32*32 = 1024 threads

        Submanifold_conv <<< gridDim, blockDim >>>(image,filter,result,image_Rows, image_Cols,filter_Rows, filter_Depth,result_Rows,result_Cols,padding );
}


int main() {

       	float *Mat1;//image
       	float *Mat2;//filter
        float *Mat3;//result
        float *padded_Mat1; 
	int filter_Size = 3;
        int padding=(filter_Size-1)/2;

	int Mat1_Rows = 4;
	int Mat1_Cols = 4;
	int Mat1_Depth = 3;
        int padded_Mat1_Rows = Mat1_Rows+(padding*2);
        int padded_Mat1_Cols = Mat1_Cols+(padding*2);
        int padded_Mat1_Depth = Mat1_Depth;

	int Mat2_Rows = filter_Size;
	int Mat2_Cols = filter_Size;
	int Mat2_Depth = 3;

	int Mat3_Rows = padded_Mat1_Rows - filter_Size + 1;
	int Mat3_Cols = padded_Mat1_Cols - filter_Size + 1;
	int Mat3_Depth = 1;

	int Mat1_Size = Mat1_Rows * Mat1_Cols * Mat1_Depth;
	int Mat2_Size = Mat2_Rows * Mat2_Cols * Mat2_Depth;
	int Mat3_Size = Mat3_Rows * Mat3_Cols * Mat3_Depth;
        int padded_Mat1_Size = padded_Mat1_Rows * padded_Mat1_Cols * padded_Mat1_Depth;
        
        //memory allocation
        cudaMallocManaged( & Mat1, Mat1_Size *sizeof(float)); //places variables in unified memory, available to CPU and GPU
        cudaMallocManaged( & Mat2, Mat2_Size *sizeof(float));
        cudaMallocManaged( & Mat3, Mat3_Size *sizeof(float));
        cudaMallocManaged( & padded_Mat1, padded_Mat1_Size *sizeof(float));
        int ii,jj,kk;

	for (int k = 0; k < padded_Mat1_Depth; k++)
        {

           for (int j=0; j < padded_Mat1_Cols; j++)
           {
	      for (int i=0; i < padded_Mat1_Rows; i++)
              {  
                   if((i==0 && j==0) || (i==2 && j ==0) || (i==1 && j==2))

                      { 
                           ii=i+padding;
                           jj=j+padding;
                           kk=k;    
                           padded_Mat1[(kk *padded_Mat1_Rows * padded_Mat1_Cols) + (jj * padded_Mat1_Rows) + ii]=1;
                      }
               
              }
           } 
        }
        
        for (size_t i = 0; i <Mat2_Size; i++)
           Mat2[i]=1;

        std::cout <<"padded_Mat1"<<std::endl;
        for (size_t dep = 0; dep < padded_Mat1_Depth; dep++)
        {  
          std::cout << std::endl;

          for (size_t col = 0; col < padded_Mat1_Cols; col++)
          {
                 for (size_t row = 0; row < padded_Mat1_Rows; row++)

                 {
                         std::cout << padded_Mat1[(dep *padded_Mat1_Rows * padded_Mat1_Cols) + (col * padded_Mat1_Rows) + row] << " ";
                 }
                 std::cout << std::endl;
          }
        }

        gettimeofday(&t1, 0); //time
	Convolution3D(padded_Mat1, Mat2, Mat3,padding,padded_Mat1_Rows,padded_Mat1_Cols, Mat2_Rows, Mat2_Depth,Mat3_Rows,Mat3_Cols);

	cudaDeviceSynchronize();
        gettimeofday(&t2, 0);//time
        double time = t2.tv_sec+(t2.tv_usec/1000000.0)- t1.tv_sec-(t1.tv_usec/1000000.0);

        printf("Convolution time:  %.6lf  s \n", time);

	for (size_t row = 0; row < Mat3_Rows; row++)
	{
		for (size_t col = 0; col < Mat3_Cols; col++)
		{
			std::cout << Mat3[row * Mat3_Cols + col] << " ";
		}
		std::cout << std::endl;
	}
	

	// cpu and gpu memory free
	cudaFree(Mat1);
	cudaFree(Mat2);
	cudaFree(Mat3);
        cudaFree(padded_Mat1);

	return 0;
}

	.file	"tmpxft_0020eaeb_00000000-6_submanifold_cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z47__device_stub__Z16Submanifold_convPfS_S_iiiiiiiPfS_S_iiiiiii
	.type	_Z47__device_stub__Z16Submanifold_convPfS_S_iiiiiiiPfS_S_iiiiiii, @function
_Z47__device_stub__Z16Submanifold_convPfS_S_iiiiiiiPfS_S_iiiiiii:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z16Submanifold_convPfS_S_iiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L2:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z47__device_stub__Z16Submanifold_convPfS_S_iiiiiiiPfS_S_iiiiiii, .-_Z47__device_stub__Z16Submanifold_convPfS_S_iiiiiiiPfS_S_iiiiiii
	.globl	_Z16Submanifold_convPfS_S_iiiiiii
	.type	_Z16Submanifold_convPfS_S_iiiiiii, @function
_Z16Submanifold_convPfS_S_iiiiiii:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z16Submanifold_convPfS_S_iiiiiiiPfS_S_iiiiiii
	.cfi_endproc
.LFE3662:
	.size	_Z16Submanifold_convPfS_S_iiiiiii, .-_Z16Submanifold_convPfS_S_iiiiiii
	.globl	_Z13Convolution3DPfS_S_iiiiiii
	.type	_Z13Convolution3DPfS_S_iiiiiii, @function
_Z13Convolution3DPfS_S_iiiiiii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movl	152(%rsp), %ebp
	movl	144(%rsp), %r14d
	movq	%rdi, (%rsp)
	movq	%rsi, 8(%rsp)
	movl	128(%rsp), %r15d
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC0(%rip), %xmm0
	movq	%rdx, 16(%rsp)
	movl	%r8d, 24(%rsp)
	movl	136(%rsp), %ebx
	call	ceilf@PLT
	movss	%xmm0, 28(%rsp)
	cvtsi2ssl	%r14d, %xmm0
	mulss	.LC0(%rip), %xmm0
	call	ceilf@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movss	28(%rsp), %xmm1
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	cvttss2sil	%xmm1, %eax
	movl	%eax, 40(%rsp)
	cvttss2sil	%xmm0, %eax
	movl	%eax, 44(%rsp)
	movq	40(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	movl	%r13d, 152(%rsp)
	movl	24(%rsp), %ecx
	movl	%r15d, %r9d
	movl	%r12d, %r8d
	movl	%ebp, 144(%rsp)
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%r14d, 136(%rsp)
	movl	%ebx, 128(%rsp)
	addq	$72, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z47__device_stub__Z16Submanifold_convPfS_S_iiiiiiiPfS_S_iiiiiii
.L8:
	.cfi_restore_state
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z13Convolution3DPfS_S_iiiiiii, .-_Z13Convolution3DPfS_S_iiiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"padded_Mat1"
.LC3:
	.string	" "
.LC5:
	.string	"Convolution time:  %.6lf  s \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1, %edx
	movl	$192, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	movl	$108, %esi
	call	cudaMallocManaged@PLT
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	movl	$64, %esi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$432, %esi
	call	cudaMallocManaged@PLT
	movq	32(%rsp), %r8
	movl	$6, %ecx
	movss	.LC1(%rip), %xmm0
.L12:
	movl	%ecx, %esi
	xorl	%edx, %edx
.L20:
	xorl	%eax, %eax
	leal	1(%rsi), %r9d
.L18:
	movl	%edx, %ebx
	leal	1(%rax), %edi
	orl	%eax, %ebx
	je	.L13
	cmpl	$2, %eax
	jne	.L30
	testl	%edx, %edx
	je	.L13
.L30:
	cmpl	$1, %eax
	jne	.L15
	cmpl	$2, %edx
	jne	.L15
.L13:
	addl	%r9d, %eax
	cltq
	movss	%xmm0, (%r8,%rax,4)
	movl	%edi, %eax
	jmp	.L18
.L15:
	movl	%edi, %eax
	cmpl	$6, %edi
	jne	.L18
	incl	%edx
	addl	$6, %esi
	cmpl	$6, %edx
	jne	.L20
	addl	$36, %ecx
	cmpl	$114, %ecx
	jne	.L12
	movq	16(%rsp), %rdx
	movss	.LC1(%rip), %xmm0
	xorl	%eax, %eax
.L21:
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	cmpq	$27, %rax
	jne	.L21
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%r12d, %r12d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rbp
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L25:
	leaq	_ZSt4cout(%rip), %rdi
	movq	%r12, %r14
	xorl	%r15d, %r15d
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L22:
	leaq	0(,%r14,4), %rbx
	xorl	%r13d, %r13d
.L23:
	movq	32(%rsp), %rax
	leaq	_ZSt4cout(%rip), %rdi
	incq	%r13
	cvtss2sd	(%rax,%rbx), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	addq	$4, %rbx
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$6, %r13
	jne	.L23
	leaq	_ZSt4cout(%rip), %rdi
	incq	%r15
	addq	$6, %r14
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$6, %r15
	jne	.L22
	addq	$36, %r12
	cmpq	$108, %r12
	jne	.L25
	xorl	%esi, %esi
	leaq	t1(%rip), %rdi
	xorl	%r12d, %r12d
	call	gettimeofday@PLT
	pushq	$4
	.cfi_def_cfa_offset 120
	movl	$6, %r9d
	movl	$6, %r8d
	pushq	$4
	.cfi_def_cfa_offset 128
	movl	$1, %ecx
	pushq	$3
	.cfi_def_cfa_offset 136
	pushq	$3
	.cfi_def_cfa_offset 144
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z13Convolution3DPfS_S_iiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 112
	call	cudaDeviceSynchronize@PLT
	xorl	%esi, %esi
	leaq	t2(%rip), %rdi
	call	gettimeofday@PLT
	movsd	.LC4(%rip), %xmm2
	leaq	.LC5(%rip), %rsi
	movb	$1, %al
	cvtsi2sdq	8+t2(%rip), %xmm0
	movl	$2, %edi
	cvtsi2sdq	t2(%rip), %xmm1
	divsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	cvtsi2sdq	t1(%rip), %xmm1
	subsd	%xmm1, %xmm0
	cvtsi2sdq	8+t1(%rip), %xmm1
	divsd	%xmm2, %xmm1
	subsd	%xmm1, %xmm0
	call	__printf_chk@PLT
.L26:
	leaq	0(,%r12,4), %r14
	xorl	%r13d, %r13d
.L27:
	movq	24(%rsp), %rax
	leaq	_ZSt4cout(%rip), %rdi
	incq	%r13
	cvtss2sd	(%rax,%r14), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	addq	$4, %r14
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$4, %r13
	jne	.L27
	leaq	_ZSt4cout(%rip), %rdi
	addq	$4, %r12
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$16, %r12
	jne	.L26
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z16Submanifold_convPfS_S_iiiiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16Submanifold_convPfS_S_iiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	t2
	.bss
	.align 16
	.type	t2, @object
	.size	t2, 16
t2:
	.zero	16
	.globl	t1
	.align 16
	.type	t1, @object
	.size	t1, 16
t1:
	.zero	16
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1023410176
	.align 4
.LC1:
	.long	1065353216
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdlib.h>			
#include <iostream>
#include <math.h>
#include <time.h>
#include <sys/time.h>

timeval t1, t2;

__global__ void Submanifold_conv(float* image, float* filter, float* result, int image_Rows, int image_Cols, int filterRC, int filter_Depth, int result_Rows, int result_Cols, int padding)
{
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	float sum = 0.0;

	if (row < result_Rows && col < result_Cols)
	{       //printf("row %d col %d\n",row,col);
		int image_Row_Cols = image_Rows * image_Cols;

		for (int filterRow = 0; filterRow < filterRC; filterRow++) 
                {
			for (int filterCol = 0; filterCol < filterRC; filterCol++)
                        {
	                   for (int dep = 0; dep < filter_Depth; dep++)
                           {
                    
			    sum += image[(row + filterRow) * image_Cols + col + filterCol + dep * image_Row_Cols] * filter[filterRow * filterRC + filterCol + dep * filter_Depth];
                           }
			}
		}
                if(image[(row+padding) * (result_Cols+(padding*2)) + (col+padding)]!=0)
		result[row * result_Cols + col] = sum;
	}
}


void Convolution3D( float* image,  float* filter,  float* result, int padding, int image_Rows, int image_Cols, int filter_Rows, int filter_Depth,int result_Rows, int result_Cols)
{	int threadsPerBlock =32;

	int grid_Cols = ceil(float(result_Cols) / float(threadsPerBlock));
	int grid_Rows = ceil(float(result_Rows) / float(threadsPerBlock));

	dim3 gridDim(grid_Cols, grid_Rows);
	dim3 blockDim(threadsPerBlock,threadsPerBlock);		// total 32*32 = 1024 threads

        Submanifold_conv <<< gridDim, blockDim >>>(image,filter,result,image_Rows, image_Cols,filter_Rows, filter_Depth,result_Rows,result_Cols,padding );
}


int main() {

       	float *Mat1;//image
       	float *Mat2;//filter
        float *Mat3;//result
        float *padded_Mat1; 
	int filter_Size = 3;
        int padding=(filter_Size-1)/2;

	int Mat1_Rows = 4;
	int Mat1_Cols = 4;
	int Mat1_Depth = 3;
        int padded_Mat1_Rows = Mat1_Rows+(padding*2);
        int padded_Mat1_Cols = Mat1_Cols+(padding*2);
        int padded_Mat1_Depth = Mat1_Depth;

	int Mat2_Rows = filter_Size;
	int Mat2_Cols = filter_Size;
	int Mat2_Depth = 3;

	int Mat3_Rows = padded_Mat1_Rows - filter_Size + 1;
	int Mat3_Cols = padded_Mat1_Cols - filter_Size + 1;
	int Mat3_Depth = 1;

	int Mat1_Size = Mat1_Rows * Mat1_Cols * Mat1_Depth;
	int Mat2_Size = Mat2_Rows * Mat2_Cols * Mat2_Depth;
	int Mat3_Size = Mat3_Rows * Mat3_Cols * Mat3_Depth;
        int padded_Mat1_Size = padded_Mat1_Rows * padded_Mat1_Cols * padded_Mat1_Depth;
        
        //memory allocation
        hipMallocManaged( & Mat1, Mat1_Size *sizeof(float)); //places variables in unified memory, available to CPU and GPU
        hipMallocManaged( & Mat2, Mat2_Size *sizeof(float));
        hipMallocManaged( & Mat3, Mat3_Size *sizeof(float));
        hipMallocManaged( & padded_Mat1, padded_Mat1_Size *sizeof(float));
        int ii,jj,kk;

	for (int k = 0; k < padded_Mat1_Depth; k++)
        {

           for (int j=0; j < padded_Mat1_Cols; j++)
           {
	      for (int i=0; i < padded_Mat1_Rows; i++)
              {  
                   if((i==0 && j==0) || (i==2 && j ==0) || (i==1 && j==2))

                      { 
                           ii=i+padding;
                           jj=j+padding;
                           kk=k;    
                           padded_Mat1[(kk *padded_Mat1_Rows * padded_Mat1_Cols) + (jj * padded_Mat1_Rows) + ii]=1;
                      }
               
              }
           } 
        }
        
        for (size_t i = 0; i <Mat2_Size; i++)
           Mat2[i]=1;

        std::cout <<"padded_Mat1"<<std::endl;
        for (size_t dep = 0; dep < padded_Mat1_Depth; dep++)
        {  
          std::cout << std::endl;

          for (size_t col = 0; col < padded_Mat1_Cols; col++)
          {
                 for (size_t row = 0; row < padded_Mat1_Rows; row++)

                 {
                         std::cout << padded_Mat1[(dep *padded_Mat1_Rows * padded_Mat1_Cols) + (col * padded_Mat1_Rows) + row] << " ";
                 }
                 std::cout << std::endl;
          }
        }

        gettimeofday(&t1, 0); //time
	Convolution3D(padded_Mat1, Mat2, Mat3,padding,padded_Mat1_Rows,padded_Mat1_Cols, Mat2_Rows, Mat2_Depth,Mat3_Rows,Mat3_Cols);

	hipDeviceSynchronize();
        gettimeofday(&t2, 0);//time
        double time = t2.tv_sec+(t2.tv_usec/1000000.0)- t1.tv_sec-(t1.tv_usec/1000000.0);

        printf("Convolution time:  %.6lf  s \n", time);

	for (size_t row = 0; row < Mat3_Rows; row++)
	{
		for (size_t col = 0; col < Mat3_Cols; col++)
		{
			std::cout << Mat3[row * Mat3_Cols + col] << " ";
		}
		std::cout << std::endl;
	}
	

	// cpu and gpu memory free
	hipFree(Mat1);
	hipFree(Mat2);
	hipFree(Mat3);
        hipFree(padded_Mat1);

	return 0;
}

	.text
	.file	"submanifold_cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z31__device_stub__Submanifold_convPfS_S_iiiiiii # -- Begin function _Z31__device_stub__Submanifold_convPfS_S_iiiiiii
	.type	_Z31__device_stub__Submanifold_convPfS_S_iiiiiii,@function
_Z31__device_stub__Submanifold_convPfS_S_iiiiiii: # @_Z31__device_stub__Submanifold_convPfS_S_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16Submanifold_convPfS_S_iiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__Submanifold_convPfS_S_iiiiiii, .Lfunc_end0-_Z31__device_stub__Submanifold_convPfS_S_iiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z13Convolution3DPfS_S_iiiiiii
.LCPI1_0:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z13Convolution3DPfS_S_iiiiiii
	.type	_Z13Convolution3DPfS_S_iiiiiii,@function
_Z13Convolution3DPfS_S_iiiiiii:         # @_Z13Convolution3DPfS_S_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %r14d
                                        # kill: def $ecx killed $ecx def $rcx
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	movq	%rdx, %r15
	movq	%rsi, %r12
	movl	104(%rsp), %eax
	cvtsi2ss	%eax, %xmm0
	movq	%rdi, %r13
	movl	96(%rsp), %ebp
	mulss	.LCPI1_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	shlq	$32, %rdi
	orq	%rbx, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB1_1
# %bb.2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	jmp	.LBB1_3
.LBB1_1:
	.cfi_def_cfa_offset 80
	movl	88(%rsp), %eax
	movl	80(%rsp), %r9d
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	%r14d, %ecx
	movl	12(%rsp), %r8d                  # 4-byte Reload
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	112(%rsp), %r10d
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	movl	112(%rsp), %r10d
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z31__device_stub__Submanifold_convPfS_S_iiiiiii
	addq	$56, %rsp
	.cfi_adjust_cfa_offset -56
.LBB1_3:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z13Convolution3DPfS_S_iiiiiii, .Lfunc_end1-_Z13Convolution3DPfS_S_iiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	32(%rsp), %rdi
	movl	$192, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	24(%rsp), %rdi
	movl	$108, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$64, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$432, %esi                      # imm = 0x1B0
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$28, %eax
	xorl	%ecx, %ecx
.LBB2_1:                                # %.preheader106
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
                                        #       Child Loop BB2_3 Depth 3
	movq	%rax, %rdx
	xorl	%esi, %esi
.LBB2_2:                                # %.preheader105
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_3 Depth 3
	movq	8(%rsp), %rdi
	addq	%rdx, %rdi
	movq	%rsi, %r8
	xorq	$2, %r8
	xorl	%r9d, %r9d
.LBB2_3:                                #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	%r9, %r10
	xorq	$2, %r10
	orq	%rsi, %r10
	sete	%r10b
	movq	%r9, %r11
	xorq	$1, %r11
	orq	%r8, %r11
	sete	%r11b
	movl	%r9d, %ebx
	orl	%esi, %ebx
	je	.LBB2_6
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=3
	testb	%r10b, %r10b
	jne	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_3 Depth=3
	testb	%r11b, %r11b
	je	.LBB2_7
.LBB2_6:                                #   in Loop: Header=BB2_3 Depth=3
	movl	$1065353216, (%rdi,%r9,4)       # imm = 0x3F800000
.LBB2_7:                                #   in Loop: Header=BB2_3 Depth=3
	incq	%r9
	cmpq	$6, %r9
	jne	.LBB2_3
# %bb.8:                                #   in Loop: Header=BB2_2 Depth=2
	incq	%rsi
	addq	$24, %rdx
	cmpq	$6, %rsi
	jne	.LBB2_2
# %bb.9:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rcx
	addq	$144, %rax
	cmpq	$3, %rcx
	jne	.LBB2_1
# %bb.10:                               # %.preheader104
	movq	24(%rsp), %rax
	xorl	%ecx, %ecx
.LBB2_11:                               # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rax,%rcx,4)      # imm = 0x3F800000
	incq	%rcx
	cmpq	$27, %rcx
	jne	.LBB2_11
# %bb.12:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB2_13:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_14 Depth 2
                                        #       Child Loop BB2_15 Depth 3
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r14, %r12
	xorl	%r13d, %r13d
.LBB2_14:                               # %.preheader103
                                        #   Parent Loop BB2_13 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_15 Depth 3
	xorl	%ebp, %ebp
.LBB2_15:                               #   Parent Loop BB2_13 Depth=1
                                        #     Parent Loop BB2_14 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	8(%rsp), %rax
	addq	%r12, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%rbp,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbp
	cmpq	$6, %rbp
	jne	.LBB2_15
# %bb.16:                               #   in Loop: Header=BB2_14 Depth=2
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r13
	addq	$24, %r12
	cmpq	$6, %r13
	jne	.LBB2_14
# %bb.17:                               #   in Loop: Header=BB2_13 Depth=1
	incq	%r15
	addq	$144, %r14
	cmpq	$3, %r15
	jne	.LBB2_13
# %bb.18:
	xorl	%ebx, %ebx
	movl	$t1, %edi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$4, %eax
	movl	$3, %r10d
	movl	$1, %ecx
	movl	$6, %r8d
	movl	$6, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	_Z13Convolution3DPfS_S_iiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	callq	hipDeviceSynchronize
	movl	$t2, %edi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	t2(%rip), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	t2+8(%rip), %xmm0
	movsd	.LCPI2_0(%rip), %xmm2           # xmm2 = mem[0],zero
	divsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	t1(%rip), %xmm1
	subsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	t1+8(%rip), %xmm1
	divsd	%xmm2, %xmm1
	subsd	%xmm1, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movl	$_ZSt4cout, %r14d
	xorl	%r15d, %r15d
.LBB2_19:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_20 Depth 2
	xorl	%r12d, %r12d
.LBB2_20:                               #   Parent Loop BB2_19 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	16(%rsp), %rax
	addq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$4, %r12
	jne	.LBB2_20
# %bb.21:                               #   in Loop: Header=BB2_19 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r15
	addq	$16, %rbx
	cmpq	$4, %r15
	jne	.LBB2_19
# %bb.22:
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16Submanifold_convPfS_S_iiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	t1,@object                      # @t1
	.bss
	.globl	t1
	.p2align	3, 0x0
t1:
	.zero	16
	.size	t1, 16

	.type	t2,@object                      # @t2
	.globl	t2
	.p2align	3, 0x0
t2:
	.zero	16
	.size	t2, 16

	.type	_Z16Submanifold_convPfS_S_iiiiiii,@object # @_Z16Submanifold_convPfS_S_iiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z16Submanifold_convPfS_S_iiiiiii
	.p2align	3, 0x0
_Z16Submanifold_convPfS_S_iiiiiii:
	.quad	_Z31__device_stub__Submanifold_convPfS_S_iiiiiii
	.size	_Z16Submanifold_convPfS_S_iiiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"padded_Mat1"
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Convolution time:  %.6lf  s \n"
	.size	.L.str.2, 30

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16Submanifold_convPfS_S_iiiiiii"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__Submanifold_convPfS_S_iiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym t1
	.addrsig_sym t2
	.addrsig_sym _Z16Submanifold_convPfS_S_iiiiiii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16Submanifold_convPfS_S_iiiiiii ; -- Begin function _Z16Submanifold_convPfS_S_iiiiiii
	.globl	_Z16Submanifold_convPfS_S_iiiiiii
	.p2align	8
	.type	_Z16Submanifold_convPfS_S_iiiiiii,@function
_Z16Submanifold_convPfS_S_iiiiiii:      ; @_Z16Submanifold_convPfS_S_iiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x28
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s3, v[3:4]
	s_mul_i32 s7, s14, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, s7, v2
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s5, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_11
; %bb.1:
	s_clause 0x2
	s_load_b128 s[12:15], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s14, 1
	s_cbranch_scc1 .LBB0_8
; %bb.2:                                ; %.preheader53.lr.ph
	v_mul_lo_u32 v3, s13, v0
	v_mov_b32_e32 v4, 0
	s_cmp_gt_i32 s15, 0
	s_mov_b32 s3, 0
	s_cselect_b32 s4, -1, 0
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v5, v2, v3, s7
	s_mul_i32 s7, s13, s12
	s_mov_b32 s12, 0
.LBB0_3:                                ; %.preheader53
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v6, v5
	s_mov_b32 s17, s12
	s_mov_b32 s18, s3
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v2, v6
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_mov_b32 s2, s17
	s_mov_b32 s19, s15
	s_cbranch_vccnz .LBB0_6
.LBB0_5:                                ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_ashrrev_i32_e32 v3, 31, v2
	s_lshl_b64 s[20:21], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s20, s10, s20
	s_addc_u32 s21, s11, s21
	v_lshlrev_b64 v[7:8], 2, v[2:3]
	s_load_b32 s20, s[20:21], 0x0
	v_add_nc_u32_e32 v2, s7, v2
	s_add_i32 s19, s19, -1
	s_add_i32 s2, s2, s15
	s_cmp_eq_u32 s19, 0
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	global_load_b32 v3, v[7:8], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v4, s20, v3
	s_cbranch_scc0 .LBB0_5
.LBB0_6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v6, 1, v6
	s_add_i32 s18, s18, 1
	s_add_i32 s17, s17, 1
	s_cmp_eq_u32 s18, s14
	s_cbranch_scc0 .LBB0_4
; %bb.7:                                ; %._crit_edge58
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v5, s13, v5
	s_add_i32 s16, s16, 1
	s_add_i32 s12, s12, s14
	s_cmp_eq_u32 s16, s14
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_9
.LBB0_8:
	v_mov_b32_e32 v4, 0
.LBB0_9:                                ; %._crit_edge62
	v_add_nc_u32_e32 v2, s6, v0
	s_lshl_b32 s2, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s2, s2, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, v2, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v1, s6, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16Submanifold_convPfS_S_iiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16Submanifold_convPfS_S_iiiiiii, .Lfunc_end0-_Z16Submanifold_convPfS_S_iiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 520
; NumSgprs: 24
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16Submanifold_convPfS_S_iiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z16Submanifold_convPfS_S_iiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
