#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>

#define MASK_WIDTH 5
#define TILE_WIDTH 16

#define COMMENT "Histogram_GPU"
#define RGB_COMPONENT_COLOR 255


typedef struct {
    unsigned char red, green, blue;
} PPMPixel;

typedef struct {
    int x, y;
    PPMPixel *data;
} PPMImage;

double rtclock()
{
    struct timezone Tzp;
    struct timeval Tp;
    int stat;
    stat = gettimeofday (&Tp, &Tzp);
    if (stat != 0) printf("Error return from gettimeofday: %d",stat);
    return(Tp.tv_sec + Tp.tv_usec*1.0e-6);
}


static PPMImage *readPPM(const char *filename) {
    char buff[16];
    PPMImage *img;
    FILE *fp;
    int c, rgb_comp_color;
    fp = fopen(filename, "rb");
    if (!fp) {
        fprintf(stderr, "Unable to open file '%s'\n", filename);
        exit(1);
    }

    if (!fgets(buff, sizeof(buff), fp)) {
        perror(filename);
        exit(1);
    }

    if (buff[0] != 'P' || buff[1] != '6') {
        fprintf(stderr, "Invalid image format (must be 'P6')\n");
        exit(1);
    }

    img = (PPMImage *) malloc(sizeof(PPMImage));
    if (!img) {
        fprintf(stderr, "Unable to allocate memory\n");
        exit(1);
    }

    c = getc(fp);
    while (c == '#') {
        while (getc(fp) != '\n')
            ;
        c = getc(fp);
    }

    ungetc(c, fp);
    if (fscanf(fp, "%d %d", &img->x, &img->y) != 2) {
        fprintf(stderr, "Invalid image size (error loading '%s')\n", filename);
        exit(1);
    }

    if (fscanf(fp, "%d", &rgb_comp_color) != 1) {
        fprintf(stderr, "Invalid rgb component (error loading '%s')\n",
                filename);
        exit(1);
    }

    if (rgb_comp_color != RGB_COMPONENT_COLOR) {
        fprintf(stderr, "'%s' does not have 8-bits components\n", filename);
        exit(1);
    }

    while (fgetc(fp) != '\n')
        ;
    img->data = (PPMPixel*) malloc(img->x * img->y * sizeof(PPMPixel));

    if (!img) {
        fprintf(stderr, "Unable to allocate memory\n");
        exit(1);
    }

    if (fread(img->data, 3 * img->x, img->y, fp) != img->y) {
        fprintf(stderr, "Error loading image '%s'\n", filename);
        exit(1);
    }

    fclose(fp);
    return img;
}

void writePPM(PPMImage *img) {
    fprintf(stdout, "P6\n");
    fprintf(stdout, "# %s\n", COMMENT);
    fprintf(stdout, "%d %d\n", img->x, img->y);
    fprintf(stdout, "%d\n", RGB_COMPONENT_COLOR);
    fwrite(img->data, 3 * img->x, img->y, stdout);
    fclose(stdout);
}

//versao sem shared memory
__global__ void smooth_GPU_NoSM(PPMPixel *dataIn, PPMPixel *dataOut,  int *width, int *height) {


    //numeros de pixels que o bloco precisa expandir em cada direção (esquerda, direita, baixo, cima);
    int sizeExtraRegion = (int)((MASK_WIDTH - 1) / 2);

    //variaveis necessarias para criar uma regiao de dimensao GridSize x GridSize (shared memory)
    int i, j, red, green, blue;

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;



    if(row < *height && col < *width){
        red = 0;
        green = 0;
        blue = 0;

        int rowInNeighbourhood;
        int colInNeighbourhood;
        int indexNeighbourhood;
        int numberPixelsInNeighbourhood = MASK_WIDTH * MASK_WIDTH;

        //pega a vizinhanca do pixel
        for(i = -sizeExtraRegion; i <= sizeExtraRegion; i++){
            for(j = -sizeExtraRegion; j <= sizeExtraRegion; j++){
                rowInNeighbourhood = row - i;
                colInNeighbourhood = col - j;
                indexNeighbourhood = (rowInNeighbourhood * *width) + colInNeighbourhood;

                if(rowInNeighbourhood >= 0 && rowInNeighbourhood < *height){
                    if(colInNeighbourhood >= 0 && colInNeighbourhood < *width){
                        red += dataIn[indexNeighbourhood].red;
                        green += dataIn[indexNeighbourhood].green;
                        blue += dataIn[indexNeighbourhood].blue;
                    }
                }
            }
        }


        dataOut[(row * *width) + col].red = red / (numberPixelsInNeighbourhood);
        dataOut[(row * *width) + col].green = green / (numberPixelsInNeighbourhood);
        dataOut[(row * *width) + col].blue = blue / (numberPixelsInNeighbourhood);
    }

}


__global__ void smooth_GPU(PPMPixel *dataIn, PPMPixel *dataOut,  int *width, int *height) {


    //numeros de pixels que o bloco precisa expandir em cada direção (esquerda, direita, baixo, cima);
    int sizeExtraRegion = (int)((MASK_WIDTH - 1) / 2);

    //variaveis necessarias para criar uma regiao de dimensao GridSize x GridSize (shared memory)
    int GridSize = TILE_WIDTH + (MASK_WIDTH - 1);
    int gridratio = ceil((float)(GridSize * GridSize) / (blockDim.x * blockDim.y));
    int startBlockRow = blockIdx.y * blockDim.y;
    int startBlockCol = blockIdx.x * blockDim.x;
    int it, index, x, y;
    int sharedRow, sharedCol;
    int i, j, red, green, blue;
    __shared__ PPMPixel shared[TILE_WIDTH + (MASK_WIDTH - 1)][TILE_WIDTH + (MASK_WIDTH - 1)];

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    //transferindo os dados do bloco para a shared memory
    for(it = 0; it < gridratio; it++){
        index = (threadIdx.y * blockDim.x) + threadIdx.x + (it * blockDim.x * blockDim.y);
        x = (index / GridSize );
        y = index % GridSize ;

        if(x < GridSize  && y < GridSize ){
            sharedRow = startBlockRow + x - sizeExtraRegion ;
            sharedCol = startBlockCol + y - sizeExtraRegion ;
            if(sharedRow >= 0 && sharedCol >= 0 && sharedCol < *width && sharedRow < *height){
                shared[x][y] = dataIn[sharedRow * *width + sharedCol];
            }else{
                shared[x][y].red = shared[x][y].green = shared[x][y].blue = 0;
            }
        }
    }

    //sincronização necessaria para garantir que todos os dados estejam na shared memory antes de computar o smooth
    __syncthreads();


    //se é um pixel valido, computa o smooth
    if((row * col) < (*width * *height)){
        red = 0;
        green = 0;
        blue = 0;
        int numberPixelsInNeighbourhood = MASK_WIDTH * MASK_WIDTH;
        //pega a vizinhanca do pixel
        for(i = threadIdx.y; i < (threadIdx.y + MASK_WIDTH); i++){
            for(j = threadIdx.x; j < (threadIdx.x + MASK_WIDTH); j++){
                red += shared[i][j].red;
                green += shared[i][j].green;
                blue += shared[i][j].blue;
            }
        }
        dataOut[(row * *width) + col].red = red / (numberPixelsInNeighbourhood);
        dataOut[(row * *width) + col].green = green / (numberPixelsInNeighbourhood);
        dataOut[(row * *width) + col].blue = blue / (numberPixelsInNeighbourhood);
    }
}

int main(int argc, char *argv[]) {

    if( argc != 2 ) {
        printf("Too many or no one arguments supplied.\n");
    }

    //double t_start, t_end;
    char *filename = argv[1];
    float milliseconds;

    // CUDA EVENTS
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    PPMImage *image = readPPM(filename);
    PPMImage *image_output = (PPMImage *) malloc(sizeof(PPMImage));
    image_output->x = image->x;
    image_output->y = image->y;
    image_output->data = (PPMPixel*) malloc(image_output->x * image_output->y * sizeof(PPMPixel));

    int w = image->x;
    int h = image->y;
    int n = image->y * image->x;

    PPMPixel *D_dataIn, *D_dataOut;
    int *D_width, *D_height;

    cudaEventRecord(start);
    cudaMalloc((void**)&D_dataIn, n * sizeof(PPMPixel));
    cudaMalloc((void**)&D_dataOut, n * sizeof(PPMPixel));
    cudaMalloc((void**)&D_width, sizeof(int));
    cudaMalloc((void**)&D_height, sizeof(int));

    cudaMemcpy(D_dataIn, image->data, n * sizeof(PPMPixel), cudaMemcpyHostToDevice);
    cudaMemcpy(D_width, &w, sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(D_height, &h, sizeof(int), cudaMemcpyHostToDevice);

    dim3 threadsPorBloco(TILE_WIDTH, TILE_WIDTH);
    dim3 blocos(ceil((float)w / TILE_WIDTH), ceil((float)h / TILE_WIDTH), 1);

    //cudaEventRecord(start);
    smooth_GPU<<<blocos, threadsPorBloco>>>(D_dataIn, D_dataOut, D_width, D_height);
    cudaEventRecord(stop);
    cudaEventSynchronize(stop);
    milliseconds = 0;
    cudaEventElapsedTime(&milliseconds, start, stop);

    cudaMemcpy(image_output->data, D_dataOut, n * sizeof(PPMPixel), cudaMemcpyDeviceToHost);

    cudaFree(D_dataIn);
    cudaFree(D_dataOut);
    cudaFree(D_width);
    cudaFree(D_height);

    // t_start = rtclock();
    // Smoothing_CPU_Serial(image_output, image);
    // t_end = rtclock();

    //writePPM(image_output);

    //fprintf(stdout, "\n%0.6lfs\n", t_end - t_start);
    printf("Tempo: %0.3f\n",milliseconds);
    free(image->data);
    free(image);
    free(image_output->data);
    free(image_output);
    return 0;
}


/*
 *
 *
 * O cálculo usado para computar os valores da tabela foi
 *
 *
 * Bwr = (N_sm)/(N_gm)
 *
 * onde
 * Bwr: Bandwidth Reduction
 * N_sm: Número de acessos a shared memory
 * N_gm: Número de acessos a memoria global
 *
 * Na prática eu não estou usando uma matrix (ou vetor) para representar a máscara. Para realizar a computação
 * eu apenas preciso do valor do block extendido (shared memory). Exemplo, se o bloco na GPU tem tamaho 16x16 e a máscara é uma 5x5
 * então o tamanho da sharded memory é 20x20. A mémoria global é apenas acessada para transferir os dados para a shared
 * memory. Entao
 *
 * N_gm = 20*20 = 400
 *
 * Para computar a intensidade de um pixel no bloco, nós precisamos de 5x5 acessos a SM (shared memory).
 * como o bloco tem 16x16 pixels em um bloco, então temos
 *
 * N_sm = 16*16*5*5
 *
 * Bwr = (16*16*5*5)/(20*20)  = 16;
 *
 *
 * Abaixo está o Bandwidth Reduction para um único bloco.
 *-----------------------------------------------------------------------------------------------------------------------------
 *|                  | BLOCK_SIZE =  8x8  | BLOCK_SIZE = 14x14 | BLOCK_SIZE = 15x15 | BLOCK_SIZE = 16x16 | BLOCK_SIZE = 32x32 |
 *|------------------|--------------------|--------------------|--------------------|--------------------|--------------------|
 *| MASK_WIDTH =   5 |              11.11 |              15.12 |              15.58 |              16.00 |              19.75 |
 *| MASK_WIDTH =   7 |              16.00 |              24.01 |              25.00 |              25.91 |              34.76 |
 *| MASK_WIDTH =   9 |              20.25 |              32.80 |              34.45 |              36.00 |              51.84 |
 *| MASK_WIDTH =  11 |              23.90 |              41.17 |              43.56 |              45.82 |              70.24 |
 *| MASK_WIDTH =  13 |              27.04 |              49.00 |              52.16 |              55.18 |              89.38 |
 * -----------------------------------------------------------------------------------------------------------------------------
 *
 *
 * Desta maneria, para saber o total de Bandwidth Reduction na imagem, precisamos saber o número de blocos gerados para
 * uma dada entrada. Por exempĺo, para a entrada arq3.ppm que tem dimensões 3840x2160 (2160 linhas e 3840 colunas),
 * utilizando um bloco de 16x16, temos ceil(3840/16) = 240 blocos para cada linha e ceil(2160/16) = 135 blocos em cada
 * coluna. Portanto o número total de blocos é de 240*135 = 32400. Multiplicando esse valor em cada célula da tabela acima
 * obtemos
 *
 *-----------------------------------------------------------------------------------------------------------------------------
 *|                  | BLOCK_SIZE =  8x8  | BLOCK_SIZE = 14x14 | BLOCK_SIZE = 15x15 | BLOCK_SIZE = 16x16 | BLOCK_SIZE = 32x32 |
 *|------------------|--------------------|--------------------|--------------------|--------------------|--------------------|
 *| MASK_WIDTH =   5 |              359964|              489888|              504792|              518400|              639900|
 *| MASK_WIDTH =   7 |              518400|              777924|              810000|              839484|             1126224|
 *| MASK_WIDTH =   9 |              656100|             1062720|             1116180|             1166400|             1679616|
 *| MASK_WIDTH =  11 |              774360|             1333908|             1411344|             1484568|            2275776 |
 *| MASK_WIDTH =  13 |              876096|             1587600|             1689984|             1787832|            2895912 |
 * -----------------------------------------------------------------------------------------------------------------------------
 *
 *
 *
 * Conclusão: da maneira que eu implementei o meu smooth, o Bandwidth Reduction é proporcional ao tamanho
 * da máscara e ao tamanho do bloco. Abaixo esta os tempos e os speeds ups obtidos para cada uma das imagens considerando um bloco de
 * 16x16 e uma máscara de 5x5.
 *
 *
 *Abaxo segue as medicoes e speed ups obtidos
 * ---------------------------------------------------------------------------------------------------------
 * |Entrada  |CPU_Serial (ms)  |GPU_SharedMemory (ms)  |GPU_NoSharedMemory (ms)  |Speedup(CPU/GPUSM)       |
 * ---------------------------------------------------------------------------------------------------------
 * |arq1.ppm |160.054          | 0.416                 |1.096                    |384.74                   |
 * |arq2.ppm |361.446          | 0.878                 |2.421                    |411.67                   |
 * |arq3.ppm |1420.776         | 3.310                 |9.533                    |429.24                   |
 * ---------------------------------------------------------------------------------------------------------
 *
 * A tabela abaixo foi o tempo em ms (milisegundos) obtidos para a ar3.ppm (apenas), variando o tamanho do bloco
 * e o tamanho da máscara.
 *
 * ------------------------------------------------------------------------------------------------------
 * |             |BLOCK_SIZE=8x8   |BLOCK_SIZE=14x14|BLOCK_SIZE=15x15|BLOCK_SIZE=16x16|BLOCK_SIZE=32x32 |
 * ------------------------------------------------------------------------------------------------------
 * |MASK_WIDTH=5 |      5.734      |     3.954       |     3.816     |    3.310       |   3.517         |
 * |MASK_WIDTH=7 |      8.806      |     7.194       |     7.263     |    5.125       |   5.067         |
 * |MASK_WIDTH=9 |      11.150     |     11.454      |     11.151    |    7.371       |   7.014         |
 * |MASK_WIDTH=11|      18.258     |     16.342      |     15.701    |   10.347       |   9.673         |
 * |MASK_WIDTH=13|      25.179     |     21.975      |     21.018    |   18.684       |   12.710        |
 * ------------------------------------------------------------------------------------------------------
 *
 * Conclusao: O tamanho da mascara para computar o valor do pixel afeta consideravelmente o tempo de execução do
 * programa.
 *
 * */

	.file	"tmpxft_002ed1e1_00000000-6_smooth.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error return from gettimeofday: %d"
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv, @function
_Z7rtclockv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edx
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L3:
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z7rtclockv, .-_Z7rtclockv
	.section	.rodata.str1.1
.LC2:
	.string	"P6\n"
.LC3:
	.string	"Histogram_GPU"
.LC4:
	.string	"# %s\n"
.LC5:
	.string	"%d %d\n"
.LC6:
	.string	"%d\n"
	.text
	.globl	_Z8writePPMP8PPMImage
	.type	_Z8writePPMP8PPMImage, @function
_Z8writePPMP8PPMImage:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	stdout(%rip), %rdi
	movl	$2, %esi
	leaq	.LC2(%rip), %rdx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	stdout(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rcx
	leaq	.LC4(%rip), %rdx
	call	__fprintf_chk@PLT
	movl	4(%rbx), %r8d
	movl	(%rbx), %ecx
	movl	$2, %esi
	movq	stdout(%rip), %rdi
	leaq	.LC5(%rip), %rdx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	stdout(%rip), %rdi
	movl	$255, %ecx
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	imull	$3, (%rbx), %esi
	movq	8(%rbx), %rdi
	movslq	4(%rbx), %rdx
	movq	stdout(%rip), %rcx
	movslq	%esi, %rsi
	call	fwrite@PLT
	movq	stdout(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z8writePPMP8PPMImage, .-_Z8writePPMP8PPMImage
	.globl	_Z51__device_stub__Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_
	.type	_Z51__device_stub__Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_, @function
_Z51__device_stub__Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L12:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z51__device_stub__Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_, .-_Z51__device_stub__Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_
	.globl	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.type	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_, @function
_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_
	.cfi_endproc
.LFE2056:
	.size	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_, .-_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.globl	_Z46__device_stub__Z10smooth_GPUP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_
	.type	_Z46__device_stub__Z10smooth_GPUP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_, @function
_Z46__device_stub__Z10smooth_GPUP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10smooth_GPUP8PPMPixelS0_PiS1_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L17:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z46__device_stub__Z10smooth_GPUP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_, .-_Z46__device_stub__Z10smooth_GPUP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_
	.globl	_Z10smooth_GPUP8PPMPixelS0_PiS1_
	.type	_Z10smooth_GPUP8PPMPixelS0_PiS1_, @function
_Z10smooth_GPUP8PPMPixelS0_PiS1_:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z10smooth_GPUP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_
	.cfi_endproc
.LFE2058:
	.size	_Z10smooth_GPUP8PPMPixelS0_PiS1_, .-_Z10smooth_GPUP8PPMPixelS0_PiS1_
	.section	.rodata.str1.1
.LC7:
	.string	"Too many or no one arguments supplied.\n"
.LC8:
	.string	"rb"
.LC9:
	.string	"Unable to open file '%s'\n"
.LC10:
	.string	"Invalid image format (must be 'P6')\n"
.LC11:
	.string	"Unable to allocate memory\n"
.LC12:
	.string	"%d %d"
.LC13:
	.string	"Invalid image size (error loading '%s')\n"
.LC14:
	.string	"%d"
.LC15:
	.string	"Invalid rgb component (error loading '%s')\n"
.LC16:
	.string	"'%s' does not have 8-bits components\n"
.LC17:
	.string	"Error loading image '%s'\n"
.LC20:
	.string	"Tempo: %0.3f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L23
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
.L23:
	movq	8(%rbx), %r12
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	.LC8(%rip), %rsi
	movq	%r12, %rdi
	call	fopen@PLT
	movq	%r12, %rcx
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rbp
	testq	%rax, %rax
	je	.L48
	leaq	88(%rsp), %rdi
	movq	%rax, %rcx
	movl	$16, %edx
	movl	$16, %esi
	call	__fgets_chk@PLT
	testq	%rax, %rax
	jne	.L25
	movq	%r12, %rdi
	call	perror@PLT
.L47:
	movl	$1, %edi
	call	exit@PLT
.L25:
	cmpb	$80, 88(%rsp)
	jne	.L26
	cmpb	$54, 89(%rsp)
	je	.L27
.L26:
	leaq	.LC10(%rip), %rdx
	jmp	.L49
.L27:
	movl	$16, %edi
	call	malloc@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L46
	leaq	.LC11(%rip), %rdx
.L49:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L47
.L30:
	movq	%rbp, %rdi
	call	getc@PLT
	cmpl	$10, %eax
	jne	.L30
.L46:
	movq	%rbp, %rdi
	call	getc@PLT
	cmpl	$35, %eax
	je	.L30
	movq	%rbp, %rsi
	movl	%eax, %edi
	call	ungetc@PLT
	leaq	4(%rbx), %rcx
	movq	%rbx, %rdx
	movq	%rbp, %rdi
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movq	%r12, %rcx
	leaq	.LC13(%rip), %rdx
	cmpl	$2, %eax
	jne	.L48
	leaq	76(%rsp), %rdx
	xorl	%eax, %eax
	leaq	.LC14(%rip), %rsi
	movq	%rbp, %rdi
	call	__isoc23_fscanf@PLT
	movq	%r12, %rcx
	leaq	.LC15(%rip), %rdx
	decl	%eax
	jne	.L48
	cmpl	$255, 76(%rsp)
	leaq	.LC16(%rip), %rdx
	jne	.L48
.L33:
	movq	%rbp, %rdi
	call	fgetc@PLT
	cmpl	$10, %eax
	jne	.L33
	movl	(%rbx), %r14d
	movl	4(%rbx), %r15d
	movl	%r14d, %r13d
	imull	%r15d, %r13d
	movslq	%r13d, %r13
	leaq	0(%r13,%r13,2), %r13
	movq	%r13, %rdi
	call	malloc@PLT
	leal	(%r14,%r14,2), %edx
	movslq	%r15d, %rcx
	movq	%rbp, %r8
	movq	%rax, 8(%rbx)
	movslq	%edx, %rdx
	movq	%rax, %rdi
	movq	%r13, %rsi
	call	__fread_chk@PLT
	movq	%rax, %rdx
	movslq	4(%rbx), %rax
	cmpq	%rax, %rdx
	je	.L34
	movq	%r12, %rcx
	leaq	.LC17(%rip), %rdx
.L48:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L47
.L34:
	movq	%rbp, %rdi
	call	fclose@PLT
	movl	(%rbx), %r14d
	movl	4(%rbx), %r13d
	movl	%r14d, %ebp
	imull	%r13d, %ebp
	movslq	%ebp, %rbp
	leaq	0(%rbp,%rbp,2), %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movl	%r13d, 12(%rsp)
	movl	%r14d, 8(%rsp)
	movq	%rax, %r12
	call	cudaEventRecord@PLT
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	8(%rbx), %rsi
	movq	32(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	leaq	8(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	leaq	12(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	cvtsi2ssl	12(%rsp), %xmm0
	mulss	.LC18(%rip), %xmm0
	call	ceilf@PLT
	movd	%xmm0, %r13d
	cvtsi2ssl	8(%rsp), %xmm0
	mulss	.LC18(%rip), %xmm0
	call	ceilf@PLT
	movd	%r13d, %xmm1
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2siq	%xmm0, %rax
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movl	$1, 84(%rsp)
	movl	%eax, 76(%rsp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, 80(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z46__device_stub__Z10smooth_GPUP8PPMPixelS0_PiS1_P8PPMPixelS0_PiS1_
.L35:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	40(%rsp), %rsi
	movq	%rbp, %rdx
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rbx), %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC21:
	.string	"_Z10smooth_GPUP8PPMPixelS0_PiS1_"
.LC22:
	.string	"_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10smooth_GPUP8PPMPixelS0_PiS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1598689907
	.long	1051772663
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC18:
	.long	1031798784
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>

#define MASK_WIDTH 5
#define TILE_WIDTH 16

#define COMMENT "Histogram_GPU"
#define RGB_COMPONENT_COLOR 255


typedef struct {
    unsigned char red, green, blue;
} PPMPixel;

typedef struct {
    int x, y;
    PPMPixel *data;
} PPMImage;

double rtclock()
{
    struct timezone Tzp;
    struct timeval Tp;
    int stat;
    stat = gettimeofday (&Tp, &Tzp);
    if (stat != 0) printf("Error return from gettimeofday: %d",stat);
    return(Tp.tv_sec + Tp.tv_usec*1.0e-6);
}


static PPMImage *readPPM(const char *filename) {
    char buff[16];
    PPMImage *img;
    FILE *fp;
    int c, rgb_comp_color;
    fp = fopen(filename, "rb");
    if (!fp) {
        fprintf(stderr, "Unable to open file '%s'\n", filename);
        exit(1);
    }

    if (!fgets(buff, sizeof(buff), fp)) {
        perror(filename);
        exit(1);
    }

    if (buff[0] != 'P' || buff[1] != '6') {
        fprintf(stderr, "Invalid image format (must be 'P6')\n");
        exit(1);
    }

    img = (PPMImage *) malloc(sizeof(PPMImage));
    if (!img) {
        fprintf(stderr, "Unable to allocate memory\n");
        exit(1);
    }

    c = getc(fp);
    while (c == '#') {
        while (getc(fp) != '\n')
            ;
        c = getc(fp);
    }

    ungetc(c, fp);
    if (fscanf(fp, "%d %d", &img->x, &img->y) != 2) {
        fprintf(stderr, "Invalid image size (error loading '%s')\n", filename);
        exit(1);
    }

    if (fscanf(fp, "%d", &rgb_comp_color) != 1) {
        fprintf(stderr, "Invalid rgb component (error loading '%s')\n",
                filename);
        exit(1);
    }

    if (rgb_comp_color != RGB_COMPONENT_COLOR) {
        fprintf(stderr, "'%s' does not have 8-bits components\n", filename);
        exit(1);
    }

    while (fgetc(fp) != '\n')
        ;
    img->data = (PPMPixel*) malloc(img->x * img->y * sizeof(PPMPixel));

    if (!img) {
        fprintf(stderr, "Unable to allocate memory\n");
        exit(1);
    }

    if (fread(img->data, 3 * img->x, img->y, fp) != img->y) {
        fprintf(stderr, "Error loading image '%s'\n", filename);
        exit(1);
    }

    fclose(fp);
    return img;
}

void writePPM(PPMImage *img) {
    fprintf(stdout, "P6\n");
    fprintf(stdout, "# %s\n", COMMENT);
    fprintf(stdout, "%d %d\n", img->x, img->y);
    fprintf(stdout, "%d\n", RGB_COMPONENT_COLOR);
    fwrite(img->data, 3 * img->x, img->y, stdout);
    fclose(stdout);
}

//versao sem shared memory
__global__ void smooth_GPU_NoSM(PPMPixel *dataIn, PPMPixel *dataOut,  int *width, int *height) {


    //numeros de pixels que o bloco precisa expandir em cada direção (esquerda, direita, baixo, cima);
    int sizeExtraRegion = (int)((MASK_WIDTH - 1) / 2);

    //variaveis necessarias para criar uma regiao de dimensao GridSize x GridSize (shared memory)
    int i, j, red, green, blue;

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;



    if(row < *height && col < *width){
        red = 0;
        green = 0;
        blue = 0;

        int rowInNeighbourhood;
        int colInNeighbourhood;
        int indexNeighbourhood;
        int numberPixelsInNeighbourhood = MASK_WIDTH * MASK_WIDTH;

        //pega a vizinhanca do pixel
        for(i = -sizeExtraRegion; i <= sizeExtraRegion; i++){
            for(j = -sizeExtraRegion; j <= sizeExtraRegion; j++){
                rowInNeighbourhood = row - i;
                colInNeighbourhood = col - j;
                indexNeighbourhood = (rowInNeighbourhood * *width) + colInNeighbourhood;

                if(rowInNeighbourhood >= 0 && rowInNeighbourhood < *height){
                    if(colInNeighbourhood >= 0 && colInNeighbourhood < *width){
                        red += dataIn[indexNeighbourhood].red;
                        green += dataIn[indexNeighbourhood].green;
                        blue += dataIn[indexNeighbourhood].blue;
                    }
                }
            }
        }


        dataOut[(row * *width) + col].red = red / (numberPixelsInNeighbourhood);
        dataOut[(row * *width) + col].green = green / (numberPixelsInNeighbourhood);
        dataOut[(row * *width) + col].blue = blue / (numberPixelsInNeighbourhood);
    }

}


__global__ void smooth_GPU(PPMPixel *dataIn, PPMPixel *dataOut,  int *width, int *height) {


    //numeros de pixels que o bloco precisa expandir em cada direção (esquerda, direita, baixo, cima);
    int sizeExtraRegion = (int)((MASK_WIDTH - 1) / 2);

    //variaveis necessarias para criar uma regiao de dimensao GridSize x GridSize (shared memory)
    int GridSize = TILE_WIDTH + (MASK_WIDTH - 1);
    int gridratio = ceil((float)(GridSize * GridSize) / (blockDim.x * blockDim.y));
    int startBlockRow = blockIdx.y * blockDim.y;
    int startBlockCol = blockIdx.x * blockDim.x;
    int it, index, x, y;
    int sharedRow, sharedCol;
    int i, j, red, green, blue;
    __shared__ PPMPixel shared[TILE_WIDTH + (MASK_WIDTH - 1)][TILE_WIDTH + (MASK_WIDTH - 1)];

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    //transferindo os dados do bloco para a shared memory
    for(it = 0; it < gridratio; it++){
        index = (threadIdx.y * blockDim.x) + threadIdx.x + (it * blockDim.x * blockDim.y);
        x = (index / GridSize );
        y = index % GridSize ;

        if(x < GridSize  && y < GridSize ){
            sharedRow = startBlockRow + x - sizeExtraRegion ;
            sharedCol = startBlockCol + y - sizeExtraRegion ;
            if(sharedRow >= 0 && sharedCol >= 0 && sharedCol < *width && sharedRow < *height){
                shared[x][y] = dataIn[sharedRow * *width + sharedCol];
            }else{
                shared[x][y].red = shared[x][y].green = shared[x][y].blue = 0;
            }
        }
    }

    //sincronização necessaria para garantir que todos os dados estejam na shared memory antes de computar o smooth
    __syncthreads();


    //se é um pixel valido, computa o smooth
    if((row * col) < (*width * *height)){
        red = 0;
        green = 0;
        blue = 0;
        int numberPixelsInNeighbourhood = MASK_WIDTH * MASK_WIDTH;
        //pega a vizinhanca do pixel
        for(i = threadIdx.y; i < (threadIdx.y + MASK_WIDTH); i++){
            for(j = threadIdx.x; j < (threadIdx.x + MASK_WIDTH); j++){
                red += shared[i][j].red;
                green += shared[i][j].green;
                blue += shared[i][j].blue;
            }
        }
        dataOut[(row * *width) + col].red = red / (numberPixelsInNeighbourhood);
        dataOut[(row * *width) + col].green = green / (numberPixelsInNeighbourhood);
        dataOut[(row * *width) + col].blue = blue / (numberPixelsInNeighbourhood);
    }
}

int main(int argc, char *argv[]) {

    if( argc != 2 ) {
        printf("Too many or no one arguments supplied.\n");
    }

    //double t_start, t_end;
    char *filename = argv[1];
    float milliseconds;

    // CUDA EVENTS
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    PPMImage *image = readPPM(filename);
    PPMImage *image_output = (PPMImage *) malloc(sizeof(PPMImage));
    image_output->x = image->x;
    image_output->y = image->y;
    image_output->data = (PPMPixel*) malloc(image_output->x * image_output->y * sizeof(PPMPixel));

    int w = image->x;
    int h = image->y;
    int n = image->y * image->x;

    PPMPixel *D_dataIn, *D_dataOut;
    int *D_width, *D_height;

    hipEventRecord(start);
    hipMalloc((void**)&D_dataIn, n * sizeof(PPMPixel));
    hipMalloc((void**)&D_dataOut, n * sizeof(PPMPixel));
    hipMalloc((void**)&D_width, sizeof(int));
    hipMalloc((void**)&D_height, sizeof(int));

    hipMemcpy(D_dataIn, image->data, n * sizeof(PPMPixel), hipMemcpyHostToDevice);
    hipMemcpy(D_width, &w, sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(D_height, &h, sizeof(int), hipMemcpyHostToDevice);

    dim3 threadsPorBloco(TILE_WIDTH, TILE_WIDTH);
    dim3 blocos(ceil((float)w / TILE_WIDTH), ceil((float)h / TILE_WIDTH), 1);

    //cudaEventRecord(start);
    smooth_GPU<<<blocos, threadsPorBloco>>>(D_dataIn, D_dataOut, D_width, D_height);
    hipEventRecord(stop);
    hipEventSynchronize(stop);
    milliseconds = 0;
    hipEventElapsedTime(&milliseconds, start, stop);

    hipMemcpy(image_output->data, D_dataOut, n * sizeof(PPMPixel), hipMemcpyDeviceToHost);

    hipFree(D_dataIn);
    hipFree(D_dataOut);
    hipFree(D_width);
    hipFree(D_height);

    // t_start = rtclock();
    // Smoothing_CPU_Serial(image_output, image);
    // t_end = rtclock();

    //writePPM(image_output);

    //fprintf(stdout, "\n%0.6lfs\n", t_end - t_start);
    printf("Tempo: %0.3f\n",milliseconds);
    free(image->data);
    free(image);
    free(image_output->data);
    free(image_output);
    return 0;
}


/*
 *
 *
 * O cálculo usado para computar os valores da tabela foi
 *
 *
 * Bwr = (N_sm)/(N_gm)
 *
 * onde
 * Bwr: Bandwidth Reduction
 * N_sm: Número de acessos a shared memory
 * N_gm: Número de acessos a memoria global
 *
 * Na prática eu não estou usando uma matrix (ou vetor) para representar a máscara. Para realizar a computação
 * eu apenas preciso do valor do block extendido (shared memory). Exemplo, se o bloco na GPU tem tamaho 16x16 e a máscara é uma 5x5
 * então o tamanho da sharded memory é 20x20. A mémoria global é apenas acessada para transferir os dados para a shared
 * memory. Entao
 *
 * N_gm = 20*20 = 400
 *
 * Para computar a intensidade de um pixel no bloco, nós precisamos de 5x5 acessos a SM (shared memory).
 * como o bloco tem 16x16 pixels em um bloco, então temos
 *
 * N_sm = 16*16*5*5
 *
 * Bwr = (16*16*5*5)/(20*20)  = 16;
 *
 *
 * Abaixo está o Bandwidth Reduction para um único bloco.
 *-----------------------------------------------------------------------------------------------------------------------------
 *|                  | BLOCK_SIZE =  8x8  | BLOCK_SIZE = 14x14 | BLOCK_SIZE = 15x15 | BLOCK_SIZE = 16x16 | BLOCK_SIZE = 32x32 |
 *|------------------|--------------------|--------------------|--------------------|--------------------|--------------------|
 *| MASK_WIDTH =   5 |              11.11 |              15.12 |              15.58 |              16.00 |              19.75 |
 *| MASK_WIDTH =   7 |              16.00 |              24.01 |              25.00 |              25.91 |              34.76 |
 *| MASK_WIDTH =   9 |              20.25 |              32.80 |              34.45 |              36.00 |              51.84 |
 *| MASK_WIDTH =  11 |              23.90 |              41.17 |              43.56 |              45.82 |              70.24 |
 *| MASK_WIDTH =  13 |              27.04 |              49.00 |              52.16 |              55.18 |              89.38 |
 * -----------------------------------------------------------------------------------------------------------------------------
 *
 *
 * Desta maneria, para saber o total de Bandwidth Reduction na imagem, precisamos saber o número de blocos gerados para
 * uma dada entrada. Por exempĺo, para a entrada arq3.ppm que tem dimensões 3840x2160 (2160 linhas e 3840 colunas),
 * utilizando um bloco de 16x16, temos ceil(3840/16) = 240 blocos para cada linha e ceil(2160/16) = 135 blocos em cada
 * coluna. Portanto o número total de blocos é de 240*135 = 32400. Multiplicando esse valor em cada célula da tabela acima
 * obtemos
 *
 *-----------------------------------------------------------------------------------------------------------------------------
 *|                  | BLOCK_SIZE =  8x8  | BLOCK_SIZE = 14x14 | BLOCK_SIZE = 15x15 | BLOCK_SIZE = 16x16 | BLOCK_SIZE = 32x32 |
 *|------------------|--------------------|--------------------|--------------------|--------------------|--------------------|
 *| MASK_WIDTH =   5 |              359964|              489888|              504792|              518400|              639900|
 *| MASK_WIDTH =   7 |              518400|              777924|              810000|              839484|             1126224|
 *| MASK_WIDTH =   9 |              656100|             1062720|             1116180|             1166400|             1679616|
 *| MASK_WIDTH =  11 |              774360|             1333908|             1411344|             1484568|            2275776 |
 *| MASK_WIDTH =  13 |              876096|             1587600|             1689984|             1787832|            2895912 |
 * -----------------------------------------------------------------------------------------------------------------------------
 *
 *
 *
 * Conclusão: da maneira que eu implementei o meu smooth, o Bandwidth Reduction é proporcional ao tamanho
 * da máscara e ao tamanho do bloco. Abaixo esta os tempos e os speeds ups obtidos para cada uma das imagens considerando um bloco de
 * 16x16 e uma máscara de 5x5.
 *
 *
 *Abaxo segue as medicoes e speed ups obtidos
 * ---------------------------------------------------------------------------------------------------------
 * |Entrada  |CPU_Serial (ms)  |GPU_SharedMemory (ms)  |GPU_NoSharedMemory (ms)  |Speedup(CPU/GPUSM)       |
 * ---------------------------------------------------------------------------------------------------------
 * |arq1.ppm |160.054          | 0.416                 |1.096                    |384.74                   |
 * |arq2.ppm |361.446          | 0.878                 |2.421                    |411.67                   |
 * |arq3.ppm |1420.776         | 3.310                 |9.533                    |429.24                   |
 * ---------------------------------------------------------------------------------------------------------
 *
 * A tabela abaixo foi o tempo em ms (milisegundos) obtidos para a ar3.ppm (apenas), variando o tamanho do bloco
 * e o tamanho da máscara.
 *
 * ------------------------------------------------------------------------------------------------------
 * |             |BLOCK_SIZE=8x8   |BLOCK_SIZE=14x14|BLOCK_SIZE=15x15|BLOCK_SIZE=16x16|BLOCK_SIZE=32x32 |
 * ------------------------------------------------------------------------------------------------------
 * |MASK_WIDTH=5 |      5.734      |     3.954       |     3.816     |    3.310       |   3.517         |
 * |MASK_WIDTH=7 |      8.806      |     7.194       |     7.263     |    5.125       |   5.067         |
 * |MASK_WIDTH=9 |      11.150     |     11.454      |     11.151    |    7.371       |   7.014         |
 * |MASK_WIDTH=11|      18.258     |     16.342      |     15.701    |   10.347       |   9.673         |
 * |MASK_WIDTH=13|      25.179     |     21.975      |     21.018    |   18.684       |   12.710        |
 * ------------------------------------------------------------------------------------------------------
 *
 * Conclusao: O tamanho da mascara para computar o valor do pixel afeta consideravelmente o tempo de execução do
 * programa.
 *
 * */

	.text
	.file	"smooth.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7rtclockv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv,@function
_Z7rtclockv:                            # @_Z7rtclockv
	.cfi_startproc
# %bb.0:
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rsp, %rdi
	leaq	16(%rsp), %rsi
	callq	gettimeofday
	testl	%eax, %eax
	je	.LBB0_2
# %bb.1:
	movl	$.L.str, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB0_2:
	cvtsi2sdq	(%rsp), %xmm1
	cvtsi2sdq	8(%rsp), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7rtclockv, .Lfunc_end0-_Z7rtclockv
	.cfi_endproc
                                        # -- End function
	.globl	_Z8writePPMP8PPMImage           # -- Begin function _Z8writePPMP8PPMImage
	.type	_Z8writePPMP8PPMImage,@function
_Z8writePPMP8PPMImage:                  # @_Z8writePPMP8PPMImage
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	stdout(%rip), %rcx
	movl	$.L.str.1, %edi
	movl	$3, %esi
	movl	$1, %edx
	callq	fwrite
	movq	stdout(%rip), %rdi
	movl	$.L.str.2, %esi
	movl	$.L.str.3, %edx
	xorl	%eax, %eax
	callq	fprintf
	movq	stdout(%rip), %rdi
	movl	(%rbx), %edx
	movl	4(%rbx), %ecx
	movl	$.L.str.4, %esi
	xorl	%eax, %eax
	callq	fprintf
	movq	stdout(%rip), %rdi
	movl	$.L.str.5, %esi
	movl	$255, %edx
	xorl	%eax, %eax
	callq	fprintf
	movq	8(%rbx), %rdi
	movslq	(%rbx), %rax
	leaq	(%rax,%rax,2), %rsi
	movslq	4(%rbx), %rdx
	movq	stdout(%rip), %rcx
	callq	fwrite
	movq	stdout(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end1:
	.size	_Z8writePPMP8PPMImage, .Lfunc_end1-_Z8writePPMP8PPMImage
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__smooth_GPU_NoSMP8PPMPixelS0_PiS1_ # -- Begin function _Z30__device_stub__smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.type	_Z30__device_stub__smooth_GPU_NoSMP8PPMPixelS0_PiS1_,@function
_Z30__device_stub__smooth_GPU_NoSMP8PPMPixelS0_PiS1_: # @_Z30__device_stub__smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__smooth_GPU_NoSMP8PPMPixelS0_PiS1_, .Lfunc_end2-_Z30__device_stub__smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_ # -- Begin function _Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_
	.type	_Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_,@function
_Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_: # @_Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10smooth_GPUP8PPMPixelS0_PiS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_, .Lfunc_end3-_Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x3d800000                      # float 0.0625
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	cmpl	$2, %edi
	je	.LBB4_2
# %bb.1:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB4_2:
	movq	8(%rbx), %r14
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movl	$.L.str.8, %esi
	movq	%r14, %rdi
	callq	fopen
	testq	%rax, %rax
	je	.LBB4_18
# %bb.3:
	movq	%rax, %r15
	leaq	32(%rsp), %rdi
	movl	$16, %esi
	movq	%rax, %rdx
	callq	fgets
	testq	%rax, %rax
	je	.LBB4_19
# %bb.4:
	cmpb	$80, 32(%rsp)
	jne	.LBB4_20
# %bb.5:
	cmpb	$54, 33(%rsp)
	jne	.LBB4_20
# %bb.6:
	movl	$16, %edi
	callq	malloc
	testq	%rax, %rax
	je	.LBB4_21
# %bb.7:
	movq	%rax, %rbx
.LBB4_8:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_9 Depth 2
	movq	%r15, %rdi
	callq	getc
	cmpl	$35, %eax
	jne	.LBB4_10
.LBB4_9:                                # %.preheader44.i
                                        #   Parent Loop BB4_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r15, %rdi
	callq	getc
	cmpl	$10, %eax
	jne	.LBB4_9
	jmp	.LBB4_8
.LBB4_10:                               # %._crit_edge.i
	movl	%eax, %edi
	movq	%r15, %rsi
	callq	ungetc
	movq	%rbx, %rcx
	addq	$4, %rcx
	movl	$.L.str.12, %esi
	movq	%r15, %rdi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	cmpl	$2, %eax
	jne	.LBB4_24
# %bb.11:
	leaq	8(%rsp), %rdx
	movl	$.L.str.14, %esi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	cmpl	$1, %eax
	jne	.LBB4_25
# %bb.12:
	cmpl	$255, 8(%rsp)
	jne	.LBB4_26
.LBB4_13:                               # %.preheader.i
                                        # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	callq	fgetc
	cmpl	$10, %eax
	jne	.LBB4_13
# %bb.14:
	movslq	(%rbx), %rax
	movslq	4(%rbx), %r12
	leaq	(%rax,%rax,2), %r13
	movq	%r13, %rdi
	imulq	%r12, %rdi
	callq	malloc
	movq	%rax, 8(%rbx)
	movq	%rax, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movq	%r15, %rcx
	callq	fread
	movslq	4(%rbx), %rcx
	cmpq	%rcx, %rax
	jne	.LBB4_27
# %bb.15:                               # %_ZL7readPPMPKc.exit
	movq	%r15, %rdi
	callq	fclose
	movl	(%rbx), %ebp
	movl	4(%rbx), %r14d
	movl	%r14d, %eax
	imull	%ebp, %eax
	cltq
	leaq	(%rax,%rax,2), %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	leaq	80(%rsp), %r13
	movl	%ebp, (%r13)
	leaq	28(%rsp), %rax
	movl	%r14d, (%rax)
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	32(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %r14
	movl	$4, %esi
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	48(%rsp), %r12
	movl	$4, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	8(%rbx), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$4, %edx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$4, %edx
	leaq	28(%rsp), %r12
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2ssl	(%r13), %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r14
	xorps	%xmm0, %xmm0
	cvtsi2ssl	(%r12), %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rdi
	movl	%r14d, %eax
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_17
# %bb.16:
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rcx
	callq	_Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_
.LBB4_17:
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	84(%rsp), %r12
	movl	$0, (%r12)
	movq	64(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rsi
	movq	72(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rbx), %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_18:
	.cfi_def_cfa_offset 144
	movq	stderr(%rip), %rdi
	movl	$.L.str.9, %esi
	jmp	.LBB4_28
.LBB4_19:
	movq	%r14, %rdi
	callq	perror
	jmp	.LBB4_23
.LBB4_20:
	movq	stderr(%rip), %rcx
	movl	$.L.str.10, %edi
	movl	$36, %esi
	jmp	.LBB4_22
.LBB4_21:
	movq	stderr(%rip), %rcx
	movl	$.L.str.11, %edi
	movl	$26, %esi
.LBB4_22:
	movl	$1, %edx
	callq	fwrite
	jmp	.LBB4_23
.LBB4_24:
	movq	stderr(%rip), %rdi
	movl	$.L.str.13, %esi
	jmp	.LBB4_28
.LBB4_25:
	movq	stderr(%rip), %rdi
	movl	$.L.str.15, %esi
	jmp	.LBB4_28
.LBB4_26:
	movq	stderr(%rip), %rdi
	movl	$.L.str.16, %esi
	jmp	.LBB4_28
.LBB4_27:
	movq	stderr(%rip), %rdi
	movl	$.L.str.17, %esi
.LBB4_28:
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	fprintf
.LBB4_23:
	movl	$1, %edi
	callq	exit
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10smooth_GPUP8PPMPixelS0_PiS1_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error return from gettimeofday: %d"
	.size	.L.str, 35

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"P6\n"
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"# %s\n"
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Histogram_GPU"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d %d\n"
	.size	.L.str.4, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d\n"
	.size	.L.str.5, 4

	.type	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_,@object # @_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.section	.rodata,"a",@progbits
	.globl	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.p2align	3, 0x0
_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_:
	.quad	_Z30__device_stub__smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.size	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_, 8

	.type	_Z10smooth_GPUP8PPMPixelS0_PiS1_,@object # @_Z10smooth_GPUP8PPMPixelS0_PiS1_
	.globl	_Z10smooth_GPUP8PPMPixelS0_PiS1_
	.p2align	3, 0x0
_Z10smooth_GPUP8PPMPixelS0_PiS1_:
	.quad	_Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_
	.size	_Z10smooth_GPUP8PPMPixelS0_PiS1_, 8

	.type	.L.str.7,@object                # @.str.7
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.7:
	.asciz	"Tempo: %0.3f\n"
	.size	.L.str.7, 14

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"rb"
	.size	.L.str.8, 3

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Unable to open file '%s'\n"
	.size	.L.str.9, 26

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Invalid image format (must be 'P6')\n"
	.size	.L.str.10, 37

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Unable to allocate memory\n"
	.size	.L.str.11, 27

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"%d %d"
	.size	.L.str.12, 6

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Invalid image size (error loading '%s')\n"
	.size	.L.str.13, 41

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"%d"
	.size	.L.str.14, 3

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Invalid rgb component (error loading '%s')\n"
	.size	.L.str.15, 44

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"'%s' does not have 8-bits components\n"
	.size	.L.str.16, 38

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Error loading image '%s'\n"
	.size	.L.str.17, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_"
	.size	.L__unnamed_1, 38

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10smooth_GPUP8PPMPixelS0_PiS1_"
	.size	.L__unnamed_2, 33

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Too many or no one arguments supplied."
	.size	.Lstr, 39

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.addrsig_sym _Z25__device_stub__smooth_GPUP8PPMPixelS0_PiS1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.addrsig_sym _Z10smooth_GPUP8PPMPixelS0_PiS1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_ ; -- Begin function _Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.globl	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
	.p2align	8
	.type	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_,@function
_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_:  ; @_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x2c
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_load_b32 s10, s[10:11], 0x0
	s_lshr_b32 s1, s0, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s1, v[3:4]
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v1
	s_cbranch_execz .LBB0_11
; %bb.1:
	s_load_b32 s3, s[8:9], 0x0
	v_and_b32_e32 v0, 0x3ff, v0
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s14, s0, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.2:                                ; %.preheader.preheader
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v0, 2, v1
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v5, 2, v2
	s_mov_b32 s8, -2
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v6, s3, v0
	v_mov_b32_e32 v0, 0
.LBB0_3:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_subrev_nc_u32_e32 v8, s8, v1
	v_mov_b32_e32 v7, -5
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_lt_i32_e64 s0, -1, v8
	v_cmp_gt_i32_e64 s1, s10, v8
	v_mov_b32_e32 v8, v5
.LBB0_4:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_3)
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB0_8
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v8
	v_cmp_gt_i32_e64 s2, s3, v8
	s_and_b32 s11, s1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s11, s11, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v11, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_i64_i32 v[9:10], null, v11, 3, s[4:5]
	s_clause 0x1
	global_load_u16 v11, v[9:10], off
	global_load_u8 v9, v[9:10], off offset:2
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, 0xff, v11
	v_lshrrev_b32_e32 v11, 8, v11
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, v4, v10
	v_add_nc_u32_e32 v3, v3, v11
.LBB0_7:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_8:                                ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_add_co_u32 v7, s2, v7, 1
	v_add_nc_u32_e32 v8, -1, v8
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_4
; %bb.9:                                ;   in Loop: Header=BB0_3 Depth=1
	v_subrev_nc_u32_e32 v6, s3, v6
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, 3
	s_cbranch_scc1 .LBB0_3
; %bb.10:
	v_mul_hi_i32 v4, 0x51eb851f, v4
	v_mul_hi_i32 v3, 0x51eb851f, v3
	v_mul_hi_i32 v0, 0x51eb851f, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v5, 31, v4
	v_lshrrev_b32_e32 v6, 31, v3
	v_lshrrev_b32_e32 v7, 3, v3
	v_lshrrev_b32_e32 v8, 3, v4
	v_mad_u64_u32 v[3:4], null, s3, v1, v[2:3]
	v_lshrrev_b32_e32 v4, 31, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v1, v7, v6
	v_add_nc_u32_e32 v2, v8, v5
	v_lshrrev_b32_e32 v5, 3, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b16 v6, 8, v1
	v_and_b32_e32 v2, 0xff, v2
	v_mad_i64_i32 v[0:1], null, v3, 3, s[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v3, v5, v4
	v_or_b32_e32 v2, v2, v6
	s_clause 0x1
	global_store_b8 v[0:1], v3, off offset:2
	global_store_b16 v[0:1], v2, off
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_, .Lfunc_end0-_Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 536
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10smooth_GPUP8PPMPixelS0_PiS1_ ; -- Begin function _Z10smooth_GPUP8PPMPixelS0_PiS1_
	.globl	_Z10smooth_GPUP8PPMPixelS0_PiS1_
	.p2align	8
	.type	_Z10smooth_GPUP8PPMPixelS0_PiS1_,@function
_Z10smooth_GPUP8PPMPixelS0_PiS1_:       ; @_Z10smooth_GPUP8PPMPixelS0_PiS1_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s10, s2, 16
	s_and_b32 s9, s2, 0xffff
	s_load_b256 s[0:7], s[0:1], 0x0
	s_mul_i32 s8, s10, s9
	s_mul_i32 s15, s15, s10
	v_cvt_f32_u32_e32 v1, s8
	s_mul_i32 s14, s14, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v2, null, v1, v1, 0x43c80000
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v2, v3, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v4, v3
	v_div_scale_f32 v4, vcc_lo, 0x43c80000, v1, 0x43c80000
	v_mul_f32_e32 v5, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v2, v5, v4
	v_fmac_f32_e32 v5, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v2, v5, v4
	v_div_fmas_f32 v2, v2, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v1, v2, v1, 0x43c80000
	v_and_b32_e32 v2, 0x3ff, v0
	v_ceil_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v3, v1
	v_bfe_u32 v1, v0, 10, 10
	v_cmp_gt_i32_e32 vcc_lo, 1, v3
	s_cbranch_vccnz .LBB1_13
; %bb.1:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v4, v1, s9, v2
	v_mov_b32_e32 v5, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, -6
	s_addc_u32 s1, s1, -1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr7
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e32 0x190, v4
	s_cbranch_execz .LBB1_12
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mul_hi_i32 v0, 0x66666667, v4
	s_mov_b32 s12, 0
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v8, 31, v0
	v_ashrrev_i32_e32 v0, 3, v0
	v_add_nc_u32_e32 v8, v0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v0, v8, 20
	v_add_nc_u32_e32 v10, s15, v8
	v_sub_nc_u32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, s14, v0
	v_min_i32_e32 v11, v10, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e64 s10, 2, v11
	v_cmpx_lt_i32_e32 1, v11
	s_cbranch_execz .LBB1_7
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_load_b32 s12, s[4:5], 0x0
	v_add_nc_u32_e32 v7, -2, v9
	s_mov_b32 s16, 0
	s_mov_b32 s17, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_le_i32_e64 s13, s12, v7
	v_cmpx_gt_i32_e64 s12, v7
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	s_load_b32 s18, s[6:7], 0x0
	v_add_nc_u32_e32 v6, -2, v10
	s_and_not1_b32 s13, s13, exec_lo
	s_mov_b32 s16, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s18, v6
	s_and_b32 s18, vcc_lo, exec_lo
	s_or_b32 s13, s13, s18
.LBB1_6:                                ; %Flow145
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	v_mov_b32_e32 v7, s12
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s13, s13, exec_lo
	s_and_b32 s12, s16, exec_lo
	s_or_b32 s10, s10, s13
.LBB1_7:                                ; %Flow144
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_lshl_add_u32 v0, v0, 1, v0
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB1_9
; %bb.8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v8, 60, v[0:1]
	s_and_not1_b32 s12, s12, exec_lo
	ds_store_b8 v10, v5 offset:2
	ds_store_b8 v10, v5 offset:1
	ds_store_b8 v10, v5
.LBB1_9:                                ; %Flow146
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_and_saveexec_b32 s10, s12
	s_cbranch_execz .LBB1_11
; %bb.10:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mul_lo_u32 v10, v7, v6
	v_ashrrev_i32_e32 v11, 31, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v10, v9
	v_ashrrev_i32_e32 v12, 31, v10
	v_mad_u64_u32 v[9:10], null, v13, 3, s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, v12, v11, vcc_lo
	v_mad_i32_i24 v10, v11, 3, v10
	s_clause 0x1
	global_load_u8 v11, v[9:10], off offset:2
	global_load_u16 v12, v[9:10], off
	v_mad_u64_u32 v[9:10], null, v8, 60, v[0:1]
	s_waitcnt vmcnt(1)
	ds_store_b8 v9, v11 offset:2
	s_waitcnt vmcnt(0)
	ds_store_b16 v9, v12
.LBB1_11:                               ; %Flow147
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
.LBB1_12:                               ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v3, -1, v3
	v_add_nc_u32_e32 v4, s8, v4
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	s_cbranch_vccnz .LBB1_2
.LBB1_13:                               ; %._crit_edge
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_load_b32 s0, s[4:5], 0x0
	s_load_b32 s1, s[6:7], 0x0
	v_add_nc_u32_e32 v3, s15, v1
	v_add_nc_u32_e32 v0, s14, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s1, v4
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB1_19
; %bb.14:                               ; %.preheader96
	v_mul_u32_u24_e32 v6, 3, v2
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, 4, v1
	v_mov_b32_e32 v4, 0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_mad_u32_u24 v7, v1, 60, v6
	v_mov_b32_e32 v6, 0
.LBB1_15:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_16 Depth 2
	s_mov_b32 s4, 0
.LBB1_16:                               ;   Parent Loop BB1_15 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v8, s4, v7
	s_add_i32 s4, s4, 3
	ds_load_u8 v9, v8
	ds_load_u8 v10, v8 offset:1
	ds_load_u8 v8, v8 offset:2
	s_cmp_lg_u32 s4, 15
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v6, v6, v9
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v4, v4, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v2, v8
	s_cbranch_scc1 .LBB1_16
; %bb.17:                               ;   in Loop: Header=BB1_15 Depth=1
	v_add_nc_u32_e32 v8, 1, v1
	v_cmp_eq_u32_e32 vcc_lo, v1, v5
	v_add_nc_u32_e32 v7, 60, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v1, v8
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_15
; %bb.18:
	s_or_b32 exec_lo, exec_lo, s1
	v_mul_hi_i32 v1, 0x51eb851f, v6
	v_mul_hi_i32 v4, 0x51eb851f, v4
	v_mul_hi_i32 v5, 0x51eb851f, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v6, 31, v1
	v_lshrrev_b32_e32 v7, 31, v4
	v_lshrrev_b32_e32 v4, 3, v4
	v_lshrrev_b32_e32 v8, 3, v1
	v_mad_u64_u32 v[1:2], null, s0, v3, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, v4, v7
	v_add_nc_u32_e32 v2, v8, v6
	v_lshrrev_b32_e32 v4, 31, v5
	v_lshrrev_b32_e32 v5, 3, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b16 v0, 8, v0
	v_and_b32_e32 v6, 0xff, v2
	v_mad_i64_i32 v[2:3], null, v1, 3, s[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v1, v5, v4
	v_or_b32_e32 v0, v6, v0
	s_clause 0x1
	global_store_b8 v[2:3], v1, off offset:2
	global_store_b16 v[2:3], v0, off
.LBB1_19:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10smooth_GPUP8PPMPixelS0_PiS1_
		.amdhsa_group_segment_fixed_size 1200
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10smooth_GPUP8PPMPixelS0_PiS1_, .Lfunc_end1-_Z10smooth_GPUP8PPMPixelS0_PiS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1020
; NumSgprs: 21
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1200 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15smooth_GPU_NoSMP8PPMPixelS0_PiS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1200
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10smooth_GPUP8PPMPixelS0_PiS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z10smooth_GPUP8PPMPixelS0_PiS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
