#include <stdlib.h>
#include <stdio.h>
#include <cuda_runtime.h>

#define NUM_ROWS 10000
#define NUM_COLS 1000

int a[NUM_ROWS][NUM_COLS];
int b[NUM_ROWS][NUM_COLS];
int c[NUM_ROWS][NUM_COLS];

__global__ void add(int *a, int *b, int *c)
{
    int tx = threadIdx.x;
    int ty = blockDim.x * threadIdx.y;
    int bx = blockDim.x * blockDim.y * blockIdx.x;
    int by = gridDim.x * (blockDim.x * blockDim.y) * blockIdx.y;
    int tid = bx + by + tx + ty;
    while (tid < NUM_ROWS * NUM_COLS) {
        c[tid] = a[tid] + b[tid];
        tid = tid + gridDim.x * gridDim.y * blockDim.x * blockDim.y;
    }
}

int main()
{
    int *dev_a, *dev_b, *dev_c;
    int size = NUM_ROWS * NUM_COLS * sizeof(int);
    cudaError_t cuError = cudaSuccess ;

    float elapsedTime;
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    for(int i = 0; i < NUM_ROWS; i++)
    {
        for(int j = 0; j < NUM_COLS; j++)
        {
            a[i][j] = rand() % size + 1;
            b[i][j] = rand() % size + 1;
        }
    }
    if (cudaMalloc((void **)&dev_a, size) != cudaSuccess) return 1;
    if (cudaMalloc((void **)&dev_b, size) != cudaSuccess) return 1;
    if (cudaMalloc((void **)&dev_c, size) != cudaSuccess) return 1;
    if (cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice) != cudaSuccess) return 1;
    if (cudaMemcpy(dev_b, b, size, cudaMemcpyHostToDevice) != cudaSuccess) return 1;
    
    int per_threads_x = 32;
    int per_threads_y = 32;
    int per_blocks_x = NUM_ROWS / 32;
    int per_blocks_y = NUM_COLS / 32;
    printf("%d %d\n", per_blocks_x, per_blocks_y);

    dim3 dimBlock (per_threads_x, per_threads_y, 1);
    dim3 dimGrid (per_blocks_x, per_blocks_y, 1);

    cudaEventRecord(start, 0);
    add<<<dimGrid, dimBlock>>>(dev_a, dev_b, dev_c);
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);

    cudaEventElapsedTime(&elapsedTime, start, stop);
    printf("GPU time: %13f msec\n", elapsedTime);

    if (cudaGetLastError() != cudaSuccess)
    {
        printf ("Failed in kernel launch and reason is %s\n", cudaGetErrorString(cuError)) ;
        return 1 ;
    }
    if (cudaMemcpy(c, dev_c, size, cudaMemcpyDeviceToHost) != cudaSuccess) return 1 ;

    bool success = true;
    for (int i = 0; i < NUM_ROWS; i++)
    {
        for (int j = 0; j < NUM_COLS; j++)
        {
            if ((a[i][j] + b[i][j]) != c[i][j])
            {
                success = false;
                break;
            }

        }
    }
    if (success)
        printf("We did it!\n");
    else
        printf("Failed\n");

    cudaFree(dev_a);
    cudaFree(dev_b);
    cudaFree(dev_c);

    cudaEventDestroy(start);
    cudaEventDestroy(stop);

    return 0;
}
	.file	"tmpxft_00269236_00000000-6_cuda6.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z26__device_stub__Z3addPiS_S_PiS_S_
	.type	_Z26__device_stub__Z3addPiS_S_PiS_S_, @function
_Z26__device_stub__Z3addPiS_S_PiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3addPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z26__device_stub__Z3addPiS_S_PiS_S_, .-_Z26__device_stub__Z3addPiS_S_PiS_S_
	.globl	_Z3addPiS_S_
	.type	_Z3addPiS_S_, @function
_Z3addPiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3addPiS_S_PiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z3addPiS_S_, .-_Z3addPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d %d\n"
.LC1:
	.string	"GPU time: %13f msec\n"
.LC2:
	.string	"Failed in kernel launch and reason is %s\n"
.LC3:
	.string	"We did it!\n"
.LC4:
	.string	"Failed\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	a(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
.L9:
	movq	%rbp, %rbx
	movl	$1000, %r15d
.L10:
	call	rand@PLT
	movl	$40000000, %r14d
	leaq	b(%rip), %r13
	cltd
	idivl	%r14d
	incl	%edx
	movl	%edx, (%r12,%rbx)
	call	rand@PLT
	cltd
	idivl	%r14d
	incl	%edx
	movl	%edx, 0(%r13,%rbx)
	addq	$4, %rbx
	decl	%r15d
	jne	.L10
	addq	$4000, %rbp
	cmpq	$40000000, %rbp
	jne	.L9
	leaq	8(%rsp), %rdi
	movl	$40000000, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L13
	leaq	16(%rsp), %rdi
	movl	$40000000, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L13
	leaq	24(%rsp), %rdi
	movl	$40000000, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L13
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$40000000, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	jne	.L13
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$40000000, %edx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	jne	.L13
	movl	$31, %ecx
	movl	$312, %edx
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	movabsq	$137438953504, %rax
	movq	%rax, 48(%rsp)
	movabsq	$133143986488, %rax
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	cudaEventRecord@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z26__device_stub__Z3addPiS_S_PiS_S_
.L15:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L16
	xorl	%edi, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L13:
	movl	$1, %eax
	jmp	.L8
.L16:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$40000000, %edx
	leaq	c(%rip), %rbx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	jne	.L13
	xorl	%edx, %edx
	movb	$1, %dil
.L18:
	movq	%rdx, %rax
	movl	$1000, %ecx
.L20:
	movl	0(%r13,%rax), %esi
	addl	(%r12,%rax), %esi
	cmpl	(%rbx,%rax), %esi
	jne	.L25
	addq	$4, %rax
	decl	%ecx
	jne	.L20
	jmp	.L19
.L25:
	xorl	%edi, %edi
.L19:
	addq	$4000, %rdx
	cmpq	$40000000, %rdx
	jne	.L18
	leaq	.LC3(%rip), %rsi
	testb	%dil, %dil
	jne	.L29
	leaq	.LC4(%rip), %rsi
.L29:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	xorl	%eax, %eax
.L8:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z3addPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3addPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	c
	.bss
	.align 32
	.type	c, @object
	.size	c, 40000000
c:
	.zero	40000000
	.globl	b
	.align 32
	.type	b, @object
	.size	b, 40000000
b:
	.zero	40000000
	.globl	a
	.align 32
	.type	a, @object
	.size	a, 40000000
a:
	.zero	40000000
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdlib.h>
#include <stdio.h>
#include <hip/hip_runtime.h>

#define NUM_ROWS 10000
#define NUM_COLS 1000

int a[NUM_ROWS][NUM_COLS];
int b[NUM_ROWS][NUM_COLS];
int c[NUM_ROWS][NUM_COLS];

__global__ void add(int *a, int *b, int *c)
{
    int tx = threadIdx.x;
    int ty = blockDim.x * threadIdx.y;
    int bx = blockDim.x * blockDim.y * blockIdx.x;
    int by = gridDim.x * (blockDim.x * blockDim.y) * blockIdx.y;
    int tid = bx + by + tx + ty;
    while (tid < NUM_ROWS * NUM_COLS) {
        c[tid] = a[tid] + b[tid];
        tid = tid + gridDim.x * gridDim.y * blockDim.x * blockDim.y;
    }
}

int main()
{
    int *dev_a, *dev_b, *dev_c;
    int size = NUM_ROWS * NUM_COLS * sizeof(int);
    hipError_t cuError = hipSuccess ;

    float elapsedTime;
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    for(int i = 0; i < NUM_ROWS; i++)
    {
        for(int j = 0; j < NUM_COLS; j++)
        {
            a[i][j] = rand() % size + 1;
            b[i][j] = rand() % size + 1;
        }
    }
    if (hipMalloc((void **)&dev_a, size) != hipSuccess) return 1;
    if (hipMalloc((void **)&dev_b, size) != hipSuccess) return 1;
    if (hipMalloc((void **)&dev_c, size) != hipSuccess) return 1;
    if (hipMemcpy(dev_a, a, size, hipMemcpyHostToDevice) != hipSuccess) return 1;
    if (hipMemcpy(dev_b, b, size, hipMemcpyHostToDevice) != hipSuccess) return 1;
    
    int per_threads_x = 32;
    int per_threads_y = 32;
    int per_blocks_x = NUM_ROWS / 32;
    int per_blocks_y = NUM_COLS / 32;
    printf("%d %d\n", per_blocks_x, per_blocks_y);

    dim3 dimBlock (per_threads_x, per_threads_y, 1);
    dim3 dimGrid (per_blocks_x, per_blocks_y, 1);

    hipEventRecord(start, 0);
    add<<<dimGrid, dimBlock>>>(dev_a, dev_b, dev_c);
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);

    hipEventElapsedTime(&elapsedTime, start, stop);
    printf("GPU time: %13f msec\n", elapsedTime);

    if (hipGetLastError() != hipSuccess)
    {
        printf ("Failed in kernel launch and reason is %s\n", hipGetErrorString(cuError)) ;
        return 1 ;
    }
    if (hipMemcpy(c, dev_c, size, hipMemcpyDeviceToHost) != hipSuccess) return 1 ;

    bool success = true;
    for (int i = 0; i < NUM_ROWS; i++)
    {
        for (int j = 0; j < NUM_COLS; j++)
        {
            if ((a[i][j] + b[i][j]) != c[i][j])
            {
                success = false;
                break;
            }

        }
    }
    if (success)
        printf("We did it!\n");
    else
        printf("Failed\n");

    hipFree(dev_a);
    hipFree(dev_b);
    hipFree(dev_c);

    hipEventDestroy(start);
    hipEventDestroy(stop);

    return 0;
}
	.text
	.file	"cuda6.hip"
	.globl	_Z18__device_stub__addPiS_S_    # -- Begin function _Z18__device_stub__addPiS_S_
	.type	_Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_:           # @_Z18__device_stub__addPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addPiS_S_, .Lfunc_end0-_Z18__device_stub__addPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB1_1:                                # %.preheader60
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	movq	$-4000, %r15                    # imm = 0xF060
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1801439851, %rax, %rcx         # imm = 0x6B5FCA6B
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$56, %rcx
	addl	%edx, %ecx
	imull	$40000000, %ecx, %ecx           # imm = 0x2625A00
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movl	%eax, a+4000(%rbx,%r15)
	callq	rand
	cltq
	imulq	$1801439851, %rax, %rcx         # imm = 0x6B5FCA6B
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$56, %rcx
	addl	%edx, %ecx
	imull	$40000000, %ecx, %ecx           # imm = 0x2625A00
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movl	%eax, b+4000(%rbx,%r15)
	addq	$4, %r15
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r14
	addq	$4000, %rbx                     # imm = 0xFA0
	cmpq	$10000, %r14                    # imm = 0x2710
	jne	.LBB1_1
# %bb.4:
	leaq	32(%rsp), %rdi
	movl	$40000000, %esi                 # imm = 0x2625A00
	callq	hipMalloc
	movl	$1, %ebx
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.5:
	leaq	24(%rsp), %rdi
	movl	$40000000, %esi                 # imm = 0x2625A00
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.6:
	leaq	16(%rsp), %rdi
	movl	$40000000, %esi                 # imm = 0x2625A00
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.7:
	movq	32(%rsp), %rdi
	movl	$1, %ebx
	movl	$a, %esi
	movl	$40000000, %edx                 # imm = 0x2625A00
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.8:
	movq	24(%rsp), %rdi
	movl	$1, %ebx
	movl	$b, %esi
	movl	$40000000, %edx                 # imm = 0x2625A00
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.9:
	movl	$.L.str, %edi
	movl	$312, %esi                      # imm = 0x138
	movl	$31, %edx
	xorl	%eax, %eax
	callq	printf
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$133143986488, %rdi             # imm = 0x1F00000138
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z18__device_stub__addPiS_S_
.LBB1_11:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	44(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_13
# %bb.12:
	xorl	%edi, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %ebx
	jmp	.LBB1_21
.LBB1_13:
	movq	16(%rsp), %rsi
	movl	$c, %edi
	movl	$40000000, %edx                 # imm = 0x2625A00
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$1, %ebx
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.14:                               # %.preheader.preheader
	movb	$1, %al
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB1_15:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_17 Depth 2
	movq	$-4000, %rsi                    # imm = 0xF060
.LBB1_17:                               #   Parent Loop BB1_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	b+4000(%rcx,%rsi), %edi
	addl	a+4000(%rcx,%rsi), %edi
	cmpl	c+4000(%rcx,%rsi), %edi
	jne	.LBB1_18
# %bb.16:                               #   in Loop: Header=BB1_17 Depth=2
	addq	$4, %rsi
	jne	.LBB1_17
	jmp	.LBB1_19
.LBB1_18:                               #   in Loop: Header=BB1_15 Depth=1
	xorl	%eax, %eax
.LBB1_19:                               #   in Loop: Header=BB1_15 Depth=1
	incq	%rdx
	addq	$4000, %rcx                     # imm = 0xFA0
	cmpq	$10000, %rdx                    # imm = 0x2710
	jne	.LBB1_15
# %bb.20:
	testb	$1, %al
	movl	$.Lstr, %eax
	movl	$.Lstr.1, %edi
	cmoveq	%rax, %rdi
	callq	puts@PLT
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	xorl	%ebx, %ebx
.LBB1_21:
	movl	%ebx, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	a,@object                       # @a
	.bss
	.globl	a
	.p2align	4, 0x0
a:
	.zero	40000000
	.size	a, 40000000

	.type	b,@object                       # @b
	.globl	b
	.p2align	4, 0x0
b:
	.zero	40000000
	.size	b, 40000000

	.type	c,@object                       # @c
	.globl	c
	.p2align	4, 0x0
c:
	.zero	40000000
	.size	c, 40000000

	.type	_Z3addPiS_S_,@object            # @_Z3addPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3addPiS_S_
	.p2align	3, 0x0
_Z3addPiS_S_:
	.quad	_Z18__device_stub__addPiS_S_
	.size	_Z3addPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d %d\n"
	.size	.L.str, 7

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"GPU time: %13f msec\n"
	.size	.L.str.1, 21

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed in kernel launch and reason is %s\n"
	.size	.L.str.2, 42

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPiS_S_"
	.size	.L__unnamed_1, 13

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Failed"
	.size	.Lstr, 7

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"We did it!"
	.size	.Lstr.1, 11

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym a
	.addrsig_sym b
	.addrsig_sym c
	.addrsig_sym _Z3addPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPiS_S_            ; -- Begin function _Z3addPiS_S_
	.globl	_Z3addPiS_S_
	.p2align	8
	.type	_Z3addPiS_S_,@function
_Z3addPiS_S_:                           ; @_Z3addPiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x18
	s_load_b32 s4, s[0:1], 0x24
	v_bfe_u32 v1, v0, 10, 10
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s5, s8, s15
	s_lshr_b32 s9, s4, 16
	s_add_i32 s5, s5, s14
	s_and_b32 s10, s4, 0xffff
	v_mad_u64_u32 v[2:3], null, s5, s9, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v2, s10, v[3:4]
	v_cmpx_gt_i32_e32 0x989680, v0
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s11, s[2:3], 0x4
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mul_i32 s0, s9, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s1, s0, s8
	s_mov_b32 s8, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s11
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_nc_u32_e32 v0, s1, v0
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, 0x98967f, v0
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[5:6], off
	v_add_co_u32 v1, s0, s2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s0, s3, v2, s0
	s_or_b32 s8, vcc_lo, s8
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPiS_S_, .Lfunc_end0-_Z3addPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 288
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
