#include <stdio.h>
#include <assert.h>
#include <sys/time.h>

/**
 * KERNEL cuAdd() - Takes 2 input arrays of same size N and adds them into C.
 * Locations are found by computing the global index of each thread.
 * @return 
 */
__global__ void cuAdd(int *a,int *b,int *c, int N)
{
	// 1D global index
    int offset = blockDim.x * blockIdx.x + threadIdx.x;
    if(offset < N)
    {
        c[offset] = a[offset] + b[offset];
    }
}

/**
 * KERNEL cuMult() - Takes two 2D matrices and multiplies them
 * @param a - 1st Matrix
 * @param b - 2nd Matrix
 * @param c - Result Matrix
 * @param wA - length of A and depth of B
 * @param wB - length of matrix B and C
 * @param hA - depth of matrix A and C
 */
__global__ void cuMult(float *a, float *b, float *c, int wA, int wB, int hA)
{
    // global index
    int gidx = blockDim.x * blockIdx.x + threadIdx.x;  // col
    int gidy = blockDim.y * blockIdx.y + threadIdx.y;  // row
    
    if(gidx < wB && gidy < hA)
    {
        float sum = 0.f;
        for(int k=0; k<wA; k++)
        {
            // Multiply row of A by column of B
            sum += a[gidy*wA + k] * b[k*wB +gidx];
        }
        c[gidy * wB + gidx] = sum;
    }
}

/**
 * KERNEL cuMultOpti() - Takes two 2D matrices and multiplies them optimally
 * @param a - 1st Matrix
 * @param b - 2nd Matrix
 * @param c - Result Matrix
 * @param wA - length of A and depth of B
 * @param wB - length of matrix B and C
 * @param hA - depth of matrix A and C
 */
__global__ void cuMultOpti(
        float *a,
        float *b,
        float *c,
        int wA,
        int wB,
        int hA)
{
#define blockTile 16
    /* Blocksize is 16x16 */
    /* Allocate shared memory */
    __shared__ float aBlock[blockTile][blockTile];
    __shared__ float bBlock[blockTile][blockTile];
    
    /* Calculate global index X, Y*/
    int gx = blockDim.x * blockIdx.x + threadIdx.x;  // column
    int gy = blockDim.y * blockIdx.y + threadIdx.y;   // row
    
    int bx = blockIdx.x;
    int by = blockIdx.y;

    int tx = threadIdx.x;
    int ty = threadIdx.y;

    /* Compute offset idx for A & B */
    // First A index (row shift) BlockRow*BlockWidth*Width-A
    int a0 = wA * 16 * by;
    // aBegin -> last element in row -> + width - 1
    int aZ = a0 + wA - 1;
    // Column block iteration = blockDim.x
    int aD = 16;
    // b_0 -> Column Shift
    int b0 = 16 * bx;
    // Row block iteration = blockDim.y * width B
    int bD = 16 * wB;

    float sum = 0.f;
    
    for(int aI = a0, bI = b0; aI <= aZ; aI += aD, bI += bD)
    {
        
        /* Assign shared memory and sync  */
        /* Warning, wA*gidy may be out of bounds */
        aBlock[ty][tx] = a[aI + ty*wA + tx];
        bBlock[ty][tx] = b[bI + ty*wB + tx];

        /* Make sure all of the threads have cached the memory */
        __syncthreads();
        
        /* Sum over NK */
        for(int k=0; k < 16; k++)
        {
            /* C = (A x B) */
            sum += aBlock[ty][k] * bBlock[k][tx];
        }
    }
    
    c[gy*wB + gx] = sum;
    //c[i * NJ + j] = ALPHA*sum + BETA*c[i * NJ + j];
}

/**
 * HOST h_MatrixMult_Naive() - Takes two 2D matrices and multiplies them naively
 * @param a wA.hA - 1st Matrix
 * @param b wB.wA - 2nd Matrix
 * @param c hA.wB - Result Matrix
 * @param wA - length of A and depth of B
 * @param wB - length of matrix B and C
 * @param hA - depth of matrix A and C
 */
void h_MatrixMult_Naive(
        float *a,
        float *b,
        float *c,
        int wA,
        int wB,
        int hA)
{
    // Iterate through all rows of a
    for(int i=0; i<hA; i++)
    {
        // Iterate through all columns of b
        for(int j=0; j<wB; j++)
        {
            // Calculate all of c[i][j] products
            int sum = 0;
            for(int k=0; k<wA; k++)
            {
                sum += a[i*wA + k] * b[k*wB + j];
            }
            assert(i*wB + j < hA*wB);
            // Index - row i of column j with column width of wB
            c[i * wB + j] = sum;
        }
    }
}

double microSeconds()
{
    struct timeval Tp;
    int stat;
    stat = gettimeofday(&Tp, NULL);
    if (stat != 0) printf("Error return from gettimeofday: %d",stat);
    return(Tp.tv_sec + Tp.tv_usec*1.0e-6);
}

/**
 * ENTRY main() - Tests <<<>>>cuMult() kernel: Initializes memory and data on
 * the host, then memory on the device. Copies the data from host to device,
 * executes kernel with memory device pointers, copies result back to host,
 * displays results for error checking and frees allocated memory.
 * @return 
 */
int main(int argc, char ** argv)
{
    int deviceCount;
    cudaGetDeviceCount(&deviceCount);
    int device;
    for (device = 0; device < deviceCount; ++device) {
        cudaDeviceProp deviceProp;
        cudaGetDeviceProperties(&deviceProp, device);
        printf("Device %d (%s) has compute capability %d.%d.\nWarp Size: %d",
               device, deviceProp.name, deviceProp.major, deviceProp.minor, deviceProp.warpSize);
    }

    return 0;
//    
//    // width A
//    int wA = 512;
//    // height A
//    int hA = 512;
//    
//    // width B
//    int wB = 512;
//    // height B
//    int hB = wA;
//    
//    // value A
//    float aValue = 1.0;
//    // value B
//    float bValue = 2.0;
//    
//    /* Fetch the test parameters */
//    if(argc < 6)
//    {
//        printf("Using default parameters: 320 640 320 1 2\n");
//    }
//    else
//    {
//        wA = atoi(argv[1]);
//        hA = atoi(argv[2]);
//        wB = atoi(argv[3]);
//        hB = wA;
//        aValue = atoi(argv[4]);
//        bValue = atoi(argv[5]);
//    }
//    /**
//     *  Neutral - both for host and device */
//    
//    int wC = wB;
//    int hC = hA;
//
//    size_t size_a = sizeof(float) * wA * hA;
//    size_t size_b = sizeof(float) * wB * hB;
//    size_t size_c = sizeof(float) * wC * hC;
//	
//    
//    // host 
//    float *a, *b, *c, *hh_c;
//    a = (float *) malloc(size_a);
//    b = (float *) malloc(size_b);
//    c = (float *) malloc(size_c);
//    /* Host test memory */
//    hh_c = (float *) malloc(size_c);
//    
//    assert(hh_c != NULL);
//    
//    /**
//     *  Device specific */
//    
//    // device
//    float *_a, *_b, *_c;
//    cudaMalloc( (void **) &_a, size_a );
//    cudaMalloc( (void **) &_b, size_b );
//    cudaMalloc( (void **) &_c, size_c );
//
//    /**
//     Neutral */
//    // initialize A
//    for(int i=0; i < hA * wA; i++)
//    {
//        a[i] = aValue;
//    }
//    
//    // initialize B
//    for(int i=0; i < hB * wB; i++)
//    {
//        b[i] = bValue;
//    }
//    
//    /**
//     Device*/
//    
//    // copy data to GPU
//    cudaMemcpy(_a, a, size_a, cudaMemcpyHostToDevice);
//    cudaMemcpy(_b, b, size_b, cudaMemcpyHostToDevice);
//
//    // x : col , y: row
//    dim3 blockSize(16,16);
//    // (N.x + blockSize.x - 1)/blockSize.x, (N.y + blockSize.y -1)/blockSize.y)
//    dim3 gridSize((wC+15)/16, (hC+15)/16);
//        
//    cudaError_t error;
//
//    cudaEvent_t start, stop;
//
//    ///////////////////////////////////////////////////
//    // OPTIMIZED
//    
//    error = cudaEventCreate(&start);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to create start event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    error = cudaEventCreate(&stop);
//
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to create stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    // Record the start event
//    error = cudaEventRecord(start, NULL);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to record start event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//
//    // kernel execution
//    cuMult<<< gridSize, blockSize >>>(_a, _b, _c, wA, wB, hA);
//
//    // Record the stop event
//    error = cudaEventRecord(stop, NULL);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to record stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    // Wait for the stop event to complete
//    error = cudaEventSynchronize(stop);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to synchronize on the stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    float sgemm_msec = 0.f;
//    error = cudaEventElapsedTime(&sgemm_msec, start, stop);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to get time elapsed between events (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//
//
//    // C := alpha*op( A )*op( B ) + beta*C
//    // GEMM performs 4 floating point operations for one data output
//    //double flops_sgemm = 4.0 * (double) NI * (double) NJ * (double) NK;
//
//    //double gigaFlops = (flops_sgemm * 1.0e-9f) / (sgemm_msec / 1000.f);
//
//    printf("%.4f\t", sgemm_msec);
////    printf("N_Time: %.3f\n, WorkgroupSize= %u threads/block\n",
////                    //gigaFlops,
////                    sgemm_msec,
////                    //flops_sgemm,
////                    blockSize.x * blockSize.y);
//    
//    
//    // copy data back to CPU
//    cudaMemcpy(c, _c, size_c, cudaMemcpyDeviceToHost);
//    
//    /////////////////////////////////////////////////
//    // OPTIMIZED
//    
//    error = cudaEventCreate(&start);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to create start event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    error = cudaEventCreate(&stop);
//
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to create stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    // Record the start event
//    error = cudaEventRecord(start, NULL);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to record start event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//
//    // kernel execution
//    cuMultOpti<<< gridSize, blockSize >>>(_a, _b, _c, wA, wB, hA);
//
//    // Record the stop event
//    error = cudaEventRecord(stop, NULL);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to record stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    // Wait for the stop event to complete
//    error = cudaEventSynchronize(stop);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to synchronize on the stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    sgemm_msec = 0.f;
//    error = cudaEventElapsedTime(&sgemm_msec, start, stop);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to get time elapsed between events (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//    
////    printf("O_Time: %.3f\nWorkgroupSize= %u threads/block\n",
////                    //gigaFlops,
////                    sgemm_msec,
////                    //flops_sgemm,
////                    blockSize.x * blockSize.y);
//    printf("%.4f\t", sgemm_msec);
//    
//    
//    
//    // copy data back to CPU
//    cudaMemcpy(c, _c, size_c, cudaMemcpyDeviceToHost);
//    
//    //////////////////////////////////////////////////
//    // HOST
//    
//    // compare with cpu results
//    /**
//     Host*/
//    double h_start, h_end;
//    h_start = microSeconds();
//    h_MatrixMult_Naive(a, b, hh_c, wA, wB, hA);
//    h_end = microSeconds();
//    
//    printf("%4.4f\t", (h_end - h_start) * 1000);
//    
//    // Check first and last memory location
//    //printf("Start: %d. Finish: %d.\n",c[2], c[wC * hC - 1]);
//    
//    /* Check */
////    // Naive check
////    int k = 0;
////    while(c[k] == c[k+1])
////        k++;
////    printf("EQ Test: Breakpoint @ %d\n",k);
//    
//    int fail = 0;
//    for( int k = 0; k< wB*hA; k++)
//    {
//        if(abs(c[k] - hh_c[k]) > 1e-5)
//            fail++;
//    }
//    printf("\nWorkgroup: %d Data: %d Failures: %d\n", blockSize.x*blockSize.y, wC, fail);
//
//    // release resources
//    cudaFree(_a);
//    cudaFree(_b);
//    cudaFree(_c);
//
//    free(a);
//    free(b);
//    free(c);
//    free(hh_c);
//
//    return 0;
}

	.file	"tmpxft_003630f7_00000000-6_MatrixMult.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z18h_MatrixMult_NaivePfS_S_iii
	.type	_Z18h_MatrixMult_NaivePfS_S_iii, @function
_Z18h_MatrixMult_NaivePfS_S_iii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%r8d, %rax
	movq	%rdx, %r10
	xorl	%r11d, %r11d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	salq	$2, %rax
	movl	%ecx, %edx
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	xorl	%esi, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	movq	%rdi, -8(%rsp)
	movq	%rax, %rdi
.L3:
	cmpl	%r9d, %ebx
	jge	.L2
	movslq	%r11d, %rax
	movq	-8(%rsp), %rcx
	leaq	(%r10,%rax,4), %r15
	movslq	%esi, %rax
	leaq	(%rcx,%rax,4), %r14
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %r8d
	jle	.L5
	leaq	0(%rbp,%rax,4), %r12
	xorl	%ecx, %ecx
	xorl	%r13d, %r13d
.L6:
	cvtsi2ssl	%r13d, %xmm1
	cmpl	%ecx, %edx
	jle	.L11
	movss	(%r14,%rcx,4), %xmm0
	mulss	(%r12), %xmm0
	incq	%rcx
	addq	%rdi, %r12
	addss	%xmm1, %xmm0
	cvttss2sil	%xmm0, %r13d
	jmp	.L6
.L11:
	movss	%xmm1, (%r15,%rax,4)
	incq	%rax
	jmp	.L8
.L5:
	incl	%ebx
	addl	%r8d, %r11d
	addl	%edx, %esi
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z18h_MatrixMult_NaivePfS_S_iii, .-_Z18h_MatrixMult_NaivePfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error return from gettimeofday: %d"
	.text
	.globl	_Z12microSecondsv
	.type	_Z12microSecondsv, @function
_Z12microSecondsv:
.LFB2028:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	testl	%eax, %eax
	je	.L13
	movl	%eax, %edx
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L13:
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z12microSecondsv, .-_Z12microSecondsv
	.section	.rodata.str1.1
.LC2:
	.string	"Device %d (%s) has compute capability %d.%d.\nWarp Size: %d"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC2(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	subq	$1056, %rsp
	.cfi_def_cfa_offset 1088
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
.L20:
	cmpl	%ebx, 12(%rsp)
	jle	.L24
	leaq	16(%rsp), %rbp
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	%ebx, %edx
	movq	%rbp, %rcx
	movq	%r12, %rsi
	pushq	%rax
	.cfi_def_cfa_offset 1096
	movl	332(%rsp), %eax
	movl	$2, %edi
	incl	%ebx
	pushq	%rax
	.cfi_def_cfa_offset 1104
	movl	396(%rsp), %r9d
	xorl	%eax, %eax
	movl	392(%rsp), %r8d
	call	__printf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 1096
	popq	%rcx
	.cfi_def_cfa_offset 1088
	jmp	.L20
.L24:
	movq	1048(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$1056, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.text
	.globl	_Z29__device_stub__Z5cuAddPiS_S_iPiS_S_i
	.type	_Z29__device_stub__Z5cuAddPiS_S_iPiS_S_i, @function
_Z29__device_stub__Z5cuAddPiS_S_iPiS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z5cuAddPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L25:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z29__device_stub__Z5cuAddPiS_S_iPiS_S_i, .-_Z29__device_stub__Z5cuAddPiS_S_iPiS_S_i
	.globl	_Z5cuAddPiS_S_i
	.type	_Z5cuAddPiS_S_i, @function
_Z5cuAddPiS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z5cuAddPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2055:
	.size	_Z5cuAddPiS_S_i, .-_Z5cuAddPiS_S_i
	.globl	_Z32__device_stub__Z6cuMultPfS_S_iiiPfS_S_iii
	.type	_Z32__device_stub__Z6cuMultPfS_S_iiiPfS_S_iii, @function
_Z32__device_stub__Z6cuMultPfS_S_iiiPfS_S_iii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6cuMultPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L30:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z32__device_stub__Z6cuMultPfS_S_iiiPfS_S_iii, .-_Z32__device_stub__Z6cuMultPfS_S_iiiPfS_S_iii
	.globl	_Z6cuMultPfS_S_iii
	.type	_Z6cuMultPfS_S_iii, @function
_Z6cuMultPfS_S_iii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z6cuMultPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2057:
	.size	_Z6cuMultPfS_S_iii, .-_Z6cuMultPfS_S_iii
	.globl	_Z37__device_stub__Z10cuMultOptiPfS_S_iiiPfS_S_iii
	.type	_Z37__device_stub__Z10cuMultOptiPfS_S_iiiPfS_S_iii, @function
_Z37__device_stub__Z10cuMultOptiPfS_S_iiiPfS_S_iii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10cuMultOptiPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L35:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z37__device_stub__Z10cuMultOptiPfS_S_iiiPfS_S_iii, .-_Z37__device_stub__Z10cuMultOptiPfS_S_iiiPfS_S_iii
	.globl	_Z10cuMultOptiPfS_S_iii
	.type	_Z10cuMultOptiPfS_S_iii, @function
_Z10cuMultOptiPfS_S_iii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z10cuMultOptiPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2059:
	.size	_Z10cuMultOptiPfS_S_iii, .-_Z10cuMultOptiPfS_S_iii
	.section	.rodata.str1.1
.LC3:
	.string	"_Z10cuMultOptiPfS_S_iii"
.LC4:
	.string	"_Z6cuMultPfS_S_iii"
.LC5:
	.string	"_Z5cuAddPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10cuMultOptiPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6cuMultPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5cuAddPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1598689907
	.long	1051772663
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>
#include <sys/time.h>

/**
 * KERNEL cuAdd() - Takes 2 input arrays of same size N and adds them into C.
 * Locations are found by computing the global index of each thread.
 * @return 
 */
__global__ void cuAdd(int *a,int *b,int *c, int N)
{
	// 1D global index
    int offset = blockDim.x * blockIdx.x + threadIdx.x;
    if(offset < N)
    {
        c[offset] = a[offset] + b[offset];
    }
}

/**
 * KERNEL cuMult() - Takes two 2D matrices and multiplies them
 * @param a - 1st Matrix
 * @param b - 2nd Matrix
 * @param c - Result Matrix
 * @param wA - length of A and depth of B
 * @param wB - length of matrix B and C
 * @param hA - depth of matrix A and C
 */
__global__ void cuMult(float *a, float *b, float *c, int wA, int wB, int hA)
{
    // global index
    int gidx = blockDim.x * blockIdx.x + threadIdx.x;  // col
    int gidy = blockDim.y * blockIdx.y + threadIdx.y;  // row
    
    if(gidx < wB && gidy < hA)
    {
        float sum = 0.f;
        for(int k=0; k<wA; k++)
        {
            // Multiply row of A by column of B
            sum += a[gidy*wA + k] * b[k*wB +gidx];
        }
        c[gidy * wB + gidx] = sum;
    }
}

/**
 * KERNEL cuMultOpti() - Takes two 2D matrices and multiplies them optimally
 * @param a - 1st Matrix
 * @param b - 2nd Matrix
 * @param c - Result Matrix
 * @param wA - length of A and depth of B
 * @param wB - length of matrix B and C
 * @param hA - depth of matrix A and C
 */
__global__ void cuMultOpti(
        float *a,
        float *b,
        float *c,
        int wA,
        int wB,
        int hA)
{
#define blockTile 16
    /* Blocksize is 16x16 */
    /* Allocate shared memory */
    __shared__ float aBlock[blockTile][blockTile];
    __shared__ float bBlock[blockTile][blockTile];
    
    /* Calculate global index X, Y*/
    int gx = blockDim.x * blockIdx.x + threadIdx.x;  // column
    int gy = blockDim.y * blockIdx.y + threadIdx.y;   // row
    
    int bx = blockIdx.x;
    int by = blockIdx.y;

    int tx = threadIdx.x;
    int ty = threadIdx.y;

    /* Compute offset idx for A & B */
    // First A index (row shift) BlockRow*BlockWidth*Width-A
    int a0 = wA * 16 * by;
    // aBegin -> last element in row -> + width - 1
    int aZ = a0 + wA - 1;
    // Column block iteration = blockDim.x
    int aD = 16;
    // b_0 -> Column Shift
    int b0 = 16 * bx;
    // Row block iteration = blockDim.y * width B
    int bD = 16 * wB;

    float sum = 0.f;
    
    for(int aI = a0, bI = b0; aI <= aZ; aI += aD, bI += bD)
    {
        
        /* Assign shared memory and sync  */
        /* Warning, wA*gidy may be out of bounds */
        aBlock[ty][tx] = a[aI + ty*wA + tx];
        bBlock[ty][tx] = b[bI + ty*wB + tx];

        /* Make sure all of the threads have cached the memory */
        __syncthreads();
        
        /* Sum over NK */
        for(int k=0; k < 16; k++)
        {
            /* C = (A x B) */
            sum += aBlock[ty][k] * bBlock[k][tx];
        }
    }
    
    c[gy*wB + gx] = sum;
    //c[i * NJ + j] = ALPHA*sum + BETA*c[i * NJ + j];
}

/**
 * HOST h_MatrixMult_Naive() - Takes two 2D matrices and multiplies them naively
 * @param a wA.hA - 1st Matrix
 * @param b wB.wA - 2nd Matrix
 * @param c hA.wB - Result Matrix
 * @param wA - length of A and depth of B
 * @param wB - length of matrix B and C
 * @param hA - depth of matrix A and C
 */
void h_MatrixMult_Naive(
        float *a,
        float *b,
        float *c,
        int wA,
        int wB,
        int hA)
{
    // Iterate through all rows of a
    for(int i=0; i<hA; i++)
    {
        // Iterate through all columns of b
        for(int j=0; j<wB; j++)
        {
            // Calculate all of c[i][j] products
            int sum = 0;
            for(int k=0; k<wA; k++)
            {
                sum += a[i*wA + k] * b[k*wB + j];
            }
            assert(i*wB + j < hA*wB);
            // Index - row i of column j with column width of wB
            c[i * wB + j] = sum;
        }
    }
}

double microSeconds()
{
    struct timeval Tp;
    int stat;
    stat = gettimeofday(&Tp, NULL);
    if (stat != 0) printf("Error return from gettimeofday: %d",stat);
    return(Tp.tv_sec + Tp.tv_usec*1.0e-6);
}

/**
 * ENTRY main() - Tests <<<>>>cuMult() kernel: Initializes memory and data on
 * the host, then memory on the device. Copies the data from host to device,
 * executes kernel with memory device pointers, copies result back to host,
 * displays results for error checking and frees allocated memory.
 * @return 
 */
int main(int argc, char ** argv)
{
    int deviceCount;
    hipGetDeviceCount(&deviceCount);
    int device;
    for (device = 0; device < deviceCount; ++device) {
        hipDeviceProp_t deviceProp;
        hipGetDeviceProperties(&deviceProp, device);
        printf("Device %d (%s) has compute capability %d.%d.\nWarp Size: %d",
               device, deviceProp.name, deviceProp.major, deviceProp.minor, deviceProp.warpSize);
    }

    return 0;
//    
//    // width A
//    int wA = 512;
//    // height A
//    int hA = 512;
//    
//    // width B
//    int wB = 512;
//    // height B
//    int hB = wA;
//    
//    // value A
//    float aValue = 1.0;
//    // value B
//    float bValue = 2.0;
//    
//    /* Fetch the test parameters */
//    if(argc < 6)
//    {
//        printf("Using default parameters: 320 640 320 1 2\n");
//    }
//    else
//    {
//        wA = atoi(argv[1]);
//        hA = atoi(argv[2]);
//        wB = atoi(argv[3]);
//        hB = wA;
//        aValue = atoi(argv[4]);
//        bValue = atoi(argv[5]);
//    }
//    /**
//     *  Neutral - both for host and device */
//    
//    int wC = wB;
//    int hC = hA;
//
//    size_t size_a = sizeof(float) * wA * hA;
//    size_t size_b = sizeof(float) * wB * hB;
//    size_t size_c = sizeof(float) * wC * hC;
//	
//    
//    // host 
//    float *a, *b, *c, *hh_c;
//    a = (float *) malloc(size_a);
//    b = (float *) malloc(size_b);
//    c = (float *) malloc(size_c);
//    /* Host test memory */
//    hh_c = (float *) malloc(size_c);
//    
//    assert(hh_c != NULL);
//    
//    /**
//     *  Device specific */
//    
//    // device
//    float *_a, *_b, *_c;
//    cudaMalloc( (void **) &_a, size_a );
//    cudaMalloc( (void **) &_b, size_b );
//    cudaMalloc( (void **) &_c, size_c );
//
//    /**
//     Neutral */
//    // initialize A
//    for(int i=0; i < hA * wA; i++)
//    {
//        a[i] = aValue;
//    }
//    
//    // initialize B
//    for(int i=0; i < hB * wB; i++)
//    {
//        b[i] = bValue;
//    }
//    
//    /**
//     Device*/
//    
//    // copy data to GPU
//    cudaMemcpy(_a, a, size_a, cudaMemcpyHostToDevice);
//    cudaMemcpy(_b, b, size_b, cudaMemcpyHostToDevice);
//
//    // x : col , y: row
//    dim3 blockSize(16,16);
//    // (N.x + blockSize.x - 1)/blockSize.x, (N.y + blockSize.y -1)/blockSize.y)
//    dim3 gridSize((wC+15)/16, (hC+15)/16);
//        
//    cudaError_t error;
//
//    cudaEvent_t start, stop;
//
//    ///////////////////////////////////////////////////
//    // OPTIMIZED
//    
//    error = cudaEventCreate(&start);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to create start event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    error = cudaEventCreate(&stop);
//
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to create stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    // Record the start event
//    error = cudaEventRecord(start, NULL);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to record start event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//
//    // kernel execution
//    cuMult<<< gridSize, blockSize >>>(_a, _b, _c, wA, wB, hA);
//
//    // Record the stop event
//    error = cudaEventRecord(stop, NULL);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to record stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    // Wait for the stop event to complete
//    error = cudaEventSynchronize(stop);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to synchronize on the stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    float sgemm_msec = 0.f;
//    error = cudaEventElapsedTime(&sgemm_msec, start, stop);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to get time elapsed between events (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//
//
//    // C := alpha*op( A )*op( B ) + beta*C
//    // GEMM performs 4 floating point operations for one data output
//    //double flops_sgemm = 4.0 * (double) NI * (double) NJ * (double) NK;
//
//    //double gigaFlops = (flops_sgemm * 1.0e-9f) / (sgemm_msec / 1000.f);
//
//    printf("%.4f\t", sgemm_msec);
////    printf("N_Time: %.3f\n, WorkgroupSize= %u threads/block\n",
////                    //gigaFlops,
////                    sgemm_msec,
////                    //flops_sgemm,
////                    blockSize.x * blockSize.y);
//    
//    
//    // copy data back to CPU
//    cudaMemcpy(c, _c, size_c, cudaMemcpyDeviceToHost);
//    
//    /////////////////////////////////////////////////
//    // OPTIMIZED
//    
//    error = cudaEventCreate(&start);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to create start event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    error = cudaEventCreate(&stop);
//
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to create stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    // Record the start event
//    error = cudaEventRecord(start, NULL);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to record start event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//
//    // kernel execution
//    cuMultOpti<<< gridSize, blockSize >>>(_a, _b, _c, wA, wB, hA);
//
//    // Record the stop event
//    error = cudaEventRecord(stop, NULL);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to record stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    // Wait for the stop event to complete
//    error = cudaEventSynchronize(stop);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to synchronize on the stop event (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//
//    sgemm_msec = 0.f;
//    error = cudaEventElapsedTime(&sgemm_msec, start, stop);
//    if (error != cudaSuccess)
//    {
//            fprintf(stderr, "Failed to get time elapsed between events (error code %s)!\n", 
//            cudaGetErrorString(error));
//            exit(EXIT_FAILURE);
//    }
//    
////    printf("O_Time: %.3f\nWorkgroupSize= %u threads/block\n",
////                    //gigaFlops,
////                    sgemm_msec,
////                    //flops_sgemm,
////                    blockSize.x * blockSize.y);
//    printf("%.4f\t", sgemm_msec);
//    
//    
//    
//    // copy data back to CPU
//    cudaMemcpy(c, _c, size_c, cudaMemcpyDeviceToHost);
//    
//    //////////////////////////////////////////////////
//    // HOST
//    
//    // compare with cpu results
//    /**
//     Host*/
//    double h_start, h_end;
//    h_start = microSeconds();
//    h_MatrixMult_Naive(a, b, hh_c, wA, wB, hA);
//    h_end = microSeconds();
//    
//    printf("%4.4f\t", (h_end - h_start) * 1000);
//    
//    // Check first and last memory location
//    //printf("Start: %d. Finish: %d.\n",c[2], c[wC * hC - 1]);
//    
//    /* Check */
////    // Naive check
////    int k = 0;
////    while(c[k] == c[k+1])
////        k++;
////    printf("EQ Test: Breakpoint @ %d\n",k);
//    
//    int fail = 0;
//    for( int k = 0; k< wB*hA; k++)
//    {
//        if(abs(c[k] - hh_c[k]) > 1e-5)
//            fail++;
//    }
//    printf("\nWorkgroup: %d Data: %d Failures: %d\n", blockSize.x*blockSize.y, wC, fail);
//
//    // release resources
//    cudaFree(_a);
//    cudaFree(_b);
//    cudaFree(_c);
//
//    free(a);
//    free(b);
//    free(c);
//    free(hh_c);
//
//    return 0;
}

	.text
	.file	"MatrixMult.hip"
	.globl	_Z20__device_stub__cuAddPiS_S_i # -- Begin function _Z20__device_stub__cuAddPiS_S_i
	.type	_Z20__device_stub__cuAddPiS_S_i,@function
_Z20__device_stub__cuAddPiS_S_i:        # @_Z20__device_stub__cuAddPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5cuAddPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z20__device_stub__cuAddPiS_S_i, .Lfunc_end0-_Z20__device_stub__cuAddPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__cuMultPfS_S_iii # -- Begin function _Z21__device_stub__cuMultPfS_S_iii
	.type	_Z21__device_stub__cuMultPfS_S_iii,@function
_Z21__device_stub__cuMultPfS_S_iii:     # @_Z21__device_stub__cuMultPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6cuMultPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__cuMultPfS_S_iii, .Lfunc_end1-_Z21__device_stub__cuMultPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__cuMultOptiPfS_S_iii # -- Begin function _Z25__device_stub__cuMultOptiPfS_S_iii
	.type	_Z25__device_stub__cuMultOptiPfS_S_iii,@function
_Z25__device_stub__cuMultOptiPfS_S_iii: # @_Z25__device_stub__cuMultOptiPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10cuMultOptiPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__cuMultOptiPfS_S_iii, .Lfunc_end2-_Z25__device_stub__cuMultOptiPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z18h_MatrixMult_NaivePfS_S_iii # -- Begin function _Z18h_MatrixMult_NaivePfS_S_iii
	.type	_Z18h_MatrixMult_NaivePfS_S_iii,@function
_Z18h_MatrixMult_NaivePfS_S_iii:        # @_Z18h_MatrixMult_NaivePfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	testl	%r9d, %r9d
	jle	.LBB3_7
# %bb.1:                                # %.preheader27.lr.ph
	movslq	%r8d, %rax
	movl	%r9d, %r9d
	movl	%eax, %r10d
	movl	%ecx, %r11d
	movq	%rax, -32(%rsp)                 # 8-byte Spill
	leaq	(,%rax,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB3_2:                                # %.preheader27
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
                                        #       Child Loop BB3_9 Depth 3
	testl	%r8d, %r8d
	jle	.LBB3_6
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rdx                 # 8-byte Reload
	leaq	(%rdx,%rax,4), %r12
	movq	%r15, %rax
	imulq	-32(%rsp), %rax                 # 8-byte Folded Reload
	movq	-8(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rax,4), %r13
	movq	-16(%rsp), %rsi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB3_4:                                # %.preheader
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_9 Depth 3
	testl	%ecx, %ecx
	jle	.LBB3_5
# %bb.8:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_4 Depth=2
	xorl	%edx, %edx
	movq	%rsi, %rbp
	xorl	%edi, %edi
.LBB3_9:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        #     Parent Loop BB3_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r12,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%edi, %xmm1
	addss	%xmm0, %xmm1
	cvttss2si	%xmm1, %edi
	incq	%rdx
	addq	%rbx, %rbp
	cmpq	%rdx, %r11
	jne	.LBB3_9
	jmp	.LBB3_10
.LBB3_5:                                #   in Loop: Header=BB3_4 Depth=2
	xorl	%edi, %edi
.LBB3_10:                               # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edi, %xmm0
	movss	%xmm0, (%r13,%rax,4)
	incq	%rax
	addq	$4, %rsi
	cmpq	%r10, %rax
	jne	.LBB3_4
.LBB3_6:                                # %._crit_edge31
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r15
	addl	%ecx, %r14d
	cmpq	%r9, %r15
	jne	.LBB3_2
.LBB3_7:                                # %._crit_edge33
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z18h_MatrixMult_NaivePfS_S_iii, .Lfunc_end3-_Z18h_MatrixMult_NaivePfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z12microSecondsv
.LCPI4_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z12microSecondsv
	.type	_Z12microSecondsv,@function
_Z12microSecondsv:                      # @_Z12microSecondsv
	.cfi_startproc
# %bb.0:
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	leaq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	testl	%eax, %eax
	je	.LBB4_2
# %bb.1:
	movl	$.L.str, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB4_2:
	cvtsi2sdq	8(%rsp), %xmm1
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LCPI4_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z12microSecondsv, .Lfunc_end4-_Z12microSecondsv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	leaq	4(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%rbx)
	jle	.LBB5_3
# %bb.1:                                # %.lr.ph
	leaq	8(%rsp), %rbx
	xorl	%ebp, %ebp
.LBB5_2:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	movl	316(%rsp), %r9d
	movl	368(%rsp), %ecx
	movl	372(%rsp), %r8d
	movl	$.L.str.1, %edi
	movl	%ebp, %esi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	printf
	incl	%ebp
	cmpl	4(%rsp), %ebp
	jl	.LBB5_2
.LBB5_3:                                # %._crit_edge
	xorl	%eax, %eax
	addq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5cuAddPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6cuMultPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10cuMultOptiPfS_S_iii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z5cuAddPiS_S_i,@object         # @_Z5cuAddPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z5cuAddPiS_S_i
	.p2align	3, 0x0
_Z5cuAddPiS_S_i:
	.quad	_Z20__device_stub__cuAddPiS_S_i
	.size	_Z5cuAddPiS_S_i, 8

	.type	_Z6cuMultPfS_S_iii,@object      # @_Z6cuMultPfS_S_iii
	.globl	_Z6cuMultPfS_S_iii
	.p2align	3, 0x0
_Z6cuMultPfS_S_iii:
	.quad	_Z21__device_stub__cuMultPfS_S_iii
	.size	_Z6cuMultPfS_S_iii, 8

	.type	_Z10cuMultOptiPfS_S_iii,@object # @_Z10cuMultOptiPfS_S_iii
	.globl	_Z10cuMultOptiPfS_S_iii
	.p2align	3, 0x0
_Z10cuMultOptiPfS_S_iii:
	.quad	_Z25__device_stub__cuMultOptiPfS_S_iii
	.size	_Z10cuMultOptiPfS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error return from gettimeofday: %d"
	.size	.L.str, 35

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Device %d (%s) has compute capability %d.%d.\nWarp Size: %d"
	.size	.L.str.1, 59

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5cuAddPiS_S_i"
	.size	.L__unnamed_1, 16

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6cuMultPfS_S_iii"
	.size	.L__unnamed_2, 19

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10cuMultOptiPfS_S_iii"
	.size	.L__unnamed_3, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__cuAddPiS_S_i
	.addrsig_sym _Z21__device_stub__cuMultPfS_S_iii
	.addrsig_sym _Z25__device_stub__cuMultOptiPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5cuAddPiS_S_i
	.addrsig_sym _Z6cuMultPfS_S_iii
	.addrsig_sym _Z10cuMultOptiPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5cuAddPiS_S_i         ; -- Begin function _Z5cuAddPiS_S_i
	.globl	_Z5cuAddPiS_S_i
	.p2align	8
	.type	_Z5cuAddPiS_S_i,@function
_Z5cuAddPiS_S_i:                        ; @_Z5cuAddPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5cuAddPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5cuAddPiS_S_i, .Lfunc_end0-_Z5cuAddPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6cuMultPfS_S_iii      ; -- Begin function _Z6cuMultPfS_S_iii
	.globl	_Z6cuMultPfS_S_iii
	.p2align	8
	.type	_Z6cuMultPfS_S_iii,@function
_Z6cuMultPfS_S_iii:                     ; @_Z6cuMultPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	v_cmp_gt_i32_e64 s2, s6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB1_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s4
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s4, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB1_3
	s_branch .LBB1_5
.LBB1_4:
	v_mov_b32_e32 v6, 0
.LBB1_5:                                ; %Flow54
	v_mad_u64_u32 v[2:3], null, v1, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6cuMultPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6cuMultPfS_S_iii, .Lfunc_end1-_Z6cuMultPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10cuMultOptiPfS_S_iii ; -- Begin function _Z10cuMultOptiPfS_S_iii
	.globl	_Z10cuMultOptiPfS_S_iii
	.p2align	8
	.type	_Z10cuMultOptiPfS_S_iii,@function
_Z10cuMultOptiPfS_S_iii:                ; @_Z10cuMultOptiPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x34
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s10, 1
	s_cbranch_scc1 .LBB2_5
; %bb.1:                                ; %.lr.ph
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s10, v[1:2]
	v_lshlrev_b32_e32 v7, 2, v1
	v_lshlrev_b32_e32 v5, 6, v0
	s_mul_i32 s1, s10, s15
	s_lshl_b32 s3, s11, 4
	s_lshl_b32 s1, s1, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_add_i32 s2, s1, s10
	v_mad_u64_u32 v[3:4], null, v0, s11, v[1:2]
	v_mov_b32_e32 v4, 0
	v_add_nc_u32_e32 v6, 0x400, v7
	v_add_nc_u32_e32 v7, v5, v7
	s_lshl_b32 s10, s14, 4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v6, v5
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_3 Depth 2
	v_add_nc_u32_e32 v9, s1, v2
	v_add_nc_u32_e32 v11, s10, v3
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v10, 31, v9
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v10, v[9:10], off
	global_load_b32 v11, v[11:12], off
	v_mov_b32_e32 v9, v6
	s_waitcnt vmcnt(1)
	ds_store_b32 v7, v10
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_3:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v10, s12, v5
	s_add_i32 s12, s12, 4
	ds_load_b32 v11, v9
	ds_load_b32 v10, v10
	v_add_nc_u32_e32 v9, 64, v9
	s_cmp_eq_u32 s12, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v4, v10, v11
	s_cbranch_scc0 .LBB2_3
; %bb.4:                                ;   in Loop: Header=BB2_2 Depth=1
	s_add_i32 s1, s1, 16
	s_add_i32 s10, s10, s3
	s_cmp_ge_i32 s1, s2
	s_cbranch_scc0 .LBB2_2
	s_branch .LBB2_6
.LBB2_5:
	v_mov_b32_e32 v4, 0
.LBB2_6:                                ; %Flow72
	s_lshr_b32 s1, s0, 16
	s_and_b32 s0, s0, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s1, v[0:1]
	s_mul_i32 s14, s14, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v2, s11
	v_add3_u32 v0, s14, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10cuMultOptiPfS_S_iii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10cuMultOptiPfS_S_iii, .Lfunc_end2-_Z10cuMultOptiPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 424
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5cuAddPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5cuAddPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6cuMultPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6cuMultPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10cuMultOptiPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10cuMultOptiPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
