
#include <iostream>
#include <cstdio>
#include <cstdlib>
#include <cstring>
#include <ctime>

int hgetLPierre(int d, int i, int j) {
    // If j > i, then we take the transpose of L
    if (j > i) {
        int t = i;
        i = j;
        j = t;
    }

    int l_position    =     i*(i+1) / 2 + j;
    // int l_position =     i*(i-1) / 2 + j-1;

    return l_position;
}

int hgetDPierre(int i) {
    int d_position = i;
    return d_position;
}

void generate_systems(float *A, float *Y, int N, int d, bool verbose=true) {
    int matrix_size = d + d * (d + 1) / 2;

    for (int i = 0; i < N; i++) {
        float *D = &A[i * matrix_size];
        float *T = &A[i * matrix_size + d];


        for (int j=0; j < (d * (d + 1) / 2); j++)
            T[j] = ((float) rand()+1)*1./RAND_MAX;


        for (int j=0; j<d; j++)
            T[hgetLPierre(d, j,j)] = 1.0f;

        for (int j=0; j<d; j++) {
            D[j] = ((float) rand()+1)*1./RAND_MAX;
            Y[d * i + j] = ((float) rand()+1)*1./RAND_MAX;
        }

    }
}

// ************************************************************************ //

// __device__ int getLPierre(float* T, int n, int d, int matrix_id, int i, int j)
__device__ int getLPierre(int d, int i, int j)
{
    // If j > i, then we take the transpose of L
    if (j > i) {int t = i; i = j; j = t;};

    // int matrix_memory_size = (d+d*(d+1)/2);
    int l_position    = d + i*(i+1) / 2 + j;
    // int l_position =     i*(i-1) / 2 + j-1;
    // int l_position = d + i*(i-1) / 2 + j;
    return l_position;
    // return &T[matrix_id * matrix_memory_size + l_position]
}

// __device__ int getDPierre(float* T, int n, int d, int matrix_id, int i)
__device__ int getDPierre(int d, int i)
{
    // int matrix_memory_size = (d+d*(d+1)/2);
    int d_position = i;
    return d_position;
    // return &T[matrix_id * matrix_memory_size + d_position]
}

__device__ void parallel_copy(float* src, float* dest, int n)
{
    int i = threadIdx.x;
    int stride = blockDim.x;
    while(i<n){
        dest[i] = src[i];
        i += stride;
    }
    __syncthreads();
}

// __global__ void LDLt_max_col_k(float* AGPU, int d)
__global__ void LDLt_max_col_k(float* sA, int d)
{
    int tidx = threadIdx.x%d;
    int Qt = (threadIdx.x-tidx)/d;
    int A_size = d*(d+1)/2+d;
    int minTB = blockDim.x/d;
    // printf("minTB %d\n", minTB);
    int nt = (blockIdx.x*minTB + Qt) * A_size;
    // int gbx = Qt + blockIdx.x*(blockDim.x/d);


    // extern __shared__ float sA[];
    // //copy ACPU to sA
    // parallel_copy(sA, &AGPU[(blockIdx.x*minTB + Qt)*A_size], minTB*A_size);

    // tidx==i

    // Perform the LDLt factorization
    int j, k;
    for(j=0; j<d; j++){
        // D_j,j :
        if(tidx==0){
            for(k=0; k<j; k++){
                sA[nt+getDPierre(d, j)] -= sA[nt+getDPierre(d,k)]*
                                     sA[nt+getLPierre(d,j,k)]*
                                     sA[nt+getLPierre(d,j,k)];
            }
        }
        __syncthreads();

        // L_:,j parallel
        if(tidx>j){
            //printf("(%d,%d,%d,%d),", nt+getLPierre(d,tidx,j), nt, tidx, j);
            sA[nt+getLPierre(d,tidx,j)] /= sA[nt+getDPierre(d,j)];
            for(k=0; k<j; k++){
                sA[nt+getLPierre(d,tidx,j)] -= sA[nt+getLPierre(d,tidx,k)]*
                                         sA[nt+getLPierre(d,j,k)]*
                                         sA[nt+getDPierre(d,k)]/
                                         sA[nt+getDPierre(d,j)];
            }
        }
        __syncthreads();
    }

    // parallel_copy(&AGPU[(blockIdx.x*minTB + Qt)*A_size], sA, minTB*A_size);

}

// __global__ void LDLt_max_row_k(float* AGPU, int d)
__global__ void LDLt_max_row_k(float* sA, int d)
{
    int tidx = threadIdx.x%d;
    int Qt = (threadIdx.x-tidx)/d;
    int A_size = d*(d+1)/2+d;
    int minTB = blockDim.x/d;
    // printf("minTB %d\n", minTB);
    int nt = (blockIdx.x*minTB + Qt) * A_size;
    // int gbx = Qt + blockIdx.x*(blockDim.x/d);


    // extern __shared__ float sA[];
    // //copy ACPU to sA
    // parallel_copy(sA, &AGPU[(blockIdx.x*minTB + Qt)*A_size], minTB*A_size);
    // Perform the LDLt factorization
    int i, k;
    for(i=0; i<d; i++){
        // D_i,i :
        if(tidx==0){
            for(k=0; k<i; k++){
                sA[nt+getDPierre(d, i)] -= sA[nt+getDPierre(d,k)]*
                                     sA[nt+getLPierre(d,i,k)]*
                                     sA[nt+getLPierre(d,i,k)];
            }
        }
        __syncthreads();

        // L_i,: parallel
        if(i<tidx){
            //printf("(%d,%d,%d,%d),", nt+getLPierre(d,i,tidx), nt, i,tidx);
            sA[nt+getLPierre(d,i,tidx)] /= sA[nt+getDPierre(d,i)];
            for(k=0; k<i; k++){
                sA[nt+getLPierre(d,i,tidx)] -= sA[nt+getLPierre(d,k,tidx)]*
                                         sA[nt+getLPierre(d,k,i)]*
                                         sA[nt+getDPierre(d,k)]/
                                         sA[nt+getDPierre(d,i)];
            }
        }
        __syncthreads();
    }

    // parallel_copy(&sA[(blockIdx.x*minTB + Qt)*A_size], A_host, minTB*A_size);
}

// __global__ void LDLt_max_row_k(float* AGPU, int d)
__global__ void LDLt_max_row_k_SHARED(float* A_host, int d)
{
    int tidx = threadIdx.x%d;
    int Qt = (threadIdx.x-tidx)/d;
    int A_size = d*(d+1)/2+d;
    int minTB = blockDim.x/d;
    // printf("minTB %d\n", minTB);
    int nt = Qt * A_size;
    // int gbx = Qt + blockIdx.x*(blockDim.x/d);

    extern __shared__ float sA[];
    //copy ACPU to sA
    parallel_copy(&A_host[blockIdx.x*minTB*A_size], sA, minTB*A_size);

    // tidx==j

    // Perform the LDLt factorization
    int i, k;
    for(i=0; i<d; i++){
        // D_i,i :
        if(tidx==0){
            for(k=0; k<i; k++){
                sA[nt+getDPierre(d, i)] -= sA[nt+getDPierre(d,k)]*
                                     sA[nt+getLPierre(d,i,k)]*
                                     sA[nt+getLPierre(d,i,k)];
            }
        }
        __syncthreads();

        // L_i,: parallel
        if(i<tidx){
            //printf("(%d,%d,%d,%d),", nt+getLPierre(d,i,tidx), nt, i,tidx);
            sA[nt+getLPierre(d,i,tidx)] /= sA[nt+getDPierre(d,i)];
            for(k=0; k<i; k++){
                sA[nt+getLPierre(d,i,tidx)] -= sA[nt+getLPierre(d,k,tidx)]*
                                         sA[nt+getLPierre(d,k,i)]*
                                         sA[nt+getDPierre(d,k)]/
                                         sA[nt+getDPierre(d,i)];
            }
        }
        __syncthreads();
    }

    parallel_copy(sA, &A_host[blockIdx.x*minTB*A_size], minTB*A_size);
}


// ************************************************************************ //

	.file	"tmpxft_00244c20_00000000-6_LDLt.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3643:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3643:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11hgetLPierreiii
	.type	_Z11hgetLPierreiii, @function
_Z11hgetLPierreiii:
.LFB3635:
	.cfi_startproc
	endbr64
	cmpl	%esi, %edx
	jg	.L3
	xchgl	%esi, %edx
.L3:
	leal	1(%rdx), %eax
	movl	$2, %ecx
	imull	%edx, %eax
	cltd
	idivl	%ecx
	addl	%esi, %eax
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z11hgetLPierreiii, .-_Z11hgetLPierreiii
	.globl	_Z11hgetDPierrei
	.type	_Z11hgetDPierrei, @function
_Z11hgetDPierrei:
.LFB3636:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z11hgetDPierrei, .-_Z11hgetDPierrei
	.globl	_Z16generate_systemsPfS_iib
	.type	_Z16generate_systemsPfS_iib, @function
_Z16generate_systemsPfS_iib:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leal	1(%rcx), %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	imull	%ecx, %eax
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%rsi, 32(%rsp)
	movl	$2, %esi
	movl	%edx, 44(%rsp)
	cltd
	idivl	%esi
	movl	%eax, 40(%rsp)
	addl	%ecx, %eax
	cltq
	movq	%rax, 16(%rsp)
	movslq	%ecx, %rax
	leaq	(%rdi,%rax,4), %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movl	%eax, 4(%rsp)
.L7:
	movl	44(%rsp), %edi
	cmpl	%edi, 4(%rsp)
	jge	.L16
	movq	24(%rsp), %rax
	leaq	0(,%r13,4), %rbp
	xorl	%edx, %edx
	leaq	(%rax,%rbp), %r15
.L8:
	cmpl	%edx, 40(%rsp)
	jle	.L17
	movq	%rdx, 8(%rsp)
	call	rand@PLT
	movq	8(%rsp), %rdx
	cvtsi2ssl	%eax, %xmm0
	addss	.LC0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LC1(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r15,%rdx,4)
	incq	%rdx
	jmp	.L8
.L17:
	movss	.LC0(%rip), %xmm0
	xorl	%r8d, %r8d
.L10:
	cmpl	%r12d, %r8d
	jge	.L18
	movl	%r8d, %edx
	movl	%r8d, %esi
	movl	%r12d, %edi
	incl	%r8d
	call	_Z11hgetLPierreiii
	cltq
	movss	%xmm0, (%r15,%rax,4)
	jmp	.L10
.L18:
	leaq	(%rbx,%rbp), %rax
	movq	32(%rsp), %rcx
	xorl	%r15d, %r15d
	movq	%rax, 8(%rsp)
	movslq	%r14d, %rax
	leaq	(%rcx,%rax,4), %rbp
.L12:
	cmpl	%r15d, %r12d
	jle	.L19
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	addss	.LC0(%rip), %xmm0
	movq	8(%rsp), %rax
	cvtss2sd	%xmm0, %xmm0
	divsd	.LC1(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rax,%r15,4)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	addss	.LC0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LC1(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 0(%rbp,%r15,4)
	incq	%r15
	jmp	.L12
.L19:
	movq	16(%rsp), %rax
	incl	4(%rsp)
	addl	%r12d, %r14d
	addq	%rax, %r13
	jmp	.L7
.L16:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z16generate_systemsPfS_iib, .-_Z16generate_systemsPfS_iib
	.globl	_Z10getLPierreiii
	.type	_Z10getLPierreiii, @function
_Z10getLPierreiii:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3638:
	.size	_Z10getLPierreiii, .-_Z10getLPierreiii
	.globl	_Z10getDPierreii
	.type	_Z10getDPierreii, @function
_Z10getDPierreii:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3639:
	.size	_Z10getDPierreii, .-_Z10getDPierreii
	.globl	_Z13parallel_copyPfS_i
	.type	_Z13parallel_copyPfS_i, @function
_Z13parallel_copyPfS_i:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3640:
	.size	_Z13parallel_copyPfS_i, .-_Z13parallel_copyPfS_i
	.globl	_Z35__device_stub__Z14LDLt_max_col_kPfiPfi
	.type	_Z35__device_stub__Z14LDLt_max_col_kPfiPfi, @function
_Z35__device_stub__Z14LDLt_max_col_kPfiPfi:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14LDLt_max_col_kPfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L26:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z35__device_stub__Z14LDLt_max_col_kPfiPfi, .-_Z35__device_stub__Z14LDLt_max_col_kPfiPfi
	.globl	_Z14LDLt_max_col_kPfi
	.type	_Z14LDLt_max_col_kPfi, @function
_Z14LDLt_max_col_kPfi:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z14LDLt_max_col_kPfiPfi
	.cfi_endproc
.LFE3666:
	.size	_Z14LDLt_max_col_kPfi, .-_Z14LDLt_max_col_kPfi
	.globl	_Z35__device_stub__Z14LDLt_max_row_kPfiPfi
	.type	_Z35__device_stub__Z14LDLt_max_row_kPfiPfi, @function
_Z35__device_stub__Z14LDLt_max_row_kPfiPfi:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14LDLt_max_row_kPfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L31:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z35__device_stub__Z14LDLt_max_row_kPfiPfi, .-_Z35__device_stub__Z14LDLt_max_row_kPfiPfi
	.globl	_Z14LDLt_max_row_kPfi
	.type	_Z14LDLt_max_row_kPfi, @function
_Z14LDLt_max_row_kPfi:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z14LDLt_max_row_kPfiPfi
	.cfi_endproc
.LFE3668:
	.size	_Z14LDLt_max_row_kPfi, .-_Z14LDLt_max_row_kPfi
	.globl	_Z42__device_stub__Z21LDLt_max_row_k_SHAREDPfiPfi
	.type	_Z42__device_stub__Z21LDLt_max_row_k_SHAREDPfiPfi, @function
_Z42__device_stub__Z21LDLt_max_row_k_SHAREDPfiPfi:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21LDLt_max_row_k_SHAREDPfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L36:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z42__device_stub__Z21LDLt_max_row_k_SHAREDPfiPfi, .-_Z42__device_stub__Z21LDLt_max_row_k_SHAREDPfiPfi
	.globl	_Z21LDLt_max_row_k_SHAREDPfi
	.type	_Z21LDLt_max_row_k_SHAREDPfi, @function
_Z21LDLt_max_row_k_SHAREDPfi:
.LFB3670:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z21LDLt_max_row_k_SHAREDPfiPfi
	.cfi_endproc
.LFE3670:
	.size	_Z21LDLt_max_row_k_SHAREDPfi, .-_Z21LDLt_max_row_k_SHAREDPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z21LDLt_max_row_k_SHAREDPfi"
.LC3:
	.string	"_Z14LDLt_max_row_kPfi"
.LC4:
	.string	"_Z14LDLt_max_col_kPfi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3672:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z21LDLt_max_row_k_SHAREDPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14LDLt_max_row_kPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14LDLt_max_col_kPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3672:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-4194304
	.long	1105199103
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:



#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdio>
#include <cstdlib>
#include <cstring>
#include <ctime>

int hgetLPierre(int d, int i, int j) {
    // If j > i, then we take the transpose of L
    if (j > i) {
        int t = i;
        i = j;
        j = t;
    }

    int l_position    =     i*(i+1) / 2 + j;
    // int l_position =     i*(i-1) / 2 + j-1;

    return l_position;
}

int hgetDPierre(int i) {
    int d_position = i;
    return d_position;
}

void generate_systems(float *A, float *Y, int N, int d, bool verbose=true) {
    int matrix_size = d + d * (d + 1) / 2;

    for (int i = 0; i < N; i++) {
        float *D = &A[i * matrix_size];
        float *T = &A[i * matrix_size + d];


        for (int j=0; j < (d * (d + 1) / 2); j++)
            T[j] = ((float) rand()+1)*1./RAND_MAX;


        for (int j=0; j<d; j++)
            T[hgetLPierre(d, j,j)] = 1.0f;

        for (int j=0; j<d; j++) {
            D[j] = ((float) rand()+1)*1./RAND_MAX;
            Y[d * i + j] = ((float) rand()+1)*1./RAND_MAX;
        }

    }
}

// ************************************************************************ //

// __device__ int getLPierre(float* T, int n, int d, int matrix_id, int i, int j)
__device__ int getLPierre(int d, int i, int j)
{
    // If j > i, then we take the transpose of L
    if (j > i) {int t = i; i = j; j = t;};

    // int matrix_memory_size = (d+d*(d+1)/2);
    int l_position    = d + i*(i+1) / 2 + j;
    // int l_position =     i*(i-1) / 2 + j-1;
    // int l_position = d + i*(i-1) / 2 + j;
    return l_position;
    // return &T[matrix_id * matrix_memory_size + l_position]
}

// __device__ int getDPierre(float* T, int n, int d, int matrix_id, int i)
__device__ int getDPierre(int d, int i)
{
    // int matrix_memory_size = (d+d*(d+1)/2);
    int d_position = i;
    return d_position;
    // return &T[matrix_id * matrix_memory_size + d_position]
}

__device__ void parallel_copy(float* src, float* dest, int n)
{
    int i = threadIdx.x;
    int stride = blockDim.x;
    while(i<n){
        dest[i] = src[i];
        i += stride;
    }
    __syncthreads();
}

// __global__ void LDLt_max_col_k(float* AGPU, int d)
__global__ void LDLt_max_col_k(float* sA, int d)
{
    int tidx = threadIdx.x%d;
    int Qt = (threadIdx.x-tidx)/d;
    int A_size = d*(d+1)/2+d;
    int minTB = blockDim.x/d;
    // printf("minTB %d\n", minTB);
    int nt = (blockIdx.x*minTB + Qt) * A_size;
    // int gbx = Qt + blockIdx.x*(blockDim.x/d);


    // extern __shared__ float sA[];
    // //copy ACPU to sA
    // parallel_copy(sA, &AGPU[(blockIdx.x*minTB + Qt)*A_size], minTB*A_size);

    // tidx==i

    // Perform the LDLt factorization
    int j, k;
    for(j=0; j<d; j++){
        // D_j,j :
        if(tidx==0){
            for(k=0; k<j; k++){
                sA[nt+getDPierre(d, j)] -= sA[nt+getDPierre(d,k)]*
                                     sA[nt+getLPierre(d,j,k)]*
                                     sA[nt+getLPierre(d,j,k)];
            }
        }
        __syncthreads();

        // L_:,j parallel
        if(tidx>j){
            //printf("(%d,%d,%d,%d),", nt+getLPierre(d,tidx,j), nt, tidx, j);
            sA[nt+getLPierre(d,tidx,j)] /= sA[nt+getDPierre(d,j)];
            for(k=0; k<j; k++){
                sA[nt+getLPierre(d,tidx,j)] -= sA[nt+getLPierre(d,tidx,k)]*
                                         sA[nt+getLPierre(d,j,k)]*
                                         sA[nt+getDPierre(d,k)]/
                                         sA[nt+getDPierre(d,j)];
            }
        }
        __syncthreads();
    }

    // parallel_copy(&AGPU[(blockIdx.x*minTB + Qt)*A_size], sA, minTB*A_size);

}

// __global__ void LDLt_max_row_k(float* AGPU, int d)
__global__ void LDLt_max_row_k(float* sA, int d)
{
    int tidx = threadIdx.x%d;
    int Qt = (threadIdx.x-tidx)/d;
    int A_size = d*(d+1)/2+d;
    int minTB = blockDim.x/d;
    // printf("minTB %d\n", minTB);
    int nt = (blockIdx.x*minTB + Qt) * A_size;
    // int gbx = Qt + blockIdx.x*(blockDim.x/d);


    // extern __shared__ float sA[];
    // //copy ACPU to sA
    // parallel_copy(sA, &AGPU[(blockIdx.x*minTB + Qt)*A_size], minTB*A_size);
    // Perform the LDLt factorization
    int i, k;
    for(i=0; i<d; i++){
        // D_i,i :
        if(tidx==0){
            for(k=0; k<i; k++){
                sA[nt+getDPierre(d, i)] -= sA[nt+getDPierre(d,k)]*
                                     sA[nt+getLPierre(d,i,k)]*
                                     sA[nt+getLPierre(d,i,k)];
            }
        }
        __syncthreads();

        // L_i,: parallel
        if(i<tidx){
            //printf("(%d,%d,%d,%d),", nt+getLPierre(d,i,tidx), nt, i,tidx);
            sA[nt+getLPierre(d,i,tidx)] /= sA[nt+getDPierre(d,i)];
            for(k=0; k<i; k++){
                sA[nt+getLPierre(d,i,tidx)] -= sA[nt+getLPierre(d,k,tidx)]*
                                         sA[nt+getLPierre(d,k,i)]*
                                         sA[nt+getDPierre(d,k)]/
                                         sA[nt+getDPierre(d,i)];
            }
        }
        __syncthreads();
    }

    // parallel_copy(&sA[(blockIdx.x*minTB + Qt)*A_size], A_host, minTB*A_size);
}

// __global__ void LDLt_max_row_k(float* AGPU, int d)
__global__ void LDLt_max_row_k_SHARED(float* A_host, int d)
{
    int tidx = threadIdx.x%d;
    int Qt = (threadIdx.x-tidx)/d;
    int A_size = d*(d+1)/2+d;
    int minTB = blockDim.x/d;
    // printf("minTB %d\n", minTB);
    int nt = Qt * A_size;
    // int gbx = Qt + blockIdx.x*(blockDim.x/d);

    extern __shared__ float sA[];
    //copy ACPU to sA
    parallel_copy(&A_host[blockIdx.x*minTB*A_size], sA, minTB*A_size);

    // tidx==j

    // Perform the LDLt factorization
    int i, k;
    for(i=0; i<d; i++){
        // D_i,i :
        if(tidx==0){
            for(k=0; k<i; k++){
                sA[nt+getDPierre(d, i)] -= sA[nt+getDPierre(d,k)]*
                                     sA[nt+getLPierre(d,i,k)]*
                                     sA[nt+getLPierre(d,i,k)];
            }
        }
        __syncthreads();

        // L_i,: parallel
        if(i<tidx){
            //printf("(%d,%d,%d,%d),", nt+getLPierre(d,i,tidx), nt, i,tidx);
            sA[nt+getLPierre(d,i,tidx)] /= sA[nt+getDPierre(d,i)];
            for(k=0; k<i; k++){
                sA[nt+getLPierre(d,i,tidx)] -= sA[nt+getLPierre(d,k,tidx)]*
                                         sA[nt+getLPierre(d,k,i)]*
                                         sA[nt+getDPierre(d,k)]/
                                         sA[nt+getDPierre(d,i)];
            }
        }
        __syncthreads();
    }

    parallel_copy(sA, &A_host[blockIdx.x*minTB*A_size], minTB*A_size);
}


// ************************************************************************ //

	.text
	.file	"LDLt.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z11hgetLPierreiii              # -- Begin function _Z11hgetLPierreiii
	.type	_Z11hgetLPierreiii,@function
_Z11hgetLPierreiii:                     # @_Z11hgetLPierreiii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
	cmpl	%esi, %edx
	movl	%esi, %ecx
	cmovll	%edx, %ecx
	cmovgl	%edx, %esi
	leal	1(%rsi), %edx
	imull	%esi, %edx
	movl	%edx, %eax
	shrl	$31, %eax
	addl	%edx, %eax
	sarl	%eax
	addl	%ecx, %eax
	retq
.Lfunc_end0:
	.size	_Z11hgetLPierreiii, .Lfunc_end0-_Z11hgetLPierreiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11hgetDPierrei                # -- Begin function _Z11hgetDPierrei
	.type	_Z11hgetDPierrei,@function
_Z11hgetDPierrei:                       # @_Z11hgetDPierrei
	.cfi_startproc
# %bb.0:
	movl	%edi, %eax
	retq
.Lfunc_end1:
	.size	_Z11hgetDPierrei, .Lfunc_end1-_Z11hgetDPierrei
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z16generate_systemsPfS_iib
.LCPI2_0:
	.long	0x3f800000                      # float 1
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x41dfffffffc00000              # double 2147483647
	.text
	.globl	_Z16generate_systemsPfS_iib
	.type	_Z16generate_systemsPfS_iib,@function
_Z16generate_systemsPfS_iib:            # @_Z16generate_systemsPfS_iib
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	testl	%edx, %edx
	jle	.LBB2_12
# %bb.1:                                # %.lr.ph46
	movl	%ecx, %ebx
	movq	%rdi, %r15
	leal	1(%rbx), %eax
	imull	%ecx, %eax
	movl	%eax, %ebp
	shrl	$31, %ebp
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	addl	%eax, %ebp
	sarl	%ebp
	leal	(%rbx,%rbp), %eax
	movslq	%eax, %rcx
	movslq	%ebx, %rax
	movl	%edx, %edx
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	leaq	(%rdi,%rax,4), %r14
	movl	%eax, %r8d
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	leaq	(,%rcx,4), %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%r14, 24(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
.LBB2_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
                                        #     Child Loop BB2_7 Depth 2
                                        #     Child Loop BB2_10 Depth 2
	movq	%r8, %r12
	cmpl	$2, 20(%rsp)                    # 4-byte Folded Reload
	jl	.LBB2_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	xorl	%r13d, %r13d
.LBB2_4:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	addss	.LCPI2_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LCPI2_1(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r14,%r13,4)
	incq	%r13
	cmpq	%r13, %rbp
	jne	.LBB2_4
.LBB2_5:                                # %.preheader38
                                        #   in Loop: Header=BB2_2 Depth=1
	testl	%ebx, %ebx
	movq	%r12, %r8
	jle	.LBB2_11
# %bb.6:                                # %.lr.ph41.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	(%rsp), %rax                    # 8-byte Reload
	imulq	32(%rsp), %rax                  # 8-byte Folded Reload
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movq	40(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rcx,4), %rbp
	movq	24(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rax
	movl	$2, %ecx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB2_7:                                # %.lr.ph41
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%edx, %edi
	shrl	%edi
	addq	%rsi, %rdi
	incq	%rsi
	movl	$1065353216, (%rax,%rdi,4)      # imm = 0x3F800000
	addl	%ecx, %edx
	addl	$2, %ecx
	cmpl	%esi, %ebx
	jne	.LBB2_7
# %bb.8:                                # %.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	testl	%ebx, %ebx
	jle	.LBB2_11
# %bb.9:                                # %.lr.ph43
                                        #   in Loop: Header=BB2_2 Depth=1
	xorl	%r13d, %r13d
.LBB2_10:                               #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	addss	.LCPI2_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LCPI2_1(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r15,%r13,4)
	callq	rand
	movq	%r12, %r8
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	addss	.LCPI2_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LCPI2_1(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbp,%r13,4)
	incq	%r13
	cmpq	%r13, %r12
	jne	.LBB2_10
.LBB2_11:                               # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	(%rsp), %rdx                    # 8-byte Reload
	incq	%rdx
	movq	48(%rsp), %rax                  # 8-byte Reload
	addq	%rax, %r14
	movq	8(%rsp), %rcx                   # 8-byte Reload
	addl	%ebx, %ecx
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	addq	%rax, %r15
	movq	%rdx, %rax
	movq	%rdx, (%rsp)                    # 8-byte Spill
	cmpq	64(%rsp), %rdx                  # 8-byte Folded Reload
	movq	56(%rsp), %rbp                  # 8-byte Reload
	jne	.LBB2_2
.LBB2_12:                               # %._crit_edge47
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z16generate_systemsPfS_iib, .Lfunc_end2-_Z16generate_systemsPfS_iib
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__LDLt_max_col_kPfi # -- Begin function _Z29__device_stub__LDLt_max_col_kPfi
	.type	_Z29__device_stub__LDLt_max_col_kPfi,@function
_Z29__device_stub__LDLt_max_col_kPfi:   # @_Z29__device_stub__LDLt_max_col_kPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14LDLt_max_col_kPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z29__device_stub__LDLt_max_col_kPfi, .Lfunc_end3-_Z29__device_stub__LDLt_max_col_kPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__LDLt_max_row_kPfi # -- Begin function _Z29__device_stub__LDLt_max_row_kPfi
	.type	_Z29__device_stub__LDLt_max_row_kPfi,@function
_Z29__device_stub__LDLt_max_row_kPfi:   # @_Z29__device_stub__LDLt_max_row_kPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14LDLt_max_row_kPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z29__device_stub__LDLt_max_row_kPfi, .Lfunc_end4-_Z29__device_stub__LDLt_max_row_kPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__LDLt_max_row_k_SHAREDPfi # -- Begin function _Z36__device_stub__LDLt_max_row_k_SHAREDPfi
	.type	_Z36__device_stub__LDLt_max_row_k_SHAREDPfi,@function
_Z36__device_stub__LDLt_max_row_k_SHAREDPfi: # @_Z36__device_stub__LDLt_max_row_k_SHAREDPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21LDLt_max_row_k_SHAREDPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z36__device_stub__LDLt_max_row_k_SHAREDPfi, .Lfunc_end5-_Z36__device_stub__LDLt_max_row_k_SHAREDPfi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14LDLt_max_col_kPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14LDLt_max_row_kPfi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21LDLt_max_row_k_SHAREDPfi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14LDLt_max_col_kPfi,@object   # @_Z14LDLt_max_col_kPfi
	.section	.rodata,"a",@progbits
	.globl	_Z14LDLt_max_col_kPfi
	.p2align	3, 0x0
_Z14LDLt_max_col_kPfi:
	.quad	_Z29__device_stub__LDLt_max_col_kPfi
	.size	_Z14LDLt_max_col_kPfi, 8

	.type	_Z14LDLt_max_row_kPfi,@object   # @_Z14LDLt_max_row_kPfi
	.globl	_Z14LDLt_max_row_kPfi
	.p2align	3, 0x0
_Z14LDLt_max_row_kPfi:
	.quad	_Z29__device_stub__LDLt_max_row_kPfi
	.size	_Z14LDLt_max_row_kPfi, 8

	.type	_Z21LDLt_max_row_k_SHAREDPfi,@object # @_Z21LDLt_max_row_k_SHAREDPfi
	.globl	_Z21LDLt_max_row_k_SHAREDPfi
	.p2align	3, 0x0
_Z21LDLt_max_row_k_SHAREDPfi:
	.quad	_Z36__device_stub__LDLt_max_row_k_SHAREDPfi
	.size	_Z21LDLt_max_row_k_SHAREDPfi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z14LDLt_max_col_kPfi"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14LDLt_max_row_kPfi"
	.size	.L__unnamed_2, 22

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z21LDLt_max_row_k_SHAREDPfi"
	.size	.L__unnamed_3, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__LDLt_max_col_kPfi
	.addrsig_sym _Z29__device_stub__LDLt_max_row_kPfi
	.addrsig_sym _Z36__device_stub__LDLt_max_row_k_SHAREDPfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14LDLt_max_col_kPfi
	.addrsig_sym _Z14LDLt_max_row_kPfi
	.addrsig_sym _Z21LDLt_max_row_k_SHAREDPfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14LDLt_max_col_kPfi   ; -- Begin function _Z14LDLt_max_col_kPfi
	.globl	_Z14LDLt_max_col_kPfi
	.p2align	8
	.type	_Z14LDLt_max_col_kPfi,@function
_Z14LDLt_max_col_kPfi:                  ; @_Z14LDLt_max_col_kPfi
; %bb.0:
	s_load_b32 s4, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_10
; %bb.1:                                ; %.lr.ph91
	v_cvt_f32_u32_e32 v1, s4
	s_sub_i32 s3, 0, s4
	s_load_b32 s5, s[0:1], 0x1c
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s2, v1
	s_mul_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s3, s2, s3
	s_add_i32 s2, s2, s3
	s_add_i32 s3, s4, 1
	v_mul_hi_u32 v1, v0, s2
	s_mul_i32 s3, s3, s4
	s_mul_hi_u32 s2, s5, s2
	s_lshr_b32 s6, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s3, s3, s6
	s_mul_i32 s6, s2, s4
	s_ashr_i32 s3, s3, 1
	v_mul_lo_u32 v2, v1, s4
	v_add_nc_u32_e32 v3, 1, v1
	s_add_i32 s7, s3, s4
	s_sub_i32 s3, s5, s6
	s_add_i32 s5, s2, 1
	s_sub_i32 s6, s3, s4
	s_cmp_ge_u32 s3, s4
	s_cselect_b32 s2, s5, s2
	v_sub_nc_u32_e32 v2, v0, v2
	s_cselect_b32 s3, s6, s3
	s_add_i32 s5, s2, 1
	s_cmp_ge_u32 s3, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v4, s4, v2
	v_cmp_le_u32_e32 vcc_lo, s4, v2
	s_cselect_b32 s2, s5, s2
	v_dual_cndmask_b32 v2, v2, v4 :: v_dual_cndmask_b32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s4, v2
	v_add_nc_u32_e32 v3, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v1, v3, vcc_lo
	v_mad_u64_u32 v[3:4], null, s2, s15, v[2:3]
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v3, s7
	v_mul_lo_u32 v3, v2, s4
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v0, v0, v3
	v_add_nc_u32_e32 v10, s4, v1
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s0, 0, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;     Child Loop BB0_8 Depth 2
	v_add_nc_u32_e32 v4, s1, v1
	s_cmp_lg_u32 s1, 0
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s6, s0, s5
	v_ashrrev_i32_e32 v5, 31, v4
	s_and_saveexec_b32 s5, s6
	s_cbranch_execz .LBB0_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
	s_mov_b32 s6, 0
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	global_load_b32 v11, v[6:7], off
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_max_i32 s7, s6, s1
	s_min_i32 s8, s6, s1
	s_add_i32 s9, s7, 1
	s_add_i32 s6, s6, 1
	s_mul_i32 s9, s9, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshr_b32 s7, s9, 1
	s_cmp_lt_u32 s6, s1
	v_add3_u32 v12, s7, s8, v10
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v12, vcc_lo, s2, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	global_load_b32 v14, v[8:9], off
	global_load_b32 v12, v[12:13], off
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v13, v14, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v11, -v12, v13, v11
	global_store_b32 v[6:7], v11, off
	s_cbranch_scc1 .LBB0_4
.LBB0_5:                                ; %Flow100
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e64 s1, v0
	s_cbranch_execz .LBB0_9
; %bb.6:                                ;   in Loop: Header=BB0_2 Depth=1
	v_max_i32_e32 v6, s1, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_cmp_eq_u32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[7:8], null, v6, v6, v[6:7]
	v_min_i32_e32 v6, s1, v0
	v_add_co_u32 v4, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	v_lshrrev_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v6, v10, v6, v7
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v11, null, v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v12, v11
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v11, v12, 1.0
	v_fmac_f32_e32 v12, v13, v12
	v_div_scale_f32 v13, vcc_lo, v9, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, v13, v12
	v_fma_f32 v15, -v11, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v15, v12
	v_fma_f32 v11, -v11, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v11, v11, v12, v14
	v_div_fixup_f32 v11, v11, v8, v9
	global_store_b32 v[6:7], v11, off
	s_cbranch_scc1 .LBB0_9
; %bb.7:                                ; %.lr.ph88.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
	s_mov_b32 s6, 0
.LBB0_8:                                ; %.lr.ph88
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_max_i32_e32 v12, s6, v0
	s_max_i32 s7, s6, s1
	v_min_i32_e32 v15, s6, v0
	s_add_i32 s9, s7, 1
	s_min_i32 s8, s6, s1
	v_mad_u64_u32 v[13:14], null, v12, v12, v[12:13]
	s_mul_i32 s9, s9, s7
	s_add_i32 s6, s6, 1
	s_lshr_b32 s7, s9, 1
	s_cmp_lt_u32 s6, s1
	v_add3_u32 v12, s7, s8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v14, 1, v13
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v14, v10, v15, v14
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v15, 31, v14
	v_add_co_u32 v12, vcc_lo, s2, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, s2, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v15, vcc_lo
	s_clause 0x1
	global_load_b32 v12, v[12:13], off
	global_load_b32 v13, v[14:15], off
	global_load_b32 v14, v[8:9], off
	global_load_b32 v15, v[4:5], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v12, v13, v12
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v12, v14
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v13, null, v15, v15, v12
	v_div_scale_f32 v17, vcc_lo, v12, v15, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v14, v13
	s_waitcnt_depctr 0xfff
	v_fma_f32 v16, -v13, v14, 1.0
	v_fmac_f32_e32 v14, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v17, v14
	v_fma_f32 v18, -v13, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v18, v14
	v_fma_f32 v13, -v13, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v13, v13, v14, v16
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	v_div_fixup_f32 v12, v13, v15, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_f32_e32 v11, v11, v12
	global_store_b32 v[6:7], v11, off
	s_cbranch_scc1 .LBB0_8
.LBB0_9:                                ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s1, s1, 1
	s_waitcnt_vscnt null, 0x0
	s_cmp_lg_u32 s1, s4
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_2
.LBB0_10:                               ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14LDLt_max_col_kPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14LDLt_max_col_kPfi, .Lfunc_end0-_Z14LDLt_max_col_kPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1172
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14LDLt_max_row_kPfi   ; -- Begin function _Z14LDLt_max_row_kPfi
	.globl	_Z14LDLt_max_row_kPfi
	.p2align	8
	.type	_Z14LDLt_max_row_kPfi,@function
_Z14LDLt_max_row_kPfi:                  ; @_Z14LDLt_max_row_kPfi
; %bb.0:
	s_load_b32 s4, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB1_10
; %bb.1:                                ; %.lr.ph91
	v_cvt_f32_u32_e32 v1, s4
	s_sub_i32 s3, 0, s4
	s_load_b32 s5, s[0:1], 0x1c
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s2, v1
	s_mul_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s3, s2, s3
	s_add_i32 s2, s2, s3
	s_add_i32 s3, s4, 1
	v_mul_hi_u32 v1, v0, s2
	s_mul_i32 s3, s3, s4
	s_mul_hi_u32 s2, s5, s2
	s_lshr_b32 s6, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s3, s3, s6
	s_mul_i32 s6, s2, s4
	s_ashr_i32 s3, s3, 1
	v_mul_lo_u32 v2, v1, s4
	v_add_nc_u32_e32 v3, 1, v1
	s_add_i32 s7, s3, s4
	s_sub_i32 s3, s5, s6
	s_add_i32 s5, s2, 1
	s_sub_i32 s6, s3, s4
	s_cmp_ge_u32 s3, s4
	s_cselect_b32 s2, s5, s2
	v_sub_nc_u32_e32 v2, v0, v2
	s_cselect_b32 s3, s6, s3
	s_add_i32 s5, s2, 1
	s_cmp_ge_u32 s3, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v4, s4, v2
	v_cmp_le_u32_e32 vcc_lo, s4, v2
	s_cselect_b32 s2, s5, s2
	v_dual_cndmask_b32 v2, v2, v4 :: v_dual_cndmask_b32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s4, v2
	v_add_nc_u32_e32 v3, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v1, v3, vcc_lo
	v_mad_u64_u32 v[3:4], null, s2, s15, v[2:3]
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v3, s7
	v_mul_lo_u32 v3, v2, s4
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v0, v0, v3
	v_add_nc_u32_e32 v10, s4, v1
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s0, 0, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
                                        ;     Child Loop BB1_8 Depth 2
	v_add_nc_u32_e32 v4, s1, v1
	s_cmp_lg_u32 s1, 0
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s6, s0, s5
	v_ashrrev_i32_e32 v5, 31, v4
	s_and_saveexec_b32 s5, s6
	s_cbranch_execz .LBB1_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
	s_mov_b32 s6, 0
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	global_load_b32 v11, v[6:7], off
.LBB1_4:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_max_i32 s7, s6, s1
	s_min_i32 s8, s6, s1
	s_add_i32 s9, s7, 1
	s_add_i32 s6, s6, 1
	s_mul_i32 s9, s9, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshr_b32 s7, s9, 1
	s_cmp_lt_u32 s6, s1
	v_add3_u32 v12, s7, s8, v10
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v12, vcc_lo, s2, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	global_load_b32 v14, v[8:9], off
	global_load_b32 v12, v[12:13], off
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v13, v14, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v11, -v12, v13, v11
	global_store_b32 v[6:7], v11, off
	s_cbranch_scc1 .LBB1_4
.LBB1_5:                                ; %Flow100
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e64 s1, v0
	s_cbranch_execz .LBB1_9
; %bb.6:                                ;   in Loop: Header=BB1_2 Depth=1
	v_max_i32_e32 v6, s1, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_cmp_eq_u32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[7:8], null, v6, v6, v[6:7]
	v_min_i32_e32 v6, s1, v0
	v_add_co_u32 v4, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	v_lshrrev_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v6, v10, v6, v7
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v11, null, v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v12, v11
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v11, v12, 1.0
	v_fmac_f32_e32 v12, v13, v12
	v_div_scale_f32 v13, vcc_lo, v9, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, v13, v12
	v_fma_f32 v15, -v11, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v15, v12
	v_fma_f32 v11, -v11, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v11, v11, v12, v14
	v_div_fixup_f32 v11, v11, v8, v9
	global_store_b32 v[6:7], v11, off
	s_cbranch_scc1 .LBB1_9
; %bb.7:                                ; %.lr.ph88.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
	s_mov_b32 s6, 0
.LBB1_8:                                ; %.lr.ph88
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_max_i32_e32 v12, s6, v0
	s_max_i32 s7, s1, s6
	v_min_i32_e32 v15, s6, v0
	s_add_i32 s9, s7, 1
	s_min_i32 s8, s1, s6
	v_mad_u64_u32 v[13:14], null, v12, v12, v[12:13]
	s_mul_i32 s9, s9, s7
	s_add_i32 s6, s6, 1
	s_lshr_b32 s7, s9, 1
	s_cmp_lt_u32 s6, s1
	v_add3_u32 v12, s7, s8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v14, 1, v13
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v14, v10, v15, v14
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v15, 31, v14
	v_add_co_u32 v12, vcc_lo, s2, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, s2, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v15, vcc_lo
	s_clause 0x1
	global_load_b32 v12, v[12:13], off
	global_load_b32 v13, v[14:15], off
	global_load_b32 v14, v[8:9], off
	global_load_b32 v15, v[4:5], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v12, v13, v12
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v12, v14
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v13, null, v15, v15, v12
	v_div_scale_f32 v17, vcc_lo, v12, v15, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v14, v13
	s_waitcnt_depctr 0xfff
	v_fma_f32 v16, -v13, v14, 1.0
	v_fmac_f32_e32 v14, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v17, v14
	v_fma_f32 v18, -v13, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v18, v14
	v_fma_f32 v13, -v13, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v13, v13, v14, v16
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	v_div_fixup_f32 v12, v13, v15, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_f32_e32 v11, v11, v12
	global_store_b32 v[6:7], v11, off
	s_cbranch_scc1 .LBB1_8
.LBB1_9:                                ; %.loopexit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s1, s1, 1
	s_waitcnt_vscnt null, 0x0
	s_cmp_lg_u32 s1, s4
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_2
.LBB1_10:                               ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14LDLt_max_row_kPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14LDLt_max_row_kPfi, .Lfunc_end1-_Z14LDLt_max_row_kPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1172
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21LDLt_max_row_k_SHAREDPfi ; -- Begin function _Z21LDLt_max_row_k_SHAREDPfi
	.globl	_Z21LDLt_max_row_k_SHAREDPfi
	.p2align	8
	.type	_Z21LDLt_max_row_k_SHAREDPfi,@function
_Z21LDLt_max_row_k_SHAREDPfi:           ; @_Z21LDLt_max_row_k_SHAREDPfi
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x8
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s8
	s_sub_i32 s0, 0, s8
	s_add_i32 s1, s8, 1
	s_and_b32 s6, s4, 0xffff
	s_mul_i32 s1, s1, s8
	v_rcp_iflag_f32_e32 v1, v1
	s_lshr_b32 s5, s1, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s1, s5
	s_ashr_i32 s9, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s9, s9, s8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s10, v1
	s_mul_i32 s0, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s0, s10, s0
	s_add_i32 s10, s10, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s0, s6, s10
	s_mul_i32 s1, s0, s8
	s_add_i32 s4, s0, 1
	s_sub_i32 s1, s6, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s5, s1, s8
	s_cmp_ge_u32 s1, s8
	s_cselect_b32 s0, s4, s0
	s_cselect_b32 s1, s5, s1
	s_add_i32 s4, s0, 1
	s_cmp_ge_u32 s1, s8
	s_mov_b32 s5, 0
	s_cselect_b32 s7, s4, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s9
	v_cmp_gt_i32_e64 s0, s7, v0
	s_mul_i32 s4, s7, s15
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph.i.preheader
	v_dual_mov_b32 v4, v0 :: v_dual_lshlrev_b32 v1, 2, v0
	s_lshl_b64 s[14:15], s[4:5], 2
	s_lshl_b32 s12, s6, 2
	s_add_u32 s1, s2, s14
	s_addc_u32 s13, s3, s15
	v_add_co_u32 v1, s1, s1, v1
	v_lshl_add_u32 v3, v0, 2, 0
	v_add_co_ci_u32_e64 v2, null, s13, 0, s1
	s_mov_b32 s13, s5
.LBB2_2:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[1:2], off
	v_add_nc_u32_e32 v4, s6, v4
	v_add_co_u32 v1, vcc_lo, v1, s12
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s1, s7, v4
	s_or_b32 s13, s1, s13
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v5
	v_add_nc_u32_e32 v3, s12, v3
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB2_2
.LBB2_3:                                ; %Flow119
	s_or_b32 exec_lo, exec_lo, s11
	s_cmp_lt_i32 s8, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_13
; %bb.4:                                ; %.lr.ph92
	v_mul_hi_u32 v1, v0, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v1, s8
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v4, s8, v2
	v_cmp_le_u32_e32 vcc_lo, s8, v2
	v_dual_cndmask_b32 v2, v2, v4 :: v_dual_add_nc_u32 v3, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 1, v1
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v1, s8
	v_mul_lo_u32 v1, v1, s9
	s_mov_b32 s9, 0
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v3, s8, v1
	v_lshl_add_u32 v4, v1, 2, 0
	v_cmp_eq_u32_e64 s1, 0, v2
.LBB2_5:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_7 Depth 2
                                        ;     Child Loop BB2_11 Depth 2
	v_add_nc_u32_e32 v5, s9, v1
	s_cmp_lg_u32 s9, 0
	s_cselect_b32 s10, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s11, s1, s10
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v5, v5, 2, 0
	s_and_saveexec_b32 s10, s11
	s_cbranch_execz .LBB2_8
; %bb.6:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_5 Depth=1
	ds_load_b32 v6, v5
	v_mov_b32_e32 v7, v4
	s_mov_b32 s11, 0
.LBB2_7:                                ;   Parent Loop BB2_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_max_i32 s12, s11, s9
	s_add_i32 s13, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s13, s13, s12
	s_min_i32 s12, s11, s9
	s_lshr_b32 s13, s13, 1
	s_add_i32 s11, s11, 1
	v_add3_u32 v8, s13, s12, v3
	s_cmp_lt_u32 s11, s9
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v8, v8, 2, 0
	ds_load_b32 v9, v7
	ds_load_b32 v8, v8
	v_add_nc_u32_e32 v7, 4, v7
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v9, v9, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v6, -v8, v9, v6
	ds_store_b32 v5, v6
	s_cbranch_scc1 .LBB2_7
.LBB2_8:                                ; %Flow115
                                        ;   in Loop: Header=BB2_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s10, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e64 s9, v2
	s_cbranch_execz .LBB2_12
; %bb.9:                                ;   in Loop: Header=BB2_5 Depth=1
	v_max_i32_e32 v6, s9, v2
	s_cmp_eq_u32 s9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[7:8], null, v6, v6, v[6:7]
	v_min_i32_e32 v6, s9, v2
	v_lshrrev_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v6, v3, v6, v7
	v_lshl_add_u32 v6, v6, 2, 0
	ds_load_b32 v7, v5
	ds_load_b32 v8, v6
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v9, null, v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	v_fmac_f32_e32 v10, v11, v10
	v_div_scale_f32 v11, vcc_lo, v8, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v11, v10
	v_fma_f32 v13, -v9, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v10
	v_fma_f32 v9, -v9, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v9, v9, v10, v12
	v_div_fixup_f32 v7, v9, v7, v8
	ds_store_b32 v6, v7
	s_cbranch_scc1 .LBB2_12
; %bb.10:                               ; %.lr.ph89.preheader
                                        ;   in Loop: Header=BB2_5 Depth=1
	v_mov_b32_e32 v8, v4
	s_mov_b32 s11, 0
.LBB2_11:                               ; %.lr.ph89
                                        ;   Parent Loop BB2_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_max_i32_e32 v9, s11, v2
	s_max_i32 s12, s9, s11
	s_min_i32 s13, s9, s11
	s_add_i32 s14, s12, 1
	s_mul_i32 s14, s14, s12
	v_mad_u64_u32 v[10:11], null, v9, v9, v[9:10]
	v_min_i32_e32 v9, s11, v2
	s_lshr_b32 s12, s14, 1
	s_add_i32 s11, s11, 1
	v_add3_u32 v11, s12, s13, v3
	s_cmp_lt_u32 s11, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v10, 1, v10
	v_add3_u32 v9, v3, v9, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v10, v11, 2, 0
	v_lshl_add_u32 v9, v9, 2, 0
	ds_load_b32 v9, v9
	ds_load_b32 v10, v10
	ds_load_b32 v11, v8
	ds_load_b32 v12, v5
	s_waitcnt lgkmcnt(2)
	v_dual_mul_f32 v9, v9, v10 :: v_dual_add_nc_u32 v8, 4, v8
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v9, v11
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v10, null, v12, v12, v9
	v_div_scale_f32 v14, vcc_lo, v9, v12, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v11, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v10, v11, 1.0
	v_fmac_f32_e32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, v14, v11
	v_fma_f32 v15, -v10, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v15, v11
	v_fma_f32 v10, -v10, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v10, v10, v11, v13
	v_div_fixup_f32 v9, v10, v12, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v9
	ds_store_b32 v6, v7
	s_cbranch_scc1 .LBB2_11
.LBB2_12:                               ; %.loopexit
                                        ;   in Loop: Header=BB2_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_add_i32 s9, s9, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s9, s8
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_5
.LBB2_13:                               ; %._crit_edge
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_16
; %bb.14:                               ; %.lr.ph.i83.preheader
	v_lshlrev_b32_e32 v1, 2, v0
	s_lshl_b64 s[8:9], s[4:5], 2
	s_lshl_b32 s4, s6, 2
	s_add_u32 s0, s2, s8
	s_addc_u32 s2, s3, s9
	v_add_co_u32 v1, s0, s0, v1
	v_lshl_add_u32 v3, v0, 2, 0
	v_add_co_ci_u32_e64 v2, null, s2, 0, s0
	s_mov_b32 s2, 0
.LBB2_15:                               ; %.lr.ph.i83
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v4, v3
	v_add_nc_u32_e32 v0, s6, v0
	v_add_nc_u32_e32 v3, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s7, v0
	s_or_b32 s2, vcc_lo, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v4, off
	v_add_co_u32 v1, s0, v1, s4
	v_add_co_ci_u32_e64 v2, s0, 0, v2, s0
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_15
.LBB2_16:                               ; %Flow111
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21LDLt_max_row_k_SHAREDPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z21LDLt_max_row_k_SHAREDPfi, .Lfunc_end2-_Z21LDLt_max_row_k_SHAREDPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1300
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14LDLt_max_col_kPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14LDLt_max_col_kPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14LDLt_max_row_kPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14LDLt_max_row_kPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21LDLt_max_row_k_SHAREDPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21LDLt_max_row_k_SHAREDPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
