#include <stdio.h>
#include "cuda_runtime.h"

#define M 8
#define N 12

extern __shared__ int shared[];

__global__ void func(int*data, int m,int n){
  int * t_s = shared;
//  __shared__ int t_s[12];

  if(threadIdx.x==0){
     memcpy(t_s + blockIdx.x*n,data + blockIdx.x*n,sizeof(int)*n);
  }
  __syncthreads();

  data[blockIdx.x*n + threadIdx.x] = 
  t_s[blockIdx.x*n + threadIdx.x+1];
}


int main(){

int h_d[M*N];
int *d_d;

  for(int i=0;i<M*N;i++)
    h_d[i]=i+1;
 
  for(int i=0;i<M;i++){
    for(int j=0;j<N;j++)
      printf("%2d ",h_d[i*N+j]);
    printf("\n");
  }
  printf("\n");

  cudaMalloc((void**)&d_d,sizeof(int)*M*N);
  cudaMemcpy(d_d,h_d,sizeof(int)*M*N,cudaMemcpyHostToDevice);


  func<<<M,N-1,sizeof(int)*M*N>>>(d_d,M,N);

  cudaThreadSynchronize();

  memset(h_d,0,sizeof(int)*M*N);
  cudaMemcpy(h_d,d_d,sizeof(int)*M*N,cudaMemcpyDeviceToHost);

  for(int i=0;i<M;i++){
    for(int j=0;j<N;j++)
      printf("%2d ",h_d[i*N+j]);
    printf("\n");
  }
  printf("\n");



  return 0;

}

	.file	"tmpxft_002e69f3_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z25__device_stub__Z4funcPiiiPiii
	.type	_Z25__device_stub__Z4funcPiiiPiii, @function
_Z25__device_stub__Z4funcPiiiPiii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4funcPiii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z25__device_stub__Z4funcPiiiPiii, .-_Z25__device_stub__Z4funcPiiiPiii
	.globl	_Z4funcPiii
	.type	_Z4funcPiii, @function
_Z4funcPiii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z4funcPiiiPiii
	.cfi_endproc
.LFE2053:
	.size	_Z4funcPiii, .-_Z4funcPiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%2d "
.LC1:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$440, %rsp
	.cfi_def_cfa_offset 496
	movq	%fs:40, %rax
	movq	%rax, 424(%rsp)
	movl	$1, %eax
	leaq	40(%rsp), %rbx
.L9:
	movl	%eax, -4(%rbx,%rax,4)
	incq	%rax
	cmpq	$97, %rax
	jne	.L9
	movq	%rbx, %r12
	movq	%rbx, %r15
	leaq	.LC0(%rip), %r13
	xorl	%r14d, %r14d
.L10:
	xorl	%ebp, %ebp
.L11:
	movl	(%r15,%rbp,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$12, %rbp
	jne	.L11
	movl	$2, %edi
	xorl	%eax, %eax
	addl	$12, %r14d
	addq	$48, %r15
	leaq	.LC1(%rip), %rbp
	movq	%rbp, %rsi
	call	__printf_chk@PLT
	cmpl	$96, %r14d
	jne	.L10
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	movl	$384, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$384, %edx
	call	cudaMemcpy@PLT
	movl	$536870913, %edi
	xorl	%r9d, %r9d
	movabsq	$4294967307, %rdx
	salq	$3, %rdi
	movl	$384, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	8(%rsp), %rdi
	movl	$12, %edx
	movl	$8, %esi
	call	_Z25__device_stub__Z4funcPiiiPiii
.L13:
	call	cudaThreadSynchronize@PLT
	xorl	%eax, %eax
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$96, %ecx
	movl	$384, %edx
	xorl	%r14d, %r14d
	rep stosl
	movl	$2, %ecx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
.L14:
	xorl	%ebx, %ebx
.L15:
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$12, %rbx
	jne	.L15
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addl	$12, %r14d
	call	__printf_chk@PLT
	addq	$48, %r12
	cmpl	$96, %r14d
	jne	.L14
	xorl	%eax, %eax
	movq	%rbp, %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	424(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$440, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z4funcPiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4funcPiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include "hip/hip_runtime.h"

#define M 8
#define N 12

extern __shared__ int shared[];

__global__ void func(int*data, int m,int n){
  int * t_s = shared;
//  __shared__ int t_s[12];

  if(threadIdx.x==0){
     memcpy(t_s + blockIdx.x*n,data + blockIdx.x*n,sizeof(int)*n);
  }
  __syncthreads();

  data[blockIdx.x*n + threadIdx.x] = 
  t_s[blockIdx.x*n + threadIdx.x+1];
}


int main(){

int h_d[M*N];
int *d_d;

  for(int i=0;i<M*N;i++)
    h_d[i]=i+1;
 
  for(int i=0;i<M;i++){
    for(int j=0;j<N;j++)
      printf("%2d ",h_d[i*N+j]);
    printf("\n");
  }
  printf("\n");

  hipMalloc((void**)&d_d,sizeof(int)*M*N);
  hipMemcpy(d_d,h_d,sizeof(int)*M*N,hipMemcpyHostToDevice);


  func<<<M,N-1,sizeof(int)*M*N>>>(d_d,M,N);

  hipDeviceSynchronize();

  memset(h_d,0,sizeof(int)*M*N);
  hipMemcpy(h_d,d_d,sizeof(int)*M*N,hipMemcpyDeviceToHost);

  for(int i=0;i<M;i++){
    for(int j=0;j<N;j++)
      printf("%2d ",h_d[i*N+j]);
    printf("\n");
  }
  printf("\n");



  return 0;

}

	.text
	.file	"main.hip"
	.globl	_Z19__device_stub__funcPiii     # -- Begin function _Z19__device_stub__funcPiii
	.type	_Z19__device_stub__funcPiii,@function
_Z19__device_stub__funcPiii:            # @_Z19__device_stub__funcPiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4funcPiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__funcPiii, .Lfunc_end0-_Z19__device_stub__funcPiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$400, %rsp                      # imm = 0x190
	.cfi_def_cfa_offset 432
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	leaq	1(%rax), %rcx
	movl	%ecx, 16(%rsp,%rax,4)
	movq	%rcx, %rax
	cmpq	$96, %rcx
	jne	.LBB1_1
# %bb.2:                                # %.preheader29.preheader
	leaq	16(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB1_3:                                # %.preheader29
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	xorl	%r15d, %r15d
.LBB1_4:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$12, %r15
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$48, %rbx
	cmpq	$8, %r14
	jne	.LBB1_3
# %bb.6:
	movl	$10, %edi
	callq	putchar@PLT
	leaq	8(%rsp), %rbx
	movl	$384, %esi                      # imm = 0x180
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	16(%rsp), %rbx
	movl	$384, %edx                      # imm = 0x180
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967304, %rdi               # imm = 0x100000008
	leaq	3(%rdi), %rdx
	movl	$384, %r8d                      # imm = 0x180
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:
	movq	8(%rsp), %rdi
	movl	$8, %esi
	movl	$12, %edx
	callq	_Z19__device_stub__funcPiii
.LBB1_8:
	callq	hipDeviceSynchronize
	movl	$384, %edx                      # imm = 0x180
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	8(%rsp), %rsi
	movl	$384, %edx                      # imm = 0x180
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r14d, %r14d
.LBB1_9:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_10 Depth 2
	xorl	%r15d, %r15d
.LBB1_10:                               #   Parent Loop BB1_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$12, %r15
	jne	.LBB1_10
# %bb.11:                               #   in Loop: Header=BB1_9 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$48, %rbx
	cmpq	$8, %r14
	jne	.LBB1_9
# %bb.12:
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%eax, %eax
	addq	$400, %rsp                      # imm = 0x190
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4funcPiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4funcPiii,@object             # @_Z4funcPiii
	.section	.rodata,"a",@progbits
	.globl	_Z4funcPiii
	.p2align	3, 0x0
_Z4funcPiii:
	.quad	_Z19__device_stub__funcPiii
	.size	_Z4funcPiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%2d "
	.size	.L.str, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4funcPiii"
	.size	.L__unnamed_1, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__funcPiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4funcPiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4funcPiii             ; -- Begin function _Z4funcPiii
	.globl	_Z4funcPiii
	.p2align	8
	.type	_Z4funcPiii,@function
_Z4funcPiii:                            ; @_Z4funcPiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0xc
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s3, 0
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s15, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v1, s2
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB0_5
; %bb.2:                                ; %.lr.ph.i.i.preheader
	s_lshl_b64 s[4:5], s[2:3], 2
	s_ashr_i32 s7, s6, 31
	s_add_u32 s4, s0, s4
	s_addc_u32 s5, s1, s5
	s_lshl_b32 s3, s2, 2
	s_lshl_b64 s[6:7], s[6:7], 2
	v_mov_b32_e32 v1, 0
	s_add_i32 s3, s3, 0
	s_sub_u32 s6, 0, s6
	s_subb_u32 s7, 0, s7
.LBB0_3:                                ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v2, v1, s[4:5]
	s_add_u32 s4, s4, 4
	v_mov_b32_e32 v3, s3
	s_addc_u32 s5, s5, 0
	s_add_i32 s3, s3, 4
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[6:7], 0
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v4, 8, v2
	v_lshrrev_b32_e32 v5, 24, v2
	ds_store_b8 v3, v2
	ds_store_b8 v3, v4 offset:1
	ds_store_b8_d16_hi v3, v2 offset:2
	ds_store_b8 v3, v5 offset:3
	s_cbranch_scc1 .LBB0_3
; %bb.4:
	s_mov_b32 s3, s2
.LBB0_5:                                ; %Flow15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v1, s3
.LBB0_6:                                ; %_ZL6memcpyPvPKvm.exit
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_lshl_add_u32 v1, v0, 2, 0
	ds_load_b32 v2, v1 offset:4
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4funcPiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4funcPiii, .Lfunc_end0-_Z4funcPiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4funcPiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4funcPiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
