#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>

// Comment out this line to enable debug mode
// #define NDEBUG

#define H_INDEX(i, j) (i) * numCols + (j)

/* time stamp function in seconds */
__host__ double getTimeStamp()
{
    struct timeval tv;
    gettimeofday(&tv, NULL);
    return (double)tv.tv_usec / 1000000 + tv.tv_sec;
}

__host__ void initX(float *X, int numRows, int numCols)
{
    for (int i = 0; i < numRows; i++)
    {
        int ibase = i * numCols;
        for (int j = 0; j < numCols; j++)
        {
            // h_X[i,j] = (float) (i+j)/2.0;
            X[ibase + j] = (float)(i + j) / 2.0;
        }
    }
}

__host__ void initY(float *Y, int numRows, int numCols)
{
    for (int i = 0; i < numRows; i++)
    {
        int ibase = i * numCols;
        for (int j = 0; j < numCols; j++)
        {
            // h_Y[i,j] = (float) 3.25*(i+j);
            Y[ibase + j] = (float)3.25 * (i + j);
        }
    }
}

__host__ float f_siggen_reference_get(float *M, int i, int j, int numRows, int numCols)
{
    if (i < 0 || i >= numRows || j < 0 || j >= numCols)
    {
        return 0;
    }
    return M[i * numCols + j];
}

__host__ void f_siggen_reference(float *X, float *Y, float *Z, int numRows, int numCols)
{
    for (int i = 0; i < numRows; i++)
    {
        int ibase = i * numCols;
        for (int j = 0; j < numCols; j++)
        {
            // Z[i,j] = X[i-1,j] + X[i,j] + X[i+1,j] – Y[i,j-2] – Y[i,j-1] – Y[i,j]
            Z[ibase + j] =
                f_siggen_reference_get(X, i - 1, j, numRows, numCols) +
                f_siggen_reference_get(X, i, j, numRows, numCols) +
                f_siggen_reference_get(X, i + 1, j, numRows, numCols) -
                f_siggen_reference_get(Y, i, j - 2, numRows, numCols) -
                f_siggen_reference_get(Y, i, j - 1, numRows, numCols) -
                f_siggen_reference_get(Y, i, j, numRows, numCols);
        }
    }
}

__host__ int checkZ(float *E, float *A, int numRows, int numCols)
{
    for (int i = 0; i < numRows; i++)
    {
        int ibase = i * numCols;
        for (int j = 0; j < numCols; j++)
        {
            if (E[ibase + j] != A[ibase + j])
            {
                return 0;
            }
        }
    }
    return 1;
}

__global__ void f_siggen(float *X, float *Y, float *Z, int numRows, int numCols, int smemNumElemX)
{
    extern __shared__ float s_data[];
    float *s_XT = s_data; // blockDim.x * (blockDim.y + 2);
    int s_XTWidth = (blockDim.y + 2);
    // int s_XTHeight = blockDim.x;
    float *s_Y = s_XT + smemNumElemX; // (blockDim.x + 2) * blockDim.y;

    /* Global Coordinate */
    int globalX = blockDim.x * blockIdx.x + threadIdx.x;
    int globalY = blockDim.y * blockIdx.y + threadIdx.y;
    int globalIdx = globalY * numCols + globalX;

    if (globalX >= numCols || globalY >= numRows)
        return;

    /* Set Up s_XT */
    int s_XT_x = threadIdx.y + 1;
    int s_XT_y = threadIdx.x;
    int s_XT_idx = s_XT_y * s_XTWidth + s_XT_x;
    if (globalY == 0)
    {
        s_XT[s_XT_idx - 1] = 0;
    }
    else if (threadIdx.y == 0)
    {
        s_XT[s_XT_idx - 1] = X[globalIdx - numCols];
    }
    if (globalY == numRows - 1)
    {
        s_XT[s_XT_idx + 1] = 0;
    }
    else if (threadIdx.y == blockDim.y - 1)
    {
        s_XT[s_XT_idx + 1] = X[globalIdx + numCols];
    }
    s_XT[s_XT_idx] = X[globalIdx];

    /* Set Up s_Y */
    int s_Y_x = threadIdx.x + 2;
    int s_Y_y = threadIdx.y;
    int s_Y_idx = s_Y_y * (blockDim.x + 2) + s_Y_x;
    if (globalX == 0)
    {
        s_Y[s_Y_idx - 2] = 0;
        s_Y[s_Y_idx - 1] = 0;
    }
    else if (threadIdx.x == 0)
    {
        s_Y[s_Y_idx - 2] = Y[globalIdx - 2];
        s_Y[s_Y_idx - 1] = Y[globalIdx - 1];
    }
    s_Y[s_Y_idx] = Y[globalIdx];

    /* Wait for All to Set Up s_XT and s_Y */
    __syncthreads();

    /* Write Output */
    Z[globalIdx] = s_XT[s_XT_idx - 1] + s_XT[s_XT_idx] + s_XT[s_XT_idx + 1] - s_Y[s_Y_idx - 2] - s_Y[s_Y_idx - 1] - s_Y[s_Y_idx];
}

int main(int argc, char *argv[])
{
    int error = 0;
    /* Get Dimension */
    if (argc != 3)
    {
        printf("Error: The number of arguments is not exactly 2\n");
        return 0;
    }
    int numRows = atoi(argv[1]);
    int numCols = atoi(argv[2]);
    size_t numElem = numRows * numCols;
    size_t numBytes = numElem * sizeof(float);

#ifndef NDEBUG
    printf("numRows=%d, numCols=%d, numElem=%ld, numBytes=%ld\n", numRows, numCols, numElem, numBytes);
#endif

    /* Allocate Host Memory */
    float *h_X = NULL;
    float *h_Y = NULL;
    float *h_hZ = (float *)malloc(numBytes);
    float *h_dZ = NULL;
    error = error || cudaHostAlloc((void **)&h_X, numBytes, 0);
    error = error || cudaHostAlloc((void **)&h_Y, numBytes, 0);
    error = error || cudaHostAlloc((void **)&h_dZ, numBytes, 0);
    if (error)
    {
        printf("Error: cudaHostAlloc returns error\n");
        return 0;
    }

    /* Initialize Host Memory */
    initX(h_X, numRows, numCols);
    initY(h_Y, numRows, numCols);
#ifndef NDEBUG
    double timestampPreCpuKernel = getTimeStamp();
#endif
    f_siggen_reference(h_X, h_Y, h_hZ, numRows, numCols);
#ifndef NDEBUG
    double timestampPostCpuKernel = getTimeStamp();
    printf("CPU=%.6fsec\n", timestampPostCpuKernel - timestampPreCpuKernel);
#endif

    /* Allocate Device Memory */
    float *d_X = NULL;
    float *d_Y = NULL;
    float *d_Z = NULL;
    error = error || cudaMalloc((void **)&d_X, numBytes);
    error = error || cudaMalloc((void **)&d_Y, numBytes);
    error = error || cudaMalloc((void **)&d_Z, numBytes);
    if (error)
    {
        printf("Error: cudaMalloc returns error\n");
        return 0;
    }

    /* Copy Host Memory to Device Memory */
    double timestampPreCpuGpuTransfer = getTimeStamp();
    error = error || cudaMemcpy(d_X, h_X, numBytes, cudaMemcpyHostToDevice);
    error = error || cudaMemcpy(d_Y, h_Y, numBytes, cudaMemcpyHostToDevice);
    if (error)
    {
        printf("Error: cudaMemcpy returns error\n");
        return 0;
    }

    /* Run Kernel */
    double timestampPreKernel = getTimeStamp();
    dim3 d_blockDim;
    d_blockDim.x = 32;
    d_blockDim.y = 32;
    dim3 d_gridDim;
    d_gridDim.x = (numCols - 1) / d_blockDim.x + 1;
    d_gridDim.y = (numRows - 1) / d_blockDim.y + 1;
    int d_smemNumElemX = d_blockDim.x * (d_blockDim.y + 2);
    int d_smemNumElemY = (d_blockDim.x + 2) * d_blockDim.y;
    size_t d_smemNumBytes = (d_smemNumElemX + d_smemNumElemY) * sizeof(float);
    f_siggen<<<d_gridDim, d_blockDim, d_smemNumBytes>>>(d_X, d_Y, d_Z, numRows, numCols, d_smemNumElemX);
    cudaDeviceSynchronize();

    /* Copy Device Memory to Host Memory */
    double timestampPreGpuCpuTransfer = getTimeStamp();
    error = error || cudaMemcpy(h_dZ, d_Z, numBytes, cudaMemcpyDeviceToHost);
    if (error)
    {
        printf("Error: cudaMemcpy returns error\n");
        return 0;
    }
    double timestampPostGpuCpuTransfer = getTimeStamp();

    /* Free Device Memory */
    cudaFree(d_Z);
    d_Z = NULL;
    cudaFree(d_Y);
    d_Y = NULL;
    cudaFree(d_X);
    d_X = NULL;

    /* Verify Device Result with Host Result */
    error = error || !checkZ(h_hZ, h_dZ, numRows, numCols);

    /* Output */
#ifndef NDEBUG
    printf("d_gridDim=(%d, %d), d_blockDim=(%d, %d), d_smemNumBytes=%ld\n", d_gridDim.x, d_gridDim.y, d_blockDim.x, d_blockDim.y, d_smemNumBytes);
#endif

    if (!error)
    {
        // #ifndef NDEBUG
        //         printf("<total_GPU_time> <CPU_GPU_transfer_time> <kernel_time> <GPU_CPU_transfer_time> <Z-value> <nl>\n");
        // #endif
        float totalGpuElapased = timestampPostGpuCpuTransfer - timestampPreCpuGpuTransfer;
        float cpuGpuTransferElapsed = timestampPreKernel - timestampPreCpuGpuTransfer;
        float kernelElapsed = timestampPreGpuCpuTransfer - timestampPreKernel;
        float gpuCpuTransferElapsed = timestampPostGpuCpuTransfer - timestampPreGpuCpuTransfer;
        int zValueI = 5;
        int zValueJ = 5;
        float zValue = h_dZ[H_INDEX(zValueI, zValueJ)];
        printf("%.6f %.6f %.6f %.6f %.6f\n", totalGpuElapased, cpuGpuTransferElapsed, kernelElapsed, gpuCpuTransferElapsed, zValue);
    }
    else
    {
        printf("Error: GPU result does not with CPU result\n");
#ifndef NDEBUG
        for (int i = 0; i < 4; i++)
        {
            for (int j = 0; j < 4; j++)
            {
                printf("(i=%d, j=%d), CPU=%.6f, GPU=%.6f, X=%.6f, Y=%.6f\n", i, j, h_hZ[H_INDEX(i, j)], h_dZ[H_INDEX(i, j)], h_X[H_INDEX(i, j)], h_Y[H_INDEX(i, j)]);
            }
        }
#endif
    }

    /* Free Host Memory */
    cudaFreeHost(h_dZ);
    h_dZ = NULL;
    free(h_hZ);
    h_hZ = NULL;
    cudaFreeHost(h_Y);
    h_Y = NULL;
    cudaFreeHost(h_X);
    h_X = NULL;

    /* Clean Up Device Resource */
    cudaDeviceReset();
}
	.file	"tmpxft_0038859e_00000000-6_1001721498_003.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12getTimeStampv
	.type	_Z12getTimeStampv, @function
_Z12getTimeStampv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	8(%rsp), %xmm1
	cvtsi2sdq	16(%rsp), %xmm0
	divsd	.LC0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12getTimeStampv, .-_Z12getTimeStampv
	.globl	_Z5initXPfii
	.type	_Z5initXPfii, @function
_Z5initXPfii:
.LFB2028:
	.cfi_startproc
	endbr64
	movslq	%edx, %r8
	movss	.LC1(%rip), %xmm1
	xorl	%ecx, %ecx
	salq	$2, %r8
.L7:
	cmpl	%esi, %ecx
	jge	.L11
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %edx
	jle	.L12
	leal	(%rcx,%rax), %r9d
	cvtsi2ssl	%r9d, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L9
.L12:
	incl	%ecx
	addq	%r8, %rdi
	jmp	.L7
.L11:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z5initXPfii, .-_Z5initXPfii
	.globl	_Z5initYPfii
	.type	_Z5initYPfii, @function
_Z5initYPfii:
.LFB2029:
	.cfi_startproc
	endbr64
	movslq	%edx, %r8
	movss	.LC2(%rip), %xmm1
	xorl	%ecx, %ecx
	salq	$2, %r8
.L14:
	cmpl	%esi, %ecx
	jge	.L18
	xorl	%eax, %eax
.L16:
	cmpl	%eax, %edx
	jle	.L19
	leal	(%rcx,%rax), %r9d
	cvtsi2ssl	%r9d, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L16
.L19:
	incl	%ecx
	addq	%r8, %rdi
	jmp	.L14
.L18:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z5initYPfii, .-_Z5initYPfii
	.globl	_Z22f_siggen_reference_getPfiiii
	.type	_Z22f_siggen_reference_getPfiiii, @function
_Z22f_siggen_reference_getPfiiii:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	movl	%esi, %edi
	xorps	%xmm0, %xmm0
	orl	%edx, %edi
	js	.L20
	cmpl	%ecx, %esi
	jge	.L20
	cmpl	%r8d, %edx
	jge	.L20
	imull	%r8d, %esi
	addl	%edx, %esi
	movslq	%esi, %rsi
	movss	(%rax,%rsi,4), %xmm0
	ret
.L20:
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z22f_siggen_reference_getPfiiii, .-_Z22f_siggen_reference_getPfiiii
	.globl	_Z18f_siggen_referencePfS_S_ii
	.type	_Z18f_siggen_referencePfS_S_ii, @function
_Z18f_siggen_referencePfS_S_ii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r11
	movq	%rdx, %r15
	xorl	%r9d, %r9d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movslq	%r8d, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	salq	$2, %r12
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
.L25:
	cmpl	%ecx, %r9d
	jge	.L30
	xorl	%r10d, %r10d
	leal	1(%r9), %r13d
	leal	-1(%r9), %r14d
.L27:
	movl	%r10d, %ebp
	cmpl	%r10d, %r8d
	jle	.L31
	movl	%ebp, %edx
	movl	%r14d, %esi
	movq	%r11, %rdi
	call	_Z22f_siggen_reference_getPfiiii
	movl	%r9d, %esi
	movq	%r11, %rdi
	movaps	%xmm0, %xmm1
	call	_Z22f_siggen_reference_getPfiiii
	movl	%r13d, %esi
	movq	%r11, %rdi
	addss	%xmm0, %xmm1
	call	_Z22f_siggen_reference_getPfiiii
	leal	-2(%r10), %edx
	movl	%r9d, %esi
	movq	%rbx, %rdi
	addss	%xmm0, %xmm1
	call	_Z22f_siggen_reference_getPfiiii
	leal	-1(%r10), %edx
	movl	%r9d, %esi
	movq	%rbx, %rdi
	subss	%xmm0, %xmm1
	call	_Z22f_siggen_reference_getPfiiii
	movl	%ebp, %edx
	movl	%r9d, %esi
	movq	%rbx, %rdi
	subss	%xmm0, %xmm1
	call	_Z22f_siggen_reference_getPfiiii
	subss	%xmm0, %xmm1
	movss	%xmm1, (%r15,%r10,4)
	incq	%r10
	jmp	.L27
.L31:
	movl	%r13d, %r9d
	addq	%r12, %r15
	jmp	.L25
.L30:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z18f_siggen_referencePfS_S_ii, .-_Z18f_siggen_referencePfS_S_ii
	.globl	_Z6checkZPfS_ii
	.type	_Z6checkZPfS_ii, @function
_Z6checkZPfS_ii:
.LFB2032:
	.cfi_startproc
	endbr64
	movslq	%ecx, %r8
	movq	%rdi, %r10
	xorl	%r9d, %r9d
	xorl	%edi, %edi
	salq	$2, %r8
.L33:
	cmpl	%edx, %edi
	jge	.L41
	movq	%r9, %rax
	xorl	%r11d, %r11d
.L37:
	cmpl	%ecx, %r11d
	jge	.L42
	movss	(%r10,%rax), %xmm0
	addq	$4, %rax
	ucomiss	-4(%rsi,%rax), %xmm0
	jp	.L38
	jne	.L38
	incl	%r11d
	jmp	.L37
.L42:
	incl	%edi
	addq	%r8, %r9
	jmp	.L33
.L41:
	movl	$1, %eax
	ret
.L38:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z6checkZPfS_ii, .-_Z6checkZPfS_ii
	.globl	_Z34__device_stub__Z8f_siggenPfS_S_iiiPfS_S_iii
	.type	_Z34__device_stub__Z8f_siggenPfS_S_iiiPfS_S_iii, @function
_Z34__device_stub__Z8f_siggenPfS_S_iiiPfS_S_iii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8f_siggenPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L43:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z34__device_stub__Z8f_siggenPfS_S_iiiPfS_S_iii, .-_Z34__device_stub__Z8f_siggenPfS_S_iiiPfS_S_iii
	.globl	_Z8f_siggenPfS_S_iii
	.type	_Z8f_siggenPfS_S_iii, @function
_Z8f_siggenPfS_S_iii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z8f_siggenPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2059:
	.size	_Z8f_siggenPfS_S_iii, .-_Z8f_siggenPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"Error: The number of arguments is not exactly 2\n"
.LC5:
	.string	"Error: cudaHostAlloc returns error\n"
.LC6:
	.string	"Error: cudaMalloc returns error\n"
.LC7:
	.string	"Error: cudaMemcpy returns error\n"
.LC8:
	.string	"%.6f %.6f %.6f %.6f %.6f\n"
.LC9:
	.string	"Error: GPU result does not with CPU result\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$120, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	je	.L49
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	jmp	.L66
.L49:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbx
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %r13d
	call	atoi@PLT
	movl	%r13d, %ebp
	xorl	%r10d, %r10d
	imull	%eax, %ebp
	movq	%r10, 32(%rsp)
	movl	%eax, %ebx
	movq	%r10, 40(%rsp)
	movslq	%ebp, %rbp
	salq	$2, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	xorl	%r11d, %r11d
	xorl	%edx, %edx
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r11, 48(%rsp)
	movq	%rax, %r12
	call	cudaHostAlloc@PLT
	testl	%eax, %eax
	jne	.L51
	xorl	%edx, %edx
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaHostAlloc@PLT
	testl	%eax, %eax
	jne	.L51
	xorl	%edx, %edx
	leaq	48(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaHostAlloc@PLT
	testl	%eax, %eax
	jne	.L51
	movq	32(%rsp), %r10
	movl	%ebx, %edx
	movl	%r13d, %esi
	movq	%r10, %rdi
	call	_Z5initXPfii
	movq	40(%rsp), %r11
	movq	%r11, %rdi
	call	_Z5initYPfii
	movq	%r11, %rsi
	movq	%r10, %rdi
	movl	%ebx, %r8d
	movl	%r13d, %ecx
	movq	%r12, %rdx
	call	_Z18f_siggen_referencePfS_S_ii
	xorl	%r9d, %r9d
	leaq	56(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r9, 56(%rsp)
	movq	%r9, 64(%rsp)
	movq	%r9, 72(%rsp)
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L62
	jmp	.L52
.L51:
	leaq	.LC5(%rip), %rsi
.L67:
	movl	$2, %edi
	xorl	%eax, %eax
.L66:
	call	__printf_chk@PLT
	jmp	.L50
.L62:
	leaq	64(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L52
	leaq	72(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L52
	call	_Z12getTimeStampv
	movq	32(%rsp), %rsi
	movq	56(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movsd	%xmm0, (%rsp)
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L63
	jmp	.L58
.L52:
	leaq	.LC6(%rip), %rsi
	jmp	.L67
.L63:
	movq	40(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rdx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	jne	.L58
	call	_Z12getTimeStampv
	leal	-1(%rbx), %eax
	xorl	%r9d, %r9d
	movl	$1, %ecx
	shrl	$5, %eax
	movl	$8704, %r8d
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	incl	%eax
	movl	$1, 100(%rsp)
	movl	%eax, 92(%rsp)
	leal	-1(%r13), %eax
	shrl	$5, %eax
	movq	%rdx, 80(%rsp)
	incl	%eax
	movl	$1, 88(%rsp)
	movl	%eax, 96(%rsp)
	movq	92(%rsp), %rdi
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	%ebx, %r8d
	movl	%r13d, %ecx
	movq	56(%rsp), %rdi
	movl	$1088, %r9d
	call	_Z34__device_stub__Z8f_siggenPfS_S_iiiPfS_S_iii
.L56:
	call	cudaDeviceSynchronize@PLT
	call	_Z12getTimeStampv
	movq	72(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	movsd	%xmm0, 16(%rsp)
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L68
.L58:
	leaq	.LC7(%rip), %rsi
	jmp	.L67
.L68:
	call	_Z12getTimeStampv
	movq	72(%rsp), %rdi
	movsd	%xmm0, 24(%rsp)
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rsi, 72(%rsp)
	call	cudaFree@PLT
	xorl	%edi, %edi
	movq	%rdi, 64(%rsp)
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rsi
	xorl	%r8d, %r8d
	movl	%ebx, %ecx
	movl	%r13d, %edx
	movq	%r12, %rdi
	movq	%r8, 56(%rsp)
	call	_Z6checkZPfS_ii
	testl	%eax, %eax
	je	.L59
	movsd	24(%rsp), %xmm0
	incl	%ebx
	movsd	16(%rsp), %xmm2
	movb	$5, %al
	subsd	8(%rsp), %xmm2
	movsd	8(%rsp), %xmm1
	leal	(%rbx,%rbx,4), %ebx
	movl	$2, %edi
	subsd	(%rsp), %xmm1
	movaps	%xmm0, %xmm3
	subsd	(%rsp), %xmm0
	movslq	%ebx, %rbx
	subsd	16(%rsp), %xmm3
	cvtss2sd	(%rsi,%rbx,4), %xmm4
	leaq	.LC8(%rip), %rsi
	cvtsd2ss	%xmm2, %xmm2
	cvtss2sd	%xmm2, %xmm2
	cvtsd2ss	%xmm1, %xmm1
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	cvtss2sd	%xmm0, %xmm0
	cvtsd2ss	%xmm3, %xmm3
	cvtss2sd	%xmm3, %xmm3
	call	__printf_chk@PLT
	jmp	.L60
.L59:
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L60:
	movq	48(%rsp), %rdi
	call	cudaFreeHost@PLT
	xorl	%eax, %eax
	movq	%r12, %rdi
	movq	%rax, 48(%rsp)
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	32(%rsp), %rdi
	xorl	%edx, %edx
	movq	%rdx, 40(%rsp)
	call	cudaFreeHost@PLT
	xorl	%ecx, %ecx
	movq	%rcx, 32(%rsp)
	call	cudaDeviceReset@PLT
.L50:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$120, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z8f_siggenPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8f_siggenPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1056964608
	.align 4
.LC2:
	.long	1078984704
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>

// Comment out this line to enable debug mode
// #define NDEBUG

#define H_INDEX(i, j) (i) * numCols + (j)

/* time stamp function in seconds */
__host__ double getTimeStamp()
{
    struct timeval tv;
    gettimeofday(&tv, NULL);
    return (double)tv.tv_usec / 1000000 + tv.tv_sec;
}

__host__ void initX(float *X, int numRows, int numCols)
{
    for (int i = 0; i < numRows; i++)
    {
        int ibase = i * numCols;
        for (int j = 0; j < numCols; j++)
        {
            // h_X[i,j] = (float) (i+j)/2.0;
            X[ibase + j] = (float)(i + j) / 2.0;
        }
    }
}

__host__ void initY(float *Y, int numRows, int numCols)
{
    for (int i = 0; i < numRows; i++)
    {
        int ibase = i * numCols;
        for (int j = 0; j < numCols; j++)
        {
            // h_Y[i,j] = (float) 3.25*(i+j);
            Y[ibase + j] = (float)3.25 * (i + j);
        }
    }
}

__host__ float f_siggen_reference_get(float *M, int i, int j, int numRows, int numCols)
{
    if (i < 0 || i >= numRows || j < 0 || j >= numCols)
    {
        return 0;
    }
    return M[i * numCols + j];
}

__host__ void f_siggen_reference(float *X, float *Y, float *Z, int numRows, int numCols)
{
    for (int i = 0; i < numRows; i++)
    {
        int ibase = i * numCols;
        for (int j = 0; j < numCols; j++)
        {
            // Z[i,j] = X[i-1,j] + X[i,j] + X[i+1,j] – Y[i,j-2] – Y[i,j-1] – Y[i,j]
            Z[ibase + j] =
                f_siggen_reference_get(X, i - 1, j, numRows, numCols) +
                f_siggen_reference_get(X, i, j, numRows, numCols) +
                f_siggen_reference_get(X, i + 1, j, numRows, numCols) -
                f_siggen_reference_get(Y, i, j - 2, numRows, numCols) -
                f_siggen_reference_get(Y, i, j - 1, numRows, numCols) -
                f_siggen_reference_get(Y, i, j, numRows, numCols);
        }
    }
}

__host__ int checkZ(float *E, float *A, int numRows, int numCols)
{
    for (int i = 0; i < numRows; i++)
    {
        int ibase = i * numCols;
        for (int j = 0; j < numCols; j++)
        {
            if (E[ibase + j] != A[ibase + j])
            {
                return 0;
            }
        }
    }
    return 1;
}

__global__ void f_siggen(float *X, float *Y, float *Z, int numRows, int numCols, int smemNumElemX)
{
    extern __shared__ float s_data[];
    float *s_XT = s_data; // blockDim.x * (blockDim.y + 2);
    int s_XTWidth = (blockDim.y + 2);
    // int s_XTHeight = blockDim.x;
    float *s_Y = s_XT + smemNumElemX; // (blockDim.x + 2) * blockDim.y;

    /* Global Coordinate */
    int globalX = blockDim.x * blockIdx.x + threadIdx.x;
    int globalY = blockDim.y * blockIdx.y + threadIdx.y;
    int globalIdx = globalY * numCols + globalX;

    if (globalX >= numCols || globalY >= numRows)
        return;

    /* Set Up s_XT */
    int s_XT_x = threadIdx.y + 1;
    int s_XT_y = threadIdx.x;
    int s_XT_idx = s_XT_y * s_XTWidth + s_XT_x;
    if (globalY == 0)
    {
        s_XT[s_XT_idx - 1] = 0;
    }
    else if (threadIdx.y == 0)
    {
        s_XT[s_XT_idx - 1] = X[globalIdx - numCols];
    }
    if (globalY == numRows - 1)
    {
        s_XT[s_XT_idx + 1] = 0;
    }
    else if (threadIdx.y == blockDim.y - 1)
    {
        s_XT[s_XT_idx + 1] = X[globalIdx + numCols];
    }
    s_XT[s_XT_idx] = X[globalIdx];

    /* Set Up s_Y */
    int s_Y_x = threadIdx.x + 2;
    int s_Y_y = threadIdx.y;
    int s_Y_idx = s_Y_y * (blockDim.x + 2) + s_Y_x;
    if (globalX == 0)
    {
        s_Y[s_Y_idx - 2] = 0;
        s_Y[s_Y_idx - 1] = 0;
    }
    else if (threadIdx.x == 0)
    {
        s_Y[s_Y_idx - 2] = Y[globalIdx - 2];
        s_Y[s_Y_idx - 1] = Y[globalIdx - 1];
    }
    s_Y[s_Y_idx] = Y[globalIdx];

    /* Wait for All to Set Up s_XT and s_Y */
    __syncthreads();

    /* Write Output */
    Z[globalIdx] = s_XT[s_XT_idx - 1] + s_XT[s_XT_idx] + s_XT[s_XT_idx + 1] - s_Y[s_Y_idx - 2] - s_Y[s_Y_idx - 1] - s_Y[s_Y_idx];
}

int main(int argc, char *argv[])
{
    int error = 0;
    /* Get Dimension */
    if (argc != 3)
    {
        printf("Error: The number of arguments is not exactly 2\n");
        return 0;
    }
    int numRows = atoi(argv[1]);
    int numCols = atoi(argv[2]);
    size_t numElem = numRows * numCols;
    size_t numBytes = numElem * sizeof(float);

#ifndef NDEBUG
    printf("numRows=%d, numCols=%d, numElem=%ld, numBytes=%ld\n", numRows, numCols, numElem, numBytes);
#endif

    /* Allocate Host Memory */
    float *h_X = NULL;
    float *h_Y = NULL;
    float *h_hZ = (float *)malloc(numBytes);
    float *h_dZ = NULL;
    error = error || hipHostAlloc((void **)&h_X, numBytes, 0);
    error = error || hipHostAlloc((void **)&h_Y, numBytes, 0);
    error = error || hipHostAlloc((void **)&h_dZ, numBytes, 0);
    if (error)
    {
        printf("Error: hipHostAlloc returns error\n");
        return 0;
    }

    /* Initialize Host Memory */
    initX(h_X, numRows, numCols);
    initY(h_Y, numRows, numCols);
#ifndef NDEBUG
    double timestampPreCpuKernel = getTimeStamp();
#endif
    f_siggen_reference(h_X, h_Y, h_hZ, numRows, numCols);
#ifndef NDEBUG
    double timestampPostCpuKernel = getTimeStamp();
    printf("CPU=%.6fsec\n", timestampPostCpuKernel - timestampPreCpuKernel);
#endif

    /* Allocate Device Memory */
    float *d_X = NULL;
    float *d_Y = NULL;
    float *d_Z = NULL;
    error = error || hipMalloc((void **)&d_X, numBytes);
    error = error || hipMalloc((void **)&d_Y, numBytes);
    error = error || hipMalloc((void **)&d_Z, numBytes);
    if (error)
    {
        printf("Error: hipMalloc returns error\n");
        return 0;
    }

    /* Copy Host Memory to Device Memory */
    double timestampPreCpuGpuTransfer = getTimeStamp();
    error = error || hipMemcpy(d_X, h_X, numBytes, hipMemcpyHostToDevice);
    error = error || hipMemcpy(d_Y, h_Y, numBytes, hipMemcpyHostToDevice);
    if (error)
    {
        printf("Error: hipMemcpy returns error\n");
        return 0;
    }

    /* Run Kernel */
    double timestampPreKernel = getTimeStamp();
    dim3 d_blockDim;
    d_blockDim.x = 32;
    d_blockDim.y = 32;
    dim3 d_gridDim;
    d_gridDim.x = (numCols - 1) / d_blockDim.x + 1;
    d_gridDim.y = (numRows - 1) / d_blockDim.y + 1;
    int d_smemNumElemX = d_blockDim.x * (d_blockDim.y + 2);
    int d_smemNumElemY = (d_blockDim.x + 2) * d_blockDim.y;
    size_t d_smemNumBytes = (d_smemNumElemX + d_smemNumElemY) * sizeof(float);
    f_siggen<<<d_gridDim, d_blockDim, d_smemNumBytes>>>(d_X, d_Y, d_Z, numRows, numCols, d_smemNumElemX);
    hipDeviceSynchronize();

    /* Copy Device Memory to Host Memory */
    double timestampPreGpuCpuTransfer = getTimeStamp();
    error = error || hipMemcpy(h_dZ, d_Z, numBytes, hipMemcpyDeviceToHost);
    if (error)
    {
        printf("Error: hipMemcpy returns error\n");
        return 0;
    }
    double timestampPostGpuCpuTransfer = getTimeStamp();

    /* Free Device Memory */
    hipFree(d_Z);
    d_Z = NULL;
    hipFree(d_Y);
    d_Y = NULL;
    hipFree(d_X);
    d_X = NULL;

    /* Verify Device Result with Host Result */
    error = error || !checkZ(h_hZ, h_dZ, numRows, numCols);

    /* Output */
#ifndef NDEBUG
    printf("d_gridDim=(%d, %d), d_blockDim=(%d, %d), d_smemNumBytes=%ld\n", d_gridDim.x, d_gridDim.y, d_blockDim.x, d_blockDim.y, d_smemNumBytes);
#endif

    if (!error)
    {
        // #ifndef NDEBUG
        //         printf("<total_GPU_time> <CPU_GPU_transfer_time> <kernel_time> <GPU_CPU_transfer_time> <Z-value> <nl>\n");
        // #endif
        float totalGpuElapased = timestampPostGpuCpuTransfer - timestampPreCpuGpuTransfer;
        float cpuGpuTransferElapsed = timestampPreKernel - timestampPreCpuGpuTransfer;
        float kernelElapsed = timestampPreGpuCpuTransfer - timestampPreKernel;
        float gpuCpuTransferElapsed = timestampPostGpuCpuTransfer - timestampPreGpuCpuTransfer;
        int zValueI = 5;
        int zValueJ = 5;
        float zValue = h_dZ[H_INDEX(zValueI, zValueJ)];
        printf("%.6f %.6f %.6f %.6f %.6f\n", totalGpuElapased, cpuGpuTransferElapsed, kernelElapsed, gpuCpuTransferElapsed, zValue);
    }
    else
    {
        printf("Error: GPU result does not with CPU result\n");
#ifndef NDEBUG
        for (int i = 0; i < 4; i++)
        {
            for (int j = 0; j < 4; j++)
            {
                printf("(i=%d, j=%d), CPU=%.6f, GPU=%.6f, X=%.6f, Y=%.6f\n", i, j, h_hZ[H_INDEX(i, j)], h_dZ[H_INDEX(i, j)], h_X[H_INDEX(i, j)], h_Y[H_INDEX(i, j)]);
            }
        }
#endif
    }

    /* Free Host Memory */
    hipHostFree(h_dZ);
    h_dZ = NULL;
    free(h_hZ);
    h_hZ = NULL;
    hipHostFree(h_Y);
    h_Y = NULL;
    hipHostFree(h_X);
    h_X = NULL;

    /* Clean Up Device Resource */
    hipDeviceReset();
}
	.text
	.file	"1001721498_003.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z12getTimeStampv
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z12getTimeStampv
	.type	_Z12getTimeStampv,@function
_Z12getTimeStampv:                      # @_Z12getTimeStampv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	8(%rbx), %xmm1
	divsd	.LCPI0_0(%rip), %xmm1
	cvtsi2sdq	(%rbx), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z12getTimeStampv, .Lfunc_end0-_Z12getTimeStampv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z5initXPfii
.LCPI1_0:
	.long	0x3f000000                      # float 0.5
	.text
	.globl	_Z5initXPfii
	.type	_Z5initXPfii,@function
_Z5initXPfii:                           # @_Z5initXPfii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_6
# %bb.1:                                # %.lr.ph16
	movl	%esi, %eax
	movl	%edx, %ecx
	xorl	%esi, %esi
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorl	%r8d, %r8d
.LBB1_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%edx, %edx
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%esi, %r9d
	leaq	(%rdi,%r9,4), %r9
	xorl	%r10d, %r10d
.LBB1_4:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r8,%r10), %r11d
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r11d, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%r9,%r10,4)
	incq	%r10
	cmpq	%r10, %rcx
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r8
	addl	%edx, %esi
	cmpq	%rax, %r8
	jne	.LBB1_2
.LBB1_6:                                # %._crit_edge17
	retq
.Lfunc_end1:
	.size	_Z5initXPfii, .Lfunc_end1-_Z5initXPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z5initYPfii
.LCPI2_0:
	.long	0x40500000                      # float 3.25
	.text
	.globl	_Z5initYPfii
	.type	_Z5initYPfii,@function
_Z5initYPfii:                           # @_Z5initYPfii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB2_6
# %bb.1:                                # %.lr.ph16
	movl	%esi, %eax
	movl	%edx, %ecx
	xorl	%esi, %esi
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorl	%r8d, %r8d
.LBB2_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%edx, %edx
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%esi, %r9d
	leaq	(%rdi,%r9,4), %r9
	xorl	%r10d, %r10d
.LBB2_4:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r8,%r10), %r11d
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r11d, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%r9,%r10,4)
	incq	%r10
	cmpq	%r10, %rcx
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r8
	addl	%edx, %esi
	cmpq	%rax, %r8
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge17
	retq
.Lfunc_end2:
	.size	_Z5initYPfii, .Lfunc_end2-_Z5initYPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22f_siggen_reference_getPfiiii # -- Begin function _Z22f_siggen_reference_getPfiiii
	.type	_Z22f_siggen_reference_getPfiiii,@function
_Z22f_siggen_reference_getPfiiii:       # @_Z22f_siggen_reference_getPfiiii
	.cfi_startproc
# %bb.0:
	xorps	%xmm0, %xmm0
	testl	%esi, %esi
	js	.LBB3_5
# %bb.1:
	testl	%edx, %edx
	js	.LBB3_5
# %bb.2:
	cmpl	%ecx, %esi
	jge	.LBB3_5
# %bb.3:
	cmpl	%r8d, %edx
	jge	.LBB3_5
# %bb.4:
	imull	%esi, %r8d
	addl	%edx, %r8d
	movslq	%r8d, %rax
	movss	(%rdi,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
.LBB3_5:
	retq
.Lfunc_end3:
	.size	_Z22f_siggen_reference_getPfiiii, .Lfunc_end3-_Z22f_siggen_reference_getPfiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z18f_siggen_referencePfS_S_ii  # -- Begin function _Z18f_siggen_referencePfS_S_ii
	.type	_Z18f_siggen_referencePfS_S_ii,@function
_Z18f_siggen_referencePfS_S_ii:         # @_Z18f_siggen_referencePfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, -36(%rsp)                 # 4-byte Spill
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB4_5
# %bb.1:                                # %.lr.ph77
	movslq	-36(%rsp), %rax                 # 4-byte Folded Reload
	movl	%ecx, %ecx
	movl	%eax, %r9d
	leaq	(,%rax,4), %rdx
	movq	%rdx, -24(%rsp)                 # 8-byte Spill
	movq	%rax, -16(%rsp)                 # 8-byte Spill
	shlq	$32, %rax
	movq	%rax, -32(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
	movabsq	$4294967296, %r15               # imm = 0x100000000
.LBB4_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_7 Depth 2
	cmpl	$0, -36(%rsp)                   # 4-byte Folded Reload
	jle	.LBB4_3
# %bb.6:                                # %.lr.ph
                                        #   in Loop: Header=BB4_2 Depth=1
	leaq	-1(%rbx), %rax
	movq	-16(%rsp), %r8                  # 8-byte Reload
	imulq	%r8, %rax
	leaq	1(%rbx), %r12
	movq	%r12, %rdx
	imulq	%r8, %rdx
	leaq	(%rdi,%rax,4), %r13
	leaq	(%rdi,%rdx,4), %rbp
	movq	-24(%rsp), %r10                 # 8-byte Reload
	imulq	%rbx, %r10
	leaq	(%rsi,%r10), %r14
	movq	-32(%rsp), %r8                  # 8-byte Reload
	imulq	%rbx, %r8
	movabsq	$-4294967296, %rax              # imm = 0xFFFFFFFF00000000
	addq	%rax, %r8
	movq	-8(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r10), %rdx
	addq	%rdi, %r10
	xorl	%eax, %eax
.LBB4_7:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm1, %xmm1
	xorps	%xmm0, %xmm0
	testq	%rbx, %rbx
	je	.LBB4_9
# %bb.8:                                # %_Z22f_siggen_reference_getPfiiii.exit.thread
                                        #   in Loop: Header=BB4_7 Depth=2
	movss	(%r13,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
.LBB4_9:                                # %_Z22f_siggen_reference_getPfiiii.exit47
                                        #   in Loop: Header=BB4_7 Depth=2
	cmpq	%rcx, %r12
	jge	.LBB4_11
# %bb.10:                               #   in Loop: Header=BB4_7 Depth=2
	movss	(%rbp,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
.LBB4_11:                               # %_Z22f_siggen_reference_getPfiiii.exit52
                                        #   in Loop: Header=BB4_7 Depth=2
	addss	(%r10,%rax,4), %xmm0
	addss	%xmm1, %xmm0
	cmpq	$2, %rax
	jb	.LBB4_14
# %bb.12:                               # %_Z22f_siggen_reference_getPfiiii.exit57.thread
                                        #   in Loop: Header=BB4_7 Depth=2
	subss	-8(%r14,%rax,4), %xmm0
	jmp	.LBB4_13
.LBB4_14:                               # %_Z22f_siggen_reference_getPfiiii.exit57
                                        #   in Loop: Header=BB4_7 Depth=2
	testq	%rax, %rax
	je	.LBB4_15
.LBB4_13:                               #   in Loop: Header=BB4_7 Depth=2
	movq	%r8, %r11
	sarq	$30, %r11
	movss	(%rsi,%r11), %xmm1              # xmm1 = mem[0],zero,zero,zero
.LBB4_16:                               # %_Z22f_siggen_reference_getPfiiii.exit62
                                        #   in Loop: Header=BB4_7 Depth=2
	subss	%xmm1, %xmm0
	subss	(%r14,%rax,4), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	addq	%r15, %r8
	cmpq	%rax, %r9
	jne	.LBB4_7
	jmp	.LBB4_17
.LBB4_15:                               #   in Loop: Header=BB4_7 Depth=2
	xorps	%xmm1, %xmm1
	jmp	.LBB4_16
.LBB4_17:                               #   in Loop: Header=BB4_2 Depth=1
	movq	%r12, %rbx
	jmp	.LBB4_4
.LBB4_3:                                # %.._crit_edge_crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%rbx
	movq	%rbx, %r12
.LBB4_4:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	cmpq	%rcx, %r12
	jne	.LBB4_2
.LBB4_5:                                # %._crit_edge78
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z18f_siggen_referencePfS_S_ii, .Lfunc_end4-_Z18f_siggen_referencePfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z6checkZPfS_ii                 # -- Begin function _Z6checkZPfS_ii
	.type	_Z6checkZPfS_ii,@function
_Z6checkZPfS_ii:                        # @_Z6checkZPfS_ii
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB5_1
# %bb.3:                                # %.lr.ph33
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%edx, %eax
	movl	%ecx, %edx
	xorl	%r8d, %r8d
	xorl	%r10d, %r10d
	xorl	%r9d, %r9d
.LBB5_4:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_7 Depth 2
	testl	%ecx, %ecx
	jle	.LBB5_8
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB5_4 Depth=1
	movl	%r8d, %ebx
	leaq	(%rsi,%rbx,4), %r11
	leaq	(%rdi,%rbx,4), %rbx
	xorl	%r14d, %r14d
.LBB5_7:                                # %.lr.ph
                                        #   Parent Loop BB5_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rbx,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r11,%r14,4), %xmm0
	jne	.LBB5_9
	jp	.LBB5_9
# %bb.6:                                #   in Loop: Header=BB5_7 Depth=2
	incq	%r14
	cmpq	%r14, %rdx
	jne	.LBB5_7
.LBB5_8:                                # %._crit_edge
                                        #   in Loop: Header=BB5_4 Depth=1
	incq	%r10
	cmpq	%rax, %r10
	setae	%r9b
	addl	%ecx, %r8d
	cmpq	%rax, %r10
	jne	.LBB5_4
.LBB5_9:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	jmp	.LBB5_2
.LBB5_1:
	movb	$1, %r9b
.LBB5_2:                                # %.thread
	movzbl	%r9b, %eax
	andl	$1, %eax
	retq
.Lfunc_end5:
	.size	_Z6checkZPfS_ii, .Lfunc_end5-_Z6checkZPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__f_siggenPfS_S_iii # -- Begin function _Z23__device_stub__f_siggenPfS_S_iii
	.type	_Z23__device_stub__f_siggenPfS_S_iii,@function
_Z23__device_stub__f_siggenPfS_S_iii:   # @_Z23__device_stub__f_siggenPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8f_siggenPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z23__device_stub__f_siggenPfS_S_iii, .Lfunc_end6-_Z23__device_stub__f_siggenPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI7_0:
	.long	0x3f000000                      # float 0.5
.LCPI7_1:
	.long	0x40500000                      # float 3.25
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB7_5
# %bb.1:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r15d
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r14d
	imull	%r15d, %eax
	movslq	%eax, %r12
	shlq	$2, %r12
	xorl	%ebp, %ebp
	leaq	48(%rsp), %r13
	movq	%rbp, (%r13)
	movq	%rbp, 8(%rsp)
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%rbp, 32(%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.2:
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.3:                                # %.critedge
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	testl	%eax, %eax
	je	.LBB7_8
.LBB7_4:                                # %.critedge86
	movl	$.Lstr.4, %edi
	jmp	.LBB7_6
.LBB7_5:
	movl	$.Lstr.5, %edi
.LBB7_6:
	callq	puts@PLT
.LBB7_7:
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB7_8:
	.cfi_def_cfa_offset 144
	movq	48(%rsp), %rdi
	testl	%r15d, %r15d
	jle	.LBB7_19
# %bb.9:                                # %.lr.ph16.i
	movl	%r15d, %eax
	movl	%r14d, %ecx
	xorl	%edx, %edx
	movss	.LCPI7_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorl	%esi, %esi
.LBB7_10:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_12 Depth 2
	testl	%r14d, %r14d
	jle	.LBB7_13
# %bb.11:                               # %.lr.ph.preheader.i
                                        #   in Loop: Header=BB7_10 Depth=1
	movl	%edx, %r8d
	leaq	(%rdi,%r8,4), %r8
	xorl	%r9d, %r9d
.LBB7_12:                               # %.lr.ph.i
                                        #   Parent Loop BB7_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rsi,%r9), %r10d
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r10d, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%r8,%r9,4)
	incq	%r9
	cmpq	%r9, %rcx
	jne	.LBB7_12
.LBB7_13:                               # %._crit_edge.i
                                        #   in Loop: Header=BB7_10 Depth=1
	incq	%rsi
	addl	%r14d, %edx
	cmpq	%rax, %rsi
	jne	.LBB7_10
# %bb.14:                               # %_Z5initXPfii.exit
	xorl	%edx, %edx
	movq	8(%rsp), %rsi
	movss	.LCPI7_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorl	%r8d, %r8d
.LBB7_15:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_17 Depth 2
	testl	%r14d, %r14d
	jle	.LBB7_18
# %bb.16:                               # %.lr.ph.preheader.i99
                                        #   in Loop: Header=BB7_15 Depth=1
	movl	%edx, %r9d
	leaq	(%rsi,%r9,4), %r9
	xorl	%r10d, %r10d
.LBB7_17:                               # %.lr.ph.i101
                                        #   Parent Loop BB7_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r8,%r10), %r11d
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r11d, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%r9,%r10,4)
	incq	%r10
	cmpq	%r10, %rcx
	jne	.LBB7_17
.LBB7_18:                               # %._crit_edge.i96
                                        #   in Loop: Header=BB7_15 Depth=1
	incq	%r8
	addl	%r14d, %edx
	cmpq	%rax, %r8
	jne	.LBB7_15
	jmp	.LBB7_20
.LBB7_19:                               # %_Z5initXPfii.exit.thread
	movq	8(%rsp), %rsi
.LBB7_20:                               # %_Z5initYPfii.exit
	movq	%rbx, %rdx
	movl	%r15d, %ecx
	movl	%r14d, %r8d
	callq	_Z18f_siggen_referencePfS_S_ii
	xorl	%eax, %eax
	leaq	40(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rax, 24(%rsp)
	movq	%rax, 16(%rsp)
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_23
# %bb.21:
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_23
# %bb.22:                               # %.critedge88
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB7_24
.LBB7_23:                               # %.critedge89
	movl	$.Lstr.3, %edi
	jmp	.LBB7_6
.LBB7_24:
	callq	_Z12getTimeStampv
	movsd	%xmm0, 80(%rsp)                 # 8-byte Spill
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB7_29
# %bb.25:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB7_29
# %bb.26:
	callq	_Z12getTimeStampv
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	leal	-1(%r14), %eax
	shrl	$5, %eax
	leal	-1(%r15), %ecx
	shrl	$5, %ecx
	incl	%ecx
	shlq	$32, %rcx
	leaq	(%rcx,%rax), %rdi
	incq	%rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$8704, %r8d                     # imm = 0x2200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_28
# %bb.27:
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%r15d, %ecx
	movl	%r14d, %r8d
	movl	$1088, %r9d                     # imm = 0x440
	callq	_Z23__device_stub__f_siggenPfS_S_iii
.LBB7_28:
	callq	hipDeviceSynchronize
	callq	_Z12getTimeStampv
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB7_30
.LBB7_29:                               # %.critedge91
	movl	$.Lstr.2, %edi
	jmp	.LBB7_6
.LBB7_30:
	callq	_Z12getTimeStampv
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%r12d, %r12d
	movq	%r12, 16(%rsp)
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	%r12, 24(%rsp)
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	%r12, 40(%rsp)
	movq	32(%rsp), %rax
	testl	%r15d, %r15d
	jle	.LBB7_38
# %bb.31:                               # %.lr.ph33.i
	movl	%r15d, %ecx
	movl	%r14d, %edx
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB7_32:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_34 Depth 2
	testl	%r14d, %r14d
	jle	.LBB7_36
# %bb.33:                               # %.lr.ph.preheader.i108
                                        #   in Loop: Header=BB7_32 Depth=1
	movl	%r12d, %r9d
	leaq	(%rax,%r9,4), %r8
	leaq	(%rbx,%r9,4), %r9
	xorl	%r10d, %r10d
.LBB7_34:                               # %.lr.ph.i109
                                        #   Parent Loop BB7_32 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r9,%r10,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r8,%r10,4), %xmm0
	jne	.LBB7_37
	jp	.LBB7_37
# %bb.35:                               #   in Loop: Header=BB7_34 Depth=2
	incq	%r10
	cmpq	%r10, %rdx
	jne	.LBB7_34
.LBB7_36:                               # %._crit_edge.i107
                                        #   in Loop: Header=BB7_32 Depth=1
	incq	%rsi
	addl	%r14d, %r12d
	cmpq	%rcx, %rsi
	setae	%dil
	jne	.LBB7_32
.LBB7_37:                               # %_Z6checkZPfS_ii.exit
	testb	$1, %dil
	je	.LBB7_39
.LBB7_38:                               # %_Z6checkZPfS_ii.exit.thread
	movsd	56(%rsp), %xmm4                 # 8-byte Reload
                                        # xmm4 = mem[0],zero
	movapd	%xmm4, %xmm0
	movsd	80(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	subsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movsd	64(%rsp), %xmm3                 # 8-byte Reload
                                        # xmm3 = mem[0],zero
	subsd	%xmm3, %xmm4
	movsd	72(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	subsd	%xmm2, %xmm3
	subsd	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm2, %xmm1
	xorps	%xmm2, %xmm2
	cvtsd2ss	%xmm3, %xmm2
	xorps	%xmm3, %xmm3
	cvtsd2ss	%xmm4, %xmm3
	leal	(%r14,%r14,4), %ecx
	movslq	%ecx, %rcx
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	cvtss2sd	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm3
	xorps	%xmm4, %xmm4
	cvtss2sd	20(%rax,%rcx,4), %xmm4
	movl	$.L.str.4, %edi
	movb	$5, %al
	callq	printf
	jmp	.LBB7_40
.LBB7_39:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB7_40:
	movq	32(%rsp), %rdi
	callq	hipHostFree
	xorl	%r14d, %r14d
	movq	%r14, 32(%rsp)
	movq	%rbx, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipHostFree
	movq	%r14, 8(%rsp)
	movq	48(%rsp), %rdi
	callq	hipHostFree
	movq	%r14, 48(%rsp)
	callq	hipDeviceReset
	jmp	.LBB7_7
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8f_siggenPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8f_siggenPfS_S_iii,@object    # @_Z8f_siggenPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z8f_siggenPfS_S_iii
	.p2align	3, 0x0
_Z8f_siggenPfS_S_iii:
	.quad	_Z23__device_stub__f_siggenPfS_S_iii
	.size	_Z8f_siggenPfS_S_iii, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"%.6f %.6f %.6f %.6f %.6f\n"
	.size	.L.str.4, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8f_siggenPfS_S_iii"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Error: GPU result does not with CPU result"
	.size	.Lstr, 43

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Error: hipMemcpy returns error"
	.size	.Lstr.2, 31

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Error: hipMalloc returns error"
	.size	.Lstr.3, 31

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Error: hipHostAlloc returns error"
	.size	.Lstr.4, 34

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Error: The number of arguments is not exactly 2"
	.size	.Lstr.5, 48

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__f_siggenPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8f_siggenPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8f_siggenPfS_S_iii    ; -- Begin function _Z8f_siggenPfS_S_iii
	.globl	_Z8f_siggenPfS_S_iii
	.p2align	8
	.type	_Z8f_siggenPfS_S_iii,@function
_Z8f_siggenPfS_S_iii:                   ; @_Z8f_siggenPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[8:11], s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s11, s2, 16
	s_and_b32 s3, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, s15, s11, v[0:1]
	v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
	v_cmp_gt_i32_e64 s2, s8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s9, v2
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_20
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, v5, s9, v[2:3]
	s_add_i32 s2, s11, 2
	v_mul_u32_u24_e32 v4, s2, v1
	s_mov_b32 s2, exec_lo
	v_cmpx_ne_u32_e32 0, v5
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_5
; %bb.2:
	s_mov_b32 s12, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_subrev_nc_u32_e32 v6, s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	v_lshl_add_u32 v7, v4, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v6
.LBB0_4:                                ; %Flow99
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_5:                                ; %Flow100
	s_or_saveexec_b32 s2, s2
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshlrev_b32_e32 v6, 2, v4
	v_lshlrev_b32_e32 v7, 2, v0
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_7
; %bb.6:
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v8, 0, v6, v7
	v_mov_b32_e32 v9, 0
	ds_store_b32 v8, v9
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s2, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s2, v5
	s_and_saveexec_b32 s2, vcc_lo
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_11
; %bb.8:
	s_add_i32 s11, s11, -1
	s_mov_b32 s8, exec_lo
	v_cmpx_eq_u32_e64 s11, v0
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_add_nc_u32_e32 v8, s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v5, v[8:9], off
	v_add_nc_u32_e32 v8, v0, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v8, v8, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v5 offset:8
.LBB0_10:                               ; %Flow97
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_11:                               ; %Flow98
	s_or_saveexec_b32 s2, s2
	v_add_nc_u32_e32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v5, v4, 2, 0
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_mov_b32_e32 v4, 0
	ds_store_b32 v5, v4 offset:8
.LBB0_13:
	s_or_b32 exec_lo, exec_lo, s2
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s3, s3, 2
	s_lshl_b32 s2, s10, 2
	v_mul_u32_u24_e32 v0, s3, v0
	s_add_i32 s2, s2, 0
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v8 offset:4
	v_cmpx_ne_u32_e32 0, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_17
; %bb.14:
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_add_co_u32 v8, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v4, vcc_lo
	v_add_nc_u32_e32 v2, v1, v0
	v_lshl_add_u32 v10, v0, 2, s2
	global_load_b64 v[8:9], v[8:9], off offset:-8
	v_lshl_add_u32 v2, v2, 2, s2
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v8
	ds_store_b32 v2, v9 offset:4
.LBB0_16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_17:                               ; %Flow96
	s_or_saveexec_b32 s3, s3
	v_lshlrev_b32_e32 v2, 2, v0
	v_lshlrev_b32_e32 v8, 2, v1
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB0_19
; %bb.18:
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v9, s2, v2, v8
	v_mov_b32_e32 v10, 0
	ds_store_2addr_b32 v9, v10, v10 offset1:1
.LBB0_19:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_co_u32 v9, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v4, vcc_lo
	v_add_nc_u32_e32 v0, v1, v0
	v_add3_u32 v2, s2, v2, v8
	global_load_b32 v9, v[9:10], off
	v_lshl_add_u32 v10, v0, 2, s2
	v_add3_u32 v0, 0, v6, v7
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v9 offset:8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[0:1], v0 offset1:1
	ds_load_b32 v7, v5 offset:8
	ds_load_2addr_b32 v[5:6], v2 offset1:1
	ds_load_b32 v2, v10 offset:8
	s_waitcnt lgkmcnt(3)
	v_add_f32_e32 v0, v0, v1
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v7
	s_waitcnt lgkmcnt(1)
	v_sub_f32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v0, v0, v6
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v2, v0, v2
	v_add_co_u32 v0, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_20:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8f_siggenPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8f_siggenPfS_S_iii, .Lfunc_end0-_Z8f_siggenPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 848
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8f_siggenPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8f_siggenPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
