/***********************************************************************
To Compile:
 /usr/local/cuda-10.0/bin/nvcc -arch=compute_52 -o file.out filename.cu
***********************************************************************/
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

void check_output(float *A, int dim) {
  /* Print output for debug */
  int i,j;
  printf("\n");
  for(i = 0; i < dim; i++) {
    for(j = 0; j < dim; j++) {
      printf("%3.1f ", A[i*dim + j]);
    }
    printf(";\n");
  }
  printf("\n");
}

__global__ void MyKernel2(float *d_a,float *d_bT,float *d_c,int dim, int tile){
  extern __shared__ float s[];  // declear a single shared array.
  float  *a_tile = (float*)s;           // Divide the shared array into two
  float *bT_tile = (float*)&a_tile[blockDim.x*blockDim.y];

  float partial = 0.0;
  int bx = blockIdx.x ; int by = blockIdx.y ;
  int tx = threadIdx.x; int ty = threadIdx.y;

  int i = by * blockDim.y + ty; //row i of c
  int j = bx * blockDim.x + tx; //Column j of c
  int k,m;
  i  = i  * dim;
  // ty = ty * dim;

  for(m = 0; m < dim/blockDim.x; ++m) {
     a_tile[ty*dim+tx] =  d_a[i+m*blockDim.x + tx]; /* load coalesced */
    bT_tile[ty+tx*dim] = d_bT[i+m*blockDim.x + tx]; /* load coalesced */
    __syncthreads();
    for(k = 0; k < blockDim.x; ++k)
      partial += a_tile[ty+k] * bT_tile[k+tx]; /* no bank conflicts */
    __syncthreads();
    d_c[i+j] = partial;
  }
}

int main(int argc, char const *argv[]) {
  // Initiailize matrix dimension
  int dim = 1024, block_size = 16, tile = 64;
  int i;
  if (argc > 1) {
    if(argc != 4){
      printf("Invaild arguments. Must have 3: dimension, block_size and tile size.\n");
      return 0;
    }
    dim = atoi(argv[1]);
    block_size = atoi(argv[2]);
    tile = atoi(argv[3]);
  }

  // declear host and device timer.
  srand(3);
  dim3 Block(block_size,block_size);
  dim3 Grid(dim/Block.x, dim/Block.y);
  struct timespec start,finish;
    int ntime, stime;
  float tot_time=0.0;

  // Populate matrice
  float *a  = (float*)malloc(sizeof(float)*dim*dim);
  float *bT = (float*)malloc(sizeof(float)*dim*dim);
  float *c  = (float*)malloc(sizeof(float)*dim*dim);
  float *d_a, *d_bT ,*d_c, limit=10.0; //d_bT for transposed

  for(i = 0; i < dim*dim; i++){
    a[i]  = ((float)rand()/(float)(RAND_MAX)) * limit;
    bT[i] = ((float)rand()/(float)(RAND_MAX)) * limit;
  }

  // Allocate device memeory.
  cudaMalloc( (void**)&d_a,  dim*dim*sizeof(float));
  cudaMalloc( (void**)&d_bT, dim*dim*sizeof(float));
  cudaMalloc( (void**)&d_c,  dim*dim*sizeof(float));

  // Initiailize timer & start recording.
  clock_gettime(CLOCK_REALTIME, &start);

  // Copy memory to device.
  cudaMemcpy(d_a ,a ,dim*dim*sizeof(float),cudaMemcpyHostToDevice);
  cudaMemcpy(d_bT,bT,dim*dim*sizeof(float),cudaMemcpyHostToDevice);

  // Call CUDA kernel function.
  MyKernel2<<<Grid, Block, tile*tile*2>>>(d_a,d_bT,d_c,dim,tile);
  cudaMemcpy(c, d_c, sizeof(float)*dim*dim,cudaMemcpyDeviceToHost);

  // Timer stop.
  cudaDeviceSynchronize();
  clock_gettime(CLOCK_REALTIME, &finish);
  ntime = finish.tv_nsec - start.tv_nsec;
  stime = (int)finish.tv_sec - (int) start.tv_sec;
  tot_time = ntime*1.0E-9 + stime;

  /* Print output for debug */
  printf("kernel#1 Time elapsed: %f ms. matrix dimension: %d X %d\n",
  tot_time*1.0E3,dim,dim);

  check_output(c,dim);

  // reset memory and timer.
  cudaFree(d_c); cudaFree(d_bT); cudaFree(d_a);
  free(a); free(bT); free(c);
  return 0;
}

	.file	"tmpxft_00241b15_00000000-6_hs983_cuda_tile.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n"
.LC1:
	.string	"%3.1f "
.LC2:
	.string	";\n"
	.text
	.globl	_Z12check_outputPfi
	.type	_Z12check_outputPfi, @function
_Z12check_outputPfi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	leaq	.LC1(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%esi, %r13
	leaq	.LC0(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	movl	$2, %edi
	pushq	%rcx
	.cfi_def_cfa_offset 64
	call	__printf_chk@PLT
.L3:
	cmpl	%ebp, %r12d
	jge	.L9
	leaq	(%rbx,%r13), %r14
.L4:
	cvtss2sd	(%rbx), %xmm0
	movq	%r15, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	addq	$4, %rbx
	cmpq	%r14, %rbx
	jne	.L4
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r12d
	call	__printf_chk@PLT
	jmp	.L3
.L9:
	popq	%rdx
	.cfi_def_cfa_offset 56
	leaq	.LC0(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z12check_outputPfi, .-_Z12check_outputPfi
	.globl	_Z34__device_stub__Z9MyKernel2PfS_S_iiPfS_S_ii
	.type	_Z34__device_stub__Z9MyKernel2PfS_S_iiPfS_S_ii, @function
_Z34__device_stub__Z9MyKernel2PfS_S_iiPfS_S_ii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9MyKernel2PfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z34__device_stub__Z9MyKernel2PfS_S_iiPfS_S_ii, .-_Z34__device_stub__Z9MyKernel2PfS_S_iiPfS_S_ii
	.globl	_Z9MyKernel2PfS_S_ii
	.type	_Z9MyKernel2PfS_S_ii, @function
_Z9MyKernel2PfS_S_ii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9MyKernel2PfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE2054:
	.size	_Z9MyKernel2PfS_S_ii, .-_Z9MyKernel2PfS_S_ii
	.section	.rodata.str1.1
.LC3:
	.string	"Invaild arguments. Must have 3: dimension, block_size and tile size.\n"
.LC8:
	.string	"kernel#1 Time elapsed: %f ms. matrix dimension: %d X %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	cmpl	$1, %edi
	jle	.L23
	cmpl	$4, %edi
	je	.L17
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L18
.L17:
	movq	8(%rsi), %rdi
	movq	%rsi, %r12
	call	atoi@PLT
	movq	16(%r12), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movq	24(%r12), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movl	%eax, %r12d
	jmp	.L16
.L23:
	movl	$64, %r12d
	movl	$16, %ebp
	movl	$1024, %ebx
.L16:
	movl	$3, %edi
	xorl	%r15d, %r15d
	call	srand@PLT
	movl	%ebx, %eax
	xorl	%edx, %edx
	movl	$1, 72(%rsp)
	divl	%ebp
	movl	$1, 84(%rsp)
	movl	%eax, 76(%rsp)
	movl	%eax, 80(%rsp)
	movslq	%ebx, %rax
	imulq	%rax, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rax, 16(%rsp)
	movl	%ebx, %eax
	imull	%ebx, %eax
	movl	%eax, 28(%rsp)
.L19:
	cmpl	%r15d, 28(%rsp)
	jle	.L25
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC4(%rip), %xmm0
	mulss	.LC5(%rip), %xmm0
	movss	%xmm0, (%r14,%r15,4)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC4(%rip), %xmm0
	mulss	.LC5(%rip), %xmm0
	movss	%xmm0, 0(%r13,%r15,4)
	incq	%r15
	jmp	.L19
.L25:
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	xorl	%edi, %edi
	leaq	88(%rsp), %rsi
	call	clock_gettime@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r12d, %r8d
	movl	%ebp, 64(%rsp)
	movl	72(%rsp), %ecx
	imull	%r12d, %r8d
	movl	%ebp, 68(%rsp)
	movq	76(%rsp), %rdi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movl	84(%rsp), %esi
	addl	%r8d, %r8d
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%r12d, %r8d
	movl	%ebx, %ecx
	movq	40(%rsp), %rdi
	call	_Z34__device_stub__Z9MyKernel2PfS_S_iiPfS_S_ii
.L21:
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	leaq	104(%rsp), %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	movq	112(%rsp), %rax
	subl	96(%rsp), %eax
	movl	%ebx, %ecx
	cvtsi2sdl	%eax, %xmm0
	movq	104(%rsp), %rax
	subl	88(%rsp), %eax
	movl	%ebx, %edx
	cvtsi2sdl	%eax, %xmm1
	mulsd	.LC6(%rip), %xmm0
	leaq	.LC8(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC7(%rip), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z12check_outputPfi
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z9MyKernel2PfS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9MyKernel2PfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	805306368
	.align 4
.LC5:
	.long	1092616192
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	-400107883
	.long	1041313291
	.align 8
.LC7:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/***********************************************************************
To Compile:
 /usr/local/cuda-10.0/bin/nvcc -arch=compute_52 -o file.out filename.cu
***********************************************************************/

#include <hip/hip_runtime.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

void check_output(float *A, int dim) {
  /* Print output for debug */
  int i,j;
  printf("\n");
  for(i = 0; i < dim; i++) {
    for(j = 0; j < dim; j++) {
      printf("%3.1f ", A[i*dim + j]);
    }
    printf(";\n");
  }
  printf("\n");
}

__global__ void MyKernel2(float *d_a,float *d_bT,float *d_c,int dim, int tile){
  extern __shared__ float s[];  // declear a single shared array.
  float  *a_tile = (float*)s;           // Divide the shared array into two
  float *bT_tile = (float*)&a_tile[blockDim.x*blockDim.y];

  float partial = 0.0;
  int bx = blockIdx.x ; int by = blockIdx.y ;
  int tx = threadIdx.x; int ty = threadIdx.y;

  int i = by * blockDim.y + ty; //row i of c
  int j = bx * blockDim.x + tx; //Column j of c
  int k,m;
  i  = i  * dim;
  // ty = ty * dim;

  for(m = 0; m < dim/blockDim.x; ++m) {
     a_tile[ty*dim+tx] =  d_a[i+m*blockDim.x + tx]; /* load coalesced */
    bT_tile[ty+tx*dim] = d_bT[i+m*blockDim.x + tx]; /* load coalesced */
    __syncthreads();
    for(k = 0; k < blockDim.x; ++k)
      partial += a_tile[ty+k] * bT_tile[k+tx]; /* no bank conflicts */
    __syncthreads();
    d_c[i+j] = partial;
  }
}

int main(int argc, char const *argv[]) {
  // Initiailize matrix dimension
  int dim = 1024, block_size = 16, tile = 64;
  int i;
  if (argc > 1) {
    if(argc != 4){
      printf("Invaild arguments. Must have 3: dimension, block_size and tile size.\n");
      return 0;
    }
    dim = atoi(argv[1]);
    block_size = atoi(argv[2]);
    tile = atoi(argv[3]);
  }

  // declear host and device timer.
  srand(3);
  dim3 Block(block_size,block_size);
  dim3 Grid(dim/Block.x, dim/Block.y);
  struct timespec start,finish;
    int ntime, stime;
  float tot_time=0.0;

  // Populate matrice
  float *a  = (float*)malloc(sizeof(float)*dim*dim);
  float *bT = (float*)malloc(sizeof(float)*dim*dim);
  float *c  = (float*)malloc(sizeof(float)*dim*dim);
  float *d_a, *d_bT ,*d_c, limit=10.0; //d_bT for transposed

  for(i = 0; i < dim*dim; i++){
    a[i]  = ((float)rand()/(float)(RAND_MAX)) * limit;
    bT[i] = ((float)rand()/(float)(RAND_MAX)) * limit;
  }

  // Allocate device memeory.
  hipMalloc( (void**)&d_a,  dim*dim*sizeof(float));
  hipMalloc( (void**)&d_bT, dim*dim*sizeof(float));
  hipMalloc( (void**)&d_c,  dim*dim*sizeof(float));

  // Initiailize timer & start recording.
  clock_gettime(CLOCK_REALTIME, &start);

  // Copy memory to device.
  hipMemcpy(d_a ,a ,dim*dim*sizeof(float),hipMemcpyHostToDevice);
  hipMemcpy(d_bT,bT,dim*dim*sizeof(float),hipMemcpyHostToDevice);

  // Call CUDA kernel function.
  MyKernel2<<<Grid, Block, tile*tile*2>>>(d_a,d_bT,d_c,dim,tile);
  hipMemcpy(c, d_c, sizeof(float)*dim*dim,hipMemcpyDeviceToHost);

  // Timer stop.
  hipDeviceSynchronize();
  clock_gettime(CLOCK_REALTIME, &finish);
  ntime = finish.tv_nsec - start.tv_nsec;
  stime = (int)finish.tv_sec - (int) start.tv_sec;
  tot_time = ntime*1.0E-9 + stime;

  /* Print output for debug */
  printf("kernel#1 Time elapsed: %f ms. matrix dimension: %d X %d\n",
  tot_time*1.0E3,dim,dim);

  check_output(c,dim);

  // reset memory and timer.
  hipFree(d_c); hipFree(d_bT); hipFree(d_a);
  free(a); free(bT); free(c);
  return 0;
}

	.text
	.file	"hs983_cuda_tile.hip"
	.globl	_Z12check_outputPfi             # -- Begin function _Z12check_outputPfi
	.type	_Z12check_outputPfi,@function
_Z12check_outputPfi:                    # @_Z12check_outputPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, (%rsp)                    # 8-byte Spill
	movl	$10, %edi
	callq	putchar@PLT
	testl	%ebx, %ebx
	jle	.LBB0_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebx, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB0_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	movl	%r12d, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	xorl	%r14d, %r14d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp,%r14,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB0_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	$.Lstr, %edi
	callq	puts@PLT
	incq	%r13
	addl	%ebx, %r12d
	cmpq	%r15, %r13
	jne	.LBB0_2
.LBB0_5:                                # %._crit_edge14
	movl	$10, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end0:
	.size	_Z12check_outputPfi, .Lfunc_end0-_Z12check_outputPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__MyKernel2PfS_S_ii # -- Begin function _Z24__device_stub__MyKernel2PfS_S_ii
	.type	_Z24__device_stub__MyKernel2PfS_S_ii,@function
_Z24__device_stub__MyKernel2PfS_S_ii:   # @_Z24__device_stub__MyKernel2PfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9MyKernel2PfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__MyKernel2PfS_S_ii, .Lfunc_end1-_Z24__device_stub__MyKernel2PfS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI2_1:
	.long	0x41200000                      # float 10
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_2:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
.LCPI2_3:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jl	.LBB2_1
# %bb.2:
	cmpl	$4, %edi
	jne	.LBB2_3
# %bb.4:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r14d
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	movl	%ebp, %ebx
	jmp	.LBB2_5
.LBB2_1:
	movl	$1024, %r14d                    # imm = 0x400
	movl	$16, %ebx
	movl	$64, 12(%rsp)                   # 4-byte Folded Spill
.LBB2_5:
	movl	$3, %edi
	callq	srand
	movq	%rbx, %rax
	shlq	$32, %rax
	orq	%rbx, %rax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movl	%r14d, %eax
	xorl	%edx, %edx
	divl	%ebx
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, %rcx
	shlq	$32, %rcx
	orq	%rax, %rcx
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movl	%r14d, 28(%rsp)                 # 4-byte Spill
	movslq	%r14d, %r12
	movq	%r12, %r13
	imulq	%r12, %r13
	shlq	$2, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	%r12d, %ebx
	imull	%r12d, %ebx
	testl	%r12d, %r12d
	je	.LBB2_8
# %bb.6:                                # %.lr.ph.preheader
	cmpl	$1, %ebx
	movl	%ebx, %ebp
	adcl	$0, %ebp
	xorl	%r12d, %r12d
.LBB2_7:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%r12,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	mulss	.LCPI2_1(%rip), %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	%r12, %rbp
	jne	.LBB2_7
.LBB2_8:                                # %._crit_edge
	movl	%ebx, %ebx
	shlq	$2, %rbx
	leaq	40(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rsi
	xorl	%edi, %edi
	callq	clock_gettime
	movq	(%rbp), %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	12(%rsp), %ebx                  # 4-byte Reload
	movl	%ebx, %r8d
	imull	%r8d, %r8d
	addl	%r8d, %r8d
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	28(%rsp), %ebp                  # 4-byte Reload
	jne	.LBB2_10
# %bb.9:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%ebp, %ecx
	movl	%ebx, %r8d
	callq	_Z24__device_stub__MyKernel2PfS_S_ii
.LBB2_10:
	movq	16(%rsp), %rsi
	movq	64(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	88(%rsp), %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movl	(%rbx), %eax
	movl	8(%rbx), %ecx
	subl	80(%rsp), %ecx
	subl	72(%rsp), %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ecx, %xmm0
	mulsd	.LCPI2_2(%rip), %xmm0
	cvtsi2sd	%eax, %xmm1
	addsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI2_3(%rip), %xmm0
	movl	$.L.str.4, %edi
	movl	%ebp, %esi
	movl	%ebp, %edx
	movb	$1, %al
	callq	printf
	movq	%r12, %rdi
	movl	%ebp, %esi
	callq	_Z12check_outputPfi
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	jmp	.LBB2_11
.LBB2_3:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB2_11:
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9MyKernel2PfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%3.1f "
	.size	.L.str.1, 7

	.type	_Z9MyKernel2PfS_S_ii,@object    # @_Z9MyKernel2PfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z9MyKernel2PfS_S_ii
	.p2align	3, 0x0
_Z9MyKernel2PfS_S_ii:
	.quad	_Z24__device_stub__MyKernel2PfS_S_ii
	.size	_Z9MyKernel2PfS_S_ii, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"kernel#1 Time elapsed: %f ms. matrix dimension: %d X %d\n"
	.size	.L.str.4, 57

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9MyKernel2PfS_S_ii"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	";"
	.size	.Lstr, 2

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Invaild arguments. Must have 3: dimension, block_size and tile size."
	.size	.Lstr.1, 69

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__MyKernel2PfS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9MyKernel2PfS_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9MyKernel2PfS_S_ii    ; -- Begin function _Z9MyKernel2PfS_S_ii
	.globl	_Z9MyKernel2PfS_S_ii
	.p2align	8
	.type	_Z9MyKernel2PfS_S_ii,@function
_Z9MyKernel2PfS_S_ii:                   ; @_Z9MyKernel2PfS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s6, s[0:1], 0x18
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s4, s6
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	v_cvt_f32_u32_e32 v1, s4
	s_sub_i32 s7, 0, s4
	s_load_b32 s2, s[2:3], 0xc
	v_bfe_u32 v2, v0, 10, 10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	v_lshlrev_b32_e32 v7, 2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s5
	s_mul_hi_u32 s3, s5, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s5, s5, s3
	s_mul_hi_u32 s3, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s5, s3, s4
	s_add_i32 s7, s3, 1
	s_sub_i32 s5, s6, s5
	s_sub_i32 s8, s5, s4
	s_cmp_ge_u32 s5, s4
	s_cselect_b32 s3, s7, s3
	s_cselect_b32 s5, s8, s5
	s_add_i32 s7, s3, 1
	s_cmp_ge_u32 s5, s4
	s_load_b64 s[8:9], s[0:1], 0x10
	s_cselect_b32 s5, s7, s3
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[3:4], null, s15, s7, v[2:3]
	v_and_b32_e32 v4, 0x3ff, v0
	s_mul_i32 s7, s7, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, v3, s6, v[4:5]
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v8, 2, v4
	v_mad_u64_u32 v[5:6], null, s14, s4, v[0:1]
	v_mul_lo_u32 v1, v2, s6
	v_mul_lo_u32 v2, v4, s6
	s_lshl_b32 s6, s7, 2
	v_add_nc_u32_e32 v4, 0, v7
	s_add_i32 s6, s6, 0
	s_max_u32 s7, s4, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b32_e32 v9, 2, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v10, 2, v2
	v_lshlrev_b64 v[1:2], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v5, 0, v8, v9
	v_add3_u32 v6, s6, v7, v10
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, s6, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s6, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[9:10], null, s6, s4, v[0:1]
	v_mov_b32_e32 v10, v3
	s_mov_b32 s8, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s0, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s1, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	global_load_b32 v11, v[11:12], off
	global_load_b32 v12, v[9:10], off
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v10, v4
	s_waitcnt vmcnt(1)
	ds_store_b32 v5, v11
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v12
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v11, v10
	ds_load_b32 v12, v9
	v_add_nc_u32_e32 v10, 4, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_add_i32 s8, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v8, v11, v12
	s_cbranch_scc1 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s6, s5
	s_barrier
	buffer_gl0_inv
	global_store_b32 v[1:2], v8, off
	s_cbranch_scc1 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9MyKernel2PfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9MyKernel2PfS_S_ii, .Lfunc_end0-_Z9MyKernel2PfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 588
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9MyKernel2PfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9MyKernel2PfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
