#include <curand.h>
#include <curand_kernel.h>
#include "CudaMath.cuh"

__device__ cuda3DVector operator+(cuda3DVector aVector1, cuda3DVector aVector2)
{
	return cuda3DVector{ aVector1.x + aVector2.x, aVector1.y + aVector2.y, aVector1.z + aVector2.z };
}

__device__ cuda3DVector operator-(cuda3DVector aVector1, cuda3DVector aVector2)
{
	return cuda3DVector{ aVector1.x - aVector2.x, aVector1.y - aVector2.y, aVector1.z - aVector2.z };
}

__device__ cuda3DVector operator*(cuda3DVector aVector1, cuda3DVector aVector2)
{
	return cuda3DVector{ aVector1.x * aVector2.x, aVector1.y * aVector2.y, aVector1.z * aVector2.z };
}

__device__ cuda3DVector operator+(cuda3DVector aVector, float aNumber)
{
	return cuda3DVector{ aVector.x + aNumber, aVector.y + aNumber, aVector.z + aNumber };
}

__device__ cuda3DVector operator-(cuda3DVector aVector, float aNumber)
{
	return cuda3DVector{ aVector.x - aNumber, aVector.y - aNumber, aVector.z - aNumber };
}

__device__ cuda3DVector operator*(cuda3DVector aVector, float aNumber)
{
	return cuda3DVector{ aVector.x * aNumber, aVector.y * aNumber, aVector.z * aNumber };
}

__device__ cuda3DVector operator/(cuda3DVector aVector, float aNumber)
{
	return cuda3DVector{ aVector.x / aNumber, aVector.y / aNumber, aVector.z / aNumber };
}
	.file	"tmpxft_003a5d26_00000000-6_CudaMath.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2231:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2231:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Zpl12cuda3DVectorS_
	.type	_Zpl12cuda3DVectorS_, @function
_Zpl12cuda3DVectorS_:
.LFB2222:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movl	$1, 44(%rsp)
	movl	44(%rsp), %edi
	movq	%xmm0, 16(%rsp)
	movss	%xmm1, 24(%rsp)
	movq	%xmm2, (%rsp)
	movss	%xmm3, 8(%rsp)
	call	exit@PLT
	.cfi_endproc
.LFE2222:
	.size	_Zpl12cuda3DVectorS_, .-_Zpl12cuda3DVectorS_
	.globl	_Zmi12cuda3DVectorS_
	.type	_Zmi12cuda3DVectorS_, @function
_Zmi12cuda3DVectorS_:
.LFB2370:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	call	_Zpl12cuda3DVectorS_
	.cfi_endproc
.LFE2370:
	.size	_Zmi12cuda3DVectorS_, .-_Zmi12cuda3DVectorS_
	.globl	_Zml12cuda3DVectorS_
	.type	_Zml12cuda3DVectorS_, @function
_Zml12cuda3DVectorS_:
.LFB2372:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	call	_Zpl12cuda3DVectorS_
	.cfi_endproc
.LFE2372:
	.size	_Zml12cuda3DVectorS_, .-_Zml12cuda3DVectorS_
	.globl	_Zpl12cuda3DVectorf
	.type	_Zpl12cuda3DVectorf, @function
_Zpl12cuda3DVectorf:
.LFB2225:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, 28(%rsp)
	movl	28(%rsp), %edi
	movq	%xmm0, (%rsp)
	movss	%xmm1, 8(%rsp)
	call	exit@PLT
	.cfi_endproc
.LFE2225:
	.size	_Zpl12cuda3DVectorf, .-_Zpl12cuda3DVectorf
	.globl	_Zmi12cuda3DVectorf
	.type	_Zmi12cuda3DVectorf, @function
_Zmi12cuda3DVectorf:
.LFB2374:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, 28(%rsp)
	movl	28(%rsp), %edi
	movq	%xmm0, (%rsp)
	movss	%xmm1, 8(%rsp)
	call	exit@PLT
	.cfi_endproc
.LFE2374:
	.size	_Zmi12cuda3DVectorf, .-_Zmi12cuda3DVectorf
	.globl	_Zml12cuda3DVectorf
	.type	_Zml12cuda3DVectorf, @function
_Zml12cuda3DVectorf:
.LFB2376:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, 28(%rsp)
	movl	28(%rsp), %edi
	movq	%xmm0, (%rsp)
	movss	%xmm1, 8(%rsp)
	call	exit@PLT
	.cfi_endproc
.LFE2376:
	.size	_Zml12cuda3DVectorf, .-_Zml12cuda3DVectorf
	.globl	_Zdv12cuda3DVectorf
	.type	_Zdv12cuda3DVectorf, @function
_Zdv12cuda3DVectorf:
.LFB2378:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, 28(%rsp)
	movl	28(%rsp), %edi
	movq	%xmm0, (%rsp)
	movss	%xmm1, 8(%rsp)
	call	exit@PLT
	.cfi_endproc
.LFE2378:
	.size	_Zdv12cuda3DVectorf, .-_Zdv12cuda3DVectorf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"precalc_xorwow_matrix"
.LC1:
	.string	"precalc_xorwow_offset_matrix"
.LC2:
	.string	"mrg32k3aM1"
.LC3:
	.string	"mrg32k3aM2"
.LC4:
	.string	"mrg32k3aM1SubSeq"
.LC5:
	.string	"mrg32k3aM2SubSeq"
.LC6:
	.string	"mrg32k3aM1Seq"
.LC7:
	.string	"mrg32k3aM2Seq"
.LC8:
	.string	"__cr_lgamma_table"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2254:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	movl	$102400, %r9d
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	movq	%rdx, %rcx
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2254:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include "CudaMath.cuh"

__device__ cuda3DVector operator+(cuda3DVector aVector1, cuda3DVector aVector2)
{
	return cuda3DVector{ aVector1.x + aVector2.x, aVector1.y + aVector2.y, aVector1.z + aVector2.z };
}

__device__ cuda3DVector operator-(cuda3DVector aVector1, cuda3DVector aVector2)
{
	return cuda3DVector{ aVector1.x - aVector2.x, aVector1.y - aVector2.y, aVector1.z - aVector2.z };
}

__device__ cuda3DVector operator*(cuda3DVector aVector1, cuda3DVector aVector2)
{
	return cuda3DVector{ aVector1.x * aVector2.x, aVector1.y * aVector2.y, aVector1.z * aVector2.z };
}

__device__ cuda3DVector operator+(cuda3DVector aVector, float aNumber)
{
	return cuda3DVector{ aVector.x + aNumber, aVector.y + aNumber, aVector.z + aNumber };
}

__device__ cuda3DVector operator-(cuda3DVector aVector, float aNumber)
{
	return cuda3DVector{ aVector.x - aNumber, aVector.y - aNumber, aVector.z - aNumber };
}

__device__ cuda3DVector operator*(cuda3DVector aVector, float aNumber)
{
	return cuda3DVector{ aVector.x * aNumber, aVector.y * aNumber, aVector.z * aNumber };
}

__device__ cuda3DVector operator/(cuda3DVector aVector, float aNumber)
{
	return cuda3DVector{ aVector.x / aNumber, aVector.y / aNumber, aVector.z / aNumber };
}
	.text
	.file	"CudaMath.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
