#include <stdlib.h>
#include <stdio.h>
#include <unistd.h>
#include <stdint.h>
#include <assert.h>
#include <time.h>
#include <math.h>

/*
Author: Andrew DiPrinzio 
Course: EN605.417.FA
Assignment: Module 5
Resources: 
https://devblogs.nvidia.com/using-shared-memory-cuda-cc/
http://www.nvidia.com/docs/IO/116711/sc11-cuda-c-basics.pdf
*/
static const uint32_t DEFAULT_NUM_THREADS = 1024;
static const uint32_t DEFAULT_BLOCK_SIZE = 32;

#define RADIUS 3

static void usage(){    
    printf("Usage: ./assignment5 [-t <num_threads>] [-b <block_size>] [-h]\n");
   
    printf("\t-t: Specify the number of threads. <num_threads> must be greater than 0. Optional (default %u)\n", DEFAULT_NUM_THREADS);
   
    printf("\t-b: Specify the size of each block. <block_size> must be greater than 0. Optional (default %u)\n", DEFAULT_BLOCK_SIZE);    
}

// Structure that holds program arguments specifying number of threads/blocks
// to use.
typedef struct {    
    uint32_t num_threads;
    uint32_t block_size;
} Arguments;

// Parse the command line arguments using getopt and return an Argument structure
// GetOpt requies the POSIX C Library
static Arguments parse_arguments(const int argc, char ** argv){   
    // Argument format string for getopt
    static const char * _ARG_STR = "ht:b:";
    // Initialize arguments to their default values    
    Arguments args;    
    args.num_threads = DEFAULT_NUM_THREADS;    
    args.block_size = DEFAULT_BLOCK_SIZE;
    // Parse any command line options
    int c;
    int value;
    while ((c = getopt(argc, argv, _ARG_STR)) != -1) {
        switch (c) {
            case 't':
                value = atoi(optarg);
                args.num_threads = value;
                break;
            case 'b':
                // Normal argument
                value = atoi(optarg);
                args.block_size = value;
                break;
            case 'h':
                // 'help': print usage, then exit
                // note the fall through
                usage();
            default:
                exit(-1);
        }
    }
    return args;
}

// Shared stencil addition function: adds to the value at index X values at indicies X-RADIUS -> X+RADIUS
/* 
This function demonstrates the value of shared memory because with out it each thread would need to 
perform  2 * RADIUS + 1 global memory accesses.
*/
__global__ 
void stencil_1d_shared(int *in, int *out)
{
    extern __shared__ int temp[];
    int gindex = threadIdx.x + blockIdx.x * blockDim.x;
    int lindex = threadIdx.x + RADIUS;
    // Read input elements into shared memory
    temp[lindex] = in[gindex];
    if (threadIdx.x < RADIUS) {
        temp[lindex - RADIUS] = in[gindex - RADIUS];
        temp[lindex + blockDim.x] = in[gindex + blockDim.x];
    }
    // Synchronize (ensure all the data is available)
    __syncthreads();
    // Apply the stencil
    int result = 0;
    for (int offset = -RADIUS ; offset <= RADIUS ; offset++)
        result += temp[lindex + offset];
    // Store the result
    out[gindex] = result;
}

// Global stencil addition function: adds to the value at index X values at indicies X-RADIUS -> X+RADIUS
__global__ 
void stencil_1d_global(const int *in, int *out)
{
    int gindex = threadIdx.x + blockIdx.x * blockDim.x;

    int result = 0;
    for (int offset = -RADIUS ; offset <= RADIUS ; offset++)
        result += in[gindex + offset];
    // Store the result
    out[gindex] = result;
}

// Helper function to generate a random number within a defined range
int random(int min, int max){
    return min + rand() / (RAND_MAX / (max - min + 1) + 1);
}

void measure_shared_kern_speed(Arguments args, int * a, int * b, int * a_d, int * b_d)
{
    // create events for timing
    cudaEvent_t startEvent, stopEvent; 
    cudaEventCreate(&startEvent);
    cudaEventCreate(&stopEvent);
    float time;

    int array_size = args.num_threads;
    const unsigned int array_size_in_bytes = array_size * sizeof(int);
	const unsigned int num_blocks = array_size / args.block_size;
    const unsigned int num_threads_per_blk = args.block_size;
    
	cudaMemcpy( a_d, a, array_size_in_bytes, cudaMemcpyHostToDevice );
   
    cudaEventRecord(startEvent, 0);

    /* Excution of kernel with dynamically allocated shared memory */
    stencil_1d_shared<<<num_blocks, num_threads_per_blk, (num_threads_per_blk + (2 * RADIUS)) * sizeof(int) >>>(a_d, b_d);

    cudaEventRecord(stopEvent, 0);
    cudaEventSynchronize(stopEvent);
    cudaEventElapsedTime(&time, startEvent, stopEvent);
    printf("  Function using Shared memory %f ms\n", time);

    //Print sums for debugging
    // cudaMemcpy(b, b_d, array_size_in_bytes, cudaMemcpyDeviceToHost );
    // for(unsigned int i = 0; i < array_size; i++)
	// {
	// 	printf("Sum #%d: %d\n",i,b[i]);
	// }

    //Global Test
    cudaEventRecord(startEvent, 0);

    stencil_1d_global<<<num_blocks, num_threads_per_blk>>>(a_d, b_d);

    cudaEventRecord(stopEvent, 0);
    cudaEventSynchronize(stopEvent);
    cudaEventElapsedTime(&time, startEvent, stopEvent);
    printf("  Function using Global memory %f ms\n", time);

    //Print sums for debugging
    //cudaMemcpy(b, b_d, array_size_in_bytes, cudaMemcpyDeviceToHost );
    // for(unsigned int i = 0; i < array_size; i++)
	// {
	// 	printf("Sum #%d: %d\n",i,b[i]);
	// }
    
    cudaEventDestroy(startEvent);
    cudaEventDestroy(stopEvent);
}

//configures host and device memory for experement.
void run_shared_experemnt(Arguments args){
    int *h_aPinned, *h_bPinned;

    int array_size = args.num_threads;
    const unsigned int array_size_in_bytes = array_size * sizeof(int);

    /* Randomly generate input vectors and dynamically allocate their memory */
    cudaMallocHost((void**)&h_aPinned, array_size_in_bytes);
    cudaMallocHost((void**)&h_bPinned, array_size_in_bytes);

    int i;
    for (i = 0; i < array_size; i++) {
        h_aPinned[i] = random(0,100);
    }

    /* Declare pointers for GPU based params */
    int *a_d;
    int *b_d;

    cudaMalloc((void**)&a_d, array_size_in_bytes);
    cudaMalloc((void**)&b_d, array_size_in_bytes);

    measure_shared_kern_speed(args, h_aPinned, h_bPinned, a_d, b_d);

    //free memory
    cudaFree(a_d);
    cudaFree(b_d);
    cudaFreeHost(h_aPinned);
    cudaFreeHost(h_bPinned);
}

int main(int argc, char ** argv)
{
    Arguments args = parse_arguments(argc, argv);
    printf("Num Threads: %u, Block Size: %u\n", args.num_threads, args.block_size);

    run_shared_experemnt(args);

    cudaDeviceReset();
    
	return EXIT_SUCCESS;
}

	.file	"tmpxft_003b6e63_00000000-6_assignment5_shared_mem.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2048:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2048:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z6randomii
	.type	_Z6randomii, @function
_Z6randomii:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%esi, %ebx
	pushq	%rax
	.cfi_def_cfa_offset 32
	subl	%ebp, %ebx
	call	rand@PLT
	leal	1(%rbx), %esi
	movl	%eax, %r8d
	movl	$2147483647, %eax
	cltd
	idivl	%esi
	leal	1(%rax), %ecx
	movl	%r8d, %eax
	cltd
	idivl	%ecx
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	addl	%ebp, %eax
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z6randomii, .-_Z6randomii
	.globl	_Z39__device_stub__Z17stencil_1d_sharedPiS_PiS_
	.type	_Z39__device_stub__Z17stencil_1d_sharedPiS_PiS_, @function
_Z39__device_stub__Z17stencil_1d_sharedPiS_PiS_:
.LFB2070:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17stencil_1d_sharedPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L4:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2070:
	.size	_Z39__device_stub__Z17stencil_1d_sharedPiS_PiS_, .-_Z39__device_stub__Z17stencil_1d_sharedPiS_PiS_
	.globl	_Z17stencil_1d_sharedPiS_
	.type	_Z17stencil_1d_sharedPiS_, @function
_Z17stencil_1d_sharedPiS_:
.LFB2071:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17stencil_1d_sharedPiS_PiS_
	.cfi_endproc
.LFE2071:
	.size	_Z17stencil_1d_sharedPiS_, .-_Z17stencil_1d_sharedPiS_
	.globl	_Z40__device_stub__Z17stencil_1d_globalPKiPiPKiPi
	.type	_Z40__device_stub__Z17stencil_1d_globalPKiPiPKiPi, @function
_Z40__device_stub__Z17stencil_1d_globalPKiPiPKiPi:
.LFB2072:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17stencil_1d_globalPKiPi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L10:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2072:
	.size	_Z40__device_stub__Z17stencil_1d_globalPKiPiPKiPi, .-_Z40__device_stub__Z17stencil_1d_globalPKiPiPKiPi
	.globl	_Z17stencil_1d_globalPKiPi
	.type	_Z17stencil_1d_globalPKiPi, @function
_Z17stencil_1d_globalPKiPi:
.LFB2073:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z17stencil_1d_globalPKiPiPKiPi
	.cfi_endproc
.LFE2073:
	.size	_Z17stencil_1d_globalPKiPi, .-_Z17stencil_1d_globalPKiPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"  Function using Shared memory %f ms\n"
.LC1:
	.string	"  Function using Global memory %f ms\n"
	.text
	.globl	_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_
	.type	_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_, @function
_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_:
.LFB2043:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r8, %r12
	shrq	$32, %r13
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%rsi, 8(%rsp)
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	xorl	%edx, %edx
	movl	%ebx, %eax
	movq	8(%rsp), %rsi
	divl	%r13d
	movl	$1, %ecx
	leal	0(,%rbx,4), %edx
	movq	%rbp, %rdi
	movl	%eax, %r15d
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%r13d, 60(%rsp)
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	leal	6(%r13), %eax
	movl	%r15d, 48(%rsp)
	movl	56(%rsp), %esi
	leaq	0(,%rax,4), %r8
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_Z39__device_stub__Z17stencil_1d_sharedPiS_PiS_
.L16:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	leaq	28(%rsp), %rbx
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%r13d, 60(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r15d, 48(%rsp)
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_Z40__device_stub__Z17stencil_1d_globalPKiPiPKiPi
.L17:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_, .-_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_
	.globl	_Z20run_shared_experemnt9Arguments
	.type	_Z20run_shared_experemnt9Arguments, @function
_Z20run_shared_experemnt9Arguments:
.LFB2044:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$21262215, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leal	0(,%rdi,4), %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rbp, %rsi
	movq	%rdi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocHost@PLT
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMallocHost@PLT
.L21:
	cmpl	%r12d, %r14d
	jle	.L25
	movq	8(%rsp), %rax
	leaq	(%rax,%r12,4), %r15
	incq	%r12
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%eax, (%r15)
	jmp	.L21
.L25:
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	32(%rsp), %r8
	movq	24(%rsp), %rcx
	movq	%rbx, %rdi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	call	_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z20run_shared_experemnt9Arguments, .-_Z20run_shared_experemnt9Arguments
	.section	.rodata.str1.1
.LC2:
	.string	"Usage: ./assignment5 [-t <num_threads>] [-b <block_size>] [-h]\n"
.LC3:
	.string	"\t-t: Specify the number of threads. <num_threads> must be greater than 0. Optional (default %u)\n"
.LC4:
	.string	"\t-b: Specify the size of each block. <block_size> must be greater than 0. Optional (default %u)\n"
.LC5:
	.string	"ht:b:"
.LC6:
	.string	"Num Threads: %u, Block Size: %u\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2045:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$32, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	.LC5(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	$1024, %ebx
.L27:
	movq	%r13, %rdx
	movq	%r12, %rsi
	movl	%ebp, %edi
	call	getopt@PLT
	cmpl	$-1, %eax
	je	.L35
	cmpl	$104, %eax
	je	.L28
	cmpl	$116, %eax
	je	.L29
	cmpl	$98, %eax
	jne	.L31
	movq	optarg(%rip), %rdi
	call	atoi@PLT
	movl	%eax, %r14d
	jmp	.L27
.L29:
	movq	optarg(%rip), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L27
.L28:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1024, %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$32, %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L31:
	orl	$-1, %edi
	call	exit@PLT
.L35:
	movq	%r14, %rax
	movl	%ebx, %ebp
	movl	%r14d, %ecx
	movl	%ebx, %edx
	salq	$32, %rax
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	orq	%rax, %rbp
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	_Z20run_shared_experemnt9Arguments
	call	cudaDeviceReset@PLT
	popq	%rbx
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2045:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z17stencil_1d_globalPKiPi"
.LC8:
	.string	"_Z17stencil_1d_sharedPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2075:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17stencil_1d_globalPKiPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17stencil_1d_sharedPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2075:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <unistd.h>
#include <stdint.h>
#include <assert.h>
#include <time.h>
#include <math.h>

/*
Author: Andrew DiPrinzio 
Course: EN605.417.FA
Assignment: Module 5
Resources: 
https://devblogs.nvidia.com/using-shared-memory-cuda-cc/
http://www.nvidia.com/docs/IO/116711/sc11-cuda-c-basics.pdf
*/
static const uint32_t DEFAULT_NUM_THREADS = 1024;
static const uint32_t DEFAULT_BLOCK_SIZE = 32;

#define RADIUS 3

static void usage(){    
    printf("Usage: ./assignment5 [-t <num_threads>] [-b <block_size>] [-h]\n");
   
    printf("\t-t: Specify the number of threads. <num_threads> must be greater than 0. Optional (default %u)\n", DEFAULT_NUM_THREADS);
   
    printf("\t-b: Specify the size of each block. <block_size> must be greater than 0. Optional (default %u)\n", DEFAULT_BLOCK_SIZE);    
}

// Structure that holds program arguments specifying number of threads/blocks
// to use.
typedef struct {    
    uint32_t num_threads;
    uint32_t block_size;
} Arguments;

// Parse the command line arguments using getopt and return an Argument structure
// GetOpt requies the POSIX C Library
static Arguments parse_arguments(const int argc, char ** argv){   
    // Argument format string for getopt
    static const char * _ARG_STR = "ht:b:";
    // Initialize arguments to their default values    
    Arguments args;    
    args.num_threads = DEFAULT_NUM_THREADS;    
    args.block_size = DEFAULT_BLOCK_SIZE;
    // Parse any command line options
    int c;
    int value;
    while ((c = getopt(argc, argv, _ARG_STR)) != -1) {
        switch (c) {
            case 't':
                value = atoi(optarg);
                args.num_threads = value;
                break;
            case 'b':
                // Normal argument
                value = atoi(optarg);
                args.block_size = value;
                break;
            case 'h':
                // 'help': print usage, then exit
                // note the fall through
                usage();
            default:
                exit(-1);
        }
    }
    return args;
}

// Shared stencil addition function: adds to the value at index X values at indicies X-RADIUS -> X+RADIUS
/* 
This function demonstrates the value of shared memory because with out it each thread would need to 
perform  2 * RADIUS + 1 global memory accesses.
*/
__global__ 
void stencil_1d_shared(int *in, int *out)
{
    extern __shared__ int temp[];
    int gindex = threadIdx.x + blockIdx.x * blockDim.x;
    int lindex = threadIdx.x + RADIUS;
    // Read input elements into shared memory
    temp[lindex] = in[gindex];
    if (threadIdx.x < RADIUS) {
        temp[lindex - RADIUS] = in[gindex - RADIUS];
        temp[lindex + blockDim.x] = in[gindex + blockDim.x];
    }
    // Synchronize (ensure all the data is available)
    __syncthreads();
    // Apply the stencil
    int result = 0;
    for (int offset = -RADIUS ; offset <= RADIUS ; offset++)
        result += temp[lindex + offset];
    // Store the result
    out[gindex] = result;
}

// Global stencil addition function: adds to the value at index X values at indicies X-RADIUS -> X+RADIUS
__global__ 
void stencil_1d_global(const int *in, int *out)
{
    int gindex = threadIdx.x + blockIdx.x * blockDim.x;

    int result = 0;
    for (int offset = -RADIUS ; offset <= RADIUS ; offset++)
        result += in[gindex + offset];
    // Store the result
    out[gindex] = result;
}

// Helper function to generate a random number within a defined range
int random(int min, int max){
    return min + rand() / (RAND_MAX / (max - min + 1) + 1);
}

void measure_shared_kern_speed(Arguments args, int * a, int * b, int * a_d, int * b_d)
{
    // create events for timing
    hipEvent_t startEvent, stopEvent; 
    hipEventCreate(&startEvent);
    hipEventCreate(&stopEvent);
    float time;

    int array_size = args.num_threads;
    const unsigned int array_size_in_bytes = array_size * sizeof(int);
	const unsigned int num_blocks = array_size / args.block_size;
    const unsigned int num_threads_per_blk = args.block_size;
    
	hipMemcpy( a_d, a, array_size_in_bytes, hipMemcpyHostToDevice );
   
    hipEventRecord(startEvent, 0);

    /* Excution of kernel with dynamically allocated shared memory */
    stencil_1d_shared<<<num_blocks, num_threads_per_blk, (num_threads_per_blk + (2 * RADIUS)) * sizeof(int) >>>(a_d, b_d);

    hipEventRecord(stopEvent, 0);
    hipEventSynchronize(stopEvent);
    hipEventElapsedTime(&time, startEvent, stopEvent);
    printf("  Function using Shared memory %f ms\n", time);

    //Print sums for debugging
    // cudaMemcpy(b, b_d, array_size_in_bytes, cudaMemcpyDeviceToHost );
    // for(unsigned int i = 0; i < array_size; i++)
	// {
	// 	printf("Sum #%d: %d\n",i,b[i]);
	// }

    //Global Test
    hipEventRecord(startEvent, 0);

    stencil_1d_global<<<num_blocks, num_threads_per_blk>>>(a_d, b_d);

    hipEventRecord(stopEvent, 0);
    hipEventSynchronize(stopEvent);
    hipEventElapsedTime(&time, startEvent, stopEvent);
    printf("  Function using Global memory %f ms\n", time);

    //Print sums for debugging
    //cudaMemcpy(b, b_d, array_size_in_bytes, cudaMemcpyDeviceToHost );
    // for(unsigned int i = 0; i < array_size; i++)
	// {
	// 	printf("Sum #%d: %d\n",i,b[i]);
	// }
    
    hipEventDestroy(startEvent);
    hipEventDestroy(stopEvent);
}

//configures host and device memory for experement.
void run_shared_experemnt(Arguments args){
    int *h_aPinned, *h_bPinned;

    int array_size = args.num_threads;
    const unsigned int array_size_in_bytes = array_size * sizeof(int);

    /* Randomly generate input vectors and dynamically allocate their memory */
    hipHostMalloc((void**)&h_aPinned, array_size_in_bytes, hipHostMallocDefault);
    hipHostMalloc((void**)&h_bPinned, array_size_in_bytes, hipHostMallocDefault);

    int i;
    for (i = 0; i < array_size; i++) {
        h_aPinned[i] = random(0,100);
    }

    /* Declare pointers for GPU based params */
    int *a_d;
    int *b_d;

    hipMalloc((void**)&a_d, array_size_in_bytes);
    hipMalloc((void**)&b_d, array_size_in_bytes);

    measure_shared_kern_speed(args, h_aPinned, h_bPinned, a_d, b_d);

    //free memory
    hipFree(a_d);
    hipFree(b_d);
    hipHostFree(h_aPinned);
    hipHostFree(h_bPinned);
}

int main(int argc, char ** argv)
{
    Arguments args = parse_arguments(argc, argv);
    printf("Num Threads: %u, Block Size: %u\n", args.num_threads, args.block_size);

    run_shared_experemnt(args);

    hipDeviceReset();
    
	return EXIT_SUCCESS;
}

	.text
	.file	"assignment5_shared_mem.hip"
	.globl	_Z32__device_stub__stencil_1d_sharedPiS_ # -- Begin function _Z32__device_stub__stencil_1d_sharedPiS_
	.type	_Z32__device_stub__stencil_1d_sharedPiS_,@function
_Z32__device_stub__stencil_1d_sharedPiS_: # @_Z32__device_stub__stencil_1d_sharedPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17stencil_1d_sharedPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__stencil_1d_sharedPiS_, .Lfunc_end0-_Z32__device_stub__stencil_1d_sharedPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__stencil_1d_globalPKiPi # -- Begin function _Z32__device_stub__stencil_1d_globalPKiPi
	.type	_Z32__device_stub__stencil_1d_globalPKiPi,@function
_Z32__device_stub__stencil_1d_globalPKiPi: # @_Z32__device_stub__stencil_1d_globalPKiPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17stencil_1d_globalPKiPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z32__device_stub__stencil_1d_globalPKiPi, .Lfunc_end1-_Z32__device_stub__stencil_1d_globalPKiPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z6randomii                     # -- Begin function _Z6randomii
	.type	_Z6randomii,@function
_Z6randomii:                            # @_Z6randomii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movl	%edi, %ebp
	callq	rand
	movl	%eax, %ecx
	subl	%ebp, %ebx
	incl	%ebx
	movl	$2147483647, %eax               # imm = 0x7FFFFFFF
	xorl	%edx, %edx
	idivl	%ebx
	movl	%eax, %esi
	incl	%esi
	movl	%ecx, %eax
	cltd
	idivl	%esi
	addl	%ebp, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z6randomii, .Lfunc_end2-_Z6randomii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_ # -- Begin function _Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_
	.type	_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_,@function
_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_: # @_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rsi, %r13
	movq	%rdi, %r12
	movq	%rdi, %r15
	shrq	$32, %r15
	leaq	8(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	leal	(,%r12,4), %ecx
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%r15d
	movl	%eax, %r12d
	movq	%r14, %rdi
	movq	%r13, %rsi
	movq	%rcx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	24(,%r15,4), %rax
	movabsq	$17179869180, %r8               # imm = 0x3FFFFFFFC
	andq	%rax, %r8
	btsq	$32, %r12
	btsq	$32, %r15
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_Z32__device_stub__stencil_1d_sharedPiS_
.LBB3_2:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	20(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r13), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_Z32__device_stub__stencil_1d_globalPKiPi
.LBB3_4:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	20(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_, .Lfunc_end3-_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z20run_shared_experemnt9Arguments # -- Begin function _Z20run_shared_experemnt9Arguments
	.type	_Z20run_shared_experemnt9Arguments,@function
_Z20run_shared_experemnt9Arguments:     # @_Z20run_shared_experemnt9Arguments
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	leal	(,%rdi,4), %r14d
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%ebx, %ebx
	jle	.LBB4_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebx, %r15d
	xorl	%r12d, %r12d
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$-905969769, %rax, %rcx         # imm = 0xC9FFFF97
	shrq	$32, %rcx
	addl	%ecx, %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	sarl	$24, %eax
	addl	%ecx, %eax
	movq	8(%rsp), %rcx
	movl	%eax, (%rcx,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB4_2
.LBB4_3:                                # %._crit_edge
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rsi
	movq	(%r15), %rcx
	movq	(%r12), %r8
	movq	%rbx, %rdi
	callq	_Z25measure_shared_kern_speed9ArgumentsPiS0_S0_S0_
	movq	(%r15), %rdi
	callq	hipFree
	movq	(%r12), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipHostFree
	movq	16(%rsp), %rdi
	callq	hipHostFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z20run_shared_experemnt9Arguments, .Lfunc_end4-_Z20run_shared_experemnt9Arguments
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %r15d
	movl	$32, %ebx
	movl	$1024, %ebp                     # imm = 0x400
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	movl	$.L.str.3, %edx
	movl	%r15d, %edi
	movq	%r14, %rsi
	callq	getopt
	cmpl	$98, %eax
	jne	.LBB5_2
# %bb.8:                                #   in Loop: Header=BB5_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, %ebx
	jmp	.LBB5_1
.LBB5_2:                                #   in Loop: Header=BB5_1 Depth=1
	cmpl	$-1, %eax
	je	.LBB5_9
# %bb.3:                                #   in Loop: Header=BB5_1 Depth=1
	cmpl	$116, %eax
	jne	.LBB5_4
# %bb.7:                                #   in Loop: Header=BB5_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, %ebp
	jmp	.LBB5_1
.LBB5_9:                                # %_ZL15parse_argumentsiPPc.exit
	movq	%rbx, %rax
	shlq	$32, %rax
	movl	%ebp, %r14d
	orq	%rax, %r14
	movl	$.L.str.2, %edi
	movl	%ebp, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	movq	%r14, %rdi
	callq	_Z20run_shared_experemnt9Arguments
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_4:
	.cfi_def_cfa_offset 48
	cmpl	$104, %eax
	jne	.LBB5_6
# %bb.5:
	callq	_ZL5usagev
.LBB5_6:                                # %.loopexit.i
	movl	$-1, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL5usagev,@function            # -- Begin function _ZL5usagev
_ZL5usagev:                             # @_ZL5usagev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.L.str.5, %edi
	movl	$1024, %esi                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %edi
	movl	$32, %esi
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end6:
	.size	_ZL5usagev, .Lfunc_end6-_ZL5usagev
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17stencil_1d_sharedPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17stencil_1d_globalPKiPi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17stencil_1d_sharedPiS_,@object # @_Z17stencil_1d_sharedPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z17stencil_1d_sharedPiS_
	.p2align	3, 0x0
_Z17stencil_1d_sharedPiS_:
	.quad	_Z32__device_stub__stencil_1d_sharedPiS_
	.size	_Z17stencil_1d_sharedPiS_, 8

	.type	_Z17stencil_1d_globalPKiPi,@object # @_Z17stencil_1d_globalPKiPi
	.globl	_Z17stencil_1d_globalPKiPi
	.p2align	3, 0x0
_Z17stencil_1d_globalPKiPi:
	.quad	_Z32__device_stub__stencil_1d_globalPKiPi
	.size	_Z17stencil_1d_globalPKiPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"  Function using Shared memory %f ms\n"
	.size	.L.str, 38

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"  Function using Global memory %f ms\n"
	.size	.L.str.1, 38

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Num Threads: %u, Block Size: %u\n"
	.size	.L.str.2, 33

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"ht:b:"
	.size	.L.str.3, 6

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\t-t: Specify the number of threads. <num_threads> must be greater than 0. Optional (default %u)\n"
	.size	.L.str.5, 97

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\t-b: Specify the size of each block. <block_size> must be greater than 0. Optional (default %u)\n"
	.size	.L.str.6, 97

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17stencil_1d_sharedPiS_"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17stencil_1d_globalPKiPi"
	.size	.L__unnamed_2, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Usage: ./assignment5 [-t <num_threads>] [-b <block_size>] [-h]"
	.size	.Lstr, 63

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__stencil_1d_sharedPiS_
	.addrsig_sym _Z32__device_stub__stencil_1d_globalPKiPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17stencil_1d_sharedPiS_
	.addrsig_sym _Z17stencil_1d_globalPKiPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17stencil_1d_sharedPiS_ ; -- Begin function _Z17stencil_1d_sharedPiS_
	.globl	_Z17stencil_1d_sharedPiS_
	.p2align	8
	.type	_Z17stencil_1d_sharedPiS_,@function
_Z17stencil_1d_sharedPiS_:              ; @_Z17stencil_1d_sharedPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[5:6]
	v_lshl_add_u32 v6, v0, 2, 0
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v7, v[3:4], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v7 offset:12
	v_cmpx_gt_u32_e32 3, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v7, s4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[3:4], off offset:-12
	global_load_b32 v3, v[7:8], off
	v_lshl_add_u32 v4, s4, 2, v6
	s_waitcnt vmcnt(1)
	ds_store_b32 v6, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v3 offset:12
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v0, 0
	s_movk_i32 s0, 0xffe4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s0, v6
	s_add_i32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 0
	ds_load_b32 v3, v3 offset:28
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, v3, v0
	s_cbranch_scc0 .LBB0_3
; %bb.4:
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17stencil_1d_sharedPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17stencil_1d_sharedPiS_, .Lfunc_end0-_Z17stencil_1d_sharedPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17stencil_1d_globalPKiPi ; -- Begin function _Z17stencil_1d_globalPKiPi
	.globl	_Z17stencil_1d_globalPKiPi
	.p2align	8
	.type	_Z17stencil_1d_globalPKiPi,@function
_Z17stencil_1d_globalPKiPi:             ; @_Z17stencil_1d_globalPKiPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, -3
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v2, s4, v1
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s4, 4
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v2, v0
	s_cbranch_scc0 .LBB1_1
; %bb.2:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17stencil_1d_globalPKiPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17stencil_1d_globalPKiPi, .Lfunc_end1-_Z17stencil_1d_globalPKiPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17stencil_1d_sharedPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17stencil_1d_sharedPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17stencil_1d_globalPKiPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17stencil_1d_globalPKiPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
